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-rw-r--r--arch/blackfin/mach-common/entry.S18
-rw-r--r--arch/blackfin/mach-common/interrupt.S2
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 5a219b228de3..76c42d3b5e85 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -484,6 +484,15 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
484 [--sp] = ASTAT; 484 [--sp] = ASTAT;
485 [--sp] = (R7:6,P5:4); 485 [--sp] = (R7:6,P5:4);
486 486
487#if ANOMALY_05000283 || ANOMALY_05000315
488 cc = r7 == r7;
489 p5.h = HI(CHIPID);
490 p5.l = LO(CHIPID);
491 if cc jump 1f;
492 r7.l = W[p5];
4931:
494#endif
495
487#ifdef CONFIG_DEBUG_DOUBLEFAULT 496#ifdef CONFIG_DEBUG_DOUBLEFAULT
488 /* 497 /*
489 * Save these registers, as they are only valid in exception context 498 * Save these registers, as they are only valid in exception context
@@ -1020,6 +1029,15 @@ ENTRY(_early_trap)
1020 SAVE_ALL_SYS 1029 SAVE_ALL_SYS
1021 trace_buffer_stop(p0,r0); 1030 trace_buffer_stop(p0,r0);
1022 1031
1032#if ANOMALY_05000283 || ANOMALY_05000315
1033 cc = r5 == r5;
1034 p4.h = HI(CHIPID);
1035 p4.l = LO(CHIPID);
1036 if cc jump 1f;
1037 r5.l = W[p4];
10381:
1039#endif
1040
1023 /* Turn caches off, to ensure we don't get double exceptions */ 1041 /* Turn caches off, to ensure we don't get double exceptions */
1024 1042
1025 P4.L = LO(IMEM_CONTROL); 1043 P4.L = LO(IMEM_CONTROL);
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index b27e59d32401..647f0f522910 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -143,7 +143,7 @@ ENTRY(_evt_ivhw)
143 fp = 0; 143 fp = 0;
144#endif 144#endif
145 145
146#if ANOMALY_05000283 146#if ANOMALY_05000283 || ANOMALY_05000315
147 cc = r7 == r7; 147 cc = r7 == r7;
148 p5.h = HI(CHIPID); 148 p5.h = HI(CHIPID);
149 p5.l = LO(CHIPID); 149 p5.l = LO(CHIPID);