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-rw-r--r--arch/arm/mach-ixp4xx/Kconfig8
-rw-r--r--arch/arm/mach-ixp4xx/Makefile1
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c77
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-power.c69
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c133
-rw-r--r--include/asm-arm/arch-ixp4xx/hardware.h1
-rw-r--r--include/asm-arm/arch-ixp4xx/irqs.h9
-rw-r--r--include/asm-arm/arch-ixp4xx/nas100d.h75
8 files changed, 373 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 385285851cb5..daadc78e271b 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -71,6 +71,14 @@ config ARCH_PRPMC1100
71 PrPCM1100 Processor Mezanine Module. For more information on 71 PrPCM1100 Processor Mezanine Module. For more information on
72 this platform, see <file:Documentation/arm/IXP4xx>. 72 this platform, see <file:Documentation/arm/IXP4xx>.
73 73
74config MACH_NAS100D
75 bool
76 prompt "NAS100D"
77 help
78 Say 'Y' here if you want your kernel to support Iomega's
79 NAS 100d device. For more information on this platform,
80 see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
81
74# 82#
75# Avila and IXDP share the same source for now. Will change in future 83# Avila and IXDP share the same source for now. Will change in future
76# 84#
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index 7a15629c18d0..0471044fa179 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -9,4 +9,5 @@ obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o
9obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o 9obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o
10obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o 10obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o
11obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o 11obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o
12obj-$(CONFIG_MACH_NAS100D) += nas100d-pci.o nas100d-setup.o nas100d-power.o
12 13
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
new file mode 100644
index 000000000000..9bd029462359
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -0,0 +1,77 @@
1/*
2 * arch/arm/mach-ixp4xx/nas100d-pci.c
3 *
4 * NAS 100d board-level PCI initialization
5 *
6 * based on ixdp425-pci.c:
7 * Copyright (C) 2002 Intel Corporation.
8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
9 *
10 * Maintainer: http://www.nslu2-linux.org/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/config.h>
19#include <linux/pci.h>
20#include <linux/init.h>
21
22#include <asm/mach/pci.h>
23#include <asm/mach-types.h>
24
25void __init nas100d_pci_preinit(void)
26{
27 set_irq_type(IRQ_NAS100D_PCI_INTA, IRQT_LOW);
28 set_irq_type(IRQ_NAS100D_PCI_INTB, IRQT_LOW);
29 set_irq_type(IRQ_NAS100D_PCI_INTC, IRQT_LOW);
30 set_irq_type(IRQ_NAS100D_PCI_INTD, IRQT_LOW);
31 set_irq_type(IRQ_NAS100D_PCI_INTE, IRQT_LOW);
32
33 gpio_line_isr_clear(NAS100D_PCI_INTA_PIN);
34 gpio_line_isr_clear(NAS100D_PCI_INTB_PIN);
35 gpio_line_isr_clear(NAS100D_PCI_INTC_PIN);
36 gpio_line_isr_clear(NAS100D_PCI_INTD_PIN);
37 gpio_line_isr_clear(NAS100D_PCI_INTE_PIN);
38
39 ixp4xx_pci_preinit();
40}
41
42static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
43{
44 static int pci_irq_table[NAS100D_PCI_MAX_DEV][NAS100D_PCI_IRQ_LINES] =
45 {
46 { IRQ_NAS100D_PCI_INTA, -1, -1 },
47 { IRQ_NAS100D_PCI_INTB, -1, -1 },
48 { IRQ_NAS100D_PCI_INTC, IRQ_NAS100D_PCI_INTD, IRQ_NAS100D_PCI_INTE },
49 };
50
51 int irq = -1;
52
53 if (slot >= 1 && slot <= NAS100D_PCI_MAX_DEV &&
54 pin >= 1 && pin <= NAS100D_PCI_IRQ_LINES)
55 irq = pci_irq_table[slot-1][pin-1];
56
57 return irq;
58}
59
60struct hw_pci __initdata nas100d_pci = {
61 .nr_controllers = 1,
62 .preinit = nas100d_pci_preinit,
63 .swizzle = pci_std_swizzle,
64 .setup = ixp4xx_setup,
65 .scan = ixp4xx_scan_bus,
66 .map_irq = nas100d_map_irq,
67};
68
69int __init nas100d_pci_init(void)
70{
71 if (machine_is_nas100d())
72 pci_common_init(&nas100d_pci);
73
74 return 0;
75}
76
77subsys_initcall(nas100d_pci_init);
diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c
new file mode 100644
index 000000000000..c74a19004390
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nas100d-power.c
@@ -0,0 +1,69 @@
1/*
2 * arch/arm/mach-ixp4xx/nas100d-power.c
3 *
4 * NAS 100d Power/Reset driver
5 *
6 * Copyright (C) 2005 Tower Technologies
7 *
8 * based on nas100d-io.c
9 * Copyright (C) 2004 Karen Spearel
10 *
11 * Author: Alessandro Zummo <a.zummo@towertech.it>
12 * Maintainers: http://www.nslu2-linux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h>
23
24#include <asm/mach-types.h>
25
26extern void ctrl_alt_del(void);
27
28static irqreturn_t nas100d_reset_handler(int irq, void *dev_id, struct pt_regs *regs)
29{
30 /* Signal init to do the ctrlaltdel action, this will bypass init if
31 * it hasn't started and do a kernel_restart.
32 */
33 ctrl_alt_del();
34
35 return IRQ_HANDLED;
36}
37
38static int __init nas100d_power_init(void)
39{
40 if (!(machine_is_nas100d()))
41 return 0;
42
43 set_irq_type(NAS100D_RB_IRQ, IRQT_LOW);
44
45 gpio_line_isr_clear(NAS100D_RB_GPIO);
46
47 if (request_irq(NAS100D_RB_IRQ, &nas100d_reset_handler,
48 SA_INTERRUPT, "NAS100D reset button", NULL) < 0) {
49
50 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
51 NAS100D_RB_IRQ);
52
53 return -EIO;
54 }
55
56 return 0;
57}
58
59static void __exit nas100d_power_exit(void)
60{
61 free_irq(NAS100D_RB_IRQ, NULL);
62}
63
64module_init(nas100d_power_init);
65module_exit(nas100d_power_exit);
66
67MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
68MODULE_DESCRIPTION("NAS100D Power/Reset driver");
69MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
new file mode 100644
index 000000000000..bde9648e7afc
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -0,0 +1,133 @@
1/*
2 * arch/arm/mach-ixp4xx/nas100d-setup.c
3 *
4 * NAS 100d board-setup
5 *
6 * based ixdp425-setup.c:
7 * Copyright (C) 2003-2004 MontaVista Software, Inc.
8 *
9 * Author: Alessandro Zummo <a.zummo@towertech.it>
10 * Author: Rod Whitby <rod@whitby.id.au>
11 * Maintainers: http://www.nslu2-linux.org/
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/serial.h>
17#include <linux/serial_8250.h>
18
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <asm/mach/flash.h>
22
23static struct flash_platform_data nas100d_flash_data = {
24 .map_name = "cfi_probe",
25 .width = 2,
26};
27
28static struct resource nas100d_flash_resource = {
29 .start = NAS100D_FLASH_BASE,
30 .end = NAS100D_FLASH_BASE + NAS100D_FLASH_SIZE,
31 .flags = IORESOURCE_MEM,
32};
33
34static struct platform_device nas100d_flash = {
35 .name = "IXP4XX-Flash",
36 .id = 0,
37 .dev.platform_data = &nas100d_flash_data,
38 .num_resources = 1,
39 .resource = &nas100d_flash_resource,
40};
41
42static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = {
43 .sda_pin = NAS100D_SDA_PIN,
44 .scl_pin = NAS100D_SCL_PIN,
45};
46
47static struct platform_device nas100d_i2c_controller = {
48 .name = "IXP4XX-I2C",
49 .id = 0,
50 .dev.platform_data = &nas100d_i2c_gpio_pins,
51 .num_resources = 0,
52};
53
54static struct resource nas100d_uart_resources[] = {
55 {
56 .start = IXP4XX_UART1_BASE_PHYS,
57 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
58 .flags = IORESOURCE_MEM,
59 },
60 {
61 .start = IXP4XX_UART2_BASE_PHYS,
62 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
63 .flags = IORESOURCE_MEM,
64 }
65};
66
67static struct plat_serial8250_port nas100d_uart_data[] = {
68 {
69 .mapbase = IXP4XX_UART1_BASE_PHYS,
70 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
71 .irq = IRQ_IXP4XX_UART1,
72 .flags = UPF_BOOT_AUTOCONF,
73 .iotype = UPIO_MEM,
74 .regshift = 2,
75 .uartclk = IXP4XX_UART_XTAL,
76 },
77 {
78 .mapbase = IXP4XX_UART2_BASE_PHYS,
79 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
80 .irq = IRQ_IXP4XX_UART2,
81 .flags = UPF_BOOT_AUTOCONF,
82 .iotype = UPIO_MEM,
83 .regshift = 2,
84 .uartclk = IXP4XX_UART_XTAL,
85 },
86 { }
87};
88
89static struct platform_device nas100d_uart = {
90 .name = "serial8250",
91 .id = PLAT8250_DEV_PLATFORM,
92 .dev.platform_data = nas100d_uart_data,
93 .num_resources = 2,
94 .resource = nas100d_uart_resources,
95};
96
97static struct platform_device *nas100d_devices[] __initdata = {
98 &nas100d_i2c_controller,
99 &nas100d_flash,
100 &nas100d_uart,
101};
102
103static void nas100d_power_off(void)
104{
105 /* This causes the box to drop the power and go dead. */
106
107 /* enable the pwr cntl gpio */
108 gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT);
109
110 /* do the deed */
111 gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
112}
113
114static void __init nas100d_init(void)
115{
116 ixp4xx_sys_init();
117
118 pm_power_off = nas100d_power_off;
119
120 platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
121}
122
123MACHINE_START(NAS100D, "Iomega NAS 100d")
124 /* Maintainer: www.nslu2-linux.org */
125 .phys_ram = PHYS_OFFSET,
126 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
127 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
128 .boot_params = 0x00000100,
129 .map_io = ixp4xx_map_io,
130 .init_irq = ixp4xx_init_irq,
131 .timer = &ixp4xx_timer,
132 .init_machine = nas100d_init,
133MACHINE_END
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index cfb413c845f7..6acb69c95ef9 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -45,5 +45,6 @@ extern unsigned int processor_id;
45#include "coyote.h" 45#include "coyote.h"
46#include "prpmc1100.h" 46#include "prpmc1100.h"
47#include "nslu2.h" 47#include "nslu2.h"
48#include "nas100d.h"
48 49
49#endif /* _ASM_ARCH_HARDWARE_H */ 50#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
index 2cf4930372bc..f24b763ca18e 100644
--- a/include/asm-arm/arch-ixp4xx/irqs.h
+++ b/include/asm-arm/arch-ixp4xx/irqs.h
@@ -100,4 +100,13 @@
100#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10 100#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10
101#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9 101#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9
102 102
103/*
104 * NAS100D board IRQs
105 */
106#define IRQ_NAS100D_PCI_INTA IRQ_IXP4XX_GPIO11
107#define IRQ_NAS100D_PCI_INTB IRQ_IXP4XX_GPIO10
108#define IRQ_NAS100D_PCI_INTC IRQ_IXP4XX_GPIO9
109#define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8
110#define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7
111
103#endif 112#endif
diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h
new file mode 100644
index 000000000000..ce7a86a98fc2
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/nas100d.h
@@ -0,0 +1,75 @@
1/*
2 * include/asm-arm/arch-ixp4xx/nas100d.h
3 *
4 * NAS100D platform specific definitions
5 *
6 * Copyright (c) 2005 Tower Technologies
7 *
8 * Author: Alessandro Zummo <a.zummo@towertech.it>
9 *
10 * based on ixdp425.h:
11 * Copyright 2004 (c) MontaVista, Software, Inc.
12 *
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
16 */
17
18#ifndef __ASM_ARCH_HARDWARE_H__
19#error "Do not include this directly, instead #include <asm/hardware.h>"
20#endif
21
22#define NAS100D_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
23#define NAS100D_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
24
25#define NAS100D_SDA_PIN 6
26#define NAS100D_SCL_PIN 5
27
28/*
29 * NAS100D PCI IRQs
30 */
31#define NAS100D_PCI_MAX_DEV 3
32#define NAS100D_PCI_IRQ_LINES 3
33
34
35/* PCI controller GPIO to IRQ pin mappings */
36#define NAS100D_PCI_INTA_PIN 11
37#define NAS100D_PCI_INTB_PIN 10
38#define NAS100D_PCI_INTC_PIN 9
39#define NAS100D_PCI_INTD_PIN 8
40#define NAS100D_PCI_INTE_PIN 7
41
42/* GPIO */
43
44#define NAS100D_GPIO0 0
45#define NAS100D_GPIO1 1
46#define NAS100D_GPIO2 2
47#define NAS100D_GPIO3 3
48#define NAS100D_GPIO4 4
49#define NAS100D_GPIO5 5
50#define NAS100D_GPIO6 6
51#define NAS100D_GPIO7 7
52#define NAS100D_GPIO8 8
53#define NAS100D_GPIO9 9
54#define NAS100D_GPIO10 10
55#define NAS100D_GPIO11 11
56#define NAS100D_GPIO12 12
57#define NAS100D_GPIO13 13
58#define NAS100D_GPIO14 14
59#define NAS100D_GPIO15 15
60
61
62/* Buttons */
63
64#define NAS100D_PB_GPIO NAS100D_GPIO14
65#define NAS100D_RB_GPIO NAS100D_GPIO4
66#define NAS100D_PO_GPIO NAS100D_GPIO12 /* power off */
67
68#define NAS100D_PB_IRQ IRQ_IXP4XX_GPIO14
69#define NAS100D_RB_IRQ IRQ_IXP4XX_GPIO4
70
71/*
72#define NAS100D_PB_BM (1L << NAS100D_PB_GPIO)
73#define NAS100D_PO_BM (1L << NAS100D_PO_GPIO)
74#define NAS100D_RB_BM (1L << NAS100D_RB_GPIO)
75*/
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 06:38:56 -0500