aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/mach-kirkwood/common.c7
-rw-r--r--include/asm-arm/arch-kirkwood/kirkwood.h3
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index e73384fbbba8..5938a3b33cdc 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -313,6 +313,11 @@ static char * __init kirkwood_id(void)
313 return "unknown 88F6000 variant"; 313 return "unknown 88F6000 variant";
314} 314}
315 315
316static int __init is_l2_writethrough(void)
317{
318 return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH);
319}
320
316void __init kirkwood_init(void) 321void __init kirkwood_init(void)
317{ 322{
318 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", 323 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
@@ -321,6 +326,6 @@ void __init kirkwood_init(void)
321 kirkwood_setup_cpu_mbus(); 326 kirkwood_setup_cpu_mbus();
322 327
323#ifdef CONFIG_CACHE_FEROCEON_L2 328#ifdef CONFIG_CACHE_FEROCEON_L2
324 feroceon_l2_init(1); 329 feroceon_l2_init(is_l2_writethrough());
325#endif 330#endif
326} 331}
diff --git a/include/asm-arm/arch-kirkwood/kirkwood.h b/include/asm-arm/arch-kirkwood/kirkwood.h
index 520250dbd8a3..bb31b315c350 100644
--- a/include/asm-arm/arch-kirkwood/kirkwood.h
+++ b/include/asm-arm/arch-kirkwood/kirkwood.h
@@ -49,7 +49,6 @@
49#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) 49#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
50#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) 50#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
51#define CPU_RESET 0x00000002 51#define CPU_RESET 0x00000002
52//#define L2_WRITETHROUGH 0x00020000
53#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) 52#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
54#define SOFT_RESET_OUT_EN 0x00000004 53#define SOFT_RESET_OUT_EN 0x00000004
55#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) 54#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
@@ -65,6 +64,8 @@
65#define IRQ_CAUSE_HIGH_OFF 0x0010 64#define IRQ_CAUSE_HIGH_OFF 0x0010
66#define IRQ_MASK_HIGH_OFF 0x0014 65#define IRQ_MASK_HIGH_OFF 0x0014
67#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 66#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
67#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
68#define L2_WRITETHROUGH 0x00000010
68 69
69/* 70/*
70 * Register Map 71 * Register Map