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-rw-r--r--arch/ia64/configs/sn2_defconfig2
-rw-r--r--arch/ia64/kernel/time.c29
-rw-r--r--arch/ia64/kernel/uncached.c6
-rw-r--r--arch/ia64/kernel/vmlinux.lds.S3
-rw-r--r--arch/ia64/sn/kernel/sn2/sn2_smp.c2
-rw-r--r--include/asm-ia64/delay.h10
-rw-r--r--include/linux/cache.h2
7 files changed, 39 insertions, 15 deletions
diff --git a/arch/ia64/configs/sn2_defconfig b/arch/ia64/configs/sn2_defconfig
index e1924cc9687b..ff8bb3770c9d 100644
--- a/arch/ia64/configs/sn2_defconfig
+++ b/arch/ia64/configs/sn2_defconfig
@@ -113,7 +113,7 @@ CONFIG_IOSAPIC=y
113CONFIG_IA64_SGI_SN_XP=m 113CONFIG_IA64_SGI_SN_XP=m
114CONFIG_FORCE_MAX_ZONEORDER=17 114CONFIG_FORCE_MAX_ZONEORDER=17
115CONFIG_SMP=y 115CONFIG_SMP=y
116CONFIG_NR_CPUS=512 116CONFIG_NR_CPUS=1024
117# CONFIG_HOTPLUG_CPU is not set 117# CONFIG_HOTPLUG_CPU is not set
118CONFIG_SCHED_SMT=y 118CONFIG_SCHED_SMT=y
119CONFIG_PREEMPT=y 119CONFIG_PREEMPT=y
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 5b7e736f3b49..028a2b95936c 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -249,3 +249,32 @@ time_init (void)
249 */ 249 */
250 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); 250 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
251} 251}
252
253#define SMALLUSECS 100
254
255void
256udelay (unsigned long usecs)
257{
258 unsigned long start;
259 unsigned long cycles;
260 unsigned long smallusecs;
261
262 /*
263 * Execute the non-preemptible delay loop (because the ITC might
264 * not be synchronized between CPUS) in relatively short time
265 * chunks, allowing preemption between the chunks.
266 */
267 while (usecs > 0) {
268 smallusecs = (usecs > SMALLUSECS) ? SMALLUSECS : usecs;
269 preempt_disable();
270 cycles = smallusecs*local_cpu_data->cyc_per_usec;
271 start = ia64_get_itc();
272
273 while (ia64_get_itc() - start < cycles)
274 cpu_relax();
275
276 preempt_enable();
277 usecs -= smallusecs;
278 }
279}
280EXPORT_SYMBOL(udelay);
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index c6d40446c2c4..b631cf86ed44 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -53,7 +53,7 @@ static void uncached_ipi_visibility(void *data)
53 if ((status != PAL_VISIBILITY_OK) && 53 if ((status != PAL_VISIBILITY_OK) &&
54 (status != PAL_VISIBILITY_OK_REMOTE_NEEDED)) 54 (status != PAL_VISIBILITY_OK_REMOTE_NEEDED))
55 printk(KERN_DEBUG "pal_prefetch_visibility() returns %i on " 55 printk(KERN_DEBUG "pal_prefetch_visibility() returns %i on "
56 "CPU %i\n", status, get_cpu()); 56 "CPU %i\n", status, raw_smp_processor_id());
57} 57}
58 58
59 59
@@ -63,7 +63,7 @@ static void uncached_ipi_mc_drain(void *data)
63 status = ia64_pal_mc_drain(); 63 status = ia64_pal_mc_drain();
64 if (status) 64 if (status)
65 printk(KERN_WARNING "ia64_pal_mc_drain() failed with %i on " 65 printk(KERN_WARNING "ia64_pal_mc_drain() failed with %i on "
66 "CPU %i\n", status, get_cpu()); 66 "CPU %i\n", status, raw_smp_processor_id());
67} 67}
68 68
69 69
@@ -105,7 +105,7 @@ uncached_get_new_chunk(struct gen_pool *poolp)
105 status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); 105 status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL);
106 106
107 dprintk(KERN_INFO "pal_prefetch_visibility() returns %i on cpu %i\n", 107 dprintk(KERN_INFO "pal_prefetch_visibility() returns %i on cpu %i\n",
108 status, get_cpu()); 108 status, raw_smp_processor_id());
109 109
110 if (!status) { 110 if (!status) {
111 status = smp_call_function(uncached_ipi_visibility, NULL, 0, 1); 111 status = smp_call_function(uncached_ipi_visibility, NULL, 0, 1);
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 30d8564e9603..73af6267d2ef 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -177,6 +177,9 @@ SECTIONS
177 } 177 }
178 . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */ 178 . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */
179 179
180 .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
181 { *(.data.read_mostly) }
182
180 .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) 183 .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
181 { *(.data.cacheline_aligned) } 184 { *(.data.cacheline_aligned) }
182 185
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c
index 5d54f5f4e926..471bbaa65d1b 100644
--- a/arch/ia64/sn/kernel/sn2/sn2_smp.c
+++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c
@@ -202,7 +202,7 @@ sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start,
202 unsigned long end, unsigned long nbits) 202 unsigned long end, unsigned long nbits)
203{ 203{
204 int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0; 204 int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
205 int mymm = (mm == current->active_mm); 205 int mymm = (mm == current->active_mm && current->mm);
206 volatile unsigned long *ptc0, *ptc1; 206 volatile unsigned long *ptc0, *ptc1;
207 unsigned long itc, itc2, flags, data0 = 0, data1 = 0, rr_value; 207 unsigned long itc, itc2, flags, data0 = 0, data1 = 0, rr_value;
208 short nasids[MAX_NUMNODES], nix; 208 short nasids[MAX_NUMNODES], nix;
diff --git a/include/asm-ia64/delay.h b/include/asm-ia64/delay.h
index 57182d6f2b9a..bba702076391 100644
--- a/include/asm-ia64/delay.h
+++ b/include/asm-ia64/delay.h
@@ -84,14 +84,6 @@ __delay (unsigned long loops)
84 ia64_delay_loop (loops - 1); 84 ia64_delay_loop (loops - 1);
85} 85}
86 86
87static __inline__ void 87extern void udelay (unsigned long usecs);
88udelay (unsigned long usecs)
89{
90 unsigned long start = ia64_get_itc();
91 unsigned long cycles = usecs*local_cpu_data->cyc_per_usec;
92
93 while (ia64_get_itc() - start < cycles)
94 cpu_relax();
95}
96 88
97#endif /* _ASM_IA64_DELAY_H */ 89#endif /* _ASM_IA64_DELAY_H */
diff --git a/include/linux/cache.h b/include/linux/cache.h
index f6b5a46c5f82..0b7ecf3af78a 100644
--- a/include/linux/cache.h
+++ b/include/linux/cache.h
@@ -13,7 +13,7 @@
13#define SMP_CACHE_BYTES L1_CACHE_BYTES 13#define SMP_CACHE_BYTES L1_CACHE_BYTES
14#endif 14#endif
15 15
16#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) 16#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64)
17#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 17#define __read_mostly __attribute__((__section__(".data.read_mostly")))
18#else 18#else
19#define __read_mostly 19#define __read_mostly