390 files changed, 18237 insertions, 9399 deletions

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 76733a3962f0..20e0e6cb0347 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -50,7 +50,7 @@ Table of Contents
       g) Freescale SOC SEC Security Engines
       h) Board Control and Status (BCSR)
       i) Freescale QUICC Engine module (QE)
-      j) Flash chip nodes
+      j) CFI or JEDEC memory-mapped NOR flash
       k) Global Utilities Block
 
   VII - Specifying interrupt information for devices
@@ -1757,45 +1757,69 @@ platforms are moved over to use the flattened-device-tree model.
                 };
         };
 
-    j) Flash chip nodes
+   j) CFI or JEDEC memory-mapped NOR flash
 
     Flash chips (Memory Technology Devices) are often used for solid state
     file systems on embedded devices.
 
-    Required properties:
+     - compatible : should contain the specific model of flash chip(s)
+       used, if known, followed by either "cfi-flash" or "jedec-flash"
+     - reg : Address range of the flash chip
+     - bank-width : Width (in bytes) of the flash bank.  Equal to the
+       device width times the number of interleaved chips.
+     - device-width : (optional) Width of a single flash chip.  If
+       omitted, assumed to be equal to 'bank-width'.
+     - #address-cells, #size-cells : Must be present if the flash has
+       sub-nodes representing partitions (see below).  In this case
+       both #address-cells and #size-cells must be equal to 1.
+
+    For JEDEC compatible devices, the following additional properties
+    are defined:
+
+     - vendor-id : Contains the flash chip's vendor id (1 byte).
+     - device-id : Contains the flash chip's device id (1 byte).
+
+    In addition to the information on the flash bank itself, the
+    device tree may optionally contain additional information
+    describing partitions of the flash address space.  This can be
+    used on platforms which have strong conventions about which
+    portions of the flash are used for what purposes, but which don't
+    use an on-flash partition table such as RedBoot.
+
+    Each partition is represented as a sub-node of the flash device.
+    Each node's name represents the name of the corresponding
+    partition of the flash device.
+
+    Flash partitions
+     - reg : The partition's offset and size within the flash bank.
+     - label : (optional) The label / name for this flash partition.
+       If omitted, the label is taken from the node name (excluding
+       the unit address).
+     - read-only : (optional) This parameter, if present, is a hint to
+       Linux that this flash partition should only be mounted
+       read-only.  This is usually used for flash partitions
+       containing early-boot firmware images or data which should not
+       be clobbered.
 
-     - device_type : has to be "rom"
-     - compatible : Should specify what this flash device is compatible with.
-       Currently, this is most likely to be "direct-mapped" (which
-       corresponds to the MTD physmap mapping driver).
-     - reg : Offset and length of the register set (or memory mapping) for
-       the device.
-     - bank-width : Width of the flash data bus in bytes. Required
-       for the NOR flashes (compatible == "direct-mapped" and others) ONLY.
-
-    Recommended properties :
-
-     - partitions : Several pairs of 32-bit values where the first value is
-       partition's offset from the start of the device and the second one is
-       partition size in bytes with LSB used to signify a read only
-       partition (so, the partition size should always be an even number).
-     - partition-names : The list of concatenated zero terminated strings
-       representing the partition names.
-     - probe-type : The type of probe which should be done for the chip
-       (JEDEC vs CFI actually). Valid ONLY for NOR flashes.
-
-   Example:
+    Example:
 
-        flash@ff000000 {
-                device_type = "rom";
-                compatible = "direct-mapped";
-                probe-type = "CFI";
-                reg = <ff000000 01000000>;
-                bank-width = <4>;
-                partitions = <00000000 00f80000
-                              00f80000 00080001>;
-                partition-names = "fs\0firmware";
-        };
+        flash@ff000000 {
+                compatible = "amd,am29lv128ml", "cfi-flash";
+                reg = <ff000000 01000000>;
+                bank-width = <4>;
+                device-width = <1>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                fs@0 {
+                        label = "fs";
+                        reg = <0 f80000>;
+                };
+                firmware@f80000 {
+                        label ="firmware";
+                        reg = <f80000 80000>;
+                        read-only;
+                };
+        };
 
    k) Global Utilities Block
 
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a91d9e3f1f2..2ef086214135 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1543,7 +1543,7 @@ P:	Pantelis Antoniou
 M:      pantelis.antoniou@gmail.com
 P:      Vitaly Bordug
 M:      vbordug@ru.mvista.com
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 L:      netdev@vger.kernel.org
 S:      Maintained
 
@@ -1551,14 +1551,14 @@ FREESCALE HIGHSPEED USB DEVICE DRIVER
 P:      Li Yang
 M:      leoli@freescale.com
 L:      linux-usb-devel@lists.sourceforge.net
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 S:      Maintained
 
 FREESCALE QUICC ENGINE UCC ETHERNET DRIVER
 P:      Li Yang
 M:      leoli@freescale.com
 L:      netdev@vger.kernel.org
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 S:      Maintained
 
 FILE LOCKING (flock() and fcntl()/lockf())
@@ -2291,35 +2291,37 @@ M:	tnt@246tNt.com
 W:      http://www.246tNt.com/mpc52xx/
 W:      http://www.penguinppc.org/
 L:      linuxppc-dev@ozlabs.org
-L:      linuxppc-embedded@ozlabs.org
 S:      Maintained
 
 LINUX FOR POWERPC EMBEDDED PPC4XX
+P:      Josh Boyer
+M:      jwboyer@linux.vnet.ibm.com
 P:      Matt Porter
 M:      mporter@kernel.crashing.org
 W:      http://www.penguinppc.org/
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
+T:      git kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc.git
 S:      Maintained
 
 LINUX FOR POWERPC BOOT CODE
 P:      Tom Rini
 M:      trini@kernel.crashing.org
 W:      http://www.penguinppc.org/
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 S:      Maintained
 
 LINUX FOR POWERPC EMBEDDED PPC8XX
 P:      Marcelo Tosatti
 M:      marcelo@kvack.org
 W:      http://www.penguinppc.org/
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 S:      Maintained
 
 LINUX FOR POWERPC EMBEDDED PPC83XX AND PPC85XX
 P:      Kumar Gala
 M:      galak@kernel.crashing.org
 W:      http://www.penguinppc.org/
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 S:      Maintained
 
 LINUX FOR POWERPC PA SEMI PWRFICIENT
@@ -2975,7 +2977,7 @@ POWERPC 4xx EMAC DRIVER
 P:      Eugene Surovegin
 M:      ebs@ebshome.net
 W:      http://kernel.ebshome.net/emac/
-L:      linuxppc-embedded@ozlabs.org
+L:      linuxppc-dev@ozlabs.org
 L:      netdev@vger.kernel.org
 S:      Maintained
 
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 00099efe0e9f..6819a94f2cac 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -14,6 +14,11 @@ config 64BIT
         bool
         default y if PPC64
 
+config WORD_SIZE
+        int
+        default 64 if PPC64
+        default 32 if !PPC64
+
 config PPC_MERGE
         def_bool y
 
@@ -21,6 +26,15 @@ config MMU
         bool
         default y
 
+config GENERIC_CMOS_UPDATE
+        def_bool y
+
+config GENERIC_TIME
+        def_bool y
+
+config GENERIC_TIME_VSYSCALL
+        def_bool y
+
 config GENERIC_HARDIRQS
         bool
         default y
@@ -181,16 +195,17 @@ config MATH_EMULATION
           instructions to run.
 
 config IOMMU_VMERGE
-        bool "Enable IOMMU virtual merging (EXPERIMENTAL)"
-        depends on EXPERIMENTAL && PPC64
-        default n
+        bool "Enable IOMMU virtual merging"
+        depends on PPC64
+        default y
         help
           Cause IO segments sent to a device for DMA to be merged virtually
           by the IOMMU when they happen to have been allocated contiguously.
           This doesn't add pressure to the IOMMU allocator. However, some
           drivers don't support getting large merged segments coming back
-          from *_map_sg(). Say Y if you know the drivers you are using are
-          properly handling this case.
+          from *_map_sg().
+
+          Most drivers don't have this problem; it is safe to say Y here.
 
 config HOTPLUG_CPU
         bool "Support for enabling/disabling CPUs"
@@ -662,3 +677,7 @@ config KEYS_COMPAT
         default y
 
 source "crypto/Kconfig"
+
+config PPC_CLOCK
+        bool
+        default n
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 22acece95b11..c38bc2237057 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -124,6 +124,16 @@ config IRQSTACKS
           for handling hard and soft interrupts.  This can help avoid
           overflowing the process kernel stacks.
 
+config VIRQ_DEBUG
+        bool "Expose hardware/virtual IRQ mapping via debugfs"
+        depends on DEBUG_FS && PPC_MERGE
+        help
+          This option will show the mapping relationship between hardware irq
+          numbers and virtual irq numbers. The mapping is exposed via debugfs
+          in the file powerpc/virq_mapping.
+
+          If you don't know what this means you don't need it.
+
 config BDI_SWITCH
         bool "Include BDI-2000 user context switcher"
         depends on DEBUG_KERNEL && PPC32
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 6c1e36c33faa..643839a3f5d8 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -35,11 +35,14 @@ endif
 
 export CROSS32CC CROSS32AS CROSS32LD CROSS32AR CROSS32OBJCOPY
 
+ifeq ($(CROSS_COMPILE),)
 KBUILD_DEFCONFIG := $(shell uname -m)_defconfig
+else
+KBUILD_DEFCONFIG := ppc64_defconfig
+endif
 
 ifeq ($(CONFIG_PPC64),y)
 OLDARCH := ppc64
-SZ      := 64
 
 new_nm := $(shell if $(NM) --help 2>&1 | grep -- '--synthetic' > /dev/null; then echo y; else echo n; fi)
 
@@ -49,22 +52,26 @@ endif
 
 else
 OLDARCH := ppc
-SZ      := 32
+endif
+
+# It seems there are times we use this Makefile without
+# including the config file, but this replicates the old behaviour
+ifeq ($(CONFIG_WORD_SIZE),)
+CONFIG_WORD_SIZE := 32
 endif
 
 UTS_MACHINE := $(OLDARCH)
 
 ifeq ($(HAS_BIARCH),y)
-override AS     += -a$(SZ)
-override LD     += -m elf$(SZ)ppc
-override CC     += -m$(SZ)
-override AR     := GNUTARGET=elf$(SZ)-powerpc $(AR)
+override AS     += -a$(CONFIG_WORD_SIZE)
+override LD     += -m elf$(CONFIG_WORD_SIZE)ppc
+override CC     += -m$(CONFIG_WORD_SIZE)
+override AR     := GNUTARGET=elf$(CONFIG_WORD_SIZE)-powerpc $(AR)
 endif
 
 LDFLAGS_vmlinux := -Bstatic
 
-# The -Iarch/$(ARCH)/include is temporary while we are merging
-CPPFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH) -Iarch/$(ARCH)/include
+CPPFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH)
 AFLAGS-$(CONFIG_PPC32)  := -Iarch/$(ARCH)
 CFLAGS-$(CONFIG_PPC64)  := -mminimal-toc -mtraceback=none  -mcall-aixdesc
 CFLAGS-$(CONFIG_PPC32)  := -Iarch/$(ARCH) -ffixed-r2 -mmultiple
@@ -72,11 +79,8 @@ CPPFLAGS	+= $(CPPFLAGS-y)
 AFLAGS          += $(AFLAGS-y)
 CFLAGS          += -msoft-float -pipe $(CFLAGS-y)
 CPP             = $(CC) -E $(CFLAGS)
-# Temporary hack until we have migrated to asm-powerpc
-LINUXINCLUDE-$(CONFIG_PPC32)    := -Iarch/$(ARCH)/include
-LINUXINCLUDE    += $(LINUXINCLUDE-y)
 
-CHECKFLAGS      += -m$(SZ) -D__powerpc__ -D__powerpc$(SZ)__
+CHECKFLAGS      += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__
 
 ifeq ($(CONFIG_PPC64),y)
 GCC_BROKEN_VEC  := $(shell if [ $(call cc-version) -lt 0400 ] ; then echo "y"; fi)
@@ -96,6 +100,10 @@ else
 endif
 endif
 
+ifeq ($(CONFIG_TUNE_CELL),y)
+        CFLAGS += $(call cc-option,-mtune=cell)
+endif
+
 # No AltiVec instruction when building kernel
 CFLAGS += $(call cc-option,-mno-altivec)
 
@@ -120,10 +128,9 @@ cpu-as-$(CONFIG_E200)		+= -Wa,-me200
 AFLAGS += $(cpu-as-y)
 CFLAGS += $(cpu-as-y)
 
-head-y                          := arch/powerpc/kernel/head_32.o
-head-$(CONFIG_PPC64)            := arch/powerpc/kernel/head_64.o
+head-y                          := arch/powerpc/kernel/head_$(CONFIG_WORD_SIZE).o
 head-$(CONFIG_8xx)              := arch/powerpc/kernel/head_8xx.o
-head-$(CONFIG_4xx)              := arch/powerpc/kernel/head_4xx.o
+head-$(CONFIG_40x)              := arch/powerpc/kernel/head_40x.o
 head-$(CONFIG_44x)              := arch/powerpc/kernel/head_44x.o
 head-$(CONFIG_FSL_BOOKE)        := arch/powerpc/kernel/head_fsl_booke.o
 
@@ -166,25 +173,20 @@ define archhelp
   @echo '  *_defconfig     - Select default config from arch/$(ARCH)/configs'
 endef
 
-install:
+install: vdso_install
         $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
 
+vdso_install:
+ifeq ($(CONFIG_PPC64),y)
+        $(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso64 $@
+endif
+        $(Q)$(MAKE) $(build)=arch/$(ARCH)/kernel/vdso32 $@
+
 archclean:
         $(Q)$(MAKE) $(clean)=$(boot)
 
-archmrproper:
-        $(Q)rm -rf arch/$(ARCH)/include
-
 archprepare: checkbin
 
-ifeq ($(CONFIG_PPC32),y)
-# Temporary hack until we have migrated to asm-powerpc
-include/asm: arch/$(ARCH)/include/asm
-arch/$(ARCH)/include/asm: FORCE
-        $(Q)if [ ! -d arch/$(ARCH)/include ]; then mkdir -p arch/$(ARCH)/include; fi
-        $(Q)ln -fsn $(srctree)/include/asm-$(OLDARCH) arch/$(ARCH)/include/asm
-endif
-
 # Use the file '.tmp_gas_check' for binutils tests, as gas won't output
 # to stdout and these checks are run even on install targets.
 TOUT    := .tmp_gas_check
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index eec7af7e5993..2c187ca05982 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -18,14 +18,14 @@ kernel-vmlinux.strip.c
 kernel-vmlinux.strip.gz
 mktree
 uImage
-cuImage
-cuImage.bin.gz
-cuImage.elf
+cuImage.*
 zImage
+zImage.bin.*
 zImage.chrp
 zImage.coff
 zImage.coff.lds
-zImage.lds
+zImage.ep*
+zImage.*lds
 zImage.miboot
 zImage.pmac
 zImage.pseries
diff --git a/arch/powerpc/boot/44x.c b/arch/powerpc/boot/44x.c
deleted file mode 100644
index 9f64e840bef6..000000000000
--- a/arch/powerpc/boot/44x.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Copyright 2007 David Gibson, IBM Corporation.
- *
- * Based on earlier code:
- *   Matt Porter <mporter@kernel.crashing.org>
- *   Copyright 2002-2005 MontaVista Software Inc.
- *
- *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- *   Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <stddef.h>
-#include "types.h"
-#include "string.h"
-#include "stdio.h"
-#include "ops.h"
-#include "reg.h"
-#include "dcr.h"
-
-/* Read the 44x memory controller to get size of system memory. */
-void ibm44x_fixup_memsize(void)
-{
-        int i;
-        unsigned long memsize, bank_config;
-
-        memsize = 0;
-        for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
-                mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
-                bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
-
-                if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
-                        memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
-        }
-
-        dt_fixup_memory(0, memsize);
-}
-
-#define SPRN_DBCR0              0x134
-#define   DBCR0_RST_SYSTEM      0x30000000
-
-void ibm44x_dbcr_reset(void)
-{
-        unsigned long tmp;
-
-        asm volatile (
-                "mfspr  %0,%1\n"
-                "oris   %0,%0,%2@h\n"
-                "mtspr  %1,%0"
-                : "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
-                );
-
-}
-
-/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
- * banks into the OPB address space */
-void ibm4xx_fixup_ebc_ranges(const char *ebc)
-{
-        void *devp;
-        u32 bxcr;
-        u32 ranges[EBC_NUM_BANKS*4];
-        u32 *p = ranges;
-        int i;
-
-        for (i = 0; i < EBC_NUM_BANKS; i++) {
-                mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i));
-                bxcr = mfdcr(DCRN_EBC0_CFGDATA);
-
-                if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) {
-                        *p++ = i;
-                        *p++ = 0;
-                        *p++ = bxcr & EBC_BXCR_BAS;
-                        *p++ = EBC_BXCR_BANK_SIZE(bxcr);
-                }
-        }
-
-        devp = finddevice(ebc);
-        if (! devp)
-                fatal("Couldn't locate EBC node %s\n\r", ebc);
-
-        setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
-}
diff --git a/arch/powerpc/boot/44x.h b/arch/powerpc/boot/44x.h
index 577982c9a3cd..02563443788a 100644
--- a/arch/powerpc/boot/44x.h
+++ b/arch/powerpc/boot/44x.h
@@ -10,10 +10,7 @@
 #ifndef _PPC_BOOT_44X_H_
 #define _PPC_BOOT_44X_H_
 
-void ibm44x_fixup_memsize(void);
-void ibm4xx_fixup_ebc_ranges(const char *ebc);
-
-void ibm44x_dbcr_reset(void);
 void ebony_init(void *mac0, void *mac1);
+void bamboo_init(void *mac0, void *mac1);
 
 #endif /* _PPC_BOOT_44X_H_ */
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
new file mode 100644
index 000000000000..ebf9e217612d
--- /dev/null
+++ b/arch/powerpc/boot/4xx.c
@@ -0,0 +1,300 @@
+/*
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * Based on earlier code:
+ *   Matt Porter <mporter@kernel.crashing.org>
+ *   Copyright 2002-2005 MontaVista Software Inc.
+ *
+ *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ *   Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stddef.h>
+#include "types.h"
+#include "string.h"
+#include "stdio.h"
+#include "ops.h"
+#include "reg.h"
+#include "dcr.h"
+
+/* Read the 4xx SDRAM controller to get size of system memory. */
+void ibm4xx_fixup_memsize(void)
+{
+        int i;
+        unsigned long memsize, bank_config;
+
+        memsize = 0;
+        for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
+                mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
+                bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
+
+                if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
+                        memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
+        }
+
+        dt_fixup_memory(0, memsize);
+}
+
+/* 4xx DDR1/2 Denali memory controller support */
+/* DDR0 registers */
+#define DDR0_02                 2
+#define DDR0_08                 8
+#define DDR0_10                 10
+#define DDR0_14                 14
+#define DDR0_42                 42
+#define DDR0_43                 43
+
+/* DDR0_02 */
+#define DDR_START               0x1
+#define DDR_START_SHIFT         0
+#define DDR_MAX_CS_REG          0x3
+#define DDR_MAX_CS_REG_SHIFT    24
+#define DDR_MAX_COL_REG         0xf
+#define DDR_MAX_COL_REG_SHIFT   16
+#define DDR_MAX_ROW_REG         0xf
+#define DDR_MAX_ROW_REG_SHIFT   8
+/* DDR0_08 */
+#define DDR_DDR2_MODE           0x1
+#define DDR_DDR2_MODE_SHIFT     0
+/* DDR0_10 */
+#define DDR_CS_MAP              0x3
+#define DDR_CS_MAP_SHIFT        8
+/* DDR0_14 */
+#define DDR_REDUC               0x1
+#define DDR_REDUC_SHIFT         16
+/* DDR0_42 */
+#define DDR_APIN                0x7
+#define DDR_APIN_SHIFT          24
+/* DDR0_43 */
+#define DDR_COL_SZ              0x7
+#define DDR_COL_SZ_SHIFT        8
+#define DDR_BANK8               0x1
+#define DDR_BANK8_SHIFT         0
+
+#define DDR_GET_VAL(val, mask, shift)   (((val) >> (shift)) & (mask))
+
+static inline u32 mfdcr_sdram0(u32 reg)
+{
+        mtdcr(DCRN_SDRAM0_CFGADDR, reg);
+        return mfdcr(DCRN_SDRAM0_CFGDATA);
+}
+
+void ibm4xx_denali_fixup_memsize(void)
+{
+        u32 val, max_cs, max_col, max_row;
+        u32 cs, col, row, bank, dpath;
+        unsigned long memsize;
+
+        val = mfdcr_sdram0(DDR0_02);
+        if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
+                fatal("DDR controller is not initialized\n");
+
+        /* get maximum cs col and row values */
+        max_cs  = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);
+        max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);
+        max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
+
+        /* get CS value */
+        val = mfdcr_sdram0(DDR0_10);
+
+        val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
+        cs = 0;
+        while (val) {
+                if (val && 0x1)
+                        cs++;
+                val = val >> 1;
+        }
+
+        if (!cs)
+                fatal("No memory installed\n");
+        if (cs > max_cs)
+                fatal("DDR wrong CS configuration\n");
+
+        /* get data path bytes */
+        val = mfdcr_sdram0(DDR0_14);
+
+        if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
+                dpath = 8; /* 64 bits */
+        else
+                dpath = 4; /* 32 bits */
+
+        /* get adress pins (rows) */
+        val = mfdcr_sdram0(DDR0_42);
+
+        row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
+        if (row > max_row)
+                fatal("DDR wrong APIN configuration\n");
+        row = max_row - row;
+
+        /* get collomn size and banks */
+        val = mfdcr_sdram0(DDR0_43);
+
+        col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
+        if (col > max_col)
+                fatal("DDR wrong COL configuration\n");
+        col = max_col - col;
+
+        if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT))
+                bank = 8; /* 8 banks */
+        else
+                bank = 4; /* 4 banks */
+
+        memsize = cs * (1 << (col+row)) * bank * dpath;
+        dt_fixup_memory(0, memsize);
+}
+
+#define SPRN_DBCR0_40X 0x3F2
+#define SPRN_DBCR0_44X 0x134
+#define DBCR0_RST_SYSTEM 0x30000000
+
+void ibm44x_dbcr_reset(void)
+{
+        unsigned long tmp;
+
+        asm volatile (
+                "mfspr  %0,%1\n"
+                "oris   %0,%0,%2@h\n"
+                "mtspr  %1,%0"
+                : "=&r"(tmp) : "i"(SPRN_DBCR0_44X), "i"(DBCR0_RST_SYSTEM)
+                );
+
+}
+
+void ibm40x_dbcr_reset(void)
+{
+        unsigned long tmp;
+
+        asm volatile (
+                "mfspr  %0,%1\n"
+                "oris   %0,%0,%2@h\n"
+                "mtspr  %1,%0"
+                : "=&r"(tmp) : "i"(SPRN_DBCR0_40X), "i"(DBCR0_RST_SYSTEM)
+                );
+}
+
+#define EMAC_RESET 0x20000000
+void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
+{
+        /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */
+        if (emac0)
+                *emac0 = EMAC_RESET;
+        if (emac1)
+                *emac1 = EMAC_RESET;
+
+        mtdcr(DCRN_MAL0_CFG, MAL_RESET);
+}
+
+/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
+ * banks into the OPB address space */
+void ibm4xx_fixup_ebc_ranges(const char *ebc)
+{
+        void *devp;
+        u32 bxcr;
+        u32 ranges[EBC_NUM_BANKS*4];
+        u32 *p = ranges;
+        int i;
+
+        for (i = 0; i < EBC_NUM_BANKS; i++) {
+                mtdcr(DCRN_EBC0_CFGADDR, EBC_BXCR(i));
+                bxcr = mfdcr(DCRN_EBC0_CFGDATA);
+
+                if ((bxcr & EBC_BXCR_BU) != EBC_BXCR_BU_OFF) {
+                        *p++ = i;
+                        *p++ = 0;
+                        *p++ = bxcr & EBC_BXCR_BAS;
+                        *p++ = EBC_BXCR_BANK_SIZE(bxcr);
+                }
+        }
+
+        devp = finddevice(ebc);
+        if (! devp)
+                fatal("Couldn't locate EBC node %s\n\r", ebc);
+
+        setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
+}
+
+#define SPRN_CCR1 0x378
+void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
+{
+        u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
+        u32 reg;
+        u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
+
+        mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
+        reg = mfdcr(DCRN_CPR0_DATA);
+        tmp = (reg & 0x000F0000) >> 16;
+        fwdva = tmp ? tmp : 16;
+        tmp = (reg & 0x00000700) >> 8;
+        fwdvb = tmp ? tmp : 8;
+        tmp = (reg & 0x1F000000) >> 24;
+        fbdv = tmp ? tmp : 32;
+        lfbdv = (reg & 0x0000007F);
+
+        mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
+        reg = mfdcr(DCRN_CPR0_DATA);
+        tmp = (reg & 0x03000000) >> 24;
+        opbdv0 = tmp ? tmp : 4;
+
+        mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
+        reg = mfdcr(DCRN_CPR0_DATA);
+        tmp = (reg & 0x07000000) >> 24;
+        perdv0 = tmp ? tmp : 8;
+
+        mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
+        reg = mfdcr(DCRN_CPR0_DATA);
+        tmp = (reg & 0x07000000) >> 24;
+        prbdv0 = tmp ? tmp : 8;
+
+        mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
+        reg = mfdcr(DCRN_CPR0_DATA);
+        tmp = (reg & 0x03000000) >> 24;
+        spcid0 = tmp ? tmp : 4;
+
+        /* Calculate M */
+        mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
+        reg = mfdcr(DCRN_CPR0_DATA);
+        tmp = (reg & 0x03000000) >> 24;
+        if (tmp == 0) { /* PLL output */
+                tmp = (reg & 0x20000000) >> 29;
+                if (!tmp) /* PLLOUTA */
+                        m = fbdv * lfbdv * fwdva;
+                else
+                        m = fbdv * lfbdv * fwdvb;
+        }
+        else if (tmp == 1) /* CPU output */
+                m = fbdv * fwdva;
+        else
+                m = perdv0 * opbdv0 * fwdvb;
+
+        vco = (m * sysclk) + (m >> 1);
+        cpu = vco / fwdva;
+        plb = vco / fwdvb / prbdv0;
+        opb = plb / opbdv0;
+        ebc = plb / perdv0;
+
+        /* FIXME */
+        uart0 = ser_clk;
+
+        /* Figure out timebase.  Either CPU or default TmrClk */
+        asm volatile (
+                        "mfspr  %0,%1\n"
+                        :
+                        "=&r"(reg) : "i"(SPRN_CCR1));
+        if (reg & 0x0080)
+                tb = 25000000; /* TmrClk is 25MHz */
+        else
+                tb = cpu;
+
+        dt_fixup_cpu_clocks(cpu, tb, 0);
+        dt_fixup_clock("/plb", plb);
+        dt_fixup_clock("/plb/opb", opb);
+        dt_fixup_clock("/plb/opb/ebc", ebc);
+        dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
+        dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
+        dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
+        dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
+}
diff --git a/arch/powerpc/boot/4xx.h b/arch/powerpc/boot/4xx.h
new file mode 100644
index 000000000000..adba6a599a93
--- /dev/null
+++ b/arch/powerpc/boot/4xx.h
@@ -0,0 +1,22 @@
+/*
+ * PowerPC 4xx related functions
+ *
+ * Copyright 2007 IBM Corporation.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef _POWERPC_BOOT_4XX_H_
+#define _POWERPC_BOOT_4XX_H_
+
+void ibm4xx_fixup_memsize(void);
+void ibm4xx_denali_fixup_memsize(void);
+void ibm44x_dbcr_reset(void);
+void ibm40x_dbcr_reset(void);
+void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
+void ibm4xx_fixup_ebc_ranges(const char *ebc);
+void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk);
+
+#endif /* _POWERPC_BOOT_4XX_H_ */
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 61a6f34ca5ed..a6bba9a69e66 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -31,7 +31,7 @@ endif
 
 BOOTCFLAGS      += -I$(obj) -I$(srctree)/$(obj)
 
-$(obj)/44x.o: BOOTCFLAGS += -mcpu=440
+$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440
 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=440
 
 zlib       := inffast.c inflate.c inftrees.c
@@ -44,10 +44,12 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
 src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
                 ns16550.c serial.c simple_alloc.c div64.S util.S \
                 gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
-                44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c
-src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
+                4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
+                cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c
+src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
                 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
-                ps3-head.S ps3-hvcall.S ps3.c
+                ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
+                cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -139,9 +141,15 @@ image-$(CONFIG_PPC_ISERIES)		+= zImage.iseries
 image-$(CONFIG_DEFAULT_UIMAGE)          += uImage
 
 ifneq ($(CONFIG_DEVICE_TREE),"")
+image-$(CONFIG_PPC_8xx)                 += cuImage.8xx
+image-$(CONFIG_8260)                    += cuImage.pq2
+image-$(CONFIG_PPC_MPC52xx)             += cuImage.52xx
 image-$(CONFIG_PPC_83xx)                += cuImage.83xx
 image-$(CONFIG_PPC_85xx)                += cuImage.85xx
 image-$(CONFIG_EBONY)                   += treeImage.ebony cuImage.ebony
+image-$(CONFIG_BAMBOO)                  += treeImage.bamboo cuImage.bamboo
+image-$(CONFIG_SEQUOIA)                 += cuImage.sequoia
+image-$(CONFIG_WALNUT)                  += treeImage.walnut
 endif
 
 # For 32-bit powermacs, build the COFF and miboot images
diff --git a/arch/powerpc/boot/bamboo.c b/arch/powerpc/boot/bamboo.c
new file mode 100644
index 000000000000..f61fcdab1c7c
--- /dev/null
+++ b/arch/powerpc/boot/bamboo.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright IBM Corporation, 2007
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Based on ebony wrapper:
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * Clocking code based on code by:
+ * Stefan Roese <sr@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the License
+ */
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+
+static u8 *bamboo_mac0, *bamboo_mac1;
+
+static void bamboo_fixups(void)
+{
+        unsigned long sysclk = 33333333;
+
+        ibm440ep_fixup_clocks(sysclk, 11059200);
+        ibm4xx_fixup_memsize();
+        ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
+        dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
+}
+
+void bamboo_init(void *mac0, void *mac1)
+{
+        platform_ops.fixups = bamboo_fixups;
+        platform_ops.exit = ibm44x_dbcr_reset;
+        bamboo_mac0 = mac0;
+        bamboo_mac1 = mac1;
+        ft_init(_dtb_start, 0, 32);
+        serial_console_init();
+}
diff --git a/arch/powerpc/boot/cpm-serial.c b/arch/powerpc/boot/cpm-serial.c
new file mode 100644
index 000000000000..fcb8b5e956bd
--- /dev/null
+++ b/arch/powerpc/boot/cpm-serial.c
@@ -0,0 +1,249 @@
+/*
+ * CPM serial console support.
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * It is assumed that the firmware (or the platform file) has already set
+ * up the port.
+ */
+
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+struct cpm_scc {
+        u32 gsmrl;
+        u32 gsmrh;
+        u16 psmr;
+        u8 res1[2];
+        u16 todr;
+        u16 dsr;
+        u16 scce;
+        u8 res2[2];
+        u16 sccm;
+        u8 res3;
+        u8 sccs;
+        u8 res4[8];
+};
+
+struct cpm_smc {
+        u8 res1[2];
+        u16 smcmr;
+        u8 res2[2];
+        u8 smce;
+        u8 res3[3];
+        u8 smcm;
+        u8 res4[5];
+};
+
+struct cpm_param {
+        u16 rbase;
+        u16 tbase;
+        u8 rfcr;
+        u8 tfcr;
+};
+
+struct cpm_bd {
+        u16 sc;   /* Status and Control */
+        u16 len;  /* Data length in buffer */
+        u8 *addr; /* Buffer address in host memory */
+};
+
+static void *cpcr;
+static struct cpm_param *param;
+static struct cpm_smc *smc;
+static struct cpm_scc *scc;
+struct cpm_bd *tbdf, *rbdf;
+static u32 cpm_cmd;
+static u8 *dpram_start;
+
+static void (*do_cmd)(int op);
+static void (*enable_port)(void);
+static void (*disable_port)(void);
+
+#define CPM_CMD_STOP_TX     4
+#define CPM_CMD_RESTART_TX  6
+#define CPM_CMD_INIT_RX_TX  0
+
+static void cpm1_cmd(int op)
+{
+        while (in_be16(cpcr) & 1)
+                ;
+
+        out_be16(cpcr, (op << 8) | cpm_cmd | 1);
+
+        while (in_be16(cpcr) & 1)
+                ;
+}
+
+static void cpm2_cmd(int op)
+{
+        while (in_be32(cpcr) & 0x10000)
+                ;
+
+        out_be32(cpcr, op | cpm_cmd | 0x10000);
+
+        while (in_be32(cpcr) & 0x10000)
+                ;
+}
+
+static void smc_disable_port(void)
+{
+        do_cmd(CPM_CMD_STOP_TX);
+        out_be16(&smc->smcmr, in_be16(&smc->smcmr) & ~3);
+}
+
+static void scc_disable_port(void)
+{
+        do_cmd(CPM_CMD_STOP_TX);
+        out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x30);
+}
+
+static void smc_enable_port(void)
+{
+        out_be16(&smc->smcmr, in_be16(&smc->smcmr) | 3);
+        do_cmd(CPM_CMD_RESTART_TX);
+}
+
+static void scc_enable_port(void)
+{
+        out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) | 0x30);
+        do_cmd(CPM_CMD_RESTART_TX);
+}
+
+static int cpm_serial_open(void)
+{
+        int dpaddr = 0x800;
+        disable_port();
+
+        out_8(&param->rfcr, 0x10);
+        out_8(&param->tfcr, 0x10);
+
+        rbdf = (struct cpm_bd *)(dpram_start + dpaddr);
+        rbdf->addr = (u8 *)(rbdf + 2);
+        rbdf->sc = 0xa000;
+        rbdf->len = 1;
+
+        tbdf = rbdf + 1;
+        tbdf->addr = (u8 *)(rbdf + 2) + 1;
+        tbdf->sc = 0x2000;
+        tbdf->len = 1;
+
+        sync();
+        out_be16(&param->rbase, dpaddr);
+        out_be16(&param->tbase, dpaddr + sizeof(struct cpm_bd));
+
+        do_cmd(CPM_CMD_INIT_RX_TX);
+
+        enable_port();
+        return 0;
+}
+
+static void cpm_serial_putc(unsigned char c)
+{
+        while (tbdf->sc & 0x8000)
+                barrier();
+
+        sync();
+
+        tbdf->addr[0] = c;
+        eieio();
+        tbdf->sc |= 0x8000;
+}
+
+static unsigned char cpm_serial_tstc(void)
+{
+        barrier();
+        return !(rbdf->sc & 0x8000);
+}
+
+static unsigned char cpm_serial_getc(void)
+{
+        unsigned char c;
+
+        while (!cpm_serial_tstc())
+                ;
+
+        sync();
+        c = rbdf->addr[0];
+        eieio();
+        rbdf->sc |= 0x8000;
+
+        return c;
+}
+
+int cpm_console_init(void *devp, struct serial_console_data *scdp)
+{
+        void *reg_virt[2];
+        int is_smc = 0, is_cpm2 = 0, n;
+        unsigned long reg_phys;
+        void *parent;
+
+        if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) {
+                is_smc = 1;
+        } else if (dt_is_compatible(devp, "fsl,cpm2-scc-uart")) {
+                is_cpm2 = 1;
+        } else if (dt_is_compatible(devp, "fsl,cpm2-smc-uart")) {
+                is_cpm2 = 1;
+                is_smc = 1;
+        }
+
+        if (is_smc) {
+                enable_port = smc_enable_port;
+                disable_port = smc_disable_port;
+        } else {
+                enable_port = scc_enable_port;
+                disable_port = scc_disable_port;
+        }
+
+        if (is_cpm2)
+                do_cmd = cpm2_cmd;
+        else
+                do_cmd = cpm1_cmd;
+
+        n = getprop(devp, "fsl,cpm-command", &cpm_cmd, 4);
+        if (n < 4)
+                return -1;
+
+        n = getprop(devp, "virtual-reg", reg_virt, sizeof(reg_virt));
+        if (n < (int)sizeof(reg_virt)) {
+                for (n = 0; n < 2; n++) {
+                        if (!dt_xlate_reg(devp, n, &reg_phys, NULL))
+                                return -1;
+
+                        reg_virt[n] = (void *)reg_phys;
+                }
+        }
+
+        if (is_smc)
+                smc = reg_virt[0];
+        else
+                scc = reg_virt[0];
+
+        param = reg_virt[1];
+
+        parent = get_parent(devp);
+        if (!parent)
+                return -1;
+
+        n = getprop(parent, "virtual-reg", reg_virt, sizeof(reg_virt));
+        if (n < (int)sizeof(reg_virt)) {
+                for (n = 0; n < 2; n++) {
+                        if (!dt_xlate_reg(parent, n, &reg_phys, NULL))
+                                return -1;
+
+                        reg_virt[n] = (void *)reg_phys;
+                }
+        }
+
+        cpcr = reg_virt[0];
+        dpram_start = reg_virt[1];
+
+        scdp->open = cpm_serial_open;
+        scdp->putc = cpm_serial_putc;
+        scdp->getc = cpm_serial_getc;
+        scdp->tstc = cpm_serial_tstc;
+
+        return 0;
+}
diff --git a/arch/powerpc/boot/cuboot-52xx.c b/arch/powerpc/boot/cuboot-52xx.c
new file mode 100644
index 000000000000..9256a26d40e4
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-52xx.c
@@ -0,0 +1,59 @@
+/*
+ * Old U-boot compatibility for MPC5200
+ *
+ * Author: Grant Likely <grant.likely@secretlab.ca>
+ *
+ * Copyright (c) 2007 Secret Lab Technologies Ltd.
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "io.h"
+#include "cuboot.h"
+
+#define TARGET_PPC_MPC52xx
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void platform_fixups(void)
+{
+        void *soc, *reg;
+        int div;
+        u32 sysfreq;
+
+
+        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+        dt_fixup_mac_addresses(bd.bi_enetaddr);
+        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+        /* Unfortunately, the specific model number is encoded in the
+         * soc node name in existing dts files -- once that is fixed,
+         * this can do a simple path lookup.
+         */
+        soc = find_node_by_devtype(NULL, "soc");
+        if (soc) {
+                setprop(soc, "bus-frequency", &bd.bi_ipbfreq,
+                        sizeof(bd.bi_ipbfreq));
+
+                if (!dt_xlate_reg(soc, 0, (void*)&reg, NULL))
+                        return;
+                div = in_8(reg + 0x204) & 0x0020 ? 8 : 4;
+                sysfreq = bd.bi_busfreq * div;
+                setprop(soc, "system-frequency", &sysfreq, sizeof(sysfreq));
+        }
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/boot/cuboot-83xx.c b/arch/powerpc/boot/cuboot-83xx.c
index 296025d8b295..a0505509abcc 100644
--- a/arch/powerpc/boot/cuboot-83xx.c
+++ b/arch/powerpc/boot/cuboot-83xx.c
@@ -18,7 +18,6 @@
 #include "ppcboot.h"
 
 static bd_t bd;
-extern char _dtb_start[], _dtb_end[];
 
 static void platform_fixups(void)
 {
diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c
index 10f0f697c935..345dcbecef0f 100644
--- a/arch/powerpc/boot/cuboot-85xx.c
+++ b/arch/powerpc/boot/cuboot-85xx.c
@@ -18,7 +18,6 @@
 #include "ppcboot.h"
 
 static bd_t bd;
-extern char _dtb_start[], _dtb_end[];
 
 static void platform_fixups(void)
 {
diff --git a/arch/powerpc/boot/cuboot-8xx.c b/arch/powerpc/boot/cuboot-8xx.c
new file mode 100644
index 000000000000..88ed84015a8b
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-8xx.c
@@ -0,0 +1,45 @@
+/*
+ * Old U-boot compatibility for 8xx
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#define TARGET_8xx
+#define TARGET_HAS_ETH1
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void platform_fixups(void)
+{
+        void *node;
+
+        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+        dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
+
+        node = finddevice("/soc/cpm");
+        if (node) {
+                setprop(node, "clock-frequency", &bd.bi_busfreq, 4);
+                setprop(node, "fsl,brg-frequency", &bd.bi_busfreq, 4);
+        }
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/boot/cuboot-bamboo.c b/arch/powerpc/boot/cuboot-bamboo.c
new file mode 100644
index 000000000000..900c7ff2b7e9
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-bamboo.c
@@ -0,0 +1,30 @@
+/*
+ * Old U-boot compatibility for Bamboo
+ *
+ * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Copyright 2007 IBM Corporation
+ *
+ * Based on cuboot-ebony.c
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        bamboo_init(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
diff --git a/arch/powerpc/boot/cuboot-pq2.c b/arch/powerpc/boot/cuboot-pq2.c
new file mode 100644
index 000000000000..8021fd4a43bc
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-pq2.c
@@ -0,0 +1,283 @@
+/*
+ * Old U-boot compatibility for PowerQUICC II
+ * (a.k.a. 82xx with CPM, not the 8240 family of chips)
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+#include "io.h"
+
+#define TARGET_CPM2
+#define TARGET_HAS_ETH1
+#include "ppcboot.h"
+
+static bd_t bd;
+
+struct cs_range {
+        u32 csnum;
+        u32 base; /* must be zero */
+        u32 addr;
+        u32 size;
+};
+
+struct pci_range {
+        u32 flags;
+        u32 pci_addr[2];
+        u32 phys_addr;
+        u32 size[2];
+};
+
+struct cs_range cs_ranges_buf[MAX_PROP_LEN / sizeof(struct cs_range)];
+struct pci_range pci_ranges_buf[MAX_PROP_LEN / sizeof(struct pci_range)];
+
+/* Different versions of u-boot put the BCSR in different places, and
+ * some don't set up the PCI PIC at all, so we assume the device tree is
+ * sane and update the BRx registers appropriately.
+ *
+ * For any node defined as compatible with fsl,pq2-chipselect,
+ * #address/#size must be 2/1 for chipselect bus, 1/1 for parent bus,
+ * and ranges must be for whole chip selects.
+ */
+static void update_cs_ranges(void)
+{
+        u32 ctrl_ph;
+        void *ctrl_node, *bus_node, *parent_node;
+        u32 *ctrl_addr;
+        unsigned long ctrl_size;
+        u32 naddr, nsize;
+        int len;
+        int i;
+
+        bus_node = finddevice("/chipselect");
+        if (!bus_node || !dt_is_compatible(bus_node, "fsl,pq2-chipselect"))
+                return;
+
+        dt_get_reg_format(bus_node, &naddr, &nsize);
+        if (naddr != 2 || nsize != 1)
+                goto err;
+
+        parent_node = get_parent(bus_node);
+        if (!parent_node)
+                goto err;
+
+        dt_get_reg_format(parent_node, &naddr, &nsize);
+        if (naddr != 1 || nsize != 1)
+                goto err;
+
+        len = getprop(bus_node, "fsl,ctrl", &ctrl_ph, 4);
+        if (len != 4)
+                goto err;
+
+        ctrl_node = find_node_by_prop_value(NULL, "linux,phandle",
+                                            (char *)&ctrl_ph, 4);
+        if (!ctrl_node)
+                goto err;
+
+        if (!dt_is_compatible(ctrl_node, "fsl,pq2-chipselect-ctrl"))
+                goto err;
+
+        if (!dt_xlate_reg(ctrl_node, 0, (unsigned long *)&ctrl_addr,
+                          &ctrl_size))
+                goto err;
+
+        len = getprop(bus_node, "ranges", cs_ranges_buf, sizeof(cs_ranges_buf));
+
+        for (i = 0; i < len / sizeof(struct cs_range); i++) {
+                u32 base, option;
+                int cs = cs_ranges_buf[i].csnum;
+                if (cs >= ctrl_size / 8)
+                        goto err;
+
+                if (cs_ranges_buf[i].base != 0)
+                        goto err;
+
+                base = in_be32(&ctrl_addr[cs * 2]);
+
+                /* If CS is already valid, use the existing flags.
+                 * Otherwise, guess a sane default.
+                 */
+                if (base & 1) {
+                        base &= 0x7fff;
+                        option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff;
+                } else {
+                        base = 0x1801;
+                        option = 0x10;
+                }
+
+                out_be32(&ctrl_addr[cs * 2], 0);
+                out_be32(&ctrl_addr[cs * 2 + 1],
+                         option | ~(cs_ranges_buf[i].size - 1));
+                out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr);
+        }
+
+        return;
+
+err:
+        printf("Bad /chipselect or fsl,pq2-chipselect-ctrl node\r\n");
+}
+
+/* Older u-boots don't set PCI up properly.  Update the hardware to match
+ * the device tree.  The prefetch mem region and non-prefetch mem region
+ * must be contiguous in the host bus.  As required by the PCI binding,
+ * PCI #addr/#size must be 3/2.  The parent bus must be 1/1.  Only
+ * 32-bit PCI is supported.  All three region types (prefetchable mem,
+ * non-prefetchable mem, and I/O) must be present.
+ */
+static void fixup_pci(void)
+{
+        struct pci_range *mem = NULL, *mmio = NULL,
+                         *io = NULL, *mem_base = NULL;
+        u32 *pci_regs[3];
+        u8 *soc_regs;
+        int i, len;
+        void *ctrl_node, *bus_node, *parent_node, *soc_node;
+        u32 naddr, nsize, bus_ph, mem_log2;
+
+        ctrl_node = finddevice("/soc/pci");
+        if (!ctrl_node || !dt_is_compatible(ctrl_node, "fsl,pq2-pci"))
+                return;
+
+        soc_node = finddevice("/soc");
+        if (!soc_node || !dt_is_compatible(soc_node, "fsl,pq2-soc"))
+                goto err;
+
+        for (i = 0; i < 3; i++)
+                if (!dt_xlate_reg(ctrl_node, i,
+                                  (unsigned long *)&pci_regs[i], NULL))
+                        goto err;
+
+        if (!dt_xlate_reg(soc_node, 0, (unsigned long *)&soc_regs, NULL))
+                goto err;
+
+        len = getprop(ctrl_node, "fsl,bus", &bus_ph, 4);
+        if (len != 4)
+                goto err;
+
+        bus_node = find_node_by_prop_value(NULL, "linux,phandle",
+                                           (char *)&bus_ph, 4);
+        if (!bus_node)
+                goto err;
+
+        dt_get_reg_format(bus_node, &naddr, &nsize);
+        if (naddr != 3 || nsize != 2)
+                goto err;
+
+        parent_node = get_parent(bus_node);
+        if (!parent_node)
+                goto err;
+
+        dt_get_reg_format(parent_node, &naddr, &nsize);
+        if (naddr != 1 || nsize != 1)
+                goto err;
+
+        len = getprop(bus_node, "ranges", pci_ranges_buf,
+                      sizeof(pci_ranges_buf));
+
+        for (i = 0; i < len / sizeof(struct pci_range); i++) {
+                u32 flags = pci_ranges_buf[i].flags & 0x43000000;
+
+                if (flags == 0x42000000)
+                        mem = &pci_ranges_buf[i];
+                else if (flags == 0x02000000)
+                        mmio = &pci_ranges_buf[i];
+                else if (flags == 0x01000000)
+                        io = &pci_ranges_buf[i];
+        }
+
+        if (!mem || !mmio || !io)
+                goto err;
+
+        if (mem->phys_addr + mem->size[1] == mmio->phys_addr)
+                mem_base = mem;
+        else if (mmio->phys_addr + mmio->size[1] == mem->phys_addr)
+                mem_base = mmio;
+        else
+                goto err;
+
+        out_be32(&pci_regs[1][0], mem_base->phys_addr | 1);
+        out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1));
+
+        out_be32(&pci_regs[1][1], io->phys_addr | 1);
+        out_be32(&pci_regs[2][1], ~(io->size[1] - 1));
+
+        out_le32(&pci_regs[0][0], mem->pci_addr[1] >> 12);
+        out_le32(&pci_regs[0][2], mem->phys_addr >> 12);
+        out_le32(&pci_regs[0][4], (~(mem->size[1] - 1) >> 12) | 0xa0000000);
+
+        out_le32(&pci_regs[0][6], mmio->pci_addr[1] >> 12);
+        out_le32(&pci_regs[0][8], mmio->phys_addr >> 12);
+        out_le32(&pci_regs[0][10], (~(mmio->size[1] - 1) >> 12) | 0x80000000);
+
+        out_le32(&pci_regs[0][12], io->pci_addr[1] >> 12);
+        out_le32(&pci_regs[0][14], io->phys_addr >> 12);
+        out_le32(&pci_regs[0][16], (~(io->size[1] - 1) >> 12) | 0xc0000000);
+
+        /* Inbound translation */
+        out_le32(&pci_regs[0][58], 0);
+        out_le32(&pci_regs[0][60], 0);
+
+        mem_log2 = 1 << (__ilog2_u32(bd.bi_memsize - 1) + 1);
+        out_le32(&pci_regs[0][62], 0xa0000000 | ~((1 << (mem_log2 - 12)) - 1));
+
+        /* If PCI is disabled, drive RST high to enable. */
+        if (!(in_le32(&pci_regs[0][32]) & 1)) {
+                 /* Tpvrh (Power valid to RST# high) 100 ms */
+                udelay(100000);
+
+                out_le32(&pci_regs[0][32], 1);
+
+                /* Trhfa (RST# high to first cfg access) 2^25 clocks */
+                udelay(1020000);
+        }
+
+        /* Enable bus master and memory access */
+        out_le32(&pci_regs[0][64], 0x80000004);
+        out_le32(&pci_regs[0][65], in_le32(&pci_regs[0][65]) | 6);
+
+        /* Park the bus on PCI, and elevate PCI's arbitration priority,
+         * as required by section 9.6 of the user's manual.
+         */
+        out_8(&soc_regs[0x10028], 3);
+        out_be32((u32 *)&soc_regs[0x1002c], 0x01236745);
+
+        return;
+
+err:
+        printf("Bad PCI node\r\n");
+}
+
+static void pq2_platform_fixups(void)
+{
+        void *node;
+
+        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+        dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+        node = finddevice("/soc/cpm");
+        if (node) {
+                setprop(node, "clock-frequency", &bd.bi_cpmfreq, 4);
+                setprop(node, "fsl,brg-frequency", &bd.bi_brgfreq, 4);
+        }
+
+        update_cs_ranges();
+        fixup_pci();
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+        serial_console_init();
+        platform_ops.fixups = pq2_platform_fixups;
+}
diff --git a/arch/powerpc/boot/cuboot-sequoia.c b/arch/powerpc/boot/cuboot-sequoia.c
new file mode 100644
index 000000000000..ec635e0bd4ec
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-sequoia.c
@@ -0,0 +1,56 @@
+/*
+ * Old U-boot compatibility for Sequoia
+ *
+ * Valentine Barshak <vbarshak@ru.mvista.com>
+ * Copyright 2007 MontaVista Software, Inc
+ *
+ * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au>
+ * Copyright IBM Corporation, 2007
+ *
+ * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright IBM Corporation, 2007
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the License
+ */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+
+static void sequoia_fixups(void)
+{
+        unsigned long sysclk = 33333333;
+
+        ibm440ep_fixup_clocks(sysclk, 11059200);
+        ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+        ibm4xx_denali_fixup_memsize();
+        dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        platform_ops.fixups = sequoia_fixups;
+        platform_ops.exit = ibm44x_dbcr_reset;
+        ft_init(_dtb_start, 0, 32);
+        serial_console_init();
+}
diff --git a/arch/powerpc/boot/cuboot.c b/arch/powerpc/boot/cuboot.c
index 65795468ad6f..7768b2306b7a 100644
--- a/arch/powerpc/boot/cuboot.c
+++ b/arch/powerpc/boot/cuboot.c
@@ -17,9 +17,6 @@
 
 #include "ppcboot.h"
 
-extern char _end[];
-extern char _dtb_start[], _dtb_end[];
-
 void cuboot_init(unsigned long r4, unsigned long r5,
                  unsigned long r6, unsigned long r7,
                  unsigned long end_of_ram)
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 14b44aa96fea..83b88aa92888 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -121,4 +121,22 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
 #define DCRN_CPC0_MIRQ1                                 0x0ed
 #define DCRN_CPC0_JTAGID                                0x0ef
 
+#define DCRN_MAL0_CFG                                   0x180
+#define MAL_RESET 0x80000000
+
+/* 440EP Clock/Power-on Reset regs */
+#define DCRN_CPR0_ADDR  0xc
+#define DCRN_CPR0_DATA  0xd
+#define CPR0_PLLD0      0x60
+#define CPR0_OPBD0      0xc0
+#define CPR0_PERD0      0xe0
+#define CPR0_PRIMBD0    0xa0
+#define CPR0_SCPID      0x120
+#define CPR0_PLLC0      0x40
+
+/* 405GP Clocking/Power Management/Chip Control regs */
+#define DCRN_CPC0_PLLMR 0xb0
+#define DCRN_405_CPC0_CR0 0xb1
+#define DCRN_405_CPC0_CR1 0xb2
+
 #endif  /* _PPC_BOOT_DCR_H_ */
diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index c9951550ed2c..e5dfe4497313 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -74,6 +74,8 @@ void dt_fixup_cpu_clocks(u32 cpu, u32 tb, u32 bus)
                 if (bus > 0)
                         setprop_val(devp, "bus-frequency", bus);
         }
+
+        timebase_period_ns = 1000000000 / tb;
 }
 
 void dt_fixup_clock(const char *path, u32 freq)
@@ -86,34 +88,38 @@ void dt_fixup_clock(const char *path, u32 freq)
         }
 }
 
+void dt_fixup_mac_address(u32 index, const u8 *addr)
+{
+        void *devp = find_node_by_prop_value(NULL, "linux,network-index",
+                                             (void*)&index, sizeof(index));
+
+        if (devp) {
+                printf("ENET%d: local-mac-address <-"
+                       " %02x:%02x:%02x:%02x:%02x:%02x\n\r", index,
+                       addr[0], addr[1], addr[2],
+                       addr[3], addr[4], addr[5]);
+
+                setprop(devp, "local-mac-address", addr, 6);
+        }
+}
+
 void __dt_fixup_mac_addresses(u32 startindex, ...)
 {
         va_list ap;
         u32 index = startindex;
-        void *devp;
         const u8 *addr;
 
         va_start(ap, startindex);
-        while ((addr = va_arg(ap, const u8 *))) {
-                devp = find_node_by_prop_value(NULL, "linux,network-index",
-                                               (void*)&index, sizeof(index));
-
-                printf("ENET%d: local-mac-address <-"
-                       " %02x:%02x:%02x:%02x:%02x:%02x\n\r", index,
-                       addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
 
-                if (devp)
-                        setprop(devp, "local-mac-address", addr, 6);
+        while ((addr = va_arg(ap, const u8 *)))
+                dt_fixup_mac_address(index++, addr);
 
-                index++;
-        }
         va_end(ap);
 }
 
 #define MAX_ADDR_CELLS 4
-#define MAX_RANGES 8
 
-static void get_reg_format(void *node, u32 *naddr, u32 *nsize)
+void dt_get_reg_format(void *node, u32 *naddr, u32 *nsize)
 {
         if (getprop(node, "#address-cells", naddr, 4) != 4)
                 *naddr = 2;
@@ -207,7 +213,7 @@ static int find_range(u32 *reg, u32 *ranges, int nregaddr,
  * In particular, PCI is not supported.  Also, only the beginning of the
  * reg block is tracked; size is ignored except in ranges.
  */
-static u32 dt_xlate_buf[MAX_ADDR_CELLS * MAX_RANGES * 3];
+static u32 prop_buf[MAX_PROP_LEN / 4];
 
 static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
                 unsigned long *size)
@@ -216,14 +222,14 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
         u32 this_addr[MAX_ADDR_CELLS];
         void *parent;
         u64 ret_addr, ret_size;
-        u32 naddr, nsize, prev_naddr;
+        u32 naddr, nsize, prev_naddr, prev_nsize;
         int buflen, offset;
 
         parent = get_parent(node);
         if (!parent)
                 return 0;
 
-        get_reg_format(parent, &naddr, &nsize);
+        dt_get_reg_format(parent, &naddr, &nsize);
 
         if (nsize > 2)
                 return 0;
@@ -231,41 +237,47 @@ static int dt_xlate(void *node, int res, int reglen, unsigned long *addr,
         offset = (naddr + nsize) * res;
 
         if (reglen < offset + naddr + nsize ||
-            sizeof(dt_xlate_buf) < offset + naddr + nsize)
+            MAX_PROP_LEN < (offset + naddr + nsize) * 4)
                 return 0;
 
-        copy_val(last_addr, dt_xlate_buf + offset, naddr);
+        copy_val(last_addr, prop_buf + offset, naddr);
 
-        ret_size = dt_xlate_buf[offset + naddr];
+        ret_size = prop_buf[offset + naddr];
         if (nsize == 2) {
                 ret_size <<= 32;
-                ret_size |= dt_xlate_buf[offset + naddr + 1];
+                ret_size |= prop_buf[offset + naddr + 1];
         }
 
-        while ((node = get_parent(node))) {
+        for (;;) {
                 prev_naddr = naddr;
+                prev_nsize = nsize;
+                node = parent;
+
+                parent = get_parent(node);
+                if (!parent)
+                        break;
 
-                get_reg_format(node, &naddr, &nsize);
+                dt_get_reg_format(parent, &naddr, &nsize);
 
-                buflen = getprop(node, "ranges", dt_xlate_buf,
-                                sizeof(dt_xlate_buf));
-                if (buflen < 0)
+                buflen = getprop(node, "ranges", prop_buf,
+                                sizeof(prop_buf));
+                if (buflen == 0)
                         continue;
-                if (buflen > sizeof(dt_xlate_buf))
+                if (buflen < 0 || buflen > sizeof(prop_buf))
                         return 0;
 
-                offset = find_range(last_addr, dt_xlate_buf, prev_naddr,
-                                    naddr, nsize, buflen / 4);
+                offset = find_range(last_addr, prop_buf, prev_naddr,
+                                    naddr, prev_nsize, buflen / 4);
 
                 if (offset < 0)
                         return 0;
 
-                copy_val(this_addr, dt_xlate_buf + offset, prev_naddr);
+                copy_val(this_addr, prop_buf + offset, prev_naddr);
 
                 if (!sub_reg(last_addr, this_addr))
                         return 0;
 
-                copy_val(this_addr, dt_xlate_buf + offset + prev_naddr, naddr);
+                copy_val(this_addr, prop_buf + offset + prev_naddr, naddr);
 
                 if (!add_reg(last_addr, this_addr, naddr))
                         return 0;
@@ -292,16 +304,35 @@ int dt_xlate_reg(void *node, int res, unsigned long *addr, unsigned long *size)
 {
         int reglen;
 
-        reglen = getprop(node, "reg", dt_xlate_buf, sizeof(dt_xlate_buf)) / 4;
+        reglen = getprop(node, "reg", prop_buf, sizeof(prop_buf)) / 4;
         return dt_xlate(node, res, reglen, addr, size);
 }
 
 int dt_xlate_addr(void *node, u32 *buf, int buflen, unsigned long *xlated_addr)
 {
 
-        if (buflen > sizeof(dt_xlate_buf))
+        if (buflen > sizeof(prop_buf))
                 return 0;
 
-        memcpy(dt_xlate_buf, buf, buflen);
+        memcpy(prop_buf, buf, buflen);
         return dt_xlate(node, 0, buflen / 4, xlated_addr, NULL);
 }
+
+int dt_is_compatible(void *node, const char *compat)
+{
+        char *buf = (char *)prop_buf;
+        int len, pos;
+
+        len = getprop(node, "compatible", buf, MAX_PROP_LEN);
+        if (len < 0)
+                return 0;
+
+        for (pos = 0; pos < len; pos++) {
+                if (!strcmp(buf + pos, compat))
+                        return 1;
+
+                pos += strnlen(&buf[pos], len - pos);
+        }
+
+        return 0;
+}
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
new file mode 100644
index 000000000000..a88ae3d218a5
--- /dev/null
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -0,0 +1,244 @@
+/*
+ * Device Tree Source for AMCC Bamboo
+ *
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * FIXME: Draft only!
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "amcc,bamboo";
+        compatible = "amcc,bamboo";
+        dcr-parent = <&/cpus/PowerPC,440EP@0>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,440EP@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        clock-frequency = <0>; /* Filled in by zImage */
+                        timebase-frequency = <0>; /* Filled in by zImage */
+                        i-cache-line-size = <20>;
+                        d-cache-line-size = <20>;
+                        i-cache-size = <8000>;
+                        d-cache-size = <8000>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0 0>; /* Filled in by zImage */
+        };
+
+        UIC0: interrupt-controller0 {
+                compatible = "ibm,uic-440ep","ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0c0 009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic-440ep","ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0d0 009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <1e 4 1f 4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        SDR0: sdr {
+                compatible = "ibm,sdr-440ep";
+                dcr-reg = <00e 002>;
+        };
+
+        CPR0: cpr {
+                compatible = "ibm,cpr-440ep";
+                dcr-reg = <00c 002>;
+        };
+
+        plb {
+                compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by zImage */
+
+                SDRAM0: sdram {
+                        compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
+                        dcr-reg = <010 2>;
+                };
+
+                DMA0: dma {
+                        compatible = "ibm,dma-440ep", "ibm,dma-440gp";
+                        dcr-reg = <100 027>;
+                };
+
+                MAL0: mcmal {
+                        compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
+                        dcr-reg = <180 62>;
+                        num-tx-chans = <4>;
+                        num-rx-chans = <2>;
+                        interrupt-parent = <&MAL0>;
+                        interrupts = <0 1 2 3 4>;
+                        #interrupt-cells = <1>;
+                        interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
+                                        /*RXEOB*/ 1 &UIC0 b 4
+                                        /*SERR*/  2 &UIC1 0 4
+                                        /*TXDE*/  3 &UIC1 1 4
+                                        /*RXDE*/  4 &UIC1 3 4>;
+                };
+
+                POB0: opb {
+                        compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Bamboo is oddball in the 44x world and doesn't use the ERPN
+                         * bits.
+                         */
+                        ranges = <00000000 0 00000000 80000000
+                                  80000000 0 80000000 80000000>;
+                        interrupt-parent = <&UIC1>;
+                        interrupts = <7 4>;
+                        clock-frequency = <0>; /* Filled in by zImage */
+
+                        EBC0: ebc {
+                                compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
+                                dcr-reg = <012 2>;
+                                #address-cells = <2>;
+                                #size-cells = <1>;
+                                clock-frequency = <0>; /* Filled in by zImage */
+                                ranges;
+                                interrupts = <5 1>;
+                                interrupt-parent = <&UIC1>;
+                        };
+
+                        UART0: serial@ef600300 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600300 8>;
+                                virtual-reg = <ef600300>;
+                                clock-frequency = <0>; /* Filled in by zImage */
+                                current-speed = <1c200>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0 4>;
+                        };
+
+                        UART1: serial@ef600400 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600400 8>;
+                                virtual-reg = <ef600400>;
+                                clock-frequency = <0>;
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <1 4>;
+                        };
+
+                        UART2: serial@ef600500 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600500 8>;
+                                virtual-reg = <ef600500>;
+                                clock-frequency = <0>;
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <3 4>;
+                        };
+
+                        UART3: serial@ef600600 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600600 8>;
+                                virtual-reg = <ef600600>;
+                                clock-frequency = <0>;
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <4 4>;
+                        };
+
+                        IIC0: i2c@ef600700 {
+                                device_type = "i2c";
+                                compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
+                                reg = <ef600700 14>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <2 4>;
+                        };
+
+                        IIC1: i2c@ef600800 {
+                                device_type = "i2c";
+                                compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
+                                reg = <ef600800 14>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <7 4>;
+                        };
+
+                        ZMII0: emac-zmii@ef600d00 {
+                                device_type = "zmii-interface";
+                                compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
+                                reg = <ef600d00 c>;
+                        };
+
+                        EMAC0: ethernet@ef600e00 {
+                                device_type = "network";
+                                compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
+                                interrupt-parent = <&UIC1>;
+                                interrupts = <1c 4 1d 4>;
+                                reg = <ef600e00 70>;
+                                local-mac-address = [000000000000];
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <0 1>;
+                                mal-rx-channel = <0>;
+                                cell-index = <0>;
+                                max-frame-size = <5dc>;
+                                rx-fifo-size = <1000>;
+                                tx-fifo-size = <800>;
+                                phy-mode = "rmii";
+                                phy-map = <00000001>;
+                                zmii-device = <&ZMII0>;
+                                zmii-channel = <0>;
+                        };
+
+                        EMAC1: ethernet@ef600f00 {
+                                device_type = "network";
+                                compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
+                                interrupt-parent = <&UIC1>;
+                                interrupts = <1e 4 1f 4>;
+                                reg = <ef600f00 70>;
+                                local-mac-address = [000000000000];
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <2 3>;
+                                mal-rx-channel = <1>;
+                                cell-index = <1>;
+                                max-frame-size = <5dc>;
+                                rx-fifo-size = <1000>;
+                                tx-fifo-size = <800>;
+                                phy-mode = "rmii";
+                                phy-map = <00000001>;
+                                zmii-device = <&ZMII0>;
+                                zmii-channel = <1>;
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@ef600300";
+                bootargs = "console=ttyS0,115200";
+        };
+};
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index c5f99613fc7b..bc259972aaa0 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -9,10 +9,6 @@
  * This file is licensed under the terms of the GNU General Public
  * License version 2.  This program is licensed "as is" without
  * any warranty of any kind, whether express or implied.
- *
- * To build:
- *   dtc -I dts -O asm -o ebony.S -b 0 ebony.dts
- *   dtc -I dts -O dtb -o ebony.dtb -b 0 ebony.dts
  */
 
 / {
@@ -142,13 +138,16 @@
                                 interrupt-parent = <&UIC1>;
 
                                 small-flash@0,80000 {
-                                        device_type = "rom";
-                                        compatible = "direct-mapped";
-                                        probe-type = "JEDEC";
+                                        compatible = "jedec-flash";
                                         bank-width = <1>;
-                                        partitions = <0 80000>;
-                                        partition-names = "OpenBIOS";
                                         reg = <0 80000 80000>;
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        partition@0 {
+                                                label = "OpenBIOS";
+                                                reg = <0 80000>;
+                                                read-only;
+                                        };
                                 };
 
                                 ds1743@1,0 {
@@ -158,14 +157,19 @@
                                 };
 
                                 large-flash@2,0 {
-                                        device_type = "rom";
-                                        compatible = "direct-mapped";
-                                        probe-type = "JEDEC";
+                                        compatible = "jedec-flash";
                                         bank-width = <1>;
-                                        partitions = <0 380000
-                                                      380000 80000>;
-                                        partition-names = "fs", "firmware";
                                         reg = <2 0 400000>;
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        partition@0 {
+                                                label = "fs";
+                                                reg = <0 380000>;
+                                        };
+                                        partition@380000 {
+                                                label = "firmware";
+                                                reg = <380000 80000>;
+                                        };
                                 };
 
                                 ir@3,0 {
@@ -175,6 +179,7 @@
                                 fpga@7,0 {
                                         compatible = "Ebony-FPGA";
                                         reg = <7 0 10>;
+                                        virtual-reg = <e8300000>;
                                 };
                         };
 
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts
index 80a4fab8ee37..b5d87895fe06 100644
--- a/arch/powerpc/boot/dts/holly.dts
+++ b/arch/powerpc/boot/dts/holly.dts
@@ -8,10 +8,6 @@
  * This file is licensed under the terms of the GNU General Public
  * License version 2.  This program is licensed "as is" without
  * any warranty of any kind, whether express or implied.
- *
- * To build:
- *   dtc -I dts -O asm -o holly.S -b 0 holly.dts
- *   dtc -I dts -O dtb -o holly.dtb -b 0 holly.dts
  */
 
 / {
@@ -35,7 +31,6 @@
                         timebase-frequency = <2faf080>;
                         clock-frequency = <23c34600>;
                         bus-frequency = <bebc200>;
-                        32-bit;
                 };
         };
 
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 122537419d9f..ec71ab819fee 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -15,9 +15,6 @@
 
 XXXX add flash parts, rtc, ??
 
-build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
-
-
  */
 
 / {
@@ -50,7 +47,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 compatible = "mpc10x";
                 store-gathering = <0>; /* 0 == off, !0 == on */
@@ -72,7 +68,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
 
                         rtc@32 {
                                 device_type = "rtc";
-                                compatible = "ricoh,rs5c372b";
+                                compatible = "ricoh,rs5c372a";
                                 reg = <32>;
                         };
                 };
@@ -83,7 +79,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
                         reg = <80004500 8>;
                         clock-frequency = <5d08d88>;
                         current-speed = <2580>;
-                        interrupts = <9 2>;
+                        interrupts = <9 0>;
                         interrupt-parent = <&mpic>;
                 };
 
@@ -104,7 +100,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
                         compatible = "chrp,open-pic";
                         interrupt-controller;
                         reg = <80040000 40000>;
-                        built-in;
                 };
 
                 pci@fec00000 {
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 579aa8b967d9..32ecd2319928 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -15,9 +15,6 @@
 
 XXXX add flash parts, rtc, ??
 
-build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
-
-
  */
 
 / {
@@ -50,7 +47,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 compatible = "mpc10x";
                 store-gathering = <0>; /* 0 == off, !0 == on */
@@ -72,7 +68,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
 
                         rtc@32 {
                                 device_type = "rtc";
-                                compatible = "ricoh,rs5c372b";
+                                compatible = "ricoh,rs5c372a";
                                 reg = <32>;
                         };
                 };
@@ -83,7 +79,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
                         reg = <80004500 8>;
                         clock-frequency = <7c044a8>;
                         current-speed = <2580>;
-                        interrupts = <9 2>;
+                        interrupts = <9 0>;
                         interrupt-parent = <&mpic>;
                 };
 
@@ -104,7 +100,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
                         compatible = "chrp,open-pic";
                         interrupt-controller;
                         reg = <80040000 40000>;
-                        built-in;
                 };
 
                 pci@fec00000 {
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index d29308fe4c24..324e1bd2aa60 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -37,7 +37,6 @@
                         timebase-frequency = <0>;       // from bootloader
                         bus-frequency = <0>;            // from bootloader
                         clock-frequency = <0>;          // from bootloader
-                        32-bit;
                 };
         };
 
@@ -50,10 +49,9 @@
                 model = "fsl,mpc5200";
                 compatible = "mpc5200";
                 revision = "";                  // from bootloader
-                #interrupt-cells = <3>;
                 device_type = "soc";
-                ranges = <0 f0000000 f0010000>;
-                reg = <f0000000 00010000>;
+                ranges = <0 f0000000 0000c000>;
+                reg = <f0000000 00000100>;
                 bus-frequency = <0>;            // from bootloader
                 system-frequency = <0>;         // from bootloader
 
@@ -69,7 +67,6 @@
                         device_type = "interrupt-controller";
                         compatible = "mpc5200-pic";
                         reg = <500 80>;
-                        built-in;
                 };
 
                 gpt@600 {       // General Purpose Timer
@@ -185,27 +182,6 @@
                         interrupt-parent = <&mpc5200_pic>;
                 };
 
-                pci@0d00 {
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        compatible = "mpc5200-pci";
-                        reg = <d00 100>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
-                                         c000 0 0 2 &mpc5200_pic 0 0 3
-                                         c000 0 0 3 &mpc5200_pic 0 0 3
-                                         c000 0 0 4 &mpc5200_pic 0 0 3>;
-                        clock-frequency = <0>; // From boot loader
-                        interrupts = <2 8 0 2 9 0 2 a 0>;
-                        interrupt-parent = <&mpc5200_pic>;
-                        bus-range = <0 0>;
-                        ranges = <42000000 0 80000000 80000000 0 20000000
-                                  02000000 0 a0000000 a0000000 0 10000000
-                                  01000000 0 00000000 b0000000 0 01000000>;
-                };
-
                 spi@f00 {
                         device_type = "spi";
                         compatible = "mpc5200-spi";
@@ -340,4 +316,25 @@
                         reg = <8000 4000>;
                 };
         };
+
+        pci@f0000d00 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                compatible = "mpc5200-pci";
+                reg = <f0000d00 100>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
+                                 c000 0 0 2 &mpc5200_pic 0 0 3
+                                 c000 0 0 3 &mpc5200_pic 0 0 3
+                                 c000 0 0 4 &mpc5200_pic 0 0 3>;
+                clock-frequency = <0>; // From boot loader
+                interrupts = <2 8 0 2 9 0 2 a 0>;
+                interrupt-parent = <&mpc5200_pic>;
+                bus-range = <0 0>;
+                ranges = <42000000 0 80000000 80000000 0 20000000
+                          02000000 0 a0000000 a0000000 0 10000000
+                          01000000 0 00000000 b0000000 0 01000000>;
+        };
 };
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index f242531f0451..3f74f73f70ad 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -37,7 +37,6 @@
                         timebase-frequency = <0>;       // from bootloader
                         bus-frequency = <0>;            // from bootloader
                         clock-frequency = <0>;          // from bootloader
-                        32-bit;
                 };
         };
 
@@ -50,10 +49,9 @@
                 model = "fsl,mpc5200b";
                 compatible = "mpc5200";
                 revision = "";                  // from bootloader
-                #interrupt-cells = <3>;
                 device_type = "soc";
-                ranges = <0 f0000000 f0010000>;
-                reg = <f0000000 00010000>;
+                ranges = <0 f0000000 0000c000>;
+                reg = <f0000000 00000100>;
                 bus-frequency = <0>;            // from bootloader
                 system-frequency = <0>;         // from bootloader
 
@@ -69,7 +67,6 @@
                         device_type = "interrupt-controller";
                         compatible = "mpc5200b-pic\0mpc5200-pic";
                         reg = <500 80>;
-                        built-in;
                 };
 
                 gpt@600 {       // General Purpose Timer
@@ -185,32 +182,6 @@
                         interrupt-parent = <&mpc5200_pic>;
                 };
 
-                pci@0d00 {
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        compatible = "mpc5200b-pci\0mpc5200-pci";
-                        reg = <d00 100>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
-                                         c000 0 0 2 &mpc5200_pic 1 1 3
-                                         c000 0 0 3 &mpc5200_pic 1 2 3
-                                         c000 0 0 4 &mpc5200_pic 1 3 3
-
-                                         c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
-                                         c800 0 0 2 &mpc5200_pic 1 2 3
-                                         c800 0 0 3 &mpc5200_pic 1 3 3
-                                         c800 0 0 4 &mpc5200_pic 0 0 3>;
-                        clock-frequency = <0>; // From boot loader
-                        interrupts = <2 8 0 2 9 0 2 a 0>;
-                        interrupt-parent = <&mpc5200_pic>;
-                        bus-range = <0 0>;
-                        ranges = <42000000 0 80000000 80000000 0 20000000
-                                  02000000 0 a0000000 a0000000 0 10000000
-                                  01000000 0 00000000 b0000000 0 01000000>;
-                };
-
                 spi@f00 {
                         device_type = "spi";
                         compatible = "mpc5200b-spi\0mpc5200-spi";
@@ -345,4 +316,30 @@
                         reg = <8000 4000>;
                 };
         };
+
+        pci@f0000d00 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                compatible = "mpc5200b-pci\0mpc5200-pci";
+                reg = <f0000d00 100>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+                                 c000 0 0 2 &mpc5200_pic 1 1 3
+                                 c000 0 0 3 &mpc5200_pic 1 2 3
+                                 c000 0 0 4 &mpc5200_pic 1 3 3
+
+                                 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+                                 c800 0 0 2 &mpc5200_pic 1 2 3
+                                 c800 0 0 3 &mpc5200_pic 1 3 3
+                                 c800 0 0 4 &mpc5200_pic 0 0 3>;
+                clock-frequency = <0>; // From boot loader
+                interrupts = <2 8 0 2 9 0 2 a 0>;
+                interrupt-parent = <&mpc5200_pic>;
+                bus-range = <0 0>;
+                ranges = <42000000 0 80000000 80000000 0 20000000
+                          02000000 0 a0000000 a0000000 0 10000000
+                          01000000 0 00000000 b0000000 0 01000000>;
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index b9158eb2797e..88cd37da13ef 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -31,7 +31,6 @@
                         timebase-frequency = <0>;       // 33 MHz, from uboot
                         clock-frequency = <0>;          // From U-Boot
                         bus-frequency = <0>;            // From U-Boot
-                        32-bit;
                 };
         };
 
@@ -44,7 +43,6 @@
         tsi108@c0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "tsi-bridge";
                 ranges = <00000000 c0000000 00010000>;
                 reg = <c0000000 00010000>;
@@ -128,7 +126,6 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <7400 400>;
-                        built-in;
                         compatible = "chrp,open-pic";
                         device_type = "open-pic";
                         big-endian;
@@ -180,7 +177,6 @@
                                 device_type = "pic-router";
                                 #address-cells = <0>;
                                 #interrupt-cells = <2>;
-                                built-in;
                                 big-endian;
                                 interrupts = <17 2>;
                                 interrupt-parent = <&mpic>;
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 1934b800278e..43130541799a 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -10,207 +10,204 @@
  */
 
 / {
-       model = "MPC8272ADS";
-       compatible = "MPC8260ADS";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               PowerPC,8272@0 {
-                       device_type = "cpu";
-                       reg = <0>;
-                       d-cache-line-size = <20>;       // 32 bytes
-                       i-cache-line-size = <20>;       // 32 bytes
-                       d-cache-size = <4000>;          // L1, 16K
-                       i-cache-size = <4000>;          // L1, 16K
-                       timebase-frequency = <0>;
-                       bus-frequency = <0>;
-                       clock-frequency = <0>;
-                       32-bit;
-               };
-       };
-
-                pci_pic: interrupt-controller@f8200000 {
-               #address-cells = <0>;
-               #interrupt-cells = <2>;
-               interrupt-controller;
-               reg = <f8200000 f8200004>;
-               built-in;
-               device_type = "pci-pic";
-       };
-       memory {
-               device_type = "memory";
-               reg = <00000000 4000000 f4500000 00000020>;
-       };
-
-       chosen {
-               name = "chosen";
-               linux,platform = <0>;
+        model = "MPC8272ADS";
+        compatible = "MPC8260ADS";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8272@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <20>;       // 32 bytes
+                        i-cache-line-size = <20>;       // 32 bytes
+                        d-cache-size = <4000>;          // L1, 16K
+                        i-cache-size = <4000>;          // L1, 16K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        pci_pic: interrupt-controller@f8200000 {
+                #address-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupt-controller;
+                reg = <f8200000 f8200004>;
+                device_type = "pci-pic";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <00000000 4000000 f4500000 00000020>;
+        };
+
+        chosen {
+                name = "chosen";
+                linux,platform = <0>;
                 interrupt-controller = <&Cpm_pic>;
-       };
-
-       soc8272@f0000000 {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               #interrupt-cells = <2>;
-               device_type = "soc";
-               ranges = <00000000 f0000000 00053000>;
-               reg = <f0000000 10000>;
-
-               mdio@0 {
-                       device_type = "mdio";
-                       compatible = "fs_enet";
-                       reg = <0 0>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
+        };
+
+        soc8272@f0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <00000000 f0000000 00053000>;
+                reg = <f0000000 10000>;
+
+                mdio@0 {
+                        device_type = "mdio";
+                        compatible = "fs_enet";
+                        reg = <0 0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
                         phy0:ethernet-phy@0 {
                                 interrupt-parent = <&Cpm_pic>;
-                               interrupts = <17 4>;
-                               reg = <0>;
-                               bitbang = [ 12 12 13 02 02 01 ];
-                               device_type = "ethernet-phy";
-                       };
+                                interrupts = <17 4>;
+                                reg = <0>;
+                                bitbang = [ 12 12 13 02 02 01 ];
+                                device_type = "ethernet-phy";
+                        };
+
                         phy1:ethernet-phy@1 {
                                 interrupt-parent = <&Cpm_pic>;
-                               interrupts = <17 4>;
-                               bitbang = [ 12 12 13 02 02 01 ];
-                               reg = <3>;
-                               device_type = "ethernet-phy";
-                       };
-               };
-
-               ethernet@24000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       device_type = "network";
-                       device-id = <1>;
-                       compatible = "fs_enet";
-                       model = "FCC";
-                       reg = <11300 20 8400 100 11380 30>;
-                       mac-address = [ 00 11 2F 99 43 54 ];
-                       interrupts = <20 2>;
+                                interrupts = <17 4>;
+                                bitbang = [ 12 12 13 02 02 01 ];
+                                reg = <3>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        device_type = "network";
+                        device-id = <1>;
+                        compatible = "fs_enet";
+                        model = "FCC";
+                        reg = <11300 20 8400 100 11380 30>;
+                        mac-address = [ 00 11 2F 99 43 54 ];
+                        interrupts = <20 2>;
                         interrupt-parent = <&Cpm_pic>;
                         phy-handle = <&Phy0>;
-                       rx-clock = <13>;
-                       tx-clock = <12>;
-               };
-
-               ethernet@25000 {
-                       device_type = "network";
-                       device-id = <2>;
-                       compatible = "fs_enet";
-                       model = "FCC";
-                       reg = <11320 20 8500 100 113b0 30>;
-                       mac-address = [ 00 11 2F 99 44 54 ];
-                       interrupts = <21 2>;
+                        rx-clock = <13>;
+                        tx-clock = <12>;
+                };
+
+                ethernet@25000 {
+                        device_type = "network";
+                        device-id = <2>;
+                        compatible = "fs_enet";
+                        model = "FCC";
+                        reg = <11320 20 8500 100 113b0 30>;
+                        mac-address = [ 00 11 2F 99 44 54 ];
+                        interrupts = <21 2>;
                         interrupt-parent = <&Cpm_pic>;
                         phy-handle = <&Phy1>;
-                       rx-clock = <17>;
-                       tx-clock = <18>;
-               };
-
-               cpm@f0000000 {
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       #interrupt-cells = <2>;
-                       device_type = "cpm";
-                       model = "CPM2";
-                       ranges = <00000000 00000000 20000>;
-                       reg = <0 20000>;
-                       command-proc = <119c0>;
-                       brg-frequency = <17D7840>;
-                       cpm_clk = <BEBC200>;
-
-                       scc@11a00 {
-                               device_type = "serial";
-                               compatible = "cpm_uart";
-                               model = "SCC";
-                               device-id = <1>;
-                               reg = <11a00 20 8000 100>;
-                               current-speed = <1c200>;
-                               interrupts = <28 2>;
+                        rx-clock = <17>;
+                        tx-clock = <18>;
+                };
+
+                cpm@f0000000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "cpm";
+                        model = "CPM2";
+                        ranges = <00000000 00000000 20000>;
+                        reg = <0 20000>;
+                        command-proc = <119c0>;
+                        brg-frequency = <17D7840>;
+                        cpm_clk = <BEBC200>;
+
+                        scc@11a00 {
+                                device_type = "serial";
+                                compatible = "cpm_uart";
+                                model = "SCC";
+                                device-id = <1>;
+                                reg = <11a00 20 8000 100>;
+                                current-speed = <1c200>;
+                                interrupts = <28 2>;
                                 interrupt-parent = <&Cpm_pic>;
-                               clock-setup = <0 00ffffff>;
-                               rx-clock = <1>;
-                               tx-clock = <1>;
-                       };
-
-                       scc@11a60 {
-                               device_type = "serial";
-                               compatible = "cpm_uart";
-                               model = "SCC";
-                               device-id = <4>;
-                               reg = <11a60 20 8300 100>;
-                               current-speed = <1c200>;
-                               interrupts = <2b 2>;
+                                clock-setup = <0 00ffffff>;
+                                rx-clock = <1>;
+                                tx-clock = <1>;
+                        };
+
+                        scc@11a60 {
+                                device_type = "serial";
+                                compatible = "cpm_uart";
+                                model = "SCC";
+                                device-id = <4>;
+                                reg = <11a60 20 8300 100>;
+                                current-speed = <1c200>;
+                                interrupts = <2b 2>;
                                 interrupt-parent = <&Cpm_pic>;
-                               clock-setup = <1b ffffff00>;
-                               rx-clock = <4>;
-                               tx-clock = <4>;
-                       };
-
-               };
-                        cpm_pic:interrupt-controller@10c00 {
-                       #address-cells = <0>;
-                       #interrupt-cells = <2>;
-                       interrupt-controller;
-                       reg = <10c00 80>;
-                       built-in;
-                       device_type = "cpm-pic";
-                       compatible = "CPM2";
-               };
-               pci@0500 {
-                       #interrupt-cells = <1>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       compatible = "8272";
-                       device_type = "pci";
-                       reg = <10430 4dc>;
-                       clock-frequency = <3f940aa>;
-                       interrupt-map-mask = <f800 0 0 7>;
-                       interrupt-map = <
-
-                                       /* IDSEL 0x16 */
-                                        b000 0 0 1 f8200000 40 8
-                                        b000 0 0 2 f8200000 41 8
-                                        b000 0 0 3 f8200000 42 8
-                                        b000 0 0 4 f8200000 43 8
-
-                                       /* IDSEL 0x17 */
-                                        b800 0 0 1 f8200000 43 8
-                                        b800 0 0 2 f8200000 40 8
-                                        b800 0 0 3 f8200000 41 8
-                                        b800 0 0 4 f8200000 42 8
-
-                                       /* IDSEL 0x18 */
-                                        c000 0 0 1 f8200000 42 8
-                                        c000 0 0 2 f8200000 43 8
-                                        c000 0 0 3 f8200000 40 8
-                                        c000 0 0 4 f8200000 41 8>;
+                                clock-setup = <1b ffffff00>;
+                                rx-clock = <4>;
+                                tx-clock = <4>;
+                        };
+                };
+
+                cpm_pic:interrupt-controller@10c00 {
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        interrupt-controller;
+                        reg = <10c00 80>;
+                        device_type = "cpm-pic";
+                        compatible = "CPM2";
+                };
+
+                pci@0500 {
+                        #interrupt-cells = <1>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        compatible = "8272";
+                        device_type = "pci";
+                        reg = <10430 4dc>;
+                        clock-frequency = <3f940aa>;
+                        interrupt-map-mask = <f800 0 0 7>;
+                        interrupt-map = <
+                                        /* IDSEL 0x16 */
+                                         b000 0 0 1 f8200000 40 8
+                                         b000 0 0 2 f8200000 41 8
+                                         b000 0 0 3 f8200000 42 8
+                                         b000 0 0 4 f8200000 43 8
+
+                                        /* IDSEL 0x17 */
+                                         b800 0 0 1 f8200000 43 8
+                                         b800 0 0 2 f8200000 40 8
+                                         b800 0 0 3 f8200000 41 8
+                                         b800 0 0 4 f8200000 42 8
+
+                                        /* IDSEL 0x18 */
+                                         c000 0 0 1 f8200000 42 8
+                                         c000 0 0 2 f8200000 43 8
+                                         c000 0 0 3 f8200000 40 8
+                                         c000 0 0 4 f8200000 41 8>;
                         interrupt-parent = <&Cpm_pic>;
-                       interrupts = <14 8>;
-                       bus-range = <0 0>;
-                       ranges = <02000000 0 80000000 80000000 0 40000000
-                                 01000000 0 00000000 f6000000 0 02000000>;
-               };
+                        interrupts = <14 8>;
+                        bus-range = <0 0>;
+                        ranges = <02000000 0 80000000 80000000 0 40000000
+                                  01000000 0 00000000 f6000000 0 02000000>;
+                };
 
 /* May need to remove if on a part without crypto engine */
-               crypto@30000 {
-                       device_type = "crypto";
-                       model = "SEC2";
-                       compatible = "talitos";
-                       reg = <30000 10000>;
-                       interrupts = <b 2>;
+                crypto@30000 {
+                        device_type = "crypto";
+                        model = "SEC2";
+                        compatible = "talitos";
+                        reg = <30000 10000>;
+                        interrupts = <b 2>;
                         interrupt-parent = <&Cpm_pic>;
-                       num-channels = <4>;
-                       channel-fifo-len = <18>;
-                       exec-units-mask = <0000007e>;
+                        num-channels = <4>;
+                        channel-fifo-len = <18>;
+                        exec-units-mask = <0000007e>;
 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
-                       descriptor-types-mask = <01010ebf>;
-               };
-
-       };
+                        descriptor-types-mask = <01010ebf>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index c5adbe40364e..a8eadc8c4497 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -29,7 +29,6 @@
                         timebase-frequency = <0>;       // from bootloader
                         bus-frequency = <0>;            // from bootloader
                         clock-frequency = <0>;          // from bootloader
-                        32-bit;
                 };
         };
 
@@ -41,7 +40,6 @@
         soc8313@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -152,36 +150,6 @@
                         interrupt-parent = < &ipic >;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                        /* IDSEL 0x0E -mini PCI */
-                                         7000 0 0 1 &ipic 12 8
-                                         7000 0 0 2 &ipic 12 8
-                                         7000 0 0 3 &ipic 12 8
-                                         7000 0 0 4 &ipic 12 8
-
-                                        /* IDSEL 0x0F - PCI slot */
-                                         7800 0 0 1 &ipic 11 8
-                                         7800 0 0 2 &ipic 12 8
-                                         7800 0 0 3 &ipic 11 8
-                                         7800 0 0 4 &ipic 12 8>;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 90000000 90000000 0 10000000
-                                  42000000 0 80000000 80000000 0 10000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 crypto@30000 {
                         device_type = "crypto";
                         model = "SEC2";
@@ -207,8 +175,37 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
         };
+
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x0E -mini PCI */
+                                 7000 0 0 1 &ipic 12 8
+                                 7000 0 0 2 &ipic 12 8
+                                 7000 0 0 3 &ipic 12 8
+                                 7000 0 0 4 &ipic 12 8
+
+                                /* IDSEL 0x0F - PCI slot */
+                                 7800 0 0 1 &ipic 11 8
+                                 7800 0 0 2 &ipic 12 8
+                                 7800 0 0 3 &ipic 11 8
+                                 7800 0 0 4 &ipic 12 8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 90000000 90000000 0 10000000
+                          42000000 0 80000000 80000000 0 10000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index f158ed781ba8..fcd333c391ec 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -29,7 +29,6 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
-                        32-bit;
                 };
         };
 
@@ -46,7 +45,6 @@
         soc8323@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -99,71 +97,11 @@
                         descriptor-types-mask = <0122003f>;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                        /* IDSEL 0x11 AD17 */
-                                         8800 0 0 1 &ipic 14 8
-                                         8800 0 0 2 &ipic 15 8
-                                         8800 0 0 3 &ipic 16 8
-                                         8800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x12 AD18 */
-                                         9000 0 0 1 &ipic 16 8
-                                         9000 0 0 2 &ipic 17 8
-                                         9000 0 0 3 &ipic 14 8
-                                         9000 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x13 AD19 */
-                                         9800 0 0 1 &ipic 17 8
-                                         9800 0 0 2 &ipic 14 8
-                                         9800 0 0 3 &ipic 15 8
-                                         9800 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x15 AD21*/
-                                         a800 0 0 1 &ipic 14 8
-                                         a800 0 0 2 &ipic 15 8
-                                         a800 0 0 3 &ipic 16 8
-                                         a800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x16 AD22*/
-                                         b000 0 0 1 &ipic 17 8
-                                         b000 0 0 2 &ipic 14 8
-                                         b000 0 0 3 &ipic 15 8
-                                         b000 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x17 AD23*/
-                                         b800 0 0 1 &ipic 16 8
-                                         b800 0 0 2 &ipic 17 8
-                                         b800 0 0 3 &ipic 14 8
-                                         b800 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x18 AD24*/
-                                         c000 0 0 1 &ipic 15 8
-                                         c000 0 0 2 &ipic 16 8
-                                         c000 0 0 3 &ipic 17 8
-                                         c000 0 0 4 &ipic 14 8>;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 90000000 90000000 0 10000000
-                                  42000000 0 80000000 80000000 0 10000000
-                                  01000000 0 00000000 d0000000 0 00100000>;
-                        clock-frequency = <0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 ipic: pic@700 {
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
                 
@@ -333,10 +271,68 @@
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <80 80>;
-                        built-in;
                         big-endian;
                         interrupts = <20 8 21 8>; //high:32 low:33
                         interrupt-parent = < &ipic >;
                 };
         };
+
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                                /* IDSEL 0x11 AD17 */
+                                 8800 0 0 1 &ipic 14 8
+                                 8800 0 0 2 &ipic 15 8
+                                 8800 0 0 3 &ipic 16 8
+                                 8800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x12 AD18 */
+                                 9000 0 0 1 &ipic 16 8
+                                 9000 0 0 2 &ipic 17 8
+                                 9000 0 0 3 &ipic 14 8
+                                 9000 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x13 AD19 */
+                                 9800 0 0 1 &ipic 17 8
+                                 9800 0 0 2 &ipic 14 8
+                                 9800 0 0 3 &ipic 15 8
+                                 9800 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x15 AD21*/
+                                 a800 0 0 1 &ipic 14 8
+                                 a800 0 0 2 &ipic 15 8
+                                 a800 0 0 3 &ipic 16 8
+                                 a800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x16 AD22*/
+                                 b000 0 0 1 &ipic 17 8
+                                 b000 0 0 2 &ipic 14 8
+                                 b000 0 0 3 &ipic 15 8
+                                 b000 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x17 AD23*/
+                                 b800 0 0 1 &ipic 16 8
+                                 b800 0 0 2 &ipic 17 8
+                                 b800 0 0 3 &ipic 14 8
+                                 b800 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x18 AD24*/
+                                 c000 0 0 1 &ipic 15 8
+                                 c000 0 0 2 &ipic 16 8
+                                 c000 0 0 3 &ipic 17 8
+                                 c000 0 0 4 &ipic 14 8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 90000000 90000000 0 10000000
+                          42000000 0 80000000 80000000 0 10000000
+                          01000000 0 00000000 d0000000 0 00100000>;
+                clock-frequency = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 7c4beff3e200..388c8a7012e1 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -29,7 +29,6 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
-                        32-bit;
                 };
         };
 
@@ -41,7 +40,6 @@
         soc8323@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -94,45 +92,11 @@
                         descriptor-types-mask = <0122003f>;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                        /* IDSEL 0x10 AD16 (USB) */
-                                         8000 0 0 1 &pic 11 8
-
-                                        /* IDSEL 0x11 AD17 (Mini1)*/
-                                         8800 0 0 1 &pic 12 8
-                                         8800 0 0 2 &pic 13 8
-                                         8800 0 0 3 &pic 14 8
-                                         8800 0 0 4 &pic 30 8
-
-                                        /* IDSEL 0x12 AD18 (PCI/Mini2) */
-                                         9000 0 0 1 &pic 13 8
-                                         9000 0 0 2 &pic 14 8
-                                         9000 0 0 3 &pic 30 8
-                                         9000 0 0 4 &pic 11 8>;
-
-                        interrupt-parent = <&pic>;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <42000000 0 80000000 80000000 0 10000000
-                                  02000000 0 90000000 90000000 0 10000000
-                                  01000000 0 d0000000 d0000000 0 04000000>;
-                        clock-frequency = <0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 pic:pic@700 {
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
 
@@ -211,7 +175,7 @@
                         reg = <4c0 40>;
                         interrupts = <2>;
                         interrupt-parent = <&qeic>;
-                        mode = "cpu";
+                        mode = "cpu-qe";
                 };
 
                 spi@500 {
@@ -292,10 +256,42 @@
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <80 80>;
-                        built-in;
                         big-endian;
                         interrupts = <20 8 21 8>; //high:32 low:33
                         interrupt-parent = <&pic>;
                 };
         };
+
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                                /* IDSEL 0x10 AD16 (USB) */
+                                 8000 0 0 1 &pic 11 8
+
+                                /* IDSEL 0x11 AD17 (Mini1)*/
+                                 8800 0 0 1 &pic 12 8
+                                 8800 0 0 2 &pic 13 8
+                                 8800 0 0 3 &pic 14 8
+                                 8800 0 0 4 &pic 30 8
+
+                                /* IDSEL 0x12 AD18 (PCI/Mini2) */
+                                 9000 0 0 1 &pic 13 8
+                                 9000 0 0 2 &pic 14 8
+                                 9000 0 0 3 &pic 30 8
+                                 9000 0 0 4 &pic 11 8>;
+
+                interrupt-parent = <&pic>;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <42000000 0 80000000 80000000 0 10000000
+                          02000000 0 90000000 90000000 0 10000000
+                          01000000 0 d0000000 d0000000 0 04000000>;
+                clock-frequency = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 44c065a6b5e7..3bc32029ca5b 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -28,7 +28,6 @@
                         timebase-frequency = <0>;       // from bootloader
                         bus-frequency = <0>;            // from bootloader
                         clock-frequency = <0>;          // from bootloader
-                        32-bit;
                 };
         };
 
@@ -40,7 +39,6 @@
         soc8349@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -142,6 +140,7 @@
                         interrupts = <20 8 21 8 22 8>;
                         interrupt-parent = < &ipic >;
                         phy-handle = < &phy1c >;
+                        linux,network-index = <0>;
                 };
 
                 ethernet@25000 {
@@ -161,6 +160,7 @@
                         interrupts = <23 8 24 8 25 8>;
                         interrupt-parent = < &ipic >;
                         phy-handle = < &phy1f >;
+                        linux,network-index = <1>;
                 };
 
                 serial@4500 {
@@ -181,52 +181,6 @@
                         interrupt-parent = < &ipic >;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                        /* IDSEL 0x10 - SATA */
-                                        8000 0 0 1 &ipic 16 8 /* SATA_INTA */
-                                        >;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <42000000 0 80000000 80000000 0 10000000
-                                  02000000 0 90000000 90000000 0 10000000
-                                  01000000 0 00000000 e2000000 0 01000000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
-                pci@8600 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                        /* IDSEL 0x0E - MiniPCI Slot */
-                                        7000 0 0 1 &ipic 15 8 /* PCI_INTA */
-
-                                        /* IDSEL 0x0F - PCI Slot */
-                                        7800 0 0 1 &ipic 14 8 /* PCI_INTA */
-                                        7800 0 0 2 &ipic 15 8 /* PCI_INTB */
-                                         >;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <43 8>;
-                        bus-range = <1 1>;
-                        ranges = <42000000 0 a0000000 a0000000 0 10000000
-                                  02000000 0 b0000000 b0000000 0 10000000
-                                  01000000 0 00000000 e3000000 0 01000000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8600 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 crypto@30000 {
                         device_type = "crypto";
                         model = "SEC2";
@@ -245,8 +199,56 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
         };
+
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                                /* IDSEL 0x10 - SATA */
+                                8000 0 0 1 &ipic 16 8 /* SATA_INTA */
+                                >;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <42000000 0 80000000 80000000 0 10000000
+                          02000000 0 90000000 90000000 0 10000000
+                          01000000 0 00000000 e2000000 0 01000000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
+
+        pci@e0008600 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                                /* IDSEL 0x0E - MiniPCI Slot */
+                                7000 0 0 1 &ipic 15 8 /* PCI_INTA */
+
+                                /* IDSEL 0x0F - PCI Slot */
+                                7800 0 0 1 &ipic 14 8 /* PCI_INTA */
+                                7800 0 0 2 &ipic 15 8 /* PCI_INTB */
+                                 >;
+                interrupt-parent = < &ipic >;
+                interrupts = <43 8>;
+                bus-range = <0 0>;
+                ranges = <42000000 0 a0000000 a0000000 0 10000000
+                          02000000 0 b0000000 b0000000 0 10000000
+                          01000000 0 00000000 e3000000 0 01000000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008600 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
+
+
+
 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 0b8387141d88..36a27607f766 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -28,7 +28,6 @@
                         timebase-frequency = <0>;       // from bootloader
                         bus-frequency = <0>;            // from bootloader
                         clock-frequency = <0>;          // from bootloader
-                        32-bit;
                 };
         };
 
@@ -40,7 +39,6 @@
         soc8349@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -116,6 +114,7 @@
                         interrupts = <20 8 21 8 22 8>;
                         interrupt-parent = < &ipic >;
                         phy-handle = < &phy1c >;
+                        linux,network-index = <0>;
                 };
 
                 serial@4500 {
@@ -136,28 +135,6 @@
                         interrupt-parent = < &ipic >;
                 };
 
-                pci@8600 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                        /* IDSEL 0x0F - PCI Slot */
-                                        7800 0 0 1 &ipic 14 8 /* PCI_INTA */
-                                        7800 0 0 2 &ipic 15 8 /* PCI_INTB */
-                                         >;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <43 8>;
-                        bus-range = <1 1>;
-                        ranges = <42000000 0 a0000000 a0000000 0 10000000
-                                  02000000 0 b0000000 b0000000 0 10000000
-                                  01000000 0 00000000 e3000000 0 01000000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8600 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 crypto@30000 {
                         device_type = "crypto";
                         model = "SEC2";
@@ -176,8 +153,29 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
         };
+
+        pci@e0008600 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                                /* IDSEL 0x0F - PCI Slot */
+                                7800 0 0 1 &ipic 14 8 /* PCI_INTA */
+                                7800 0 0 2 &ipic 15 8 /* PCI_INTB */
+                                 >;
+                interrupt-parent = < &ipic >;
+                interrupts = <43 8>;
+                bus-range = <1 1>;
+                ranges = <42000000 0 a0000000 a0000000 0 10000000
+                          02000000 0 b0000000 b0000000 0 10000000
+                          01000000 0 00000000 e3000000 0 01000000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008600 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 481099756e44..c27e2fff5d58 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -29,7 +29,6 @@
                         timebase-frequency = <0>;       // from bootloader
                         bus-frequency = <0>;            // from bootloader
                         clock-frequency = <0>;          // from bootloader
-                        32-bit;
                 };
         };
 
@@ -46,7 +45,6 @@
         soc8349@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -146,6 +144,7 @@
                         interrupts = <20 8 21 8 22 8>;
                         interrupt-parent = < &ipic >;
                         phy-handle = < &phy0 >;
+                        linux,network-index = <0>;
                 };
 
                 ethernet@25000 {
@@ -165,6 +164,7 @@
                         interrupts = <23 8 24 8 25 8>;
                         interrupt-parent = < &ipic >;
                         phy-handle = < &phy1 >;
+                        linux,network-index = <1>;
                 };
 
                 serial@4500 {
@@ -185,126 +185,6 @@
                         interrupt-parent = < &ipic >;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                        /* IDSEL 0x11 */
-                                         8800 0 0 1 &ipic 14 8
-                                         8800 0 0 2 &ipic 15 8
-                                         8800 0 0 3 &ipic 16 8
-                                         8800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x12 */
-                                         9000 0 0 1 &ipic 16 8
-                                         9000 0 0 2 &ipic 17 8
-                                         9000 0 0 3 &ipic 14 8
-                                         9000 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x13 */
-                                         9800 0 0 1 &ipic 17 8
-                                         9800 0 0 2 &ipic 14 8
-                                         9800 0 0 3 &ipic 15 8
-                                         9800 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x15 */
-                                         a800 0 0 1 &ipic 14 8
-                                         a800 0 0 2 &ipic 15 8
-                                         a800 0 0 3 &ipic 16 8
-                                         a800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x16 */
-                                         b000 0 0 1 &ipic 17 8
-                                         b000 0 0 2 &ipic 14 8
-                                         b000 0 0 3 &ipic 15 8
-                                         b000 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x17 */
-                                         b800 0 0 1 &ipic 16 8
-                                         b800 0 0 2 &ipic 17 8
-                                         b800 0 0 3 &ipic 14 8
-                                         b800 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x18 */
-                                         c000 0 0 1 &ipic 15 8
-                                         c000 0 0 2 &ipic 16 8
-                                         c000 0 0 3 &ipic 17 8
-                                         c000 0 0 4 &ipic 14 8>;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 90000000 90000000 0 10000000
-                                  42000000 0 80000000 80000000 0 10000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
-                pci@8600 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                        /* IDSEL 0x11 */
-                                         8800 0 0 1 &ipic 14 8
-                                         8800 0 0 2 &ipic 15 8
-                                         8800 0 0 3 &ipic 16 8
-                                         8800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x12 */
-                                         9000 0 0 1 &ipic 16 8
-                                         9000 0 0 2 &ipic 17 8
-                                         9000 0 0 3 &ipic 14 8
-                                         9000 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x13 */
-                                         9800 0 0 1 &ipic 17 8
-                                         9800 0 0 2 &ipic 14 8
-                                         9800 0 0 3 &ipic 15 8
-                                         9800 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x15 */
-                                         a800 0 0 1 &ipic 14 8
-                                         a800 0 0 2 &ipic 15 8
-                                         a800 0 0 3 &ipic 16 8
-                                         a800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x16 */
-                                         b000 0 0 1 &ipic 17 8
-                                         b000 0 0 2 &ipic 14 8
-                                         b000 0 0 3 &ipic 15 8
-                                         b000 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x17 */
-                                         b800 0 0 1 &ipic 16 8
-                                         b800 0 0 2 &ipic 17 8
-                                         b800 0 0 3 &ipic 14 8
-                                         b800 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x18 */
-                                         c000 0 0 1 &ipic 15 8
-                                         c000 0 0 2 &ipic 16 8
-                                         c000 0 0 3 &ipic 17 8
-                                         c000 0 0 4 &ipic 14 8>;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 b0000000 b0000000 0 10000000
-                                  42000000 0 a0000000 a0000000 0 10000000
-                                  01000000 0 00000000 e2100000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8600 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 /* May need to remove if on a part without crypto engine */
                 crypto@30000 {
                         device_type = "crypto";
@@ -332,8 +212,127 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
         };
+
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x11 */
+                                 8800 0 0 1 &ipic 14 8
+                                 8800 0 0 2 &ipic 15 8
+                                 8800 0 0 3 &ipic 16 8
+                                 8800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x12 */
+                                 9000 0 0 1 &ipic 16 8
+                                 9000 0 0 2 &ipic 17 8
+                                 9000 0 0 3 &ipic 14 8
+                                 9000 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x13 */
+                                 9800 0 0 1 &ipic 17 8
+                                 9800 0 0 2 &ipic 14 8
+                                 9800 0 0 3 &ipic 15 8
+                                 9800 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x15 */
+                                 a800 0 0 1 &ipic 14 8
+                                 a800 0 0 2 &ipic 15 8
+                                 a800 0 0 3 &ipic 16 8
+                                 a800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x16 */
+                                 b000 0 0 1 &ipic 17 8
+                                 b000 0 0 2 &ipic 14 8
+                                 b000 0 0 3 &ipic 15 8
+                                 b000 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x17 */
+                                 b800 0 0 1 &ipic 16 8
+                                 b800 0 0 2 &ipic 17 8
+                                 b800 0 0 3 &ipic 14 8
+                                 b800 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x18 */
+                                 c000 0 0 1 &ipic 15 8
+                                 c000 0 0 2 &ipic 16 8
+                                 c000 0 0 3 &ipic 17 8
+                                 c000 0 0 4 &ipic 14 8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 90000000 90000000 0 10000000
+                          42000000 0 80000000 80000000 0 10000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
+
+        pci@e0008600 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x11 */
+                                 8800 0 0 1 &ipic 14 8
+                                 8800 0 0 2 &ipic 15 8
+                                 8800 0 0 3 &ipic 16 8
+                                 8800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x12 */
+                                 9000 0 0 1 &ipic 16 8
+                                 9000 0 0 2 &ipic 17 8
+                                 9000 0 0 3 &ipic 14 8
+                                 9000 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x13 */
+                                 9800 0 0 1 &ipic 17 8
+                                 9800 0 0 2 &ipic 14 8
+                                 9800 0 0 3 &ipic 15 8
+                                 9800 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x15 */
+                                 a800 0 0 1 &ipic 14 8
+                                 a800 0 0 2 &ipic 15 8
+                                 a800 0 0 3 &ipic 16 8
+                                 a800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x16 */
+                                 b000 0 0 1 &ipic 17 8
+                                 b000 0 0 2 &ipic 14 8
+                                 b000 0 0 3 &ipic 15 8
+                                 b000 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x17 */
+                                 b800 0 0 1 &ipic 16 8
+                                 b800 0 0 2 &ipic 17 8
+                                 b800 0 0 3 &ipic 14 8
+                                 b800 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x18 */
+                                 c000 0 0 1 &ipic 15 8
+                                 c000 0 0 2 &ipic 16 8
+                                 c000 0 0 3 &ipic 17 8
+                                 c000 0 0 4 &ipic 14 8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 b0000000 b0000000 0 10000000
+                          42000000 0 a0000000 a0000000 0 10000000
+                          01000000 0 00000000 e2100000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008600 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index e3f7c1282068..fbd1573c348b 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -34,7 +34,6 @@
                         timebase-frequency = <3EF1480>;
                         bus-frequency = <FBC5200>;
                         clock-frequency = <1F78A400>;
-                        32-bit;
                 };
         };
 
@@ -51,7 +50,6 @@
         soc8360@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -113,72 +111,11 @@
                         descriptor-types-mask = <01010ebf>;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                        /* IDSEL 0x11 AD17 */
-                                         8800 0 0 1 &ipic 14 8
-                                         8800 0 0 2 &ipic 15 8
-                                         8800 0 0 3 &ipic 16 8
-                                         8800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x12 AD18 */
-                                         9000 0 0 1 &ipic 16 8
-                                         9000 0 0 2 &ipic 17 8
-                                         9000 0 0 3 &ipic 14 8
-                                         9000 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x13 AD19 */
-                                         9800 0 0 1 &ipic 17 8
-                                         9800 0 0 2 &ipic 14 8
-                                         9800 0 0 3 &ipic 15 8
-                                         9800 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x15 AD21*/
-                                         a800 0 0 1 &ipic 14 8
-                                         a800 0 0 2 &ipic 15 8
-                                         a800 0 0 3 &ipic 16 8
-                                         a800 0 0 4 &ipic 17 8
-
-                                        /* IDSEL 0x16 AD22*/
-                                         b000 0 0 1 &ipic 17 8
-                                         b000 0 0 2 &ipic 14 8
-                                         b000 0 0 3 &ipic 15 8
-                                         b000 0 0 4 &ipic 16 8
-
-                                        /* IDSEL 0x17 AD23*/
-                                         b800 0 0 1 &ipic 16 8
-                                         b800 0 0 2 &ipic 17 8
-                                         b800 0 0 3 &ipic 14 8
-                                         b800 0 0 4 &ipic 15 8
-
-                                        /* IDSEL 0x18 AD24*/
-                                         c000 0 0 1 &ipic 15 8
-                                         c000 0 0 2 &ipic 16 8
-                                         c000 0 0 3 &ipic 17 8
-                                         c000 0 0 4 &ipic 14 8>;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 a0000000 a0000000 0 10000000
-                                  42000000 0 80000000 80000000 0 10000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 ipic: pic@700 {
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <700 100>;
-                        built-in;
                         device_type = "ipic";
                 };
 
@@ -364,11 +301,69 @@
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <80 80>;
-                        built-in;
                         big-endian;
                         interrupts = <20 8 21 8>; //high:32 low:33
                         interrupt-parent = < &ipic >;
                 };
+        };
 
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x11 AD17 */
+                                 8800 0 0 1 &ipic 14 8
+                                 8800 0 0 2 &ipic 15 8
+                                 8800 0 0 3 &ipic 16 8
+                                 8800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x12 AD18 */
+                                 9000 0 0 1 &ipic 16 8
+                                 9000 0 0 2 &ipic 17 8
+                                 9000 0 0 3 &ipic 14 8
+                                 9000 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x13 AD19 */
+                                 9800 0 0 1 &ipic 17 8
+                                 9800 0 0 2 &ipic 14 8
+                                 9800 0 0 3 &ipic 15 8
+                                 9800 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x15 AD21*/
+                                 a800 0 0 1 &ipic 14 8
+                                 a800 0 0 2 &ipic 15 8
+                                 a800 0 0 3 &ipic 16 8
+                                 a800 0 0 4 &ipic 17 8
+
+                                /* IDSEL 0x16 AD22*/
+                                 b000 0 0 1 &ipic 17 8
+                                 b000 0 0 2 &ipic 14 8
+                                 b000 0 0 3 &ipic 15 8
+                                 b000 0 0 4 &ipic 16 8
+
+                                /* IDSEL 0x17 AD23*/
+                                 b800 0 0 1 &ipic 16 8
+                                 b800 0 0 2 &ipic 17 8
+                                 b800 0 0 3 &ipic 14 8
+                                 b800 0 0 4 &ipic 15 8
+
+                                /* IDSEL 0x18 AD24*/
+                                 c000 0 0 1 &ipic 15 8
+                                 c000 0 0 2 &ipic 16 8
+                                 c000 0 0 3 &ipic 17 8
+                                 c000 0 0 4 &ipic 14 8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 a0000000 a0000000 0 10000000
+                          42000000 0 80000000 80000000 0 10000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index fc8dff9f6201..6442a717ec3b 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;       //  33 MHz, from uboot
                         bus-frequency = <0>;    // 166 MHz
                         clock-frequency = <0>;  // 825 MHz, from uboot
-                        32-bit;
                 };
         };
 
@@ -42,7 +41,6 @@
         soc8540@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00100000>;      // CCSRBAR 1M
@@ -173,105 +171,104 @@
                         interrupts = <2a 2>;
                         interrupt-parent = <&mpic>;
                 };
-                pci@8000 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <40000 40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        big-endian;
+                };
+        };
 
-                                /* IDSEL 0x02 */
-                                1000 0 0 1 &mpic 1 1
-                                1000 0 0 2 &mpic 2 1
-                                1000 0 0 3 &mpic 3 1
-                                1000 0 0 4 &mpic 4 1
+        pci@e0008000 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
 
-                                /* IDSEL 0x03 */
-                                1800 0 0 1 &mpic 4 1
-                                1800 0 0 2 &mpic 1 1
-                                1800 0 0 3 &mpic 2 1
-                                1800 0 0 4 &mpic 3 1
+                        /* IDSEL 0x02 */
+                        1000 0 0 1 &mpic 1 1
+                        1000 0 0 2 &mpic 2 1
+                        1000 0 0 3 &mpic 3 1
+                        1000 0 0 4 &mpic 4 1
 
-                                /* IDSEL 0x04 */
-                                2000 0 0 1 &mpic 3 1
-                                2000 0 0 2 &mpic 4 1
-                                2000 0 0 3 &mpic 1 1
-                                2000 0 0 4 &mpic 2 1
+                        /* IDSEL 0x03 */
+                        1800 0 0 1 &mpic 4 1
+                        1800 0 0 2 &mpic 1 1
+                        1800 0 0 3 &mpic 2 1
+                        1800 0 0 4 &mpic 3 1
 
-                                /* IDSEL 0x05 */
-                                2800 0 0 1 &mpic 2 1
-                                2800 0 0 2 &mpic 3 1
-                                2800 0 0 3 &mpic 4 1
-                                2800 0 0 4 &mpic 1 1
+                        /* IDSEL 0x04 */
+                        2000 0 0 1 &mpic 3 1
+                        2000 0 0 2 &mpic 4 1
+                        2000 0 0 3 &mpic 1 1
+                        2000 0 0 4 &mpic 2 1
 
-                                /* IDSEL 0x0c */
-                                6000 0 0 1 &mpic 1 1
-                                6000 0 0 2 &mpic 2 1
-                                6000 0 0 3 &mpic 3 1
-                                6000 0 0 4 &mpic 4 1
+                        /* IDSEL 0x05 */
+                        2800 0 0 1 &mpic 2 1
+                        2800 0 0 2 &mpic 3 1
+                        2800 0 0 3 &mpic 4 1
+                        2800 0 0 4 &mpic 1 1
 
-                                /* IDSEL 0x0d */
-                                6800 0 0 1 &mpic 4 1
-                                6800 0 0 2 &mpic 1 1
-                                6800 0 0 3 &mpic 2 1
-                                6800 0 0 4 &mpic 3 1
+                        /* IDSEL 0x0c */
+                        6000 0 0 1 &mpic 1 1
+                        6000 0 0 2 &mpic 2 1
+                        6000 0 0 3 &mpic 3 1
+                        6000 0 0 4 &mpic 4 1
 
-                                /* IDSEL 0x0e */
-                                7000 0 0 1 &mpic 3 1
-                                7000 0 0 2 &mpic 4 1
-                                7000 0 0 3 &mpic 1 1
-                                7000 0 0 4 &mpic 2 1
+                        /* IDSEL 0x0d */
+                        6800 0 0 1 &mpic 4 1
+                        6800 0 0 2 &mpic 1 1
+                        6800 0 0 3 &mpic 2 1
+                        6800 0 0 4 &mpic 3 1
 
-                                /* IDSEL 0x0f */
-                                7800 0 0 1 &mpic 2 1
-                                7800 0 0 2 &mpic 3 1
-                                7800 0 0 3 &mpic 4 1
-                                7800 0 0 4 &mpic 1 1
+                        /* IDSEL 0x0e */
+                        7000 0 0 1 &mpic 3 1
+                        7000 0 0 2 &mpic 4 1
+                        7000 0 0 3 &mpic 1 1
+                        7000 0 0 4 &mpic 2 1
 
-                                /* IDSEL 0x12 */
-                                9000 0 0 1 &mpic 1 1
-                                9000 0 0 2 &mpic 2 1
-                                9000 0 0 3 &mpic 3 1
-                                9000 0 0 4 &mpic 4 1
+                        /* IDSEL 0x0f */
+                        7800 0 0 1 &mpic 2 1
+                        7800 0 0 2 &mpic 3 1
+                        7800 0 0 3 &mpic 4 1
+                        7800 0 0 4 &mpic 1 1
 
-                                /* IDSEL 0x13 */
-                                9800 0 0 1 &mpic 4 1
-                                9800 0 0 2 &mpic 1 1
-                                9800 0 0 3 &mpic 2 1
-                                9800 0 0 4 &mpic 3 1
+                        /* IDSEL 0x12 */
+                        9000 0 0 1 &mpic 1 1
+                        9000 0 0 2 &mpic 2 1
+                        9000 0 0 3 &mpic 3 1
+                        9000 0 0 4 &mpic 4 1
 
-                                /* IDSEL 0x14 */
-                                a000 0 0 1 &mpic 3 1
-                                a000 0 0 2 &mpic 4 1
-                                a000 0 0 3 &mpic 1 1
-                                a000 0 0 4 &mpic 2 1
+                        /* IDSEL 0x13 */
+                        9800 0 0 1 &mpic 4 1
+                        9800 0 0 2 &mpic 1 1
+                        9800 0 0 3 &mpic 2 1
+                        9800 0 0 4 &mpic 3 1
 
-                                /* IDSEL 0x15 */
-                                a800 0 0 1 &mpic 2 1
-                                a800 0 0 2 &mpic 3 1
-                                a800 0 0 3 &mpic 4 1
-                                a800 0 0 4 &mpic 1 1>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8000 1000>;
-                        compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
-                        device_type = "pci";
-                };
+                        /* IDSEL 0x14 */
+                        a000 0 0 1 &mpic 3 1
+                        a000 0 0 2 &mpic 4 1
+                        a000 0 0 3 &mpic 1 1
+                        a000 0 0 4 &mpic 2 1
 
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <40000 40000>;
-                        built-in;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        big-endian;
-                };
+                        /* IDSEL 0x15 */
+                        a800 0 0 1 &mpic 2 1
+                        a800 0 0 2 &mpic 3 1
+                        a800 0 0 3 &mpic 4 1
+                        a800 0 0 4 &mpic 1 1>;
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008000 1000>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index fb0b647f8c2a..6633e07d9f4d 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;       //  33 MHz, from uboot
                         bus-frequency = <0>;    // 166 MHz
                         clock-frequency = <0>;  // 825 MHz, from uboot
-                        32-bit;
                 };
         };
 
@@ -42,10 +41,9 @@
         soc8541@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
-                reg = <e0000000 00100000>;      // CCSRBAR 1M
+                reg = <e0000000 00001000>;      // CCSRBAR 1M
                 bus-frequency = <0>;
 
                 memory-controller@2000 {
@@ -137,113 +135,109 @@
                         interrupt-parent = <&mpic>;
                 };
 
-                pci1: pci@8000 {
-                        interrupt-map-mask = <1f800 0 0 7>;
-                        interrupt-map = <
-
-                                /* IDSEL 0x10 */
-                                08000 0 0 1 &mpic 0 1
-                                08000 0 0 2 &mpic 1 1
-                                08000 0 0 3 &mpic 2 1
-                                08000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x11 */
-                                08800 0 0 1 &mpic 0 1
-                                08800 0 0 2 &mpic 1 1
-                                08800 0 0 3 &mpic 2 1
-                                08800 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x12 (Slot 1) */
-                                09000 0 0 1 &mpic 0 1
-                                09000 0 0 2 &mpic 1 1
-                                09000 0 0 3 &mpic 2 1
-                                09000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x13 (Slot 2) */
-                                09800 0 0 1 &mpic 1 1
-                                09800 0 0 2 &mpic 2 1
-                                09800 0 0 3 &mpic 3 1
-                                09800 0 0 4 &mpic 0 1
-
-                                /* IDSEL 0x14 (Slot 3) */
-                                0a000 0 0 1 &mpic 2 1
-                                0a000 0 0 2 &mpic 3 1
-                                0a000 0 0 3 &mpic 0 1
-                                0a000 0 0 4 &mpic 1 1
-
-                                /* IDSEL 0x15 (Slot 4) */
-                                0a800 0 0 1 &mpic 3 1
-                                0a800 0 0 2 &mpic 0 1
-                                0a800 0 0 3 &mpic 1 1
-                                0a800 0 0 4 &mpic 2 1
-
-                                /* Bus 1 (Tundra Bridge) */
-                                /* IDSEL 0x12 (ISA bridge) */
-                                19000 0 0 1 &mpic 0 1
-                                19000 0 0 2 &mpic 1 1
-                                19000 0 0 3 &mpic 2 1
-                                19000 0 0 4 &mpic 3 1>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8000 1000>;
-                        compatible = "fsl,mpc8540-pci";
-                        device_type = "pci";
-
-                        i8259@19000 {
-                                clock-frequency = <0>;
-                                interrupt-controller;
-                                device_type = "interrupt-controller";
-                                reg = <19000 0 0 0 1>;
-                                #address-cells = <0>;
-                                #interrupt-cells = <2>;
-                                built-in;
-                                compatible = "chrp,iic";
-                                big-endian;
-                                interrupts = <1>;
-                                interrupt-parent = <&pci1>;
-                        };
-                };
-
-                pci@9000 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                /* IDSEL 0x15 */
-                                a800 0 0 1 &mpic b 1
-                                a800 0 0 2 &mpic b 1
-                                a800 0 0 3 &mpic b 1
-                                a800 0 0 4 &mpic b 1>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <19 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 a0000000 a0000000 0 20000000
-                                  01000000 0 00000000 e3000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <9000 1000>;
-                        compatible = "fsl,mpc8540-pci";
-                        device_type = "pci";
-                };
-
                 mpic: pic@40000 {
                         clock-frequency = <0>;
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <40000 40000>;
-                        built-in;
                         compatible = "chrp,open-pic";
                         device_type = "open-pic";
                         big-endian;
                 };
         };
+
+        pci1: pci@e0008000 {
+                interrupt-map-mask = <1f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x10 */
+                        08000 0 0 1 &mpic 0 1
+                        08000 0 0 2 &mpic 1 1
+                        08000 0 0 3 &mpic 2 1
+                        08000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x11 */
+                        08800 0 0 1 &mpic 0 1
+                        08800 0 0 2 &mpic 1 1
+                        08800 0 0 3 &mpic 2 1
+                        08800 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x12 (Slot 1) */
+                        09000 0 0 1 &mpic 0 1
+                        09000 0 0 2 &mpic 1 1
+                        09000 0 0 3 &mpic 2 1
+                        09000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x13 (Slot 2) */
+                        09800 0 0 1 &mpic 1 1
+                        09800 0 0 2 &mpic 2 1
+                        09800 0 0 3 &mpic 3 1
+                        09800 0 0 4 &mpic 0 1
+
+                        /* IDSEL 0x14 (Slot 3) */
+                        0a000 0 0 1 &mpic 2 1
+                        0a000 0 0 2 &mpic 3 1
+                        0a000 0 0 3 &mpic 0 1
+                        0a000 0 0 4 &mpic 1 1
+
+                        /* IDSEL 0x15 (Slot 4) */
+                        0a800 0 0 1 &mpic 3 1
+                        0a800 0 0 2 &mpic 0 1
+                        0a800 0 0 3 &mpic 1 1
+                        0a800 0 0 4 &mpic 2 1
+
+                        /* Bus 1 (Tundra Bridge) */
+                        /* IDSEL 0x12 (ISA bridge) */
+                        19000 0 0 1 &mpic 0 1
+                        19000 0 0 2 &mpic 1 1
+                        19000 0 0 3 &mpic 2 1
+                        19000 0 0 4 &mpic 3 1>;
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008000 1000>;
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+
+                i8259@19000 {
+                        interrupt-controller;
+                        device_type = "interrupt-controller";
+                        reg = <19000 0 0 0 1>;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        compatible = "chrp,iic";
+                        interrupts = <1>;
+                        interrupt-parent = <&pci1>;
+                };
+        };
+
+        pci@e0009000 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x15 */
+                        a800 0 0 1 &mpic b 1
+                        a800 0 0 2 &mpic b 1
+                        a800 0 0 3 &mpic b 1
+                        a800 0 0 4 &mpic b 1>;
+                interrupt-parent = <&mpic>;
+                interrupts = <19 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 a0000000 a0000000 0 20000000
+                          01000000 0 00000000 e3000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0009000 1000>;
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 3e79bf0a3159..3f9d15cf13e0 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
-                        32-bit;
                 };
         };
 
@@ -42,19 +41,9 @@
         soc8544@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
 
-
-                ranges = <00001000 e0001000 000ff000
-                          80000000 80000000 20000000
-                          a0000000 a0000000 10000000
-                          b0000000 b0000000 00100000
-                          c0000000 c0000000 20000000
-                          b0100000 b0100000 00100000
-                          e1000000 e1000000 00010000
-                          e1010000 e1010000 00010000
-                          e1020000 e1020000 00010000>;
+                ranges = <00000000 e0000000 00100000>;
                 reg = <e0000000 00001000>;      // CCSRBAR 1M
                 bus-frequency = <0>;            // Filled out by uboot.
 
@@ -149,115 +138,173 @@
                         interrupt-parent = <&mpic>;
                 };
 
-                pci@8000 {
-                        compatible = "fsl,mpc8540-pci";
-                        device_type = "pci";
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                /* IDSEL 0x11 J17 Slot 1 */
-                                8800 0 0 1 &mpic 2 1
-                                8800 0 0 2 &mpic 3 1
-                                8800 0 0 3 &mpic 4 1
-                                8800 0 0 4 &mpic 1 1
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <e0000 1000>;
+                        fsl,has-rstcr;
+                };
 
-                                /* IDSEL 0x12 J16 Slot 2 */
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <40000 40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        big-endian;
+                };
+        };
 
-                                9000 0 0 1 &mpic 3 1
-                                9000 0 0 2 &mpic 4 1
-                                9000 0 0 3 &mpic 2 1
-                                9000 0 0 4 &mpic 1 1>;
+        pci@e0008000 {
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x11 J17 Slot 1 */
+                        8800 0 0 1 &mpic 2 1
+                        8800 0 0 2 &mpic 3 1
+                        8800 0 0 3 &mpic 4 1
+                        8800 0 0 4 &mpic 1 1
+
+                        /* IDSEL 0x12 J16 Slot 2 */
+
+                        9000 0 0 1 &mpic 3 1
+                        9000 0 0 2 &mpic 4 1
+                        9000 0 0 3 &mpic 2 1
+                        9000 0 0 4 &mpic 1 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 c0000000 c0000000 0 20000000
+                          01000000 0 00000000 e1000000 0 00010000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008000 1000>;
+        };
 
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 c0000000 c0000000 0 20000000
-                                  01000000 0 00000000 e1000000 0 00010000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
+        pcie@e0009000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0009000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 e1010000 0 00010000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <1a 2>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 4 1
+                        0000 0 0 2 &mpic 5 1
+                        0000 0 0 3 &mpic 6 1
+                        0000 0 0 4 &mpic 7 1
+                        >;
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
                         #size-cells = <2>;
                         #address-cells = <3>;
-                        reg = <8000 1000>;
-                };
-
-                pcie@9000 {
-                        compatible = "fsl,mpc8548-pcie";
                         device_type = "pci";
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <9000 1000>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e1010000 0 00010000>;
-                        clock-frequency = <1fca055>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <1a 2>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 4 1
-                                0000 0 0 2 &mpic 5 1
-                                0000 0 0 3 &mpic 6 1
-                                0000 0 0 4 &mpic 7 1
-                                >;
+                        ranges = <02000000 0 80000000
+                                  02000000 0 80000000
+                                  0 20000000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00010000>;
                 };
+        };
 
-                pcie@a000 {
-                        compatible = "fsl,mpc8548-pcie";
-                        device_type = "pci";
-                        #interrupt-cells = <1>;
+        pcie@e000a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e000a000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 a0000000 a0000000 0 10000000
+                          01000000 0 00000000 e1020000 0 00010000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <19 2>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 0 1
+                        0000 0 0 2 &mpic 1 1
+                        0000 0 0 3 &mpic 2 1
+                        0000 0 0 4 &mpic 3 1
+                        >;
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
                         #size-cells = <2>;
                         #address-cells = <3>;
-                        reg = <a000 1000>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 a0000000 a0000000 0 10000000
-                                  01000000 0 00000000 e1020000 0 00010000>;
-                        clock-frequency = <1fca055>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <19 2>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 0 1
-                                0000 0 0 2 &mpic 1 1
-                                0000 0 0 3 &mpic 2 1
-                                0000 0 0 4 &mpic 3 1
-                                >;
+                        device_type = "pci";
+                        ranges = <02000000 0 a0000000
+                                  02000000 0 a0000000
+                                  0 10000000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00010000>;
                 };
+        };
 
-                pcie@b000 {
-                        compatible = "fsl,mpc8548-pcie";
-                        device_type = "pci";
-                        #interrupt-cells = <1>;
+        pcie@e000b000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e000b000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 b0000000 b0000000 0 00100000
+                          01000000 0 00000000 b0100000 0 00100000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <1b 2>;
+                interrupt-map-mask = <fb00 0 0 0>;
+                interrupt-map = <
+                        // IDSEL 0x1c  USB
+                        e000 0 0 0 &i8259 c 2
+                        e100 0 0 0 &i8259 9 2
+                        e200 0 0 0 &i8259 a 2
+                        e300 0 0 0 &i8259 b 2
+
+                        // IDSEL 0x1d  Audio
+                        e800 0 0 0 &i8259 6 2
+
+                        // IDSEL 0x1e Legacy
+                        f000 0 0 0 &i8259 7 2
+                        f100 0 0 0 &i8259 7 2
+
+                        // IDSEL 0x1f IDE/SATA
+                        f800 0 0 0 &i8259 e 2
+                        f900 0 0 0 &i8259 5 2
+                >;
+
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
                         #size-cells = <2>;
                         #address-cells = <3>;
-                        reg = <b000 1000>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 b0000000 b0000000 0 00100000
-                                  01000000 0 00000000 b0100000 0 00100000>;
-                        clock-frequency = <1fca055>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <1b 2>;
-                        interrupt-map-mask = <fb00 0 0 0>;
-                        interrupt-map = <
-                                // IDSEL 0x1c  USB
-                                e000 0 0 0 &i8259 c 2
-                                e100 0 0 0 &i8259 9 2
-                                e200 0 0 0 &i8259 a 2
-                                e300 0 0 0 &i8259 b 2
-
-                                // IDSEL 0x1d  Audio
-                                e800 0 0 0 &i8259 6 2
-
-                                // IDSEL 0x1e Legacy
-                                f000 0 0 0 &i8259 7 2
-                                f100 0 0 0 &i8259 7 2
-
-                                // IDSEL 0x1f IDE/SATA
-                                f800 0 0 0 &i8259 e 2
-                                f900 0 0 0 &i8259 5 2
-                        >;
+                        device_type = "pci";
+                        ranges = <02000000 0 b0000000
+                                  02000000 0 b0000000
+                                  0 00100000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00100000>;
+
                         uli1575@0 {
                                 reg = <0 0 0 0 0>;
                                 #size-cells = <2>;
@@ -265,95 +312,63 @@
                                 ranges = <02000000 0 b0000000
                                           02000000 0 b0000000
                                           0 00100000
+
                                           01000000 0 00000000
                                           01000000 0 00000000
                                           0 00100000>;
-
-                                pci_bridge@0 {
-                                        reg = <0 0 0 0 0>;
-                                        #size-cells = <2>;
-                                        #address-cells = <3>;
-                                        ranges = <02000000 0 b0000000
-                                                  02000000 0 b0000000
-                                                  0 00100000
-                                                  01000000 0 00000000
-                                                  01000000 0 00000000
-                                                  0 00100000>; 
-
-                                        isa@1e {
-                                                device_type = "isa";
+                                isa@1e {
+                                        device_type = "isa";
+                                        #interrupt-cells = <2>;
+                                        #size-cells = <1>;
+                                        #address-cells = <2>;
+                                        reg = <f000 0 0 0 0>;
+                                        ranges = <1 0
+                                                  01000000 0 0
+                                                  00001000>;
+                                        interrupt-parent = <&i8259>;
+
+                                        i8259: interrupt-controller@20 {
+                                                reg = <1 20 2
+                                                       1 a0 2
+                                                       1 4d0 2>;
+                                                interrupt-controller;
+                                                device_type = "interrupt-controller";
+                                                #address-cells = <0>;
                                                 #interrupt-cells = <2>;
-                                                #size-cells = <1>;
-                                                #address-cells = <2>;
-                                                reg = <f000 0 0 0 0>;
-                                                ranges = <1 0
-                                                          01000000 0 0
-                                                          00001000>;
+                                                compatible = "chrp,iic";
+                                                interrupts = <9 2>;
+                                                interrupt-parent = <&mpic>;
+                                        };
+
+                                        i8042@60 {
+                                                #size-cells = <0>;
+                                                #address-cells = <1>;
+                                                reg = <1 60 1 1 64 1>;
+                                                interrupts = <1 3 c 3>;
                                                 interrupt-parent = <&i8259>;
 
-                                                i8259: interrupt-controller@20 {
-                                                        reg = <1 20 2
-                                                               1 a0 2
-                                                               1 4d0 2>;
-                                                        clock-frequency = <0>;
-                                                        interrupt-controller;
-                                                        device_type = "interrupt-controller";
-                                                        #address-cells = <0>;
-                                                        #interrupt-cells = <2>;
-                                                        built-in;
-                                                        compatible = "chrp,iic";
-                                                        interrupts = <9 2>;
-                                                        interrupt-parent = <&mpic>;
+                                                keyboard@0 {
+                                                        reg = <0>;
+                                                        compatible = "pnpPNP,303";
                                                 };
 
-                                                i8042@60 {
-                                                        #size-cells = <0>;
-                                                        #address-cells = <1>;
-                                                        reg = <1 60 1 1 64 1>;
-                                                        interrupts = <1 3 c 3>;
-                                                        interrupt-parent = <&i8259>;
-
-                                                        keyboard@0 {
-                                                                reg = <0>;
-                                                                compatible = "pnpPNP,303";
-                                                        };
-
-                                                        mouse@1 {
-                                                                reg = <1>;
-                                                                compatible = "pnpPNP,f03";
-                                                        };
+                                                mouse@1 {
+                                                        reg = <1>;
+                                                        compatible = "pnpPNP,f03";
                                                 };
+                                        };
 
-                                                rtc@70 {
-                                                        compatible = "pnpPNP,b00";
-                                                        reg = <1 70 2>;
-                                                };
+                                        rtc@70 {
+                                                compatible = "pnpPNP,b00";
+                                                reg = <1 70 2>;
+                                        };
 
-                                                gpio@400 {
-                                                        reg = <1 400 80>;
-                                                };
+                                        gpio@400 {
+                                                reg = <1 400 80>;
                                         };
                                 };
                         };
-
                 };
 
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8548-guts";
-                        reg = <e0000 1000>;
-                        fsl,has-rstcr;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <40000 40000>;
-                        built-in;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        big-endian;
-                };
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index d215d21fff42..69ca5025d972 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;       //  33 MHz, from uboot
                         bus-frequency = <0>;    // 166 MHz
                         clock-frequency = <0>;  // 825 MHz, from uboot
-                        32-bit;
                 };
         };
 
@@ -42,15 +41,8 @@
         soc8548@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
-                ranges = <00001000 e0001000 000ff000
-                          80000000 80000000 10000000
-                          e2000000 e2000000 00800000
-                          90000000 90000000 10000000
-                          e2800000 e2800000 00800000
-                          a0000000 a0000000 20000000
-                          e3000000 e3000000 01000000>;
+                ranges = <00000000 e0000000 00100000>;
                 reg = <e0000000 00001000>;      // CCSRBAR
                 bus-frequency = <0>;
 
@@ -189,215 +181,225 @@
                         fsl,has-rstcr;
                 };
 
-                pci@8000 {
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <40000 40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        big-endian;
+                };
+        };
+
+        pci@e0008000 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x4 (PCIX Slot 2) */
+                        02000 0 0 1 &mpic 0 1
+                        02000 0 0 2 &mpic 1 1
+                        02000 0 0 3 &mpic 2 1
+                        02000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x5 (PCIX Slot 3) */
+                        02800 0 0 1 &mpic 1 1
+                        02800 0 0 2 &mpic 2 1
+                        02800 0 0 3 &mpic 3 1
+                        02800 0 0 4 &mpic 0 1
+
+                        /* IDSEL 0x6 (PCIX Slot 4) */
+                        03000 0 0 1 &mpic 2 1
+                        03000 0 0 2 &mpic 3 1
+                        03000 0 0 3 &mpic 0 1
+                        03000 0 0 4 &mpic 1 1
+
+                        /* IDSEL 0x8 (PCIX Slot 5) */
+                        04000 0 0 1 &mpic 0 1
+                        04000 0 0 2 &mpic 1 1
+                        04000 0 0 3 &mpic 2 1
+                        04000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0xC (Tsi310 bridge) */
+                        06000 0 0 1 &mpic 0 1
+                        06000 0 0 2 &mpic 1 1
+                        06000 0 0 3 &mpic 2 1
+                        06000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x14 (Slot 2) */
+                        0a000 0 0 1 &mpic 0 1
+                        0a000 0 0 2 &mpic 1 1
+                        0a000 0 0 3 &mpic 2 1
+                        0a000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x15 (Slot 3) */
+                        0a800 0 0 1 &mpic 1 1
+                        0a800 0 0 2 &mpic 2 1
+                        0a800 0 0 3 &mpic 3 1
+                        0a800 0 0 4 &mpic 0 1
+
+                        /* IDSEL 0x16 (Slot 4) */
+                        0b000 0 0 1 &mpic 2 1
+                        0b000 0 0 2 &mpic 3 1
+                        0b000 0 0 3 &mpic 0 1
+                        0b000 0 0 4 &mpic 1 1
+
+                        /* IDSEL 0x18 (Slot 5) */
+                        0c000 0 0 1 &mpic 0 1
+                        0c000 0 0 2 &mpic 1 1
+                        0c000 0 0 3 &mpic 2 1
+                        0c000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
+                        0E000 0 0 1 &mpic 0 1
+                        0E000 0 0 2 &mpic 1 1
+                        0E000 0 0 3 &mpic 2 1
+                        0E000 0 0 4 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 80000000 80000000 0 10000000
+                          01000000 0 00000000 e2000000 0 00800000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008000 1000>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
+
+                pci_bridge@1c {
                         interrupt-map-mask = <f800 0 0 7>;
                         interrupt-map = <
-                                /* IDSEL 0x4 (PCIX Slot 2) */
-                                02000 0 0 1 &mpic 0 1
-                                02000 0 0 2 &mpic 1 1
-                                02000 0 0 3 &mpic 2 1
-                                02000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x5 (PCIX Slot 3) */
-                                02800 0 0 1 &mpic 1 1
-                                02800 0 0 2 &mpic 2 1
-                                02800 0 0 3 &mpic 3 1
-                                02800 0 0 4 &mpic 0 1
-
-                                /* IDSEL 0x6 (PCIX Slot 4) */
-                                03000 0 0 1 &mpic 2 1
-                                03000 0 0 2 &mpic 3 1
-                                03000 0 0 3 &mpic 0 1
-                                03000 0 0 4 &mpic 1 1
-
-                                /* IDSEL 0x8 (PCIX Slot 5) */
-                                04000 0 0 1 &mpic 0 1
-                                04000 0 0 2 &mpic 1 1
-                                04000 0 0 3 &mpic 2 1
-                                04000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0xC (Tsi310 bridge) */
-                                06000 0 0 1 &mpic 0 1
-                                06000 0 0 2 &mpic 1 1
-                                06000 0 0 3 &mpic 2 1
-                                06000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x14 (Slot 2) */
-                                0a000 0 0 1 &mpic 0 1
-                                0a000 0 0 2 &mpic 1 1
-                                0a000 0 0 3 &mpic 2 1
-                                0a000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x15 (Slot 3) */
-                                0a800 0 0 1 &mpic 1 1
-                                0a800 0 0 2 &mpic 2 1
-                                0a800 0 0 3 &mpic 3 1
-                                0a800 0 0 4 &mpic 0 1
-
-                                /* IDSEL 0x16 (Slot 4) */
-                                0b000 0 0 1 &mpic 2 1
-                                0b000 0 0 2 &mpic 3 1
-                                0b000 0 0 3 &mpic 0 1
-                                0b000 0 0 4 &mpic 1 1
-
-                                /* IDSEL 0x18 (Slot 5) */
-                                0c000 0 0 1 &mpic 0 1
-                                0c000 0 0 2 &mpic 1 1
-                                0c000 0 0 3 &mpic 2 1
-                                0c000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
-                                0E000 0 0 1 &mpic 0 1
-                                0E000 0 0 2 &mpic 1 1
-                                0E000 0 0 3 &mpic 2 1
-                                0E000 0 0 4 &mpic 3 1>;
 
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 80000000 80000000 0 10000000
-                                  01000000 0 00000000 e2000000 0 00800000>;
-                        clock-frequency = <3f940aa>;
+                                /* IDSEL 0x00 (PrPMC Site) */
+                                0000 0 0 1 &mpic 0 1
+                                0000 0 0 2 &mpic 1 1
+                                0000 0 0 3 &mpic 2 1
+                                0000 0 0 4 &mpic 3 1
+
+                                /* IDSEL 0x04 (VIA chip) */
+                                2000 0 0 1 &mpic 0 1
+                                2000 0 0 2 &mpic 1 1
+                                2000 0 0 3 &mpic 2 1
+                                2000 0 0 4 &mpic 3 1
+
+                                /* IDSEL 0x05 (8139) */
+                                2800 0 0 1 &mpic 1 1
+
+                                /* IDSEL 0x06 (Slot 6) */
+                                3000 0 0 1 &mpic 2 1
+                                3000 0 0 2 &mpic 3 1
+                                3000 0 0 3 &mpic 0 1
+                                3000 0 0 4 &mpic 1 1
+
+                                /* IDESL 0x07 (Slot 7) */
+                                3800 0 0 1 &mpic 3 1
+                                3800 0 0 2 &mpic 0 1
+                                3800 0 0 3 &mpic 1 1
+                                3800 0 0 4 &mpic 2 1>;
+
+                        reg = <e000 0 0 0 0>;
                         #interrupt-cells = <1>;
                         #size-cells = <2>;
                         #address-cells = <3>;
-                        reg = <8000 1000>;
-                        compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
-                        device_type = "pci";
+                        ranges = <02000000 0 80000000
+                                  02000000 0 80000000
+                                  0 20000000
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00080000>;
+                        clock-frequency = <1fca055>;
 
-                        pci_bridge@1c {
-                                interrupt-map-mask = <f800 0 0 7>;
-                                interrupt-map = <
-
-                                        /* IDSEL 0x00 (PrPMC Site) */
-                                        0000 0 0 1 &mpic 0 1
-                                        0000 0 0 2 &mpic 1 1
-                                        0000 0 0 3 &mpic 2 1
-                                        0000 0 0 4 &mpic 3 1
-
-                                        /* IDSEL 0x04 (VIA chip) */
-                                        2000 0 0 1 &mpic 0 1
-                                        2000 0 0 2 &mpic 1 1
-                                        2000 0 0 3 &mpic 2 1
-                                        2000 0 0 4 &mpic 3 1
-
-                                        /* IDSEL 0x05 (8139) */
-                                        2800 0 0 1 &mpic 1 1
-
-                                        /* IDSEL 0x06 (Slot 6) */
-                                        3000 0 0 1 &mpic 2 1
-                                        3000 0 0 2 &mpic 3 1
-                                        3000 0 0 3 &mpic 0 1
-                                        3000 0 0 4 &mpic 1 1
-
-                                        /* IDESL 0x07 (Slot 7) */
-                                        3800 0 0 1 &mpic 3 1
-                                        3800 0 0 2 &mpic 0 1
-                                        3800 0 0 3 &mpic 1 1
-                                        3800 0 0 4 &mpic 2 1>;
-
-                                reg = <e000 0 0 0 0>;
-                                #interrupt-cells = <1>;
-                                #size-cells = <2>;
-                                #address-cells = <3>;
-                                ranges = <02000000 0 80000000
-                                          02000000 0 80000000
-                                          0 20000000
-                                          01000000 0 00000000
-                                          01000000 0 00000000
-                                          0 00080000>;
-                                clock-frequency = <1fca055>;
-
-                                isa@4 {
-                                        device_type = "isa";
+                        isa@4 {
+                                device_type = "isa";
+                                #interrupt-cells = <2>;
+                                #size-cells = <1>;
+                                #address-cells = <2>;
+                                reg = <2000 0 0 0 0>;
+                                ranges = <1 0 01000000 0 0 00001000>;
+                                interrupt-parent = <&i8259>;
+
+                                i8259: interrupt-controller@20 {
+                                        interrupt-controller;
+                                        device_type = "interrupt-controller";
+                                        reg = <1 20 2
+                                               1 a0 2
+                                               1 4d0 2>;
+                                        #address-cells = <0>;
                                         #interrupt-cells = <2>;
-                                        #size-cells = <1>;
-                                        #address-cells = <2>;
-                                        reg = <2000 0 0 0 0>;
-                                        ranges = <1 0 01000000 0 0 00001000>;
-                                        interrupt-parent = <&i8259>;
-
-                                        i8259: interrupt-controller@20 {
-                                                clock-frequency = <0>;
-                                                interrupt-controller;
-                                                device_type = "interrupt-controller";
-                                                reg = <1 20 2
-                                                       1 a0 2
-                                                       1 4d0 2>;
-                                                #address-cells = <0>;
-                                                #interrupt-cells = <2>;
-                                                built-in;
-                                                compatible = "chrp,iic";
-                                                interrupts = <0 1>;
-                                                interrupt-parent = <&mpic>;
-                                        };
-
-                                        rtc@70 {
-                                                compatible = "pnpPNP,b00";
-                                                reg = <1 70 2>;
-                                        };
+                                        compatible = "chrp,iic";
+                                        interrupts = <0 1>;
+                                        interrupt-parent = <&mpic>;
                                 };
-                        };
-                };
 
-                pci@9000 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                /* IDSEL 0x15 */
-                                a800 0 0 1 &mpic b 1
-                                a800 0 0 2 &mpic 1 1
-                                a800 0 0 3 &mpic 2 1
-                                a800 0 0 4 &mpic 3 1>;
-
-                        interrupt-parent = <&mpic>;
-                        interrupts = <19 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 90000000 90000000 0 10000000
-                                  01000000 0 00000000 e2800000 0 00800000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <9000 1000>;
-                        compatible = "fsl,mpc8540-pci";
-                        device_type = "pci";
+                                rtc@70 {
+                                        compatible = "pnpPNP,b00";
+                                        reg = <1 70 2>;
+                                };
+                        };
                 };
-                /* PCI Express */
-                pcie@a000 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
+        };
 
-                                /* IDSEL 0x0 (PEX) */
-                                00000 0 0 1 &mpic 0 1
-                                00000 0 0 2 &mpic 1 1
-                                00000 0 0 3 &mpic 2 1
-                                00000 0 0 4 &mpic 3 1>;
+        pci@e0009000 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x15 */
+                        a800 0 0 1 &mpic b 1
+                        a800 0 0 2 &mpic 1 1
+                        a800 0 0 3 &mpic 2 1
+                        a800 0 0 4 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <19 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 90000000 90000000 0 10000000
+                          01000000 0 00000000 e2800000 0 00800000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0009000 1000>;
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+        };
 
-                        interrupt-parent = <&mpic>;
-                        interrupts = <1a 2>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 a0000000 a0000000 0 20000000
-                                  01000000 0 00000000 e3000000 0 08000000>;
-                        clock-frequency = <1fca055>;
-                        #interrupt-cells = <1>;
+        pcie@e000a000 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x0 (PEX) */
+                        00000 0 0 1 &mpic 0 1
+                        00000 0 0 2 &mpic 1 1
+                        00000 0 0 3 &mpic 2 1
+                        00000 0 0 4 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <1a 2>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 a0000000 a0000000 0 20000000
+                          01000000 0 00000000 e3000000 0 08000000>;
+                clock-frequency = <1fca055>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e000a000 1000>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
                         #size-cells = <2>;
                         #address-cells = <3>;
-                        reg = <a000 1000>;
-                        compatible = "fsl,mpc8548-pcie";
                         device_type = "pci";
-                };
+                        ranges = <02000000 0 a0000000
+                                  02000000 0 a0000000
+                                  0 20000000
 
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <40000 40000>;
-                        built-in;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        big-endian;
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 08000000>;
                 };
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index c3c888252121..99199295147e 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;       //  33 MHz, from uboot
                         bus-frequency = <0>;    // 166 MHz
                         clock-frequency = <0>;  // 825 MHz, from uboot
-                        32-bit;
                 };
         };
 
@@ -42,10 +41,9 @@
         soc8555@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
-                reg = <e0000000 00100000>;      // CCSRBAR 1M
+                reg = <e0000000 00001000>;      // CCSRBAR 1M
                 bus-frequency = <0>;
 
                 memory-controller@2000 {
@@ -137,113 +135,109 @@
                         interrupt-parent = <&mpic>;
                 };
 
-                pci1: pci@8000 {
-                        interrupt-map-mask = <1f800 0 0 7>;
-                        interrupt-map = <
-
-                                /* IDSEL 0x10 */
-                                08000 0 0 1 &mpic 0 1
-                                08000 0 0 2 &mpic 1 1
-                                08000 0 0 3 &mpic 2 1
-                                08000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x11 */
-                                08800 0 0 1 &mpic 0 1
-                                08800 0 0 2 &mpic 1 1
-                                08800 0 0 3 &mpic 2 1
-                                08800 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x12 (Slot 1) */
-                                09000 0 0 1 &mpic 0 1
-                                09000 0 0 2 &mpic 1 1
-                                09000 0 0 3 &mpic 2 1
-                                09000 0 0 4 &mpic 3 1
-
-                                /* IDSEL 0x13 (Slot 2) */
-                                09800 0 0 1 &mpic 1 1
-                                09800 0 0 2 &mpic 2 1
-                                09800 0 0 3 &mpic 3 1
-                                09800 0 0 4 &mpic 0 1
-
-                                /* IDSEL 0x14 (Slot 3) */
-                                0a000 0 0 1 &mpic 2 1
-                                0a000 0 0 2 &mpic 3 1
-                                0a000 0 0 3 &mpic 0 1
-                                0a000 0 0 4 &mpic 1 1
-
-                                /* IDSEL 0x15 (Slot 4) */
-                                0a800 0 0 1 &mpic 3 1
-                                0a800 0 0 2 &mpic 0 1
-                                0a800 0 0 3 &mpic 1 1
-                                0a800 0 0 4 &mpic 2 1
-
-                                /* Bus 1 (Tundra Bridge) */
-                                /* IDSEL 0x12 (ISA bridge) */
-                                19000 0 0 1 &mpic 0 1
-                                19000 0 0 2 &mpic 1 1
-                                19000 0 0 3 &mpic 2 1
-                                19000 0 0 4 &mpic 3 1>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8000 1000>;
-                        compatible = "fsl,mpc8540-pci";
-                        device_type = "pci";
-
-                        i8259@19000 {
-                                clock-frequency = <0>;
-                                interrupt-controller;
-                                device_type = "interrupt-controller";
-                                reg = <19000 0 0 0 1>;
-                                #address-cells = <0>;
-                                #interrupt-cells = <2>;
-                                built-in;
-                                compatible = "chrp,iic";
-                                big-endian;
-                                interrupts = <1>;
-                                interrupt-parent = <&pci1>;
-                        };
-                };
-
-                pci@9000 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                /* IDSEL 0x15 */
-                                a800 0 0 1 &mpic b 1
-                                a800 0 0 2 &mpic b 1
-                                a800 0 0 3 &mpic b 1
-                                a800 0 0 4 &mpic b 1>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <19 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 a0000000 a0000000 0 20000000
-                                  01000000 0 00000000 e3000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <9000 1000>;
-                        compatible = "fsl,mpc8540-pci";
-                        device_type = "pci";
-                };
-
                 mpic: pic@40000 {
                         clock-frequency = <0>;
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <40000 40000>;
-                        built-in;
                         compatible = "chrp,open-pic";
                         device_type = "open-pic";
                         big-endian;
                 };
         };
+
+        pci1: pci@e0008000 {
+                interrupt-map-mask = <1f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x10 */
+                        08000 0 0 1 &mpic 0 1
+                        08000 0 0 2 &mpic 1 1
+                        08000 0 0 3 &mpic 2 1
+                        08000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x11 */
+                        08800 0 0 1 &mpic 0 1
+                        08800 0 0 2 &mpic 1 1
+                        08800 0 0 3 &mpic 2 1
+                        08800 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x12 (Slot 1) */
+                        09000 0 0 1 &mpic 0 1
+                        09000 0 0 2 &mpic 1 1
+                        09000 0 0 3 &mpic 2 1
+                        09000 0 0 4 &mpic 3 1
+
+                        /* IDSEL 0x13 (Slot 2) */
+                        09800 0 0 1 &mpic 1 1
+                        09800 0 0 2 &mpic 2 1
+                        09800 0 0 3 &mpic 3 1
+                        09800 0 0 4 &mpic 0 1
+
+                        /* IDSEL 0x14 (Slot 3) */
+                        0a000 0 0 1 &mpic 2 1
+                        0a000 0 0 2 &mpic 3 1
+                        0a000 0 0 3 &mpic 0 1
+                        0a000 0 0 4 &mpic 1 1
+
+                        /* IDSEL 0x15 (Slot 4) */
+                        0a800 0 0 1 &mpic 3 1
+                        0a800 0 0 2 &mpic 0 1
+                        0a800 0 0 3 &mpic 1 1
+                        0a800 0 0 4 &mpic 2 1
+
+                        /* Bus 1 (Tundra Bridge) */
+                        /* IDSEL 0x12 (ISA bridge) */
+                        19000 0 0 1 &mpic 0 1
+                        19000 0 0 2 &mpic 1 1
+                        19000 0 0 3 &mpic 2 1
+                        19000 0 0 4 &mpic 3 1>;
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008000 1000>;
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+
+                i8259@19000 {
+                        interrupt-controller;
+                        device_type = "interrupt-controller";
+                        reg = <19000 0 0 0 1>;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        compatible = "chrp,iic";
+                        interrupts = <1>;
+                        interrupt-parent = <&pci1>;
+                };
+        };
+
+        pci@e0009000 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                        /* IDSEL 0x15 */
+                        a800 0 0 1 &mpic b 1
+                        a800 0 0 2 &mpic b 1
+                        a800 0 0 3 &mpic b 1
+                        a800 0 0 4 &mpic b 1>;
+                interrupt-parent = <&mpic>;
+                interrupts = <19 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 a0000000 a0000000 0 20000000
+                          01000000 0 00000000 e3000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0009000 1000>;
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 16dbe848cecf..5577ec1f312b 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <04ead9a0>;
                         bus-frequency = <13ab6680>;
                         clock-frequency = <312c8040>;
-                        32-bit;
                 };
         };
 
@@ -42,7 +41,6 @@
         soc8560@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
@@ -132,109 +130,17 @@
                         phy-handle = <&phy1>;
                 };
 
-                pci@8000 {
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
-                        device_type = "pci";
-                        reg = <8000 1000>;
-                        clock-frequency = <3f940aa>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                        /* IDSEL 0x2 */
-                                         1000 0 0 1 &mpic 1 1
-                                         1000 0 0 2 &mpic 2 1
-                                         1000 0 0 3 &mpic 3 1
-                                         1000 0 0 4 &mpic 4 1
-
-                                        /* IDSEL 0x3 */
-                                         1800 0 0 1 &mpic 4 1
-                                         1800 0 0 2 &mpic 1 1
-                                         1800 0 0 3 &mpic 2 1
-                                         1800 0 0 4 &mpic 3 1
-
-                                        /* IDSEL 0x4 */
-                                         2000 0 0 1 &mpic 3 1
-                                         2000 0 0 2 &mpic 4 1
-                                         2000 0 0 3 &mpic 1 1
-                                         2000 0 0 4 &mpic 2 1
-
-                                        /* IDSEL 0x5  */
-                                         2800 0 0 1 &mpic 2 1
-                                         2800 0 0 2 &mpic 3 1
-                                         2800 0 0 3 &mpic 4 1
-                                         2800 0 0 4 &mpic 1 1
-
-                                        /* IDSEL 12 */
-                                         6000 0 0 1 &mpic 1 1
-                                         6000 0 0 2 &mpic 2 1
-                                         6000 0 0 3 &mpic 3 1
-                                         6000 0 0 4 &mpic 4 1
-
-                                        /* IDSEL 13 */
-                                         6800 0 0 1 &mpic 4 1
-                                         6800 0 0 2 &mpic 1 1
-                                         6800 0 0 3 &mpic 2 1
-                                         6800 0 0 4 &mpic 3 1
-
-                                        /* IDSEL 14*/
-                                         7000 0 0 1 &mpic 3 1
-                                         7000 0 0 2 &mpic 4 1
-                                         7000 0 0 3 &mpic 1 1
-                                         7000 0 0 4 &mpic 2 1
-
-                                        /* IDSEL 15 */
-                                         7800 0 0 1 &mpic 2 1
-                                         7800 0 0 2 &mpic 3 1
-                                         7800 0 0 3 &mpic 4 1
-                                         7800 0 0 4 &mpic 1 1
-
-                                        /* IDSEL 18 */
-                                         9000 0 0 1 &mpic 1 1
-                                         9000 0 0 2 &mpic 2 1
-                                         9000 0 0 3 &mpic 3 1
-                                         9000 0 0 4 &mpic 4 1
-
-                                        /* IDSEL 19 */
-                                         9800 0 0 1 &mpic 4 1
-                                         9800 0 0 2 &mpic 1 1
-                                         9800 0 0 3 &mpic 2 1
-                                         9800 0 0 4 &mpic 3 1
-
-                                        /* IDSEL 20 */
-                                         a000 0 0 1 &mpic 3 1
-                                         a000 0 0 2 &mpic 4 1
-                                         a000 0 0 3 &mpic 1 1
-                                         a000 0 0 4 &mpic 2 1
-
-                                        /* IDSEL 21 */
-                                         a800 0 0 1 &mpic 2 1
-                                         a800 0 0 2 &mpic 3 1
-                                         a800 0 0 3 &mpic 4 1
-                                         a800 0 0 4 &mpic 1 1>;
-
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e2000000 0 01000000>;
-                };
-
                 mpic: pic@40000 {
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <40000 40000>;
-                        built-in;
                         device_type = "open-pic";
                 };
 
                 cpm@e0000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        #interrupt-cells = <2>;
                         device_type = "cpm";
                         model = "CPM2";
                         ranges = <0 0 c0000>;
@@ -249,7 +155,6 @@
                                 interrupts = <2e 2>;
                                 interrupt-parent = <&mpic>;
                                 reg = <90c00 80>;
-                                built-in;
                                 device_type = "cpm-pic";
                         };
 
@@ -324,4 +229,94 @@
                         };
                 };
         };
+
+        pci@e0008000 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
+                reg = <e0008000 1000>;
+                clock-frequency = <3f940aa>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x2 */
+                                 1000 0 0 1 &mpic 1 1
+                                 1000 0 0 2 &mpic 2 1
+                                 1000 0 0 3 &mpic 3 1
+                                 1000 0 0 4 &mpic 4 1
+
+                                /* IDSEL 0x3 */
+                                 1800 0 0 1 &mpic 4 1
+                                 1800 0 0 2 &mpic 1 1
+                                 1800 0 0 3 &mpic 2 1
+                                 1800 0 0 4 &mpic 3 1
+
+                                /* IDSEL 0x4 */
+                                 2000 0 0 1 &mpic 3 1
+                                 2000 0 0 2 &mpic 4 1
+                                 2000 0 0 3 &mpic 1 1
+                                 2000 0 0 4 &mpic 2 1
+
+                                /* IDSEL 0x5  */
+                                 2800 0 0 1 &mpic 2 1
+                                 2800 0 0 2 &mpic 3 1
+                                 2800 0 0 3 &mpic 4 1
+                                 2800 0 0 4 &mpic 1 1
+
+                                /* IDSEL 12 */
+                                 6000 0 0 1 &mpic 1 1
+                                 6000 0 0 2 &mpic 2 1
+                                 6000 0 0 3 &mpic 3 1
+                                 6000 0 0 4 &mpic 4 1
+
+                                /* IDSEL 13 */
+                                 6800 0 0 1 &mpic 4 1
+                                 6800 0 0 2 &mpic 1 1
+                                 6800 0 0 3 &mpic 2 1
+                                 6800 0 0 4 &mpic 3 1
+
+                                /* IDSEL 14*/
+                                 7000 0 0 1 &mpic 3 1
+                                 7000 0 0 2 &mpic 4 1
+                                 7000 0 0 3 &mpic 1 1
+                                 7000 0 0 4 &mpic 2 1
+
+                                /* IDSEL 15 */
+                                 7800 0 0 1 &mpic 2 1
+                                 7800 0 0 2 &mpic 3 1
+                                 7800 0 0 3 &mpic 4 1
+                                 7800 0 0 4 &mpic 1 1
+
+                                /* IDSEL 18 */
+                                 9000 0 0 1 &mpic 1 1
+                                 9000 0 0 2 &mpic 2 1
+                                 9000 0 0 3 &mpic 3 1
+                                 9000 0 0 4 &mpic 4 1
+
+                                /* IDSEL 19 */
+                                 9800 0 0 1 &mpic 4 1
+                                 9800 0 0 2 &mpic 1 1
+                                 9800 0 0 3 &mpic 2 1
+                                 9800 0 0 4 &mpic 3 1
+
+                                /* IDSEL 20 */
+                                 a000 0 0 1 &mpic 3 1
+                                 a000 0 0 2 &mpic 4 1
+                                 a000 0 0 3 &mpic 1 1
+                                 a000 0 0 4 &mpic 2 1
+
+                                /* IDSEL 21 */
+                                 a800 0 0 1 &mpic 2 1
+                                 a800 0 0 2 &mpic 3 1
+                                 a800 0 0 3 &mpic 4 1
+                                 a800 0 0 4 &mpic 1 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 e2000000 0 01000000>;
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index b1dcfbe8c1f8..c472a4b488e9 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -34,7 +34,6 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
-                        32-bit;
                 };
         };
 
@@ -51,7 +50,6 @@
         soc8568@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00100000>;
@@ -258,7 +256,6 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <40000 40000>;
-                        built-in;
                         compatible = "chrp,open-pic";
                         device_type = "open-pic";
                         big-endian;
@@ -449,7 +446,6 @@
                         #address-cells = <0>;
                         #interrupt-cells = <1>;
                         reg = <80 80>;
-                        built-in;
                         big-endian;
                         interrupts = <2e 2 2e 2>; //high:30 low:30
                         interrupt-parent = <&mpic>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
new file mode 100644
index 000000000000..d638deec7652
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -0,0 +1,404 @@
+/*
+ * MPC8572 DS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/ {
+        model = "fsl,MPC8572DS";
+        compatible = "fsl,MPC8572DS";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <20>;       // 32 bytes
+                        i-cache-line-size = <20>;       // 32 bytes
+                        d-cache-size = <8000>;          // L1, 32K
+                        i-cache-size = <8000>;          // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <00000000 00000000>;      // Filled by U-Boot
+        };
+
+        soc8572@ffe00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <00000000 ffe00000 00100000>;
+                reg = <ffe00000 00001000>;      // CCSRBAR & soc regs, remove once parse code for immrbase fixed
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <2000 1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <12 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <6000 1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <12 2>;
+                };
+
+                l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <20000 1000>;
+                        cache-line-size = <20>; // 32 bytes
+                        cache-size = <80000>;   // L2, 512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <10 2>;
+                };
+
+                i2c@3000 {
+                        device_type = "i2c";
+                        compatible = "fsl-i2c";
+                        reg = <3000 100>;
+                        interrupts = <2b 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        device_type = "i2c";
+                        compatible = "fsl-i2c";
+                        reg = <3100 100>;
+                        interrupts = <2b 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        device_type = "mdio";
+                        compatible = "gianfar";
+                        reg = <24520 20>;
+                        phy0: ethernet-phy@0 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <a 1>;
+                                reg = <0>;
+                        };
+                        phy1: ethernet-phy@1 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <a 1>;
+                                reg = <1>;
+                        };
+                        phy2: ethernet-phy@2 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <a 1>;
+                                reg = <2>;
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <a 1>;
+                                reg = <3>;
+                        };
+                };
+
+                ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <24000 1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <1d 2 1e 2 22 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <25000 1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <23 2 24 2 28 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <26000 1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <1f 2 20 2 21 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy2>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <27000 1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <25 2 26 2 27 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy3>;
+                        phy-connection-type = "rgmii-id";
+                };
+
+                serial@4500 {
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <4500 100>;
+                        clock-frequency = <0>;
+                        interrupts = <2a 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial@4600 {
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <4600 100>;
+                        clock-frequency = <0>;
+                        interrupts = <2a 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <e0000 1000>;
+                        fsl,has-rstcr;
+                };
+
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <40000 40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        big-endian;
+                };
+        };
+
+        pcie@ffe08000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <ffe08000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 ffc00000 0 00010000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                interrupt-map-mask = <fb00 0 0 0>;
+                interrupt-map = <
+                        /* IDSEL 0x11 - PCI slot 1 */
+                        8800 0 0 1 &mpic 2 1
+                        8800 0 0 2 &mpic 3 1
+                        8800 0 0 3 &mpic 4 1
+                        8800 0 0 4 &mpic 1 1
+
+                        /* IDSEL 0x12 - PCI slot 2 */
+                        9000 0 0 1 &mpic 3 1
+                        9000 0 0 2 &mpic 4 1
+                        9000 0 0 3 &mpic 1 1
+                        9000 0 0 4 &mpic 2 1
+
+                        // IDSEL 0x1c  USB
+                        e000 0 0 0 &i8259 c 2
+                        e100 0 0 0 &i8259 9 2
+                        e200 0 0 0 &i8259 a 2
+                        e300 0 0 0 &i8259 b 2
+
+                        // IDSEL 0x1d  Audio
+                        e800 0 0 0 &i8259 6 2
+
+                        // IDSEL 0x1e Legacy
+                        f000 0 0 0 &i8259 7 2
+                        f100 0 0 0 &i8259 7 2
+
+                        // IDSEL 0x1f IDE/SATA
+                        f800 0 0 0 &i8259 e 2
+                        f900 0 0 0 &i8259 5 2
+
+                        >;
+
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <02000000 0 80000000
+                                  02000000 0 80000000
+                                  0 20000000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00100000>;
+                        uli1575@0 {
+                                reg = <0 0 0 0 0>;
+                                #size-cells = <2>;
+                                #address-cells = <3>;
+                                ranges = <02000000 0 80000000
+                                          02000000 0 80000000
+                                          0 20000000
+
+                                          01000000 0 00000000
+                                          01000000 0 00000000
+                                          0 00100000>;
+                                isa@1e {
+                                        device_type = "isa";
+                                        #interrupt-cells = <2>;
+                                        #size-cells = <1>;
+                                        #address-cells = <2>;
+                                        reg = <f000 0 0 0 0>;
+                                        ranges = <1 0 01000000 0 0
+                                                  00001000>;
+                                        interrupt-parent = <&i8259>;
+
+                                        i8259: interrupt-controller@20 {
+                                                reg = <1 20 2
+                                                       1 a0 2
+                                                       1 4d0 2>;
+                                                interrupt-controller;
+                                                device_type = "interrupt-controller";
+                                                #address-cells = <0>;
+                                                #interrupt-cells = <2>;
+                                                compatible = "chrp,iic";
+                                                interrupts = <9 2>;
+                                                interrupt-parent = <&mpic>;
+                                        };
+
+                                        i8042@60 {
+                                                #size-cells = <0>;
+                                                #address-cells = <1>;
+                                                reg = <1 60 1 1 64 1>;
+                                                interrupts = <1 3 c 3>;
+                                                interrupt-parent =
+                                                        <&i8259>;
+
+                                                keyboard@0 {
+                                                        reg = <0>;
+                                                        compatible = "pnpPNP,303";
+                                                };
+
+                                                mouse@1 {
+                                                        reg = <1>;
+                                                        compatible = "pnpPNP,f03";
+                                                };
+                                        };
+
+                                        rtc@70 {
+                                                compatible = "pnpPNP,b00";
+                                                reg = <1 70 2>;
+                                        };
+
+                                        gpio@400 {
+                                                reg = <1 400 80>;
+                                        };
+                                };
+                        };
+                };
+
+        };
+
+        pcie@ffe09000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <ffe09000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 a0000000 a0000000 0 20000000
+                          01000000 0 00000000 ffc10000 0 00010000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <1a 2>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 4 1
+                        0000 0 0 2 &mpic 5 1
+                        0000 0 0 3 &mpic 6 1
+                        0000 0 0 4 &mpic 7 1
+                        >;
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <02000000 0 a0000000
+                                  02000000 0 a0000000
+                                  0 20000000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00100000>;
+                };
+        };
+
+        pcie@ffe0a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <ffe0a000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 c0000000 c0000000 0 20000000
+                          01000000 0 00000000 ffc20000 0 00010000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <1b 2>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 0 1
+                        0000 0 0 2 &mpic 1 1
+                        0000 0 0 3 &mpic 2 1
+                        0000 0 0 4 &mpic 3 1
+                        >;
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <02000000 0 c0000000
+                                  02000000 0 c0000000
+                                  0 20000000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index b0166e5c177e..f797662212ba 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;       // 33 MHz, from uboot
                         bus-frequency = <0>;            // From uboot
                         clock-frequency = <0>;          // From uboot
-                        32-bit;
                 };
                 PowerPC,8641@1 {
                         device_type = "cpu";
@@ -42,7 +41,6 @@
                         timebase-frequency = <0>;       // 33 MHz, from uboot
                         bus-frequency = <0>;            // From uboot
                         clock-frequency = <0>;          // From uboot
-                        32-bit;
                 };
         };
 
@@ -54,13 +52,8 @@
         soc8641@f8000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
-                ranges = <00001000 f8001000 000ff000
-                          80000000 80000000 20000000
-                          e2000000 e2000000 00100000
-                          a0000000 a0000000 20000000
-                          e3000000 e3000000 00100000>;
+                ranges = <00000000 f8000000 00100000>;
                 reg = <f8000000 00001000>;      // CCSRBAR
                 bus-frequency = <0>;
 
@@ -211,50 +204,75 @@
                         interrupt-parent = <&mpic>;
                 };
 
-                pcie@8000 {
-                        compatible = "fsl,mpc8641-pcie";
-                        device_type = "pci";
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8000 1000>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <1fca055>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                        interrupt-map-mask = <fb00 0 0 0>;
-                        interrupt-map = <
-                                /* IDSEL 0x11 */
-                                8800 0 0 1 &i8259 9 2
-                                8800 0 0 2 &i8259 a 2
-                                8800 0 0 3 &i8259 b 2
-                                8800 0 0 4 &i8259 c 2
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <40000 40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                        big-endian;
+                };
+        };
 
-                                /* IDSEL 0x12 */
-                                9000 0 0 1 &i8259 a 2
-                                9000 0 0 2 &i8259 b 2
-                                9000 0 0 3 &i8259 c 2
-                                9000 0 0 4 &i8259 9 2
+        pcie@f8008000 {
+                compatible = "fsl,mpc8641-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <f8008000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 80000000 80000000 0 20000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <18 2>;
+                interrupt-map-mask = <fb00 0 0 0>;
+                interrupt-map = <
+                        /* IDSEL 0x11 */
+                        8800 0 0 1 &i8259 9 2
+                        8800 0 0 2 &i8259 a 2
+                        8800 0 0 3 &i8259 b 2
+                        8800 0 0 4 &i8259 c 2
 
-                                // IDSEL 0x1c  USB
-                                e000 0 0 0 &i8259 c 2
-                                e100 0 0 0 &i8259 9 2
-                                e200 0 0 0 &i8259 a 2
-                                e300 0 0 0 &i8259 b 2
+                        /* IDSEL 0x12 */
+                        9000 0 0 1 &i8259 a 2
+                        9000 0 0 2 &i8259 b 2
+                        9000 0 0 3 &i8259 c 2
+                        9000 0 0 4 &i8259 9 2
 
-                                // IDSEL 0x1d  Audio
-                                e800 0 0 0 &i8259 6 2
+                        // IDSEL 0x1c  USB
+                        e000 0 0 0 &i8259 c 2
+                        e100 0 0 0 &i8259 9 2
+                        e200 0 0 0 &i8259 a 2
+                        e300 0 0 0 &i8259 b 2
 
-                                // IDSEL 0x1e Legacy
-                                f000 0 0 0 &i8259 7 2
-                                f100 0 0 0 &i8259 7 2
+                        // IDSEL 0x1d  Audio
+                        e800 0 0 0 &i8259 6 2
 
-                                // IDSEL 0x1f IDE/SATA
-                                f800 0 0 0 &i8259 e 2
-                                f900 0 0 0 &i8259 5 2
-                                >;
+                        // IDSEL 0x1e Legacy
+                        f000 0 0 0 &i8259 7 2
+                        f100 0 0 0 &i8259 7 2
+
+                        // IDSEL 0x1f IDE/SATA
+                        f800 0 0 0 &i8259 e 2
+                        f900 0 0 0 &i8259 5 2
+                        >;
+
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <02000000 0 80000000
+                                  02000000 0 80000000
+                                  0 20000000
+
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00100000>;
                         uli1575@0 {
                                 reg = <0 0 0 0 0>;
                                 #size-cells = <2>;
@@ -265,111 +283,96 @@
                                           01000000 0 00000000
                                           01000000 0 00000000
                                           0 00100000>;
+                                isa@1e {
+                                        device_type = "isa";
+                                        #interrupt-cells = <2>;
+                                        #size-cells = <1>;
+                                        #address-cells = <2>;
+                                        reg = <f000 0 0 0 0>;
+                                        ranges = <1 0 01000000 0 0
+                                                  00001000>;
+                                        interrupt-parent = <&i8259>;
 
-                                pci_bridge@0 {
-                                        reg = <0 0 0 0 0>;
-                                        #size-cells = <2>;
-                                        #address-cells = <3>;
-                                        ranges = <02000000 0 80000000
-                                                  02000000 0 80000000
-                                                  0 20000000
-                                                  01000000 0 00000000
-                                                  01000000 0 00000000
-                                                  0 00100000>;
-
-                                        isa@1e {
-                                                device_type = "isa";
+                                        i8259: interrupt-controller@20 {
+                                                reg = <1 20 2
+                                                       1 a0 2
+                                                       1 4d0 2>;
+                                                interrupt-controller;
+                                                device_type = "interrupt-controller";
+                                                #address-cells = <0>;
                                                 #interrupt-cells = <2>;
-                                                #size-cells = <1>;
-                                                #address-cells = <2>;
-                                                reg = <f000 0 0 0 0>;
-                                                ranges = <1 0 01000000 0 0
-                                                          00001000>;
-                                                interrupt-parent = <&i8259>;
-
-                                                i8259: interrupt-controller@20 {
-                                                        reg = <1 20 2
-                                                               1 a0 2
-                                                               1 4d0 2>;
-                                                        clock-frequency = <0>;
-                                                        interrupt-controller;
-                                                        device_type = "interrupt-controller";
-                                                        #address-cells = <0>;
-                                                        #interrupt-cells = <2>;
-                                                        built-in;
-                                                        compatible = "chrp,iic";
-                                                        interrupts = <9 2>;
-                                                        interrupt-parent =
-                                                                <&mpic>;
-                                                };
-
-                                                i8042@60 {
-                                                        #size-cells = <0>;
-                                                        #address-cells = <1>;
-                                                        reg = <1 60 1 1 64 1>;
-                                                        interrupts = <1 3 c 3>;
-                                                        interrupt-parent =
-                                                                <&i8259>;
+                                                compatible = "chrp,iic";
+                                                interrupts = <9 2>;
+                                                interrupt-parent = <&mpic>;
+                                        };
 
-                                                        keyboard@0 {
-                                                                reg = <0>;
-                                                                compatible = "pnpPNP,303";
-                                                        };
+                                        i8042@60 {
+                                                #size-cells = <0>;
+                                                #address-cells = <1>;
+                                                reg = <1 60 1 1 64 1>;
+                                                interrupts = <1 3 c 3>;
+                                                interrupt-parent =
+                                                        <&i8259>;
 
-                                                        mouse@1 {
-                                                                reg = <1>;
-                                                                compatible = "pnpPNP,f03";
-                                                        };
+                                                keyboard@0 {
+                                                        reg = <0>;
+                                                        compatible = "pnpPNP,303";
                                                 };
 
-                                                rtc@70 {
-                                                        compatible =
-                                                                "pnpPNP,b00";
-                                                        reg = <1 70 2>;
+                                                mouse@1 {
+                                                        reg = <1>;
+                                                        compatible = "pnpPNP,f03";
                                                 };
+                                        };
 
-                                                gpio@400 {
-                                                        reg = <1 400 80>;
-                                                };
+                                        rtc@70 {
+                                                compatible =
+                                                        "pnpPNP,b00";
+                                                reg = <1 70 2>;
+                                        };
+
+                                        gpio@400 {
+                                                reg = <1 400 80>;
                                         };
                                 };
                         };
-
                 };
 
-                pcie@9000 {
-                        compatible = "fsl,mpc8641-pcie";
-                        device_type = "pci";
-                        #interrupt-cells = <1>;
+        };
+
+        pcie@f8009000 {
+                compatible = "fsl,mpc8641-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <f8009000 1000>;
+                bus-range = <0 ff>;
+                ranges = <02000000 0 a0000000 a0000000 0 20000000
+                          01000000 0 00000000 e3000000 0 00100000>;
+                clock-frequency = <1fca055>;
+                interrupt-parent = <&mpic>;
+                interrupts = <19 2>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 4 1
+                        0000 0 0 2 &mpic 5 1
+                        0000 0 0 3 &mpic 6 1
+                        0000 0 0 4 &mpic 7 1
+                        >;
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
                         #size-cells = <2>;
                         #address-cells = <3>;
-                        reg = <9000 1000>;
-                        bus-range = <0 ff>;
-                        ranges = <02000000 0 a0000000 a0000000 0 20000000
-                                  01000000 0 00000000 e3000000 0 00100000>;
-                        clock-frequency = <1fca055>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <19 2>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 4 1
-                                0000 0 0 2 &mpic 5 1
-                                0000 0 0 3 &mpic 6 1
-                                0000 0 0 4 &mpic 7 1
-                                >;
-                };
+                        device_type = "pci";
+                        ranges = <02000000 0 a0000000
+                                  02000000 0 a0000000
+                                  0 20000000
 
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <40000 40000>;
-                        built-in;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        big-endian;
+                                  01000000 0 00000000
+                                  01000000 0 00000000
+                                  0 00100000>;
                 };
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index e5e7726ddb03..90f2293ed3cd 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
-                        32-bit;
                         interrupts = <f 2>;     // decrementer interrupt
                         interrupt-parent = <&Mpc8xx_pic>;
                 };
@@ -44,7 +43,6 @@
         soc866@ff000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 ff000000 00100000>;
                 reg = <ff000000 00000200>;
@@ -78,7 +76,6 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <0 24>;
-                        built-in;
                         device_type = "mpc8xx-pic";
                         compatible = "CPM";
                 };
@@ -86,7 +83,6 @@
                 cpm@ff000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        #interrupt-cells = <2>;
                         device_type = "cpm";
                         model = "CPM";
                         ranges = <0 0 4000>;
@@ -103,7 +99,6 @@
                                 interrupts = <5 2 0 2>;
                                 interrupt-parent = <&Mpc8xx_pic>;
                                 reg = <930 20>;
-                                built-in;
                                 device_type = "cpm-pic";
                                 compatible = "CPM";
                         };
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index dc7ab9c80611..e9aa9d00da24 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -30,7 +30,6 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
-                        32-bit;
                         interrupts = <f 2>;     // decrementer interrupt
                         interrupt-parent = <&Mpc8xx_pic>;
                 };
@@ -44,7 +43,6 @@
         soc885@ff000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <2>;
                 device_type = "soc";
                 ranges = <0 ff000000 00100000>;
                 reg = <ff000000 00000200>;
@@ -98,7 +96,6 @@
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <0 24>;
-                        built-in;
                         device_type = "mpc8xx-pic";
                         compatible = "CPM";
                 };
@@ -117,7 +114,6 @@
                 cpm@ff000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        #interrupt-cells = <2>;
                         device_type = "cpm";
                         model = "CPM";
                         ranges = <0 0 4000>;
@@ -134,7 +130,6 @@
                                 interrupts = <5 2 0 2>;
                                 interrupt-parent = <&Mpc8xx_pic>;
                                 reg = <930 20>;
-                                built-in;
                                 device_type = "cpm-pic";
                                 compatible = "CPM";
                         };
diff --git a/arch/powerpc/boot/dts/prpmc2800.dts b/arch/powerpc/boot/dts/prpmc2800.dts
index 5300b50cdc2f..297dfa53fe9e 100644
--- a/arch/powerpc/boot/dts/prpmc2800.dts
+++ b/arch/powerpc/boot/dts/prpmc2800.dts
@@ -9,10 +9,6 @@
  *
  * Property values that are labeled as "Default" will be updated by bootwrapper
  * if it can determine the exact PrPMC type.
- *
- * To build:
- *   dtc -I dts -O asm -o prpmc2800.S -b 0 prpmc2800.dts
- *   dtc -I dts -O dtb -o prpmc2800.dtb -b 0 prpmc2800.dts
  */
 
 / {
@@ -47,7 +43,6 @@
         mv64x60@f1000000 { /* Marvell Discovery */
                 #address-cells = <1>;
                 #size-cells = <1>;
-                #interrupt-cells = <1>;
                 model = "mv64360";                      /* Default */
                 compatible = "marvell,mv64x60";
                 clock-frequency = <7f28155>;            /* 133.333333 MHz */
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
new file mode 100644
index 000000000000..36be75b04de1
--- /dev/null
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -0,0 +1,302 @@
+/*
+ * Device Tree Source for AMCC Sequoia
+ *
+ * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright (c) 2006, 2007 IBM Corp.
+ *
+ * FIXME: Draft only!
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ */
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "amcc,sequoia";
+        compatible = "amcc,sequoia";
+        dcr-parent = <&/cpus/PowerPC,440EPx@0>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,440EPx@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        clock-frequency = <0>; /* Filled in by zImage */
+                        timebase-frequency = <0>; /* Filled in by zImage */
+                        i-cache-line-size = <20>;
+                        d-cache-line-size = <20>;
+                        i-cache-size = <8000>;
+                        d-cache-size = <8000>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0 0>; /* Filled in by zImage */
+        };
+
+        UIC0: interrupt-controller0 {
+                compatible = "ibm,uic-440epx","ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0c0 009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic-440epx","ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0d0 009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <1e 4 1f 4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        UIC2: interrupt-controller2 {
+                compatible = "ibm,uic-440epx","ibm,uic";
+                interrupt-controller;
+                cell-index = <2>;
+                dcr-reg = <0e0 009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <1c 4 1d 4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        SDR0: sdr {
+                compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
+                dcr-reg = <00e 002>;
+        };
+
+        CPR0: cpr {
+                compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
+                dcr-reg = <00c 002>;
+        };
+
+        plb {
+                compatible = "ibm,plb-440epx", "ibm,plb4";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by zImage */
+
+                SDRAM0: sdram {
+                        device_type = "memory-controller";
+                        compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
+                        dcr-reg = <010 2>;
+                };
+
+                DMA0: dma {
+                        compatible = "ibm,dma-440epx", "ibm,dma-4xx";
+                        dcr-reg = <100 027>;
+                };
+
+                MAL0: mcmal {
+                        compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
+                        dcr-reg = <180 62>;
+                        num-tx-chans = <2>;
+                        num-rx-chans = <2>;
+                        interrupt-parent = <&MAL0>;
+                        interrupts = <0 1 2 3 4>;
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
+                                        /*RXEOB*/ 1 &UIC0 b 4
+                                        /*SERR*/  2 &UIC1 0 4
+                                        /*TXDE*/  3 &UIC1 1 4
+                                        /*RXDE*/  4 &UIC1 2 4>;
+                        interrupt-map-mask = <ffffffff>;
+                };
+
+                POB0: opb {
+                        compatible = "ibm,opb-440epx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <00000000 1 00000000 80000000
+                                  80000000 1 80000000 80000000>;
+                        interrupt-parent = <&UIC1>;
+                        interrupts = <7 4>;
+                        clock-frequency = <0>; /* Filled in by zImage */
+
+                        EBC0: ebc {
+                                compatible = "ibm,ebc-440epx", "ibm,ebc";
+                                dcr-reg = <012 2>;
+                                #address-cells = <2>;
+                                #size-cells = <1>;
+                                clock-frequency = <0>; /* Filled in by zImage */
+                                interrupts = <5 1>;
+                                interrupt-parent = <&UIC1>;
+
+                                nor_flash@0,0 {
+                                        compatible = "amd,s29gl256n", "cfi-flash";
+                                        bank-width = <2>;
+                                        reg = <0 000000 4000000>;
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        partition@0 {
+                                                label = "Kernel";
+                                                reg = <0 180000>;
+                                        };
+                                        partition@180000 {
+                                                label = "ramdisk";
+                                                reg = <180000 200000>;
+                                        };
+                                        partition@380000 {
+                                                label = "file system";
+                                                reg = <380000 3aa0000>;
+                                        };
+                                        partition@3e20000 {
+                                                label = "kozio";
+                                                reg = <3e20000 140000>;
+                                        };
+                                        partition@3f60000 {
+                                                label = "env";
+                                                reg = <3f60000 40000>;
+                                        };
+                                        partition@3fa0000 {
+                                                label = "u-boot";
+                                                reg = <3fa0000 60000>;
+                                        };
+                                };
+
+                        };
+
+                        UART0: serial@ef600300 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600300 8>;
+                                virtual-reg = <ef600300>;
+                                clock-frequency = <0>; /* Filled in by zImage */
+                                current-speed = <1c200>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0 4>;
+                        };
+
+                        UART1: serial@ef600400 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600400 8>;
+                                virtual-reg = <ef600400>;
+                                clock-frequency = <0>;
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <1 4>;
+                        };
+
+                        UART2: serial@ef600500 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600500 8>;
+                                virtual-reg = <ef600500>;
+                                clock-frequency = <0>;
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC1>;
+                                interrupts = <3 4>;
+                        };
+
+                        UART3: serial@ef600600 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600600 8>;
+                                virtual-reg = <ef600600>;
+                                clock-frequency = <0>;
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC1>;
+                                interrupts = <4 4>;
+                        };
+
+                        IIC0: i2c@ef600700 {
+                                device_type = "i2c";
+                                compatible = "ibm,iic-440epx", "ibm,iic";
+                                reg = <ef600700 14>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <2 4>;
+                        };
+
+                        IIC1: i2c@ef600800 {
+                                device_type = "i2c";
+                                compatible = "ibm,iic-440epx", "ibm,iic";
+                                reg = <ef600800 14>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <7 4>;
+                        };
+
+                        ZMII0: emac-zmii@ef600d00 {
+                                device_type = "zmii-interface";
+                                compatible = "ibm,zmii-440epx", "ibm,zmii";
+                                reg = <ef600d00 c>;
+                        };
+
+                        EMAC0: ethernet@ef600e00 {
+                                linux,network-index = <0>;
+                                device_type = "network";
+                                compatible = "ibm,emac-440epx", "ibm,emac4";
+                                interrupt-parent = <&EMAC0>;
+                                interrupts = <0 1>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0 &UIC0 18 4
+                                                /*Wake*/  1 &UIC1 1d 4>;
+                                reg = <ef600e00 70>;
+                                local-mac-address = [000000000000];
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <0>;
+                                mal-rx-channel = <0>;
+                                cell-index = <0>;
+                                max-frame-size = <5dc>;
+                                rx-fifo-size = <1000>;
+                                tx-fifo-size = <800>;
+                                phy-mode = "rmii";
+                                phy-map = <00000000>;
+                                zmii-device = <&ZMII0>;
+                                zmii-channel = <0>;
+                        };
+
+                        EMAC1: ethernet@ef600f00 {
+                                linux,network-index = <1>;
+                                device_type = "network";
+                                compatible = "ibm,emac-440epx", "ibm,emac4";
+                                interrupt-parent = <&EMAC1>;
+                                interrupts = <0 1>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0 &UIC0 19 4
+                                                /*Wake*/  1 &UIC1 1f 4>;
+                                reg = <ef600f00 70>;
+                                local-mac-address = [000000000000];
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <1>;
+                                mal-rx-channel = <1>;
+                                cell-index = <1>;
+                                max-frame-size = <5dc>;
+                                rx-fifo-size = <1000>;
+                                tx-fifo-size = <800>;
+                                phy-mode = "rmii";
+                                phy-map = <00000000>;
+                                zmii-device = <&ZMII0>;
+                                zmii-channel = <1>;
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@ef600300";
+                bootargs = "console=ttyS0,115200";
+        };
+};
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
new file mode 100644
index 000000000000..ec54f4e04ad6
--- /dev/null
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -0,0 +1,190 @@
+/*
+ * Device Tree Source for IBM Walnut
+ *
+ * Copyright 2007 IBM Corp.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        model = "ibm,walnut";
+        compatible = "ibm,walnut";
+        dcr-parent = <&/cpus/PowerPC,405GP@0>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,405GP@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        clock-frequency = <bebc200>; /* Filled in by zImage */
+                        timebase-frequency = <0>; /* Filled in by zImage */
+                        i-cache-line-size = <20>;
+                        d-cache-line-size = <20>;
+                        i-cache-size = <4000>;
+                        d-cache-size = <4000>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0>; /* Filled in by zImage */
+        };
+
+        UIC0: interrupt-controller {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0c0 9>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+
+        plb {
+                compatible = "ibm,plb3";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by zImage */
+
+                SDRAM0: memory-controller {
+                        compatible = "ibm,sdram-405gp";
+                        dcr-reg = <010 2>;
+                };
+
+                MAL: mcmal {
+                        compatible = "ibm,mcmal-405gp", "ibm,mcmal";
+                        dcr-reg = <180 62>;
+                        num-tx-chans = <2>;
+                        num-rx-chans = <1>;
+                        interrupt-parent = <&UIC0>;
+                        interrupts = <a 4 b 4 c 4 d 4 e 4>;
+                };
+
+                POB0: opb {
+                        compatible = "ibm,opb-405gp", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <ef600000 ef600000 a00000>;
+                        dcr-reg = <0a0 5>;
+                        clock-frequency = <0>; /* Filled in by zImage */
+
+                        UART0: serial@ef600300 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600300 8>;
+                                virtual-reg = <ef600300>;
+                                clock-frequency = <0>; /* Filled in by zImage */
+                                current-speed = <2580>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0 4>;
+                        };
+
+                        UART1: serial@ef600400 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <ef600400 8>;
+                                virtual-reg = <ef600400>;
+                                clock-frequency = <0>; /* Filled in by zImage */
+                                current-speed = <2580>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <1 4>;
+                        };
+
+                        IIC: i2c@ef600500 {
+                                compatible = "ibm,iic-405gp", "ibm,iic";
+                                reg = <ef600500 11>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <2 4>;
+                        };
+
+                        GPIO: gpio@ef600700 {
+                                compatible = "ibm,gpio-405gp";
+                                reg = <ef600700 20>;
+                        };
+
+                        EMAC: ethernet@ef600800 {
+                                linux,network-index = <0>;
+                                device_type = "network";
+                                compatible = "ibm,emac-405gp", "ibm,emac";
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <9 4 f 4>;
+                                reg = <ef600800 70>;
+                                mal-device = <&MAL>;
+                                mal-tx-channel = <0 1>;
+                                mal-rx-channel = <0>;
+                                cell-index = <0>;
+                                max-frame-size = <5dc>;
+                                rx-fifo-size = <1000>;
+                                tx-fifo-size = <800>;
+                                phy-mode = "rmii";
+                                phy-map = <00000001>;
+                        };
+
+                };
+
+                EBC0: ebc {
+                        compatible = "ibm,ebc-405gp", "ibm,ebc";
+                        dcr-reg = <012 2>;
+                        #address-cells = <2>;
+                        #size-cells = <1>;
+                        /* The ranges property is supplied by the bootwrapper
+                         * and is based on the firmware's configuration of the
+                         * EBC bridge
+                         */
+                        clock-frequency = <0>; /* Filled in by zImage */
+
+                        sram@0,0 {
+                                reg = <0 0 80000>;
+                        };
+
+                        flash@0,80000 {
+                                compatible = "jedec-flash";
+                                bank-width = <1>;
+                                reg = <0 80000 80000>;
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                partition@0 {
+                                        label = "OpenBIOS";
+                                        reg = <0 80000>;
+                                        read-only;
+                                };
+                        };
+
+                        ds1743@1,0 {
+                                /* NVRAM and RTC */
+                                compatible = "ds1743";
+                                reg = <1 0 2000>;
+                        };
+
+                        keyboard@2,0 {
+                                compatible = "intel,82C42PC";
+                                reg = <2 0 2>;
+                        };
+
+                        ir@3,0 {
+                                compatible = "ti,TIR2000PAG";
+                                reg = <3 0 10>;
+                        };
+
+                        fpga@7,0 {
+                                compatible = "Walnut-FPGA";
+                                reg = <7 0 10>;
+                                virtual-reg = <f0300005>;
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@ef600300";
+        };
+};
diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c
index 75daedafd0a4..86c0f5df0a86 100644
--- a/arch/powerpc/boot/ebony.c
+++ b/arch/powerpc/boot/ebony.c
@@ -24,12 +24,11 @@
 #include "page.h"
 #include "ops.h"
 #include "reg.h"
+#include "io.h"
 #include "dcr.h"
+#include "4xx.h"
 #include "44x.h"
 
-extern char _dtb_start[];
-extern char _dtb_end[];
-
 static u8 *ebony_mac0, *ebony_mac1;
 
 /* Calculate 440GP clocks */
@@ -92,15 +91,53 @@ void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
         dt_fixup_clock("/plb/opb/serial@40000300", uart1);
 }
 
+#define EBONY_FPGA_PATH         "/plb/opb/ebc/fpga"
+#define EBONY_FPGA_FLASH_SEL    0x01
+#define EBONY_SMALL_FLASH_PATH  "/plb/opb/ebc/small-flash"
+
+static void ebony_flashsel_fixup(void)
+{
+        void *devp;
+        u32 reg[3] = {0x0, 0x0, 0x80000};
+        u8 *fpga;
+        u8 fpga_reg0 = 0x0;
+
+        devp = finddevice(EBONY_FPGA_PATH);
+        if (!devp)
+                fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH);
+
+        if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
+                fatal("%s has missing or invalid virtual-reg property\n\r",
+                      EBONY_FPGA_PATH);
+
+        fpga_reg0 = in_8(fpga);
+
+        devp = finddevice(EBONY_SMALL_FLASH_PATH);
+        if (!devp)
+                fatal("Couldn't locate small flash node %s\n\r",
+                      EBONY_SMALL_FLASH_PATH);
+
+        if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg))
+                fatal("%s has reg property of unexpected size\n\r",
+                      EBONY_SMALL_FLASH_PATH);
+
+        /* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */
+        if (fpga_reg0 & EBONY_FPGA_FLASH_SEL)
+                reg[1] ^= 0x80000;
+
+        setprop(devp, "reg", reg, sizeof(reg));
+}
+
 static void ebony_fixups(void)
 {
         // FIXME: sysclk should be derived by reading the FPGA registers
         unsigned long sysclk = 33000000;
 
         ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
-        ibm44x_fixup_memsize();
+        ibm4xx_fixup_memsize();
         dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
         ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+        ebony_flashsel_fixup();
 }
 
 void ebony_init(void *mac0, void *mac1)
diff --git a/arch/powerpc/boot/flatdevtree.c b/arch/powerpc/boot/flatdevtree.c
index 13761bf160c4..cf30675c6116 100644
--- a/arch/powerpc/boot/flatdevtree.c
+++ b/arch/powerpc/boot/flatdevtree.c
@@ -354,16 +354,21 @@ static void ft_put_bin(struct ft_cxt *cxt, const void *data, unsigned int sz)
         cxt->p += sza;
 }
 
-int ft_begin_node(struct ft_cxt *cxt, const char *name)
+char *ft_begin_node(struct ft_cxt *cxt, const char *name)
 {
         unsigned long nlen = strlen(name) + 1;
         unsigned long len = 8 + _ALIGN(nlen, 4);
+        char *ret;
 
         if (!ft_make_space(cxt, &cxt->p, FT_STRUCT, len))
-                return -1;
+                return NULL;
+
+        ret = cxt->p;
+
         ft_put_word(cxt, OF_DT_BEGIN_NODE);
         ft_put_bin(cxt, name, strlen(name) + 1);
-        return 0;
+
+        return ret;
 }
 
 void ft_end_node(struct ft_cxt *cxt)
@@ -625,25 +630,17 @@ void ft_end_tree(struct ft_cxt *cxt)
         bph->dt_strings_size = cpu_to_be32(ssize);
 }
 
-void *ft_find_device(struct ft_cxt *cxt, const char *srch_path)
-{
-        char *node;
-
-        /* require absolute path */
-        if (srch_path[0] != '/')
-                return NULL;
-        node = ft_find_descendent(cxt, ft_root_node(cxt), srch_path);
-        return ft_get_phandle(cxt, node);
-}
-
-void *ft_find_device_rel(struct ft_cxt *cxt, const void *top,
-                         const char *srch_path)
+void *ft_find_device(struct ft_cxt *cxt, const void *top, const char *srch_path)
 {
         char *node;
 
-        node = ft_node_ph2node(cxt, top);
-        if (node == NULL)
-                return NULL;
+        if (top) {
+                node = ft_node_ph2node(cxt, top);
+                if (node == NULL)
+                        return NULL;
+        } else {
+                node = ft_root_node(cxt);
+        }
 
         node = ft_find_descendent(cxt, node, srch_path);
         return ft_get_phandle(cxt, node);
@@ -945,7 +942,7 @@ int ft_del_prop(struct ft_cxt *cxt, const void *phandle, const char *propname)
 void *ft_create_node(struct ft_cxt *cxt, const void *parent, const char *name)
 {
         struct ft_atom atom;
-        char *p, *next;
+        char *p, *next, *ret;
         int depth = 0;
 
         if (parent) {
@@ -970,11 +967,70 @@ void *ft_create_node(struct ft_cxt *cxt, const void *parent, const char *name)
                                 break;
                         /* end of node, insert here */
                         cxt->p = p;
-                        ft_begin_node(cxt, name);
+                        ret = ft_begin_node(cxt, name);
                         ft_end_node(cxt);
-                        return p;
+                        return ft_get_phandle(cxt, ret);
                 }
                 p = next;
         }
         return NULL;
 }
+
+/* Returns the start of the path within the provided buffer, or NULL on
+ * error.
+ */
+char *ft_get_path(struct ft_cxt *cxt, const void *phandle,
+                  char *buf, int len)
+{
+        const char *path_comp[FT_MAX_DEPTH];
+        struct ft_atom atom;
+        char *p, *next, *pos;
+        int depth = 0, i;
+        void *node;
+
+        node = ft_node_ph2node(cxt, phandle);
+        if (node == NULL)
+                return NULL;
+
+        p = ft_root_node(cxt);
+
+        while ((next = ft_next(cxt, p, &atom)) != NULL) {
+                switch (atom.tag) {
+                case OF_DT_BEGIN_NODE:
+                        path_comp[depth++] = atom.name;
+                        if (p == node)
+                                goto found;
+
+                        break;
+
+                case OF_DT_END_NODE:
+                        if (--depth == 0)
+                                return NULL;
+                }
+
+                p = next;
+        }
+
+found:
+        pos = buf;
+        for (i = 1; i < depth; i++) {
+                int this_len;
+
+                if (len <= 1)
+                        return NULL;
+
+                *pos++ = '/';
+                len--;
+
+                strncpy(pos, path_comp[i], len);
+
+                if (pos[len - 1] != 0)
+                        return NULL;
+
+                this_len = strlen(pos);
+                len -= this_len;
+                pos += this_len;
+        }
+
+        return buf;
+}
diff --git a/arch/powerpc/boot/flatdevtree.h b/arch/powerpc/boot/flatdevtree.h
index cb26325d72db..b0957a2d967f 100644
--- a/arch/powerpc/boot/flatdevtree.h
+++ b/arch/powerpc/boot/flatdevtree.h
@@ -76,7 +76,7 @@ struct ft_cxt {
         unsigned int nodes_used;
 };
 
-int ft_begin_node(struct ft_cxt *cxt, const char *name);
+char *ft_begin_node(struct ft_cxt *cxt, const char *name);
 void ft_end_node(struct ft_cxt *cxt);
 
 void ft_begin_tree(struct ft_cxt *cxt);
@@ -96,9 +96,8 @@ int ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size);
 
 void ft_dump_blob(const void *bphp);
 void ft_merge_blob(struct ft_cxt *cxt, void *blob);
-void *ft_find_device(struct ft_cxt *cxt, const char *srch_path);
-void *ft_find_device_rel(struct ft_cxt *cxt, const void *top,
-                         const char *srch_path);
+void *ft_find_device(struct ft_cxt *cxt, const void *top,
+                     const char *srch_path);
 void *ft_find_descendent(struct ft_cxt *cxt, void *top, const char *srch_path);
 int ft_get_prop(struct ft_cxt *cxt, const void *phandle, const char *propname,
                 void *buf, const unsigned int buflen);
@@ -109,5 +108,6 @@ void *ft_find_node_by_prop_value(struct ft_cxt *cxt, const void *prev,
                                  const char *propname, const char *propval,
                                  int proplen);
 void *ft_create_node(struct ft_cxt *cxt, const void *parent, const char *name);
+char *ft_get_path(struct ft_cxt *cxt, const void *phandle, char *buf, int len);
 
 #endif /* FLATDEVTREE_H */
diff --git a/arch/powerpc/boot/flatdevtree_env.h b/arch/powerpc/boot/flatdevtree_env.h
index 83bc1c718836..ad0420da8921 100644
--- a/arch/powerpc/boot/flatdevtree_env.h
+++ b/arch/powerpc/boot/flatdevtree_env.h
@@ -24,24 +24,4 @@
 #define be64_to_cpu(x)          (x)
 #define cpu_to_be64(x)          (x)
 
-static inline int strncmp(const char *cs, const char *ct, size_t count)
-{
-        signed char __res = 0;
-
-        while (count) {
-                if ((__res = *cs - *ct++) != 0 || !*cs++)
-                        break;
-                count--;
-        }
-        return __res;
-}
-
-static inline char *strchr(const char *s, int c)
-{
-        for (; *s != (char)c; ++s)
-                if (*s == '\0')
-                        return NULL;
-        return (char *)s;
-}
-
 #endif /* _PPC_BOOT_FLATDEVTREE_ENV_H_ */
diff --git a/arch/powerpc/boot/flatdevtree_misc.c b/arch/powerpc/boot/flatdevtree_misc.c
index 4341e6558c1a..b3670096fa71 100644
--- a/arch/powerpc/boot/flatdevtree_misc.c
+++ b/arch/powerpc/boot/flatdevtree_misc.c
@@ -18,7 +18,7 @@ static struct ft_cxt cxt;
 
 static void *fdtm_finddevice(const char *name)
 {
-        return ft_find_device(&cxt, name);
+        return ft_find_device(&cxt, NULL, name);
 }
 
 static int fdtm_getprop(const void *phandle, const char *propname,
@@ -58,6 +58,11 @@ static unsigned long fdtm_finalize(void)
         return (unsigned long)cxt.bph;
 }
 
+static char *fdtm_get_path(const void *phandle, char *buf, int len)
+{
+        return ft_get_path(&cxt, phandle, buf, len);
+}
+
 int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device)
 {
         dt_ops.finddevice = fdtm_finddevice;
@@ -67,6 +72,7 @@ int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device)
         dt_ops.create_node = fdtm_create_node;
         dt_ops.find_node_by_prop_value = fdtm_find_node_by_prop_value;
         dt_ops.finalize = fdtm_finalize;
+        dt_ops.get_path = fdtm_get_path;
 
         return ft_open(&cxt, dt_blob, max_size, max_find_device,
                         platform_ops.realloc);
diff --git a/arch/powerpc/boot/gunzip_util.c b/arch/powerpc/boot/gunzip_util.c
index df8ab07e9ff4..ef2aed0f63ca 100644
--- a/arch/powerpc/boot/gunzip_util.c
+++ b/arch/powerpc/boot/gunzip_util.c
@@ -78,6 +78,7 @@ void gunzip_start(struct gunzip_state *state, void *src, int srclen)
                         fatal("inflateInit2 returned %d\n\r", r);
         }
 
+        state->s.total_in = hdrlen;
         state->s.next_in = src + hdrlen;
         state->s.avail_in = srclen - hdrlen;
 }
@@ -193,13 +194,10 @@ int gunzip_finish(struct gunzip_state *state, void *dst, int dstlen)
 {
         int len;
 
+        len = gunzip_partial(state, dst, dstlen);
+
         if (state->s.workspace) {
-                len = gunzip_partial(state, dst, dstlen);
                 zlib_inflateEnd(&state->s);
-        } else {
-                /* uncompressed image */
-                len = min(state->s.avail_in, (unsigned)dstlen);
-                memcpy(dst, state->s.next_in, len);
         }
 
         return len;
diff --git a/arch/powerpc/boot/holly.c b/arch/powerpc/boot/holly.c
index 7d6539f5e22c..199e783aea4d 100644
--- a/arch/powerpc/boot/holly.c
+++ b/arch/powerpc/boot/holly.c
@@ -21,11 +21,6 @@
 #include "ops.h"
 #include "io.h"
 
-extern char _start[];
-extern char _end[];
-extern char _dtb_start[];
-extern char _dtb_end[];
-
 BSS_STACK(4096);
 
 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
diff --git a/arch/powerpc/boot/io.h b/arch/powerpc/boot/io.h
index 32974ed49e02..ccaedaec50d5 100644
--- a/arch/powerpc/boot/io.h
+++ b/arch/powerpc/boot/io.h
@@ -1,5 +1,8 @@
 #ifndef _IO_H
 #define __IO_H
+
+#include "types.h"
+
 /*
  * Low-level I/O routines.
  *
@@ -20,6 +23,37 @@ static inline void out_8(volatile unsigned char *addr, int val)
                              : "=m" (*addr) : "r" (val));
 }
 
+static inline unsigned in_le16(const volatile u16 *addr)
+{
+        unsigned ret;
+
+        __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
+                             : "=r" (ret) : "r" (addr), "m" (*addr));
+
+        return ret;
+}
+
+static inline unsigned in_be16(const volatile u16 *addr)
+{
+        unsigned ret;
+
+        __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
+                             : "=r" (ret) : "m" (*addr));
+        return ret;
+}
+
+static inline void out_le16(volatile u16 *addr, int val)
+{
+        __asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr)
+                             : "r" (val), "r" (addr));
+}
+
+static inline void out_be16(volatile u16 *addr, int val)
+{
+        __asm__ __volatile__("sth%U0%X0 %1,%0; sync"
+                             : "=m" (*addr) : "r" (val));
+}
+
 static inline unsigned in_le32(const volatile unsigned *addr)
 {
         unsigned ret;
@@ -50,4 +84,19 @@ static inline void out_be32(volatile unsigned *addr, int val)
                              : "=m" (*addr) : "r" (val));
 }
 
+static inline void sync(void)
+{
+        asm volatile("sync" : : : "memory");
+}
+
+static inline void eieio(void)
+{
+        asm volatile("eieio" : : : "memory");
+}
+
+static inline void barrier(void)
+{
+        asm volatile("" : : : "memory");
+}
+
 #endif /* _IO_H */
diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c
index 416dc3857bfe..1b496b37eca0 100644
--- a/arch/powerpc/boot/main.c
+++ b/arch/powerpc/boot/main.c
@@ -19,16 +19,6 @@
 #include "flatdevtree.h"
 #include "reg.h"
 
-extern char _start[];
-extern char __bss_start[];
-extern char _end[];
-extern char _vmlinux_start[];
-extern char _vmlinux_end[];
-extern char _initrd_start[];
-extern char _initrd_end[];
-extern char _dtb_start[];
-extern char _dtb_end[];
-
 static struct gunzip_state gzstate;
 
 struct addr_range {
diff --git a/arch/powerpc/boot/mpc52xx-psc.c b/arch/powerpc/boot/mpc52xx-psc.c
new file mode 100644
index 000000000000..1074626e6a37
--- /dev/null
+++ b/arch/powerpc/boot/mpc52xx-psc.c
@@ -0,0 +1,69 @@
+/*
+ * MPC5200 PSC serial console support.
+ *
+ * Author: Grant Likely <grant.likely@secretlab.ca>
+ *
+ * Copyright (c) 2007 Secret Lab Technologies Ltd.
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * It is assumed that the firmware (or the platform file) has already set
+ * up the port.
+ */
+
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+/* Programmable Serial Controller (PSC) status register bits */
+#define MPC52xx_PSC_SR          0x04
+#define MPC52xx_PSC_SR_RXRDY            0x0100
+#define MPC52xx_PSC_SR_RXFULL           0x0200
+#define MPC52xx_PSC_SR_TXRDY            0x0400
+#define MPC52xx_PSC_SR_TXEMP            0x0800
+
+#define MPC52xx_PSC_BUFFER      0x0C
+
+static void *psc;
+
+static int psc_open(void)
+{
+        /* Assume the firmware has already configured the PSC into
+         * uart mode */
+        return 0;
+}
+
+static void psc_putc(unsigned char c)
+{
+        while (!(in_be16(psc + MPC52xx_PSC_SR) & MPC52xx_PSC_SR_TXRDY)) ;
+        out_8(psc + MPC52xx_PSC_BUFFER, c);
+}
+
+static unsigned char psc_tstc(void)
+{
+        return (in_be16(psc + MPC52xx_PSC_SR) & MPC52xx_PSC_SR_RXRDY) != 0;
+}
+
+static unsigned char psc_getc(void)
+{
+        while (!(in_be16(psc + MPC52xx_PSC_SR) & MPC52xx_PSC_SR_RXRDY)) ;
+        return in_8(psc + MPC52xx_PSC_BUFFER);
+}
+
+int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp)
+{
+        int n;
+
+        /* Get the base address of the psc registers */
+        n = getprop(devp, "virtual-reg", &psc, sizeof(psc));
+        if (n != sizeof(psc)) {
+                if (!dt_xlate_reg(devp, 0, (void *)&psc, NULL))
+                        return -1;
+        }
+
+        scdp->open = psc_open;
+        scdp->putc = psc_putc;
+        scdp->getc = psc_getc;
+        scdp->tstc = psc_tstc;
+
+        return 0;
+}
diff --git a/arch/powerpc/boot/mpsc.c b/arch/powerpc/boot/mpsc.c
index f1c0e965e5ce..802ea53790d8 100644
--- a/arch/powerpc/boot/mpsc.c
+++ b/arch/powerpc/boot/mpsc.c
@@ -17,7 +17,6 @@
 #include "io.h"
 #include "ops.h"
 
-extern void udelay(long delay);
 
 #define MPSC_CHR_1              0x000c
 
diff --git a/arch/powerpc/boot/mv64x60_i2c.c b/arch/powerpc/boot/mv64x60_i2c.c
index 435fe8528680..d085377be3bc 100644
--- a/arch/powerpc/boot/mv64x60_i2c.c
+++ b/arch/powerpc/boot/mv64x60_i2c.c
@@ -21,8 +21,6 @@
 #include "ops.h"
 #include "mv64x60.h"
 
-extern void udelay(long);
-
 /* Register defines */
 #define MV64x60_I2C_REG_SLAVE_ADDR                      0x00
 #define MV64x60_I2C_REG_DATA                            0x04
diff --git a/arch/powerpc/boot/of.c b/arch/powerpc/boot/of.c
index 385e08b83b7e..61d9899aa0d0 100644
--- a/arch/powerpc/boot/of.c
+++ b/arch/powerpc/boot/of.c
@@ -17,8 +17,6 @@
 
 #include "of.h"
 
-extern char _end[];
-
 /* Value picked to match that used by yaboot */
 #define PROG_START      0x01400000      /* only used on 64-bit systems */
 #define RAM_END         (512<<20)       /* Fixme: use OF */
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index 86077066cd7c..e948e57abef8 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -47,6 +47,7 @@ struct dt_ops {
                                          const char *propname,
                                          const char *propval, int proplen);
         unsigned long (*finalize)(void);
+        char *(*get_path)(const void *phandle, char *buf, int len);
 };
 extern struct dt_ops dt_ops;
 
@@ -82,11 +83,15 @@ int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device);
 int serial_console_init(void);
 int ns16550_console_init(void *devp, struct serial_console_data *scdp);
 int mpsc_console_init(void *devp, struct serial_console_data *scdp);
+int cpm_console_init(void *devp, struct serial_console_data *scdp);
+int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp);
 void *simple_alloc_init(char *base, unsigned long heap_size,
                         unsigned long granularity, unsigned long max_allocs);
 extern void flush_cache(void *, unsigned long);
 int dt_xlate_reg(void *node, int res, unsigned long *addr, unsigned long *size);
 int dt_xlate_addr(void *node, u32 *buf, int buflen, unsigned long *xlated_addr);
+int dt_is_compatible(void *node, const char *compat);
+void dt_get_reg_format(void *node, u32 *naddr, u32 *nsize);
 
 static inline void *finddevice(const char *name)
 {
@@ -156,6 +161,7 @@ static inline void *find_node_by_devtype(const void *prev,
 void dt_fixup_memory(u64 start, u64 size);
 void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq);
 void dt_fixup_clock(const char *path, u32 freq);
+void dt_fixup_mac_address(u32 index, const u8 *addr);
 void __dt_fixup_mac_addresses(u32 startindex, ...);
 #define dt_fixup_mac_addresses(...) \
         __dt_fixup_mac_addresses(0, __VA_ARGS__, NULL)
@@ -167,6 +173,14 @@ static inline void *find_node_by_linuxphandle(const u32 linuxphandle)
                         (char *)&linuxphandle, sizeof(u32));
 }
 
+static inline char *get_path(const void *phandle, char *buf, int len)
+{
+        if (dt_ops.get_path)
+                return dt_ops.get_path(phandle, buf, len);
+
+        return NULL;
+}
+
 static inline void *malloc(unsigned long size)
 {
         return (platform_ops.malloc) ? platform_ops.malloc(size) : NULL;
@@ -191,4 +205,25 @@ static inline void exit(void)
         static char _bss_stack[size]; \
         void *_platform_stack_top = _bss_stack + sizeof(_bss_stack);
 
+extern unsigned long timebase_period_ns;
+void udelay(long delay);
+
+extern char _start[];
+extern char __bss_start[];
+extern char _end[];
+extern char _vmlinux_start[];
+extern char _vmlinux_end[];
+extern char _initrd_start[];
+extern char _initrd_end[];
+extern char _dtb_start[];
+extern char _dtb_end[];
+
+static inline __attribute__((const))
+int __ilog2_u32(u32 n)
+{
+        int bit;
+        asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
+        return 31 - bit;
+}
+
 #endif /* _PPC_BOOT_OPS_H_ */
diff --git a/arch/powerpc/boot/planetcore.c b/arch/powerpc/boot/planetcore.c
new file mode 100644
index 000000000000..0d8558a475bb
--- /dev/null
+++ b/arch/powerpc/boot/planetcore.c
@@ -0,0 +1,166 @@
+/*
+ * PlanetCore configuration data support functions
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "stdio.h"
+#include "stdlib.h"
+#include "ops.h"
+#include "planetcore.h"
+#include "io.h"
+
+/* PlanetCore passes information to the OS in the form of
+ * a table of key=value strings, separated by newlines.
+ *
+ * The list is terminated by an empty string (i.e. two
+ * consecutive newlines).
+ *
+ * To make it easier to parse, we first convert all the
+ * newlines into null bytes.
+ */
+
+void planetcore_prepare_table(char *table)
+{
+        do {
+                if (*table == '\n')
+                        *table = 0;
+
+                table++;
+        } while (*(table - 1) || *table != '\n');
+
+        *table = 0;
+}
+
+const char *planetcore_get_key(const char *table, const char *key)
+{
+        int keylen = strlen(key);
+
+        do {
+                if (!strncmp(table, key, keylen) && table[keylen] == '=')
+                        return table + keylen + 1;
+
+                table += strlen(table) + 1;
+        } while (strlen(table) != 0);
+
+        return NULL;
+}
+
+int planetcore_get_decimal(const char *table, const char *key, u64 *val)
+{
+        const char *str = planetcore_get_key(table, key);
+        if (!str)
+                return 0;
+
+        *val = strtoull(str, NULL, 10);
+        return 1;
+}
+
+int planetcore_get_hex(const char *table, const char *key, u64 *val)
+{
+        const char *str = planetcore_get_key(table, key);
+        if (!str)
+                return 0;
+
+        *val = strtoull(str, NULL, 16);
+        return 1;
+}
+
+static u64 mac_table[4] = {
+        0x000000000000,
+        0x000000800000,
+        0x000000400000,
+        0x000000c00000,
+};
+
+void planetcore_set_mac_addrs(const char *table)
+{
+        u8 addr[4][6];
+        u64 int_addr;
+        u32 i;
+        int j;
+
+        if (!planetcore_get_hex(table, PLANETCORE_KEY_MAC_ADDR, &int_addr))
+                return;
+
+        for (i = 0; i < 4; i++) {
+                u64 this_dev_addr = (int_addr & ~0x000000c00000) |
+                                    mac_table[i];
+
+                for (j = 5; j >= 0; j--) {
+                        addr[i][j] = this_dev_addr & 0xff;
+                        this_dev_addr >>= 8;
+                }
+
+                dt_fixup_mac_address(i, addr[i]);
+        }
+}
+
+static char prop_buf[MAX_PROP_LEN];
+
+void planetcore_set_stdout_path(const char *table)
+{
+        char *path;
+        const char *label;
+        void *node, *chosen;
+
+        label = planetcore_get_key(table, PLANETCORE_KEY_SERIAL_PORT);
+        if (!label)
+                return;
+
+        node = find_node_by_prop_value_str(NULL, "linux,planetcore-label",
+                                           label);
+        if (!node)
+                return;
+
+        path = get_path(node, prop_buf, MAX_PROP_LEN);
+        if (!path)
+                return;
+
+        chosen = finddevice("/chosen");
+        if (!chosen)
+                chosen = create_node(NULL, "chosen");
+        if (!chosen)
+                return;
+
+        setprop_str(chosen, "linux,stdout-path", path);
+}
+
+void planetcore_set_serial_speed(const char *table)
+{
+        void *chosen, *stdout;
+        u64 baud;
+        u32 baud32;
+        int len;
+
+        chosen = finddevice("/chosen");
+        if (!chosen)
+                return;
+
+        len = getprop(chosen, "linux,stdout-path", prop_buf, MAX_PROP_LEN);
+        if (len <= 0)
+                return;
+
+        stdout = finddevice(prop_buf);
+        if (!stdout) {
+                printf("planetcore_set_serial_speed: "
+                       "Bad /chosen/linux,stdout-path.\r\n");
+
+                return;
+        }
+
+        if (!planetcore_get_decimal(table, PLANETCORE_KEY_SERIAL_BAUD,
+                                    &baud)) {
+                printf("planetcore_set_serial_speed: No SB tag.\r\n");
+                return;
+        }
+
+        baud32 = baud;
+        setprop(stdout, "current-speed", &baud32, 4);
+}
diff --git a/arch/powerpc/boot/planetcore.h b/arch/powerpc/boot/planetcore.h
new file mode 100644
index 000000000000..0d4094f1771c
--- /dev/null
+++ b/arch/powerpc/boot/planetcore.h
@@ -0,0 +1,49 @@
+#ifndef _PPC_BOOT_PLANETCORE_H_
+#define _PPC_BOOT_PLANETCORE_H_
+
+#include "types.h"
+
+#define PLANETCORE_KEY_BOARD_TYPE   "BO"
+#define PLANETCORE_KEY_BOARD_REV    "BR"
+#define PLANETCORE_KEY_MB_RAM       "D1"
+#define PLANETCORE_KEY_MAC_ADDR     "EA"
+#define PLANETCORE_KEY_FLASH_SPEED  "FS"
+#define PLANETCORE_KEY_IP_ADDR      "IP"
+#define PLANETCORE_KEY_KB_NVRAM     "NV"
+#define PLANETCORE_KEY_PROCESSOR    "PR"
+#define PLANETCORE_KEY_PROC_VARIANT "PV"
+#define PLANETCORE_KEY_SERIAL_BAUD  "SB"
+#define PLANETCORE_KEY_SERIAL_PORT  "SP"
+#define PLANETCORE_KEY_SWITCH       "SW"
+#define PLANETCORE_KEY_TEMP_OFFSET  "TC"
+#define PLANETCORE_KEY_TARGET_IP    "TIP"
+#define PLANETCORE_KEY_CRYSTAL_HZ   "XT"
+
+/* Prepare the table for processing, by turning all newlines
+ * into NULL bytes.
+ */
+void planetcore_prepare_table(char *table);
+
+/* Return the value associated with a given key in text,
+ * decimal, or hex format.
+ *
+ * Returns zero/NULL on failure, non-zero on success.
+ */
+const char *planetcore_get_key(const char *table, const char *key);
+int planetcore_get_decimal(const char *table, const char *key, u64 *val);
+int planetcore_get_hex(const char *table, const char *key, u64 *val);
+
+/* Updates the device tree local-mac-address properties based
+ * on the EA tag.
+ */
+void planetcore_set_mac_addrs(const char *table);
+
+/* Sets the linux,stdout-path in the /chosen node.  This requires the
+ * linux,planetcore-label property in each serial node.
+ */
+void planetcore_set_stdout_path(const char *table);
+
+/* Sets the current-speed property in the serial node. */
+void planetcore_set_serial_speed(const char *table);
+
+#endif
diff --git a/arch/powerpc/boot/ppcboot.h b/arch/powerpc/boot/ppcboot.h
index 5290ff2c2b2b..6ae6f9063952 100644
--- a/arch/powerpc/boot/ppcboot.h
+++ b/arch/powerpc/boot/ppcboot.h
@@ -78,17 +78,18 @@ typedef struct bd_info {
         hymod_conf_t    bi_hymod_conf;  /* hymod configuration information */
 #endif
 #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
-        defined(TARGET_85xx) || defined(TARGET_83xx)
+        defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
         /* second onboard ethernet port */
         unsigned char   bi_enet1addr[6];
 #define HAVE_ENET1ADDR
 #endif
-#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || defined(TARGET_85xx)
+#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
+    defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
         /* third onboard ethernet ports */
         unsigned char   bi_enet2addr[6];
 #define HAVE_ENET2ADDR
 #endif
-#if defined(TARGET_440GX)
+#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
         /* fourth onboard ethernet ports */
         unsigned char   bi_enet3addr[6];
 #define HAVE_ENET3ADDR
diff --git a/arch/powerpc/boot/prpmc2800.c b/arch/powerpc/boot/prpmc2800.c
index f428bac10d4a..9614e1db9dae 100644
--- a/arch/powerpc/boot/prpmc2800.c
+++ b/arch/powerpc/boot/prpmc2800.c
@@ -21,12 +21,6 @@
 #include "gunzip_util.h"
 #include "mv64x60.h"
 
-extern char _end[];
-extern char _vmlinux_start[], _vmlinux_end[];
-extern char _dtb_start[], _dtb_end[];
-
-extern void udelay(long delay);
-
 #define KB      1024U
 #define MB      (KB*KB)
 #define GB      (KB*MB)
diff --git a/arch/powerpc/boot/ps3.c b/arch/powerpc/boot/ps3.c
index 893d59339c26..d6661151b494 100644
--- a/arch/powerpc/boot/ps3.c
+++ b/arch/powerpc/boot/ps3.c
@@ -120,10 +120,6 @@ void ps3_copy_vectors(void)
 
 void platform_init(void)
 {
-        extern char _end[];
-        extern char _dtb_start[];
-        extern char _initrd_start[];
-        extern char _initrd_end[];
         const u32 heapsize = 0x1000000 - (u32)_end; /* 16MiB */
         void *chosen;
         unsigned long ft_addr;
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index eaa0d3ae3518..95e08e4ddcd2 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -19,8 +19,6 @@
 #include "io.h"
 #include "ops.h"
 
-extern void udelay(long delay);
-
 static int serial_open(void)
 {
         struct serial_console_data *scdp = console_ops.data;
@@ -114,29 +112,34 @@ int serial_console_init(void)
 {
         void *devp;
         int rc = -1;
-        char compat[MAX_PROP_LEN];
 
         devp = serial_get_stdout_devp();
         if (devp == NULL)
                 goto err_out;
 
-        if (getprop(devp, "compatible", compat, sizeof(compat)) < 0)
-                goto err_out;
-
-        if (!strcmp(compat, "ns16550"))
+        if (dt_is_compatible(devp, "ns16550"))
                 rc = ns16550_console_init(devp, &serial_cd);
-        else if (!strcmp(compat, "marvell,mpsc"))
+        else if (dt_is_compatible(devp, "marvell,mpsc"))
                 rc = mpsc_console_init(devp, &serial_cd);
+        else if (dt_is_compatible(devp, "fsl,cpm1-scc-uart") ||
+                 dt_is_compatible(devp, "fsl,cpm1-smc-uart") ||
+                 dt_is_compatible(devp, "fsl,cpm2-scc-uart") ||
+                 dt_is_compatible(devp, "fsl,cpm2-smc-uart"))
+                rc = cpm_console_init(devp, &serial_cd);
+        else if (dt_is_compatible(devp, "mpc5200-psc-uart"))
+                rc = mpc5200_psc_console_init(devp, &serial_cd);
 
         /* Add other serial console driver calls here */
 
         if (!rc) {
                 console_ops.open = serial_open;
                 console_ops.write = serial_write;
-                console_ops.edit_cmdline = serial_edit_cmdline;
                 console_ops.close = serial_close;
                 console_ops.data = &serial_cd;
 
+                if (serial_cd.getc)
+                        console_ops.edit_cmdline = serial_edit_cmdline;
+
                 return 0;
         }
 err_out:
diff --git a/arch/powerpc/boot/stdlib.c b/arch/powerpc/boot/stdlib.c
new file mode 100644
index 000000000000..e00d58c29eea
--- /dev/null
+++ b/arch/powerpc/boot/stdlib.c
@@ -0,0 +1,45 @@
+/*
+ * stdlib functions
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "stdlib.h"
+
+/* Not currently supported: leading whitespace, sign, 0x prefix, zero base */
+unsigned long long int strtoull(const char *ptr, char **end, int base)
+{
+        unsigned long long ret = 0;
+
+        if (base > 36)
+                goto out;
+
+        while (*ptr) {
+                int digit;
+
+                if (*ptr >= '0' && *ptr <= '9' && *ptr < '0' + base)
+                        digit = *ptr - '0';
+                else if (*ptr >= 'A' && *ptr < 'A' + base - 10)
+                        digit = *ptr - 'A' + 10;
+                else if (*ptr >= 'a' && *ptr < 'a' + base - 10)
+                        digit = *ptr - 'a' + 10;
+                else
+                        break;
+
+                ret *= base;
+                ret += digit;
+                ptr++;
+        }
+
+out:
+        if (end)
+                *end = (char *)ptr;
+
+        return ret;
+}
diff --git a/arch/powerpc/boot/stdlib.h b/arch/powerpc/boot/stdlib.h
new file mode 100644
index 000000000000..1bf01ac73aba
--- /dev/null
+++ b/arch/powerpc/boot/stdlib.h
@@ -0,0 +1,6 @@
+#ifndef _PPC_BOOT_STDLIB_H_
+#define _PPC_BOOT_STDLIB_H_
+
+unsigned long long int strtoull(const char *ptr, char **end, int base);
+
+#endif
diff --git a/arch/powerpc/boot/string.S b/arch/powerpc/boot/string.S
index ac3d43b6a324..2627558bcb71 100644
--- a/arch/powerpc/boot/string.S
+++ b/arch/powerpc/boot/string.S
@@ -49,6 +49,17 @@ strcat:
         bne     1b
         blr
 
+        .globl  strchr
+strchr:
+        addi    r3,r3,-1
+1:      lbzu    r0,1(r3)
+        cmpw    0,r0,r4
+        beqlr
+        cmpwi   0,r0,0
+        bne     1b
+        li      r3,0
+        blr
+
         .globl  strcmp
 strcmp:
         addi    r5,r3,-1
@@ -61,6 +72,19 @@ strcmp:
         beq     1b
         blr
 
+        .globl  strncmp
+strncmp:
+        mtctr   r5
+        addi    r5,r3,-1
+        addi    r4,r4,-1
+1:      lbzu    r3,1(r5)
+        cmpwi   1,r3,0
+        lbzu    r0,1(r4)
+        subf.   r3,r0,r3
+        beqlr   1
+        bdnzt   eq,1b
+        blr
+
         .globl  strlen
 strlen:
         addi    r4,r3,-1
diff --git a/arch/powerpc/boot/string.h b/arch/powerpc/boot/string.h
index 9fdff1cc0d70..4650030d1040 100644
--- a/arch/powerpc/boot/string.h
+++ b/arch/powerpc/boot/string.h
@@ -5,7 +5,9 @@
 extern char *strcpy(char *dest, const char *src);
 extern char *strncpy(char *dest, const char *src, size_t n);
 extern char *strcat(char *dest, const char *src);
+extern char *strchr(const char *s, int c);
 extern int strcmp(const char *s1, const char *s2);
+extern int strncmp(const char *s1, const char *s2, size_t n);
 extern size_t strlen(const char *s);
 extern size_t strnlen(const char *s, size_t count);
 
diff --git a/arch/powerpc/boot/treeboot-bamboo.c b/arch/powerpc/boot/treeboot-bamboo.c
new file mode 100644
index 000000000000..9eee48fc7114
--- /dev/null
+++ b/arch/powerpc/boot/treeboot-bamboo.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright IBM Corporation, 2007
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Based on ebony wrapper:
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the License
+ */
+#include "ops.h"
+#include "stdio.h"
+#include "44x.h"
+#include "stdlib.h"
+
+BSS_STACK(4096);
+
+#define PIBS_MAC0 0xfffc0400
+#define PIBS_MAC1 0xfffc0500
+char pibs_mac0[6];
+char pibs_mac1[6];
+
+static void read_pibs_mac(void)
+{
+        unsigned long long mac64;
+
+        mac64 = strtoull((char *)PIBS_MAC0, 0, 16);
+        memcpy(&pibs_mac0, (char *)&mac64+2, 6);
+
+        mac64 = strtoull((char *)PIBS_MAC1, 0, 16);
+        memcpy(&pibs_mac1, (char *)&mac64+2, 6);
+}
+
+void platform_init(void)
+{
+        unsigned long end_of_ram = 0x8000000;
+        unsigned long avail_ram = end_of_ram - (unsigned long)_end;
+
+        simple_alloc_init(_end, avail_ram, 32, 64);
+        read_pibs_mac();
+        bamboo_init((u8 *)&pibs_mac0, (u8 *)&pibs_mac1);
+}
diff --git a/arch/powerpc/boot/treeboot-ebony.c b/arch/powerpc/boot/treeboot-ebony.c
index 8436a9c55192..21cc4834a384 100644
--- a/arch/powerpc/boot/treeboot-ebony.c
+++ b/arch/powerpc/boot/treeboot-ebony.c
@@ -16,8 +16,6 @@
 #include "stdio.h"
 #include "44x.h"
 
-extern char _end[];
-
 BSS_STACK(4096);
 
 #define OPENBIOS_MAC_BASE       0xfffffe0c
diff --git a/arch/powerpc/boot/treeboot-walnut.c b/arch/powerpc/boot/treeboot-walnut.c
new file mode 100644
index 000000000000..3adf2d08a230
--- /dev/null
+++ b/arch/powerpc/boot/treeboot-walnut.c
@@ -0,0 +1,131 @@
+/*
+ * Old U-boot compatibility for Walnut
+ *
+ * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Copyright 2007 IBM Corporation
+ *   Based on cuboot-83xx.c, which is:
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "io.h"
+
+BSS_STACK(4096);
+
+void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
+{
+        u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
+        u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
+        u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
+        u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
+        u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
+
+        fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
+        fbdv = (pllmr & 0x1e000000) >> 25;
+        cbdv = ((pllmr & 0x00060000) >> 17) + 1;
+        opdv = ((pllmr & 0x00018000) >> 15) + 1;
+        epdv = ((pllmr & 0x00001800) >> 13) + 2;
+        udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
+
+        m = fwdv * fbdv * cbdv;
+
+        cpu = sysclk * m / fwdv;
+        plb = cpu / cbdv;
+        opb = plb / opdv;
+        ebc = plb / epdv;
+
+        if (cpc0_cr0 & 0x80) {
+                /* uart0 uses the external clock */
+                uart0 = ser_clk;
+        } else {
+                uart0 = cpu / udiv;
+        }
+
+        if (cpc0_cr0 & 0x40) {
+                /* uart1 uses the external clock */
+                uart1 = ser_clk;
+        } else {
+                uart1 = cpu / udiv;
+        }
+
+        /* setup the timebase clock to tick at the cpu frequency */
+        cpc0_cr1 = cpc0_cr1 & ~ 0x00800000;
+        mtdcr(DCRN_CPC0_CR1, cpc0_cr1);
+        tb = cpu;
+
+        dt_fixup_cpu_clocks(cpu, tb, 0);
+        dt_fixup_clock("/plb", plb);
+        dt_fixup_clock("/plb/opb", opb);
+        dt_fixup_clock("/plb/ebc", ebc);
+        dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
+        dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
+}
+
+static void walnut_flashsel_fixup(void)
+{
+        void *devp, *sram;
+        u32 reg_flash[3] = {0x0, 0x0, 0x80000};
+        u32 reg_sram[3] = {0x0, 0x0, 0x80000};
+        u8 *fpga;
+        u8 fpga_brds1 = 0x0;
+
+        devp = finddevice("/plb/ebc/fpga");
+        if (!devp)
+                fatal("Couldn't locate FPGA node\n\r");
+
+        if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
+                fatal("no virtual-reg property\n\r");
+
+        fpga_brds1 = in_8(fpga);
+
+        devp = finddevice("/plb/ebc/flash");
+        if (!devp)
+                fatal("Couldn't locate flash node\n\r");
+
+        if (getprop(devp, "reg", reg_flash, sizeof(reg_flash)) != sizeof(reg_flash))
+                fatal("flash reg property has unexpected size\n\r");
+
+        sram = finddevice("/plb/ebc/sram");
+        if (!sram)
+                fatal("Couldn't locate sram node\n\r");
+
+        if (getprop(sram, "reg", reg_sram, sizeof(reg_sram)) != sizeof(reg_sram))
+                fatal("sram reg property has unexpected size\n\r");
+
+        if (fpga_brds1 & 0x1) {
+                reg_flash[1] ^= 0x80000;
+                reg_sram[1] ^= 0x80000;
+        }
+
+        setprop(devp, "reg", reg_flash, sizeof(reg_flash));
+        setprop(sram, "reg", reg_sram, sizeof(reg_sram));
+}
+
+static void walnut_fixups(void)
+{
+        ibm4xx_fixup_memsize();
+        ibm405gp_fixup_clocks(33330000, 0xa8c000);
+        ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
+        ibm4xx_fixup_ebc_ranges("/plb/ebc");
+        walnut_flashsel_fixup();
+}
+
+void platform_init(void)
+{
+        unsigned long end_of_ram = 0x2000000;
+        unsigned long avail_ram = end_of_ram - (unsigned long) _end;
+
+        simple_alloc_init(_end, avail_ram, 32, 32);
+        platform_ops.fixups = walnut_fixups;
+        platform_ops.exit = ibm40x_dbcr_reset;
+        ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+        serial_console_init();
+}
diff --git a/arch/powerpc/configs/bamboo_defconfig b/arch/powerpc/configs/bamboo_defconfig
new file mode 100644
index 000000000000..b592dec4640f
--- /dev/null
+++ b/arch/powerpc/configs/bamboo_defconfig
@@ -0,0 +1,775 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23-rc1
+# Fri Aug  3 10:46:53 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_4xx=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_BAMBOO=y
+# CONFIG_EBONY is not set
+CONFIG_440EP=y
+CONFIG_IBM440EP_ERR42=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="bamboo.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x01000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_MACINTOSH_DRIVERS=y
+# CONFIG_MAC_EMUMOUSEBTN is not set
+# CONFIG_WINDFARM is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_DEBUGGER=y
+# CONFIG_KGDB is not set
+# CONFIG_XMON is not set
+# CONFIG_BDI_SWITCH is not set
+CONFIG_PPC_EARLY_DEBUG=y
+# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
+# CONFIG_PPC_EARLY_DEBUG_G5 is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
+# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
+# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
+# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
+# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
+CONFIG_PPC_EARLY_DEBUG_44x=y
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x0
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
diff --git a/arch/powerpc/configs/ebony_defconfig b/arch/powerpc/configs/ebony_defconfig
index ebb8167608b8..3a50467b1f75 100644
--- a/arch/powerpc/configs/ebony_defconfig
+++ b/arch/powerpc/configs/ebony_defconfig
@@ -313,7 +313,80 @@ CONFIG_FW_LOADER=y
 # CONFIG_SYS_HYPERVISOR is not set
 CONFIG_CONNECTOR=y
 CONFIG_PROC_EVENTS=y
-# CONFIG_MTD is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
 CONFIG_OF_DEVICE=y
 # CONFIG_PARPORT is not set
 CONFIG_BLK_DEV=y
@@ -607,6 +680,15 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
 # CONFIG_HPFS_FS is not set
@@ -665,6 +747,7 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
 CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
diff --git a/arch/powerpc/configs/mpc8544_ds_defconfig b/arch/powerpc/configs/mpc8544_ds_defconfig
index 86582aefab93..150221f6f723 100644
--- a/arch/powerpc/configs/mpc8544_ds_defconfig
+++ b/arch/powerpc/configs/mpc8544_ds_defconfig
@@ -136,7 +136,7 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # CONFIG_MPC8560_ADS is not set
 # CONFIG_MPC85xx_CDS is not set
 # CONFIG_MPC85xx_MDS is not set
-CONFIG_MPC8544_DS=y
+CONFIG_MPC85xx_DS=y
 CONFIG_MPC85xx=y
 CONFIG_MPIC=y
 # CONFIG_MPIC_WEIRD is not set
diff --git a/arch/powerpc/configs/mpc8572_ds_defconfig b/arch/powerpc/configs/mpc8572_ds_defconfig
new file mode 100644
index 000000000000..7f1a3e987138
--- /dev/null
+++ b/arch/powerpc/configs/mpc8572_ds_defconfig
@@ -0,0 +1,1496 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23-rc4
+# Tue Sep 11 01:19:35 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+CONFIG_PPC_85xx=y
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_85xx=y
+CONFIG_E500=y
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+CONFIG_AUDIT=y
+# CONFIG_AUDITSYSCALL is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_MPC85xx_CDS is not set
+# CONFIG_MPC85xx_MDS is not set
+CONFIG_MPC85xx_DS=y
+CONFIG_MPC85xx=y
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+CONFIG_PPC_I8259=y
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+CONFIG_FSL_ULI1575=y
+
+#
+# Kernel options
+#
+CONFIG_HIGHMEM=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_MATH_EMULATION=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE=""
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_NET_IPGRE=y
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_ARPD=y
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+CONFIG_SCSI_LOGGING=y
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_AHCI=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+CONFIG_PATA_ALI=y
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+CONFIG_VITESSE_PHY=y
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET_MII is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+CONFIG_NVRAM=y
+CONFIG_GEN_RTC=y
+CONFIG_GEN_RTC_X=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+CONFIG_SENSORS_EEPROM=y
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_DVB_CORE=m
+# CONFIG_DVB_CORE_ATTACH is not set
+CONFIG_DVB_CAPTURE_DRIVERS=y
+
+#
+# Supported SAA7146 based PCI Adapters
+#
+
+#
+# Supported USB Adapters
+#
+# CONFIG_DVB_USB is not set
+# CONFIG_DVB_TTUSB_BUDGET is not set
+# CONFIG_DVB_TTUSB_DEC is not set
+# CONFIG_DVB_CINERGYT2 is not set
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+# CONFIG_DVB_B2C2_FLEXCOP is not set
+
+#
+# Supported BT878 Adapters
+#
+
+#
+# Supported Pluto2 Adapters
+#
+# CONFIG_DVB_PLUTO2 is not set
+
+#
+# Supported DVB Frontends
+#
+
+#
+# Customise DVB Frontends
+#
+# CONFIG_DVB_FE_CUSTOMISE is not set
+
+#
+# DVB-S (satellite) frontends
+#
+# CONFIG_DVB_STV0299 is not set
+# CONFIG_DVB_CX24110 is not set
+# CONFIG_DVB_CX24123 is not set
+# CONFIG_DVB_TDA8083 is not set
+# CONFIG_DVB_MT312 is not set
+# CONFIG_DVB_VES1X93 is not set
+# CONFIG_DVB_S5H1420 is not set
+# CONFIG_DVB_TDA10086 is not set
+
+#
+# DVB-T (terrestrial) frontends
+#
+# CONFIG_DVB_SP8870 is not set
+# CONFIG_DVB_SP887X is not set
+# CONFIG_DVB_CX22700 is not set
+# CONFIG_DVB_CX22702 is not set
+# CONFIG_DVB_L64781 is not set
+# CONFIG_DVB_TDA1004X is not set
+# CONFIG_DVB_NXT6000 is not set
+# CONFIG_DVB_MT352 is not set
+# CONFIG_DVB_ZL10353 is not set
+# CONFIG_DVB_DIB3000MB is not set
+# CONFIG_DVB_DIB3000MC is not set
+# CONFIG_DVB_DIB7000M is not set
+# CONFIG_DVB_DIB7000P is not set
+
+#
+# DVB-C (cable) frontends
+#
+# CONFIG_DVB_VES1820 is not set
+# CONFIG_DVB_TDA10021 is not set
+# CONFIG_DVB_TDA10023 is not set
+# CONFIG_DVB_STV0297 is not set
+
+#
+# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
+#
+# CONFIG_DVB_NXT200X is not set
+# CONFIG_DVB_OR51211 is not set
+# CONFIG_DVB_OR51132 is not set
+# CONFIG_DVB_BCM3510 is not set
+# CONFIG_DVB_LGDT330X is not set
+
+#
+# Tuners/PLL support
+#
+# CONFIG_DVB_PLL is not set
+# CONFIG_DVB_TDA826X is not set
+# CONFIG_DVB_TDA827X is not set
+# CONFIG_DVB_TUNER_QT1010 is not set
+# CONFIG_DVB_TUNER_MT2060 is not set
+
+#
+# Miscellaneous devices
+#
+# CONFIG_DVB_LNBP21 is not set
+# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DVB_TUA6100 is not set
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5530 is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+CONFIG_SND_INTEL8X0=y
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+
+#
+# ALSA PowerMac devices
+#
+
+#
+# ALSA PowerPC devices
+#
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_USX2Y is not set
+# CONFIG_SND_USB_CAIAQ is not set
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_CRAMFS=y
+CONFIG_VXFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+# CONFIG_UFS_DEBUG is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_ECB is not set
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
diff --git a/arch/powerpc/configs/sequoia_defconfig b/arch/powerpc/configs/sequoia_defconfig
new file mode 100644
index 000000000000..bc7f5089a894
--- /dev/null
+++ b/arch/powerpc/configs/sequoia_defconfig
@@ -0,0 +1,861 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23-rc6
+# Fri Sep 14 13:20:06 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_4xx=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_BAMBOO is not set
+# CONFIG_EBONY is not set
+CONFIG_SEQUOIA=y
+CONFIG_440EPX=y
+CONFIG_440A=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="sequoia.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x01000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_MACINTOSH_DRIVERS=y
+# CONFIG_MAC_EMUMOUSEBTN is not set
+# CONFIG_WINDFARM is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_DEBUGGER=y
+# CONFIG_KGDB is not set
+# CONFIG_XMON is not set
+# CONFIG_BDI_SWITCH is not set
+CONFIG_PPC_EARLY_DEBUG=y
+# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
+# CONFIG_PPC_EARLY_DEBUG_G5 is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
+# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
+# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
+# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
+# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
+CONFIG_PPC_EARLY_DEBUG_44x=y
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
diff --git a/arch/powerpc/configs/walnut_defconfig b/arch/powerpc/configs/walnut_defconfig
new file mode 100644
index 000000000000..766bf840c18d
--- /dev/null
+++ b/arch/powerpc/configs/walnut_defconfig
@@ -0,0 +1,773 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23-rc4
+# Wed Sep  5 12:06:37 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+CONFIG_40x=y
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_4xx=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_WALNUT=y
+CONFIG_405GP=y
+CONFIG_IBM405_ERR77=y
+CONFIG_IBM405_ERR51=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="walnut.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_WALNUT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index b0cb2e662c25..fb33a7e71941 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_PPC64)		+= vdso64/
 obj-$(CONFIG_ALTIVEC)           += vecemu.o vector.o
 obj-$(CONFIG_PPC_970_NAP)       += idle_power4.o
 obj-$(CONFIG_PPC_OF)            += of_device.o of_platform.o prom_parse.o
+obj-$(CONFIG_PPC_CLOCK)         += clock.o
 procfs-$(CONFIG_PPC64)          := proc_ppc64.o
 obj-$(CONFIG_PROC_FS)           += $(procfs-y)
 rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI)   := rtas_pci.o
@@ -37,25 +38,26 @@ obj-$(CONFIG_GENERIC_TBSYNC)	+= smp-tbsync.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
 obj-$(CONFIG_6xx)               += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
 obj-$(CONFIG_TAU)               += tau_6xx.o
-obj-$(CONFIG_HIBERNATION)       += swsusp.o suspend.o
-obj32-$(CONFIG_HIBERNATION) += swsusp_32.o
-obj64-$(CONFIG_HIBERNATION) += swsusp_64.o swsusp_asm64.o
-obj32-$(CONFIG_MODULES)         += module_32.o
+obj-$(CONFIG_HIBERNATION)       += swsusp.o suspend.o \
+                                   swsusp_$(CONFIG_WORD_SIZE).o
+obj64-$(CONFIG_HIBERNATION)     += swsusp_asm64.o
+obj-$(CONFIG_MODULES)           += module_$(CONFIG_WORD_SIZE).o
 
 ifeq ($(CONFIG_PPC_MERGE),y)
 
 extra-$(CONFIG_PPC_STD_MMU)     := head_32.o
 extra-$(CONFIG_PPC64)           := head_64.o
-extra-$(CONFIG_40x)             := head_4xx.o
+extra-$(CONFIG_40x)             := head_40x.o
 extra-$(CONFIG_44x)             := head_44x.o
 extra-$(CONFIG_FSL_BOOKE)       := head_fsl_booke.o
 extra-$(CONFIG_8xx)             := head_8xx.o
 extra-y                         += vmlinux.lds
 
 obj-y                           += time.o prom.o traps.o setup-common.o \
-                                   udbg.o misc.o io.o
-obj-$(CONFIG_PPC32)             += entry_32.o setup_32.o misc_32.o
-obj-$(CONFIG_PPC64)             += misc_64.o dma_64.o iommu.o
+                                   udbg.o misc.o io.o \
+                                   misc_$(CONFIG_WORD_SIZE).o
+obj-$(CONFIG_PPC32)             += entry_32.o setup_32.o
+obj-$(CONFIG_PPC64)             += dma_64.o iommu.o
 obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
 obj-$(CONFIG_MODULES)           += ppc_ksyms.o
 obj-$(CONFIG_BOOTX_TEXT)        += btext.o
@@ -63,16 +65,12 @@ obj-$(CONFIG_SMP)		+= smp.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 obj-$(CONFIG_PPC_UDBG_16550)    += legacy_serial.o udbg_16550.o
 
-module-$(CONFIG_PPC64)          += module_64.o
-obj-$(CONFIG_MODULES)           += $(module-y)
-
-pci64-$(CONFIG_PPC64)           += pci_64.o pci_dn.o isa-bridge.o
-pci32-$(CONFIG_PPC32)           := pci_32.o
-obj-$(CONFIG_PCI)               += $(pci64-y) $(pci32-y) pci-common.o
+pci64-$(CONFIG_PPC64)           += pci_dn.o isa-bridge.o
+obj-$(CONFIG_PCI)               += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
+                                   pci-common.o
 obj-$(CONFIG_PCI_MSI)           += msi.o
-kexec-$(CONFIG_PPC64)           := machine_kexec_64.o
-kexec-$(CONFIG_PPC32)           := machine_kexec_32.o
-obj-$(CONFIG_KEXEC)             += machine_kexec.o crash.o $(kexec-y)
+obj-$(CONFIG_KEXEC)             += machine_kexec.o crash.o \
+                                   machine_kexec_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_AUDIT)             += audit.o
 obj64-$(CONFIG_AUDIT)           += compat_audit.o
 
@@ -80,20 +78,12 @@ ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
 obj-y                           += iomap.o
 endif
 
-ifeq ($(CONFIG_PPC_ISERIES),y)
-CFLAGS_lparmap.s                += -g0
-extra-y += lparmap.s
-$(obj)/head_64.o:       $(obj)/lparmap.s
-AFLAGS_head_64.o += -I$(obj)
-endif
-
 else
 # stuff used from here for ARCH=ppc
 smpobj-$(CONFIG_SMP)            += smp.o
 
 endif
 
-obj-$(CONFIG_PPC32)             += $(obj32-y)
 obj-$(CONFIG_PPC64)             += $(obj64-y)
 
 extra-$(CONFIG_PPC_FPU)         += fpu.o
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 5c9ff7f5c44e..e06f75daeba3 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -38,7 +38,7 @@ struct aligninfo {
 /* Bits in the flags field */
 #define LD      0       /* load */
 #define ST      1       /* store */
-#define SE      2       /* sign-extend value */
+#define SE      2       /* sign-extend value, or FP ld/st as word */
 #define F       4       /* to/from fp regs */
 #define U       8       /* update index register */
 #define M       0x10    /* multiple load/store */
@@ -46,6 +46,8 @@ struct aligninfo {
 #define S       0x40    /* single-precision fp or... */
 #define SX      0x40    /* ... byte count in XER */
 #define HARD    0x80    /* string, stwcx. */
+#define E4      0x40    /* SPE endianness is word */
+#define E8      0x80    /* SPE endianness is double word */
 
 /* DSISR bits reported for a DCBZ instruction: */
 #define DCBZ    0x5f    /* 8xx/82xx dcbz faults when cache not enabled */
@@ -87,9 +89,9 @@ static struct aligninfo aligninfo[128] = {
         { 8, LD+F+U },          /* 00 1 1001: lfdu */
         { 4, ST+F+S+U },        /* 00 1 1010: stfsu */
         { 8, ST+F+U },          /* 00 1 1011: stfdu */
-        INVALID,                /* 00 1 1100 */
+        { 16, LD+F },           /* 00 1 1100: lfdp */
         INVALID,                /* 00 1 1101 */
-        INVALID,                /* 00 1 1110 */
+        { 16, ST+F },           /* 00 1 1110: stfdp */
         INVALID,                /* 00 1 1111 */
         { 8, LD },              /* 01 0 0000: ldx */
         INVALID,                /* 01 0 0001 */
@@ -167,10 +169,10 @@ static struct aligninfo aligninfo[128] = {
         { 8, LD+F },            /* 11 0 1001: lfdx */
         { 4, ST+F+S },          /* 11 0 1010: stfsx */
         { 8, ST+F },            /* 11 0 1011: stfdx */
-        INVALID,                /* 11 0 1100 */
-        { 8, LD+M },            /* 11 0 1101: lmd */
-        INVALID,                /* 11 0 1110 */
-        { 8, ST+M },            /* 11 0 1111: stmd */
+        { 16, LD+F },           /* 11 0 1100: lfdpx */
+        { 4, LD+F+SE },         /* 11 0 1101: lfiwax */
+        { 16, ST+F },           /* 11 0 1110: stfdpx */
+        { 4, ST+F },            /* 11 0 1111: stfiwx */
         { 4, LD+U },            /* 11 1 0000: lwzux */
         INVALID,                /* 11 1 0001 */
         { 4, ST+U },            /* 11 1 0010: stwux */
@@ -356,6 +358,284 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr,
         return 1;
 }
 
+/*
+ * Emulate floating-point pair loads and stores.
+ * Only POWER6 has these instructions, and it does true little-endian,
+ * so we don't need the address swizzling.
+ */
+static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr,
+                           unsigned int reg, unsigned int flags)
+{
+        char *ptr = (char *) &current->thread.fpr[reg];
+        int i, ret;
+
+        if (!(flags & F))
+                return 0;
+        if (reg & 1)
+                return 0;       /* invalid form: FRS/FRT must be even */
+        if (!(flags & SW)) {
+                /* not byte-swapped - easy */
+                if (!(flags & ST))
+                        ret = __copy_from_user(ptr, addr, 16);
+                else
+                        ret = __copy_to_user(addr, ptr, 16);
+        } else {
+                /* each FPR value is byte-swapped separately */
+                ret = 0;
+                for (i = 0; i < 16; ++i) {
+                        if (!(flags & ST))
+                                ret |= __get_user(ptr[i^7], addr + i);
+                        else
+                                ret |= __put_user(ptr[i^7], addr + i);
+                }
+        }
+        if (ret)
+                return -EFAULT;
+        return 1;       /* exception handled and fixed up */
+}
+
+#ifdef CONFIG_SPE
+
+static struct aligninfo spe_aligninfo[32] = {
+        { 8, LD+E8 },           /* 0 00 00: evldd[x] */
+        { 8, LD+E4 },           /* 0 00 01: evldw[x] */
+        { 8, LD },              /* 0 00 10: evldh[x] */
+        INVALID,                /* 0 00 11 */
+        { 2, LD },              /* 0 01 00: evlhhesplat[x] */
+        INVALID,                /* 0 01 01 */
+        { 2, LD },              /* 0 01 10: evlhhousplat[x] */
+        { 2, LD+SE },           /* 0 01 11: evlhhossplat[x] */
+        { 4, LD },              /* 0 10 00: evlwhe[x] */
+        INVALID,                /* 0 10 01 */
+        { 4, LD },              /* 0 10 10: evlwhou[x] */
+        { 4, LD+SE },           /* 0 10 11: evlwhos[x] */
+        { 4, LD+E4 },           /* 0 11 00: evlwwsplat[x] */
+        INVALID,                /* 0 11 01 */
+        { 4, LD },              /* 0 11 10: evlwhsplat[x] */
+        INVALID,                /* 0 11 11 */
+
+        { 8, ST+E8 },           /* 1 00 00: evstdd[x] */
+        { 8, ST+E4 },           /* 1 00 01: evstdw[x] */
+        { 8, ST },              /* 1 00 10: evstdh[x] */
+        INVALID,                /* 1 00 11 */
+        INVALID,                /* 1 01 00 */
+        INVALID,                /* 1 01 01 */
+        INVALID,                /* 1 01 10 */
+        INVALID,                /* 1 01 11 */
+        { 4, ST },              /* 1 10 00: evstwhe[x] */
+        INVALID,                /* 1 10 01 */
+        { 4, ST },              /* 1 10 10: evstwho[x] */
+        INVALID,                /* 1 10 11 */
+        { 4, ST+E4 },           /* 1 11 00: evstwwe[x] */
+        INVALID,                /* 1 11 01 */
+        { 4, ST+E4 },           /* 1 11 10: evstwwo[x] */
+        INVALID,                /* 1 11 11 */
+};
+
+#define EVLDD           0x00
+#define EVLDW           0x01
+#define EVLDH           0x02
+#define EVLHHESPLAT     0x04
+#define EVLHHOUSPLAT    0x06
+#define EVLHHOSSPLAT    0x07
+#define EVLWHE          0x08
+#define EVLWHOU         0x0A
+#define EVLWHOS         0x0B
+#define EVLWWSPLAT      0x0C
+#define EVLWHSPLAT      0x0E
+#define EVSTDD          0x10
+#define EVSTDW          0x11
+#define EVSTDH          0x12
+#define EVSTWHE         0x18
+#define EVSTWHO         0x1A
+#define EVSTWWE         0x1C
+#define EVSTWWO         0x1E
+
+/*
+ * Emulate SPE loads and stores.
+ * Only Book-E has these instructions, and it does true little-endian,
+ * so we don't need the address swizzling.
+ */
+static int emulate_spe(struct pt_regs *regs, unsigned int reg,
+                       unsigned int instr)
+{
+        int t, ret;
+        union {
+                u64 ll;
+                u32 w[2];
+                u16 h[4];
+                u8 v[8];
+        } data, temp;
+        unsigned char __user *p, *addr;
+        unsigned long *evr = &current->thread.evr[reg];
+        unsigned int nb, flags;
+
+        instr = (instr >> 1) & 0x1f;
+
+        /* DAR has the operand effective address */
+        addr = (unsigned char __user *)regs->dar;
+
+        nb = spe_aligninfo[instr].len;
+        flags = spe_aligninfo[instr].flags;
+
+        /* Verify the address of the operand */
+        if (unlikely(user_mode(regs) &&
+                     !access_ok((flags & ST ? VERIFY_WRITE : VERIFY_READ),
+                                addr, nb)))
+                return -EFAULT;
+
+        /* userland only */
+        if (unlikely(!user_mode(regs)))
+                return 0;
+
+        flush_spe_to_thread(current);
+
+        /* If we are loading, get the data from user space, else
+         * get it from register values
+         */
+        if (flags & ST) {
+                data.ll = 0;
+                switch (instr) {
+                case EVSTDD:
+                case EVSTDW:
+                case EVSTDH:
+                        data.w[0] = *evr;
+                        data.w[1] = regs->gpr[reg];
+                        break;
+                case EVSTWHE:
+                        data.h[2] = *evr >> 16;
+                        data.h[3] = regs->gpr[reg] >> 16;
+                        break;
+                case EVSTWHO:
+                        data.h[2] = *evr & 0xffff;
+                        data.h[3] = regs->gpr[reg] & 0xffff;
+                        break;
+                case EVSTWWE:
+                        data.w[1] = *evr;
+                        break;
+                case EVSTWWO:
+                        data.w[1] = regs->gpr[reg];
+                        break;
+                default:
+                        return -EINVAL;
+                }
+        } else {
+                temp.ll = data.ll = 0;
+                ret = 0;
+                p = addr;
+
+                switch (nb) {
+                case 8:
+                        ret |= __get_user_inatomic(temp.v[0], p++);
+                        ret |= __get_user_inatomic(temp.v[1], p++);
+                        ret |= __get_user_inatomic(temp.v[2], p++);
+                        ret |= __get_user_inatomic(temp.v[3], p++);
+                case 4:
+                        ret |= __get_user_inatomic(temp.v[4], p++);
+                        ret |= __get_user_inatomic(temp.v[5], p++);
+                case 2:
+                        ret |= __get_user_inatomic(temp.v[6], p++);
+                        ret |= __get_user_inatomic(temp.v[7], p++);
+                        if (unlikely(ret))
+                                return -EFAULT;
+                }
+
+                switch (instr) {
+                case EVLDD:
+                case EVLDW:
+                case EVLDH:
+                        data.ll = temp.ll;
+                        break;
+                case EVLHHESPLAT:
+                        data.h[0] = temp.h[3];
+                        data.h[2] = temp.h[3];
+                        break;
+                case EVLHHOUSPLAT:
+                case EVLHHOSSPLAT:
+                        data.h[1] = temp.h[3];
+                        data.h[3] = temp.h[3];
+                        break;
+                case EVLWHE:
+                        data.h[0] = temp.h[2];
+                        data.h[2] = temp.h[3];
+                        break;
+                case EVLWHOU:
+                case EVLWHOS:
+                        data.h[1] = temp.h[2];
+                        data.h[3] = temp.h[3];
+                        break;
+                case EVLWWSPLAT:
+                        data.w[0] = temp.w[1];
+                        data.w[1] = temp.w[1];
+                        break;
+                case EVLWHSPLAT:
+                        data.h[0] = temp.h[2];
+                        data.h[1] = temp.h[2];
+                        data.h[2] = temp.h[3];
+                        data.h[3] = temp.h[3];
+                        break;
+                default:
+                        return -EINVAL;
+                }
+        }
+
+        if (flags & SW) {
+                switch (flags & 0xf0) {
+                case E8:
+                        SWAP(data.v[0], data.v[7]);
+                        SWAP(data.v[1], data.v[6]);
+                        SWAP(data.v[2], data.v[5]);
+                        SWAP(data.v[3], data.v[4]);
+                        break;
+                case E4:
+
+                        SWAP(data.v[0], data.v[3]);
+                        SWAP(data.v[1], data.v[2]);
+                        SWAP(data.v[4], data.v[7]);
+                        SWAP(data.v[5], data.v[6]);
+                        break;
+                /* Its half word endian */
+                default:
+                        SWAP(data.v[0], data.v[1]);
+                        SWAP(data.v[2], data.v[3]);
+                        SWAP(data.v[4], data.v[5]);
+                        SWAP(data.v[6], data.v[7]);
+                        break;
+                }
+        }
+
+        if (flags & SE) {
+                data.w[0] = (s16)data.h[1];
+                data.w[1] = (s16)data.h[3];
+        }
+
+        /* Store result to memory or update registers */
+        if (flags & ST) {
+                ret = 0;
+                p = addr;
+                switch (nb) {
+                case 8:
+                        ret |= __put_user_inatomic(data.v[0], p++);
+                        ret |= __put_user_inatomic(data.v[1], p++);
+                        ret |= __put_user_inatomic(data.v[2], p++);
+                        ret |= __put_user_inatomic(data.v[3], p++);
+                case 4:
+                        ret |= __put_user_inatomic(data.v[4], p++);
+                        ret |= __put_user_inatomic(data.v[5], p++);
+                case 2:
+                        ret |= __put_user_inatomic(data.v[6], p++);
+                        ret |= __put_user_inatomic(data.v[7], p++);
+                }
+                if (unlikely(ret))
+                        return -EFAULT;
+        } else {
+                *evr = data.w[0];
+                regs->gpr[reg] = data.w[1];
+        }
+
+        return 1;
+}
+#endif /* CONFIG_SPE */
 
 /*
  * Called on alignment exception. Attempts to fixup
@@ -414,6 +694,12 @@ int fix_alignment(struct pt_regs *regs)
         /* extract the operation and registers from the dsisr */
         reg = (dsisr >> 5) & 0x1f;      /* source/dest register */
         areg = dsisr & 0x1f;            /* register to update */
+
+#ifdef CONFIG_SPE
+        if ((instr >> 26) == 0x4)
+                return emulate_spe(regs, reg, instr);
+#endif
+
         instr = (dsisr >> 10) & 0x7f;
         instr |= (dsisr >> 13) & 0x60;
 
@@ -471,6 +757,10 @@ int fix_alignment(struct pt_regs *regs)
                 flush_fp_to_thread(current);
         }
 
+        /* Special case for 16-byte FP loads and stores */
+        if (nb == 16)
+                return emulate_fp_pair(regs, addr, reg, flags);
+
         /* If we are loading, get the data from user space, else
          * get it from register values
          */
@@ -531,7 +821,8 @@ int fix_alignment(struct pt_regs *regs)
          * or floating point single precision conversion
          */
         switch (flags & ~(U|SW)) {
-        case LD+SE:     /* sign extend */
+        case LD+SE:     /* sign extending integer loads */
+        case LD+F+SE:   /* sign extend for lfiwax */
                 if ( nb == 2 )
                         data.ll = data.x16.low16;
                 else    /* nb must be 4 */
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 2cb1d9487796..0ae5d57b9368 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -312,5 +312,17 @@ int main(void)
 #ifdef CONFIG_BUG
         DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
 #endif
+
+#ifdef CONFIG_PPC_ISERIES
+        /* the assembler miscalculates the VSID values */
+        DEFINE(PAGE_OFFSET_ESID, GET_ESID(PAGE_OFFSET));
+        DEFINE(PAGE_OFFSET_VSID, KERNEL_VSID(PAGE_OFFSET));
+        DEFINE(VMALLOC_START_ESID, GET_ESID(VMALLOC_START));
+        DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START));
+#endif
+
+#ifdef CONFIG_PPC64
+        DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
+#endif
         return 0;
 }
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index e7b684689e04..3ef51fb6f107 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -11,7 +11,6 @@
 #include <asm/sections.h>
 #include <asm/prom.h>
 #include <asm/btext.h>
-#include <asm/prom.h>
 #include <asm/page.h>
 #include <asm/mmu.h>
 #include <asm/pgtable.h>
diff --git a/arch/powerpc/kernel/clock.c b/arch/powerpc/kernel/clock.c
new file mode 100644
index 000000000000..ce668f545758
--- /dev/null
+++ b/arch/powerpc/kernel/clock.c
@@ -0,0 +1,82 @@
+/*
+ * Dummy clk implementations for powerpc.
+ * These need to be overridden in platform code.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <asm/clk_interface.h>
+
+struct clk_interface clk_functions;
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        if (clk_functions.clk_get)
+                return clk_functions.clk_get(dev, id);
+        return ERR_PTR(-ENOSYS);
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+        if (clk_functions.clk_put)
+                clk_functions.clk_put(clk);
+}
+EXPORT_SYMBOL(clk_put);
+
+int clk_enable(struct clk *clk)
+{
+        if (clk_functions.clk_enable)
+                return clk_functions.clk_enable(clk);
+        return -ENOSYS;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+        if (clk_functions.clk_disable)
+                clk_functions.clk_disable(clk);
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        if (clk_functions.clk_get_rate)
+                return clk_functions.clk_get_rate(clk);
+        return 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        if (clk_functions.clk_round_rate)
+                return clk_functions.clk_round_rate(clk, rate);
+        return -ENOSYS;
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        if (clk_functions.clk_set_rate)
+                return clk_functions.clk_set_rate(clk, rate);
+        return -ENOSYS;
+}
+EXPORT_SYMBOL(clk_set_rate);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+        if (clk_functions.clk_get_parent)
+                return clk_functions.clk_get_parent(clk);
+        return ERR_PTR(-ENOSYS);
+}
+EXPORT_SYMBOL(clk_get_parent);
+
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        if (clk_functions.clk_set_parent)
+                return clk_functions.clk_set_parent(clk, parent);
+        return -ENOSYS;
+}
+EXPORT_SYMBOL(clk_set_parent);
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b1f8000952f3..8eb8087383eb 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -68,15 +68,6 @@ extern void __restore_cpu_ppc970(void);
 #define COMMON_USER_BOOKE       (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
                                  PPC_FEATURE_BOOKE)
 
-/* We only set the spe features if the kernel was compiled with
- * spe support
- */
-#ifdef CONFIG_SPE
-#define PPC_FEATURE_SPE_COMP    PPC_FEATURE_HAS_SPE
-#else
-#define PPC_FEATURE_SPE_COMP    0
-#endif
-
 static struct cpu_spec cpu_specs[] = {
 #ifdef CONFIG_PPC64
         {       /* Power3 */
@@ -1132,6 +1123,24 @@ static struct cpu_spec cpu_specs[] = {
                 .dcache_bsize           = 32,
                 .platform               = "ppc440",
         },
+        { /* 440EPX */
+                .pvr_mask               = 0xf0000ffb,
+                .pvr_value              = 0x200008D0,
+                .cpu_name               = "440EPX",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+        },
+        { /* 440GRX */
+                .pvr_mask               = 0xf0000ffb,
+                .pvr_value              = 0x200008D8,
+                .cpu_name               = "440GRX",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+        },
         {       /* 440GP Rev. B */
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x40000440,
@@ -1243,8 +1252,8 @@ static struct cpu_spec cpu_specs[] = {
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
                 .cpu_features           = CPU_FTRS_E200,
                 .cpu_user_features      = COMMON_USER_BOOKE |
-                        PPC_FEATURE_SPE_COMP |
-                        PPC_FEATURE_HAS_EFP_SINGLE |
+                        PPC_FEATURE_HAS_SPE_COMP |
+                        PPC_FEATURE_HAS_EFP_SINGLE_COMP |
                         PPC_FEATURE_UNIFIED_CACHE,
                 .dcache_bsize           = 32,
                 .platform               = "ppc5554",
@@ -1256,8 +1265,8 @@ static struct cpu_spec cpu_specs[] = {
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
                 .cpu_features           = CPU_FTRS_E500,
                 .cpu_user_features      = COMMON_USER_BOOKE |
-                        PPC_FEATURE_SPE_COMP |
-                        PPC_FEATURE_HAS_EFP_SINGLE,
+                        PPC_FEATURE_HAS_SPE_COMP |
+                        PPC_FEATURE_HAS_EFP_SINGLE_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -1272,9 +1281,9 @@ static struct cpu_spec cpu_specs[] = {
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
                 .cpu_features           = CPU_FTRS_E500_2,
                 .cpu_user_features      = COMMON_USER_BOOKE |
-                        PPC_FEATURE_SPE_COMP |
-                        PPC_FEATURE_HAS_EFP_SINGLE |
-                        PPC_FEATURE_HAS_EFP_DOUBLE,
+                        PPC_FEATURE_HAS_SPE_COMP |
+                        PPC_FEATURE_HAS_EFP_SINGLE_COMP |
+                        PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 37658ea417fa..77c749a13378 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -24,7 +24,6 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/types.h>
-#include <linux/irq.h>
 
 #include <asm/processor.h>
 #include <asm/machdep.h>
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 2f6f5a7bc69e..29ff77c468ac 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -25,7 +25,7 @@
 #define DBG(fmt...)
 #endif
 
-void reserve_kdump_trampoline(void)
+void __init reserve_kdump_trampoline(void)
 {
         lmb_reserve(0, KDUMP_RESERVE_LIMIT);
 }
@@ -54,8 +54,10 @@ void __init setup_kdump_trampoline(void)
                 create_trampoline(i);
         }
 
+#ifdef CONFIG_PPC_PSERIES
         create_trampoline(__pa(system_reset_fwnmi) - PHYSICAL_START);
         create_trampoline(__pa(machine_check_fwnmi) - PHYSICAL_START);
+#endif /* CONFIG_PPC_PSERIES */
 
         DBG(" <- setup_kdump_trampoline()\n");
 }
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 4074c0b31453..21d889e63e87 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -504,9 +504,11 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_SPE
+BEGIN_FTR_SECTION
         oris    r0,r0,MSR_SPE@h  /* Disable SPE */
         mfspr   r12,SPRN_SPEFSCR /* save spefscr register value */
         stw     r12,THREAD+THREAD_SPEFSCR(r2)
+END_FTR_SECTION_IFSET(CPU_FTR_SPE)
 #endif /* CONFIG_SPE */
         and.    r0,r0,r11       /* FP or altivec or SPE enabled? */
         beq+    1f
@@ -542,8 +544,10 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_SPE
+BEGIN_FTR_SECTION
         lwz     r0,THREAD+THREAD_SPEFSCR(r2)
         mtspr   SPRN_SPEFSCR,r0         /* restore SPEFSCR reg */
+END_FTR_SECTION_IFSET(CPU_FTR_SPE)
 #endif /* CONFIG_SPE */
 
         lwz     r0,_CCR(r1)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 952eba6701f4..fbbd3f6f0064 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -385,15 +385,15 @@ BEGIN_FTR_SECTION
         oris    r0,r6,(SLB_ESID_V)@h
         ori     r0,r0,(SLB_NUM_BOLTED-1)@l
 
-        /* Update the last bolted SLB */
+        /* Update the last bolted SLB.  No write barriers are needed
+         * here, provided we only update the current CPU's SLB shadow
+         * buffer.
+         */
         ld      r9,PACA_SLBSHADOWPTR(r13)
         li      r12,0
         std     r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
-        eieio
         std     r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
-        eieio
         std     r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
-        eieio
 
         slbie   r6
         slbie   r6              /* Workaround POWER5 < DD2.1 issue */
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7d73a13450b0..c86c626cf156 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -48,20 +48,17 @@
         mtspr   SPRN_DBAT##n##L,RB;     \
 1:
 
-        .text
+        .section        .text.head, "ax"
         .stabs  "arch/powerpc/kernel/",N_SO,0,0,0f
         .stabs  "head_32.S",N_SO,0,0,0f
 0:
-        .globl  _stext
-_stext:
+_ENTRY(_stext);
 
 /*
  * _start is defined this way because the XCOFF loader in the OpenFirmware
  * on the powermac expects the entry point to be a procedure descriptor.
  */
-        .text
-        .globl  _start
-_start:
+_ENTRY(_start);
         /*
          * These are here for legacy reasons, the kernel used to
          * need to look like a coff function entry for the pmac
@@ -475,10 +472,10 @@ InstructionTLBMiss:
         li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         blt+    112f
+        mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwimi  r1,r2,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
         lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
         addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
-        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
-        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
 112:    tophys(r2,r2)
         rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
         lwz     r2,0(r2)                /* get pmd entry */
@@ -549,10 +546,10 @@ DataLoadTLBMiss:
         li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         blt+    112f
+        mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwimi  r1,r2,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
         lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
         addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
-        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
-        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
 112:    tophys(r2,r2)
         rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
         lwz     r2,0(r2)                /* get pmd entry */
@@ -621,10 +618,10 @@ DataStoreTLBMiss:
         li      r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
         lwz     r2,PGDIR(r2)
         blt+    112f
+        mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwimi  r1,r2,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
         lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
         addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
-        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
-        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
 112:    tophys(r2,r2)
         rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
         lwz     r2,0(r2)                /* get pmd entry */
@@ -841,7 +838,7 @@ relocate_kernel:
  * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
  * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
  */
-_GLOBAL(copy_and_flush)
+_ENTRY(copy_and_flush)
         addi    r5,r5,-4
         addi    r6,r6,-4
 4:      li      r0,L1_CACHE_BYTES/4
@@ -954,9 +951,9 @@ __secondary_start:
  * included in CONFIG_6xx
  */
 #if !defined(CONFIG_6xx)
-_GLOBAL(__save_cpu_setup)
+_ENTRY(__save_cpu_setup)
         blr
-_GLOBAL(__restore_cpu_setup)
+_ENTRY(__restore_cpu_setup)
         blr
 #endif /* !defined(CONFIG_6xx) */
 
@@ -1080,7 +1077,7 @@ start_here:
 /*
  * Set up the segment registers for a new context.
  */
-_GLOBAL(set_context)
+_ENTRY(set_context)
         mulli   r3,r3,897       /* multiply context by skew factor */
         rlwinm  r3,r3,4,8,27    /* VSID = (context & 0xfffff) << 4 */
         addis   r3,r3,0x6000    /* Set Ks, Ku bits */
@@ -1300,14 +1297,6 @@ empty_zero_page:
 swapper_pg_dir:
         .space  4096
 
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * Used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-        .globl  cmd_line
-cmd_line:
-        .space  512
-
         .globl intercept_table
 intercept_table:
         .long 0, 0, i0x200, i0x300, i0x400, 0, i0x600, i0x700
diff --git a/arch/powerpc/kernel/head_4xx.S b/arch/powerpc/kernel/head_40x.S
index adc7f8097cd4..e312824bdd98 100644
--- a/arch/powerpc/kernel/head_4xx.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -35,7 +35,6 @@
 #include <asm/page.h>
 #include <asm/mmu.h>
 #include <asm/pgtable.h>
-#include <asm/ibm4xx.h>
 #include <asm/cputable.h>
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
@@ -53,9 +52,9 @@
  *
  * This is all going to change RSN when we add bi_recs.......  -- Dan
  */
-        .text
-_GLOBAL(_stext)
-_GLOBAL(_start)
+        .section        .text.head, "ax"
+_ENTRY(_stext);
+_ENTRY(_start);
 
         /* Save parameters we are passed.
         */
@@ -90,9 +89,9 @@ turn_on_mmu:
  */
         . = 0xc0
 crit_save:
-_GLOBAL(crit_r10)
+_ENTRY(crit_r10)
         .space  4
-_GLOBAL(crit_r11)
+_ENTRY(crit_r11)
         .space  4
 
 /*
@@ -772,7 +771,7 @@ finish_tlb_load:
         */
         lwz     r9, tlb_4xx_index@l(0)
         addi    r9, r9, 1
-        andi.   r9, r9, (PPC4XX_TLB_SIZE-1)
+        andi.   r9, r9, (PPC40X_TLB_SIZE-1)
         stw     r9, tlb_4xx_index@l(0)
 
 6:
@@ -815,7 +814,7 @@ finish_tlb_load:
  * The PowerPC 4xx family of processors do not have an FPU, so this just
  * returns.
  */
-_GLOBAL(giveup_fpu)
+_ENTRY(giveup_fpu)
         blr
 
 /* This is where the main kernel code starts.
@@ -1007,13 +1006,6 @@ critical_stack_top:
         .globl  exception_stack_top
 exception_stack_top:
 
-/* This space gets a copy of optional info passed to us by the bootstrap
- * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-        .globl  cmd_line
-cmd_line:
-        .space  512
-
 /* Room for two PTE pointers, usually the kernel and current user pointers
  * to their respective root page table.
  */
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 88695963f587..c6a510bdefd4 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -50,9 +50,9 @@
  *   r7 - End of kernel command line string
  *
  */
-        .text
-_GLOBAL(_stext)
-_GLOBAL(_start)
+        .section        .text.head, "ax"
+_ENTRY(_stext);
+_ENTRY(_start);
         /*
          * Reserve a word at a fixed location to store the address
          * of abatron_pteptrs
@@ -217,7 +217,7 @@ skpinv:	addi	r4,r4,1				/* Increment */
         lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
         mtspr   SPRN_IVPR,r4
 
-#ifdef CONFIG_440EP
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
         /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
         mfspr   r2,SPRN_CCR0
         lis     r3,0xffef
@@ -744,14 +744,6 @@ exception_stack_bottom:
 exception_stack_top:
 
 /*
- * This space gets a copy of optional info passed to us by the bootstrap
- * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-        .globl  cmd_line
-cmd_line:
-        .space  512
-
-/*
  * Room for two PTE pointers, usually the kernel and current user pointers
  * to their respective root page table.
  */
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 171800002ede..22ac245bd59a 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -34,6 +34,8 @@
 #include <asm/iseries/lpar_map.h>
 #include <asm/thread_info.h>
 #include <asm/firmware.h>
+#include <asm/page_64.h>
+#include <asm/exception.h>
 
 #define DO_SOFT_DISABLE
 
@@ -144,344 +146,9 @@ exception_marker:
         .text
 
 /*
- * The following macros define the code that appears as
- * the prologue to each of the exception handlers.  They
- * are split into two parts to allow a single kernel binary
- * to be used for pSeries and iSeries.
- * LOL.  One day... - paulus
- */
-
-/*
- * We make as much of the exception code common between native
- * exception handlers (including pSeries LPAR) and iSeries LPAR
- * implementations as possible.
- */
-
-/*
  * This is the start of the interrupt handlers for pSeries
  * This code runs with relocation off.
  */
-#define EX_R9           0
-#define EX_R10          8
-#define EX_R11          16
-#define EX_R12          24
-#define EX_R13          32
-#define EX_SRR0         40
-#define EX_DAR          48
-#define EX_DSISR        56
-#define EX_CCR          60
-#define EX_R3           64
-#define EX_LR           72
-
-/*
- * We're short on space and time in the exception prolog, so we can't
- * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
- * low halfword of the address, but for Kdump we need the whole low
- * word.
- */
-#ifdef CONFIG_CRASH_DUMP
-#define LOAD_HANDLER(reg, label)                                        \
-        oris    reg,reg,(label)@h;      /* virt addr of handler ... */  \
-        ori     reg,reg,(label)@l;      /* .. and the rest */
-#else
-#define LOAD_HANDLER(reg, label)                                        \
-        ori     reg,reg,(label)@l;      /* virt addr of handler ... */
-#endif
-
-/*
- * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode.
- * The firmware calls the registered system_reset_fwnmi and
- * machine_check_fwnmi handlers in 32bit mode if the cpu happens to run
- * a 32bit application at the time of the event.
- * This firmware bug is present on POWER4 and JS20.
- */
-#define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label)               \
-        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
-        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
-        std     r10,area+EX_R10(r13);                                   \
-        std     r11,area+EX_R11(r13);                                   \
-        std     r12,area+EX_R12(r13);                                   \
-        mfspr   r9,SPRN_SPRG1;                                          \
-        std     r9,area+EX_R13(r13);                                    \
-        mfcr    r9;                                                     \
-        clrrdi  r12,r13,32;             /* get high part of &label */   \
-        mfmsr   r10;                                                    \
-        /* force 64bit mode */                                          \
-        li      r11,5;                  /* MSR_SF_LG|MSR_ISF_LG */      \
-        rldimi  r10,r11,61,0;           /* insert into top 3 bits */    \
-        /* done 64bit mode */                                           \
-        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
-        LOAD_HANDLER(r12,label)                                         \
-        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
-        mtspr   SPRN_SRR0,r12;                                          \
-        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
-        mtspr   SPRN_SRR1,r10;                                          \
-        rfid;                                                           \
-        b       .       /* prevent speculative execution */
-
-#define EXCEPTION_PROLOG_PSERIES(area, label)                           \
-        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
-        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
-        std     r10,area+EX_R10(r13);                                   \
-        std     r11,area+EX_R11(r13);                                   \
-        std     r12,area+EX_R12(r13);                                   \
-        mfspr   r9,SPRN_SPRG1;                                          \
-        std     r9,area+EX_R13(r13);                                    \
-        mfcr    r9;                                                     \
-        clrrdi  r12,r13,32;             /* get high part of &label */   \
-        mfmsr   r10;                                                    \
-        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
-        LOAD_HANDLER(r12,label)                                         \
-        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
-        mtspr   SPRN_SRR0,r12;                                          \
-        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
-        mtspr   SPRN_SRR1,r10;                                          \
-        rfid;                                                           \
-        b       .       /* prevent speculative execution */
-
-/*
- * This is the start of the interrupt handlers for iSeries
- * This code runs with relocation on.
- */
-#define EXCEPTION_PROLOG_ISERIES_1(area)                                \
-        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
-        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
-        std     r10,area+EX_R10(r13);                                   \
-        std     r11,area+EX_R11(r13);                                   \
-        std     r12,area+EX_R12(r13);                                   \
-        mfspr   r9,SPRN_SPRG1;                                          \
-        std     r9,area+EX_R13(r13);                                    \
-        mfcr    r9
-
-#define EXCEPTION_PROLOG_ISERIES_2                                      \
-        mfmsr   r10;                                                    \
-        ld      r12,PACALPPACAPTR(r13);                                 \
-        ld      r11,LPPACASRR0(r12);                                    \
-        ld      r12,LPPACASRR1(r12);                                    \
-        ori     r10,r10,MSR_RI;                                         \
-        mtmsrd  r10,1
-
-/*
- * The common exception prolog is used for all except a few exceptions
- * such as a segment miss on a kernel address.  We have to be prepared
- * to take another exception from the point where we first touch the
- * kernel stack onwards.
- *
- * On entry r13 points to the paca, r9-r13 are saved in the paca,
- * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
- * SRR1, and relocation is on.
- */
-#define EXCEPTION_PROLOG_COMMON(n, area)                                   \
-        andi.   r10,r12,MSR_PR;         /* See if coming from user      */ \
-        mr      r10,r1;                 /* Save r1                      */ \
-        subi    r1,r1,INT_FRAME_SIZE;   /* alloc frame on kernel stack  */ \
-        beq-    1f;                                                        \
-        ld      r1,PACAKSAVE(r13);      /* kernel stack to use          */ \
-1:      cmpdi   cr1,r1,0;               /* check if r1 is in userspace  */ \
-        bge-    cr1,2f;                 /* abort if it is               */ \
-        b       3f;                                                        \
-2:      li      r1,(n);                 /* will be reloaded later       */ \
-        sth     r1,PACA_TRAP_SAVE(r13);                                    \
-        b       bad_stack;                                                 \
-3:      std     r9,_CCR(r1);            /* save CR in stackframe        */ \
-        std     r11,_NIP(r1);           /* save SRR0 in stackframe      */ \
-        std     r12,_MSR(r1);           /* save SRR1 in stackframe      */ \
-        std     r10,0(r1);              /* make stack chain pointer     */ \
-        std     r0,GPR0(r1);            /* save r0 in stackframe        */ \
-        std     r10,GPR1(r1);           /* save r1 in stackframe        */ \
-        ACCOUNT_CPU_USER_ENTRY(r9, r10);                                   \
-        std     r2,GPR2(r1);            /* save r2 in stackframe        */ \
-        SAVE_4GPRS(3, r1);              /* save r3 - r6 in stackframe   */ \
-        SAVE_2GPRS(7, r1);              /* save r7, r8 in stackframe    */ \
-        ld      r9,area+EX_R9(r13);     /* move r9, r10 to stackframe   */ \
-        ld      r10,area+EX_R10(r13);                                      \
-        std     r9,GPR9(r1);                                               \
-        std     r10,GPR10(r1);                                             \
-        ld      r9,area+EX_R11(r13);    /* move r11 - r13 to stackframe */ \
-        ld      r10,area+EX_R12(r13);                                      \
-        ld      r11,area+EX_R13(r13);                                      \
-        std     r9,GPR11(r1);                                              \
-        std     r10,GPR12(r1);                                             \
-        std     r11,GPR13(r1);                                             \
-        ld      r2,PACATOC(r13);        /* get kernel TOC into r2       */ \
-        mflr    r9;                     /* save LR in stackframe        */ \
-        std     r9,_LINK(r1);                                              \
-        mfctr   r10;                    /* save CTR in stackframe       */ \
-        std     r10,_CTR(r1);                                              \
-        lbz     r10,PACASOFTIRQEN(r13);                            \
-        mfspr   r11,SPRN_XER;           /* save XER in stackframe       */ \
-        std     r10,SOFTE(r1);                                             \
-        std     r11,_XER(r1);                                              \
-        li      r9,(n)+1;                                                  \
-        std     r9,_TRAP(r1);           /* set trap number              */ \
-        li      r10,0;                                                     \
-        ld      r11,exception_marker@toc(r2);                              \
-        std     r10,RESULT(r1);         /* clear regs->result           */ \
-        std     r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame      */
-
-/*
- * Exception vectors.
- */
-#define STD_EXCEPTION_PSERIES(n, label)                 \
-        . = n;                                          \
-        .globl label##_pSeries;                         \
-label##_pSeries:                                        \
-        HMT_MEDIUM;                                     \
-        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
-
-#define HSTD_EXCEPTION_PSERIES(n, label)                \
-        . = n;                                          \
-        .globl label##_pSeries;                         \
-label##_pSeries:                                        \
-        HMT_MEDIUM;                                     \
-        mtspr   SPRN_SPRG1,r20;         /* save r20 */  \
-        mfspr   r20,SPRN_HSRR0;         /* copy HSRR0 to SRR0 */ \
-        mtspr   SPRN_SRR0,r20;                          \
-        mfspr   r20,SPRN_HSRR1;         /* copy HSRR0 to SRR0 */ \
-        mtspr   SPRN_SRR1,r20;                          \
-        mfspr   r20,SPRN_SPRG1;         /* restore r20 */ \
-        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
-
-
-#define MASKABLE_EXCEPTION_PSERIES(n, label)                            \
-        . = n;                                                          \
-        .globl label##_pSeries;                                         \
-label##_pSeries:                                                        \
-        HMT_MEDIUM;                                                     \
-        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
-        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
-        std     r9,PACA_EXGEN+EX_R9(r13);       /* save r9, r10 */      \
-        std     r10,PACA_EXGEN+EX_R10(r13);                             \
-        lbz     r10,PACASOFTIRQEN(r13);                                 \
-        mfcr    r9;                                                     \
-        cmpwi   r10,0;                                                  \
-        beq     masked_interrupt;                                       \
-        mfspr   r10,SPRN_SPRG1;                                         \
-        std     r10,PACA_EXGEN+EX_R13(r13);                             \
-        std     r11,PACA_EXGEN+EX_R11(r13);                             \
-        std     r12,PACA_EXGEN+EX_R12(r13);                             \
-        clrrdi  r12,r13,32;             /* get high part of &label */   \
-        mfmsr   r10;                                                    \
-        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
-        LOAD_HANDLER(r12,label##_common)                                \
-        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
-        mtspr   SPRN_SRR0,r12;                                          \
-        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
-        mtspr   SPRN_SRR1,r10;                                          \
-        rfid;                                                           \
-        b       .       /* prevent speculative execution */
-
-#define STD_EXCEPTION_ISERIES(n, label, area)           \
-        .globl label##_iSeries;                         \
-label##_iSeries:                                        \
-        HMT_MEDIUM;                                     \
-        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
-        EXCEPTION_PROLOG_ISERIES_1(area);               \
-        EXCEPTION_PROLOG_ISERIES_2;                     \
-        b       label##_common
-
-#define MASKABLE_EXCEPTION_ISERIES(n, label)                            \
-        .globl label##_iSeries;                                         \
-label##_iSeries:                                                        \
-        HMT_MEDIUM;                                                     \
-        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
-        EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN);                         \
-        lbz     r10,PACASOFTIRQEN(r13);                                 \
-        cmpwi   0,r10,0;                                                \
-        beq-    label##_iSeries_masked;                                 \
-        EXCEPTION_PROLOG_ISERIES_2;                                     \
-        b       label##_common;                                         \
-
-#ifdef CONFIG_PPC_ISERIES
-#define DISABLE_INTS                            \
-        li      r11,0;                          \
-        stb     r11,PACASOFTIRQEN(r13);         \
-BEGIN_FW_FTR_SECTION;                           \
-        stb     r11,PACAHARDIRQEN(r13);         \
-END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES);   \
-BEGIN_FW_FTR_SECTION;                           \
-        mfmsr   r10;                            \
-        ori     r10,r10,MSR_EE;                 \
-        mtmsrd  r10,1;                          \
-END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
-
-#else
-#define DISABLE_INTS                            \
-        li      r11,0;                          \
-        stb     r11,PACASOFTIRQEN(r13);         \
-        stb     r11,PACAHARDIRQEN(r13)
-
-#endif /* CONFIG_PPC_ISERIES */
-
-#define ENABLE_INTS                             \
-        ld      r12,_MSR(r1);                   \
-        mfmsr   r11;                            \
-        rlwimi  r11,r12,0,MSR_EE;               \
-        mtmsrd  r11,1
-
-#define STD_EXCEPTION_COMMON(trap, label, hdlr)         \
-        .align  7;                                      \
-        .globl label##_common;                          \
-label##_common:                                         \
-        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
-        DISABLE_INTS;                                   \
-        bl      .save_nvgprs;                           \
-        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
-        bl      hdlr;                                   \
-        b       .ret_from_except
-
-/*
- * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
- * in the idle task and therefore need the special idle handling.
- */
-#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr)    \
-        .align  7;                                      \
-        .globl label##_common;                          \
-label##_common:                                         \
-        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
-        FINISH_NAP;                                     \
-        DISABLE_INTS;                                   \
-        bl      .save_nvgprs;                           \
-        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
-        bl      hdlr;                                   \
-        b       .ret_from_except
-
-#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr)    \
-        .align  7;                                      \
-        .globl label##_common;                          \
-label##_common:                                         \
-        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
-        FINISH_NAP;                                     \
-        DISABLE_INTS;                                   \
-        bl      .ppc64_runlatch_on;                     \
-        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
-        bl      hdlr;                                   \
-        b       .ret_from_except_lite
-
-/*
- * When the idle code in power4_idle puts the CPU into NAP mode,
- * it has to do so in a loop, and relies on the external interrupt
- * and decrementer interrupt entry code to get it out of the loop.
- * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
- * to signal that it is in the loop and needs help to get out.
- */
-#ifdef CONFIG_PPC_970_NAP
-#define FINISH_NAP                              \
-BEGIN_FTR_SECTION                               \
-        clrrdi  r11,r1,THREAD_SHIFT;            \
-        ld      r9,TI_LOCAL_FLAGS(r11);         \
-        andi.   r10,r9,_TLF_NAPPING;            \
-        bnel    power4_fixup_nap;               \
-END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
-#else
-#define FINISH_NAP
-#endif
-
-/*
- * Start of pSeries system interrupt routines
- */
         . = 0x100
         .globl __start_interrupts
 __start_interrupts:
@@ -674,6 +341,7 @@ slb_miss_user_pseries:
         b       .                               /* prevent spec. execution */
 #endif /* __DISABLED__ */
 
+#ifdef CONFIG_PPC_PSERIES
 /*
  * Vectors for the FWNMI option.  Share common code.
  */
@@ -691,191 +359,7 @@ machine_check_fwnmi:
         mtspr   SPRN_SPRG1,r13          /* save r13 */
         EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXMC, machine_check_common)
 
-#ifdef CONFIG_PPC_ISERIES
-/***  ISeries-LPAR interrupt handlers ***/
-
-        STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
-
-        .globl data_access_iSeries
-data_access_iSeries:
-        mtspr   SPRN_SPRG1,r13
-BEGIN_FTR_SECTION
-        mtspr   SPRN_SPRG2,r12
-        mfspr   r13,SPRN_DAR
-        mfspr   r12,SPRN_DSISR
-        srdi    r13,r13,60
-        rlwimi  r13,r12,16,0x20
-        mfcr    r12
-        cmpwi   r13,0x2c
-        beq     .do_stab_bolted_iSeries
-        mtcrf   0x80,r12
-        mfspr   r12,SPRN_SPRG2
-END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
-        EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
-        EXCEPTION_PROLOG_ISERIES_2
-        b       data_access_common
-
-.do_stab_bolted_iSeries:
-        mtcrf   0x80,r12
-        mfspr   r12,SPRN_SPRG2
-        EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
-        EXCEPTION_PROLOG_ISERIES_2
-        b       .do_stab_bolted
-
-        .globl  data_access_slb_iSeries
-data_access_slb_iSeries:
-        mtspr   SPRN_SPRG1,r13          /* save r13 */
-        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
-        std     r3,PACA_EXSLB+EX_R3(r13)
-        mfspr   r3,SPRN_DAR
-        std     r9,PACA_EXSLB+EX_R9(r13)
-        mfcr    r9
-#ifdef __DISABLED__
-        cmpdi   r3,0
-        bge     slb_miss_user_iseries
-#endif
-        std     r10,PACA_EXSLB+EX_R10(r13)
-        std     r11,PACA_EXSLB+EX_R11(r13)
-        std     r12,PACA_EXSLB+EX_R12(r13)
-        mfspr   r10,SPRN_SPRG1
-        std     r10,PACA_EXSLB+EX_R13(r13)
-        ld      r12,PACALPPACAPTR(r13)
-        ld      r12,LPPACASRR1(r12)
-        b       .slb_miss_realmode
-
-        STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
-
-        .globl  instruction_access_slb_iSeries
-instruction_access_slb_iSeries:
-        mtspr   SPRN_SPRG1,r13          /* save r13 */
-        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
-        std     r3,PACA_EXSLB+EX_R3(r13)
-        ld      r3,PACALPPACAPTR(r13)
-        ld      r3,LPPACASRR0(r3)       /* get SRR0 value */
-        std     r9,PACA_EXSLB+EX_R9(r13)
-        mfcr    r9
-#ifdef __DISABLED__
-        cmpdi   r3,0
-        bge     .slb_miss_user_iseries
-#endif
-        std     r10,PACA_EXSLB+EX_R10(r13)
-        std     r11,PACA_EXSLB+EX_R11(r13)
-        std     r12,PACA_EXSLB+EX_R12(r13)
-        mfspr   r10,SPRN_SPRG1
-        std     r10,PACA_EXSLB+EX_R13(r13)
-        ld      r12,PACALPPACAPTR(r13)
-        ld      r12,LPPACASRR1(r12)
-        b       .slb_miss_realmode
-
-#ifdef __DISABLED__
-slb_miss_user_iseries:
-        std     r10,PACA_EXGEN+EX_R10(r13)
-        std     r11,PACA_EXGEN+EX_R11(r13)
-        std     r12,PACA_EXGEN+EX_R12(r13)
-        mfspr   r10,SPRG1
-        ld      r11,PACA_EXSLB+EX_R9(r13)
-        ld      r12,PACA_EXSLB+EX_R3(r13)
-        std     r10,PACA_EXGEN+EX_R13(r13)
-        std     r11,PACA_EXGEN+EX_R9(r13)
-        std     r12,PACA_EXGEN+EX_R3(r13)
-        EXCEPTION_PROLOG_ISERIES_2
-        b       slb_miss_user_common
-#endif
-
-        MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
-        STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
-        STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
-        STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
-        MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
-        STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
-        STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
-
-        .globl  system_call_iSeries
-system_call_iSeries:
-        mr      r9,r13
-        mfspr   r13,SPRN_SPRG3
-        EXCEPTION_PROLOG_ISERIES_2
-        b       system_call_common
-
-        STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
-        STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
-        STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
-
-        .globl system_reset_iSeries
-system_reset_iSeries:
-        mfspr   r13,SPRN_SPRG3          /* Get paca address */
-        mfmsr   r24
-        ori     r24,r24,MSR_RI
-        mtmsrd  r24                     /* RI on */
-        lhz     r24,PACAPACAINDEX(r13)  /* Get processor # */
-        cmpwi   0,r24,0                 /* Are we processor 0? */
-        bne     1f
-        b       .__start_initialization_iSeries /* Start up the first processor */
-1:      mfspr   r4,SPRN_CTRLF
-        li      r5,CTRL_RUNLATCH        /* Turn off the run light */
-        andc    r4,r4,r5
-        mtspr   SPRN_CTRLT,r4
-
-1:
-        HMT_LOW
-#ifdef CONFIG_SMP
-        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
-                                         * should start */
-        sync
-        LOAD_REG_IMMEDIATE(r3,current_set)
-        sldi    r28,r24,3               /* get current_set[cpu#] */
-        ldx     r3,r3,r28
-        addi    r1,r3,THREAD_SIZE
-        subi    r1,r1,STACK_FRAME_OVERHEAD
-
-        cmpwi   0,r23,0
-        beq     iSeries_secondary_smp_loop      /* Loop until told to go */
-        bne     __secondary_start               /* Loop until told to go */
-iSeries_secondary_smp_loop:
-        /* Let the Hypervisor know we are alive */
-        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
-        lis     r3,0x8002
-        rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
-#else /* CONFIG_SMP */
-        /* Yield the processor.  This is required for non-SMP kernels
-                which are running on multi-threaded machines. */
-        lis     r3,0x8000
-        rldicr  r3,r3,32,15             /* r3 = (r3 << 32) & 0xffff000000000000 */
-        addi    r3,r3,18                /* r3 = 0x8000000000000012 which is "yield" */
-        li      r4,0                    /* "yield timed" */
-        li      r5,-1                   /* "yield forever" */
-#endif /* CONFIG_SMP */
-        li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
-        sc                              /* Invoke the hypervisor via a system call */
-        mfspr   r13,SPRN_SPRG3          /* Put r13 back ???? */
-        b       1b                      /* If SMP not configured, secondaries
-                                         * loop forever */
-
-decrementer_iSeries_masked:
-        /* We may not have a valid TOC pointer in here. */
-        li      r11,1
-        ld      r12,PACALPPACAPTR(r13)
-        stb     r11,LPPACADECRINT(r12)
-        LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
-        lwz     r12,0(r12)
-        mtspr   SPRN_DEC,r12
-        /* fall through */
-
-hardware_interrupt_iSeries_masked:
-        mtcrf   0x80,r9         /* Restore regs */
-        ld      r12,PACALPPACAPTR(r13)
-        ld      r11,LPPACASRR0(r12)
-        ld      r12,LPPACASRR1(r12)
-        mtspr   SPRN_SRR0,r11
-        mtspr   SPRN_SRR1,r12
-        ld      r9,PACA_EXGEN+EX_R9(r13)
-        ld      r10,PACA_EXGEN+EX_R10(r13)
-        ld      r11,PACA_EXGEN+EX_R11(r13)
-        ld      r12,PACA_EXGEN+EX_R12(r13)
-        ld      r13,PACA_EXGEN+EX_R13(r13)
-        rfid
-        b       .       /* prevent speculative execution */
-#endif /* CONFIG_PPC_ISERIES */
+#endif /* CONFIG_PPC_PSERIES */
 
 /*** Common interrupt handlers ***/
 
@@ -1175,7 +659,9 @@ hardware_interrupt_common:
         FINISH_NAP
 hardware_interrupt_entry:
         DISABLE_INTS
+BEGIN_FTR_SECTION
         bl      .ppc64_runlatch_on
+END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
         addi    r3,r1,STACK_FRAME_OVERHEAD
         bl      .do_IRQ
         b       .ret_from_except_lite
@@ -1519,8 +1005,8 @@ _GLOBAL(do_stab_bolted)
  * Space for CPU0's segment table.
  *
  * On iSeries, the hypervisor must fill in at least one entry before
- * we get control (with relocate on).  The address is give to the hv
- * as a page number (see xLparMap in lpardata.c), so this must be at a
+ * we get control (with relocate on).  The address is given to the hv
+ * as a page number (see xLparMap below), so this must be at a
  * fixed address (the linker can't compute (u64)&initial_stab >>
  * PAGE_SHIFT).
  */
@@ -1529,6 +1015,7 @@ _GLOBAL(do_stab_bolted)
 initial_stab:
         .space  4096
 
+#ifdef CONFIG_PPC_PSERIES
 /*
  * Data area reserved for FWNMI option.
  * This address (0x7000) is fixed by the RPA.
@@ -1536,21 +1023,34 @@ initial_stab:
         .= 0x7000
         .globl fwnmi_data_area
 fwnmi_data_area:
+#endif /* CONFIG_PPC_PSERIES */
 
         /* iSeries does not use the FWNMI stuff, so it is safe to put
          * this here, even if we later allow kernels that will boot on
          * both pSeries and iSeries */
 #ifdef CONFIG_PPC_ISERIES
         . = LPARMAP_PHYS
-#include "lparmap.s"
-/*
- * This ".text" is here for old compilers that generate a trailing
- * .note section when compiling .c files to .s
- */
-        .text
+        .globl xLparMap
+xLparMap:
+        .quad   HvEsidsToMap            /* xNumberEsids */
+        .quad   HvRangesToMap           /* xNumberRanges */
+        .quad   STAB0_PAGE              /* xSegmentTableOffs */
+        .zero   40                      /* xRsvd */
+        /* xEsids (HvEsidsToMap entries of 2 quads) */
+        .quad   PAGE_OFFSET_ESID        /* xKernelEsid */
+        .quad   PAGE_OFFSET_VSID        /* xKernelVsid */
+        .quad   VMALLOC_START_ESID      /* xKernelEsid */
+        .quad   VMALLOC_START_VSID      /* xKernelVsid */
+        /* xRanges (HvRangesToMap entries of 3 quads) */
+        .quad   HvPagesToMap            /* xPages */
+        .quad   0                       /* xOffset */
+        .quad   PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */
+
 #endif /* CONFIG_PPC_ISERIES */
 
+#ifdef CONFIG_PPC_PSERIES
         . = 0x8000
+#endif /* CONFIG_PPC_PSERIES */
 
 /*
  * On pSeries and most other platforms, secondary processors spin
@@ -1611,39 +1111,6 @@ _GLOBAL(generic_secondary_smp_init)
         b       __secondary_start
 #endif
 
-#ifdef CONFIG_PPC_ISERIES
-_INIT_STATIC(__start_initialization_iSeries)
-        /* Clear out the BSS */
-        LOAD_REG_IMMEDIATE(r11,__bss_stop)
-        LOAD_REG_IMMEDIATE(r8,__bss_start)
-        sub     r11,r11,r8              /* bss size                     */
-        addi    r11,r11,7               /* round up to an even double word */
-        rldicl. r11,r11,61,3            /* shift right by 3             */
-        beq     4f
-        addi    r8,r8,-8
-        li      r0,0
-        mtctr   r11                     /* zero this many doublewords   */
-3:      stdu    r0,8(r8)
-        bdnz    3b
-4:
-        LOAD_REG_IMMEDIATE(r1,init_thread_union)
-        addi    r1,r1,THREAD_SIZE
-        li      r0,0
-        stdu    r0,-STACK_FRAME_OVERHEAD(r1)
-
-        LOAD_REG_IMMEDIATE(r2,__toc_start)
-        addi    r2,r2,0x4000
-        addi    r2,r2,0x4000
-
-        bl      .iSeries_early_setup
-        bl      .early_setup
-
-        /* relocation is on at this point */
-
-        b       .start_here_common
-#endif /* CONFIG_PPC_ISERIES */
-
-
 _STATIC(__mmu_off)
         mfmsr   r3
         andi.   r0,r3,MSR_IR|MSR_DR
@@ -1891,6 +1358,7 @@ _GLOBAL(pmac_secondary_start)
  *   r13   = paca virtual address
  *   SPRG3 = paca virtual address
  */
+        .globl  __secondary_start
 __secondary_start:
         /* Set thread priority to MEDIUM */
         HMT_MEDIUM
@@ -2021,7 +1489,7 @@ _INIT_STATIC(start_here_multiplatform)
         b       .       /* prevent speculative execution */
         
         /* This is where all platforms converge execution */
-_INIT_STATIC(start_here_common)
+_INIT_GLOBAL(start_here_common)
         /* relocation is on at this point */
 
         /* The following code sets up the SP and TOC now that we are */
@@ -2078,12 +1546,4 @@ empty_zero_page:
 
         .globl  swapper_pg_dir
 swapper_pg_dir:
-        .space  PAGE_SIZE
-
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * Used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-        .globl  cmd_line
-cmd_line:
-        .space  COMMAND_LINE_SIZE
+        .space  PGD_TABLE_SIZE
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 901be47a02a9..96cea8e753c4 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -38,12 +38,9 @@
 #else
 #define DO_8xx_CPU6(val, reg)
 #endif
-        .text
-        .globl  _stext
-_stext:
-        .text
-        .globl  _start
-_start:
+        .section        .text.head, "ax"
+_ENTRY(_stext);
+_ENTRY(_start);
 
 /* MPC8xx
  * This port was done on an MBX board with an 860.  Right now I only
@@ -835,14 +832,6 @@ empty_zero_page:
 swapper_pg_dir:
         .space  4096
 
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * Used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-        .globl  cmd_line
-cmd_line:
-        .space  512
-
 /* Room for two PTE table poiners, usually the kernel and current user
  * pointer to their respective root page table (pgdir).
  */
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 1f155d399d57..bfc38703a8ac 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -52,9 +52,9 @@
  *   r7 - End of kernel command line string
  *
  */
-        .text
-_GLOBAL(_stext)
-_GLOBAL(_start)
+        .section        .text.head, "ax"
+_ENTRY(_stext);
+_ENTRY(_start);
         /*
          * Reserve a word at a fixed location to store the address
          * of abatron_pteptrs
@@ -1050,14 +1050,6 @@ exception_stack_bottom:
 exception_stack_top:
 
 /*
- * This space gets a copy of optional info passed to us by the bootstrap
- * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-        .globl  cmd_line
-cmd_line:
-        .space  512
-
-/*
  * Room for two PTE pointers, usually the kernel and current user pointers
  * to their respective root page table.
  */
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index d6a38cd5018e..53bf64623bd8 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -371,7 +371,8 @@ static int ibmebus_match_path(struct device *dev, void *data)
 
 static char *ibmebus_chomp(const char *in, size_t count)
 {
-        char *out = (char*)kmalloc(count + 1, GFP_KERNEL);
+        char *out = kmalloc(count + 1, GFP_KERNEL);
+
         if (!out)
                 return NULL;
 
@@ -396,10 +397,10 @@ static ssize_t ibmebus_store_probe(struct bus_type *bus,
                 return -ENOMEM;
 
         if (bus_find_device(&ibmebus_bus_type, NULL, path,
-                             ibmebus_match_path)) {
+                            ibmebus_match_path)) {
                 printk(KERN_WARNING "%s: %s has already been probed\n",
                        __FUNCTION__, path);
-                rc = -EINVAL;
+                rc = -EEXIST;
                 goto out;
         }
 
diff --git a/arch/powerpc/kernel/iomap.c b/arch/powerpc/kernel/iomap.c
index 2a5cf8680370..1577434f4088 100644
--- a/arch/powerpc/kernel/iomap.c
+++ b/arch/powerpc/kernel/iomap.c
@@ -119,8 +119,8 @@ EXPORT_SYMBOL(ioport_unmap);
 
 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
 {
-        unsigned long start = pci_resource_start(dev, bar);
-        unsigned long len = pci_resource_len(dev, bar);
+        resource_size_t start = pci_resource_start(dev, bar);
+        resource_size_t len = pci_resource_len(dev, bar);
         unsigned long flags = pci_resource_flags(dev, bar);
 
         if (!len)
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index c08ceca6277d..e4ec6eee81a8 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -30,7 +30,6 @@
 #include <linux/spinlock.h>
 #include <linux/string.h>
 #include <linux/dma-mapping.h>
-#include <linux/init.h>
 #include <linux/bitops.h>
 #include <asm/io.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 24bea97c736c..151b13119208 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -52,6 +52,7 @@
 #include <linux/mutex.h>
 #include <linux/bootmem.h>
 #include <linux/pci.h>
+#include <linux/debugfs.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -272,7 +273,7 @@ void do_IRQ(struct pt_regs *regs)
         struct thread_info *curtp, *irqtp;
 #endif
 
-        irq_enter();
+        irq_enter();
 
 #ifdef CONFIG_DEBUG_STACKOVERFLOW
         /* Debugging check for stack overflow: is there less than 2KB free? */
@@ -321,7 +322,7 @@ void do_IRQ(struct pt_regs *regs)
                 /* That's not SMP safe ... but who cares ? */
                 ppc_spurious_interrupts++;
 
-        irq_exit();
+        irq_exit();
         set_irq_regs(old_regs);
 
 #ifdef CONFIG_PPC_ISERIES
@@ -418,10 +419,16 @@ irq_hw_number_t virq_to_hw(unsigned int virq)
 }
 EXPORT_SYMBOL_GPL(virq_to_hw);
 
-__init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
-                                                unsigned int revmap_arg,
-                                                struct irq_host_ops *ops,
-                                                irq_hw_number_t inval_irq)
+static int default_irq_host_match(struct irq_host *h, struct device_node *np)
+{
+        return h->of_node != NULL && h->of_node == np;
+}
+
+struct irq_host *irq_alloc_host(struct device_node *of_node,
+                                unsigned int revmap_type,
+                                unsigned int revmap_arg,
+                                struct irq_host_ops *ops,
+                                irq_hw_number_t inval_irq)
 {
         struct irq_host *host;
         unsigned int size = sizeof(struct irq_host);
@@ -432,13 +439,7 @@ __init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
         /* Allocate structure and revmap table if using linear mapping */
         if (revmap_type == IRQ_HOST_MAP_LINEAR)
                 size += revmap_arg * sizeof(unsigned int);
-        if (mem_init_done)
-                host = kzalloc(size, GFP_KERNEL);
-        else {
-                host = alloc_bootmem(size);
-                if (host)
-                        memset(host, 0, size);
-        }
+        host = zalloc_maybe_bootmem(size, GFP_KERNEL);
         if (host == NULL)
                 return NULL;
 
@@ -446,6 +447,10 @@ __init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
         host->revmap_type = revmap_type;
         host->inval_irq = inval_irq;
         host->ops = ops;
+        host->of_node = of_node;
+
+        if (host->ops->match == NULL)
+                host->ops->match = default_irq_host_match;
 
         spin_lock_irqsave(&irq_big_lock, flags);
 
@@ -477,7 +482,7 @@ __init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
                 host->inval_irq = 0;
                 /* setup us as the host for all legacy interrupts */
                 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
-                        irq_map[i].hwirq = 0;
+                        irq_map[i].hwirq = i;
                         smp_wmb();
                         irq_map[i].host = host;
                         smp_wmb();
@@ -521,7 +526,7 @@ struct irq_host *irq_find_host(struct device_node *node)
          */
         spin_lock_irqsave(&irq_big_lock, flags);
         list_for_each_entry(h, &irq_hosts, link)
-                if (h->ops->match == NULL || h->ops->match(h, node)) {
+                if (h->ops->match(h, node)) {
                         found = h;
                         break;
                 }
@@ -996,6 +1001,68 @@ static int irq_late_init(void)
 }
 arch_initcall(irq_late_init);
 
+#ifdef CONFIG_VIRQ_DEBUG
+static int virq_debug_show(struct seq_file *m, void *private)
+{
+        unsigned long flags;
+        irq_desc_t *desc;
+        const char *p;
+        char none[] = "none";
+        int i;
+
+        seq_printf(m, "%-5s  %-7s  %-15s  %s\n", "virq", "hwirq",
+                      "chip name", "host name");
+
+        for (i = 1; i < NR_IRQS; i++) {
+                desc = get_irq_desc(i);
+                spin_lock_irqsave(&desc->lock, flags);
+
+                if (desc->action && desc->action->handler) {
+                        seq_printf(m, "%5d  ", i);
+                        seq_printf(m, "0x%05lx  ", virq_to_hw(i));
+
+                        if (desc->chip && desc->chip->typename)
+                                p = desc->chip->typename;
+                        else
+                                p = none;
+                        seq_printf(m, "%-15s  ", p);
+
+                        if (irq_map[i].host && irq_map[i].host->of_node)
+                                p = irq_map[i].host->of_node->full_name;
+                        else
+                                p = none;
+                        seq_printf(m, "%s\n", p);
+                }
+
+                spin_unlock_irqrestore(&desc->lock, flags);
+        }
+
+        return 0;
+}
+
+static int virq_debug_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, virq_debug_show, inode->i_private);
+}
+
+static const struct file_operations virq_debug_fops = {
+        .open = virq_debug_open,
+        .read = seq_read,
+        .llseek = seq_lseek,
+        .release = single_release,
+};
+
+static int __init irq_debugfs_init(void)
+{
+        if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
+                                 NULL, &virq_debug_fops))
+                return -ENOMEM;
+
+        return 0;
+}
+__initcall(irq_debugfs_init);
+#endif /* CONFIG_VIRQ_DEBUG */
+
 #endif /* CONFIG_PPC_MERGE */
 
 #ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 6444eaa30a2f..ff781b2eddec 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -77,7 +77,7 @@ static int iseries_lparcfg_data(struct seq_file *m, void *v)
         int processors, max_processors;
         unsigned long purr = get_purr();
 
-        shared = (int)(get_lppaca()->shared_proc);
+        shared = (int)(local_paca->lppaca_ptr->shared_proc);
 
         seq_printf(m, "system_active_processors=%d\n",
                    (int)HvLpConfig_getSystemPhysicalProcessors());
diff --git a/arch/powerpc/kernel/lparmap.c b/arch/powerpc/kernel/lparmap.c
deleted file mode 100644
index af11285ffbd1..000000000000
--- a/arch/powerpc/kernel/lparmap.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 2005  Stephen Rothwell  IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/mmu.h>
-#include <asm/pgtable.h>
-#include <asm/iseries/lpar_map.h>
-
-/* The # is to stop gcc trying to make .text nonexecutable */
-const struct LparMap __attribute__((__section__(".text #"))) xLparMap = {
-        .xNumberEsids = HvEsidsToMap,
-        .xNumberRanges = HvRangesToMap,
-        .xSegmentTableOffs = STAB0_PAGE,
-
-        .xEsids = {
-                { .xKernelEsid = GET_ESID(PAGE_OFFSET),
-                  .xKernelVsid = KERNEL_VSID(PAGE_OFFSET), },
-                { .xKernelEsid = GET_ESID(VMALLOC_START),
-                  .xKernelVsid = KERNEL_VSID(VMALLOC_START), },
-        },
-
-        .xRanges = {
-                { .xPages = HvPagesToMap,
-                  .xOffset = 0,
-                  .xVPN = KERNEL_VSID(PAGE_OFFSET) << (SID_SHIFT - HW_PAGE_SHIFT),
-                },
-        },
-};
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index f9676f52c6d8..0ed31f220482 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -34,21 +34,10 @@
 
 #undef DEBUG_NVRAM
 
-static int nvram_scan_partitions(void);
-static int nvram_setup_partition(void);
-static int nvram_create_os_partition(void);
-static int nvram_remove_os_partition(void);
-
 static struct nvram_partition * nvram_part;
 static long nvram_error_log_index = -1;
 static long nvram_error_log_size = 0;
 
-int no_logging = 1;     /* Until we initialize everything,
-                         * make sure we don't try logging
-                         * anything */
-
-extern volatile int error_log_cnt;
-
 struct err_log_info {
         int error_type;
         unsigned int seq_num;
@@ -636,16 +625,13 @@ void __exit nvram_cleanup(void)
  * sequence #: The unique sequence # for each event. (until it wraps)
  * error log: The error log from event_scan
  */
-int nvram_write_error_log(char * buff, int length, unsigned int err_type)
+int nvram_write_error_log(char * buff, int length,
+                          unsigned int err_type, unsigned int error_log_cnt)
 {
         int rc;
         loff_t tmp_index;
         struct err_log_info info;
         
-        if (no_logging) {
-                return -EPERM;
-        }
-
         if (nvram_error_log_index == -1) {
                 return -ESPIPE;
         }
@@ -678,7 +664,8 @@ int nvram_write_error_log(char * buff, int length, unsigned int err_type)
  *
  * Reads nvram for error log for at most 'length'
  */
-int nvram_read_error_log(char * buff, int length, unsigned int * err_type)
+int nvram_read_error_log(char * buff, int length,
+                         unsigned int * err_type, unsigned int * error_log_cnt)
 {
         int rc;
         loff_t tmp_index;
@@ -704,7 +691,7 @@ int nvram_read_error_log(char * buff, int length, unsigned int * err_type)
                 return rc;
         }
 
-        error_log_cnt = info.seq_num;
+        *error_log_cnt = info.seq_num;
         *err_type = info.error_type;
 
         return 0;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 083cfbdbe0b2..2ae3b6f778a3 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -65,14 +65,11 @@ static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
         spin_unlock(&hose_spinlock);
 }
 
-__init_refok struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
+struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
 {
         struct pci_controller *phb;
 
-        if (mem_init_done)
-                phb = kmalloc(sizeof(struct pci_controller), GFP_KERNEL);
-        else
-                phb = alloc_bootmem(sizeof (struct pci_controller));
+        phb = alloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
         if (phb == NULL)
                 return NULL;
         pci_setup_pci_controller(phb);
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 04a3109ae3c6..0e2bee46304c 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -1457,8 +1457,8 @@ null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
 
 static struct pci_ops null_pci_ops =
 {
-        null_read_config,
-        null_write_config
+        .read = null_read_config,
+        .write = null_write_config,
 };
 
 /*
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 291ffbc360c9..9f63bdcb0bdf 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -588,7 +588,7 @@ int pci_proc_domain(struct pci_bus *bus)
                 return 0;
         else {
                 struct pci_controller *hose = pci_bus_to_host(bus);
-                return hose->buid;
+                return hose->buid != 0;
         }
 }
 
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index d7d36df9c053..b4839038613d 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -23,8 +23,6 @@
 #include <linux/pci.h>
 #include <linux/string.h>
 #include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/bootmem.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
@@ -45,10 +43,7 @@ static void * __devinit update_dn_pci_info(struct device_node *dn, void *data)
         const u32 *regs;
         struct pci_dn *pdn;
 
-        if (mem_init_done)
-                pdn = kmalloc(sizeof(*pdn), GFP_KERNEL);
-        else
-                pdn = alloc_bootmem(sizeof(*pdn));
+        pdn = alloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL);
         if (pdn == NULL)
                 return NULL;
         memset(pdn, 0, sizeof(*pdn));
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index a20f1951a5ce..c6b1aa3efbb9 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -12,12 +12,12 @@
 #include <linux/irq.h>
 #include <linux/pci.h>
 #include <linux/delay.h>
-#include <linux/ide.h>
 #include <linux/bitops.h>
 
 #include <asm/page.h>
 #include <asm/semaphore.h>
 #include <asm/processor.h>
+#include <asm/cacheflush.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
 #include <asm/atomic.h>
@@ -95,10 +95,6 @@ EXPORT_SYMBOL(__strnlen_user);
 EXPORT_SYMBOL(copy_4K_page);
 #endif
 
-#if defined(CONFIG_PPC32) && (defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE))
-EXPORT_SYMBOL(ppc_ide_md);
-#endif
-
 #if defined(CONFIG_PCI) && defined(CONFIG_PPC32)
 EXPORT_SYMBOL(isa_io_base);
 EXPORT_SYMBOL(isa_mem_base);
@@ -180,7 +176,7 @@ EXPORT_SYMBOL(cacheable_memcpy);
 EXPORT_SYMBOL(cpm_install_handler);
 EXPORT_SYMBOL(cpm_free_handler);
 #endif /* CONFIG_8xx */
-#if defined(CONFIG_8xx) || defined(CONFIG_40x)
+#if defined(CONFIG_8xx)
 EXPORT_SYMBOL(__res);
 #endif
 
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 8a1b001d0b11..15998b57767c 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -354,6 +354,14 @@ static void show_instructions(struct pt_regs *regs)
                 if (!(i % 8))
                         printk("\n");
 
+#if !defined(CONFIG_BOOKE)
+                /* If executing with the IMMU off, adjust pc rather
+                 * than print XXXXXXXX.
+                 */
+                if (!(regs->msr & MSR_IR))
+                        pc = (unsigned long)phys_to_virt(pc);
+#endif
+
                 /* We use __get_user here *only* to avoid an OOPS on a
                  * bad address because the pc *should* only be a
                  * kernel address.
@@ -676,9 +684,13 @@ int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
          * mode (asyn, precise, disabled) for 'Classic' FP. */
         if (val & PR_FP_EXC_SW_ENABLE) {
 #ifdef CONFIG_SPE
-                tsk->thread.fpexc_mode = val &
-                        (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
-                return 0;
+                if (cpu_has_feature(CPU_FTR_SPE)) {
+                        tsk->thread.fpexc_mode = val &
+                                (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
+                        return 0;
+                } else {
+                        return -EINVAL;
+                }
 #else
                 return -EINVAL;
 #endif
@@ -704,7 +716,10 @@ int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
 
         if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
 #ifdef CONFIG_SPE
-                val = tsk->thread.fpexc_mode;
+                if (cpu_has_feature(CPU_FTR_SPE))
+                        val = tsk->thread.fpexc_mode;
+                else
+                        return -EINVAL;
 #else
                 return -EINVAL;
 #endif
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index a38197b12d3e..172dcc3849a0 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -52,7 +52,6 @@
 #include <asm/pSeries_reconfig.h>
 #include <asm/pci-bridge.h>
 #include <asm/kexec.h>
-#include <asm/system.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) printk(KERN_ERR fmt)
@@ -431,9 +430,11 @@ static int __init early_parse_mem(char *p)
 }
 early_param("mem", early_parse_mem);
 
-/*
- * The device tree may be allocated below our memory limit, or inside the
- * crash kernel region for kdump. If so, move it out now.
+/**
+ * move_device_tree - move tree to an unused area, if needed.
+ *
+ * The device tree may be allocated beyond our memory limit, or inside the
+ * crash kernel region for kdump. If so, move it out of the way.
  */
 static void move_device_tree(void)
 {
@@ -780,13 +781,13 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
 #endif
 
 #ifdef CONFIG_KEXEC
-       lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-base", NULL);
-       if (lprop)
-               crashk_res.start = *lprop;
+        lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-base", NULL);
+        if (lprop)
+                crashk_res.start = *lprop;
 
-       lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-size", NULL);
-       if (lprop)
-               crashk_res.end = crashk_res.start + *lprop - 1;
+        lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-size", NULL);
+        if (lprop)
+                crashk_res.end = crashk_res.start + *lprop - 1;
 #endif
 
         early_init_dt_check_for_initrd(node);
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index a1d582e38627..1db10f70ae69 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1199,7 +1199,7 @@ static void __init prom_initialize_tce_table(void)
                 if ((type[0] == 0) || (strstr(type, RELOC("pci")) == NULL))
                         continue;
 
-                /* Keep the old logic in tack to avoid regression. */
+                /* Keep the old logic intact to avoid regression. */
                 if (compatible[0] != 0) {
                         if ((strstr(compatible, RELOC("python")) == NULL) &&
                             (strstr(compatible, RELOC("Speedwagon")) == NULL) &&
@@ -2046,6 +2046,7 @@ static void __init fixup_device_tree_maple(void)
 /*
  * Pegasos and BriQ lacks the "ranges" property in the isa node
  * Pegasos needs decimal IRQ 14/15, not hexadecimal
+ * Pegasos has the IDE configured in legacy mode, but advertised as native
  */
 static void __init fixup_device_tree_chrp(void)
 {
@@ -2083,9 +2084,13 @@ static void __init fixup_device_tree_chrp(void)
                 prom_printf("Fixing up IDE interrupt on Pegasos...\n");
                 prop[0] = 14;
                 prop[1] = 0x0;
-                prop[2] = 15;
-                prop[3] = 0x0;
-                prom_setprop(ph, name, "interrupts", prop, 4*sizeof(u32));
+                prom_setprop(ph, name, "interrupts", prop, 2*sizeof(u32));
+                prom_printf("Fixing up IDE class-code on Pegasos...\n");
+                rc = prom_getprop(ph, "class-code", prop, sizeof(u32));
+                if (rc == sizeof(u32)) {
+                        prop[0] &= ~0x5;
+                        prom_setprop(ph, name, "class-code", prop, sizeof(u32));
+                }
         }
 }
 #else
@@ -2226,7 +2231,7 @@ static void __init fixup_device_tree(void)
 
 static void __init prom_find_boot_cpu(void)
 {
-        struct prom_t *_prom = &RELOC(prom);
+        struct prom_t *_prom = &RELOC(prom);
         u32 getprop_rval;
         ihandle prom_cpu;
         phandle cpu_pkg;
@@ -2246,7 +2251,7 @@ static void __init prom_find_boot_cpu(void)
 static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
 {
 #ifdef CONFIG_BLK_DEV_INITRD
-        struct prom_t *_prom = &RELOC(prom);
+        struct prom_t *_prom = &RELOC(prom);
 
         if (r3 && r4 && r4 != 0xdeadbeef) {
                 unsigned long val;
@@ -2279,7 +2284,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
                                unsigned long pp,
                                unsigned long r6, unsigned long r7)
 {       
-        struct prom_t *_prom;
+        struct prom_t *_prom;
         unsigned long hdr;
         unsigned long offset = reloc_offset();
 
@@ -2338,8 +2343,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
         /*
          * Copy the CPU hold code
          */
-        if (RELOC(of_platform) != PLATFORM_POWERMAC)
-                copy_and_flush(0, KERNELBASE + offset, 0x100, 0);
+        if (RELOC(of_platform) != PLATFORM_POWERMAC)
+                copy_and_flush(0, KERNELBASE + offset, 0x100, 0);
 
         /*
          * Do early parsing of command line
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 8a177bd9eab4..cf7732cdd6c7 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -331,6 +331,7 @@ static long arch_ptrace_old(struct task_struct *child, long request, long addr,
                 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
                 unsigned long __user *tmp = (unsigned long __user *)addr;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 for (i = 0; i < 32; i++) {
                         ret = put_user(*reg, tmp);
                         if (ret)
@@ -346,6 +347,7 @@ static long arch_ptrace_old(struct task_struct *child, long request, long addr,
                 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
                 unsigned long __user *tmp = (unsigned long __user *)addr;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 for (i = 0; i < 32; i++) {
                         ret = get_user(*reg, tmp);
                         if (ret)
@@ -517,6 +519,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = -EIO;
                         break;
                 }
+                CHECK_FULL_REGS(child->thread.regs);
                 ret = 0;
                 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
                         ret |= __put_user(ptrace_get_reg(child, ui),
@@ -537,6 +540,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = -EIO;
                         break;
                 }
+                CHECK_FULL_REGS(child->thread.regs);
                 ret = 0;
                 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
                         ret = __get_user(tmp, (unsigned long __user *) data);
@@ -576,8 +580,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 #ifdef CONFIG_SPE
         case PTRACE_GETEVRREGS:
                 /* Get the child spe register state. */
-                if (child->thread.regs->msr & MSR_SPE)
-                        giveup_spe(child);
+                flush_spe_to_thread(child);
                 ret = get_evrregs((unsigned long __user *)data, child);
                 break;
 
@@ -585,8 +588,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 /* Set the child spe register state. */
                 /* this is to clear the MSR_SPE bit to force a reload
                  * of register state from memory */
-                if (child->thread.regs->msr & MSR_SPE)
-                        giveup_spe(child);
+                flush_spe_to_thread(child);
                 ret = set_evrregs(child, (unsigned long __user *)data);
                 break;
 #endif
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 9e6baeac0fb1..fea6206ff90f 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -53,6 +53,7 @@ static long compat_ptrace_old(struct task_struct *child, long request,
                 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
                 unsigned int __user *tmp = (unsigned int __user *)addr;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 for (i = 0; i < 32; i++) {
                         ret = put_user(*reg, tmp);
                         if (ret)
@@ -68,6 +69,7 @@ static long compat_ptrace_old(struct task_struct *child, long request,
                 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
                 unsigned int __user *tmp = (unsigned int __user *)addr;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 for (i = 0; i < 32; i++) {
                         ret = get_user(*reg, tmp);
                         if (ret)
@@ -164,6 +166,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
                 if ((addr & 3) || (index > PT_FPSCR32))
                         break;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 if (index < PT_FPR0) {
                         tmp = ptrace_get_reg(child, index);
                 } else {
@@ -210,6 +213,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
                 if ((addr & 3) || numReg > PT_FPSCR)
                         break;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 if (numReg >= PT_FPR0) {
                         flush_fp_to_thread(child);
                         tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0];
@@ -270,6 +274,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
                 if ((addr & 3) || (index > PT_FPSCR32))
                         break;
 
+                CHECK_FULL_REGS(child->thread.regs);
                 if (index < PT_FPR0) {
                         ret = ptrace_put_reg(child, index, data);
                 } else {
@@ -307,6 +312,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
                  */
                 if ((addr & 3) || (numReg > PT_FPSCR))
                         break;
+                CHECK_FULL_REGS(child->thread.regs);
                 if (numReg < PT_FPR0) {
                         unsigned long freg = ptrace_get_reg(child, numReg);
                         if (index % 2)
@@ -342,6 +348,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
                         ret = -EIO;
                         break;
                 }
+                CHECK_FULL_REGS(child->thread.regs);
                 ret = 0;
                 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
                         ret |= __put_user(ptrace_get_reg(child, ui),
@@ -359,6 +366,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long addr,
                         ret = -EIO;
                         break;
                 }
+                CHECK_FULL_REGS(child->thread.regs);
                 ret = 0;
                 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
                         ret = __get_user(tmp, (unsigned int __user *) data);
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index a5de6211b97a..21f14e57d1f3 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -171,8 +171,8 @@ static int rtas_pci_write_config(struct pci_bus *bus,
 }
 
 struct pci_ops rtas_pci_ops = {
-        rtas_pci_read_config,
-        rtas_pci_write_config
+        .read = rtas_pci_read_config,
+        .write = rtas_pci_write_config,
 };
 
 int is_python(struct device_node *dev)
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 50ef38cffdbf..36c90ba2d312 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -76,6 +76,8 @@ EXPORT_SYMBOL(machine_id);
 
 unsigned long klimit = (unsigned long) _end;
 
+char cmd_line[COMMAND_LINE_SIZE];
+
 /*
  * This still seems to be needed... -- paulus
  */ 
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 7ec6ba56d83d..7474502dace5 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -10,7 +10,9 @@
 #include <linux/reboot.h>
 #include <linux/delay.h>
 #include <linux/initrd.h>
+#if defined(CONFIG_IDE) || defined(CONFIG_IDE_MODULE)
 #include <linux/ide.h>
+#endif
 #include <linux/tty.h>
 #include <linux/bootmem.h>
 #include <linux/seq_file.h>
@@ -18,13 +20,11 @@
 #include <linux/cpu.h>
 #include <linux/console.h>
 
-#include <asm/residual.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
 #include <asm/setup.h>
-#include <asm/amigappc.h>
 #include <asm/smp.h>
 #include <asm/elf.h>
 #include <asm/cputable.h>
@@ -51,7 +51,10 @@
 
 extern void bootx_init(unsigned long r4, unsigned long phys);
 
+#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 struct ide_machdep_calls ppc_ide_md;
+EXPORT_SYMBOL(ppc_ide_md);
+#endif
 
 int boot_cpuid;
 EXPORT_SYMBOL_GPL(boot_cpuid);
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6018178708a5..3089eaed3256 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -181,9 +181,9 @@ void __init early_setup(unsigned long dt_ptr)
         DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
 
         /*
-         * Do early initializations using the flattened device
-         * tree, like retreiving the physical memory map or
-         * calculating/retreiving the hash table size
+         * Do early initialization using the flattened device
+         * tree, such as retrieving the physical memory map or
+         * calculating/retrieving the hash table size.
          */
         early_init_devtree(__va(dt_ptr));
 
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 1ea43160f543..b24dcbaeecaa 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -152,11 +152,6 @@ static void stop_this_cpu(void *dummy)
                 ;
 }
 
-void smp_send_stop(void)
-{
-        smp_call_function(stop_this_cpu, NULL, 1, 0);
-}
-
 /*
  * Structure and data for smp_call_function(). This is designed to minimise
  * static memory requirements. It also looks cleaner.
@@ -198,9 +193,6 @@ int smp_call_function_map(void (*func) (void *info), void *info, int nonatomic,
         int cpu;
         u64 timeout;
 
-        /* Can deadlock when called with interrupts disabled */
-        WARN_ON(irqs_disabled());
-
         if (unlikely(smp_ops == NULL))
                 return ret;
 
@@ -270,10 +262,19 @@ int smp_call_function_map(void (*func) (void *info), void *info, int nonatomic,
         return ret;
 }
 
+static int __smp_call_function(void (*func)(void *info), void *info,
+                               int nonatomic, int wait)
+{
+        return smp_call_function_map(func,info,nonatomic,wait,cpu_online_map);
+}
+
 int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
                         int wait)
 {
-        return smp_call_function_map(func,info,nonatomic,wait,cpu_online_map);
+        /* Can deadlock when called with interrupts disabled */
+        WARN_ON(irqs_disabled());
+
+        return __smp_call_function(func, info, nonatomic, wait);
 }
 EXPORT_SYMBOL(smp_call_function);
 
@@ -283,6 +284,9 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info, int
         cpumask_t map = CPU_MASK_NONE;
         int ret = 0;
 
+        /* Can deadlock when called with interrupts disabled */
+        WARN_ON(irqs_disabled());
+
         if (!cpu_online(cpu))
                 return -EINVAL;
 
@@ -299,6 +303,11 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info, int
 }
 EXPORT_SYMBOL(smp_call_function_single);
 
+void smp_send_stop(void)
+{
+        __smp_call_function(stop_this_cpu, NULL, 1, 0);
+}
+
 void smp_call_function_interrupt(void)
 {
         void (*func) (void *info);
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 55d29ed4b7a0..25d9a96484dd 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -197,6 +197,36 @@ SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
 SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
 SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
 
+#ifdef CONFIG_DEBUG_KERNEL
+SYSFS_PMCSETUP(hid0, SPRN_HID0);
+SYSFS_PMCSETUP(hid1, SPRN_HID1);
+SYSFS_PMCSETUP(hid4, SPRN_HID4);
+SYSFS_PMCSETUP(hid5, SPRN_HID5);
+SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
+SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
+SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
+SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
+SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
+SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
+SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
+SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
+SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
+SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
+SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
+SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
+SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
+SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
+SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
+SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
+SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
+SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
+SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
+SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
+SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
+SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
+SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
+SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
+#endif /* CONFIG_DEBUG_KERNEL */
 
 static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
 static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
@@ -228,6 +258,36 @@ static struct sysdev_attribute pa6t_attrs[] = {
         _SYSDEV_ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
         _SYSDEV_ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
         _SYSDEV_ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
+#ifdef CONFIG_DEBUG_KERNEL
+        _SYSDEV_ATTR(hid0, 0600, show_hid0, store_hid0),
+        _SYSDEV_ATTR(hid1, 0600, show_hid1, store_hid1),
+        _SYSDEV_ATTR(hid4, 0600, show_hid4, store_hid4),
+        _SYSDEV_ATTR(hid5, 0600, show_hid5, store_hid5),
+        _SYSDEV_ATTR(ima0, 0600, show_ima0, store_ima0),
+        _SYSDEV_ATTR(ima1, 0600, show_ima1, store_ima1),
+        _SYSDEV_ATTR(ima2, 0600, show_ima2, store_ima2),
+        _SYSDEV_ATTR(ima3, 0600, show_ima3, store_ima3),
+        _SYSDEV_ATTR(ima4, 0600, show_ima4, store_ima4),
+        _SYSDEV_ATTR(ima5, 0600, show_ima5, store_ima5),
+        _SYSDEV_ATTR(ima6, 0600, show_ima6, store_ima6),
+        _SYSDEV_ATTR(ima7, 0600, show_ima7, store_ima7),
+        _SYSDEV_ATTR(ima8, 0600, show_ima8, store_ima8),
+        _SYSDEV_ATTR(ima9, 0600, show_ima9, store_ima9),
+        _SYSDEV_ATTR(imaat, 0600, show_imaat, store_imaat),
+        _SYSDEV_ATTR(btcr, 0600, show_btcr, store_btcr),
+        _SYSDEV_ATTR(pccr, 0600, show_pccr, store_pccr),
+        _SYSDEV_ATTR(rpccr, 0600, show_rpccr, store_rpccr),
+        _SYSDEV_ATTR(der, 0600, show_der, store_der),
+        _SYSDEV_ATTR(mer, 0600, show_mer, store_mer),
+        _SYSDEV_ATTR(ber, 0600, show_ber, store_ber),
+        _SYSDEV_ATTR(ier, 0600, show_ier, store_ier),
+        _SYSDEV_ATTR(sier, 0600, show_sier, store_sier),
+        _SYSDEV_ATTR(siar, 0600, show_siar, store_siar),
+        _SYSDEV_ATTR(tsr0, 0600, show_tsr0, store_tsr0),
+        _SYSDEV_ATTR(tsr1, 0600, show_tsr1, store_tsr1),
+        _SYSDEV_ATTR(tsr2, 0600, show_tsr2, store_tsr2),
+        _SYSDEV_ATTR(tsr3, 0600, show_tsr3, store_tsr3),
+#endif /* CONFIG_DEBUG_KERNEL */
 };
 
 
@@ -380,12 +440,14 @@ int cpu_add_sysdev_attr_group(struct attribute_group *attrs)
 {
         int cpu;
         struct sys_device *sysdev;
+        int ret;
 
         mutex_lock(&cpu_mutex);
 
         for_each_possible_cpu(cpu) {
                 sysdev = get_cpu_sysdev(cpu);
-                sysfs_create_group(&sysdev->kobj, attrs);
+                ret = sysfs_create_group(&sysdev->kobj, attrs);
+                WARN_ON(ret != 0);
         }
 
         mutex_unlock(&cpu_mutex);
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index c627cf86d1e3..e71a0d8c597a 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -65,24 +65,45 @@
 #include <asm/div64.h>
 #include <asm/smp.h>
 #include <asm/vdso_datapage.h>
-#ifdef CONFIG_PPC64
 #include <asm/firmware.h>
-#endif
 #ifdef CONFIG_PPC_ISERIES
 #include <asm/iseries/it_lp_queue.h>
 #include <asm/iseries/hv_call_xm.h>
 #endif
-#include <asm/smp.h>
 
-/* keep track of when we need to update the rtc */
-time_t last_rtc_update;
+/* powerpc clocksource/clockevent code */
+
+#include <linux/clocksource.h>
+
+static cycle_t rtc_read(void);
+static struct clocksource clocksource_rtc = {
+        .name         = "rtc",
+        .rating       = 400,
+        .flags        = CLOCK_SOURCE_IS_CONTINUOUS,
+        .mask         = CLOCKSOURCE_MASK(64),
+        .shift        = 22,
+        .mult         = 0,      /* To be filled in */
+        .read         = rtc_read,
+};
+
+static cycle_t timebase_read(void);
+static struct clocksource clocksource_timebase = {
+        .name         = "timebase",
+        .rating       = 400,
+        .flags        = CLOCK_SOURCE_IS_CONTINUOUS,
+        .mask         = CLOCKSOURCE_MASK(64),
+        .shift        = 22,
+        .mult         = 0,      /* To be filled in */
+        .read         = timebase_read,
+};
+
 #ifdef CONFIG_PPC_ISERIES
 static unsigned long __initdata iSeries_recal_titan;
 static signed long __initdata iSeries_recal_tb;
-#endif
 
-/* The decrementer counts down by 128 every 128ns on a 601. */
-#define DECREMENTER_COUNT_601   (1000000000 / HZ)
+/* Forward declaration is only needed for iSereis compiles */
+void __init clocksource_init(void);
+#endif
 
 #define XSEC_PER_SEC (1024*1024)
 
@@ -349,98 +370,6 @@ void udelay(unsigned long usecs)
 }
 EXPORT_SYMBOL(udelay);
 
-static __inline__ void timer_check_rtc(void)
-{
-        /*
-         * update the rtc when needed, this should be performed on the
-         * right fraction of a second. Half or full second ?
-         * Full second works on mk48t59 clocks, others need testing.
-         * Note that this update is basically only used through 
-         * the adjtimex system calls. Setting the HW clock in
-         * any other way is a /dev/rtc and userland business.
-         * This is still wrong by -0.5/+1.5 jiffies because of the
-         * timer interrupt resolution and possible delay, but here we 
-         * hit a quantization limit which can only be solved by higher
-         * resolution timers and decoupling time management from timer
-         * interrupts. This is also wrong on the clocks
-         * which require being written at the half second boundary.
-         * We should have an rtc call that only sets the minutes and
-         * seconds like on Intel to avoid problems with non UTC clocks.
-         */
-        if (ppc_md.set_rtc_time && ntp_synced() &&
-            xtime.tv_sec - last_rtc_update >= 659 &&
-            abs((xtime.tv_nsec/1000) - (1000000-1000000/HZ)) < 500000/HZ) {
-                struct rtc_time tm;
-                to_tm(xtime.tv_sec + 1 + timezone_offset, &tm);
-                tm.tm_year -= 1900;
-                tm.tm_mon -= 1;
-                if (ppc_md.set_rtc_time(&tm) == 0)
-                        last_rtc_update = xtime.tv_sec + 1;
-                else
-                        /* Try again one minute later */
-                        last_rtc_update += 60;
-        }
-}
-
-/*
- * This version of gettimeofday has microsecond resolution.
- */
-static inline void __do_gettimeofday(struct timeval *tv)
-{
-        unsigned long sec, usec;
-        u64 tb_ticks, xsec;
-        struct gettimeofday_vars *temp_varp;
-        u64 temp_tb_to_xs, temp_stamp_xsec;
-
-        /*
-         * These calculations are faster (gets rid of divides)
-         * if done in units of 1/2^20 rather than microseconds.
-         * The conversion to microseconds at the end is done
-         * without a divide (and in fact, without a multiply)
-         */
-        temp_varp = do_gtod.varp;
-
-        /* Sampling the time base must be done after loading
-         * do_gtod.varp in order to avoid racing with update_gtod.
-         */
-        data_barrier(temp_varp);
-        tb_ticks = get_tb() - temp_varp->tb_orig_stamp;
-        temp_tb_to_xs = temp_varp->tb_to_xs;
-        temp_stamp_xsec = temp_varp->stamp_xsec;
-        xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs);
-        sec = xsec / XSEC_PER_SEC;
-        usec = (unsigned long)xsec & (XSEC_PER_SEC - 1);
-        usec = SCALE_XSEC(usec, 1000000);
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
-}
-
-void do_gettimeofday(struct timeval *tv)
-{
-        if (__USE_RTC()) {
-                /* do this the old way */
-                unsigned long flags, seq;
-                unsigned int sec, nsec, usec;
-
-                do {
-                        seq = read_seqbegin_irqsave(&xtime_lock, flags);
-                        sec = xtime.tv_sec;
-                        nsec = xtime.tv_nsec + tb_ticks_since(tb_last_jiffy);
-                } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-                usec = nsec / 1000;
-                while (usec >= 1000000) {
-                        usec -= 1000000;
-                        ++sec;
-                }
-                tv->tv_sec = sec;
-                tv->tv_usec = usec;
-                return;
-        }
-        __do_gettimeofday(tv);
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
 
 /*
  * There are two copies of tb_to_xs and stamp_xsec so that no
@@ -486,56 +415,6 @@ static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
         ++(vdso_data->tb_update_count);
 }
 
-/*
- * When the timebase - tb_orig_stamp gets too big, we do a manipulation
- * between tb_orig_stamp and stamp_xsec. The goal here is to keep the
- * difference tb - tb_orig_stamp small enough to always fit inside a
- * 32 bits number. This is a requirement of our fast 32 bits userland
- * implementation in the vdso. If we "miss" a call to this function
- * (interrupt latency, CPU locked in a spinlock, ...) and we end up
- * with a too big difference, then the vdso will fallback to calling
- * the syscall
- */
-static __inline__ void timer_recalc_offset(u64 cur_tb)
-{
-        unsigned long offset;
-        u64 new_stamp_xsec;
-        u64 tlen, t2x;
-        u64 tb, xsec_old, xsec_new;
-        struct gettimeofday_vars *varp;
-
-        if (__USE_RTC())
-                return;
-        tlen = current_tick_length();
-        offset = cur_tb - do_gtod.varp->tb_orig_stamp;
-        if (tlen == last_tick_len && offset < 0x80000000u)
-                return;
-        if (tlen != last_tick_len) {
-                t2x = mulhdu(tlen << TICKLEN_SHIFT, ticklen_to_xs);
-                last_tick_len = tlen;
-        } else
-                t2x = do_gtod.varp->tb_to_xs;
-        new_stamp_xsec = (u64) xtime.tv_nsec * XSEC_PER_SEC;
-        do_div(new_stamp_xsec, 1000000000);
-        new_stamp_xsec += (u64) xtime.tv_sec * XSEC_PER_SEC;
-
-        ++vdso_data->tb_update_count;
-        smp_mb();
-
-        /*
-         * Make sure time doesn't go backwards for userspace gettimeofday.
-         */
-        tb = get_tb();
-        varp = do_gtod.varp;
-        xsec_old = mulhdu(tb - varp->tb_orig_stamp, varp->tb_to_xs)
-                + varp->stamp_xsec;
-        xsec_new = mulhdu(tb - cur_tb, t2x) + new_stamp_xsec;
-        if (xsec_new < xsec_old)
-                new_stamp_xsec += xsec_old - xsec_new;
-
-        update_gtod(cur_tb, new_stamp_xsec, t2x);
-}
-
 #ifdef CONFIG_SMP
 unsigned long profile_pc(struct pt_regs *regs)
 {
@@ -607,6 +486,8 @@ static int __init iSeries_tb_recal(void)
         iSeries_recal_titan = titan;
         iSeries_recal_tb = tb;
 
+        /* Called here as now we know accurate values for the timebase */
+        clocksource_init();
         return 0;
 }
 late_initcall(iSeries_tb_recal);
@@ -689,8 +570,6 @@ void timer_interrupt(struct pt_regs * regs)
                 if (per_cpu(last_jiffy, cpu) >= tb_next_jiffy) {
                         tb_last_jiffy = tb_next_jiffy;
                         do_timer(1);
-                        timer_recalc_offset(tb_last_jiffy);
-                        timer_check_rtc();
                 }
                 write_sequnlock(&xtime_lock);
         }
@@ -762,71 +641,6 @@ unsigned long long sched_clock(void)
         return mulhdu(get_tb() - boot_tb, tb_to_ns_scale) << tb_to_ns_shift;
 }
 
-int do_settimeofday(struct timespec *tv)
-{
-        time_t wtm_sec, new_sec = tv->tv_sec;
-        long wtm_nsec, new_nsec = tv->tv_nsec;
-        unsigned long flags;
-        u64 new_xsec;
-        unsigned long tb_delta;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irqsave(&xtime_lock, flags);
-
-        /*
-         * Updating the RTC is not the job of this code. If the time is
-         * stepped under NTP, the RTC will be updated after STA_UNSYNC
-         * is cleared.  Tools like clock/hwclock either copy the RTC
-         * to the system time, in which case there is no point in writing
-         * to the RTC again, or write to the RTC but then they don't call
-         * settimeofday to perform this operation.
-         */
-
-        /* Make userspace gettimeofday spin until we're done. */
-        ++vdso_data->tb_update_count;
-        smp_mb();
-
-        /*
-         * Subtract off the number of nanoseconds since the
-         * beginning of the last tick.
-         */
-        tb_delta = tb_ticks_since(tb_last_jiffy);
-        tb_delta = mulhdu(tb_delta, do_gtod.varp->tb_to_xs); /* in xsec */
-        new_nsec -= SCALE_XSEC(tb_delta, 1000000000);
-
-        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - new_sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - new_nsec);
-
-        set_normalized_timespec(&xtime, new_sec, new_nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        /* In case of a large backwards jump in time with NTP, we want the 
-         * clock to be updated as soon as the PLL is again in lock.
-         */
-        last_rtc_update = new_sec - 658;
-
-        ntp_clear();
-
-        new_xsec = xtime.tv_nsec;
-        if (new_xsec != 0) {
-                new_xsec *= XSEC_PER_SEC;
-                do_div(new_xsec, NSEC_PER_SEC);
-        }
-        new_xsec += (u64)xtime.tv_sec * XSEC_PER_SEC;
-        update_gtod(tb_last_jiffy, new_xsec, do_gtod.varp->tb_to_xs);
-
-        vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
-        vdso_data->tz_dsttime = sys_tz.tz_dsttime;
-
-        write_sequnlock_irqrestore(&xtime_lock, flags);
-        clock_was_set();
-        return 0;
-}
-
-EXPORT_SYMBOL(do_settimeofday);
-
 static int __init get_freq(char *name, int cells, unsigned long *val)
 {
         struct device_node *cpu;
@@ -869,7 +683,7 @@ void __init generic_calibrate_decr(void)
                                 "(not found)\n");
         }
 
-#ifdef CONFIG_BOOKE
+#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
         /* Set the time base to zero */
         mtspr(SPRN_TBWL, 0);
         mtspr(SPRN_TBWU, 0);
@@ -882,12 +696,35 @@ void __init generic_calibrate_decr(void)
 #endif
 }
 
-unsigned long get_boot_time(void)
+int update_persistent_clock(struct timespec now)
+{
+        struct rtc_time tm;
+
+        if (!ppc_md.set_rtc_time)
+                return 0;
+
+        to_tm(now.tv_sec + 1 + timezone_offset, &tm);
+        tm.tm_year -= 1900;
+        tm.tm_mon -= 1;
+
+        return ppc_md.set_rtc_time(&tm);
+}
+
+unsigned long read_persistent_clock(void)
 {
         struct rtc_time tm;
+        static int first = 1;
 
-        if (ppc_md.get_boot_time)
-                return ppc_md.get_boot_time();
+        /* XXX this is a litle fragile but will work okay in the short term */
+        if (first) {
+                first = 0;
+                if (ppc_md.time_init)
+                        timezone_offset = ppc_md.time_init();
+
+                /* get_boot_time() isn't guaranteed to be safe to call late */
+                if (ppc_md.get_boot_time)
+                        return ppc_md.get_boot_time() -timezone_offset;
+        }
         if (!ppc_md.get_rtc_time)
                 return 0;
         ppc_md.get_rtc_time(&tm);
@@ -895,18 +732,77 @@ unsigned long get_boot_time(void)
                       tm.tm_hour, tm.tm_min, tm.tm_sec);
 }
 
+/* clocksource code */
+static cycle_t rtc_read(void)
+{
+        return (cycle_t)get_rtc();
+}
+
+static cycle_t timebase_read(void)
+{
+        return (cycle_t)get_tb();
+}
+
+void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
+{
+        u64 t2x, stamp_xsec;
+
+        if (clock != &clocksource_timebase)
+                return;
+
+        /* Make userspace gettimeofday spin until we're done. */
+        ++vdso_data->tb_update_count;
+        smp_mb();
+
+        /* XXX this assumes clock->shift == 22 */
+        /* 4611686018 ~= 2^(20+64-22) / 1e9 */
+        t2x = (u64) clock->mult * 4611686018ULL;
+        stamp_xsec = (u64) xtime.tv_nsec * XSEC_PER_SEC;
+        do_div(stamp_xsec, 1000000000);
+        stamp_xsec += (u64) xtime.tv_sec * XSEC_PER_SEC;
+        update_gtod(clock->cycle_last, stamp_xsec, t2x);
+}
+
+void update_vsyscall_tz(void)
+{
+        /* Make userspace gettimeofday spin until we're done. */
+        ++vdso_data->tb_update_count;
+        smp_mb();
+        vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
+        vdso_data->tz_dsttime = sys_tz.tz_dsttime;
+        smp_mb();
+        ++vdso_data->tb_update_count;
+}
+
+void __init clocksource_init(void)
+{
+        struct clocksource *clock;
+
+        if (__USE_RTC())
+                clock = &clocksource_rtc;
+        else
+                clock = &clocksource_timebase;
+
+        clock->mult = clocksource_hz2mult(tb_ticks_per_sec, clock->shift);
+
+        if (clocksource_register(clock)) {
+                printk(KERN_ERR "clocksource: %s is already registered\n",
+                       clock->name);
+                return;
+        }
+
+        printk(KERN_INFO "clocksource: %s mult[%x] shift[%d] registered\n",
+               clock->name, clock->mult, clock->shift);
+}
+
 /* This function is only called on the boot processor */
 void __init time_init(void)
 {
         unsigned long flags;
-        unsigned long tm = 0;
         struct div_result res;
         u64 scale, x;
         unsigned shift;
 
-        if (ppc_md.time_init != NULL)
-                timezone_offset = ppc_md.time_init();
-
         if (__USE_RTC()) {
                 /* 601 processor: dec counts down by 128 every 128ns */
                 ppc_tb_freq = 1000000000;
@@ -981,19 +877,14 @@ void __init time_init(void)
         /* Save the current timebase to pretty up CONFIG_PRINTK_TIME */
         boot_tb = get_tb_or_rtc();
 
-        tm = get_boot_time();
-
         write_seqlock_irqsave(&xtime_lock, flags);
 
         /* If platform provided a timezone (pmac), we correct the time */
         if (timezone_offset) {
                 sys_tz.tz_minuteswest = -timezone_offset / 60;
                 sys_tz.tz_dsttime = 0;
-                tm -= timezone_offset;
         }
 
-        xtime.tv_sec = tm;
-        xtime.tv_nsec = 0;
         do_gtod.varp = &do_gtod.vars[0];
         do_gtod.var_idx = 0;
         do_gtod.varp->tb_orig_stamp = tb_last_jiffy;
@@ -1011,11 +902,12 @@ void __init time_init(void)
 
         time_freq = 0;
 
-        last_rtc_update = xtime.tv_sec;
-        set_normalized_timespec(&wall_to_monotonic,
-                                -xtime.tv_sec, -xtime.tv_nsec);
         write_sequnlock_irqrestore(&xtime_lock, flags);
 
+        /* Register the clocksource, if we're not running on iSeries */
+        if (!firmware_has_feature(FW_FEATURE_ISERIES))
+                clocksource_init();
+
         /* Not exact, but the timer interrupt takes care of this */
         set_dec(tb_ticks_per_jiffy);
 }
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index d8502e377518..5a49eabd492e 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -324,47 +324,10 @@ static inline int check_io_access(struct pt_regs *regs)
 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
 #endif
 
-/*
- * This is "fall-back" implementation for configurations
- * which don't provide platform-specific machine check info
- */
-void __attribute__ ((weak))
-platform_machine_check(struct pt_regs *regs)
+static int generic_machine_check_exception(struct pt_regs *regs)
 {
-}
-
-void machine_check_exception(struct pt_regs *regs)
-{
-        int recover = 0;
         unsigned long reason = get_mc_reason(regs);
 
-        /* See if any machine dependent calls */
-        if (ppc_md.machine_check_exception)
-                recover = ppc_md.machine_check_exception(regs);
-
-        if (recover)
-                return;
-
-        if (user_mode(regs)) {
-                regs->msr |= MSR_RI;
-                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
-                return;
-        }
-
-#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
-        /* the qspan pci read routines can cause machine checks -- Cort */
-        bad_page_fault(regs, regs->dar, SIGBUS);
-        return;
-#endif
-
-        if (debugger_fault_handler(regs)) {
-                regs->msr |= MSR_RI;
-                return;
-        }
-
-        if (check_io_access(regs))
-                return;
-
 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
         if (reason & ESR_IMCP) {
                 printk("Instruction");
@@ -480,11 +443,41 @@ void machine_check_exception(struct pt_regs *regs)
         }
 #endif /* CONFIG_4xx */
 
-        /*
-         * Optional platform-provided routine to print out
-         * additional info, e.g. bus error registers.
-         */
-        platform_machine_check(regs);
+        return 0;
+}
+
+void machine_check_exception(struct pt_regs *regs)
+{
+        int recover = 0;
+
+        /* See if any machine dependent calls */
+        if (ppc_md.machine_check_exception)
+                recover = ppc_md.machine_check_exception(regs);
+        else
+                recover = generic_machine_check_exception(regs);
+
+        if (recover)
+                return;
+
+        if (user_mode(regs)) {
+                regs->msr |= MSR_RI;
+                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
+                return;
+        }
+
+#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
+        /* the qspan pci read routines can cause machine checks -- Cort */
+        bad_page_fault(regs, regs->dar, SIGBUS);
+        return;
+#endif
+
+        if (debugger_fault_handler(regs)) {
+                regs->msr |= MSR_RI;
+                return;
+        }
+
+        if (check_io_access(regs))
+                return;
 
         if (debugger_fault_handler(regs))
                 return;
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 7afab5bcd61a..833a3d0bcfa7 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -206,11 +206,22 @@ static void udbg_44x_as1_putc(char c)
         }
 }
 
+static int udbg_44x_as1_getc(void)
+{
+        if (udbg_comport) {
+                while ((as1_readb(&udbg_comport->lsr) & LSR_DR) == 0)
+                        ; /* wait for char */
+                return as1_readb(&udbg_comport->rbr);
+        }
+        return -1;
+}
+
 void __init udbg_init_44x_as1(void)
 {
         udbg_comport =
                 (volatile struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
 
         udbg_putc = udbg_44x_as1_putc;
+        udbg_getc = udbg_44x_as1_getc;
 }
 #endif /* CONFIG_PPC_EARLY_DEBUG_44x */
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
index 3726358faae8..c3d57bd01a88 100644
--- a/arch/powerpc/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
@@ -9,11 +9,11 @@ ifeq ($(CONFIG_PPC32),y)
 CROSS32CC := $(CC)
 endif
 
-targets := $(obj-vdso32) vdso32.so
+targets := $(obj-vdso32) vdso32.so vdso32.so.dbg
 obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32))
 
 
-EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin
+EXTRA_CFLAGS := -shared -fno-common -fno-builtin
 EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
                 $(call ld-option, -Wl$(comma)--hash-style=sysv)
 EXTRA_AFLAGS := -D__VDSO32__ -s
@@ -26,9 +26,14 @@ CPPFLAGS_vdso32.lds += -P -C -Upowerpc
 $(obj)/vdso32_wrapper.o : $(obj)/vdso32.so
 
 # link rule for the .so file, .lds has to be first
-$(obj)/vdso32.so: $(src)/vdso32.lds $(obj-vdso32)
+$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32)
         $(call if_changed,vdso32ld)
 
+# strip rule for the .so file
+$(obj)/%.so: OBJCOPYFLAGS := -S
+$(obj)/%.so: $(obj)/%.so.dbg FORCE
+        $(call if_changed,objcopy)
+
 # assembly rules for the .S files
 $(obj-vdso32): %.o: %.S
         $(call if_changed_dep,vdso32as)
@@ -39,3 +44,12 @@ quiet_cmd_vdso32ld = VDSO32L $@
 quiet_cmd_vdso32as = VDSO32A $@
       cmd_vdso32as = $(CROSS32CC) $(a_flags) -c -o $@ $<
 
+# install commands for the unstripped file
+quiet_cmd_vdso_install = INSTALL $@
+      cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
+
+vdso32.so: $(obj)/vdso32.so.dbg
+        @mkdir -p $(MODLIB)/vdso
+        $(call cmd,vdso_install)
+
+vdso_install: vdso32.so
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
index 43af9b2a6f3b..fa7f1b8f3e50 100644
--- a/arch/powerpc/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
@@ -4,10 +4,10 @@ obj-vdso64 = sigtramp.o gettimeofday.o datapage.o cacheflush.o note.o
 
 # Build rules
 
-targets := $(obj-vdso64) vdso64.so
+targets := $(obj-vdso64) vdso64.so vdso64.so.dbg
 obj-vdso64 := $(addprefix $(obj)/, $(obj-vdso64))
 
-EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin
+EXTRA_CFLAGS := -shared -fno-common -fno-builtin
 EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
                 $(call ld-option, -Wl$(comma)--hash-style=sysv)
 EXTRA_AFLAGS := -D__VDSO64__ -s
@@ -20,9 +20,14 @@ CPPFLAGS_vdso64.lds += -P -C -U$(ARCH)
 $(obj)/vdso64_wrapper.o : $(obj)/vdso64.so
 
 # link rule for the .so file, .lds has to be first
-$(obj)/vdso64.so: $(src)/vdso64.lds $(obj-vdso64)
+$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64)
         $(call if_changed,vdso64ld)
 
+# strip rule for the .so file
+$(obj)/%.so: OBJCOPYFLAGS := -S
+$(obj)/%.so: $(obj)/%.so.dbg FORCE
+        $(call if_changed,objcopy)
+
 # assembly rules for the .S files
 $(obj-vdso64): %.o: %.S
         $(call if_changed_dep,vdso64as)
@@ -33,4 +38,12 @@ quiet_cmd_vdso64ld = VDSO64L $@
 quiet_cmd_vdso64as = VDSO64A $@
       cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
 
+# install commands for the unstripped file
+quiet_cmd_vdso_install = INSTALL $@
+      cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
+
+vdso64.so: $(obj)/vdso64.so.dbg
+        @mkdir -p $(MODLIB)/vdso
+        $(call cmd,vdso_install)
 
+vdso_install: vdso64.so
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 62c1bc12ea39..1d7b272b3737 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -39,6 +39,8 @@
 
 extern struct kset devices_subsys; /* needed for vio_find_name() */
 
+static struct bus_type vio_bus_type;
+
 static struct vio_dev vio_bus_device  = { /* fake "parent" device */
         .name = vio_bus_device.dev.bus_id,
         .type = "",
@@ -64,6 +66,12 @@ static void __init iommu_vio_init(void)
                 printk("Virtual Bus VETH TCE table failed.\n");
         if (!iommu_init_table(&vio_iommu_table, -1))
                 printk("Virtual Bus VIO TCE table failed.\n");
+        vio_bus_device.dev.archdata.dma_ops = &dma_iommu_ops;
+        vio_bus_device.dev.archdata.dma_data = &vio_iommu_table;
+}
+#else
+static void __init iommu_vio_init(void)
+{
 }
 #endif
 
@@ -282,14 +290,8 @@ static int __init vio_bus_init(void)
         int err;
         struct device_node *node_vroot;
 
-#ifdef CONFIG_PPC_ISERIES
-        if (firmware_has_feature(FW_FEATURE_ISERIES)) {
+        if (firmware_has_feature(FW_FEATURE_ISERIES))
                 iommu_vio_init();
-                vio_bus_device.dev.archdata.dma_ops = &dma_iommu_ops;
-                vio_bus_device.dev.archdata.dma_data = &vio_iommu_table;
-                iSeries_vio_dev = &vio_bus_device.dev;
-        }
-#endif /* CONFIG_PPC_ISERIES */
 
         err = bus_register(&vio_bus_type);
         if (err) {
@@ -317,11 +319,8 @@ static int __init vio_bus_init(void)
                  * the device tree. Drivers will associate with them later.
                  */
                 for (of_node = node_vroot->child; of_node != NULL;
-                                of_node = of_node->sibling) {
-                        printk(KERN_DEBUG "%s: processing %p\n",
-                                        __FUNCTION__, of_node);
+                                of_node = of_node->sibling)
                         vio_register_device_node(of_node);
-                }
                 of_node_put(node_vroot);
         }
 
@@ -391,7 +390,7 @@ static int vio_hotplug(struct device *dev, char **envp, int num_envp,
         return 0;
 }
 
-struct bus_type vio_bus_type = {
+static struct bus_type vio_bus_type = {
         .name = "vio",
         .dev_attrs = vio_dev_attrs,
         .uevent = vio_hotplug,
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 0c458556399f..823a8cbd60b5 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -34,6 +34,8 @@ SECTIONS
 
         /* Text and gots */
         .text : {
+                ALIGN_FUNCTION();
+                *(.text.head)
                 _text = .;
                 TEXT_TEXT
                 SCHED_TEXT
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 0a486d4b2547..65d492e316a6 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -7,11 +7,12 @@ EXTRA_CFLAGS		+= -mno-minimal-toc
 endif
 
 ifeq ($(CONFIG_PPC_MERGE),y)
-obj-y                   := string.o
-obj-$(CONFIG_PPC32)     += div64.o copy_32.o checksum_32.o
+obj-y                   := string.o alloc.o \
+                           checksum_$(CONFIG_WORD_SIZE).o
+obj-$(CONFIG_PPC32)     += div64.o copy_32.o
 endif
 
-obj-$(CONFIG_PPC64)     += checksum_64.o copypage_64.o copyuser_64.o \
+obj-$(CONFIG_PPC64)     += copypage_64.o copyuser_64.o \
                            memcpy_64.o usercopy_64.o mem_64.o string.o
 obj-$(CONFIG_QUICC_ENGINE) += rheap.o
 obj-$(CONFIG_XMON)      += sstep.o
diff --git a/arch/powerpc/lib/alloc.c b/arch/powerpc/lib/alloc.c
new file mode 100644
index 000000000000..f53e09c7dac7
--- /dev/null
+++ b/arch/powerpc/lib/alloc.c
@@ -0,0 +1,29 @@
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/bootmem.h>
+#include <linux/string.h>
+
+#include <asm/system.h>
+
+void * __init_refok alloc_maybe_bootmem(size_t size, gfp_t mask)
+{
+        if (mem_init_done)
+                return kmalloc(size, mask);
+        else
+                return alloc_bootmem(size);
+}
+
+void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
+{
+        void *p;
+
+        if (mem_init_done)
+                p = kzalloc(size, mask);
+        else {
+                p = alloc_bootmem(size);
+                if (p)
+                        memset(p, 0, size);
+        }
+        return p;
+}
diff --git a/arch/powerpc/mm/4xx_mmu.c b/arch/powerpc/mm/40x_mmu.c
index 7ff2609b64d1..e067df836be2 100644
--- a/arch/powerpc/mm/4xx_mmu.c
+++ b/arch/powerpc/mm/40x_mmu.c
@@ -108,7 +108,7 @@ unsigned long __init mmu_mapin_ram(void)
                 pmd_t *pmdp;
                 unsigned long val = p | _PMD_SIZE_16M | _PAGE_HWEXEC | _PAGE_HWWRITE;
 
-                pmdp = pmd_offset(pgd_offset_k(v), v);
+                pmdp = pmd_offset(pud_offset(pgd_offset_k(v), v), v);
                 pmd_val(*pmdp++) = val;
                 pmd_val(*pmdp++) = val;
                 pmd_val(*pmdp++) = val;
@@ -123,7 +123,7 @@ unsigned long __init mmu_mapin_ram(void)
                 pmd_t *pmdp;
                 unsigned long val = p | _PMD_SIZE_4M | _PAGE_HWEXEC | _PAGE_HWWRITE;
 
-                pmdp = pmd_offset(pgd_offset_k(v), v);
+                pmdp = pmd_offset(pud_offset(pgd_offset_k(v), v), v);
                 pmd_val(*pmdp) = val;
 
                 v += LARGE_PAGE_SIZE_4M;
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 7e4d27ad3dee..20629ae95c50 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,14 +6,17 @@ ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS    += -mno-minimal-toc
 endif
 
-obj-y                           := fault.o mem.o lmb.o
-obj-$(CONFIG_PPC32)             += init_32.o pgtable_32.o mmu_context_32.o
+obj-y                           := fault.o mem.o lmb.o \
+                                   init_$(CONFIG_WORD_SIZE).o \
+                                   pgtable_$(CONFIG_WORD_SIZE).o \
+                                   mmu_context_$(CONFIG_WORD_SIZE).o
 hash-$(CONFIG_PPC_NATIVE)       := hash_native_64.o
-obj-$(CONFIG_PPC64)             += init_64.o pgtable_64.o mmu_context_64.o \
-                                   hash_utils_64.o hash_low_64.o tlb_64.o \
+obj-$(CONFIG_PPC64)             += hash_utils_64.o \
                                    slb_low.o slb.o stab.o mmap.o $(hash-y)
-obj-$(CONFIG_PPC_STD_MMU_32)    += ppc_mmu_32.o hash_low_32.o tlb_32.o
-obj-$(CONFIG_40x)               += 4xx_mmu.o
+obj-$(CONFIG_PPC_STD_MMU_32)    += ppc_mmu_32.o
+obj-$(CONFIG_PPC_STD_MMU)       += hash_low_$(CONFIG_WORD_SIZE).o \
+                                   tlb_$(CONFIG_WORD_SIZE).o
+obj-$(CONFIG_40x)               += 40x_mmu.o
 obj-$(CONFIG_44x)               += 44x_mmu.o
 obj-$(CONFIG_FSL_BOOKE)         += fsl_booke_mmu.o
 obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index a47151e806ca..d525f2eba313 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -49,7 +49,6 @@
 #include <asm/tlb.h>
 #include <asm/cacheflush.h>
 #include <asm/cputable.h>
-#include <asm/abs_addr.h>
 #include <asm/sections.h>
 #include <asm/spu.h>
 
@@ -602,13 +601,7 @@ static void demote_segment_4k(struct mm_struct *mm, unsigned long addr)
 {
         if (mm->context.user_psize == MMU_PAGE_4K)
                 return;
-#ifdef CONFIG_PPC_MM_SLICES
         slice_set_user_psize(mm, MMU_PAGE_4K);
-#else /* CONFIG_PPC_MM_SLICES */
-        mm->context.user_psize = MMU_PAGE_4K;
-        mm->context.sllp = SLB_VSID_USER | mmu_psize_defs[MMU_PAGE_4K].sllp;
-#endif /* CONFIG_PPC_MM_SLICES */
-
 #ifdef CONFIG_SPU_BASE
         spu_flush_all_slbs(mm);
 #endif
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 4835f73af304..ba5f12a60467 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -22,11 +22,8 @@
 #include <asm/mmu_context.h>
 #include <asm/machdep.h>
 #include <asm/cputable.h>
-#include <asm/tlb.h>
 #include <asm/spu.h>
 
-#include <linux/sysctl.h>
-
 #define NUM_LOW_AREAS   (0x100000000UL >> SID_SHIFT)
 #define NUM_HIGH_AREAS  (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
 
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index e1f5ded851f6..27c234fb5118 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -41,7 +41,6 @@
 #include <asm/machdep.h>
 #include <asm/btext.h>
 #include <asm/tlb.h>
-#include <asm/prom.h>
 #include <asm/lmb.h>
 #include <asm/sections.h>
 
@@ -256,3 +255,40 @@ void free_initrd_mem(unsigned long start, unsigned long end)
         }
 }
 #endif
+
+#ifdef CONFIG_PROC_KCORE
+static struct kcore_list kcore_vmem;
+
+static int __init setup_kcore(void)
+{
+        int i;
+
+        for (i = 0; i < lmb.memory.cnt; i++) {
+                unsigned long base;
+                unsigned long size;
+                struct kcore_list *kcore_mem;
+
+                base = lmb.memory.region[i].base;
+                size = lmb.memory.region[i].size;
+
+                kcore_mem = kmalloc(sizeof(struct kcore_list), GFP_ATOMIC);
+                if (!kcore_mem)
+                        panic("%s: kmalloc failed\n", __FUNCTION__);
+
+                /* must stay under 32 bits */
+                if ( 0xfffffffful - (unsigned long)__va(base) < size) {
+                        size = 0xfffffffful - (unsigned long)(__va(base));
+                        printk(KERN_DEBUG "setup_kcore: restrict size=%lx\n",
+                                                size);
+                }
+
+                kclist_add(kcore_mem, __va(base), size);
+        }
+
+        kclist_add(&kcore_vmem, (void *)VMALLOC_START,
+                VMALLOC_END-VMALLOC_START);
+
+        return 0;
+}
+module_init(setup_kcore);
+#endif
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 9f27bb56a61d..fa90f6561b9f 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -113,6 +113,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
 }
 #endif
 
+#ifdef CONFIG_PROC_KCORE
 static struct kcore_list kcore_vmem;
 
 static int __init setup_kcore(void)
@@ -139,6 +140,7 @@ static int __init setup_kcore(void)
         return 0;
 }
 module_init(setup_kcore);
+#endif
 
 static void zero_ctor(void *addr, struct kmem_cache *cache, unsigned long flags)
 {
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index f0e7eedb1ba3..32dcfc9b0082 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -42,7 +42,6 @@
 #include <asm/machdep.h>
 #include <asm/btext.h>
 #include <asm/tlb.h>
-#include <asm/prom.h>
 #include <asm/lmb.h>
 #include <asm/sections.h>
 #include <asm/vdso.h>
diff --git a/arch/powerpc/mm/mmu_context_64.c b/arch/powerpc/mm/mmu_context_64.c
index 7a78cdc0515a..1db38ba1f544 100644
--- a/arch/powerpc/mm/mmu_context_64.c
+++ b/arch/powerpc/mm/mmu_context_64.c
@@ -28,7 +28,6 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
         int index;
         int err;
-        int new_context = (mm->context.id == 0);
 
 again:
         if (!idr_pre_get(&mmu_context_idr, GFP_KERNEL))
@@ -50,19 +49,13 @@ again:
                 return -ENOMEM;
         }
 
-        mm->context.id = index;
-#ifdef CONFIG_PPC_MM_SLICES
         /* The old code would re-promote on fork, we don't do that
          * when using slices as it could cause problem promoting slices
          * that have been forced down to 4K
          */
-        if (new_context)
+        if (slice_mm_new_context(mm))
                 slice_set_user_psize(mm, mmu_virtual_psize);
-#else
-        mm->context.user_psize = mmu_virtual_psize;
-        mm->context.sllp = SLB_VSID_USER |
-                mmu_psize_defs[mmu_virtual_psize].sllp;
-#endif
+        mm->context.id = index;
 
         return 0;
 }
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 3dfd10db931a..60fd52cd270f 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -228,5 +228,7 @@ void iounmap(volatile void __iomem *token)
 EXPORT_SYMBOL(ioremap);
 EXPORT_SYMBOL(ioremap_flags);
 EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(__ioremap_at);
 EXPORT_SYMBOL(iounmap);
 EXPORT_SYMBOL(__iounmap);
+EXPORT_SYMBOL(__iounmap_at);
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index ff1811ac6c81..4bee1cfa9dea 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -59,14 +59,12 @@ static inline void slb_shadow_update(unsigned long ea,
 {
         /*
          * Clear the ESID first so the entry is not valid while we are
-         * updating it.
+         * updating it.  No write barriers are needed here, provided
+         * we only update the current CPU's SLB shadow buffer.
          */
         get_slb_shadow()->save_area[entry].esid = 0;
-        smp_wmb();
         get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, flags);
-        smp_wmb();
         get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, entry);
-        smp_wmb();
 }
 
 static inline void slb_shadow_clear(unsigned long entry)
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index d5fd3909d13a..319826ef1645 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -551,6 +551,7 @@ EXPORT_SYMBOL_GPL(get_slice_psize);
  *
  * This is also called in init_new_context() to change back the user
  * psize from whatever the parent context had it set to
+ * N.B. This may be called before mm->context.id has been set.
  *
  * This function will only change the content of the {low,high)_slice_psize
  * masks, it will not flush SLBs as this shall be handled lazily by the
diff --git a/arch/powerpc/platforms/4xx/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index ded357c17414..c3dce3b3d524 100644
--- a/arch/powerpc/platforms/4xx/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -1,16 +1,3 @@
-config 4xx
-        bool
-        depends on 40x || 44x
-        default y
-
-config BOOKE
-        bool
-        depends on 44x
-        default y
-
-menu "AMCC 40x options"
-        depends on 40x
-
 #config BUBINGA
 #       bool "Bubinga"
 #       depends on 40x
@@ -66,13 +53,13 @@ menu "AMCC 40x options"
 #       help
 #         This option enables support for the IBM PPC405GPr evaluation board.
 
-#config WALNUT
-#       bool "Walnut"
-#       depends on 40x
-#       default y
-#       select 405GP
-#       help
-#         This option enables support for the IBM PPC405GP evaluation board.
+config WALNUT
+        bool "Walnut"
+        depends on 40x
+        default y
+        select 405GP
+        help
+          This option enables support for the IBM PPC405GP evaluation board.
 
 #config XILINX_ML300
 #       bool "Xilinx-ML300"
@@ -82,8 +69,6 @@ menu "AMCC 40x options"
 #       help
 #         This option enables support for the Xilinx ML300 evaluation board.
 
-endmenu
-
 # 40x specific CPU modules, selected based on the board above.
 config NP405H
         bool
@@ -126,68 +111,6 @@ config IBM405_ERR77
 config IBM405_ERR51
         bool
 
-menu "AMCC 44x options"
-        depends on 44x
-
-#config BAMBOO
-#       bool "Bamboo"
-#       depends on 44x
-#       default n
-#       select 440EP
-#       help
-#         This option enables support for the IBM PPC440EP evaluation board.
-
-config EBONY
-        bool "Ebony"
-        depends on 44x
-        default y
-        select 440GP
-        help
-          This option enables support for the IBM PPC440GP evaluation board.
-
-#config LUAN
-#       bool "Luan"
-#       depends on 44x
-#       default n
-#       select 440SP
-#       help
-#         This option enables support for the IBM PPC440SP evaluation board.
-
-#config OCOTEA
-#       bool "Ocotea"
-#       depends on 44x
-#       default n
-#       select 440GX
-#       help
-#         This option enables support for the IBM PPC440GX evaluation board.
-
-endmenu
-
-# 44x specific CPU modules, selected based on the board above.
-config 440EP
-        bool
-        select PPC_FPU
-        select IBM440EP_ERR42
-
-config 440GP
-        bool
-        select IBM_NEW_EMAC_ZMII
-
-config 440GX
-        bool
-
-config 440SP
-        bool
-
-config 440A
-        bool
-        depends on 440GX
-        default y
-
-# 44x errata/workaround config symbols, selected by the CPU models above
-config IBM440EP_ERR42
-        bool
-
 #config XILINX_OCP
 #       bool
 #       depends on XILINX_ML300
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
new file mode 100644
index 000000000000..e6c0bbd063a4
--- /dev/null
+++ b/arch/powerpc/platforms/40x/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WALNUT) += walnut.o
diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c
new file mode 100644
index 000000000000..c17fdf23b492
--- /dev/null
+++ b/arch/powerpc/platforms/40x/walnut.c
@@ -0,0 +1,68 @@
+/*
+ * Architecture- / platform-specific boot-time initialization code for
+ * IBM PowerPC 4xx based boards. Adapted from original
+ * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
+ * <dan@net4x.com>.
+ *
+ * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Copyright 2007 IBM Corporation
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * 2002 (c) MontaVista, Software, Inc.  This file is licensed under
+ * the terms of the GNU General Public License version 2.  This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/init.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/of_platform.h>
+
+static struct of_device_id walnut_of_bus[] = {
+        { .compatible = "ibm,plb3", },
+        { .compatible = "ibm,opb", },
+        { .compatible = "ibm,ebc", },
+        {},
+};
+
+static int __init walnut_device_probe(void)
+{
+        if (!machine_is(walnut))
+                return 0;
+
+        /* FIXME: do bus probe here */
+        of_platform_bus_probe(NULL, walnut_of_bus, NULL);
+
+        return 0;
+}
+device_initcall(walnut_device_probe);
+
+static int __init walnut_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (!of_flat_dt_is_compatible(root, "ibm,walnut"))
+                return 0;
+
+        return 1;
+}
+
+static void __init walnut_setup_arch(void)
+{
+}
+
+define_machine(walnut) {
+        .name                   = "Walnut",
+        .probe                  = walnut_probe,
+        .setup_arch             = walnut_setup_arch,
+        .progress               = udbg_progress,
+        .init_IRQ               = uic_init_tree,
+        .get_irq                = uic_get_irq,
+        .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 1b3e008fd148..f28acdcbd6c9 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -1,10 +1,10 @@
-#config BAMBOO
-#       bool "Bamboo"
-#       depends on 44x
-#       default n
-#       select 440EP
-#       help
-#         This option enables support for the IBM PPC440EP evaluation board.
+config BAMBOO
+        bool "Bamboo"
+        depends on 44x
+        default n
+        select 440EP
+        help
+          This option enables support for the IBM PPC440EP evaluation board.
 
 config EBONY
         bool "Ebony"
@@ -14,6 +14,14 @@ config EBONY
         help
           This option enables support for the IBM PPC440GP evaluation board.
 
+config SEQUOIA
+        bool "Sequoia"
+        depends on 44x
+        default n
+        select 440EPX
+        help
+          This option enables support for the AMCC PPC440EPX evaluation board.
+
 #config LUAN
 #       bool "Luan"
 #       depends on 44x
@@ -35,6 +43,14 @@ config 440EP
         bool
         select PPC_FPU
         select IBM440EP_ERR42
+#       select IBM_NEW_EMAC_ZMII
+
+config 440EPX
+        bool
+        select PPC_FPU
+# Disabled until the new EMAC Driver is merged.
+#       select IBM_NEW_EMAC_EMAC4
+#       select IBM_NEW_EMAC_ZMII
 
 config 440GP
         bool
@@ -49,7 +65,7 @@ config 440SP
 
 config 440A
         bool
-        depends on 440GX
+        depends on 440GX || 440EPX
         default y
 
 # 44x errata/workaround config symbols, selected by the CPU models above
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 41d0a18a0e44..10ce6740cc7d 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,2 +1,4 @@
 obj-$(CONFIG_44x)       := misc_44x.o
 obj-$(CONFIG_EBONY)     += ebony.o
+obj-$(CONFIG_BAMBOO) += bamboo.o
+obj-$(CONFIG_SEQUOIA)   += sequoia.o
diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c
new file mode 100644
index 000000000000..9bc45dea078f
--- /dev/null
+++ b/arch/powerpc/platforms/44x/bamboo.c
@@ -0,0 +1,66 @@
+/*
+ * Bamboo board specific routines
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright 2004 MontaVista Software Inc.
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/of_platform.h>
+#include "44x.h"
+
+static struct of_device_id bamboo_of_bus[] = {
+        { .compatible = "ibm,plb4", },
+        { .compatible = "ibm,opb", },
+        { .compatible = "ibm,ebc", },
+        {},
+};
+
+static int __init bamboo_device_probe(void)
+{
+        if (!machine_is(bamboo))
+                return 0;
+
+        of_platform_bus_probe(NULL, bamboo_of_bus, NULL);
+
+        return 0;
+}
+device_initcall(bamboo_device_probe);
+
+static int __init bamboo_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (!of_flat_dt_is_compatible(root, "amcc,bamboo"))
+                return 0;
+
+        return 1;
+}
+
+static void __init bamboo_setup_arch(void)
+{
+}
+
+define_machine(bamboo) {
+        .name                           = "Bamboo",
+        .probe                          = bamboo_probe,
+        .setup_arch             = bamboo_setup_arch,
+        .progress                       = udbg_progress,
+        .init_IRQ                       = uic_init_tree,
+        .get_irq                        = uic_get_irq,
+        .restart                        = ppc44x_reset_system,
+        .calibrate_decr         = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c
new file mode 100644
index 000000000000..7d0d9d567d25
--- /dev/null
+++ b/arch/powerpc/platforms/44x/sequoia.c
@@ -0,0 +1,66 @@
+/*
+ * Sequoia board specific routines
+ *
+ * Valentine Barshak <vbarshak@ru.mvista.com>
+ * Copyright 2007 MontaVista Software Inc.
+ *
+ * Based on the Bamboo code by
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/of_platform.h>
+#include "44x.h"
+
+static struct of_device_id sequoia_of_bus[] = {
+        { .compatible = "ibm,plb4", },
+        { .compatible = "ibm,opb", },
+        { .compatible = "ibm,ebc", },
+        {},
+};
+
+static int __init sequoia_device_probe(void)
+{
+        if (!machine_is(sequoia))
+                return 0;
+
+        of_platform_bus_probe(NULL, sequoia_of_bus, NULL);
+
+        return 0;
+}
+device_initcall(sequoia_device_probe);
+
+static int __init sequoia_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (!of_flat_dt_is_compatible(root, "amcc,sequoia"))
+                return 0;
+
+        return 1;
+}
+
+static void __init sequoia_setup_arch(void)
+{
+}
+
+define_machine(sequoia) {
+        .name                           = "Sequoia",
+        .probe                          = sequoia_probe,
+        .setup_arch                     = sequoia_setup_arch,
+        .progress                       = udbg_progress,
+        .init_IRQ                       = uic_init_tree,
+        .get_irq                        = uic_get_irq,
+        .restart                        = ppc44x_reset_system,
+        .calibrate_decr                 = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/4xx/Makefile b/arch/powerpc/platforms/4xx/Makefile
deleted file mode 100644
index 79ff6b1e887c..000000000000
--- a/arch/powerpc/platforms/4xx/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-# empty makefile so make clean works
\ No newline at end of file
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 3ffaa066c2c8..2938d4927b83 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,6 +1,7 @@
 config PPC_MPC52xx
         bool
         select FSL_SOC
+        select PPC_CLOCK
         default n
 
 config PPC_MPC5200
@@ -30,6 +31,7 @@ config PPC_EFIKA
 config PPC_LITE5200
         bool "Freescale Lite5200 Eval Board"
         depends on PPC_MULTIPLATFORM && PPC32
+        select WANT_DEVICE_TREE
         select PPC_MPC5200
         default n
 
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
index b91e39c84d46..307dbc178091 100644
--- a/arch/powerpc/platforms/52xx/Makefile
+++ b/arch/powerpc/platforms/52xx/Makefile
@@ -10,3 +10,6 @@ obj-$(CONFIG_PPC_EFIKA)		+= efika.o
 obj-$(CONFIG_PPC_LITE5200)      += lite5200.o
 
 obj-$(CONFIG_PM)                += mpc52xx_sleep.o mpc52xx_pm.o
+ifeq ($(CONFIG_PPC_LITE5200),y)
+        obj-$(CONFIG_PM)        += lite5200_sleep.o lite5200_pm.o
+endif
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 4be6e7a17b66..4263158b3274 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -78,8 +78,8 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
 }
 
 static struct pci_ops rtas_pci_ops = {
-        rtas_read_config,
-        rtas_write_config
+        .read = rtas_read_config,
+        .write = rtas_write_config,
 };
 
 
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c
index 5c46e898fd45..e11d27f9c4f0 100644
--- a/arch/powerpc/platforms/52xx/lite5200.c
+++ b/arch/powerpc/platforms/52xx/lite5200.c
@@ -35,7 +35,6 @@
 #include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/ipic.h>
-#include <asm/bootinfo.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
 #include <asm/udbg.h>
@@ -86,7 +85,6 @@ error:
 }
 
 #ifdef CONFIG_PM
-static u32 descr_a;
 static void lite5200_suspend_prepare(void __iomem *mbar)
 {
         u8 pin = 1;     /* GPIO_WKUP_1 (GPIO_PSC2_4) */
@@ -97,34 +95,30 @@ static void lite5200_suspend_prepare(void __iomem *mbar)
          * power down usb port
          * this needs to be called before of-ohci suspend code
          */
-        descr_a = in_be32(mbar + 0x1048);
-        out_be32(mbar + 0x1048, (descr_a & ~0x200) | 0x100);
+
+        /* set ports to "power switched" and "powered at the same time"
+         * USB Rh descriptor A: NPS = 0, PSM = 0 */
+        out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300);
+        /* USB Rh status: LPS = 1 - turn off power */
+        out_be32(mbar + 0x1050, 0x00000001);
 }
 
 static void lite5200_resume_finish(void __iomem *mbar)
 {
-        out_be32(mbar + 0x1048, descr_a);
+        /* USB Rh status: LPSC = 1 - turn on power */
+        out_be32(mbar + 0x1050, 0x00010000);
 }
 #endif
 
 static void __init lite5200_setup_arch(void)
 {
+#ifdef CONFIG_PCI
         struct device_node *np;
+#endif
 
         if (ppc_md.progress)
                 ppc_md.progress("lite5200_setup_arch()", 0);
 
-        np = of_find_node_by_type(NULL, "cpu");
-        if (np) {
-                const unsigned int *fp =
-                        of_get_property(np, "clock-frequency", NULL);
-                if (fp != 0)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(np);
-        }
-
         /* CPU & Port mux setup */
         mpc52xx_setup_cpu();    /* Generic */
         lite5200_setup_cpu();   /* Platorm specific */
@@ -132,7 +126,7 @@ static void __init lite5200_setup_arch(void)
 #ifdef CONFIG_PM
         mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
         mpc52xx_suspend.board_resume_finish = lite5200_resume_finish;
-        mpc52xx_pm_init();
+        lite5200_pm_init();
 #endif
 
 #ifdef CONFIG_PCI
diff --git a/arch/powerpc/platforms/52xx/lite5200_pm.c b/arch/powerpc/platforms/52xx/lite5200_pm.c
new file mode 100644
index 000000000000..f26afcd41757
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -0,0 +1,213 @@
+#include <linux/init.h>
+#include <linux/pm.h>
+#include <asm/io.h>
+#include <asm/time.h>
+#include <asm/mpc52xx.h>
+#include "mpc52xx_pic.h"
+
+/* defined in lite5200_sleep.S and only used here */
+extern void lite5200_low_power(void __iomem *sram, void __iomem *mbar);
+
+static struct mpc52xx_cdm __iomem *cdm;
+static struct mpc52xx_intr __iomem *pic;
+static struct mpc52xx_sdma __iomem *bes;
+static struct mpc52xx_xlb __iomem *xlb;
+static struct mpc52xx_gpio __iomem *gps;
+static struct mpc52xx_gpio_wkup __iomem *gpw;
+static void __iomem *sram;
+static const int sram_size = 0x4000;    /* 16 kBytes */
+static void __iomem *mbar;
+
+static int lite5200_pm_valid(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_STANDBY:
+        case PM_SUSPEND_MEM:
+                return 1;
+        default:
+                return 0;
+        }
+}
+
+static int lite5200_pm_prepare(suspend_state_t state)
+{
+        /* deep sleep? let mpc52xx code handle that */
+        if (state == PM_SUSPEND_STANDBY)
+                return mpc52xx_pm_prepare(state);
+
+        if (state != PM_SUSPEND_MEM)
+                return -EINVAL;
+
+        /* map registers */
+        mbar = mpc52xx_find_and_map("mpc5200");
+        if (!mbar) {
+                printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, __LINE__);
+                return -ENOSYS;
+        }
+
+        cdm = mbar + 0x200;
+        pic = mbar + 0x500;
+        gps = mbar + 0xb00;
+        gpw = mbar + 0xc00;
+        bes = mbar + 0x1200;
+        xlb = mbar + 0x1f00;
+        sram = mbar + 0x8000;
+
+        return 0;
+}
+
+/* save and restore registers not bound to any real devices */
+static struct mpc52xx_cdm scdm;
+static struct mpc52xx_intr spic;
+static struct mpc52xx_sdma sbes;
+static struct mpc52xx_xlb sxlb;
+static struct mpc52xx_gpio sgps;
+static struct mpc52xx_gpio_wkup sgpw;
+
+static void lite5200_save_regs(void)
+{
+        _memcpy_fromio(&spic, pic, sizeof(*pic));
+        _memcpy_fromio(&sbes, bes, sizeof(*bes));
+        _memcpy_fromio(&scdm, cdm, sizeof(*cdm));
+        _memcpy_fromio(&sxlb, xlb, sizeof(*xlb));
+        _memcpy_fromio(&sgps, gps, sizeof(*gps));
+        _memcpy_fromio(&sgpw, gpw, sizeof(*gpw));
+
+        _memcpy_fromio(saved_sram, sram, sram_size);
+}
+
+static void lite5200_restore_regs(void)
+{
+        int i;
+        _memcpy_toio(sram, saved_sram, sram_size);
+
+
+        /*
+         * GPIOs. Interrupt Master Enable has higher address then other
+         * registers, so just memcpy is ok.
+         */
+        _memcpy_toio(gpw, &sgpw, sizeof(*gpw));
+        _memcpy_toio(gps, &sgps, sizeof(*gps));
+
+
+        /* XLB Arbitrer */
+        out_be32(&xlb->snoop_window, sxlb.snoop_window);
+        out_be32(&xlb->master_priority, sxlb.master_priority);
+        out_be32(&xlb->master_pri_enable, sxlb.master_pri_enable);
+
+        /* enable */
+        out_be32(&xlb->int_enable, sxlb.int_enable);
+        out_be32(&xlb->config, sxlb.config);
+
+
+        /* CDM - Clock Distribution Module */
+        out_8(&cdm->ipb_clk_sel, scdm.ipb_clk_sel);
+        out_8(&cdm->pci_clk_sel, scdm.pci_clk_sel);
+
+        out_8(&cdm->ext_48mhz_en, scdm.ext_48mhz_en);
+        out_8(&cdm->fd_enable, scdm.fd_enable);
+        out_be16(&cdm->fd_counters, scdm.fd_counters);
+
+        out_be32(&cdm->clk_enables, scdm.clk_enables);
+
+        out_8(&cdm->osc_disable, scdm.osc_disable);
+
+        out_be16(&cdm->mclken_div_psc1, scdm.mclken_div_psc1);
+        out_be16(&cdm->mclken_div_psc2, scdm.mclken_div_psc2);
+        out_be16(&cdm->mclken_div_psc3, scdm.mclken_div_psc3);
+        out_be16(&cdm->mclken_div_psc6, scdm.mclken_div_psc6);
+
+
+        /* BESTCOMM */
+        out_be32(&bes->taskBar, sbes.taskBar);
+        out_be32(&bes->currentPointer, sbes.currentPointer);
+        out_be32(&bes->endPointer, sbes.endPointer);
+        out_be32(&bes->variablePointer, sbes.variablePointer);
+
+        out_8(&bes->IntVect1, sbes.IntVect1);
+        out_8(&bes->IntVect2, sbes.IntVect2);
+        out_be16(&bes->PtdCntrl, sbes.PtdCntrl);
+
+        for (i=0; i<32; i++)
+                out_8(&bes->ipr[i], sbes.ipr[i]);
+
+        out_be32(&bes->cReqSelect, sbes.cReqSelect);
+        out_be32(&bes->task_size0, sbes.task_size0);
+        out_be32(&bes->task_size1, sbes.task_size1);
+        out_be32(&bes->MDEDebug, sbes.MDEDebug);
+        out_be32(&bes->ADSDebug, sbes.ADSDebug);
+        out_be32(&bes->Value1, sbes.Value1);
+        out_be32(&bes->Value2, sbes.Value2);
+        out_be32(&bes->Control, sbes.Control);
+        out_be32(&bes->Status, sbes.Status);
+        out_be32(&bes->PTDDebug, sbes.PTDDebug);
+
+        /* restore tasks */
+        for (i=0; i<16; i++)
+                out_be16(&bes->tcr[i], sbes.tcr[i]);
+
+        /* enable interrupts */
+        out_be32(&bes->IntPend, sbes.IntPend);
+        out_be32(&bes->IntMask, sbes.IntMask);
+
+
+        /* PIC */
+        out_be32(&pic->per_pri1, spic.per_pri1);
+        out_be32(&pic->per_pri2, spic.per_pri2);
+        out_be32(&pic->per_pri3, spic.per_pri3);
+
+        out_be32(&pic->main_pri1, spic.main_pri1);
+        out_be32(&pic->main_pri2, spic.main_pri2);
+
+        out_be32(&pic->enc_status, spic.enc_status);
+
+        /* unmask and enable interrupts */
+        out_be32(&pic->per_mask, spic.per_mask);
+        out_be32(&pic->main_mask, spic.main_mask);
+        out_be32(&pic->ctrl, spic.ctrl);
+}
+
+static int lite5200_pm_enter(suspend_state_t state)
+{
+        /* deep sleep? let mpc52xx code handle that */
+        if (state == PM_SUSPEND_STANDBY) {
+                return mpc52xx_pm_enter(state);
+        }
+
+        lite5200_save_regs();
+
+        /* effectively save FP regs */
+        enable_kernel_fp();
+
+        lite5200_low_power(sram, mbar);
+
+        lite5200_restore_regs();
+
+        /* restart jiffies */
+        wakeup_decrementer();
+
+        iounmap(mbar);
+        return 0;
+}
+
+static int lite5200_pm_finish(suspend_state_t state)
+{
+        /* deep sleep? let mpc52xx code handle that */
+        if (state == PM_SUSPEND_STANDBY) {
+                return mpc52xx_pm_finish(state);
+        }
+        return 0;
+}
+
+static struct pm_ops lite5200_pm_ops = {
+        .valid          = lite5200_pm_valid,
+        .prepare        = lite5200_pm_prepare,
+        .enter          = lite5200_pm_enter,
+        .finish         = lite5200_pm_finish,
+};
+
+int __init lite5200_pm_init(void)
+{
+        pm_set_ops(&lite5200_pm_ops);
+        return 0;
+}
diff --git a/arch/powerpc/platforms/52xx/lite5200_sleep.S b/arch/powerpc/platforms/52xx/lite5200_sleep.S
new file mode 100644
index 000000000000..08ab6fefcf7a
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/lite5200_sleep.S
@@ -0,0 +1,412 @@
+#include <asm/reg.h>
+#include <asm/ppc_asm.h>
+#include <asm/processor.h>
+#include <asm/cache.h>
+
+
+#define SDRAM_CTRL      0x104
+#define SC_MODE_EN      (1<<31)
+#define SC_CKE          (1<<30)
+#define SC_REF_EN       (1<<28)
+#define SC_SOFT_PRE     (1<<1)
+
+#define GPIOW_GPIOE     0xc00
+#define GPIOW_DDR       0xc08
+#define GPIOW_DVO       0xc0c
+
+#define CDM_CE          0x214
+#define CDM_SDRAM       (1<<3)
+
+
+/* helpers... beware: r10 and r4 are overwritten */
+#define SAVE_SPRN(reg, addr)            \
+        mfspr   r10, SPRN_##reg;        \
+        stw     r10, ((addr)*4)(r4);
+
+#define LOAD_SPRN(reg, addr)            \
+        lwz     r10, ((addr)*4)(r4);    \
+        mtspr   SPRN_##reg, r10;        \
+        sync;                           \
+        isync;
+
+
+        .data
+registers:
+        .space 0x5c*4
+        .text
+
+/* ---------------------------------------------------------------------- */
+/* low-power mode with help of M68HLC908QT1 */
+
+        .globl lite5200_low_power
+lite5200_low_power:
+
+        mr      r7, r3  /* save SRAM va */
+        mr      r8, r4  /* save MBAR va */
+
+        /* setup wakeup address for u-boot at physical location 0x0 */
+        lis     r3, CONFIG_KERNEL_START@h
+        lis     r4, lite5200_wakeup@h
+        ori     r4, r4, lite5200_wakeup@l
+        sub     r4, r4, r3
+        stw     r4, 0(r3)
+
+
+        /*
+         * save stuff BDI overwrites
+         * 0xf0 (0xe0->0x100 gets overwritten when BDI connected;
+         *   even when CONFIG_BDI* is disabled and MMU XLAT commented; heisenbug?))
+         * WARNING: self-refresh doesn't seem to work when BDI2000 is connected,
+         *   possibly because BDI sets SDRAM registers before wakeup code does
+         */
+        lis     r4, registers@h
+        ori     r4, r4, registers@l
+        lwz     r10, 0xf0(r3)
+        stw     r10, (0x1d*4)(r4)
+
+        /* save registers to r4 [destroys r10] */
+        SAVE_SPRN(LR, 0x1c)
+        bl      save_regs
+
+        /* flush caches [destroys r3, r4] */
+        bl      flush_data_cache
+
+
+        /* copy code to sram */
+        mr      r4, r7
+        li      r3, (sram_code_end - sram_code)/4
+        mtctr   r3
+        lis     r3, sram_code@h
+        ori     r3, r3, sram_code@l
+1:
+        lwz     r5, 0(r3)
+        stw     r5, 0(r4)
+        addi    r3, r3, 4
+        addi    r4, r4, 4
+        bdnz    1b
+
+        /* get tb_ticks_per_usec */
+        lis     r3, tb_ticks_per_usec@h
+        lwz     r11, tb_ticks_per_usec@l(r3)
+
+        /* disable I and D caches */
+        mfspr   r3, SPRN_HID0
+        ori     r3, r3, HID0_ICE | HID0_DCE
+        xori    r3, r3, HID0_ICE | HID0_DCE
+        sync; isync;
+        mtspr   SPRN_HID0, r3
+        sync; isync;
+
+        /* jump to sram */
+        mtlr    r7
+        blrl
+        /* doesn't return */
+
+
+sram_code:
+        /* self refresh */
+        lwz     r4, SDRAM_CTRL(r8)
+
+        /* send NOP (precharge) */
+        oris    r4, r4, SC_MODE_EN@h    /* mode_en */
+        stw     r4, SDRAM_CTRL(r8)
+        sync
+
+        ori     r4, r4, SC_SOFT_PRE     /* soft_pre */
+        stw     r4, SDRAM_CTRL(r8)
+        sync
+        xori    r4, r4, SC_SOFT_PRE
+
+        xoris   r4, r4, SC_MODE_EN@h    /* !mode_en */
+        stw     r4, SDRAM_CTRL(r8)
+        sync
+
+        /* delay (for NOP to finish) */
+        li      r12, 1
+        bl      udelay
+
+        /*
+         * mode_en must not be set when enabling self-refresh
+         * send AR with CKE low (self-refresh)
+         */
+        oris    r4, r4, (SC_REF_EN | SC_CKE)@h
+        xoris   r4, r4, (SC_CKE)@h      /* ref_en !cke */
+        stw     r4, SDRAM_CTRL(r8)
+        sync
+
+        /* delay (after !CKE there should be two cycles) */
+        li      r12, 1
+        bl      udelay
+
+        /* disable clock */
+        lwz     r4, CDM_CE(r8)
+        ori     r4, r4, CDM_SDRAM
+        xori    r4, r4, CDM_SDRAM
+        stw     r4, CDM_CE(r8)
+        sync
+
+        /* delay a bit */
+        li      r12, 1
+        bl      udelay
+
+
+        /* turn off with QT chip */
+        li      r4, 0x02
+        stb     r4, GPIOW_GPIOE(r8)     /* enable gpio_wkup1 */
+        sync
+
+        stb     r4, GPIOW_DVO(r8)       /* "output" high */
+        sync
+        stb     r4, GPIOW_DDR(r8)       /* output */
+        sync
+        stb     r4, GPIOW_DVO(r8)       /* output high */
+        sync
+
+        /* 10uS delay */
+        li      r12, 10
+        bl      udelay
+
+        /* turn off */
+        li      r4, 0
+        stb     r4, GPIOW_DVO(r8)       /* output low */
+        sync
+
+        /* wait until we're offline */
+  1:
+        b       1b
+
+
+        /* local udelay in sram is needed */
+  udelay: /* r11 - tb_ticks_per_usec, r12 - usecs, overwrites r13 */
+        mullw   r12, r12, r11
+        mftb    r13     /* start */
+        addi    r12, r13, r12 /* end */
+    1:
+        mftb    r13     /* current */
+        cmp     cr0, r13, r12
+        blt     1b
+        blr
+
+sram_code_end:
+
+
+
+/* uboot jumps here on resume */
+lite5200_wakeup:
+        bl      restore_regs
+
+
+        /* HIDs, MSR */
+        LOAD_SPRN(HID1, 0x19)
+        LOAD_SPRN(HID2, 0x1a)
+
+
+        /* address translation is tricky (see turn_on_mmu) */
+        mfmsr   r10
+        ori     r10, r10, MSR_DR | MSR_IR
+
+
+        mtspr   SPRN_SRR1, r10
+        lis     r10, mmu_on@h
+        ori     r10, r10, mmu_on@l
+        mtspr   SPRN_SRR0, r10
+        sync
+        rfi
+mmu_on:
+        /* kernel offset (r4 is still set from restore_registers) */
+        addis   r4, r4, CONFIG_KERNEL_START@h
+
+
+        /* restore MSR */
+        lwz     r10, (4*0x1b)(r4)
+        mtmsr   r10
+        sync; isync;
+
+        /* invalidate caches */
+        mfspr   r10, SPRN_HID0
+        ori     r5, r10, HID0_ICFI | HID0_DCI
+        mtspr   SPRN_HID0, r5   /* invalidate caches */
+        sync; isync;
+        mtspr   SPRN_HID0, r10
+        sync; isync;
+
+        /* enable caches */
+        lwz     r10, (4*0x18)(r4)
+        mtspr   SPRN_HID0, r10  /* restore (enable caches, DPM) */
+        /* ^ this has to be after address translation set in MSR */
+        sync
+        isync
+
+
+        /* restore 0xf0 (BDI2000) */
+        lis     r3, CONFIG_KERNEL_START@h
+        lwz     r10, (0x1d*4)(r4)
+        stw     r10, 0xf0(r3)
+
+        LOAD_SPRN(LR, 0x1c)
+
+
+        blr
+
+
+/* ---------------------------------------------------------------------- */
+/* boring code: helpers */
+
+/* save registers */
+#define SAVE_BAT(n, addr)               \
+        SAVE_SPRN(DBAT##n##L, addr);    \
+        SAVE_SPRN(DBAT##n##U, addr+1);  \
+        SAVE_SPRN(IBAT##n##L, addr+2);  \
+        SAVE_SPRN(IBAT##n##U, addr+3);
+
+#define SAVE_SR(n, addr)                \
+        mfsr    r10, n;                 \
+        stw     r10, ((addr)*4)(r4);
+
+#define SAVE_4SR(n, addr)       \
+        SAVE_SR(n, addr);       \
+        SAVE_SR(n+1, addr+1);   \
+        SAVE_SR(n+2, addr+2);   \
+        SAVE_SR(n+3, addr+3);
+
+save_regs:
+        stw     r0, 0(r4)
+        stw     r1, 0x4(r4)
+        stw     r2, 0x8(r4)
+        stmw    r11, 0xc(r4) /* 0xc -> 0x5f, (0x18*4-1) */
+
+        SAVE_SPRN(HID0, 0x18)
+        SAVE_SPRN(HID1, 0x19)
+        SAVE_SPRN(HID2, 0x1a)
+        mfmsr   r10
+        stw     r10, (4*0x1b)(r4)
+        /*SAVE_SPRN(LR, 0x1c) have to save it before the call */
+        /* 0x1d reserved by 0xf0 */
+        SAVE_SPRN(RPA,   0x1e)
+        SAVE_SPRN(SDR1,  0x1f)
+
+        /* save MMU regs */
+        SAVE_BAT(0, 0x20)
+        SAVE_BAT(1, 0x24)
+        SAVE_BAT(2, 0x28)
+        SAVE_BAT(3, 0x2c)
+        SAVE_BAT(4, 0x30)
+        SAVE_BAT(5, 0x34)
+        SAVE_BAT(6, 0x38)
+        SAVE_BAT(7, 0x3c)
+
+        SAVE_4SR(0, 0x40)
+        SAVE_4SR(4, 0x44)
+        SAVE_4SR(8, 0x48)
+        SAVE_4SR(12, 0x4c)
+
+        SAVE_SPRN(SPRG0, 0x50)
+        SAVE_SPRN(SPRG1, 0x51)
+        SAVE_SPRN(SPRG2, 0x52)
+        SAVE_SPRN(SPRG3, 0x53)
+        SAVE_SPRN(SPRG4, 0x54)
+        SAVE_SPRN(SPRG5, 0x55)
+        SAVE_SPRN(SPRG6, 0x56)
+        SAVE_SPRN(SPRG7, 0x57)
+
+        SAVE_SPRN(IABR,  0x58)
+        SAVE_SPRN(DABR,  0x59)
+        SAVE_SPRN(TBRL,  0x5a)
+        SAVE_SPRN(TBRU,  0x5b)
+
+        blr
+
+
+/* restore registers */
+#define LOAD_BAT(n, addr)               \
+        LOAD_SPRN(DBAT##n##L, addr);    \
+        LOAD_SPRN(DBAT##n##U, addr+1);  \
+        LOAD_SPRN(IBAT##n##L, addr+2);  \
+        LOAD_SPRN(IBAT##n##U, addr+3);
+
+#define LOAD_SR(n, addr)                \
+        lwz     r10, ((addr)*4)(r4);    \
+        mtsr    n, r10;
+
+#define LOAD_4SR(n, addr)       \
+        LOAD_SR(n, addr);       \
+        LOAD_SR(n+1, addr+1);   \
+        LOAD_SR(n+2, addr+2);   \
+        LOAD_SR(n+3, addr+3);
+
+restore_regs:
+        lis     r4, registers@h
+        ori     r4, r4, registers@l
+
+        /* MMU is not up yet */
+        subis   r4, r4, CONFIG_KERNEL_START@h
+
+        lwz     r0, 0(r4)
+        lwz     r1, 0x4(r4)
+        lwz     r2, 0x8(r4)
+        lmw     r11, 0xc(r4)
+
+        /*
+         * these are a bit tricky
+         *
+         * 0x18 - HID0
+         * 0x19 - HID1
+         * 0x1a - HID2
+         * 0x1b - MSR
+         * 0x1c - LR
+         * 0x1d - reserved by 0xf0 (BDI2000)
+         */
+        LOAD_SPRN(RPA,   0x1e);
+        LOAD_SPRN(SDR1,  0x1f);
+
+        /* restore MMU regs */
+        LOAD_BAT(0, 0x20)
+        LOAD_BAT(1, 0x24)
+        LOAD_BAT(2, 0x28)
+        LOAD_BAT(3, 0x2c)
+        LOAD_BAT(4, 0x30)
+        LOAD_BAT(5, 0x34)
+        LOAD_BAT(6, 0x38)
+        LOAD_BAT(7, 0x3c)
+
+        LOAD_4SR(0, 0x40)
+        LOAD_4SR(4, 0x44)
+        LOAD_4SR(8, 0x48)
+        LOAD_4SR(12, 0x4c)
+
+        /* rest of regs */
+        LOAD_SPRN(SPRG0, 0x50);
+        LOAD_SPRN(SPRG1, 0x51);
+        LOAD_SPRN(SPRG2, 0x52);
+        LOAD_SPRN(SPRG3, 0x53);
+        LOAD_SPRN(SPRG4, 0x54);
+        LOAD_SPRN(SPRG5, 0x55);
+        LOAD_SPRN(SPRG6, 0x56);
+        LOAD_SPRN(SPRG7, 0x57);
+
+        LOAD_SPRN(IABR,  0x58);
+        LOAD_SPRN(DABR,  0x59);
+        LOAD_SPRN(TBWL,  0x5a); /* these two have separate R/W regs */
+        LOAD_SPRN(TBWU,  0x5b);
+
+        blr
+
+
+
+/* cache flushing code. copied from arch/ppc/boot/util.S */
+#define NUM_CACHE_LINES (128*8)
+
+/*
+ * Flush data cache
+ * Do this by just reading lots of stuff into the cache.
+ */
+flush_data_cache:
+        lis     r3,CONFIG_KERNEL_START@h
+        ori     r3,r3,CONFIG_KERNEL_START@l
+        li      r4,NUM_CACHE_LINES
+        mtctr   r4
+1:
+        lwz     r4,0(r3)
+        addi    r3,r3,L1_CACHE_BYTES    /* Next line, please */
+        bdnz    1b
+        blr
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index fbfff95b4437..0f4ca8a2b777 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -22,7 +22,6 @@
 #include <linux/init.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
-#include <linux/stddef.h>
 #include <linux/delay.h>
 #include <linux/irq.h>
 #include <linux/hardirq.h>
@@ -242,12 +241,6 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
  * irq_host
 */
 
-static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node)
-{
-        pr_debug("%s: node=%p\n", __func__, node);
-        return mpc52xx_irqhost->host_data == node;
-}
-
 static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
                                  u32 * intspec, unsigned int intsize,
                                  irq_hw_number_t * out_hwirq,
@@ -368,7 +361,6 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
 }
 
 static struct irq_host_ops mpc52xx_irqhost_ops = {
-        .match = mpc52xx_irqhost_match,
         .xlate = mpc52xx_irqhost_xlate,
         .map = mpc52xx_irqhost_map,
 };
@@ -420,14 +412,13 @@ void __init mpc52xx_init_irq(void)
          * hw irq information provided by the ofw to linux virq
          */
 
-        mpc52xx_irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR,
+        mpc52xx_irqhost = irq_alloc_host(picnode, IRQ_HOST_MAP_LINEAR,
                                          MPC52xx_IRQ_HIGHTESTHWIRQ,
                                          &mpc52xx_irqhost_ops, -1);
 
         if (!mpc52xx_irqhost)
                 panic(__FILE__ ": Cannot allocate the IRQ host\n");
 
-        mpc52xx_irqhost->host_data = picnode;
         printk(KERN_INFO "MPC52xx PIC is up and running!\n");
 }
 
diff --git a/arch/powerpc/platforms/82xx/m82xx_pci.h b/arch/powerpc/platforms/82xx/m82xx_pci.h
index 9cd8893b5a32..65e38a7ff48f 100644
--- a/arch/powerpc/platforms/82xx/m82xx_pci.h
+++ b/arch/powerpc/platforms/82xx/m82xx_pci.h
@@ -8,8 +8,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#include <asm/m8260_pci.h>
-
 #define SIU_INT_IRQ1   ((uint)0x13 + CPM_IRQ_OFFSET)
 
 #ifndef _IO_BASE
diff --git a/arch/powerpc/platforms/82xx/mpc82xx.c b/arch/powerpc/platforms/82xx/mpc82xx.c
index cc9900d2e5ee..c706871aec1a 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx.c
@@ -36,7 +36,6 @@
 #include <asm/time.h>
 #include <asm/io.h>
 #include <asm/machdep.h>
-#include <asm/bootinfo.h>
 #include <asm/pci-bridge.h>
 #include <asm/mpc8260.h>
 #include <asm/irq.h>
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
index 2d1b05b9f8ef..40087952935a 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
@@ -37,7 +37,6 @@
 #include <asm/time.h>
 #include <asm/io.h>
 #include <asm/machdep.h>
-#include <asm/bootinfo.h>
 #include <asm/pci-bridge.h>
 #include <asm/mpc8260.h>
 #include <asm/irq.h>
@@ -62,7 +61,6 @@ static struct {
 
 static unsigned long pci_int_base;
 static struct irq_host *pci_pic_host;
-static struct device_node *pci_pic_node;
 #endif
 
 static void __init mpc82xx_ads_pic_init(void)
@@ -400,11 +398,6 @@ m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
         }
 }
 
-static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
-{
-        return node == pci_pic_node;
-}
-
 static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
                             irq_hw_number_t hw)
 {
@@ -420,7 +413,6 @@ static void pci_host_unmap(struct irq_host *h, unsigned int virq)
 }
 
 static struct irq_host_ops pci_pic_host_ops = {
-        .match = pci_pic_host_match,
         .map = pci_pic_host_map,
         .unmap = pci_host_unmap,
 };
@@ -479,7 +471,6 @@ void m82xx_pci_init_irq(void)
                 iounmap(immap);
                 return;
         }
-        pci_pic_node = of_node_get(np);
         /* PCI interrupt controller registers: status and mask */
         regs = of_get_property(np, "reg", &size);
         if ((!regs) || (size <= 2)) {
@@ -491,7 +482,6 @@ void m82xx_pci_init_irq(void)
             ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
         pci_regs.pci_int_mask_reg =
             ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
-        of_node_put(np);
         /* configure chip select for PCI interrupt controller */
         immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
         immap->im_memctl.memc_or3 = 0xffff8010;
@@ -502,7 +492,7 @@ void m82xx_pci_init_irq(void)
         *pci_regs.pci_int_mask_reg |= 0xfff00000;
         iounmap(immap);
         pci_pic_host =
-            irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
+            irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
                            &pci_pic_host_ops, irq_max + 1);
         return;
 }
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index 5b5cca6c8c88..6f749b76dd8f 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -23,7 +23,6 @@
 #define __MACH_ADS8260_DEFS
 
 #include <linux/seq_file.h>
-#include <asm/ppcboot.h>
 
 /* For our show_cpuinfo hooks. */
 #define CPUINFO_VENDOR          "Freescale Semiconductor"
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
index 3edfe170a03b..140b46ffdb19 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
@@ -45,8 +45,6 @@ static void __init mpc8313_rdb_setup_arch(void)
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
                 mpc83xx_add_bridge(np);
-
-        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 #endif
         mpc831x_usb_cfg();
 }
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 2c8e641a739b..d494bc456458 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -32,7 +32,6 @@
 #include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/ipic.h>
-#include <asm/bootinfo.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
 #include <asm/udbg.h>
@@ -76,7 +75,6 @@ static void __init mpc832x_sys_setup_arch(void)
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
                 mpc83xx_add_bridge(np);
-        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 #endif
 
 #ifdef CONFIG_QUICC_ENGINE
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index 090906170a41..24a790c79ec0 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -15,6 +15,7 @@
  */
 
 #include <linux/pci.h>
+#include <linux/spi/spi.h>
 
 #include <asm/of_platform.h>
 #include <asm/time.h>
@@ -22,6 +23,7 @@
 #include <asm/udbg.h>
 #include <asm/qe.h>
 #include <asm/qe_ic.h>
+#include <sysdev/fsl_soc.h>
 
 #include "mpc83xx.h"
 
@@ -32,6 +34,50 @@
 #define DBG(fmt...)
 #endif
 
+static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
+{
+        pr_debug("%s %d %d\n", __func__, cs, polarity);
+        par_io_data_set(3, 13, polarity);
+}
+
+static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
+{
+        pr_debug("%s %d %d\n", __func__, cs, polarity);
+        par_io_data_set(3, 13, !polarity);
+}
+
+static struct spi_board_info mpc832x_spi_boardinfo = {
+        .bus_num = 0x4c0,
+        .chip_select = 0,
+        .max_speed_hz = 50000000,
+        /*
+         * XXX: This is spidev (spi in userspace) stub, should
+         * be replaced by "mmc_spi" when mmc_spi will hit mainline.
+         */
+        .modalias = "spidev",
+};
+
+static int __init mpc832x_spi_init(void)
+{
+        if (!machine_is(mpc832x_rdb))
+                return 0;
+
+        par_io_config_pin(3,  0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
+        par_io_config_pin(3,  1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
+        par_io_config_pin(3,  2, 3, 0, 1, 0); /* SPI1 CLK,  I/O */
+        par_io_config_pin(3,  3, 2, 0, 1, 0); /* SPI1 SEL,  I   */
+
+        par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS,    O */
+        par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
+        par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
+
+        return fsl_spi_init(&mpc832x_spi_boardinfo, 1,
+                            mpc83xx_spi_activate_cs,
+                            mpc83xx_spi_deactivate_cs);
+}
+
+device_initcall(mpc832x_spi_init);
+
 /* ************************************************************************
  *
  * Setup the architecture
@@ -49,8 +95,6 @@ static void __init mpc832x_rdb_setup_arch(void)
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
                 mpc83xx_add_bridge(np);
-
-        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 #endif
 
 #ifdef CONFIG_QUICC_ENGINE
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 47ba5446f63c..870fd20461ce 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -30,7 +30,6 @@
 #include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/ipic.h>
-#include <asm/bootinfo.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
 #include <asm/udbg.h>
@@ -55,8 +54,6 @@ static void __init mpc834x_itx_setup_arch(void)
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
                 mpc83xx_add_bridge(np);
-
-        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 #endif
 
         mpc834x_usb_cfg();
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index 4c9ff9cadfe4..a9140b64b98a 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -30,7 +30,6 @@
 #include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/ipic.h>
-#include <asm/bootinfo.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
 #include <asm/udbg.h>
@@ -86,8 +85,6 @@ static void __init mpc834x_mds_setup_arch(void)
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
                 mpc83xx_add_bridge(np);
-
-        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 #endif
 
         mpc834xemds_usb_cfg();
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index 84b58934aafd..db6957611585 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -38,7 +38,6 @@
 #include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/ipic.h>
-#include <asm/bootinfo.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
 #include <asm/udbg.h>
@@ -82,7 +81,6 @@ static void __init mpc836x_mds_setup_arch(void)
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
                 mpc83xx_add_bridge(np);
-        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 #endif
 
 #ifdef CONFIG_QUICC_ENGINE
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 589ee55730f3..b778cb4f3fb5 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -49,8 +49,6 @@
  */
 
 extern int mpc83xx_add_bridge(struct device_node *dev);
-extern int mpc83xx_exclude_device(struct pci_controller *hose,
-                                  u_char bus, u_char devfn);
 extern void mpc83xx_restart(char *cmd);
 extern long mpc83xx_time_init(void);
 extern int mpc834x_usb_cfg(void);
diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c
index 92069469de20..80425d7b14f8 100644
--- a/arch/powerpc/platforms/83xx/pci.c
+++ b/arch/powerpc/platforms/83xx/pci.c
@@ -33,13 +33,6 @@
 #define DBG(x...)
 #endif
 
-int mpc83xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn)
-{
-        if ((bus == hose->first_busno) && PCI_SLOT(devfn) == 0)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        return PCIBIOS_SUCCESSFUL;
-}
-
 int __init mpc83xx_add_bridge(struct device_node *dev)
 {
         int len;
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index f620171ad6b1..b8476b20a424 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -29,13 +29,13 @@ config MPC85xx_MDS
         help
           This option enables support for the MPC85xx MDS board
 
-config MPC8544_DS
-        bool "Freescale MPC8544 DS"
+config MPC85xx_DS
+        bool "Freescale MPC85xx DS"
         select PPC_I8259
         select DEFAULT_UIMAGE
         select FSL_ULI1575
         help
-          This option enables support for the MPC8544 DS board
+          This option enables support for the MPC85xx DS (MPC8544 DS) board
 
 endchoice
 
@@ -58,4 +58,4 @@ config MPC85xx
         select FSL_PCI if PCI
         select SERIAL_8250_SHARE_IRQ if SERIAL_8250
         default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
-                || MPC85xx_MDS || MPC8544_DS
+                || MPC85xx_MDS || MPC85xx_DS
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index d70f2d0f9d36..25bd9e2d4946 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -5,5 +5,5 @@ obj-$(CONFIG_PPC_85xx)	+= misc.o
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
-obj-$(CONFIG_MPC8544_DS)  += mpc8544_ds.o
+obj-$(CONFIG_MPC85xx_DS)  += mpc85xx_ds.o
 obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 40a828675c7b..c22bc1c4f591 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -192,7 +192,6 @@ void init_fcc_ioports(struct fs_platform_info *fpi)
 
 static void __init mpc85xx_ads_setup_arch(void)
 {
-        struct device_node *cpu;
 #ifdef CONFIG_PCI
         struct device_node *np;
 #endif
@@ -200,18 +199,6 @@ static void __init mpc85xx_ads_setup_arch(void)
         if (ppc_md.progress)
                 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
 
-        cpu = of_find_node_by_type(NULL, "cpu");
-        if (cpu != 0) {
-                const unsigned int *fp;
-
-                fp = of_get_property(cpu, "clock-frequency", NULL);
-                if (fp != 0)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(cpu);
-        }
-
 #ifdef CONFIG_CPM2
         cpm2_reset();
 #endif
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 2d4cb7847604..665e8df05dc5 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -35,7 +35,6 @@
 #include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/ipic.h>
-#include <asm/bootinfo.h>
 #include <asm/pci-bridge.h>
 #include <asm/mpc85xx.h>
 #include <asm/irq.h>
@@ -266,7 +265,6 @@ device_initcall(mpc85xx_cds_8259_attach);
  */
 static void __init mpc85xx_cds_setup_arch(void)
 {
-        struct device_node *cpu;
 #ifdef CONFIG_PCI
         struct device_node *np;
 #endif
@@ -274,18 +272,6 @@ static void __init mpc85xx_cds_setup_arch(void)
         if (ppc_md.progress)
                 ppc_md.progress("mpc85xx_cds_setup_arch()", 0);
 
-        cpu = of_find_node_by_type(NULL, "cpu");
-        if (cpu != 0) {
-                const unsigned int *fp;
-
-                fp = of_get_property(cpu, "clock-frequency", NULL);
-                if (fp != 0)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 500000000 / HZ;
-                of_node_put(cpu);
-        }
-
         cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
         cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
 
diff --git a/arch/powerpc/platforms/85xx/mpc8544_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 48983bc56d46..4d449022ac9b 100644
--- a/arch/powerpc/platforms/85xx/mpc8544_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -1,5 +1,5 @@
 /*
- * MPC8544 DS Board Setup
+ * MPC85xx DS Board Setup
  *
  * Author Xianghua Xiao (x.xiao@freescale.com)
  * Roy Zang <tie-fei.zang@freescale.com>
@@ -44,7 +44,7 @@
 #endif
 
 #ifdef CONFIG_PPC_I8259
-static void mpc8544_8259_cascade(unsigned int irq, struct irq_desc *desc)
+static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int cascade_irq = i8259_irq();
 
@@ -55,7 +55,7 @@ static void mpc8544_8259_cascade(unsigned int irq, struct irq_desc *desc)
 }
 #endif  /* CONFIG_PPC_I8259 */
 
-void __init mpc8544_ds_pic_init(void)
+void __init mpc85xx_ds_pic_init(void)
 {
         struct mpic *mpic;
         struct resource r;
@@ -104,16 +104,17 @@ void __init mpc8544_ds_pic_init(void)
                 return;
         }
 
-        DBG("mpc8544ds: cascade mapped to irq %d\n", cascade_irq);
+        DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
 
         i8259_init(cascade_node, 0);
         of_node_put(cascade_node);
 
-        set_irq_chained_handler(cascade_irq, mpc8544_8259_cascade);
+        set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
 #endif  /* CONFIG_PPC_I8259 */
 }
 
 #ifdef CONFIG_PCI
+static int primary_phb_addr;
 extern int uses_fsl_uli_m1575;
 extern int uli_exclude_device(struct pci_controller *hose,
                                 u_char bus, u_char devfn);
@@ -121,13 +122,13 @@ extern int uli_exclude_device(struct pci_controller *hose,
 static int mpc85xx_exclude_device(struct pci_controller *hose,
                                    u_char bus, u_char devfn)
 {
-        struct device_node* node;       
+        struct device_node* node;
         struct resource rsrc;
 
         node = (struct device_node *)hose->arch_data;
         of_address_to_resource(node, 0, &rsrc);
 
-        if ((rsrc.start & 0xfffff) == 0xb000) {
+        if ((rsrc.start & 0xfffff) == primary_phb_addr) {
                 return uli_exclude_device(hose, bus, devfn);
         }
 
@@ -138,20 +139,20 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 /*
  * Setup the architecture
  */
-static void __init mpc8544_ds_setup_arch(void)
+static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
         struct device_node *np;
 #endif
 
         if (ppc_md.progress)
-                ppc_md.progress("mpc8544_ds_setup_arch()", 0);
+                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) {
                 struct resource rsrc;
                 of_address_to_resource(np, 0, &rsrc);
-                if ((rsrc.start & 0xfffff) == 0xb000)
+                if ((rsrc.start & 0xfffff) == primary_phb_addr)
                         fsl_add_bridge(np, 1);
                 else
                         fsl_add_bridge(np, 0);
@@ -160,7 +161,7 @@ static void __init mpc8544_ds_setup_arch(void)
         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
-        printk("MPC8544 DS board from Freescale Semiconductor\n");
+        printk("MPC85xx DS board from Freescale Semiconductor\n");
 }
 
 /*
@@ -170,14 +171,52 @@ static int __init mpc8544_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        return of_flat_dt_is_compatible(root, "MPC8544DS");
+        if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
+#ifdef CONFIG_PCI
+                primary_phb_addr = 0xb000;
+#endif
+                return 1;
+        } else {
+                return 0;
+        }
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init mpc8572_ds_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
+#ifdef CONFIG_PCI
+                primary_phb_addr = 0x8000;
+#endif
+                return 1;
+        } else {
+                return 0;
+        }
 }
 
 define_machine(mpc8544_ds) {
         .name                   = "MPC8544 DS",
         .probe                  = mpc8544_ds_probe,
-        .setup_arch             = mpc8544_ds_setup_arch,
-        .init_IRQ               = mpc8544_ds_pic_init,
+        .setup_arch             = mpc85xx_ds_setup_arch,
+        .init_IRQ               = mpc85xx_ds_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = mpc85xx_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
+
+define_machine(mpc8572_ds) {
+        .name                   = "MPC8572 DS",
+        .probe                  = mpc8572_ds_probe,
+        .setup_arch             = mpc85xx_ds_setup_arch,
+        .init_IRQ               = mpc85xx_ds_pic_init,
 #ifdef CONFIG_PCI
         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 #endif
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 7ca7e676f1c4..c379286c3730 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -38,7 +38,6 @@
 #include <asm/time.h>
 #include <asm/io.h>
 #include <asm/machdep.h>
-#include <asm/bootinfo.h>
 #include <asm/pci-bridge.h>
 #include <asm/mpc85xx.h>
 #include <asm/irq.h>
@@ -73,17 +72,6 @@ static void __init mpc85xx_mds_setup_arch(void)
         if (ppc_md.progress)
                 ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
 
-        np = of_find_node_by_type(NULL, "cpu");
-        if (np != NULL) {
-                const unsigned int *fp =
-                    of_get_property(np, "clock-frequency", NULL);
-                if (fp != NULL)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(np);
-        }
-
         /* Map BCSR area */
         np = of_find_node_by_name(NULL, "bcsr");
         if (np != NULL) {
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 47aafa76c933..3ec9d5a25750 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -132,23 +132,13 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
 static void __init
 mpc86xx_hpcn_setup_arch(void)
 {
+#ifdef CONFIG_PCI
         struct device_node *np;
+#endif
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
 
-        np = of_find_node_by_type(NULL, "cpu");
-        if (np != 0) {
-                const unsigned int *fp;
-
-                fp = of_get_property(np, "clock-frequency", NULL);
-                if (fp != 0)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(np);
-        }
-
 #ifdef CONFIG_PCI
         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) {
                 struct resource rsrc;
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index f1693550c70c..b2b98dd8be6a 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -36,13 +36,11 @@
 
 #include <asm/mmu.h>
 #include <asm/reg.h>
-#include <asm/residual.h>
 #include <asm/io.h>
 #include <asm/pgtable.h>
 #include <asm/mpc8xx.h>
 #include <asm/8xx_immap.h>
 #include <asm/machdep.h>
-#include <asm/bootinfo.h>
 #include <asm/time.h>
 #include <asm/prom.h>
 #include <asm/fs_pd.h>
@@ -55,7 +53,9 @@ struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops;
 #endif
 
 void m8xx_calibrate_decr(void);
+#ifdef CONFIG_8xx_WDT
 extern void m8xx_wdt_handler_install(bd_t *bp);
+#endif
 extern int cpm_pic_init(void);
 extern int cpm_get_irq(void);
 
@@ -89,24 +89,24 @@ init_internal_rtc(void)
 
 static int __init get_freq(char *name, unsigned long *val)
 {
-        struct device_node *cpu;
-        const unsigned int *fp;
-        int found = 0;
+        struct device_node *cpu;
+        const unsigned int *fp;
+        int found = 0;
 
-        /* The cpu node should have timebase and clock frequency properties */
-        cpu = of_find_node_by_type(NULL, "cpu");
+        /* The cpu node should have timebase and clock frequency properties */
+        cpu = of_find_node_by_type(NULL, "cpu");
 
-        if (cpu) {
-                fp = of_get_property(cpu, name, NULL);
-                if (fp) {
-                        found = 1;
-                        *val = *fp;
-                }
+        if (cpu) {
+                fp = of_get_property(cpu, name, NULL);
+                if (fp) {
+                        found = 1;
+                        *val = *fp;
+                }
 
-                of_node_put(cpu);
-        }
+                of_node_put(cpu);
+        }
 
-        return found;
+        return found;
 }
 
 /* The decrementer counts at the system (internal) clock frequency divided by
@@ -122,7 +122,7 @@ void __init mpc8xx_calibrate_decr(void)
         sit8xx_t *sys_tmr2;
         int irq, virq;
 
-        clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
+        clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
 
         /* Unlock the SCCR. */
         out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
@@ -130,24 +130,24 @@ void __init mpc8xx_calibrate_decr(void)
         immr_unmap(clk_r1);
 
         /* Force all 8xx processors to use divide by 16 processor clock. */
-        clk_r2 = (car8xx_t *) immr_map(im_clkrst);
+        clk_r2 = (car8xx_t *) immr_map(im_clkrst);
         setbits32(&clk_r2->car_sccr, 0x02000000);
         immr_unmap(clk_r2);
 
         /* Processor frequency is MHz.
          */
-        ppc_tb_freq = 50000000;
-        if (!get_freq("bus-frequency", &ppc_tb_freq)) {
-                printk(KERN_ERR "WARNING: Estimating decrementer frequency "
-                                "(not found)\n");
-        }
-        ppc_tb_freq /= 16;
-        ppc_proc_freq = 50000000;
-        if (!get_freq("clock-frequency", &ppc_proc_freq))
-                printk(KERN_ERR "WARNING: Estimating processor frequency"
-                                "(not found)\n");
-
-        printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
+        ppc_tb_freq = 50000000;
+        if (!get_freq("bus-frequency", &ppc_tb_freq)) {
+                printk(KERN_ERR "WARNING: Estimating decrementer frequency "
+                                "(not found)\n");
+        }
+        ppc_tb_freq /= 16;
+        ppc_proc_freq = 50000000;
+        if (!get_freq("clock-frequency", &ppc_proc_freq))
+                printk(KERN_ERR "WARNING: Estimating processor frequency"
+                                "(not found)\n");
+
+        printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
 
         /* Perform some more timer/timebase initialization.  This used
          * to be done elsewhere, but other changes caused it to get
@@ -164,7 +164,7 @@ void __init mpc8xx_calibrate_decr(void)
          * we guarantee the registers are locked, then we unlock them
          * for our use.
          */
-        sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+        sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
         out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
         out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
         out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
@@ -180,8 +180,8 @@ void __init mpc8xx_calibrate_decr(void)
          * we have to enable the timebase).  The decrementer interrupt
          * is wired into the vector table, nothing to do here for that.
          */
-        cpu = of_find_node_by_type(NULL, "cpu");
-        virq= irq_of_parse_and_map(cpu, 0);
+        cpu = of_find_node_by_type(NULL, "cpu");
+        virq= irq_of_parse_and_map(cpu, 0);
         irq = irq_map[virq].hwirq;
 
         sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
@@ -211,10 +211,10 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm)
         sit8xx_t *sys_tmr2;
         int time;
 
-        sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+        sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
         sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
         time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
-                      tm->tm_hour, tm->tm_min, tm->tm_sec);
+                      tm->tm_hour, tm->tm_min, tm->tm_sec);
 
         out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);
         out_be32(&sys_tmr2->sit_rtc, time);
@@ -233,8 +233,8 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm)
         /* Get time from the RTC. */
         data = in_be32(&sys_tmr->sit_rtc);
         to_tm(data, tm);
-        tm->tm_year -= 1900;
-        tm->tm_mon -= 1;
+        tm->tm_year -= 1900;
+        tm->tm_mon -= 1;
         immr_unmap(sys_tmr);
         return;
 }
@@ -298,7 +298,7 @@ void __init m8xx_pic_init(void)
         int irq;
 
         if (mpc8xx_pic_init()) {
-                printk(KERN_ERR "Failed interrupt 8xx controller  initialization\n");
+                printk(KERN_ERR "Failed interrupt 8xx controller  initialization\n");
                 return;
         }
 
diff --git a/arch/powerpc/platforms/8xx/mpc86xads.h b/arch/powerpc/platforms/8xx/mpc86xads.h
index 59bad2f9ae51..dd10cd20b6a7 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads.h
+++ b/arch/powerpc/platforms/8xx/mpc86xads.h
@@ -15,7 +15,6 @@
 #ifndef __ASM_MPC86XADS_H__
 #define __ASM_MPC86XADS_H__
 
-#include <asm/ppcboot.h>
 #include <sysdev/fsl_soc.h>
 
 /* U-Boot maps BCSR to 0xff080000 */
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index cf0e7bc8c2e7..8f64f48698ab 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -31,7 +31,6 @@
 #include <asm/processor.h>
 #include <asm/system.h>
 #include <asm/time.h>
-#include <asm/ppcboot.h>
 #include <asm/mpc8xx.h>
 #include <asm/8xx_immap.h>
 #include <asm/commproc.h>
@@ -254,20 +253,6 @@ int platform_device_skip(const char *model, int id)
 
 static void __init mpc86xads_setup_arch(void)
 {
-        struct device_node *cpu;
-
-        cpu = of_find_node_by_type(NULL, "cpu");
-        if (cpu != 0) {
-                const unsigned int *fp;
-
-                fp = of_get_property(cpu, "clock-frequency", NULL);
-                if (fp != 0)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(cpu);
-        }
-
         cpm_reset();
 
         mpc86xads_board_setup();
diff --git a/arch/powerpc/platforms/8xx/mpc885ads.h b/arch/powerpc/platforms/8xx/mpc885ads.h
index 7c31aec284c2..14db12417064 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads.h
+++ b/arch/powerpc/platforms/8xx/mpc885ads.h
@@ -15,7 +15,6 @@
 #ifndef __ASM_MPC885ADS_H__
 #define __ASM_MPC885ADS_H__
 
-#include <asm/ppcboot.h>
 #include <sysdev/fsl_soc.h>
 
 /* U-Boot maps BCSR to 0xff080000 */
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 5a808d611ae3..a1dab4cfd3de 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -32,7 +32,6 @@
 #include <asm/processor.h>
 #include <asm/system.h>
 #include <asm/time.h>
-#include <asm/ppcboot.h>
 #include <asm/mpc8xx.h>
 #include <asm/8xx_immap.h>
 #include <asm/commproc.h>
@@ -406,20 +405,6 @@ int platform_device_skip(const char *model, int id)
 
 static void __init mpc885ads_setup_arch(void)
 {
-        struct device_node *cpu;
-
-        cpu = of_find_node_by_type(NULL, "cpu");
-        if (cpu != 0) {
-                const unsigned int *fp;
-
-                fp = of_get_property(cpu, "clock-frequency", NULL);
-                if (fp != 0)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(cpu);
-        }
-
         cpm_reset();
 
         mpc885ads_board_setup();
@@ -441,9 +426,14 @@ static int __init mpc885ads_probe(void)
 
 define_machine(mpc885_ads)
 {
-.name = "MPC885 ADS",.probe = mpc885ads_probe,.setup_arch =
-            mpc885ads_setup_arch,.init_IRQ =
-            m8xx_pic_init,.show_cpuinfo = mpc8xx_show_cpuinfo,.get_irq =
-            mpc8xx_get_irq,.restart = mpc8xx_restart,.calibrate_decr =
-            mpc8xx_calibrate_decr,.set_rtc_time =
-            mpc8xx_set_rtc_time,.get_rtc_time = mpc8xx_get_rtc_time,};
+        .name            = "MPC885 ADS",
+        .probe           = mpc885ads_probe,
+        .setup_arch      = mpc885ads_setup_arch,
+        .init_IRQ        = m8xx_pic_init,
+        .show_cpuinfo    = mpc8xx_show_cpuinfo,
+        .get_irq         = mpc8xx_get_irq,
+        .restart         = mpc8xx_restart,
+        .calibrate_decr  = mpc8xx_calibrate_decr,
+        .set_rtc_time    = mpc8xx_set_rtc_time,
+        .get_rtc_time    = mpc8xx_get_rtc_time,
+};
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 19d4628edf79..92fcd6e35b51 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -12,13 +12,10 @@ config PPC_MULTIPLATFORM
           RS/6000 machine, an Apple machine, or a PReP, CHRP,
           Maple or Cell-based machine.
 
-config EMBEDDED6xx
-        bool "Embedded 6xx/7xx/7xxx-based board"
-        depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
-
 config PPC_82xx
         bool "Freescale 82xx"
         depends on 6xx
+        select WANT_DEVICE_TREE
 
 config PPC_83xx
         bool "Freescale 83xx"
@@ -58,7 +55,7 @@ source "arch/powerpc/platforms/85xx/Kconfig"
 source "arch/powerpc/platforms/86xx/Kconfig"
 source "arch/powerpc/platforms/embedded6xx/Kconfig"
 source "arch/powerpc/platforms/44x/Kconfig"
-#source "arch/powerpc/platforms/4xx/Kconfig
+source "arch/powerpc/platforms/40x/Kconfig"
 
 config PPC_NATIVE
         bool
@@ -136,6 +133,16 @@ config MPIC_U3_HT_IRQS
         depends on PPC_MAPLE
         default y
 
+config MPIC_BROKEN_REGREAD
+        bool
+        depends on MPIC
+        help
+          This option enables a MPIC driver workaround for some chips
+          that have a bug that causes some interrupt source information
+          to not read back properly. It is safe to use on other chips as
+          well, but enabling it uses about 8KB of memory to keep copies
+          of the register contents in software.
+
 config IBMVIO
         depends on PPC_PSERIES || PPC_ISERIES
         bool
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index e4b2aee53a73..4c315be25015 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -36,10 +36,12 @@ config PPC_8xx
         bool "Freescale 8xx"
         select FSL_SOC
         select 8xx
+        select WANT_DEVICE_TREE
 
 config 40x
         bool "AMCC 40x"
         select PPC_DCR_NATIVE
+        select WANT_DEVICE_TREE
 
 config 44x
         bool "AMCC 44x"
@@ -69,6 +71,18 @@ config POWER4
         depends on PPC64
         def_bool y
 
+config TUNE_CELL
+        bool "Optimize for Cell Broadband Engine"
+        depends on PPC64
+        help
+          Cause the compiler to optimize for the PPE of the Cell Broadband
+          Engine. This will make the code run considerably faster on Cell
+          but somewhat slower on other machines. This option only changes
+          the scheduling of instructions, not the selection of instructions
+          itself, so the resulting kernel will keep running on all other
+          machines. When building a kernel that is supposed to run only
+          on Cell, you should also select the POWER4_ONLY option.
+
 config 6xx
         bool
 
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index d44e832b01f2..6d9079da5f5a 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_PPC_PMAC)		+= powermac/
 endif
 endif
 obj-$(CONFIG_PPC_CHRP)          += chrp/
-#obj-$(CONFIG_4xx)              += 4xx/
+obj-$(CONFIG_40x)               += 40x/
 obj-$(CONFIG_44x)               += 44x/
 obj-$(CONFIG_PPC_MPC52xx)       += 52xx/
 obj-$(CONFIG_PPC_8xx)           += 8xx/
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index f88a7c76f296..61d12f183036 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -13,15 +13,13 @@ obj-$(CONFIG_PPC_CELL_NATIVE)		+= smp.o
 endif
 
 # needed only when building loadable spufs.ko
-spufs-modular-$(CONFIG_SPU_FS)          += spu_syscalls.o
 spu-priv1-$(CONFIG_PPC_CELL_NATIVE)     += spu_priv1_mmio.o
 
 spu-manage-$(CONFIG_PPC_CELLEB)         += spu_manage.o
 spu-manage-$(CONFIG_PPC_CELL_NATIVE)    += spu_manage.o
 
 obj-$(CONFIG_SPU_BASE)                  += spu_callbacks.o spu_base.o \
-                                           spu_coredump.o \
-                                           $(spufs-modular-m) \
+                                           spu_syscalls.o \
                                            $(spu-priv1-y) \
                                            $(spu-manage-y) \
                                            spufs/
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 4c9ab5b70bae..1245b2f517bb 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -64,13 +64,11 @@
 
 
 struct axon_msic {
-        struct device_node *dn;
         struct irq_host *irq_host;
         __le32 *fifo;
         dcr_host_t dcr_host;
         struct list_head list;
         u32 read_offset;
-        u32 dcr_base;
 };
 
 static LIST_HEAD(axon_msic_list);
@@ -79,12 +77,12 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
 {
         pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n);
 
-        dcr_write(msic->dcr_host, msic->dcr_base + dcr_n, val);
+        dcr_write(msic->dcr_host, msic->dcr_host.base + dcr_n, val);
 }
 
 static u32 msic_dcr_read(struct axon_msic *msic, unsigned int dcr_n)
 {
-        return dcr_read(msic->dcr_host, msic->dcr_base + dcr_n);
+        return dcr_read(msic->dcr_host, msic->dcr_host.base + dcr_n);
 }
 
 static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
@@ -126,7 +124,7 @@ static struct axon_msic *find_msi_translator(struct pci_dev *dev)
         const phandle *ph;
         struct axon_msic *msic = NULL;
 
-        dn = pci_device_to_OF_node(dev);
+        dn = of_node_get(pci_device_to_OF_node(dev));
         if (!dn) {
                 dev_dbg(&dev->dev, "axon_msi: no pci_dn found\n");
                 return NULL;
@@ -183,7 +181,7 @@ static int setup_msi_msg_address(struct pci_dev *dev, struct msi_msg *msg)
         int len;
         const u32 *prop;
 
-        dn = pci_device_to_OF_node(dev);
+        dn = of_node_get(pci_device_to_OF_node(dev));
         if (!dn) {
                 dev_dbg(&dev->dev, "axon_msi: no pci_dn found\n");
                 return -ENODEV;
@@ -295,15 +293,7 @@ static int msic_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int msic_host_match(struct irq_host *host, struct device_node *dn)
-{
-        struct axon_msic *msic = host->host_data;
-
-        return msic->dn == dn;
-}
-
 static struct irq_host_ops msic_host_ops = {
-        .match  = msic_host_match,
         .map    = msic_host_map,
 };
 
@@ -314,7 +304,8 @@ static int axon_msi_notify_reboot(struct notifier_block *nb,
         u32 tmp;
 
         list_for_each_entry(msic, &axon_msic_list, list) {
-                pr_debug("axon_msi: disabling %s\n", msic->dn->full_name);
+                pr_debug("axon_msi: disabling %s\n",
+                          msic->irq_host->of_node->full_name);
                 tmp  = msic_dcr_read(msic, MSIC_CTRL_REG);
                 tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
                 msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
@@ -332,7 +323,7 @@ static int axon_msi_setup_one(struct device_node *dn)
         struct page *page;
         struct axon_msic *msic;
         unsigned int virq;
-        int dcr_len;
+        int dcr_base, dcr_len;
 
         pr_debug("axon_msi: setting up dn %s\n", dn->full_name);
 
@@ -343,17 +334,17 @@ static int axon_msi_setup_one(struct device_node *dn)
                 goto out;
         }
 
-        msic->dcr_base = dcr_resource_start(dn, 0);
+        dcr_base = dcr_resource_start(dn, 0);
         dcr_len = dcr_resource_len(dn, 0);
 
-        if (msic->dcr_base == 0 || dcr_len == 0) {
+        if (dcr_base == 0 || dcr_len == 0) {
                 printk(KERN_ERR
                        "axon_msi: couldn't parse dcr properties on %s\n",
                         dn->full_name);
                 goto out;
         }
 
-        msic->dcr_host = dcr_map(dn, msic->dcr_base, dcr_len);
+        msic->dcr_host = dcr_map(dn, dcr_base, dcr_len);
         if (!DCR_MAP_OK(msic->dcr_host)) {
                 printk(KERN_ERR "axon_msi: dcr_map failed for %s\n",
                        dn->full_name);
@@ -370,8 +361,8 @@ static int axon_msi_setup_one(struct device_node *dn)
 
         msic->fifo = page_address(page);
 
-        msic->irq_host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, NR_IRQS,
-                                        &msic_host_ops, 0);
+        msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP,
+                                        NR_IRQS, &msic_host_ops, 0);
         if (!msic->irq_host) {
                 printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n",
                        dn->full_name);
@@ -387,8 +378,6 @@ static int axon_msi_setup_one(struct device_node *dn)
                 goto out_free_host;
         }
 
-        msic->dn = of_node_get(dn);
-
         set_irq_data(virq, msic);
         set_irq_chained_handler(virq, axon_msi_cascade);
         pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq);
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 47264e722029..c29e634177fa 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -381,7 +381,7 @@ static int __init setup_iic(void)
 void __init iic_init_IRQ(void)
 {
         /* Setup an irq host data structure */
-        iic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, IIC_SOURCE_COUNT,
+        iic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_LINEAR, IIC_SOURCE_COUNT,
                                   &iic_host_ops, IIC_IRQ_INVALID);
         BUG_ON(iic_host == NULL);
         irq_set_default_host(iic_host);
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 05f4b3d3d756..3f4b4aef756d 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -63,7 +63,6 @@ enum {
 
 struct spider_pic {
         struct irq_host         *host;
-        struct device_node      *of_node;
         void __iomem            *regs;
         unsigned int            node_id;
 };
@@ -176,12 +175,6 @@ static struct irq_chip spider_pic = {
         .set_type = spider_set_irq_type,
 };
 
-static int spider_host_match(struct irq_host *h, struct device_node *node)
-{
-        struct spider_pic *pic = h->host_data;
-        return node == pic->of_node;
-}
-
 static int spider_host_map(struct irq_host *h, unsigned int virq,
                         irq_hw_number_t hw)
 {
@@ -208,7 +201,6 @@ static int spider_host_xlate(struct irq_host *h, struct device_node *ct,
 }
 
 static struct irq_host_ops spider_host_ops = {
-        .match = spider_host_match,
         .map = spider_host_map,
         .xlate = spider_host_xlate,
 };
@@ -247,18 +239,18 @@ static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
          * tree in case the device-tree is ever fixed
          */
         struct of_irq oirq;
-        if (of_irq_map_one(pic->of_node, 0, &oirq) == 0) {
+        if (of_irq_map_one(pic->host->of_node, 0, &oirq) == 0) {
                 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
                                              oirq.size);
                 return virq;
         }
 
         /* Now do the horrible hacks */
-        tmp = of_get_property(pic->of_node, "#interrupt-cells", NULL);
+        tmp = of_get_property(pic->host->of_node, "#interrupt-cells", NULL);
         if (tmp == NULL)
                 return NO_IRQ;
         intsize = *tmp;
-        imap = of_get_property(pic->of_node, "interrupt-map", &imaplen);
+        imap = of_get_property(pic->host->of_node, "interrupt-map", &imaplen);
         if (imap == NULL || imaplen < (intsize + 1))
                 return NO_IRQ;
         iic = of_find_node_by_phandle(imap[intsize]);
@@ -308,15 +300,13 @@ static void __init spider_init_one(struct device_node *of_node, int chip,
                 panic("spider_pic: can't map registers !");
 
         /* Allocate a host */
-        pic->host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, SPIDER_SRC_COUNT,
-                                   &spider_host_ops, SPIDER_IRQ_INVALID);
+        pic->host = irq_alloc_host(of_node_get(of_node), IRQ_HOST_MAP_LINEAR,
+                                   SPIDER_SRC_COUNT, &spider_host_ops,
+                                   SPIDER_IRQ_INVALID);
         if (pic->host == NULL)
                 panic("spider_pic: can't allocate irq host !");
         pic->host->host_data = pic;
 
-        /* Fill out other bits */
-        pic->of_node = of_node_get(of_node);
-
         /* Go through all sources and disable them */
         for (i = 0; i < SPIDER_SRC_COUNT; i++) {
                 void __iomem *cfg = pic->regs + TIR_CFGA + 8 * i;
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 106d2921e2d9..b5a21177bb32 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -458,7 +458,7 @@ static int spu_shutdown(struct sys_device *sysdev)
         return 0;
 }
 
-struct sysdev_class spu_sysdev_class = {
+static struct sysdev_class spu_sysdev_class = {
         set_kset_name("spu"),
         .shutdown = spu_shutdown,
 };
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index 47ec3be3edcd..dceb8b6a9382 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -2,7 +2,7 @@
  * System call callback functions for SPUs
  */
 
-#define DEBUG
+#undef DEBUG
 
 #include <linux/kallsyms.h>
 #include <linux/module.h>
@@ -33,7 +33,7 @@
  *      mbind, mq_open, ipc, ...
  */
 
-void *spu_syscall_table[] = {
+static void *spu_syscall_table[] = {
 #define SYSCALL(func)           sys_ni_syscall,
 #define COMPAT_SYS(func)        sys_ni_syscall,
 #define PPC_SYS(func)           sys_ni_syscall,
diff --git a/arch/powerpc/platforms/cell/spu_coredump.c b/arch/powerpc/platforms/cell/spu_coredump.c
deleted file mode 100644
index 4fd37ff1e210..000000000000
--- a/arch/powerpc/platforms/cell/spu_coredump.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * SPU core dump code
- *
- * (C) Copyright 2006 IBM Corp.
- *
- * Author: Dwayne Grant McConnell <decimal@us.ibm.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/file.h>
-#include <linux/module.h>
-#include <linux/syscalls.h>
-
-#include <asm/spu.h>
-
-static struct spu_coredump_calls *spu_coredump_calls;
-static DEFINE_MUTEX(spu_coredump_mutex);
-
-int arch_notes_size(void)
-{
-        long ret;
-
-        ret = -ENOSYS;
-        mutex_lock(&spu_coredump_mutex);
-        if (spu_coredump_calls && try_module_get(spu_coredump_calls->owner)) {
-                ret = spu_coredump_calls->arch_notes_size();
-                module_put(spu_coredump_calls->owner);
-        }
-        mutex_unlock(&spu_coredump_mutex);
-        return ret;
-}
-
-void arch_write_notes(struct file *file)
-{
-        mutex_lock(&spu_coredump_mutex);
-        if (spu_coredump_calls && try_module_get(spu_coredump_calls->owner)) {
-                spu_coredump_calls->arch_write_notes(file);
-                module_put(spu_coredump_calls->owner);
-        }
-        mutex_unlock(&spu_coredump_mutex);
-}
-
-int register_arch_coredump_calls(struct spu_coredump_calls *calls)
-{
-        int ret = 0;
-
-
-        mutex_lock(&spu_coredump_mutex);
-        if (spu_coredump_calls)
-                ret = -EBUSY;
-        else
-                spu_coredump_calls = calls;
-        mutex_unlock(&spu_coredump_mutex);
-        return ret;
-}
-EXPORT_SYMBOL_GPL(register_arch_coredump_calls);
-
-void unregister_arch_coredump_calls(struct spu_coredump_calls *calls)
-{
-        BUG_ON(spu_coredump_calls != calls);
-
-        mutex_lock(&spu_coredump_mutex);
-        spu_coredump_calls = NULL;
-        mutex_unlock(&spu_coredump_mutex);
-}
-EXPORT_SYMBOL_GPL(unregister_arch_coredump_calls);
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c
index 0e14f532500e..1b010707488d 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -377,10 +377,10 @@ static int qs20_reg_memory[QS20_SPES_PER_BE] = { 1, 1, 0, 0, 0, 0, 0, 0 };
 static struct spu *spu_lookup_reg(int node, u32 reg)
 {
         struct spu *spu;
-        u32 *spu_reg;
+        const u32 *spu_reg;
 
         list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) {
-                spu_reg = (u32*)of_get_property(spu_devnode(spu), "reg", NULL);
+                spu_reg = of_get_property(spu_devnode(spu), "reg", NULL);
                 if (*spu_reg == reg)
                         return spu;
         }
diff --git a/arch/powerpc/platforms/cell/spu_syscalls.c b/arch/powerpc/platforms/cell/spu_syscalls.c
index 027ac32cc636..a9438b719fe8 100644
--- a/arch/powerpc/platforms/cell/spu_syscalls.c
+++ b/arch/powerpc/platforms/cell/spu_syscalls.c
@@ -2,6 +2,7 @@
  * SPU file system -- system call stubs
  *
  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
+ * (C) Copyright 2006-2007, IBM Corporation
  *
  * Author: Arnd Bergmann <arndb@de.ibm.com>
  *
@@ -20,44 +21,73 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 #include <linux/file.h>
+#include <linux/fs.h>
 #include <linux/module.h>
 #include <linux/syscalls.h>
+#include <linux/rcupdate.h>
 
 #include <asm/spu.h>
 
-struct spufs_calls spufs_calls = {
-        .owner = NULL,
-};
+/* protected by rcu */
+static struct spufs_calls *spufs_calls;
 
-/* These stub syscalls are needed to have the actual implementation
- * within a loadable module. When spufs is built into the kernel,
- * this file is not used and the syscalls directly enter the fs code */
+#ifdef CONFIG_SPU_FS_MODULE
+
+static inline struct spufs_calls *spufs_calls_get(void)
+{
+        struct spufs_calls *calls = NULL;
+
+        rcu_read_lock();
+        calls = rcu_dereference(spufs_calls);
+        if (calls && !try_module_get(calls->owner))
+                calls = NULL;
+        rcu_read_unlock();
+
+        return calls;
+}
+
+static inline void spufs_calls_put(struct spufs_calls *calls)
+{
+        BUG_ON(calls != spufs_calls);
+
+        /* we don't need to rcu this, as we hold a reference to the module */
+        module_put(spufs_calls->owner);
+}
+
+#else /* !defined CONFIG_SPU_FS_MODULE */
+
+static inline struct spufs_calls *spufs_calls_get(void)
+{
+        return spufs_calls;
+}
+
+static inline void spufs_calls_put(struct spufs_calls *calls) { }
+
+#endif /* CONFIG_SPU_FS_MODULE */
 
 asmlinkage long sys_spu_create(const char __user *name,
                 unsigned int flags, mode_t mode, int neighbor_fd)
 {
         long ret;
-        struct module *owner = spufs_calls.owner;
         struct file *neighbor;
         int fput_needed;
+        struct spufs_calls *calls;
 
-        ret = -ENOSYS;
-        if (owner && try_module_get(owner)) {
-                if (flags & SPU_CREATE_AFFINITY_SPU) {
-                        neighbor = fget_light(neighbor_fd, &fput_needed);
-                        ret = -EBADF;
-                        if (neighbor) {
-                                ret = spufs_calls.create_thread(name, flags,
-                                                                mode, neighbor);
-                                fput_light(neighbor, fput_needed);
-                        }
-                }
-                else {
-                        ret = spufs_calls.create_thread(name, flags,
-                                                        mode, NULL);
+        calls = spufs_calls_get();
+        if (!calls)
+                return -ENOSYS;
+
+        if (flags & SPU_CREATE_AFFINITY_SPU) {
+                ret = -EBADF;
+                neighbor = fget_light(neighbor_fd, &fput_needed);
+                if (neighbor) {
+                        ret = calls->create_thread(name, flags, mode, neighbor);
+                        fput_light(neighbor, fput_needed);
                 }
-                module_put(owner);
-        }
+        } else
+                ret = calls->create_thread(name, flags, mode, NULL);
+
+        spufs_calls_put(calls);
         return ret;
 }
 
@@ -66,37 +96,69 @@ asmlinkage long sys_spu_run(int fd, __u32 __user *unpc, __u32 __user *ustatus)
         long ret;
         struct file *filp;
         int fput_needed;
-        struct module *owner = spufs_calls.owner;
+        struct spufs_calls *calls;
 
-        ret = -ENOSYS;
-        if (owner && try_module_get(owner)) {
-                ret = -EBADF;
-                filp = fget_light(fd, &fput_needed);
-                if (filp) {
-                        ret = spufs_calls.spu_run(filp, unpc, ustatus);
-                        fput_light(filp, fput_needed);
-                }
-                module_put(owner);
+        calls = spufs_calls_get();
+        if (!calls)
+                return -ENOSYS;
+
+        ret = -EBADF;
+        filp = fget_light(fd, &fput_needed);
+        if (filp) {
+                ret = calls->spu_run(filp, unpc, ustatus);
+                fput_light(filp, fput_needed);
         }
+
+        spufs_calls_put(calls);
+        return ret;
+}
+
+int elf_coredump_extra_notes_size(void)
+{
+        struct spufs_calls *calls;
+        int ret;
+
+        calls = spufs_calls_get();
+        if (!calls)
+                return 0;
+
+        ret = calls->coredump_extra_notes_size();
+
+        spufs_calls_put(calls);
+
+        return ret;
+}
+
+int elf_coredump_extra_notes_write(struct file *file, loff_t *foffset)
+{
+        struct spufs_calls *calls;
+        int ret;
+
+        calls = spufs_calls_get();
+        if (!calls)
+                return 0;
+
+        ret = calls->coredump_extra_notes_write(file, foffset);
+
+        spufs_calls_put(calls);
+
         return ret;
 }
 
 int register_spu_syscalls(struct spufs_calls *calls)
 {
-        if (spufs_calls.owner)
+        if (spufs_calls)
                 return -EBUSY;
 
-        spufs_calls.create_thread = calls->create_thread;
-        spufs_calls.spu_run = calls->spu_run;
-        smp_mb();
-        spufs_calls.owner = calls->owner;
+        rcu_assign_pointer(spufs_calls, calls);
         return 0;
 }
 EXPORT_SYMBOL_GPL(register_spu_syscalls);
 
 void unregister_spu_syscalls(struct spufs_calls *calls)
 {
-        BUG_ON(spufs_calls.owner != calls->owner);
-        spufs_calls.owner = NULL;
+        BUG_ON(spufs_calls->owner != calls->owner);
+        rcu_assign_pointer(spufs_calls, NULL);
+        synchronize_rcu();
 }
 EXPORT_SYMBOL_GPL(unregister_spu_syscalls);
diff --git a/arch/powerpc/platforms/cell/spufs/coredump.c b/arch/powerpc/platforms/cell/spufs/coredump.c
index 5e31799b1e3f..80f62363e1ce 100644
--- a/arch/powerpc/platforms/cell/spufs/coredump.c
+++ b/arch/powerpc/platforms/cell/spufs/coredump.c
@@ -31,16 +31,7 @@
 
 #include "spufs.h"
 
-struct spufs_ctx_info {
-        struct list_head list;
-        int dfd;
-        int memsize; /* in bytes */
-        struct spu_context *ctx;
-};
-
-static LIST_HEAD(ctx_info_list);
-
-static ssize_t do_coredump_read(int num, struct spu_context *ctx, void __user *buffer,
+static ssize_t do_coredump_read(int num, struct spu_context *ctx, void *buffer,
                                 size_t size, loff_t *off)
 {
         u64 data;
@@ -50,49 +41,57 @@ static ssize_t do_coredump_read(int num, struct spu_context *ctx, void __user *b
                 return spufs_coredump_read[num].read(ctx, buffer, size, off);
 
         data = spufs_coredump_read[num].get(ctx);
-        ret = copy_to_user(buffer, &data, 8);
-        return ret ? -EFAULT : 8;
+        ret = snprintf(buffer, size, "0x%.16lx", data);
+        if (ret >= size)
+                return size;
+        return ++ret; /* count trailing NULL */
 }
 
 /*
  * These are the only things you should do on a core-file: use only these
  * functions to write out all the necessary info.
  */
-static int spufs_dump_write(struct file *file, const void *addr, int nr)
+static int spufs_dump_write(struct file *file, const void *addr, int nr, loff_t *foffset)
 {
-        return file->f_op->write(file, addr, nr, &file->f_pos) == nr;
-}
+        unsigned long limit = current->signal->rlim[RLIMIT_CORE].rlim_cur;
+        ssize_t written;
 
-static int spufs_dump_seek(struct file *file, loff_t off)
-{
-        if (file->f_op->llseek) {
-                if (file->f_op->llseek(file, off, 0) != off)
-                        return 0;
-        } else
-                file->f_pos = off;
-        return 1;
+        if (*foffset + nr > limit)
+                return -EIO;
+
+        written = file->f_op->write(file, addr, nr, &file->f_pos);
+        *foffset += written;
+
+        if (written != nr)
+                return -EIO;
+
+        return 0;
 }
 
-static void spufs_fill_memsize(struct spufs_ctx_info *ctx_info)
+static int spufs_dump_align(struct file *file, char *buf, loff_t new_off,
+                            loff_t *foffset)
 {
-        struct spu_context *ctx;
-        unsigned long long lslr;
+        int rc, size;
+
+        size = min((loff_t)PAGE_SIZE, new_off - *foffset);
+        memset(buf, 0, size);
+
+        rc = 0;
+        while (rc == 0 && new_off > *foffset) {
+                size = min((loff_t)PAGE_SIZE, new_off - *foffset);
+                rc = spufs_dump_write(file, buf, size, foffset);
+        }
 
-        ctx = ctx_info->ctx;
-        lslr = ctx->csa.priv2.spu_lslr_RW;
-        ctx_info->memsize = lslr + 1;
+        return rc;
 }
 
-static int spufs_ctx_note_size(struct spufs_ctx_info *ctx_info)
+static int spufs_ctx_note_size(struct spu_context *ctx, int dfd)
 {
-        int dfd, memsize, i, sz, total = 0;
+        int i, sz, total = 0;
         char *name;
         char fullname[80];
 
-        dfd = ctx_info->dfd;
-        memsize = ctx_info->memsize;
-
-        for (i = 0; spufs_coredump_read[i].name; i++) {
+        for (i = 0; spufs_coredump_read[i].name != NULL; i++) {
                 name = spufs_coredump_read[i].name;
                 sz = spufs_coredump_read[i].size;
 
@@ -100,39 +99,12 @@ static int spufs_ctx_note_size(struct spufs_ctx_info *ctx_info)
 
                 total += sizeof(struct elf_note);
                 total += roundup(strlen(fullname) + 1, 4);
-                if (!strcmp(name, "mem"))
-                        total += roundup(memsize, 4);
-                else
-                        total += roundup(sz, 4);
+                total += roundup(sz, 4);
         }
 
         return total;
 }
 
-static int spufs_add_one_context(struct file *file, int dfd)
-{
-        struct spu_context *ctx;
-        struct spufs_ctx_info *ctx_info;
-        int size;
-
-        ctx = SPUFS_I(file->f_dentry->d_inode)->i_ctx;
-        if (ctx->flags & SPU_CREATE_NOSCHED)
-                return 0;
-
-        ctx_info = kzalloc(sizeof(*ctx_info), GFP_KERNEL);
-        if (unlikely(!ctx_info))
-                return -ENOMEM;
-
-        ctx_info->dfd = dfd;
-        ctx_info->ctx = ctx;
-
-        spufs_fill_memsize(ctx_info);
-
-        size = spufs_ctx_note_size(ctx_info);
-        list_add(&ctx_info->list, &ctx_info_list);
-        return size;
-}
-
 /*
  * The additional architecture-specific notes for Cell are various
  * context files in the spu context.
@@ -142,33 +114,57 @@ static int spufs_add_one_context(struct file *file, int dfd)
  * internal functionality to dump them without needing to actually
  * open the files.
  */
-static int spufs_arch_notes_size(void)
+static struct spu_context *coredump_next_context(int *fd)
 {
         struct fdtable *fdt = files_fdtable(current->files);
-        int size = 0, fd;
+        struct file *file;
+        struct spu_context *ctx = NULL;
 
-        for (fd = 0; fd < fdt->max_fds; fd++) {
-                if (FD_ISSET(fd, fdt->open_fds)) {
-                        struct file *file = fcheck(fd);
+        for (; *fd < fdt->max_fds; (*fd)++) {
+                if (!FD_ISSET(*fd, fdt->open_fds))
+                        continue;
 
-                        if (file && file->f_op == &spufs_context_fops) {
-                                int rval = spufs_add_one_context(file, fd);
-                                if (rval < 0)
-                                        break;
-                                size += rval;
-                        }
-                }
+                file = fcheck(*fd);
+
+                if (!file || file->f_op != &spufs_context_fops)
+                        continue;
+
+                ctx = SPUFS_I(file->f_dentry->d_inode)->i_ctx;
+                if (ctx->flags & SPU_CREATE_NOSCHED)
+                        continue;
+
+                /* start searching the next fd next time we're called */
+                (*fd)++;
+                break;
         }
 
-        return size;
+        return ctx;
 }
 
-static void spufs_arch_write_note(struct spufs_ctx_info *ctx_info, int i,
-                                struct file *file)
+int spufs_coredump_extra_notes_size(void)
 {
         struct spu_context *ctx;
+        int size = 0, rc, fd;
+
+        fd = 0;
+        while ((ctx = coredump_next_context(&fd)) != NULL) {
+                spu_acquire_saved(ctx);
+                rc = spufs_ctx_note_size(ctx, fd);
+                spu_release_saved(ctx);
+                if (rc < 0)
+                        break;
+
+                size += rc;
+        }
+
+        return size;
+}
+
+static int spufs_arch_write_note(struct spu_context *ctx, int i,
+                                  struct file *file, int dfd, loff_t *foffset)
+{
         loff_t pos = 0;
-        int sz, dfd, rc, total = 0;
+        int sz, rc, nread, total = 0;
         const int bufsz = PAGE_SIZE;
         char *name;
         char fullname[80], *buf;
@@ -176,64 +172,70 @@ static void spufs_arch_write_note(struct spufs_ctx_info *ctx_info, int i,
 
         buf = (void *)get_zeroed_page(GFP_KERNEL);
         if (!buf)
-                return;
+                return -ENOMEM;
 
-        dfd = ctx_info->dfd;
         name = spufs_coredump_read[i].name;
-
-        if (!strcmp(name, "mem"))
-                sz = ctx_info->memsize;
-        else
-                sz = spufs_coredump_read[i].size;
-
-        ctx = ctx_info->ctx;
-        if (!ctx)
-                goto out;
+        sz = spufs_coredump_read[i].size;
 
         sprintf(fullname, "SPU/%d/%s", dfd, name);
         en.n_namesz = strlen(fullname) + 1;
         en.n_descsz = sz;
         en.n_type = NT_SPU;
 
-        if (!spufs_dump_write(file, &en, sizeof(en)))
+        rc = spufs_dump_write(file, &en, sizeof(en), foffset);
+        if (rc)
                 goto out;
-        if (!spufs_dump_write(file, fullname, en.n_namesz))
+
+        rc = spufs_dump_write(file, fullname, en.n_namesz, foffset);
+        if (rc)
                 goto out;
-        if (!spufs_dump_seek(file, roundup((unsigned long)file->f_pos, 4)))
+
+        rc = spufs_dump_align(file, buf, roundup(*foffset, 4), foffset);
+        if (rc)
                 goto out;
 
         do {
-                rc = do_coredump_read(i, ctx, buf, bufsz, &pos);
-                if (rc > 0) {
-                        if (!spufs_dump_write(file, buf, rc))
+                nread = do_coredump_read(i, ctx, buf, bufsz, &pos);
+                if (nread > 0) {
+                        rc = spufs_dump_write(file, buf, nread, foffset);
+                        if (rc)
                                 goto out;
-                        total += rc;
+                        total += nread;
                 }
-        } while (rc == bufsz && total < sz);
+        } while (nread == bufsz && total < sz);
+
+        if (nread < 0) {
+                rc = nread;
+                goto out;
+        }
+
+        rc = spufs_dump_align(file, buf, roundup(*foffset - total + sz, 4),
+                              foffset);
 
-        spufs_dump_seek(file, roundup((unsigned long)file->f_pos
-                                                - total + sz, 4));
 out:
         free_page((unsigned long)buf);
+        return rc;
 }
 
-static void spufs_arch_write_notes(struct file *file)
+int spufs_coredump_extra_notes_write(struct file *file, loff_t *foffset)
 {
-        int j;
-        struct spufs_ctx_info *ctx_info, *next;
-
-        list_for_each_entry_safe(ctx_info, next, &ctx_info_list, list) {
-                spu_acquire_saved(ctx_info->ctx);
-                for (j = 0; j < spufs_coredump_num_notes; j++)
-                        spufs_arch_write_note(ctx_info, j, file);
-                spu_release_saved(ctx_info->ctx);
-                list_del(&ctx_info->list);
-                kfree(ctx_info);
+        struct spu_context *ctx;
+        int fd, j, rc;
+
+        fd = 0;
+        while ((ctx = coredump_next_context(&fd)) != NULL) {
+                spu_acquire_saved(ctx);
+
+                for (j = 0; spufs_coredump_read[j].name != NULL; j++) {
+                        rc = spufs_arch_write_note(ctx, j, file, fd, foffset);
+                        if (rc) {
+                                spu_release_saved(ctx);
+                                return rc;
+                        }
+                }
+
+                spu_release_saved(ctx);
         }
-}
 
-struct spu_coredump_calls spufs_coredump_calls = {
-        .arch_notes_size = spufs_arch_notes_size,
-        .arch_write_notes = spufs_arch_write_notes,
-        .owner = THIS_MODULE,
-};
+        return 0;
+}
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 7de4e919687b..d72b16d6816e 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -199,9 +199,9 @@ static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
 }
 
 #ifdef CONFIG_SPU_FS_64K_LS
-unsigned long spufs_get_unmapped_area(struct file *file, unsigned long addr,
-                                      unsigned long len, unsigned long pgoff,
-                                      unsigned long flags)
+static unsigned long spufs_get_unmapped_area(struct file *file,
+                unsigned long addr, unsigned long len, unsigned long pgoff,
+                unsigned long flags)
 {
         struct spu_context      *ctx = file->private_data;
         struct spu_state        *csa = &ctx->csa;
@@ -1076,6 +1076,36 @@ static const struct file_operations spufs_signal2_nosched_fops = {
         .mmap = spufs_signal2_mmap,
 };
 
+/*
+ * This is a wrapper around DEFINE_SIMPLE_ATTRIBUTE which does the
+ * work of acquiring (or not) the SPU context before calling through
+ * to the actual get routine. The set routine is called directly.
+ */
+#define SPU_ATTR_NOACQUIRE      0
+#define SPU_ATTR_ACQUIRE        1
+#define SPU_ATTR_ACQUIRE_SAVED  2
+
+#define DEFINE_SPUFS_ATTRIBUTE(__name, __get, __set, __fmt, __acquire)  \
+static u64 __##__get(void *data)                                        \
+{                                                                       \
+        struct spu_context *ctx = data;                                 \
+        u64 ret;                                                        \
+                                                                        \
+        if (__acquire == SPU_ATTR_ACQUIRE) {                            \
+                spu_acquire(ctx);                                       \
+                ret = __get(ctx);                                       \
+                spu_release(ctx);                                       \
+        } else if (__acquire == SPU_ATTR_ACQUIRE_SAVED) {               \
+                spu_acquire_saved(ctx);                                 \
+                ret = __get(ctx);                                       \
+                spu_release_saved(ctx);                                 \
+        } else                                                          \
+                ret = __get(ctx);                                       \
+                                                                        \
+        return ret;                                                     \
+}                                                                       \
+DEFINE_SIMPLE_ATTRIBUTE(__name, __##__get, __set, __fmt);
+
 static void spufs_signal1_type_set(void *data, u64 val)
 {
         struct spu_context *ctx = data;
@@ -1085,25 +1115,13 @@ static void spufs_signal1_type_set(void *data, u64 val)
         spu_release(ctx);
 }
 
-static u64 __spufs_signal1_type_get(void *data)
+static u64 spufs_signal1_type_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         return ctx->ops->signal1_type_get(ctx);
 }
+DEFINE_SPUFS_ATTRIBUTE(spufs_signal1_type, spufs_signal1_type_get,
+                       spufs_signal1_type_set, "%llu", SPU_ATTR_ACQUIRE);
 
-static u64 spufs_signal1_type_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret;
-
-        spu_acquire(ctx);
-        ret = __spufs_signal1_type_get(data);
-        spu_release(ctx);
-
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_signal1_type, spufs_signal1_type_get,
-                                        spufs_signal1_type_set, "%llu");
 
 static void spufs_signal2_type_set(void *data, u64 val)
 {
@@ -1114,25 +1132,12 @@ static void spufs_signal2_type_set(void *data, u64 val)
         spu_release(ctx);
 }
 
-static u64 __spufs_signal2_type_get(void *data)
+static u64 spufs_signal2_type_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         return ctx->ops->signal2_type_get(ctx);
 }
-
-static u64 spufs_signal2_type_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret;
-
-        spu_acquire(ctx);
-        ret = __spufs_signal2_type_get(data);
-        spu_release(ctx);
-
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get,
-                                        spufs_signal2_type_set, "%llu");
+DEFINE_SPUFS_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get,
+                       spufs_signal2_type_set, "%llu", SPU_ATTR_ACQUIRE);
 
 #if SPUFS_MMAP_4K
 static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma,
@@ -1608,17 +1613,12 @@ static void spufs_npc_set(void *data, u64 val)
         spu_release(ctx);
 }
 
-static u64 spufs_npc_get(void *data)
+static u64 spufs_npc_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
-        u64 ret;
-        spu_acquire(ctx);
-        ret = ctx->ops->npc_read(ctx);
-        spu_release(ctx);
-        return ret;
+        return ctx->ops->npc_read(ctx);
 }
-DEFINE_SIMPLE_ATTRIBUTE(spufs_npc_ops, spufs_npc_get, spufs_npc_set,
-                        "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_npc_ops, spufs_npc_get, spufs_npc_set,
+                       "0x%llx\n", SPU_ATTR_ACQUIRE);
 
 static void spufs_decr_set(void *data, u64 val)
 {
@@ -1629,24 +1629,13 @@ static void spufs_decr_set(void *data, u64 val)
         spu_release_saved(ctx);
 }
 
-static u64 __spufs_decr_get(void *data)
+static u64 spufs_decr_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         struct spu_lscsa *lscsa = ctx->csa.lscsa;
         return lscsa->decr.slot[0];
 }
-
-static u64 spufs_decr_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret;
-        spu_acquire_saved(ctx);
-        ret = __spufs_decr_get(data);
-        spu_release_saved(ctx);
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_decr_ops, spufs_decr_get, spufs_decr_set,
-                        "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_decr_ops, spufs_decr_get, spufs_decr_set,
+                       "0x%llx\n", SPU_ATTR_ACQUIRE_SAVED);
 
 static void spufs_decr_status_set(void *data, u64 val)
 {
@@ -1659,26 +1648,16 @@ static void spufs_decr_status_set(void *data, u64 val)
         spu_release_saved(ctx);
 }
 
-static u64 __spufs_decr_status_get(void *data)
+static u64 spufs_decr_status_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         if (ctx->csa.priv2.mfc_control_RW & MFC_CNTL_DECREMENTER_RUNNING)
                 return SPU_DECR_STATUS_RUNNING;
         else
                 return 0;
 }
-
-static u64 spufs_decr_status_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret;
-        spu_acquire_saved(ctx);
-        ret = __spufs_decr_status_get(data);
-        spu_release_saved(ctx);
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_decr_status_ops, spufs_decr_status_get,
-                        spufs_decr_status_set, "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_decr_status_ops, spufs_decr_status_get,
+                       spufs_decr_status_set, "0x%llx\n",
+                       SPU_ATTR_ACQUIRE_SAVED);
 
 static void spufs_event_mask_set(void *data, u64 val)
 {
@@ -1689,28 +1668,18 @@ static void spufs_event_mask_set(void *data, u64 val)
         spu_release_saved(ctx);
 }
 
-static u64 __spufs_event_mask_get(void *data)
+static u64 spufs_event_mask_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         struct spu_lscsa *lscsa = ctx->csa.lscsa;
         return lscsa->event_mask.slot[0];
 }
 
-static u64 spufs_event_mask_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret;
-        spu_acquire_saved(ctx);
-        ret = __spufs_event_mask_get(data);
-        spu_release_saved(ctx);
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_event_mask_ops, spufs_event_mask_get,
-                        spufs_event_mask_set, "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_event_mask_ops, spufs_event_mask_get,
+                       spufs_event_mask_set, "0x%llx\n",
+                       SPU_ATTR_ACQUIRE_SAVED);
 
-static u64 __spufs_event_status_get(void *data)
+static u64 spufs_event_status_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         struct spu_state *state = &ctx->csa;
         u64 stat;
         stat = state->spu_chnlcnt_RW[0];
@@ -1718,19 +1687,8 @@ static u64 __spufs_event_status_get(void *data)
                 return state->spu_chnldata_RW[0];
         return 0;
 }
-
-static u64 spufs_event_status_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret = 0;
-
-        spu_acquire_saved(ctx);
-        ret = __spufs_event_status_get(data);
-        spu_release_saved(ctx);
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_event_status_ops, spufs_event_status_get,
-                        NULL, "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_event_status_ops, spufs_event_status_get,
+                       NULL, "0x%llx\n", SPU_ATTR_ACQUIRE_SAVED)
 
 static void spufs_srr0_set(void *data, u64 val)
 {
@@ -1741,45 +1699,32 @@ static void spufs_srr0_set(void *data, u64 val)
         spu_release_saved(ctx);
 }
 
-static u64 spufs_srr0_get(void *data)
+static u64 spufs_srr0_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         struct spu_lscsa *lscsa = ctx->csa.lscsa;
-        u64 ret;
-        spu_acquire_saved(ctx);
-        ret = lscsa->srr0.slot[0];
-        spu_release_saved(ctx);
-        return ret;
+        return lscsa->srr0.slot[0];
 }
-DEFINE_SIMPLE_ATTRIBUTE(spufs_srr0_ops, spufs_srr0_get, spufs_srr0_set,
-                        "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_srr0_ops, spufs_srr0_get, spufs_srr0_set,
+                       "0x%llx\n", SPU_ATTR_ACQUIRE_SAVED)
 
-static u64 spufs_id_get(void *data)
+static u64 spufs_id_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         u64 num;
 
-        spu_acquire(ctx);
         if (ctx->state == SPU_STATE_RUNNABLE)
                 num = ctx->spu->number;
         else
                 num = (unsigned int)-1;
-        spu_release(ctx);
 
         return num;
 }
-DEFINE_SIMPLE_ATTRIBUTE(spufs_id_ops, spufs_id_get, NULL, "0x%llx\n")
-
-static u64 __spufs_object_id_get(void *data)
-{
-        struct spu_context *ctx = data;
-        return ctx->object_id;
-}
+DEFINE_SPUFS_ATTRIBUTE(spufs_id_ops, spufs_id_get, NULL, "0x%llx\n",
+                       SPU_ATTR_ACQUIRE)
 
-static u64 spufs_object_id_get(void *data)
+static u64 spufs_object_id_get(struct spu_context *ctx)
 {
         /* FIXME: Should there really be no locking here? */
-        return __spufs_object_id_get(data);
+        return ctx->object_id;
 }
 
 static void spufs_object_id_set(void *data, u64 id)
@@ -1788,27 +1733,15 @@ static void spufs_object_id_set(void *data, u64 id)
         ctx->object_id = id;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(spufs_object_id_ops, spufs_object_id_get,
-                spufs_object_id_set, "0x%llx\n");
+DEFINE_SPUFS_ATTRIBUTE(spufs_object_id_ops, spufs_object_id_get,
+                       spufs_object_id_set, "0x%llx\n", SPU_ATTR_NOACQUIRE);
 
-static u64 __spufs_lslr_get(void *data)
+static u64 spufs_lslr_get(struct spu_context *ctx)
 {
-        struct spu_context *ctx = data;
         return ctx->csa.priv2.spu_lslr_RW;
 }
-
-static u64 spufs_lslr_get(void *data)
-{
-        struct spu_context *ctx = data;
-        u64 ret;
-
-        spu_acquire_saved(ctx);
-        ret = __spufs_lslr_get(data);
-        spu_release_saved(ctx);
-
-        return ret;
-}
-DEFINE_SIMPLE_ATTRIBUTE(spufs_lslr_ops, spufs_lslr_get, NULL, "0x%llx\n")
+DEFINE_SPUFS_ATTRIBUTE(spufs_lslr_ops, spufs_lslr_get, NULL, "0x%llx\n",
+                       SPU_ATTR_ACQUIRE_SAVED);
 
 static int spufs_info_open(struct inode *inode, struct file *file)
 {
@@ -2231,25 +2164,25 @@ struct tree_descr spufs_dir_nosched_contents[] = {
 };
 
 struct spufs_coredump_reader spufs_coredump_read[] = {
-        { "regs", __spufs_regs_read, NULL, 128 * 16 },
-        { "fpcr", __spufs_fpcr_read, NULL, 16 },
-        { "lslr", NULL, __spufs_lslr_get, 11 },
-        { "decr", NULL, __spufs_decr_get, 11 },
-        { "decr_status", NULL, __spufs_decr_status_get, 11 },
-        { "mem", __spufs_mem_read, NULL, 256 * 1024, },
-        { "signal1", __spufs_signal1_read, NULL, 4 },
-        { "signal1_type", NULL, __spufs_signal1_type_get, 2 },
-        { "signal2", __spufs_signal2_read, NULL, 4 },
-        { "signal2_type", NULL, __spufs_signal2_type_get, 2 },
-        { "event_mask", NULL, __spufs_event_mask_get, 8 },
-        { "event_status", NULL, __spufs_event_status_get, 8 },
-        { "mbox_info", __spufs_mbox_info_read, NULL, 4 },
-        { "ibox_info", __spufs_ibox_info_read, NULL, 4 },
-        { "wbox_info", __spufs_wbox_info_read, NULL, 16 },
-        { "dma_info", __spufs_dma_info_read, NULL, 69 * 8 },
-        { "proxydma_info", __spufs_proxydma_info_read, NULL, 35 * 8 },
-        { "object-id", NULL, __spufs_object_id_get, 19 },
-        { },
+        { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])},
+        { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) },
+        { "lslr", NULL, spufs_lslr_get, 19 },
+        { "decr", NULL, spufs_decr_get, 19 },
+        { "decr_status", NULL, spufs_decr_status_get, 19 },
+        { "mem", __spufs_mem_read, NULL, LS_SIZE, },
+        { "signal1", __spufs_signal1_read, NULL, sizeof(u32) },
+        { "signal1_type", NULL, spufs_signal1_type_get, 19 },
+        { "signal2", __spufs_signal2_read, NULL, sizeof(u32) },
+        { "signal2_type", NULL, spufs_signal2_type_get, 19 },
+        { "event_mask", NULL, spufs_event_mask_get, 19 },
+        { "event_status", NULL, spufs_event_status_get, 19 },
+        { "mbox_info", __spufs_mbox_info_read, NULL, sizeof(u32) },
+        { "ibox_info", __spufs_ibox_info_read, NULL, sizeof(u32) },
+        { "wbox_info", __spufs_wbox_info_read, NULL, 4 * sizeof(u32)},
+        { "dma_info", __spufs_dma_info_read, NULL, sizeof(struct spu_dma_info)},
+        { "proxydma_info", __spufs_proxydma_info_read,
+                           NULL, sizeof(struct spu_proxydma_info)},
+        { "object-id", NULL, spufs_object_id_get, 19 },
+        { "npc", NULL, spufs_npc_get, 19 },
+        { NULL },
 };
-int spufs_coredump_num_notes = ARRAY_SIZE(spufs_coredump_read) - 1;
-
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index b3d0dd118dd0..11098747d09b 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -43,6 +43,7 @@
 
 static struct kmem_cache *spufs_inode_cache;
 char *isolated_loader;
+static int isolated_loader_size;
 
 static struct inode *
 spufs_alloc_inode(struct super_block *sb)
@@ -667,7 +668,8 @@ spufs_parse_options(char *options, struct inode *root)
 
 static void spufs_exit_isolated_loader(void)
 {
-        kfree(isolated_loader);
+        free_pages((unsigned long) isolated_loader,
+                        get_order(isolated_loader_size));
 }
 
 static void
@@ -685,11 +687,12 @@ spufs_init_isolated_loader(void)
         if (!loader)
                 return;
 
-        /* kmalloc should align on a 16 byte boundary..* */
-        isolated_loader = kmalloc(size, GFP_KERNEL);
+        /* the loader must be align on a 16 byte boundary */
+        isolated_loader = (char *)__get_free_pages(GFP_KERNEL, get_order(size));
         if (!isolated_loader)
                 return;
 
+        isolated_loader_size = size;
         memcpy(isolated_loader, loader, size);
         printk(KERN_INFO "spufs: SPU isolation mode enabled\n");
 }
@@ -787,16 +790,11 @@ static int __init spufs_init(void)
         ret = register_spu_syscalls(&spufs_calls);
         if (ret)
                 goto out_fs;
-        ret = register_arch_coredump_calls(&spufs_coredump_calls);
-        if (ret)
-                goto out_syscalls;
 
         spufs_init_isolated_loader();
 
         return 0;
 
-out_syscalls:
-        unregister_spu_syscalls(&spufs_calls);
 out_fs:
         unregister_filesystem(&spufs_type);
 out_sched:
@@ -812,7 +810,6 @@ static void __exit spufs_exit(void)
 {
         spu_sched_exit();
         spufs_exit_isolated_loader();
-        unregister_arch_coredump_calls(&spufs_coredump_calls);
         unregister_spu_syscalls(&spufs_calls);
         unregister_filesystem(&spufs_type);
         kmem_cache_destroy(spufs_inode_cache);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index 958f10e90fdd..1ce5e22ea5f4 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -205,7 +205,7 @@ static int spu_reacquire_runnable(struct spu_context *ctx, u32 *npc,
  * This means we can only do a very rough approximation of POSIX
  * signal semantics.
  */
-int spu_handle_restartsys(struct spu_context *ctx, long *spu_ret,
+static int spu_handle_restartsys(struct spu_context *ctx, long *spu_ret,
                           unsigned int *npc)
 {
         int ret;
@@ -241,7 +241,7 @@ int spu_handle_restartsys(struct spu_context *ctx, long *spu_ret,
         return ret;
 }
 
-int spu_process_callback(struct spu_context *ctx)
+static int spu_process_callback(struct spu_context *ctx)
 {
         struct spu_syscall_block s;
         u32 ls_pointer, npc;
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 5bebe7fbe056..4d257b3f9336 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -230,8 +230,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
 
         if (ctx->flags & SPU_CREATE_NOSCHED)
                 atomic_inc(&cbe_spu_info[spu->node].reserved_spus);
-        if (!list_empty(&ctx->aff_list))
-                atomic_inc(&ctx->gang->aff_sched_count);
 
         ctx->stats.slb_flt_base = spu->stats.slb_flt;
         ctx->stats.class2_intr_base = spu->stats.class2_intr;
@@ -392,7 +390,6 @@ static int has_affinity(struct spu_context *ctx)
         if (list_empty(&ctx->aff_list))
                 return 0;
 
-        mutex_lock(&gang->aff_mutex);
         if (!gang->aff_ref_spu) {
                 if (!(gang->aff_flags & AFF_MERGED))
                         aff_merge_remaining_ctxs(gang);
@@ -400,7 +397,6 @@ static int has_affinity(struct spu_context *ctx)
                         aff_set_offsets(gang);
                 aff_set_ref_point_location(gang);
         }
-        mutex_unlock(&gang->aff_mutex);
 
         return gang->aff_ref_spu != NULL;
 }
@@ -418,9 +414,16 @@ static void spu_unbind_context(struct spu *spu, struct spu_context *ctx)
 
         if (spu->ctx->flags & SPU_CREATE_NOSCHED)
                 atomic_dec(&cbe_spu_info[spu->node].reserved_spus);
-        if (!list_empty(&ctx->aff_list))
-                if (atomic_dec_and_test(&ctx->gang->aff_sched_count))
-                        ctx->gang->aff_ref_spu = NULL;
+
+        if (ctx->gang){
+                mutex_lock(&ctx->gang->aff_mutex);
+                if (has_affinity(ctx)) {
+                        if (atomic_dec_and_test(&ctx->gang->aff_sched_count))
+                                ctx->gang->aff_ref_spu = NULL;
+                }
+                mutex_unlock(&ctx->gang->aff_mutex);
+        }
+
         spu_switch_notify(spu, NULL);
         spu_unmap_mappings(ctx);
         spu_save(&ctx->csa, spu);
@@ -511,20 +514,32 @@ static void spu_prio_wait(struct spu_context *ctx)
 
 static struct spu *spu_get_idle(struct spu_context *ctx)
 {
-        struct spu *spu;
+        struct spu *spu, *aff_ref_spu;
         int node, n;
 
-        if (has_affinity(ctx)) {
-                node = ctx->gang->aff_ref_spu->node;
+        if (ctx->gang) {
+                mutex_lock(&ctx->gang->aff_mutex);
+                if (has_affinity(ctx)) {
+                        aff_ref_spu = ctx->gang->aff_ref_spu;
+                        atomic_inc(&ctx->gang->aff_sched_count);
+                        mutex_unlock(&ctx->gang->aff_mutex);
+                        node = aff_ref_spu->node;
 
-                mutex_lock(&cbe_spu_info[node].list_mutex);
-                spu = ctx_location(ctx->gang->aff_ref_spu, ctx->aff_offset, node);
-                if (spu && spu->alloc_state == SPU_FREE)
-                        goto found;
-                mutex_unlock(&cbe_spu_info[node].list_mutex);
-                return NULL;
-        }
+                        mutex_lock(&cbe_spu_info[node].list_mutex);
+                        spu = ctx_location(aff_ref_spu, ctx->aff_offset, node);
+                        if (spu && spu->alloc_state == SPU_FREE)
+                                goto found;
+                        mutex_unlock(&cbe_spu_info[node].list_mutex);
 
+                        mutex_lock(&ctx->gang->aff_mutex);
+                        if (atomic_dec_and_test(&ctx->gang->aff_sched_count))
+                                ctx->gang->aff_ref_spu = NULL;
+                        mutex_unlock(&ctx->gang->aff_mutex);
+
+                        return NULL;
+                }
+                mutex_unlock(&ctx->gang->aff_mutex);
+        }
         node = cpu_to_node(raw_smp_processor_id());
         for (n = 0; n < MAX_NUMNODES; n++, node++) {
                 node = (node < MAX_NUMNODES) ? node : 0;
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 2bfdeb8ea8bd..ca47b991bda5 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -200,9 +200,14 @@ extern struct tree_descr spufs_dir_contents[];
 extern struct tree_descr spufs_dir_nosched_contents[];
 
 /* system call implementation */
+extern struct spufs_calls spufs_calls;
 long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *status);
 long spufs_create(struct nameidata *nd, unsigned int flags,
                         mode_t mode, struct file *filp);
+/* ELF coredump callbacks for writing SPU ELF notes */
+extern int spufs_coredump_extra_notes_size(void);
+extern int spufs_coredump_extra_notes_write(struct file *file, loff_t *foffset);
+
 extern const struct file_operations spufs_context_fops;
 
 /* gang management */
@@ -295,7 +300,7 @@ struct spufs_coredump_reader {
         char *name;
         ssize_t (*read)(struct spu_context *ctx,
                         char __user *buffer, size_t size, loff_t *pos);
-        u64 (*get)(void *data);
+        u64 (*get)(struct spu_context *ctx);
         size_t size;
 };
 extern struct spufs_coredump_reader spufs_coredump_read[];
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 27ffdae98e5a..de7e5ee451d2 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -1559,15 +1559,15 @@ static inline void restore_decr_wrapped(struct spu_state *csa, struct spu *spu)
          *     "wrapped" flag is set, OR in a '1' to
          *     CSA.SPU_Event_Status[Tm].
          */
-        if (csa->lscsa->decr_status.slot[0] & SPU_DECR_STATUS_WRAPPED) {
-                csa->spu_chnldata_RW[0] |= 0x20;
-        }
-        if ((csa->lscsa->decr_status.slot[0] & SPU_DECR_STATUS_WRAPPED) &&
-            (csa->spu_chnlcnt_RW[0] == 0 &&
-             ((csa->spu_chnldata_RW[2] & 0x20) == 0x0) &&
-             ((csa->spu_chnldata_RW[0] & 0x20) != 0x1))) {
+        if (!(csa->lscsa->decr_status.slot[0] & SPU_DECR_STATUS_WRAPPED))
+                return;
+
+        if ((csa->spu_chnlcnt_RW[0] == 0) &&
+            (csa->spu_chnldata_RW[1] & 0x20) &&
+            !(csa->spu_chnldata_RW[0] & 0x20))
                 csa->spu_chnlcnt_RW[0] = 1;
-        }
+
+        csa->spu_chnldata_RW[0] |= 0x20;
 }
 
 static inline void restore_ch_part1(struct spu_state *csa, struct spu *spu)
@@ -2146,19 +2146,6 @@ int spu_restore(struct spu_state *new, struct spu *spu)
 }
 EXPORT_SYMBOL_GPL(spu_restore);
 
-/**
- * spu_harvest - SPU harvest (reset) operation
- * @spu: pointer to SPU iomem structure.
- *
- * Perform SPU harvest (reset) operation.
- */
-void spu_harvest(struct spu *spu)
-{
-        acquire_spu_lock(spu);
-        harvest(NULL, spu);
-        release_spu_lock(spu);
-}
-
 static void init_prob(struct spu_state *csa)
 {
         csa->spu_chnlcnt_RW[9] = 1;
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c
index 43f0fb88abbc..2c34f7170190 100644
--- a/arch/powerpc/platforms/cell/spufs/syscalls.c
+++ b/arch/powerpc/platforms/cell/spufs/syscalls.c
@@ -58,26 +58,8 @@ out:
         return ret;
 }
 
-#ifndef MODULE
-asmlinkage long sys_spu_run(int fd, __u32 __user *unpc, __u32 __user *ustatus)
-{
-        int fput_needed;
-        struct file *filp;
-        long ret;
-
-        ret = -EBADF;
-        filp = fget_light(fd, &fput_needed);
-        if (filp) {
-                ret = do_spu_run(filp, unpc, ustatus);
-                fput_light(filp, fput_needed);
-        }
-
-        return ret;
-}
-#endif
-
-asmlinkage long do_spu_create(const char __user *pathname, unsigned int flags,
-                                mode_t mode, struct file *neighbor)
+static long do_spu_create(const char __user *pathname, unsigned int flags,
+                mode_t mode, struct file *neighbor)
 {
         char *tmp;
         int ret;
@@ -99,32 +81,10 @@ asmlinkage long do_spu_create(const char __user *pathname, unsigned int flags,
         return ret;
 }
 
-#ifndef MODULE
-asmlinkage long sys_spu_create(const char __user *pathname, unsigned int flags,
-                                mode_t mode, int neighbor_fd)
-{
-        int fput_needed;
-        struct file *neighbor;
-        long ret;
-
-        if (flags & SPU_CREATE_AFFINITY_SPU) {
-                ret = -EBADF;
-                neighbor = fget_light(neighbor_fd, &fput_needed);
-                if (neighbor) {
-                        ret = do_spu_create(pathname, flags, mode, neighbor);
-                        fput_light(neighbor, fput_needed);
-                }
-        }
-        else {
-                ret = do_spu_create(pathname, flags, mode, NULL);
-        }
-
-        return ret;
-}
-#endif
-
 struct spufs_calls spufs_calls = {
         .create_thread = do_spu_create,
         .spu_run = do_spu_run,
+        .coredump_extra_notes_size = spufs_coredump_extra_notes_size,
+        .coredump_extra_notes_write = spufs_coredump_extra_notes_write,
         .owner = THIS_MODULE,
 };
diff --git a/arch/powerpc/platforms/celleb/Kconfig b/arch/powerpc/platforms/celleb/Kconfig
index 2db1e293433e..04748d410fc9 100644
--- a/arch/powerpc/platforms/celleb/Kconfig
+++ b/arch/powerpc/platforms/celleb/Kconfig
@@ -2,6 +2,7 @@ config PPC_CELLEB
         bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
         depends on PPC_MULTIPLATFORM && PPC64
         select PPC_CELL
+        select PPC_INDIRECT_IO
         select PPC_OF_PLATFORM_PCI
         select HAS_TXX9_SERIAL
         select PPC_UDBG_BEAT
diff --git a/arch/powerpc/platforms/celleb/Makefile b/arch/powerpc/platforms/celleb/Makefile
index 5240046d8671..889d43f715ea 100644
--- a/arch/powerpc/platforms/celleb/Makefile
+++ b/arch/powerpc/platforms/celleb/Makefile
@@ -1,6 +1,7 @@
 obj-y                           += interrupt.o iommu.o setup.o \
-                                   htab.o beat.o pci.o \
-                                   scc_epci.o scc_uhc.o hvCall.o
+                                   htab.o beat.o hvCall.o pci.o \
+                                   scc_epci.o scc_uhc.o \
+                                   io-workarounds.o
 
 obj-$(CONFIG_SMP)               += smp.o
 obj-$(CONFIG_PPC_UDBG_BEAT)     += udbg_beat.o
diff --git a/arch/powerpc/platforms/celleb/beat.c b/arch/powerpc/platforms/celleb/beat.c
index 99341ce8a697..93ebb7d85120 100644
--- a/arch/powerpc/platforms/celleb/beat.c
+++ b/arch/powerpc/platforms/celleb/beat.c
@@ -22,16 +22,24 @@
 #include <linux/init.h>
 #include <linux/err.h>
 #include <linux/rtc.h>
+#include <linux/interrupt.h>
+#include <linux/irqreturn.h>
+#include <linux/reboot.h>
 
 #include <asm/hvconsole.h>
 #include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/firmware.h>
 
 #include "beat_wrapper.h"
 #include "beat.h"
+#include "interrupt.h"
+
+static int beat_pm_poweroff_flag;
 
 void beat_restart(char *cmd)
 {
-        beat_shutdown_logical_partition(1);
+        beat_shutdown_logical_partition(!beat_pm_poweroff_flag);
 }
 
 void beat_power_off(void)
@@ -158,6 +166,102 @@ int64_t beat_put_term_char(u64 vterm, u64 len, u64 t1, u64 t2)
         return beat_put_characters_to_console(vterm, len, (u8*)db);
 }
 
+void beat_power_save(void)
+{
+        beat_pause(0);
+}
+
+#ifdef CONFIG_KEXEC
+void beat_kexec_cpu_down(int crash, int secondary)
+{
+        beatic_deinit_IRQ();
+}
+#endif
+
+static irqreturn_t beat_power_event(int virq, void *arg)
+{
+        printk(KERN_DEBUG "Beat: power button pressed\n");
+        beat_pm_poweroff_flag = 1;
+        ctrl_alt_del();
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t beat_reset_event(int virq, void *arg)
+{
+        printk(KERN_DEBUG "Beat: reset button pressed\n");
+        beat_pm_poweroff_flag = 0;
+        ctrl_alt_del();
+        return IRQ_HANDLED;
+}
+
+static struct beat_event_list {
+        const char *typecode;
+        irq_handler_t handler;
+        unsigned int virq;
+} beat_event_list[] = {
+        { "power", beat_power_event, 0 },
+        { "reset", beat_reset_event, 0 },
+};
+
+static int __init beat_register_event(void)
+{
+        u64 path[4], data[2];
+        int rc, i;
+        unsigned int virq;
+
+        for (i = 0; i < ARRAY_SIZE(beat_event_list); i++) {
+                struct beat_event_list *ev = &beat_event_list[i];
+
+                if (beat_construct_event_receive_port(data) != 0) {
+                        printk(KERN_ERR "Beat: "
+                               "cannot construct event receive port for %s\n",
+                               ev->typecode);
+                        return -EINVAL;
+                }
+
+                virq = irq_create_mapping(NULL, data[0]);
+                if (virq == NO_IRQ) {
+                        printk(KERN_ERR "Beat: failed to get virtual IRQ"
+                               " for event receive port for %s\n",
+                               ev->typecode);
+                        beat_destruct_event_receive_port(data[0]);
+                        return -EIO;
+                }
+                ev->virq = virq;
+
+                rc = request_irq(virq, ev->handler, IRQF_DISABLED,
+                                      ev->typecode, NULL);
+                if (rc != 0) {
+                        printk(KERN_ERR "Beat: failed to request virtual IRQ"
+                               " for event receive port for %s\n",
+                               ev->typecode);
+                        beat_destruct_event_receive_port(data[0]);
+                        return rc;
+                }
+
+                path[0] = 0x1000000065780000ul; /* 1,ex */
+                path[1] = 0x627574746f6e0000ul; /* button */
+                path[2] = 0;
+                strncpy((char *)&path[2], ev->typecode, 8);
+                path[3] = 0;
+                data[1] = 0;
+
+                beat_create_repository_node(path, data);
+        }
+        return 0;
+}
+
+static int __init beat_event_init(void)
+{
+        if (!firmware_has_feature(FW_FEATURE_BEAT))
+                return -EINVAL;
+
+        beat_pm_poweroff_flag = 0;
+        return beat_register_event();
+}
+
+device_initcall(beat_event_init);
+
 EXPORT_SYMBOL(beat_get_term_char);
 EXPORT_SYMBOL(beat_put_term_char);
 EXPORT_SYMBOL(beat_halt_code);
diff --git a/arch/powerpc/platforms/celleb/beat.h b/arch/powerpc/platforms/celleb/beat.h
index 2b16bf3bee89..b2e292df13ca 100644
--- a/arch/powerpc/platforms/celleb/beat.h
+++ b/arch/powerpc/platforms/celleb/beat.h
@@ -36,5 +36,7 @@ ssize_t beat_nvram_get_size(void);
 ssize_t beat_nvram_read(char *, size_t, loff_t *);
 ssize_t beat_nvram_write(char *, size_t, loff_t *);
 int beat_set_xdabr(unsigned long);
+void beat_power_save(void);
+void beat_kexec_cpu_down(int, int);
 
 #endif /* _CELLEB_BEAT_H */
diff --git a/arch/powerpc/platforms/celleb/beat_syscall.h b/arch/powerpc/platforms/celleb/beat_syscall.h
index 14e16974773f..8580dc7e1798 100644
--- a/arch/powerpc/platforms/celleb/beat_syscall.h
+++ b/arch/powerpc/platforms/celleb/beat_syscall.h
@@ -157,4 +157,8 @@
 #define HV_rtc_write __BEAT_ADD_VENDOR_ID(0x191, 1)
 #define HV_eeprom_read __BEAT_ADD_VENDOR_ID(0x192, 1)
 #define HV_eeprom_write __BEAT_ADD_VENDOR_ID(0x193, 1)
+#define HV_insert_htab_entry3 __BEAT_ADD_VENDOR_ID(0x104, 1)
+#define HV_invalidate_htab_entry3 __BEAT_ADD_VENDOR_ID(0x105, 1)
+#define HV_update_htab_permission3 __BEAT_ADD_VENDOR_ID(0x106, 1)
+#define HV_clear_htab3 __BEAT_ADD_VENDOR_ID(0x107, 1)
 #endif
diff --git a/arch/powerpc/platforms/celleb/beat_wrapper.h b/arch/powerpc/platforms/celleb/beat_wrapper.h
index 76ea0a6a9011..cbc1487df7de 100644
--- a/arch/powerpc/platforms/celleb/beat_wrapper.h
+++ b/arch/powerpc/platforms/celleb/beat_wrapper.h
@@ -98,6 +98,37 @@ static inline s64 beat_write_htab_entry(u64 htab_id, u64 slot,
         return ret;
 }
 
+static inline s64 beat_insert_htab_entry3(u64 htab_id, u64 group,
+        u64 hpte_v, u64 hpte_r, u64 mask_v, u64 value_v, u64 *slot)
+{
+        u64 dummy[1];
+        s64 ret;
+
+        ret = beat_hcall1(HV_insert_htab_entry3, dummy, htab_id, group,
+                hpte_v, hpte_r, mask_v, value_v);
+        *slot = dummy[0];
+        return ret;
+}
+
+static inline s64 beat_invalidate_htab_entry3(u64 htab_id, u64 group,
+        u64 va, u64 pss)
+{
+        return beat_hcall_norets(HV_invalidate_htab_entry3,
+                htab_id, group, va, pss);
+}
+
+static inline s64 beat_update_htab_permission3(u64 htab_id, u64 group,
+        u64 va, u64 pss, u64 ptel_mask, u64 ptel_value)
+{
+        return beat_hcall_norets(HV_update_htab_permission3,
+                htab_id, group, va, pss, ptel_mask, ptel_value);
+}
+
+static inline s64 beat_clear_htab3(u64 htab_id)
+{
+        return beat_hcall_norets(HV_clear_htab3, htab_id);
+}
+
 static inline void beat_shutdown_logical_partition(u64 code)
 {
         (void)beat_hcall_norets(HV_shutdown_logical_partition, code);
@@ -217,4 +248,41 @@ static inline s64 beat_put_iopte(u64 ioas_id, u64 io_addr, u64 real_addr,
                 ioid, flags);
 }
 
+static inline s64 beat_construct_event_receive_port(u64 *port)
+{
+        u64 dummy[1];
+        s64 ret;
+
+        ret = beat_hcall1(HV_construct_event_receive_port, dummy);
+        *port = dummy[0];
+        return ret;
+}
+
+static inline s64 beat_destruct_event_receive_port(u64 port)
+{
+        s64 ret;
+
+        ret = beat_hcall_norets(HV_destruct_event_receive_port, port);
+        return ret;
+}
+
+static inline s64 beat_create_repository_node(u64 path[4], u64 data[2])
+{
+        s64 ret;
+
+        ret = beat_hcall_norets(HV_create_repository_node2,
+                path[0], path[1], path[2], path[3], data[0], data[1]);
+        return ret;
+}
+
+static inline s64 beat_get_repository_node_value(u64 lpid, u64 path[4],
+        u64 data[2])
+{
+        s64 ret;
+
+        ret = beat_hcall2(HV_get_repository_node_value2, data,
+                lpid, path[0], path[1], path[2], path[3]);
+        return ret;
+}
+
 #endif
diff --git a/arch/powerpc/platforms/celleb/htab.c b/arch/powerpc/platforms/celleb/htab.c
index 279d7339e170..5e75c77ea8f3 100644
--- a/arch/powerpc/platforms/celleb/htab.c
+++ b/arch/powerpc/platforms/celleb/htab.c
@@ -306,3 +306,133 @@ void __init hpte_init_beat(void)
         ppc_md.hpte_remove      = beat_lpar_hpte_remove;
         ppc_md.hpte_clear_all   = beat_lpar_hptab_clear;
 }
+
+static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
+                                  unsigned long va, unsigned long pa,
+                                  unsigned long rflags, unsigned long vflags,
+                                  int psize)
+{
+        unsigned long lpar_rc;
+        unsigned long slot;
+        unsigned long hpte_v, hpte_r;
+
+        /* same as iseries */
+        if (vflags & HPTE_V_SECONDARY)
+                return -1;
+
+        if (!(vflags & HPTE_V_BOLTED))
+                DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
+                        "rflags=%lx, vflags=%lx, psize=%d)\n",
+                hpte_group, va, pa, rflags, vflags, psize);
+
+        hpte_v = hpte_encode_v(va, psize) | vflags | HPTE_V_VALID;
+        hpte_r = hpte_encode_r(pa, psize) | rflags;
+
+        if (!(vflags & HPTE_V_BOLTED))
+                DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
+
+        if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
+                hpte_r &= ~_PAGE_COHERENT;
+
+        /* insert into not-volted entry */
+        lpar_rc = beat_insert_htab_entry3(0, hpte_group, hpte_v, hpte_r,
+                HPTE_V_BOLTED, 0, &slot);
+        /*
+         * Since we try and ioremap PHBs we don't own, the pte insert
+         * will fail. However we must catch the failure in hash_page
+         * or we will loop forever, so return -2 in this case.
+         */
+        if (unlikely(lpar_rc != 0)) {
+                if (!(vflags & HPTE_V_BOLTED))
+                        DBG_LOW(" lpar err %lx\n", lpar_rc);
+                return -2;
+        }
+        if (!(vflags & HPTE_V_BOLTED))
+                DBG_LOW(" -> slot: %lx\n", slot);
+
+        /* We have to pass down the secondary bucket bit here as well */
+        return (slot ^ hpte_group) & 15;
+}
+
+/*
+ * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
+ * the low 3 bits of flags happen to line up.  So no transform is needed.
+ * We can probably optimize here and assume the high bits of newpp are
+ * already zero.  For now I am paranoid.
+ */
+static long beat_lpar_hpte_updatepp_v3(unsigned long slot,
+                                    unsigned long newpp,
+                                    unsigned long va,
+                                    int psize, int local)
+{
+        unsigned long lpar_rc;
+        unsigned long want_v;
+        unsigned long pss;
+
+        want_v = hpte_encode_v(va, psize);
+        pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
+
+        DBG_LOW("    update: "
+                "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
+                want_v & HPTE_V_AVPN, slot, psize, newpp);
+
+        lpar_rc = beat_update_htab_permission3(0, slot, want_v, pss, 7, newpp);
+
+        if (lpar_rc == 0xfffffff7) {
+                DBG_LOW("not found !\n");
+                return -1;
+        }
+
+        DBG_LOW("ok\n");
+
+        BUG_ON(lpar_rc != 0);
+
+        return 0;
+}
+
+static void beat_lpar_hpte_invalidate_v3(unsigned long slot, unsigned long va,
+                                         int psize, int local)
+{
+        unsigned long want_v;
+        unsigned long lpar_rc;
+        unsigned long pss;
+
+        DBG_LOW("    inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
+                slot, va, psize, local);
+        want_v = hpte_encode_v(va, psize);
+        pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
+
+        lpar_rc = beat_invalidate_htab_entry3(0, slot, want_v, pss);
+
+        /* E_busy can be valid output: page may be already replaced */
+        BUG_ON(lpar_rc != 0 && lpar_rc != 0xfffffff7);
+}
+
+static int64_t _beat_lpar_hptab_clear_v3(void)
+{
+        return beat_clear_htab3(0);
+}
+
+static void beat_lpar_hptab_clear_v3(void)
+{
+        _beat_lpar_hptab_clear_v3();
+}
+
+void __init hpte_init_beat_v3(void)
+{
+        if (_beat_lpar_hptab_clear_v3() == 0) {
+                ppc_md.hpte_invalidate  = beat_lpar_hpte_invalidate_v3;
+                ppc_md.hpte_updatepp    = beat_lpar_hpte_updatepp_v3;
+                ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
+                ppc_md.hpte_insert      = beat_lpar_hpte_insert_v3;
+                ppc_md.hpte_remove      = beat_lpar_hpte_remove;
+                ppc_md.hpte_clear_all   = beat_lpar_hptab_clear_v3;
+        } else {
+                ppc_md.hpte_invalidate  = beat_lpar_hpte_invalidate;
+                ppc_md.hpte_updatepp    = beat_lpar_hpte_updatepp;
+                ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
+                ppc_md.hpte_insert      = beat_lpar_hpte_insert;
+                ppc_md.hpte_remove      = beat_lpar_hpte_remove;
+                ppc_md.hpte_clear_all   = beat_lpar_hptab_clear;
+        }
+}
diff --git a/arch/powerpc/platforms/celleb/interrupt.c b/arch/powerpc/platforms/celleb/interrupt.c
index 98e6665681d3..c7c68ca70c82 100644
--- a/arch/powerpc/platforms/celleb/interrupt.c
+++ b/arch/powerpc/platforms/celleb/interrupt.c
@@ -175,11 +175,18 @@ static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
+static int beatic_pic_host_match(struct irq_host *h, struct device_node *np)
+{
+        /* Match all */
+        return 1;
+}
+
 static struct irq_host_ops beatic_pic_host_ops = {
         .map = beatic_pic_host_map,
         .remap = beatic_pic_host_remap,
         .unmap = beatic_pic_host_unmap,
         .xlate = beatic_pic_host_xlate,
+        .match = beatic_pic_host_match,
 };
 
 /*
@@ -242,7 +249,7 @@ void __init beatic_init_IRQ(void)
         ppc_md.get_irq = beatic_get_irq;
 
         /* Allocate an irq host */
-        beatic_host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0,
+        beatic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
                                          &beatic_pic_host_ops,
                                          0);
         BUG_ON(beatic_host == NULL);
diff --git a/arch/powerpc/platforms/celleb/io-workarounds.c b/arch/powerpc/platforms/celleb/io-workarounds.c
new file mode 100644
index 000000000000..2b912140bcbb
--- /dev/null
+++ b/arch/powerpc/platforms/celleb/io-workarounds.c
@@ -0,0 +1,279 @@
+/*
+ * Support for Celleb io workarounds
+ *
+ * (C) Copyright 2006-2007 TOSHIBA CORPORATION
+ *
+ * This file is based to arch/powerpc/platform/cell/io-workarounds.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#undef DEBUG
+
+#include <linux/of_device.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/ppc-pci.h>
+
+#include "pci.h"
+
+#define MAX_CELLEB_PCI_BUS      4
+
+void *celleb_dummy_page_va;
+
+static struct celleb_pci_bus {
+        struct pci_controller *phb;
+        void (*dummy_read)(struct pci_controller *);
+} celleb_pci_busses[MAX_CELLEB_PCI_BUS];
+
+static int celleb_pci_count = 0;
+
+static struct celleb_pci_bus *celleb_pci_find(unsigned long vaddr,
+                                              unsigned long paddr)
+{
+        int i, j;
+        struct resource *res;
+
+        for (i = 0; i < celleb_pci_count; i++) {
+                struct celleb_pci_bus *bus = &celleb_pci_busses[i];
+                struct pci_controller *phb = bus->phb;
+                if (paddr)
+                        for (j = 0; j < 3; j++) {
+                                res = &phb->mem_resources[j];
+                                if (paddr >= res->start && paddr <= res->end)
+                                        return bus;
+                        }
+                res = &phb->io_resource;
+                if (vaddr && vaddr >= res->start && vaddr <= res->end)
+                        return bus;
+        }
+        return NULL;
+}
+
+static void celleb_io_flush(const PCI_IO_ADDR addr)
+{
+        struct celleb_pci_bus *bus;
+        int token;
+
+        token = PCI_GET_ADDR_TOKEN(addr);
+
+        if (token && token <= celleb_pci_count)
+                bus = &celleb_pci_busses[token - 1];
+        else {
+                unsigned long vaddr, paddr;
+                pte_t *ptep;
+
+                vaddr = (unsigned long)PCI_FIX_ADDR(addr);
+                if (vaddr < PHB_IO_BASE || vaddr >= PHB_IO_END)
+                        return;
+
+                ptep = find_linux_pte(init_mm.pgd, vaddr);
+                if (ptep == NULL)
+                        paddr = 0;
+                else
+                        paddr = pte_pfn(*ptep) << PAGE_SHIFT;
+                bus = celleb_pci_find(vaddr, paddr);
+
+                if (bus == NULL)
+                        return;
+        }
+
+        if (bus->dummy_read)
+                bus->dummy_read(bus->phb);
+}
+
+static u8 celleb_readb(const PCI_IO_ADDR addr)
+{
+        u8 val;
+        val = __do_readb(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static u16 celleb_readw(const PCI_IO_ADDR addr)
+{
+        u16 val;
+        val = __do_readw(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static u32 celleb_readl(const PCI_IO_ADDR addr)
+{
+        u32 val;
+        val = __do_readl(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static u64 celleb_readq(const PCI_IO_ADDR addr)
+{
+        u64 val;
+        val = __do_readq(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static u16 celleb_readw_be(const PCI_IO_ADDR addr)
+{
+        u16 val;
+        val = __do_readw_be(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static u32 celleb_readl_be(const PCI_IO_ADDR addr)
+{
+        u32 val;
+        val = __do_readl_be(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static u64 celleb_readq_be(const PCI_IO_ADDR addr)
+{
+        u64 val;
+        val = __do_readq_be(addr);
+        celleb_io_flush(addr);
+        return val;
+}
+
+static void celleb_readsb(const PCI_IO_ADDR addr,
+                          void *buf, unsigned long count)
+{
+        __do_readsb(addr, buf, count);
+        celleb_io_flush(addr);
+}
+
+static void celleb_readsw(const PCI_IO_ADDR addr,
+                          void *buf, unsigned long count)
+{
+        __do_readsw(addr, buf, count);
+        celleb_io_flush(addr);
+}
+
+static void celleb_readsl(const PCI_IO_ADDR addr,
+                          void *buf, unsigned long count)
+{
+        __do_readsl(addr, buf, count);
+        celleb_io_flush(addr);
+}
+
+static void celleb_memcpy_fromio(void *dest,
+                                 const PCI_IO_ADDR src,
+                                 unsigned long n)
+{
+        __do_memcpy_fromio(dest, src, n);
+        celleb_io_flush(src);
+}
+
+static void __iomem *celleb_ioremap(unsigned long addr,
+                                     unsigned long size,
+                                     unsigned long flags)
+{
+        struct celleb_pci_bus *bus;
+        void __iomem *res = __ioremap(addr, size, flags);
+        int busno;
+
+        bus = celleb_pci_find(0, addr);
+        if (bus != NULL) {
+                busno = bus - celleb_pci_busses;
+                PCI_SET_ADDR_TOKEN(res, busno + 1);
+        }
+        return res;
+}
+
+static void celleb_iounmap(volatile void __iomem *addr)
+{
+        return __iounmap(PCI_FIX_ADDR(addr));
+}
+
+static struct ppc_pci_io celleb_pci_io __initdata = {
+        .readb = celleb_readb,
+        .readw = celleb_readw,
+        .readl = celleb_readl,
+        .readq = celleb_readq,
+        .readw_be = celleb_readw_be,
+        .readl_be = celleb_readl_be,
+        .readq_be = celleb_readq_be,
+        .readsb = celleb_readsb,
+        .readsw = celleb_readsw,
+        .readsl = celleb_readsl,
+        .memcpy_fromio = celleb_memcpy_fromio,
+};
+
+void __init celleb_pci_add_one(struct pci_controller *phb,
+                               void (*dummy_read)(struct pci_controller *))
+{
+        struct celleb_pci_bus *bus = &celleb_pci_busses[celleb_pci_count];
+        struct device_node *np = phb->arch_data;
+
+        if (celleb_pci_count >= MAX_CELLEB_PCI_BUS) {
+                printk(KERN_ERR "Too many pci bridges, workarounds"
+                       " disabled for %s\n", np->full_name);
+                return;
+        }
+
+        celleb_pci_count++;
+
+        bus->phb = phb;
+        bus->dummy_read = dummy_read;
+}
+
+static struct of_device_id celleb_pci_workaround_match[] __initdata = {
+        {
+                .name = "pci-pseudo",
+                .data = fake_pci_workaround_init,
+        }, {
+                .name = "epci",
+                .data = epci_workaround_init,
+        }, {
+        },
+};
+
+int __init celleb_pci_workaround_init(void)
+{
+        struct pci_controller *phb;
+        struct device_node *node;
+        const struct  of_device_id *match;
+        void (*init_func)(struct pci_controller *);
+
+        celleb_dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
+        if (!celleb_dummy_page_va) {
+                printk(KERN_ERR "Celleb: dummy read disabled."
+                        "Alloc celleb_dummy_page_va failed\n");
+                return 1;
+        }
+
+        list_for_each_entry(phb, &hose_list, list_node) {
+                node = phb->arch_data;
+                match = of_match_node(celleb_pci_workaround_match, node);
+
+                if (match) {
+                        init_func = match->data;
+                        (*init_func)(phb);
+                }
+        }
+
+        ppc_pci_io = celleb_pci_io;
+        ppc_md.ioremap = celleb_ioremap;
+        ppc_md.iounmap = celleb_iounmap;
+
+        return 0;
+}
diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c
index e9ac19c4bba4..6bc32fda7a6b 100644
--- a/arch/powerpc/platforms/celleb/pci.c
+++ b/arch/powerpc/platforms/celleb/pci.c
@@ -31,6 +31,7 @@
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/pci_regs.h>
+#include <linux/of_device.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -242,8 +243,8 @@ static int celleb_fake_pci_write_config(struct pci_bus *bus,
 }
 
 static struct pci_ops celleb_fake_pci_ops = {
-        celleb_fake_pci_read_config,
-        celleb_fake_pci_write_config
+        .read = celleb_fake_pci_read_config,
+        .write = celleb_fake_pci_write_config,
 };
 
 static inline void celleb_setup_pci_base_addrs(struct pci_controller *hose,
@@ -288,8 +289,8 @@ static inline void celleb_setup_pci_base_addrs(struct pci_controller *hose,
         celleb_config_write_fake(config, PCI_COMMAND, 2, val);
 }
 
-static int __devinit celleb_setup_fake_pci_device(struct device_node *node,
-                                                  struct pci_controller *hose)
+static int __init celleb_setup_fake_pci_device(struct device_node *node,
+                                               struct pci_controller *hose)
 {
         unsigned int rlen;
         int num_base_addr = 0;
@@ -327,10 +328,7 @@ static int __devinit celleb_setup_fake_pci_device(struct device_node *node,
 
         size = 256;
         config = &private->fake_config[devno][fn];
-        if (mem_init_done)
-                *config = kzalloc(size, GFP_KERNEL);
-        else
-                *config = alloc_bootmem(size);
+        *config = alloc_maybe_bootmem(size, GFP_KERNEL);
         if (*config == NULL) {
                 printk(KERN_ERR "PCI: "
                        "not enough memory for fake configuration space\n");
@@ -341,10 +339,7 @@ static int __devinit celleb_setup_fake_pci_device(struct device_node *node,
 
         size = sizeof(struct celleb_pci_resource);
         res = &private->res[devno][fn];
-        if (mem_init_done)
-                *res = kzalloc(size, GFP_KERNEL);
-        else
-                *res = alloc_bootmem(size);
+        *res = alloc_maybe_bootmem(size, GFP_KERNEL);
         if (*res == NULL) {
                 printk(KERN_ERR
                        "PCI: not enough memory for resource data space\n");
@@ -418,8 +413,8 @@ error:
         return 1;
 }
 
-static int __devinit phb_set_bus_ranges(struct device_node *dev,
-                                        struct pci_controller *phb)
+static int __init phb_set_bus_ranges(struct device_node *dev,
+                                     struct pci_controller *phb)
 {
         const int *bus_range;
         unsigned int len;
@@ -434,46 +429,65 @@ static int __devinit phb_set_bus_ranges(struct device_node *dev,
         return 0;
 }
 
-static void __devinit celleb_alloc_private_mem(struct pci_controller *hose)
+static void __init celleb_alloc_private_mem(struct pci_controller *hose)
 {
-        if (mem_init_done)
-                hose->private_data =
-                        kzalloc(sizeof(struct celleb_pci_private), GFP_KERNEL);
-        else
-                hose->private_data =
-                        alloc_bootmem(sizeof(struct celleb_pci_private));
+        hose->private_data =
+                alloc_maybe_bootmem(sizeof(struct celleb_pci_private),
+                        GFP_KERNEL);
 }
 
-int __devinit celleb_setup_phb(struct pci_controller *phb)
+static int __init celleb_setup_fake_pci(struct device_node *dev,
+                                        struct pci_controller *phb)
 {
-        const char *name;
-        struct device_node *dev = phb->arch_data;
         struct device_node *node;
-        unsigned int rlen;
 
-        name = of_get_property(dev, "name", &rlen);
-        if (!name)
-                return 1;
+        phb->ops = &celleb_fake_pci_ops;
+        celleb_alloc_private_mem(phb);
 
-        pr_debug("PCI: celleb_setup_phb() %s\n", name);
-        phb_set_bus_ranges(dev, phb);
-        phb->buid = 1;
+        for (node = of_get_next_child(dev, NULL);
+             node != NULL; node = of_get_next_child(dev, node))
+                celleb_setup_fake_pci_device(node, phb);
+
+        return 0;
+}
 
-        if (strcmp(name, "epci") == 0) {
-                phb->ops = &celleb_epci_ops;
-                return celleb_setup_epci(dev, phb);
+void __init fake_pci_workaround_init(struct pci_controller *phb)
+{
+        /**
+         *  We will add fake pci bus to scc_pci_bus for the purpose to improve
+         *  I/O Macro performance. But device-tree and device drivers
+         *  are not ready to use address with a token.
+         */
+
+        /* celleb_pci_add_one(phb, NULL); */
+}
 
-        } else if (strcmp(name, "pci-pseudo") == 0) {
-                phb->ops = &celleb_fake_pci_ops;
-                celleb_alloc_private_mem(phb);
-                for (node = of_get_next_child(dev, NULL);
-                     node != NULL; node = of_get_next_child(dev, node))
-                        celleb_setup_fake_pci_device(node, phb);
+static struct of_device_id celleb_phb_match[] __initdata = {
+        {
+                .name = "pci-pseudo",
+                .data = celleb_setup_fake_pci,
+        }, {
+                .name = "epci",
+                .data = celleb_setup_epci,
+        }, {
+        },
+};
 
-        } else
+int __init celleb_setup_phb(struct pci_controller *phb)
+{
+        struct device_node *dev = phb->arch_data;
+        const struct of_device_id *match;
+        int (*setup_func)(struct device_node *, struct pci_controller *);
+
+        match = of_match_node(celleb_phb_match, dev);
+        if (!match)
                 return 1;
 
-        return 0;
+        phb_set_bus_ranges(dev, phb);
+        phb->buid = 1;
+
+        setup_func = match->data;
+        return (*setup_func)(dev, phb);
 }
 
 int celleb_pci_probe_mode(struct pci_bus *bus)
diff --git a/arch/powerpc/platforms/celleb/pci.h b/arch/powerpc/platforms/celleb/pci.h
index 5340e348e297..5d5544ffeddb 100644
--- a/arch/powerpc/platforms/celleb/pci.h
+++ b/arch/powerpc/platforms/celleb/pci.h
@@ -25,11 +25,18 @@
 
 #include <asm/pci-bridge.h>
 #include <asm/prom.h>
+#include <asm/ppc-pci.h>
 
 extern int celleb_setup_phb(struct pci_controller *);
 extern int celleb_pci_probe_mode(struct pci_bus *);
 
-extern struct pci_ops celleb_epci_ops;
 extern int celleb_setup_epci(struct device_node *, struct pci_controller *);
 
+extern void *celleb_dummy_page_va;
+extern int __init celleb_pci_workaround_init(void);
+extern void __init celleb_pci_add_one(struct pci_controller *,
+                                      void (*)(struct pci_controller *));
+extern void fake_pci_workaround_init(struct pci_controller *);
+extern void epci_workaround_init(struct pci_controller *);
+
 #endif /* _CELLEB_PCI_H */
diff --git a/arch/powerpc/platforms/celleb/scc.h b/arch/powerpc/platforms/celleb/scc.h
index e9ce8a7c1882..6be1542a6e66 100644
--- a/arch/powerpc/platforms/celleb/scc.h
+++ b/arch/powerpc/platforms/celleb/scc.h
@@ -53,7 +53,7 @@
 #define SCC_EPCI_STATUS         0x808
 #define SCC_EPCI_ABTSET         0x80c
 #define SCC_EPCI_WATRP          0x810
-#define SCC_EPCI_DUMMYRADR      0x814
+#define SCC_EPCI_DUMYRADR       0x814
 #define SCC_EPCI_SWRESP         0x818
 #define SCC_EPCI_CNTOPT         0x81c
 #define SCC_EPCI_ECMODE         0xf00
diff --git a/arch/powerpc/platforms/celleb/scc_epci.c b/arch/powerpc/platforms/celleb/scc_epci.c
index c4b011094bd6..9d076426676c 100644
--- a/arch/powerpc/platforms/celleb/scc_epci.c
+++ b/arch/powerpc/platforms/celleb/scc_epci.c
@@ -43,7 +43,11 @@
 
 #define iob()  __asm__ __volatile__("eieio; sync":::"memory")
 
-static inline volatile void __iomem *celleb_epci_get_epci_base(
+struct epci_private {
+        dma_addr_t      dummy_page_da;
+};
+
+static inline PCI_IO_ADDR celleb_epci_get_epci_base(
                                         struct pci_controller *hose)
 {
         /*
@@ -55,7 +59,7 @@ static inline volatile void __iomem *celleb_epci_get_epci_base(
         return hose->cfg_addr;
 }
 
-static inline volatile void __iomem *celleb_epci_get_epci_cfg(
+static inline PCI_IO_ADDR celleb_epci_get_epci_cfg(
                                         struct pci_controller *hose)
 {
         /*
@@ -67,20 +71,11 @@ static inline volatile void __iomem *celleb_epci_get_epci_cfg(
         return hose->cfg_data;
 }
 
-#if 0 /* test code for epci dummy read */
-static void celleb_epci_dummy_read(struct pci_dev *dev)
+static void scc_epci_dummy_read(struct pci_controller *hose)
 {
-        volatile void __iomem *epci_base;
-        struct device_node *node;
-        struct pci_controller *hose;
+        PCI_IO_ADDR epci_base;
         u32 val;
 
-        node = (struct device_node *)dev->bus->sysdata;
-        hose = pci_find_hose_for_OF_device(node);
-
-        if (!hose)
-                return;
-
         epci_base = celleb_epci_get_epci_base(hose);
 
         val = in_be32(epci_base + SCC_EPCI_WATRP);
@@ -88,21 +83,45 @@ static void celleb_epci_dummy_read(struct pci_dev *dev)
 
         return;
 }
-#endif
+
+void __init epci_workaround_init(struct pci_controller *hose)
+{
+        PCI_IO_ADDR epci_base;
+        PCI_IO_ADDR reg;
+        struct epci_private *private = hose->private_data;
+
+        BUG_ON(!private);
+
+        private->dummy_page_da = dma_map_single(hose->parent,
+                celleb_dummy_page_va, PAGE_SIZE, DMA_FROM_DEVICE);
+        if (private->dummy_page_da == DMA_ERROR_CODE) {
+                printk(KERN_ERR "EPCI: dummy read disabled."
+                       "Map dummy page failed.\n");
+                return;
+        }
+
+        celleb_pci_add_one(hose, scc_epci_dummy_read);
+        epci_base = celleb_epci_get_epci_base(hose);
+
+        reg = epci_base + SCC_EPCI_DUMYRADR;
+        out_be32(reg, private->dummy_page_da);
+}
 
 static inline void clear_and_disable_master_abort_interrupt(
                                         struct pci_controller *hose)
 {
-        volatile void __iomem *epci_base, *reg;
+        PCI_IO_ADDR epci_base;
+        PCI_IO_ADDR reg;
         epci_base = celleb_epci_get_epci_base(hose);
         reg = epci_base + PCI_COMMAND;
         out_be32(reg, in_be32(reg) | (PCI_STATUS_REC_MASTER_ABORT << 16));
 }
 
 static int celleb_epci_check_abort(struct pci_controller *hose,
-                                   volatile void __iomem *addr)
+                                   PCI_IO_ADDR addr)
 {
-        volatile void __iomem *reg, *epci_base;
+        PCI_IO_ADDR reg;
+        PCI_IO_ADDR epci_base;
         u32 val;
 
         iob();
@@ -132,12 +151,12 @@ static int celleb_epci_check_abort(struct pci_controller *hose,
         return PCIBIOS_SUCCESSFUL;
 }
 
-static volatile void __iomem *celleb_epci_make_config_addr(
+static PCI_IO_ADDR celleb_epci_make_config_addr(
                                         struct pci_bus *bus,
                                         struct pci_controller *hose,
                                         unsigned int devfn, int where)
 {
-        volatile void __iomem *addr;
+        PCI_IO_ADDR addr;
 
         if (bus != hose->bus)
                 addr = celleb_epci_get_epci_cfg(hose) +
@@ -157,7 +176,8 @@ static volatile void __iomem *celleb_epci_make_config_addr(
 static int celleb_epci_read_config(struct pci_bus *bus,
                         unsigned int devfn, int where, int size, u32 * val)
 {
-        volatile void __iomem *epci_base, *addr;
+        PCI_IO_ADDR epci_base;
+        PCI_IO_ADDR addr;
         struct device_node *node;
         struct pci_controller *hose;
 
@@ -220,7 +240,8 @@ static int celleb_epci_read_config(struct pci_bus *bus,
 static int celleb_epci_write_config(struct pci_bus *bus,
                         unsigned int devfn, int where, int size, u32 val)
 {
-        volatile void __iomem *epci_base, *addr;
+        PCI_IO_ADDR epci_base;
+        PCI_IO_ADDR addr;
         struct device_node *node;
         struct pci_controller *hose;
 
@@ -278,15 +299,16 @@ static int celleb_epci_write_config(struct pci_bus *bus,
 }
 
 struct pci_ops celleb_epci_ops = {
-        celleb_epci_read_config,
-        celleb_epci_write_config,
+        .read = celleb_epci_read_config,
+        .write = celleb_epci_write_config,
 };
 
 /* to be moved in FW */
-static int __devinit celleb_epci_init(struct pci_controller *hose)
+static int __init celleb_epci_init(struct pci_controller *hose)
 {
         u32 val;
-        volatile void __iomem *reg, *epci_base;
+        PCI_IO_ADDR reg;
+        PCI_IO_ADDR epci_base;
         int hwres = 0;
 
         epci_base = celleb_epci_get_epci_base(hose);
@@ -403,7 +425,7 @@ static int __devinit celleb_epci_init(struct pci_controller *hose)
         return 0;
 }
 
-int __devinit celleb_setup_epci(struct device_node *node,
+int __init celleb_setup_epci(struct device_node *node,
                                 struct pci_controller *hose)
 {
         struct resource r;
@@ -440,10 +462,24 @@ int __devinit celleb_setup_epci(struct device_node *node,
                  r.start, (unsigned long)hose->cfg_data,
                 (r.end - r.start + 1));
 
+        hose->private_data = kzalloc(sizeof(struct epci_private), GFP_KERNEL);
+        if (hose->private_data == NULL) {
+                printk(KERN_ERR "EPCI: no memory for private data.\n");
+                goto error;
+        }
+
+        hose->ops = &celleb_epci_ops;
         celleb_epci_init(hose);
 
         return 0;
 
 error:
+        kfree(hose->private_data);
+
+        if (hose->cfg_addr)
+                iounmap(hose->cfg_addr);
+
+        if (hose->cfg_data)
+                iounmap(hose->cfg_data);
         return 1;
 }
diff --git a/arch/powerpc/platforms/celleb/scc_sio.c b/arch/powerpc/platforms/celleb/scc_sio.c
index bcd25f54d986..610008211ca1 100644
--- a/arch/powerpc/platforms/celleb/scc_sio.c
+++ b/arch/powerpc/platforms/celleb/scc_sio.c
@@ -1,7 +1,7 @@
 /*
  * setup serial port in SCC
  *
- * (C) Copyright 2006 TOSHIBA CORPORATION
+ * (C) Copyright 2006-2007 TOSHIBA CORPORATION
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -28,58 +28,58 @@
 
 /* sio irq0=0xb00010022 irq0=0xb00010023 irq2=0xb00010024
     mmio=0xfff000-0x1000,0xff2000-0x1000 */
-static int txx9_serial_bitmap = 0;
+static int txx9_serial_bitmap __initdata = 0;
 
 static struct {
         uint32_t offset;
         uint32_t index;
-} txx9_scc_tab[3] = {
+} txx9_scc_tab[3] __initdata = {
         { 0x300, 0 },   /* 0xFFF300 */
         { 0x400, 0 },   /* 0xFFF400 */
         { 0x800, 1 }    /* 0xFF2800 */
 };
 
-static int txx9_serial_init(void)
+static int __init txx9_serial_init(void)
 {
         extern int early_serial_txx9_setup(struct uart_port *port);
-        struct device_node *node;
+        struct device_node *node = NULL;
         int i;
         struct uart_port req;
         struct of_irq irq;
         struct resource res;
 
-        node = of_find_node_by_path("/ioif1/sio");
-        if (!node)
-                return 0;
+        while ((node = of_find_compatible_node(node,
+                                "serial", "toshiba,sio-scc")) != NULL) {
+                for (i = 0; i < ARRAY_SIZE(txx9_scc_tab); i++) {
+                        if (!(txx9_serial_bitmap & (1<<i)))
+                                continue;
 
-        for(i = 0; i < sizeof(txx9_scc_tab)/sizeof(txx9_scc_tab[0]); i++) {
-                if (!(txx9_serial_bitmap & (1<<i)))
-                        continue;
+                        if (of_irq_map_one(node, i, &irq))
+                                continue;
+                        if (of_address_to_resource(node,
+                                txx9_scc_tab[i].index, &res))
+                                continue;
 
-                if (of_irq_map_one(node, i, &irq))
-                        continue;
-                if (of_address_to_resource(node, txx9_scc_tab[i].index, &res))
-                        continue;
-
-                memset(&req, 0, sizeof(req));
-                req.line = i;
-                req.iotype = UPIO_MEM;
-                req.mapbase = res.start + txx9_scc_tab[i].offset;
+                        memset(&req, 0, sizeof(req));
+                        req.line = i;
+                        req.iotype = UPIO_MEM;
+                        req.mapbase = res.start + txx9_scc_tab[i].offset;
 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
-                req.membase = ioremap(req.mapbase, 0x24);
+                        req.membase = ioremap(req.mapbase, 0x24);
 #endif
-                req.irq = irq_create_of_mapping(irq.controller,
-                        irq.specifier, irq.size);
-                req.flags |= UPF_IOREMAP | UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
-                req.uartclk = 83300000;
-                early_serial_txx9_setup(&req);
+                        req.irq = irq_create_of_mapping(irq.controller,
+                                irq.specifier, irq.size);
+                        req.flags |= UPF_IOREMAP | UPF_BUGGY_UART
+                                /*HAVE_CTS_LINE*/;
+                        req.uartclk = 83300000;
+                        early_serial_txx9_setup(&req);
+                }
         }
 
-        of_node_put(node);
         return 0;
 }
 
-static int txx9_serial_config(char *ptr)
+static int __init txx9_serial_config(char *ptr)
 {
         int     i;
 
diff --git a/arch/powerpc/platforms/celleb/setup.c b/arch/powerpc/platforms/celleb/setup.c
index 5e9f7f163571..0f1dddb81cd2 100644
--- a/arch/powerpc/platforms/celleb/setup.c
+++ b/arch/powerpc/platforms/celleb/setup.c
@@ -73,7 +73,7 @@ static void celleb_show_cpuinfo(struct seq_file *m)
         of_node_put(root);
 }
 
-static int celleb_machine_type_hack(char *ptr)
+static int __init celleb_machine_type_hack(char *ptr)
 {
         strncpy(celleb_machine_type, ptr, sizeof(celleb_machine_type));
         celleb_machine_type[sizeof(celleb_machine_type)-1] = 0;
@@ -111,11 +111,6 @@ static void __init celleb_setup_arch(void)
 #endif
 }
 
-static void beat_power_save(void)
-{
-        beat_pause(0);
-}
-
 static int __init celleb_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
@@ -124,18 +119,11 @@ static int __init celleb_probe(void)
                 return 0;
 
         powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE;
-        hpte_init_beat();
+        hpte_init_beat_v3();
         return 1;
 }
 
-#ifdef CONFIG_KEXEC
-static void celleb_kexec_cpu_down(int crash, int secondary)
-{
-        beatic_deinit_IRQ();
-}
-#endif
-
-static struct of_device_id celleb_bus_ids[] = {
+static struct of_device_id celleb_bus_ids[] __initdata = {
         { .type = "scc", },
         { .type = "ioif", },    /* old style */
         {},
@@ -149,6 +137,8 @@ static int __init celleb_publish_devices(void)
         /* Publish OF platform devices for southbridge IOs */
         of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
 
+        celleb_pci_workaround_init();
+
         return 0;
 }
 device_initcall(celleb_publish_devices);
@@ -175,7 +165,7 @@ define_machine(celleb) {
         .pci_probe_mode         = celleb_pci_probe_mode,
         .pci_setup_phb          = celleb_setup_phb,
 #ifdef CONFIG_KEXEC
-        .kexec_cpu_down         = celleb_kexec_cpu_down,
+        .kexec_cpu_down         = beat_kexec_cpu_down,
         .machine_kexec          = default_machine_kexec,
         .machine_kexec_prepare  = default_machine_kexec_prepare,
         .machine_crash_shutdown = default_machine_crash_shutdown,
diff --git a/arch/powerpc/platforms/chrp/gg2.h b/arch/powerpc/platforms/chrp/gg2.h
new file mode 100644
index 000000000000..341ae55b99fb
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/gg2.h
@@ -0,0 +1,61 @@
+/*
+ *  include/asm-ppc/gg2.h -- VLSI VAS96011/12 `Golden Gate 2' register definitions
+ *
+ *  Copyright (C) 1997 Geert Uytterhoeven
+ *
+ *  This file is based on the following documentation:
+ *
+ *      The VAS96011/12 Chipset, Data Book, Edition 1.0
+ *      VLSI Technology, Inc.
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License.  See the file COPYING in the main directory of this archive
+ *  for more details.
+ */
+
+#ifndef _ASMPPC_GG2_H
+#define _ASMPPC_GG2_H
+
+    /*
+     *  Memory Map (CHRP mode)
+     */
+
+#define GG2_PCI_MEM_BASE        0xc0000000      /* Peripheral memory space */
+#define GG2_ISA_MEM_BASE        0xf7000000      /* Peripheral memory alias */
+#define GG2_ISA_IO_BASE         0xf8000000      /* Peripheral I/O space */
+#define GG2_PCI_CONFIG_BASE     0xfec00000      /* PCI configuration space */
+#define GG2_INT_ACK_SPECIAL     0xfec80000      /* Interrupt acknowledge and */
+                                                /* special PCI cycles */
+#define GG2_ROM_BASE0           0xff000000      /* ROM bank 0 */
+#define GG2_ROM_BASE1           0xff800000      /* ROM bank 1 */
+
+
+    /*
+     *  GG2 specific PCI Registers
+     */
+
+extern void __iomem *gg2_pci_config_base;       /* kernel virtual address */
+
+#define GG2_PCI_BUSNO           0x40    /* Bus number */
+#define GG2_PCI_SUBBUSNO        0x41    /* Subordinate bus number */
+#define GG2_PCI_DISCCTR         0x42    /* Disconnect counter */
+#define GG2_PCI_PPC_CTRL        0x50    /* PowerPC interface control register */
+#define GG2_PCI_ADDR_MAP        0x5c    /* Address map */
+#define GG2_PCI_PCI_CTRL        0x60    /* PCI interface control register */
+#define GG2_PCI_ROM_CTRL        0x70    /* ROM interface control register */
+#define GG2_PCI_ROM_TIME        0x74    /* ROM timing */
+#define GG2_PCI_CC_CTRL         0x80    /* Cache controller control register */
+#define GG2_PCI_DRAM_BANK0      0x90    /* Control register for DRAM bank #0 */
+#define GG2_PCI_DRAM_BANK1      0x94    /* Control register for DRAM bank #1 */
+#define GG2_PCI_DRAM_BANK2      0x98    /* Control register for DRAM bank #2 */
+#define GG2_PCI_DRAM_BANK3      0x9c    /* Control register for DRAM bank #3 */
+#define GG2_PCI_DRAM_BANK4      0xa0    /* Control register for DRAM bank #4 */
+#define GG2_PCI_DRAM_BANK5      0xa4    /* Control register for DRAM bank #5 */
+#define GG2_PCI_DRAM_TIME0      0xb0    /* Timing parameters set #0 */
+#define GG2_PCI_DRAM_TIME1      0xb4    /* Timing parameters set #1 */
+#define GG2_PCI_DRAM_CTRL       0xc0    /* DRAM control */
+#define GG2_PCI_ERR_CTRL        0xd0    /* Error control register */
+#define GG2_PCI_ERR_STATUS      0xd4    /* Error status register */
+                                        /* Cleared when read */
+
+#endif /* _ASMPPC_GG2_H */
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 28d1647b204e..e43465d34d29 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -13,7 +13,6 @@
 #include <asm/irq.h>
 #include <asm/hydra.h>
 #include <asm/prom.h>
-#include <asm/gg2.h>
 #include <asm/machdep.h>
 #include <asm/sections.h>
 #include <asm/pci-bridge.h>
@@ -21,6 +20,7 @@
 #include <asm/rtas.h>
 
 #include "chrp.h"
+#include "gg2.h"
 
 /* LongTrail */
 void __iomem *gg2_pci_config_base;
@@ -86,8 +86,8 @@ int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
 
 static struct pci_ops gg2_pci_ops =
 {
-        gg2_read_config,
-        gg2_write_config
+        .read = gg2_read_config,
+        .write = gg2_write_config,
 };
 
 /*
@@ -124,8 +124,8 @@ int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
 
 static struct pci_ops rtas_pci_ops =
 {
-        rtas_read_config,
-        rtas_write_config
+        .read = rtas_read_config,
+        .write = rtas_write_config,
 };
 
 volatile struct Hydra __iomem *Hydra = NULL;
@@ -338,3 +338,32 @@ void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
                 chrp_pci_fixup_winbond_ata);
+
+/* Pegasos2 firmware version 20040810 configures the built-in IDE controller
+ * in legacy mode, but sets the PCI registers to PCI native mode.
+ * The chip can only operate in legacy mode, so force the PCI class into legacy
+ * mode as well. The same fixup must be done to the class-code property in
+ * the IDE node /pci@80000000/ide@C,1
+ */
+static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
+{
+        u8 progif;
+        struct pci_dev *viaisa;
+
+        if (!machine_is(chrp) || _chrp_type != _CHRP_Pegasos)
+                return;
+        if (viaide->irq != 14)
+                return;
+
+        viaisa = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, NULL);
+        if (!viaisa)
+                return;
+        printk("Fixing VIA IDE, force legacy mode on '%s'\n", viaide->dev.bus_id);
+
+        pci_read_config_byte(viaide, PCI_CLASS_PROG, &progif);
+        pci_write_config_byte(viaide, PCI_CLASS_PROG, progif & ~0x5);
+        viaide->class &= ~0x5;
+
+        pci_dev_put(viaisa);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 373de4c063db..96498ad7b943 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -32,13 +32,11 @@
 #include <linux/seq_file.h>
 #include <linux/root_dev.h>
 #include <linux/initrd.h>
-#include <linux/module.h>
 #include <linux/timer.h>
 
 #include <asm/io.h>
 #include <asm/pgtable.h>
 #include <asm/prom.h>
-#include <asm/gg2.h>
 #include <asm/pci-bridge.h>
 #include <asm/dma.h>
 #include <asm/machdep.h>
@@ -52,6 +50,7 @@
 #include <asm/xmon.h>
 
 #include "chrp.h"
+#include "gg2.h"
 
 void rtas_indicator_progress(char *, unsigned short);
 
diff --git a/arch/powerpc/platforms/chrp/smp.c b/arch/powerpc/platforms/chrp/smp.c
index 3ea0eb78568e..10a4a4d063b6 100644
--- a/arch/powerpc/platforms/chrp/smp.c
+++ b/arch/powerpc/platforms/chrp/smp.c
@@ -26,10 +26,8 @@
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/smp.h>
-#include <asm/residual.h>
 #include <asm/time.h>
 #include <asm/machdep.h>
-#include <asm/smp.h>
 #include <asm/mpic.h>
 #include <asm/rtas.h>
 
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 2d12f77e46bc..da66103009c6 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,9 +1,10 @@
-choice
-        prompt "Machine Type"
-        depends on EMBEDDED6xx
+config EMBEDDED6xx
+        bool "Embedded 6xx/7xx/7xxx-based boards"
+        depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM
 
 config LINKSTATION
         bool "Linkstation / Kurobox(HG) from Buffalo"
+        depends on EMBEDDED6xx
         select MPIC
         select FSL_SOC
         select PPC_UDBG_16550 if SERIAL_8250
@@ -17,6 +18,7 @@ config LINKSTATION
 
 config MPC7448HPC2
         bool "Freescale MPC7448HPC2(Taiga)"
+        depends on EMBEDDED6xx
         select TSI108_BRIDGE
         select DEFAULT_UIMAGE
         select PPC_UDBG_16550
@@ -26,6 +28,7 @@ config MPC7448HPC2
 
 config PPC_HOLLY
         bool "PPC750GX/CL with TSI10x bridge (Hickory/Holly)"
+        depends on EMBEDDED6xx
         select TSI108_BRIDGE
         select PPC_UDBG_16550
         select WANT_DEVICE_TREE
@@ -35,12 +38,12 @@ config PPC_HOLLY
 
 config PPC_PRPMC2800
         bool "Motorola-PrPMC2800"
+        depends on EMBEDDED6xx
         select MV64X60
         select NOT_COHERENT_CACHE
         select WANT_DEVICE_TREE
         help
           This option enables support for the Motorola PrPMC2800 board
-endchoice
 
 config TSI108_BRIDGE
         bool
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index 6292e36dc577..b6de2b5223dd 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -113,23 +113,11 @@ static void holly_remap_bridge(void)
 
 static void __init holly_setup_arch(void)
 {
-        struct device_node *cpu;
         struct device_node *np;
 
         if (ppc_md.progress)
                 ppc_md.progress("holly_setup_arch():set_bridge", 0);
 
-        cpu = of_find_node_by_type(NULL, "cpu");
-        if (cpu) {
-                const unsigned int *fp;
-
-                fp = of_get_property(cpu, "clock-frequency", NULL);
-                if (fp)
-                        loops_per_jiffy = *fp / HZ;
-                else
-                        loops_per_jiffy = 50000000 / HZ;
-                of_node_put(cpu);
-        }
         tsi108_csr_vir_base = get_vir_csrbase();
 
         /* setup PCI host bridge */
@@ -147,7 +135,7 @@ static void __init holly_setup_arch(void)
 }
 
 /*
- * Interrupt setup and service.  Interrrupts on the holly come
+ * Interrupt setup and service.  Interrupts on the holly come
  * from the four external INT pins, PCI interrupts are routed via
  * PCI interrupt control registers, it generates internal IRQ23
  *
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c
index bd5ca58345a1..f392374309b3 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -11,16 +11,16 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/pci.h>
 #include <linux/initrd.h>
 #include <linux/mtd/physmap.h>
 
 #include <asm/time.h>
 #include <asm/prom.h>
 #include <asm/mpic.h>
-#include <asm/mpc10x.h>
 #include <asm/pci-bridge.h>
 
+#include "mpc10x.h"
+
 static struct mtd_partition linkstation_physmap_partitions[] = {
         {
                 .name   = "mtd_firmimg",
@@ -99,7 +99,7 @@ static void __init linkstation_setup_arch(void)
 }
 
 /*
- * Interrupt setup and service.  Interrrupts on the linkstation come
+ * Interrupt setup and service.  Interrupts on the linkstation come
  * from the four PCI slots plus onboard 8241 devices: I2C, DUART.
  */
 static void __init linkstation_init_IRQ(void)
diff --git a/arch/powerpc/platforms/embedded6xx/ls_uart.c b/arch/powerpc/platforms/embedded6xx/ls_uart.c
index d0bee9f19e4e..c99264cedda5 100644
--- a/arch/powerpc/platforms/embedded6xx/ls_uart.c
+++ b/arch/powerpc/platforms/embedded6xx/ls_uart.c
@@ -1,14 +1,25 @@
+/*
+ * AVR power-management chip interface for the Buffalo Linkstation /
+ * Kurobox Platform.
+ *
+ * Author: 2006 (c) G. Liakhovetski
+ *       g.liakhovetski@gmx.de
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of
+ * any kind, whether express or implied.
+ */
 #include <linux/workqueue.h>
 #include <linux/string.h>
 #include <linux/delay.h>
 #include <linux/serial_reg.h>
 #include <linux/serial_8250.h>
 #include <asm/io.h>
-#include <asm/mpc10x.h>
-#include <asm/ppc_sys.h>
 #include <asm/prom.h>
 #include <asm/termbits.h>
 
+#include "mpc10x.h"
+
 static void __iomem *avr_addr;
 static unsigned long avr_clock;
 
@@ -106,6 +117,9 @@ static int __init ls_uarts_init(void)
         phys_addr_t phys_addr;
         int len;
 
+        if (!machine_is(linkstation))
+                return 0;
+
         avr = of_find_node_by_path("/soc10x/serial@80004500");
         if (!avr)
                 return -EINVAL;
diff --git a/arch/powerpc/platforms/embedded6xx/mpc10x.h b/arch/powerpc/platforms/embedded6xx/mpc10x.h
new file mode 100644
index 000000000000..b30a6a3b5bd2
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/mpc10x.h
@@ -0,0 +1,180 @@
+/*
+ * Common routines for the Motorola SPS MPC106/8240/107 Host bridge/Mem
+ * ctlr/EPIC/etc.
+ *
+ * Author: Mark A. Greer
+ *         mgreer@mvista.com
+ *
+ * 2001 (c) MontaVista, Software, Inc.  This file is licensed under
+ * the terms of the GNU General Public License version 2.  This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#ifndef __PPC_KERNEL_MPC10X_H
+#define __PPC_KERNEL_MPC10X_H
+
+#include <linux/pci_ids.h>
+#include <asm/pci-bridge.h>
+
+/*
+ * The values here don't completely map everything but should work in most
+ * cases.
+ *
+ * MAP A (PReP Map)
+ *   Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff
+ *   Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff
+ *   PCI MEM:   0x80000000 -> Processor System Memory: 0x00000000
+ *   EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
+ *
+ * MAP B (CHRP Map)
+ *   Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff
+ *   Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff
+ *   PCI MEM:   0x00000000 -> Processor System Memory: 0x00000000
+ *   EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
+ */
+
+/*
+ * Define the vendor/device IDs for the various bridges--should be added to
+ * <linux/pci_ids.h>
+ */
+#define MPC10X_BRIDGE_106       ((PCI_DEVICE_ID_MOTOROLA_MPC106 << 16) |  \
+                                  PCI_VENDOR_ID_MOTOROLA)
+#define MPC10X_BRIDGE_8240      ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA)
+#define MPC10X_BRIDGE_107       ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA)
+#define MPC10X_BRIDGE_8245      ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA)
+
+/* Define the type of map to use */
+#define MPC10X_MEM_MAP_A                1
+#define MPC10X_MEM_MAP_B                2
+
+/* Map A (PReP Map) Defines */
+#define MPC10X_MAPA_CNFG_ADDR           0x80000cf8
+#define MPC10X_MAPA_CNFG_DATA           0x80000cfc
+
+#define MPC10X_MAPA_ISA_IO_BASE         0x80000000
+#define MPC10X_MAPA_ISA_MEM_BASE        0xc0000000
+#define MPC10X_MAPA_DRAM_OFFSET         0x80000000
+
+#define MPC10X_MAPA_PCI_INTACK_ADDR     0xbffffff0
+#define MPC10X_MAPA_PCI_IO_START        0x00000000
+#define MPC10X_MAPA_PCI_IO_END         (0x00800000 - 1)
+#define MPC10X_MAPA_PCI_MEM_START       0x00000000
+#define MPC10X_MAPA_PCI_MEM_END        (0x20000000 - 1)
+
+#define MPC10X_MAPA_PCI_MEM_OFFSET      (MPC10X_MAPA_ISA_MEM_BASE -     \
+                                         MPC10X_MAPA_PCI_MEM_START)
+
+/* Map B (CHRP Map) Defines */
+#define MPC10X_MAPB_CNFG_ADDR           0xfec00000
+#define MPC10X_MAPB_CNFG_DATA           0xfee00000
+
+#define MPC10X_MAPB_ISA_IO_BASE         0xfe000000
+#define MPC10X_MAPB_ISA_MEM_BASE        0x80000000
+#define MPC10X_MAPB_DRAM_OFFSET         0x00000000
+
+#define MPC10X_MAPB_PCI_INTACK_ADDR     0xfef00000
+#define MPC10X_MAPB_PCI_IO_START        0x00000000
+#define MPC10X_MAPB_PCI_IO_END         (0x00c00000 - 1)
+#define MPC10X_MAPB_PCI_MEM_START       0x80000000
+#define MPC10X_MAPB_PCI_MEM_END        (0xc0000000 - 1)
+
+#define MPC10X_MAPB_PCI_MEM_OFFSET      (MPC10X_MAPB_ISA_MEM_BASE -     \
+                                         MPC10X_MAPB_PCI_MEM_START)
+
+/* Set hose members to values appropriate for the mem map used */
+#define MPC10X_SETUP_HOSE(hose, map) {                                  \
+        (hose)->pci_mem_offset = MPC10X_MAP##map##_PCI_MEM_OFFSET;      \
+        (hose)->io_space.start = MPC10X_MAP##map##_PCI_IO_START;        \
+        (hose)->io_space.end = MPC10X_MAP##map##_PCI_IO_END;            \
+        (hose)->mem_space.start = MPC10X_MAP##map##_PCI_MEM_START;      \
+        (hose)->mem_space.end = MPC10X_MAP##map##_PCI_MEM_END;          \
+        (hose)->io_base_virt = (void *)MPC10X_MAP##map##_ISA_IO_BASE;   \
+}
+
+
+/* Miscellaneous Configuration register offsets */
+#define MPC10X_CFG_PIR_REG              0x09
+#define MPC10X_CFG_PIR_HOST_BRIDGE      0x00
+#define MPC10X_CFG_PIR_AGENT            0x01
+
+#define MPC10X_CFG_EUMBBAR              0x78
+
+#define MPC10X_CFG_PICR1_REG            0xa8
+#define MPC10X_CFG_PICR1_ADDR_MAP_MASK  0x00010000
+#define MPC10X_CFG_PICR1_ADDR_MAP_A     0x00010000
+#define MPC10X_CFG_PICR1_ADDR_MAP_B     0x00000000
+#define MPC10X_CFG_PICR1_SPEC_PCI_RD    0x00000004
+#define MPC10X_CFG_PICR1_ST_GATH_EN     0x00000040
+
+#define MPC10X_CFG_PICR2_REG            0xac
+#define MPC10X_CFG_PICR2_COPYBACK_OPT   0x00000001
+
+#define MPC10X_CFG_MAPB_OPTIONS_REG     0xe0
+#define MPC10X_CFG_MAPB_OPTIONS_CFAE    0x80    /* CPU_FD_ALIAS_EN */
+#define MPC10X_CFG_MAPB_OPTIONS_PFAE    0x40    /* PCI_FD_ALIAS_EN */
+#define MPC10X_CFG_MAPB_OPTIONS_DR      0x20    /* DLL_RESET */
+#define MPC10X_CFG_MAPB_OPTIONS_PCICH   0x08    /* PCI_COMPATIBILITY_HOLE */
+#define MPC10X_CFG_MAPB_OPTIONS_PROCCH  0x04    /* PROC_COMPATIBILITY_HOLE */
+
+/* Define offsets for the memory controller registers in the config space */
+#define MPC10X_MCTLR_MEM_START_1        0x80    /* Banks 0-3 */
+#define MPC10X_MCTLR_MEM_START_2        0x84    /* Banks 4-7 */
+#define MPC10X_MCTLR_EXT_MEM_START_1    0x88    /* Banks 0-3 */
+#define MPC10X_MCTLR_EXT_MEM_START_2    0x8c    /* Banks 4-7 */
+
+#define MPC10X_MCTLR_MEM_END_1          0x90    /* Banks 0-3 */
+#define MPC10X_MCTLR_MEM_END_2          0x94    /* Banks 4-7 */
+#define MPC10X_MCTLR_EXT_MEM_END_1      0x98    /* Banks 0-3 */
+#define MPC10X_MCTLR_EXT_MEM_END_2      0x9c    /* Banks 4-7 */
+
+#define MPC10X_MCTLR_MEM_BANK_ENABLES   0xa0
+
+/* Define some offset in the EUMB */
+#define MPC10X_EUMB_SIZE                0x00100000 /* Total EUMB size (1MB) */
+
+#define MPC10X_EUMB_MU_OFFSET           0x00000000 /* Msg Unit reg offset */
+#define MPC10X_EUMB_MU_SIZE             0x00001000 /* Msg Unit reg size */
+#define MPC10X_EUMB_DMA_OFFSET          0x00001000 /* DMA Unit reg offset */
+#define MPC10X_EUMB_DMA_SIZE            0x00001000 /* DMA Unit reg size  */
+#define MPC10X_EUMB_ATU_OFFSET          0x00002000 /* Addr xlate reg offset */
+#define MPC10X_EUMB_ATU_SIZE            0x00001000 /* Addr xlate reg size  */
+#define MPC10X_EUMB_I2C_OFFSET          0x00003000 /* I2C Unit reg offset */
+#define MPC10X_EUMB_I2C_SIZE            0x00001000 /* I2C Unit reg size  */
+#define MPC10X_EUMB_DUART_OFFSET        0x00004000 /* DUART Unit reg offset (8245) */
+#define MPC10X_EUMB_DUART_SIZE          0x00001000 /* DUART Unit reg size (8245) */
+#define MPC10X_EUMB_EPIC_OFFSET         0x00040000 /* EPIC offset in EUMB */
+#define MPC10X_EUMB_EPIC_SIZE           0x00030000 /* EPIC size */
+#define MPC10X_EUMB_PM_OFFSET           0x000fe000 /* Performance Monitor reg offset (8245) */
+#define MPC10X_EUMB_PM_SIZE             0x00001000 /* Performance Monitor reg size (8245) */
+#define MPC10X_EUMB_WP_OFFSET           0x000ff000 /* Data path diagnostic, watchpoint reg offset */
+#define MPC10X_EUMB_WP_SIZE             0x00001000 /* Data path diagnostic, watchpoint reg size */
+
+/*
+ * Define some recommended places to put the EUMB regs.
+ * For both maps, recommend putting the EUMB from 0xeff00000 to 0xefffffff.
+ */
+extern unsigned long                    ioremap_base;
+#define MPC10X_MAPA_EUMB_BASE           (ioremap_base - MPC10X_EUMB_SIZE)
+#define MPC10X_MAPB_EUMB_BASE           MPC10X_MAPA_EUMB_BASE
+
+enum ppc_sys_devices {
+        MPC10X_IIC1,
+        MPC10X_DMA0,
+        MPC10X_DMA1,
+        MPC10X_UART0,
+        MPC10X_UART1,
+        NUM_PPC_SYS_DEVS,
+};
+
+int mpc10x_bridge_init(struct pci_controller *hose,
+                       uint current_map,
+                       uint new_map,
+                       uint phys_eumb_base);
+unsigned long mpc10x_get_mem_size(uint mem_map);
+int mpc10x_enable_store_gathering(struct pci_controller *hose);
+int mpc10x_disable_store_gathering(struct pci_controller *hose);
+
+/* For MPC107 boards that use the built-in openpic */
+void mpc10x_set_openpic(void);
+
+#endif  /* __PPC_KERNEL_MPC10X_H */
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 1e3cc69487b5..96737e5608d3 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -40,7 +40,6 @@
 #include <asm/pci-bridge.h>
 #include <asm/reg.h>
 #include <mm/mmu_decl.h>
-#include "mpc7448_hpc2.h"
 #include <asm/tsi108_pci.h>
 #include <asm/tsi108_irq.h>
 #include <asm/mpic.h>
@@ -91,7 +90,7 @@ static void __init mpc7448_hpc2_setup_arch(void)
 }
 
 /*
- * Interrupt setup and service.  Interrrupts on the mpc7448_hpc2 come
+ * Interrupt setup and service.  Interrupts on the mpc7448_hpc2 come
  * from the four external INT pins, PCI interrupts are routed via
  * PCI interrupt control registers, it generates internal IRQ23
  *
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
deleted file mode 100644
index f7e0e0c7f8d8..000000000000
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * mpc7448_hpc2.h
- *
- * Definitions for Freescale MPC7448_HPC2 platform
- *
- * Author: Jacob Pan
- *         jacob.pan@freescale.com
- * Maintainer: Roy Zang <roy.zang@freescale.com>
- *
- * 2006 (c) Freescale Semiconductor, Inc.  This file is licensed under
- * the terms of the GNU General Public License version 2.  This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __PPC_PLATFORMS_MPC7448_HPC2_H
-#define __PPC_PLATFORMS_MPC7448_HPC2_H
-
-#include <asm/ppcboot.h>
-
-#endif                          /* __PPC_PLATFORMS_MPC7448_HPC2_H */
diff --git a/arch/powerpc/platforms/embedded6xx/prpmc2800.c b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
index 53420951dc53..e484cac75095 100644
--- a/arch/powerpc/platforms/embedded6xx/prpmc2800.c
+++ b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
@@ -44,7 +44,6 @@ static void __init prpmc2800_setup_arch(void)
         struct device_node *np;
         phys_addr_t paddr;
         const unsigned int *reg;
-        const unsigned int *prop;
 
         /*
          * ioremap mpp and gpp registers in case they are later
@@ -62,12 +61,6 @@ static void __init prpmc2800_setup_arch(void)
         of_node_put(np);
         mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
 
-        np = of_find_node_by_type(NULL, "cpu");
-        prop = of_get_property(np, "clock-frequency", NULL);
-        if (prop)
-                loops_per_jiffy = *prop / HZ;
-        of_node_put(np);
-
 #ifdef CONFIG_PCI
         mv64x60_pci_init();
 #endif
@@ -158,6 +151,7 @@ define_machine(prpmc2800){
         .name                   = prpmc2800_platform_name,
         .probe                  = prpmc2800_probe,
         .setup_arch             = prpmc2800_setup_arch,
+        .init_early             = mv64x60_init_early,
         .show_cpuinfo           = prpmc2800_show_cpuinfo,
         .init_IRQ               = mv64x60_init_irq,
         .get_irq                = mv64x60_get_irq,
diff --git a/arch/powerpc/platforms/iseries/Makefile b/arch/powerpc/platforms/iseries/Makefile
index 13ac3015d91c..60db509638f1 100644
--- a/arch/powerpc/platforms/iseries/Makefile
+++ b/arch/powerpc/platforms/iseries/Makefile
@@ -2,6 +2,7 @@ EXTRA_CFLAGS	+= -mno-minimal-toc
 
 extra-y += dt.o
 
+obj-y += exception.o
 obj-y += hvlog.o hvlpconfig.o lpardata.o setup.o dt_mod.o mf.o lpevents.o \
         hvcall.o proc.o htab.o iommu.o misc.o irq.o
 obj-$(CONFIG_PCI) += pci.o vpdinfo.o
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
new file mode 100644
index 000000000000..5381038f0881
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -0,0 +1,251 @@
+/*
+ *  Low level routines for legacy iSeries support.
+ *
+ *  Extracted from head_64.S
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *
+ *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
+ *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
+ *
+ *  This file contains the low-level support and setup for the
+ *  PowerPC-64 platform, including trap and interrupt dispatch.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/reg.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+#include <asm/ptrace.h>
+#include <asm/cputable.h>
+
+#include "exception.h"
+
+        .text
+
+        .globl system_reset_iSeries
+system_reset_iSeries:
+        mfspr   r13,SPRN_SPRG3          /* Get paca address */
+        mfmsr   r24
+        ori     r24,r24,MSR_RI
+        mtmsrd  r24                     /* RI on */
+        lhz     r24,PACAPACAINDEX(r13)  /* Get processor # */
+        cmpwi   0,r24,0                 /* Are we processor 0? */
+        bne     1f
+        b       .__start_initialization_iSeries /* Start up the first processor */
+1:      mfspr   r4,SPRN_CTRLF
+        li      r5,CTRL_RUNLATCH        /* Turn off the run light */
+        andc    r4,r4,r5
+        mtspr   SPRN_CTRLT,r4
+
+1:
+        HMT_LOW
+#ifdef CONFIG_SMP
+        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
+                                         * should start */
+        sync
+        LOAD_REG_IMMEDIATE(r3,current_set)
+        sldi    r28,r24,3               /* get current_set[cpu#] */
+        ldx     r3,r3,r28
+        addi    r1,r3,THREAD_SIZE
+        subi    r1,r1,STACK_FRAME_OVERHEAD
+
+        cmpwi   0,r23,0
+        beq     iSeries_secondary_smp_loop      /* Loop until told to go */
+        b       __secondary_start               /* Loop until told to go */
+iSeries_secondary_smp_loop:
+        /* Let the Hypervisor know we are alive */
+        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
+        lis     r3,0x8002
+        rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
+#else /* CONFIG_SMP */
+        /* Yield the processor.  This is required for non-SMP kernels
+                which are running on multi-threaded machines. */
+        lis     r3,0x8000
+        rldicr  r3,r3,32,15             /* r3 = (r3 << 32) & 0xffff000000000000 */
+        addi    r3,r3,18                /* r3 = 0x8000000000000012 which is "yield" */
+        li      r4,0                    /* "yield timed" */
+        li      r5,-1                   /* "yield forever" */
+#endif /* CONFIG_SMP */
+        li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
+        sc                              /* Invoke the hypervisor via a system call */
+        mfspr   r13,SPRN_SPRG3          /* Put r13 back ???? */
+        b       1b                      /* If SMP not configured, secondaries
+                                         * loop forever */
+
+/***  ISeries-LPAR interrupt handlers ***/
+
+        STD_EXCEPTION_ISERIES(machine_check, PACA_EXMC)
+
+        .globl data_access_iSeries
+data_access_iSeries:
+        mtspr   SPRN_SPRG1,r13
+BEGIN_FTR_SECTION
+        mtspr   SPRN_SPRG2,r12
+        mfspr   r13,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
+        srdi    r13,r13,60
+        rlwimi  r13,r12,16,0x20
+        mfcr    r12
+        cmpwi   r13,0x2c
+        beq     .do_stab_bolted_iSeries
+        mtcrf   0x80,r12
+        mfspr   r12,SPRN_SPRG2
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+        EXCEPTION_PROLOG_1(PACA_EXGEN)
+        EXCEPTION_PROLOG_ISERIES_1
+        b       data_access_common
+
+.do_stab_bolted_iSeries:
+        mtcrf   0x80,r12
+        mfspr   r12,SPRN_SPRG2
+        EXCEPTION_PROLOG_1(PACA_EXSLB)
+        EXCEPTION_PROLOG_ISERIES_1
+        b       .do_stab_bolted
+
+        .globl  data_access_slb_iSeries
+data_access_slb_iSeries:
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
+        std     r3,PACA_EXSLB+EX_R3(r13)
+        mfspr   r3,SPRN_DAR
+        std     r9,PACA_EXSLB+EX_R9(r13)
+        mfcr    r9
+#ifdef __DISABLED__
+        cmpdi   r3,0
+        bge     slb_miss_user_iseries
+#endif
+        std     r10,PACA_EXSLB+EX_R10(r13)
+        std     r11,PACA_EXSLB+EX_R11(r13)
+        std     r12,PACA_EXSLB+EX_R12(r13)
+        mfspr   r10,SPRN_SPRG1
+        std     r10,PACA_EXSLB+EX_R13(r13)
+        ld      r12,PACALPPACAPTR(r13)
+        ld      r12,LPPACASRR1(r12)
+        b       .slb_miss_realmode
+
+        STD_EXCEPTION_ISERIES(instruction_access, PACA_EXGEN)
+
+        .globl  instruction_access_slb_iSeries
+instruction_access_slb_iSeries:
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
+        std     r3,PACA_EXSLB+EX_R3(r13)
+        ld      r3,PACALPPACAPTR(r13)
+        ld      r3,LPPACASRR0(r3)       /* get SRR0 value */
+        std     r9,PACA_EXSLB+EX_R9(r13)
+        mfcr    r9
+#ifdef __DISABLED__
+        cmpdi   r3,0
+        bge     slb_miss_user_iseries
+#endif
+        std     r10,PACA_EXSLB+EX_R10(r13)
+        std     r11,PACA_EXSLB+EX_R11(r13)
+        std     r12,PACA_EXSLB+EX_R12(r13)
+        mfspr   r10,SPRN_SPRG1
+        std     r10,PACA_EXSLB+EX_R13(r13)
+        ld      r12,PACALPPACAPTR(r13)
+        ld      r12,LPPACASRR1(r12)
+        b       .slb_miss_realmode
+
+#ifdef __DISABLED__
+slb_miss_user_iseries:
+        std     r10,PACA_EXGEN+EX_R10(r13)
+        std     r11,PACA_EXGEN+EX_R11(r13)
+        std     r12,PACA_EXGEN+EX_R12(r13)
+        mfspr   r10,SPRG1
+        ld      r11,PACA_EXSLB+EX_R9(r13)
+        ld      r12,PACA_EXSLB+EX_R3(r13)
+        std     r10,PACA_EXGEN+EX_R13(r13)
+        std     r11,PACA_EXGEN+EX_R9(r13)
+        std     r12,PACA_EXGEN+EX_R3(r13)
+        EXCEPTION_PROLOG_ISERIES_1
+        b       slb_miss_user_common
+#endif
+
+        MASKABLE_EXCEPTION_ISERIES(hardware_interrupt)
+        STD_EXCEPTION_ISERIES(alignment, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(program_check, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(fp_unavailable, PACA_EXGEN)
+        MASKABLE_EXCEPTION_ISERIES(decrementer)
+        STD_EXCEPTION_ISERIES(trap_0a, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(trap_0b, PACA_EXGEN)
+
+        .globl  system_call_iSeries
+system_call_iSeries:
+        mr      r9,r13
+        mfspr   r13,SPRN_SPRG3
+        EXCEPTION_PROLOG_ISERIES_1
+        b       system_call_common
+
+        STD_EXCEPTION_ISERIES(single_step, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(trap_0e, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(performance_monitor, PACA_EXGEN)
+
+decrementer_iSeries_masked:
+        /* We may not have a valid TOC pointer in here. */
+        li      r11,1
+        ld      r12,PACALPPACAPTR(r13)
+        stb     r11,LPPACADECRINT(r12)
+        LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
+        lwz     r12,0(r12)
+        mtspr   SPRN_DEC,r12
+        /* fall through */
+
+hardware_interrupt_iSeries_masked:
+        mtcrf   0x80,r9         /* Restore regs */
+        ld      r12,PACALPPACAPTR(r13)
+        ld      r11,LPPACASRR0(r12)
+        ld      r12,LPPACASRR1(r12)
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
+        ld      r9,PACA_EXGEN+EX_R9(r13)
+        ld      r10,PACA_EXGEN+EX_R10(r13)
+        ld      r11,PACA_EXGEN+EX_R11(r13)
+        ld      r12,PACA_EXGEN+EX_R12(r13)
+        ld      r13,PACA_EXGEN+EX_R13(r13)
+        rfid
+        b       .       /* prevent speculative execution */
+
+_INIT_STATIC(__start_initialization_iSeries)
+        /* Clear out the BSS */
+        LOAD_REG_IMMEDIATE(r11,__bss_stop)
+        LOAD_REG_IMMEDIATE(r8,__bss_start)
+        sub     r11,r11,r8              /* bss size                     */
+        addi    r11,r11,7               /* round up to an even double word */
+        rldicl. r11,r11,61,3            /* shift right by 3             */
+        beq     4f
+        addi    r8,r8,-8
+        li      r0,0
+        mtctr   r11                     /* zero this many doublewords   */
+3:      stdu    r0,8(r8)
+        bdnz    3b
+4:
+        LOAD_REG_IMMEDIATE(r1,init_thread_union)
+        addi    r1,r1,THREAD_SIZE
+        li      r0,0
+        stdu    r0,-STACK_FRAME_OVERHEAD(r1)
+
+        LOAD_REG_IMMEDIATE(r2,__toc_start)
+        addi    r2,r2,0x4000
+        addi    r2,r2,0x4000
+
+        bl      .iSeries_early_setup
+        bl      .early_setup
+
+        /* relocation is on at this point */
+
+        b       .start_here_common
diff --git a/arch/powerpc/platforms/iseries/exception.h b/arch/powerpc/platforms/iseries/exception.h
new file mode 100644
index 000000000000..ced45a8fa1aa
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/exception.h
@@ -0,0 +1,58 @@
+#ifndef _ASM_POWERPC_ISERIES_EXCEPTION_H
+#define _ASM_POWERPC_ISERIES_EXCEPTION_H
+/*
+ * Extracted from head_64.S
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *
+ *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
+ *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
+ *
+ *  This file contains the low-level support and setup for the
+ *  PowerPC-64 platform, including trap and interrupt dispatch.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <asm/exception.h>
+
+#define EXCEPTION_PROLOG_ISERIES_1                                      \
+        mfmsr   r10;                                                    \
+        ld      r12,PACALPPACAPTR(r13);                                 \
+        ld      r11,LPPACASRR0(r12);                                    \
+        ld      r12,LPPACASRR1(r12);                                    \
+        ori     r10,r10,MSR_RI;                                         \
+        mtmsrd  r10,1
+
+#define STD_EXCEPTION_ISERIES(label, area)                              \
+        .globl label##_iSeries;                                         \
+label##_iSeries:                                                        \
+        HMT_MEDIUM;                                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
+        EXCEPTION_PROLOG_1(area);                                       \
+        EXCEPTION_PROLOG_ISERIES_1;                                     \
+        b       label##_common
+
+#define MASKABLE_EXCEPTION_ISERIES(label)                               \
+        .globl label##_iSeries;                                         \
+label##_iSeries:                                                        \
+        HMT_MEDIUM;                                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
+        EXCEPTION_PROLOG_1(PACA_EXGEN);                                 \
+        lbz     r10,PACASOFTIRQEN(r13);                                 \
+        cmpwi   0,r10,0;                                                \
+        beq-    label##_iSeries_masked;                                 \
+        EXCEPTION_PROLOG_ISERIES_1;                                     \
+        b       label##_common;                                         \
+
+#endif  /* _ASM_POWERPC_ISERIES_EXCEPTION_H */
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 63b33675848b..701d9297c207 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -346,8 +346,15 @@ static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
+static int iseries_irq_host_match(struct irq_host *h, struct device_node *np)
+{
+        /* Match all */
+        return 1;
+}
+
 static struct irq_host_ops iseries_irq_host_ops = {
         .map = iseries_irq_host_map,
+        .match = iseries_irq_host_match,
 };
 
 /*
@@ -369,7 +376,8 @@ void __init iSeries_init_IRQ(void)
         /* Create irq host. No need for a revmap since HV will give us
          * back our virtual irq number
          */
-        host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &iseries_irq_host_ops, 0);
+        host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
+                              &iseries_irq_host_ops, 0);
         BUG_ON(host == NULL);
         irq_set_default_host(host);
 
diff --git a/arch/powerpc/platforms/iseries/it_lp_naca.h b/arch/powerpc/platforms/iseries/it_lp_naca.h
index 9bbf58986819..cf6dcf6ef07b 100644
--- a/arch/powerpc/platforms/iseries/it_lp_naca.h
+++ b/arch/powerpc/platforms/iseries/it_lp_naca.h
@@ -60,7 +60,7 @@ struct ItLpNaca {
         u8      xRsvd2_0[128];          // Reserved                     x00-x7F
 
 // CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
-// NB: Padding required to keep xInterrruptHdlr at x300 which is required
+// NB: Padding required to keep xInterruptHdlr at x300 which is required
 // for v4r4 PLIC.
         u8      xOldLpQueue[128];       // LP Queue needed for v4r4     100-17F
         u8      xRsvd3_0[384];          // Reserved                     180-2FF
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index 13a8b1908ded..fad493e29d37 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -41,7 +41,6 @@
 #include <asm/time.h>
 #include <asm/paca.h>
 #include <asm/cache.h>
-#include <asm/sections.h>
 #include <asm/abs_addr.h>
 #include <asm/iseries/hv_lp_config.h>
 #include <asm/iseries/hv_call_event.h>
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index 2542403288f9..771ed0cf29a5 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -169,15 +169,12 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32(addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
@@ -185,8 +182,8 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
 
 static struct pci_ops u3_agp_pci_ops =
 {
-        u3_agp_read_config,
-        u3_agp_write_config
+        .read = u3_agp_read_config,
+        .write = u3_agp_write_config,
 };
 
 static unsigned long u3_ht_cfa0(u8 devfn, u8 off)
@@ -268,15 +265,12 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32(addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
@@ -284,8 +278,8 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
 
 static struct pci_ops u3_ht_pci_ops =
 {
-        u3_ht_read_config,
-        u3_ht_write_config
+        .read = u3_ht_read_config,
+        .write = u3_ht_write_config,
 };
 
 static unsigned int u4_pcie_cfa0(unsigned int devfn, unsigned int off)
@@ -376,15 +370,12 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32(addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
@@ -392,8 +383,8 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
 
 static struct pci_ops u4_pcie_pci_ops =
 {
-        u4_pcie_read_config,
-        u4_pcie_write_config
+        .read = u4_pcie_read_config,
+        .write = u4_pcie_write_config,
 };
 
 static void __init setup_u3_agp(struct pci_controller* hose)
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig
index 95cd90fd81c7..117d90aa5008 100644
--- a/arch/powerpc/platforms/pasemi/Kconfig
+++ b/arch/powerpc/platforms/pasemi/Kconfig
@@ -5,6 +5,7 @@ config PPC_PASEMI
         select MPIC
         select PPC_UDBG_16550
         select PPC_NATIVE
+        select MPIC_BROKEN_REGREAD
         help
           This option enables support for PA Semi's PWRficient line
           of SoC processors, including PA6T-1682M
diff --git a/arch/powerpc/platforms/pasemi/idle.c b/arch/powerpc/platforms/pasemi/idle.c
index 3c962d5757be..d8e1fcc78513 100644
--- a/arch/powerpc/platforms/pasemi/idle.c
+++ b/arch/powerpc/platforms/pasemi/idle.c
@@ -72,8 +72,11 @@ static int pasemi_system_reset_exception(struct pt_regs *regs)
         return 1;
 }
 
-void __init pasemi_idle_init(void)
+static int __init pasemi_idle_init(void)
 {
+        if (!machine_is(pasemi))
+                return -ENODEV;
+
 #ifndef CONFIG_PPC_PASEMI_CPUFREQ
         printk(KERN_WARNING "No cpufreq driver, powersavings modes disabled\n");
         current_mode = 0;
@@ -82,7 +85,10 @@ void __init pasemi_idle_init(void)
         ppc_md.system_reset_exception = pasemi_system_reset_exception;
         ppc_md.power_save = modes[current_mode].entry;
         printk(KERN_INFO "Using PA6T idle loop (%s)\n", modes[current_mode].name);
+
+        return 0;
 }
+late_initcall(pasemi_idle_init);
 
 static int __init idle_param(char *p)
 {
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c
index 9014d55c717b..6c42787fb382 100644
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -187,7 +187,7 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev)
 static void pci_dma_bus_setup_null(struct pci_bus *b) { }
 static void pci_dma_dev_setup_null(struct pci_dev *d) { }
 
-int iob_init(struct device_node *dn)
+int __init iob_init(struct device_node *dn)
 {
         unsigned long tmp;
         u32 regword;
@@ -233,7 +233,7 @@ int iob_init(struct device_node *dn)
 
 
 /* These are called very early. */
-void iommu_init_early_pasemi(void)
+void __init iommu_init_early_pasemi(void)
 {
         int iommu_off;
 
diff --git a/arch/powerpc/platforms/pasemi/pasemi.h b/arch/powerpc/platforms/pasemi/pasemi.h
index be8495497611..516acabb4e96 100644
--- a/arch/powerpc/platforms/pasemi/pasemi.h
+++ b/arch/powerpc/platforms/pasemi/pasemi.h
@@ -6,9 +6,9 @@ extern void pas_pci_init(void);
 extern void __devinit pas_pci_irq_fixup(struct pci_dev *dev);
 extern void __devinit pas_pci_dma_dev_setup(struct pci_dev *dev);
 
-extern void __init alloc_iobmap_l2(void);
+extern void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset);
 
-extern void __init pasemi_idle_init(void);
+extern void __init alloc_iobmap_l2(void);
 
 /* Power savings modes, implemented in asm */
 extern void idle_spin(void);
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index ab1f5f62bcd8..b6a0ec45c695 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -51,6 +51,61 @@ static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose,
         return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
 }
 
+static inline int is_root_port(int busno, int devfn)
+{
+        return ((busno == 0) && (PCI_FUNC(devfn) < 4) &&
+                 ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn) == 17)));
+}
+
+static inline int is_5945_reg(int reg)
+{
+        return (((reg >= 0x18) && (reg < 0x34)) ||
+                ((reg >= 0x158) && (reg < 0x178)));
+}
+
+static int workaround_5945(struct pci_bus *bus, unsigned int devfn,
+                           int offset, int len, u32 *val)
+{
+        struct pci_controller *hose;
+        void volatile __iomem *addr, *dummy;
+        int byte;
+        u32 tmp;
+
+        if (!is_root_port(bus->number, devfn) || !is_5945_reg(offset))
+                return 0;
+
+        hose = pci_bus_to_host(bus);
+
+        addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3);
+        byte = offset & 0x3;
+
+        /* Workaround bug 5945: write 0 to a dummy register before reading,
+         * and write back what we read. We must read/write the full 32-bit
+         * contents so we need to shift and mask by hand.
+         */
+        dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10);
+        out_le32(dummy, 0);
+        tmp = in_le32(addr);
+        out_le32(addr, tmp);
+
+        switch (len) {
+        case 1:
+                *val = (tmp >> (8*byte)) & 0xff;
+                break;
+        case 2:
+                if (byte == 0)
+                        *val = tmp & 0xffff;
+                else
+                        *val = (tmp >> 16) & 0xffff;
+                break;
+        default:
+                *val = tmp;
+                break;
+        }
+
+        return 1;
+}
+
 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
                               int offset, int len, u32 *val)
 {
@@ -64,6 +119,9 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
         if (!pa_pxp_offset_valid(bus->number, devfn, offset))
                 return PCIBIOS_BAD_REGISTER_NUMBER;
 
+        if (workaround_5945(bus, devfn, offset, len, val))
+                return PCIBIOS_SUCCESSFUL;
+
         addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
         /*
@@ -107,23 +165,20 @@ static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32(addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
 }
 
 static struct pci_ops pa_pxp_ops = {
-        pa_pxp_read_config,
-        pa_pxp_write_config,
+        .read = pa_pxp_read_config,
+        .write = pa_pxp_write_config,
 };
 
 static void __init setup_pa_pxp(struct pci_controller *hose)
@@ -178,3 +233,12 @@ void __init pas_pci_init(void)
         /* Use the common resource allocation mechanism */
         pci_probe_only = 1;
 }
+
+void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
+{
+        struct pci_controller *hose;
+
+        hose = pci_bus_to_host(dev->bus);
+
+        return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset);
+}
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index ffe6528048b5..5ddf40a66ae8 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -39,8 +39,21 @@
 
 #include "pasemi.h"
 
+/* SDC reset register, must be pre-mapped at reset time */
 static void __iomem *reset_reg;
 
+/* Various error status registers, must be pre-mapped at MCE time */
+
+#define MAX_MCE_REGS    32
+struct mce_regs {
+        char *name;
+        void __iomem *addr;
+};
+
+static struct mce_regs mce_regs[MAX_MCE_REGS];
+static int num_mce_regs;
+
+
 static void pas_restart(char *cmd)
 {
         printk("Restarting...\n");
@@ -50,26 +63,30 @@ static void pas_restart(char *cmd)
 
 #ifdef CONFIG_SMP
 static DEFINE_SPINLOCK(timebase_lock);
+static unsigned long timebase;
 
 static void __devinit pas_give_timebase(void)
 {
-        unsigned long tb;
-
         spin_lock(&timebase_lock);
         mtspr(SPRN_TBCTL, TBCTL_FREEZE);
-        tb = mftb();
-        mtspr(SPRN_TBCTL, TBCTL_UPDATE_LOWER | (tb & 0xffffffff));
-        mtspr(SPRN_TBCTL, TBCTL_UPDATE_UPPER | (tb >> 32));
-        mtspr(SPRN_TBCTL, TBCTL_RESTART);
+        isync();
+        timebase = get_tb();
         spin_unlock(&timebase_lock);
-        pr_debug("pas_give_timebase: cpu %d gave tb %lx\n",
-                 smp_processor_id(), tb);
+
+        while (timebase)
+                barrier();
+        mtspr(SPRN_TBCTL, TBCTL_RESTART);
 }
 
 static void __devinit pas_take_timebase(void)
 {
-        pr_debug("pas_take_timebase: cpu %d has tb %lx\n",
-                 smp_processor_id(), mftb());
+        while (!timebase)
+                smp_rmb();
+
+        spin_lock(&timebase_lock);
+        set_tb(timebase >> 32, timebase & 0xffffffff);
+        timebase = 0;
+        spin_unlock(&timebase_lock);
 }
 
 struct smp_ops_t pas_smp_ops = {
@@ -98,9 +115,60 @@ void __init pas_setup_arch(void)
         /* Remap SDC register for doing reset */
         /* XXXOJN This should maybe come out of the device tree */
         reset_reg = ioremap(0xfc101100, 4);
+}
+
+static int __init pas_setup_mce_regs(void)
+{
+        struct pci_dev *dev;
+        int reg;
+
+        if (!machine_is(pasemi))
+                return -ENODEV;
+
+        /* Remap various SoC status registers for use by the MCE handler */
+
+        reg = 0;
+
+        dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, NULL);
+        while (dev && reg < MAX_MCE_REGS) {
+                mce_regs[reg].name = kasprintf(GFP_KERNEL,
+                                                "mc%d_mcdebug_errsta", reg);
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x730);
+                dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, dev);
+                reg++;
+        }
+
+        dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
+        if (dev && reg+4 < MAX_MCE_REGS) {
+                mce_regs[reg].name = "iobdbg_IntStatus1";
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x438);
+                reg++;
+                mce_regs[reg].name = "iobdbg_IOCTbusIntDbgReg";
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x454);
+                reg++;
+                mce_regs[reg].name = "iobiom_IntStatus";
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc10);
+                reg++;
+                mce_regs[reg].name = "iobiom_IntDbgReg";
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc1c);
+                reg++;
+        }
+
+        dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa009, NULL);
+        if (dev && reg+2 < MAX_MCE_REGS) {
+                mce_regs[reg].name = "l2csts_IntStatus";
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x200);
+                reg++;
+                mce_regs[reg].name = "l2csts_Cnt";
+                mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x214);
+                reg++;
+        }
 
-        pasemi_idle_init();
+        num_mce_regs = reg;
+
+        return 0;
 }
+device_initcall(pas_setup_mce_regs);
 
 static __init void pas_init_IRQ(void)
 {
@@ -162,25 +230,34 @@ static int pas_machine_check_handler(struct pt_regs *regs)
 {
         int cpu = smp_processor_id();
         unsigned long srr0, srr1, dsisr;
+        int dump_slb = 0;
+        int i;
 
         srr0 = regs->nip;
         srr1 = regs->msr;
         dsisr = mfspr(SPRN_DSISR);
         printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
-        printk(KERN_ERR "SRR0 0x%016lx SRR1 0x%016lx\n", srr0, srr1);
-        printk(KERN_ERR "DSISR 0x%016lx DAR 0x%016lx\n", dsisr, regs->dar);
+        printk(KERN_ERR "SRR0  0x%016lx SRR1 0x%016lx\n", srr0, srr1);
+        printk(KERN_ERR "DSISR 0x%016lx DAR  0x%016lx\n", dsisr, regs->dar);
+        printk(KERN_ERR "BER   0x%016lx MER  0x%016lx\n", mfspr(SPRN_PA6T_BER),
+                mfspr(SPRN_PA6T_MER));
+        printk(KERN_ERR "IER   0x%016lx DER  0x%016lx\n", mfspr(SPRN_PA6T_IER),
+                mfspr(SPRN_PA6T_DER));
         printk(KERN_ERR "Cause:\n");
 
         if (srr1 & 0x200000)
                 printk(KERN_ERR "Signalled by SDC\n");
+
         if (srr1 & 0x100000) {
                 printk(KERN_ERR "Load/Store detected error:\n");
                 if (dsisr & 0x8000)
                         printk(KERN_ERR "D-cache ECC double-bit error or bus error\n");
                 if (dsisr & 0x4000)
                         printk(KERN_ERR "LSU snoop response error\n");
-                if (dsisr & 0x2000)
+                if (dsisr & 0x2000) {
                         printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n");
+                        dump_slb = 1;
+                }
                 if (dsisr & 0x1000)
                         printk(KERN_ERR "Recoverable Duptags\n");
                 if (dsisr & 0x800)
@@ -188,13 +265,40 @@ static int pas_machine_check_handler(struct pt_regs *regs)
                 if (dsisr & 0x400)
                         printk(KERN_ERR "TLB parity error count overflow\n");
         }
+
         if (srr1 & 0x80000)
                 printk(KERN_ERR "Bus Error\n");
-        if (srr1 & 0x40000)
+
+        if (srr1 & 0x40000) {
                 printk(KERN_ERR "I-side SLB multiple hit\n");
+                dump_slb = 1;
+        }
+
         if (srr1 & 0x20000)
                 printk(KERN_ERR "I-cache parity error hit\n");
 
+        if (num_mce_regs == 0)
+                printk(KERN_ERR "No MCE registers mapped yet, can't dump\n");
+        else
+                printk(KERN_ERR "SoC debug registers:\n");
+
+        for (i = 0; i < num_mce_regs; i++)
+                printk(KERN_ERR "%s: 0x%08x\n", mce_regs[i].name,
+                        in_le32(mce_regs[i].addr));
+
+        if (dump_slb) {
+                unsigned long e, v;
+                int i;
+
+                printk(KERN_ERR "slb contents:\n");
+                for (i = 0; i < SLB_NUM_ENTRIES; i++) {
+                        asm volatile("slbmfee  %0,%1" : "=r" (e) : "r" (i));
+                        asm volatile("slbmfev  %0,%1" : "=r" (v) : "r" (i));
+                        printk(KERN_ERR "%02d %016lx %016lx\n", i, e, v);
+                }
+        }
+
+
         /* SRR1[62] is from MSR[62] if recoverable, so pass that back */
         return !!(srr1 & 0x2);
 }
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index 9d73d0234c5d..cf660916ae0b 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -17,7 +17,6 @@
 #include <asm/prom.h>
 #include <asm/page.h>
 #include <asm/bootx.h>
-#include <asm/bootinfo.h>
 #include <asm/btext.h>
 #include <asm/io.h>
 
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index efdf5eb81ecc..da2007e3db0e 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -40,7 +40,6 @@
 #include <linux/completion.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
-#include <linux/completion.h>
 #include <linux/timer.h>
 #include <linux/mutex.h>
 #include <asm/keylargo.h>
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 92586db19754..ec49099830d5 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -209,15 +209,12 @@ static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32(addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
@@ -225,8 +222,8 @@ static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
 
 static struct pci_ops macrisc_pci_ops =
 {
-        macrisc_read_config,
-        macrisc_write_config
+        .read = macrisc_read_config,
+        .write = macrisc_write_config,
 };
 
 #ifdef CONFIG_PPC32
@@ -280,8 +277,8 @@ chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
 
 static struct pci_ops chaos_pci_ops =
 {
-        chaos_read_config,
-        chaos_write_config
+        .read = chaos_read_config,
+        .write = chaos_write_config,
 };
 
 static void __init setup_chaos(struct pci_controller *hose,
@@ -440,15 +437,12 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32((u32 __iomem *)addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
@@ -456,8 +450,8 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
 
 static struct pci_ops u3_ht_pci_ops =
 {
-        u3_ht_read_config,
-        u3_ht_write_config
+        .read = u3_ht_read_config,
+        .write = u3_ht_write_config,
 };
 
 #define U4_PCIE_CFA0(devfn, off)        \
@@ -545,15 +539,12 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
         switch (len) {
         case 1:
                 out_8(addr, val);
-                (void) in_8(addr);
                 break;
         case 2:
                 out_le16(addr, val);
-                (void) in_le16(addr);
                 break;
         default:
                 out_le32(addr, val);
-                (void) in_le32(addr);
                 break;
         }
         return PCIBIOS_SUCCESSFUL;
@@ -561,8 +552,8 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
 
 static struct pci_ops u4_pcie_pci_ops =
 {
-        u4_pcie_read_config,
-        u4_pcie_write_config
+        .read = u4_pcie_read_config,
+        .write = u4_pcie_write_config,
 };
 
 #endif /* CONFIG_PPC64 */
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 87cd6805171a..999f5e160897 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -384,7 +384,7 @@ static void __init pmac_pic_probe_oldstyle(void)
         /*
          * Allocate an irq host
          */
-        pmac_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, max_irqs,
+        pmac_pic_host = irq_alloc_host(master, IRQ_HOST_MAP_LINEAR, max_irqs,
                                        &pmac_pic_host_ops,
                                        max_irqs);
         BUG_ON(pmac_pic_host == NULL);
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h
index 6e090a7dea83..fcde070f7054 100644
--- a/arch/powerpc/platforms/powermac/pmac.h
+++ b/arch/powerpc/platforms/powermac/pmac.h
@@ -22,9 +22,6 @@ extern void pmac_read_rtc_time(void);
 extern void pmac_calibrate_decr(void);
 extern void pmac_pci_irq_fixup(struct pci_dev *);
 extern void pmac_pci_init(void);
-extern unsigned long pmac_ide_get_base(int index);
-extern void pmac_ide_init_hwif_ports(hw_regs_t *hw,
-        unsigned long data_port, unsigned long ctrl_port, int *irq);
 
 extern void pmac_nvram_update(void);
 extern unsigned char pmac_nvram_read_byte(int addr);
@@ -33,7 +30,6 @@ extern int pmac_pci_enable_device_hook(struct pci_dev *dev, int initial);
 extern void pmac_pcibios_after_init(void);
 extern int of_show_percpuinfo(struct seq_file *m, int i);
 
-extern void pmac_pci_init(void);
 extern void pmac_setup_pci_dma(void);
 extern void pmac_check_ht_link(void);
 
diff --git a/arch/powerpc/platforms/powermac/udbg_adb.c b/arch/powerpc/platforms/powermac/udbg_adb.c
index 6124e59e1038..44e0b55a2a02 100644
--- a/arch/powerpc/platforms/powermac/udbg_adb.c
+++ b/arch/powerpc/platforms/powermac/udbg_adb.c
@@ -12,7 +12,6 @@
 #include <asm/xmon.h>
 #include <asm/prom.h>
 #include <asm/bootx.h>
-#include <asm/machdep.h>
 #include <asm/errno.h>
 #include <asm/pmac_feature.h>
 #include <asm/processor.h>
@@ -150,7 +149,7 @@ static void udbg_adb_putc(char c)
                 return udbg_adb_old_putc(c);
 }
 
-void udbg_adb_init_early(void)
+void __init udbg_adb_init_early(void)
 {
 #ifdef CONFIG_BOOTX_TEXT
         if (btext_find_display(1) == 0) {
@@ -160,7 +159,7 @@ void udbg_adb_init_early(void)
 #endif
 }
 
-int udbg_adb_init(int force_btext)
+int __init udbg_adb_init(int force_btext)
 {
         struct device_node *np;
 
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index ce15cada88d4..fd063fe0c9b3 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -297,8 +297,8 @@ static int ps3_storage_wait_for_device(const struct ps3_repository_device *repo)
                 u64 dev_port;
         } *notify_event;
 
-        pr_debug(" -> %s:%u: bus_id %u, dev_id %u, dev_type %u\n", __func__,
-                 __LINE__, repo->bus_id, repo->dev_id, repo->dev_type);
+        pr_debug(" -> %s:%u: (%u:%u:%u)\n", __func__, __LINE__, repo->bus_id,
+                 repo->dev_id, repo->dev_type);
 
         buf = kzalloc(512, GFP_KERNEL);
         if (!buf)
@@ -359,6 +359,11 @@ static int ps3_storage_wait_for_device(const struct ps3_repository_device *repo)
                         break;
                 }
 
+                pr_debug("%s:%d: notify event (%u:%u:%u): event_type 0x%lx, "
+                         "port %lu\n", __func__, __LINE__, repo->bus_index,
+                         repo->dev_index, repo->dev_type,
+                         notify_event->event_type, notify_event->dev_port);
+
                 if (notify_event->event_type != notify_region_probe ||
                     notify_event->bus_id != repo->bus_id) {
                         pr_debug("%s:%u: bad notify_event: event %lu, "
@@ -370,8 +375,9 @@ static int ps3_storage_wait_for_device(const struct ps3_repository_device *repo)
 
                 if (notify_event->dev_id == repo->dev_id &&
                     notify_event->dev_type == repo->dev_type) {
-                        pr_debug("%s:%u: device ready: dev_id %u\n", __func__,
-                                 __LINE__, repo->dev_id);
+                        pr_debug("%s:%u: device ready (%u:%u:%u)\n", __func__,
+                                 __LINE__, repo->bus_index, repo->dev_index,
+                                 repo->dev_type);
                         error = 0;
                         break;
                 }
@@ -412,9 +418,10 @@ static int ps3_setup_storage_dev(const struct ps3_repository_device *repo,
                 return -ENODEV;
         }
 
-        pr_debug("%s:%u: index %u:%u: port %lu blk_size %lu num_blocks %lu "
+        pr_debug("%s:%u: (%u:%u:%u): port %lu blk_size %lu num_blocks %lu "
                  "num_regions %u\n", __func__, __LINE__, repo->bus_index,
-                 repo->dev_index, port, blk_size, num_blocks, num_regions);
+                 repo->dev_index, repo->dev_type, port, blk_size, num_blocks,
+                 num_regions);
 
         p = kzalloc(sizeof(struct ps3_storage_device) +
                     num_regions * sizeof(struct ps3_storage_region),
@@ -681,8 +688,9 @@ static int ps3_probe_thread(void *data)
                                 pr_debug("%s:%u: find device error.\n",
                                         __func__, __LINE__);
                         else {
-                                pr_debug("%s:%u: found device\n", __func__,
-                                        __LINE__);
+                                pr_debug("%s:%u: found device (%u:%u:%u)\n",
+                                         __func__, __LINE__, repo->bus_index,
+                                         repo->dev_index, repo->dev_type);
                                 ps3_register_repository_device(repo);
                                 ps3_repository_bump_device(repo);
                                 ms = 250;
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 67e32ec9b37e..3a6db04aa940 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -673,9 +673,16 @@ static int ps3_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
+static int ps3_host_match(struct irq_host *h, struct device_node *np)
+{
+        /* Match all */
+        return 1;
+}
+
 static struct irq_host_ops ps3_host_ops = {
         .map = ps3_host_map,
         .unmap = ps3_host_unmap,
+        .match = ps3_host_match,
 };
 
 void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq)
@@ -726,7 +733,7 @@ void __init ps3_init_IRQ(void)
         unsigned cpu;
         struct irq_host *host;
 
-        host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &ps3_host_ops,
+        host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0, &ps3_host_ops,
                 PS3_INVALID_OUTLET);
         irq_set_default_host(host);
         irq_set_virq_count(PS3_PLUG_MAX + 1);
diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h
index 2eb8f92704b4..27c7d099816a 100644
--- a/arch/powerpc/platforms/ps3/platform.h
+++ b/arch/powerpc/platforms/ps3/platform.h
@@ -47,7 +47,11 @@ void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq);
 /* smp */
 
 void smp_init_ps3(void);
+#ifdef CONFIG_SMP
 void ps3_smp_cleanup_cpu(int cpu);
+#else
+static inline void ps3_smp_cleanup_cpu(int cpu) { }
+#endif
 
 /* time */
 
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index b8770395013d..22322b35a0ff 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -169,6 +169,8 @@ static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
  */
 static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
 {
+        struct device_node *dn;
+        struct pci_dev *dev = pdn->pcidev;
         u32 cfg;
         int cap, i;
         int n = 0;
@@ -184,6 +186,17 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
         n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
         printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
 
+        /* Gather bridge-specific registers */
+        if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
+                rtas_read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
+                n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
+                printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
+
+                rtas_read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
+                n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
+                printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
+        }
+
         /* Dump out the PCI-X command and status regs */
         cap = pci_find_capability(pdn->pcidev, PCI_CAP_ID_PCIX);
         if (cap) {
@@ -209,7 +222,7 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
                         printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
                 }
 
-                cap = pci_find_ext_capability(pdn->pcidev,PCI_EXT_CAP_ID_ERR);
+                cap = pci_find_ext_capability(pdn->pcidev, PCI_EXT_CAP_ID_ERR);
                 if (cap) {
                         n += scnprintf(buf+n, len-n, "pci-e AER:\n");
                         printk(KERN_WARNING
@@ -222,6 +235,18 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
                         }
                 }
         }
+
+        /* Gather status on devices under the bridge */
+        if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
+                dn = pdn->node->child;
+                while (dn) {
+                        pdn = PCI_DN(dn);
+                        if (pdn)
+                                n += gather_pci_data(pdn, buf+n, len-n);
+                        dn = dn->sibling;
+                }
+        }
+
         return n;
 }
 
@@ -750,12 +775,12 @@ int rtas_set_slot_reset(struct pci_dn *pdn)
                         return 0;
 
                 if (rc < 0) {
-                        printk (KERN_ERR "EEH: unrecoverable slot failure %s\n",
-                                pdn->node->full_name);
+                        printk(KERN_ERR "EEH: unrecoverable slot failure %s\n",
+                               pdn->node->full_name);
                         return -1;
                 }
-                printk (KERN_ERR "EEH: bus reset %d failed on slot %s\n",
-                        i+1, pdn->node->full_name);
+                printk(KERN_ERR "EEH: bus reset %d failed on slot %s, rc=%d\n",
+                       i+1, pdn->node->full_name, rc);
         }
 
         return -1;
@@ -930,7 +955,7 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
         pdn->eeh_freeze_count = 0;
         pdn->eeh_false_positives = 0;
 
-        if (status && strcmp(status, "ok") != 0)
+        if (status && strncmp(status, "ok", 2) != 0)
                 return NULL;    /* ignore devices with bad status */
 
         /* Ignore bad nodes. */
@@ -944,23 +969,6 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
         }
         pdn->class_code = *class_code;
 
-        /*
-         * Now decide if we are going to "Disable" EEH checking
-         * for this device.  We still run with the EEH hardware active,
-         * but we won't be checking for ff's.  This means a driver
-         * could return bad data (very bad!), an interrupt handler could
-         * hang waiting on status bits that won't change, etc.
-         * But there are a few cases like display devices that make sense.
-         */
-        enable = 1;     /* i.e. we will do checking */
-#if 0
-        if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
-                enable = 0;
-#endif
-
-        if (!enable)
-                pdn->eeh_mode |= EEH_MODE_NOCHECK;
-
         /* Ok... see if this device supports EEH.  Some do, some don't,
          * and the only way to find out is to check each and every one. */
         regs = of_get_property(dn, "reg", NULL);
diff --git a/arch/powerpc/platforms/pseries/eeh_cache.c b/arch/powerpc/platforms/pseries/eeh_cache.c
index e49c815eae23..1e83fcd0df31 100644
--- a/arch/powerpc/platforms/pseries/eeh_cache.c
+++ b/arch/powerpc/platforms/pseries/eeh_cache.c
@@ -225,6 +225,10 @@ void pci_addr_cache_insert_device(struct pci_dev *dev)
 {
         unsigned long flags;
 
+        /* Ignore PCI bridges */
+        if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
+                return;
+
         spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
         __pci_addr_cache_insert_device(dev);
         spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
@@ -285,16 +289,13 @@ void __init pci_addr_cache_build(void)
         spin_lock_init(&pci_io_addr_cache_root.piar_lock);
 
         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
-                /* Ignore PCI bridges */
-                if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
-                        continue;
 
                 pci_addr_cache_insert_device(dev);
 
                 dn = pci_device_to_OF_node(dev);
                 if (!dn)
                         continue;
-                pci_dev_get (dev);  /* matching put is in eeh_remove_device() */
+                pci_dev_get(dev);  /* matching put is in eeh_remove_device() */
                 PCI_DN(dn)->pcidev = dev;
 
                 eeh_sysfs_add_device(dev);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 8cc6eeeaae2f..ea327ca345c6 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -35,7 +35,6 @@
 #include <asm/tlbflush.h>
 #include <asm/tlb.h>
 #include <asm/prom.h>
-#include <asm/abs_addr.h>
 #include <asm/cputable.h>
 #include <asm/udbg.h>
 #include <asm/smp.h>
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index 6063ea2f67ad..2793a1b100e6 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -70,11 +70,15 @@ static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
                 seq_num = rtas_ret[1];
         } while (rtas_busy_delay(rc));
 
-        if (rc == 0) /* Success */
-                rc = rtas_ret[0];
+        /*
+         * If the RTAS call succeeded, check the number of irqs is actually
+         * what we asked for. If not, return an error.
+         */
+        if (rc == 0 && rtas_ret[0] != num_irqs)
+                rc = -ENOSPC;
 
-        pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d) = (%d)\n",
-                 func, num_irqs, rc);
+        pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n",
+                 func, num_irqs, rtas_ret[0], rc);
 
         return rc;
 }
@@ -87,7 +91,7 @@ static void rtas_disable_msi(struct pci_dev *pdev)
         if (!pdn)
                 return;
 
-        if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0)
+        if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0))
                 pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
 }
 
@@ -180,38 +184,31 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         if (type == PCI_CAP_ID_MSI) {
                 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
 
-                if (rc != nvec) {
+                if (rc) {
                         pr_debug("rtas_msi: trying the old firmware call.\n");
                         rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
                 }
         } else
                 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
 
-        if (rc != nvec) {
+        if (rc) {
                 pr_debug("rtas_msi: rtas_change_msi() failed\n");
-
-                /*
-                 * In case of an error it's not clear whether the device is
-                 * left with MSI enabled or not, so we explicitly disable.
-                 */
-                goto out_free;
+                return rc;
         }
 
         i = 0;
         list_for_each_entry(entry, &pdev->msi_list, list) {
                 hwirq = rtas_query_irq_number(pdn, i);
                 if (hwirq < 0) {
-                        rc = hwirq;
                         pr_debug("rtas_msi: error (%d) getting hwirq\n", rc);
-                        goto out_free;
+                        return hwirq;
                 }
 
                 virq = irq_create_mapping(NULL, hwirq);
 
                 if (virq == NO_IRQ) {
                         pr_debug("rtas_msi: Failed mapping hwirq %d\n", hwirq);
-                        rc = -ENOSPC;
-                        goto out_free;
+                        return -ENOSPC;
                 }
 
                 dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq);
@@ -220,10 +217,6 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         }
 
         return 0;
-
- out_free:
-        rtas_teardown_msi_irqs(pdev);
-        return rc;
 }
 
 static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c
index 9797b10b2935..73401c820110 100644
--- a/arch/powerpc/platforms/pseries/rtasd.c
+++ b/arch/powerpc/platforms/pseries/rtasd.c
@@ -44,15 +44,20 @@ static unsigned long rtas_log_start;
 static unsigned long rtas_log_size;
 
 static int surveillance_timeout = -1;
-static unsigned int rtas_event_scan_rate;
 static unsigned int rtas_error_log_max;
 static unsigned int rtas_error_log_buffer_max;
 
-static int full_rtas_msgs = 0;
+/* RTAS service tokens */
+static unsigned int event_scan;
+static unsigned int rtas_event_scan_rate;
 
-extern int no_logging;
+static int full_rtas_msgs = 0;
 
-volatile int error_log_cnt = 0;
+/* Stop logging to nvram after first fatal error */
+static int logging_enabled; /* Until we initialize everything,
+                             * make sure we don't try logging
+                             * anything */
+static int error_log_cnt;
 
 /*
  * Since we use 32 bit RTAS, the physical address of this must be below
@@ -61,8 +66,6 @@ volatile int error_log_cnt = 0;
  */
 static unsigned char logdata[RTAS_ERROR_LOG_MAX];
 
-static int get_eventscan_parms(void);
-
 static char *rtas_type[] = {
         "Unknown", "Retry", "TCE Error", "Internal Device Failure",
         "Timeout", "Data Parity", "Address Parity", "Cache Parity",
@@ -166,9 +169,9 @@ static int log_rtas_len(char * buf)
                 len += err->extended_log_length;
         }
 
-        if (rtas_error_log_max == 0) {
-                get_eventscan_parms();
-        }
+        if (rtas_error_log_max == 0)
+                rtas_error_log_max = rtas_get_error_log_max();
+
         if (len > rtas_error_log_max)
                 len = rtas_error_log_max;
 
@@ -215,8 +218,8 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
         }
 
         /* Write error to NVRAM */
-        if (!no_logging && !(err_type & ERR_FLAG_BOOT))
-                nvram_write_error_log(buf, len, err_type);
+        if (logging_enabled && !(err_type & ERR_FLAG_BOOT))
+                nvram_write_error_log(buf, len, err_type, error_log_cnt);
 
         /*
          * rtas errors can occur during boot, and we do want to capture
@@ -227,8 +230,8 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
                 printk_log_rtas(buf, len);
 
         /* Check to see if we need to or have stopped logging */
-        if (fatal || no_logging) {
-                no_logging = 1;
+        if (fatal || !logging_enabled) {
+                logging_enabled = 0;
                 spin_unlock_irqrestore(&rtasd_log_lock, s);
                 return;
         }
@@ -300,7 +303,7 @@ static ssize_t rtas_log_read(struct file * file, char __user * buf,
 
         spin_lock_irqsave(&rtasd_log_lock, s);
         /* if it's 0, then we know we got the last one (the one in NVRAM) */
-        if (rtas_log_size == 0 && !no_logging)
+        if (rtas_log_size == 0 && logging_enabled)
                 nvram_clear_error_log();
         spin_unlock_irqrestore(&rtasd_log_lock, s);
 
@@ -356,32 +359,7 @@ static int enable_surveillance(int timeout)
         return -1;
 }
 
-static int get_eventscan_parms(void)
-{
-        struct device_node *node;
-        const int *ip;
-
-        node = of_find_node_by_path("/rtas");
-
-        ip = of_get_property(node, "rtas-event-scan-rate", NULL);
-        if (ip == NULL) {
-                printk(KERN_ERR "rtasd: no rtas-event-scan-rate\n");
-                of_node_put(node);
-                return -1;
-        }
-        rtas_event_scan_rate = *ip;
-        DEBUG("rtas-event-scan-rate %d\n", rtas_event_scan_rate);
-
-        /* Make room for the sequence number */
-        rtas_error_log_max = rtas_get_error_log_max();
-        rtas_error_log_buffer_max = rtas_error_log_max + sizeof(int);
-
-        of_node_put(node);
-
-        return 0;
-}
-
-static void do_event_scan(int event_scan)
+static void do_event_scan(void)
 {
         int error;
         do {
@@ -408,7 +386,7 @@ static void do_event_scan_all_cpus(long delay)
         cpu = first_cpu(cpu_online_map);
         for (;;) {
                 set_cpus_allowed(current, cpumask_of_cpu(cpu));
-                do_event_scan(rtas_token("event-scan"));
+                do_event_scan();
                 set_cpus_allowed(current, CPU_MASK_ALL);
 
                 /* Drop hotplug lock, and sleep for the specified delay */
@@ -426,31 +404,19 @@ static void do_event_scan_all_cpus(long delay)
 static int rtasd(void *unused)
 {
         unsigned int err_type;
-        int event_scan = rtas_token("event-scan");
         int rc;
 
         daemonize("rtasd");
 
-        if (event_scan == RTAS_UNKNOWN_SERVICE || get_eventscan_parms() == -1)
-                goto error;
-
-        rtas_log_buf = vmalloc(rtas_error_log_buffer_max*LOG_NUMBER);
-        if (!rtas_log_buf) {
-                printk(KERN_ERR "rtasd: no memory\n");
-                goto error;
-        }
-
         printk(KERN_DEBUG "RTAS daemon started\n");
-
         DEBUG("will sleep for %d milliseconds\n", (30000/rtas_event_scan_rate));
 
         /* See if we have any error stored in NVRAM */
         memset(logdata, 0, rtas_error_log_max);
-
-        rc = nvram_read_error_log(logdata, rtas_error_log_max, &err_type);
-
+        rc = nvram_read_error_log(logdata, rtas_error_log_max,
+                                  &err_type, &error_log_cnt);
         /* We can use rtas_log_buf now */
-        no_logging = 0;
+        logging_enabled = 1;
 
         if (!rc) {
                 if (err_type != ERR_FLAG_ALREADY_LOGGED) {
@@ -473,8 +439,6 @@ static int rtasd(void *unused)
         for (;;)
                 do_event_scan_all_cpus(30000/rtas_event_scan_rate);
 
-error:
-        /* Should delete proc entries */
         return -EINVAL;
 }
 
@@ -486,11 +450,28 @@ static int __init rtas_init(void)
                 return 0;
 
         /* No RTAS */
-        if (rtas_token("event-scan") == RTAS_UNKNOWN_SERVICE) {
+        event_scan = rtas_token("event-scan");
+        if (event_scan == RTAS_UNKNOWN_SERVICE) {
                 printk(KERN_DEBUG "rtasd: no event-scan on system\n");
                 return -ENODEV;
         }
 
+        rtas_event_scan_rate = rtas_token("rtas-event-scan-rate");
+        if (rtas_event_scan_rate == RTAS_UNKNOWN_SERVICE) {
+                printk(KERN_ERR "rtasd: no rtas-event-scan-rate on system\n");
+                return -ENODEV;
+        }
+
+        /* Make room for the sequence number */
+        rtas_error_log_max = rtas_get_error_log_max();
+        rtas_error_log_buffer_max = rtas_error_log_max + sizeof(int);
+
+        rtas_log_buf = vmalloc(rtas_error_log_buffer_max*LOG_NUMBER);
+        if (!rtas_log_buf) {
+                printk(KERN_ERR "rtasd: no memory\n");
+                return -ENOMEM;
+        }
+
         entry = create_proc_entry("ppc64/rtas/error_log", S_IRUSR, NULL);
         if (entry)
                 entry->proc_fops = &proc_rtas_log_operations;
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index f0b5ff17d860..66e7d68ffeb1 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -540,7 +540,7 @@ static void __init xics_init_host(void)
                 ops = &xics_host_lpar_ops;
         else
                 ops = &xics_host_direct_ops;
-        xics_host = irq_alloc_host(IRQ_HOST_MAP_TREE, 0, ops,
+        xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, ops,
                                    XICS_IRQ_SPURIOUS);
         BUG_ON(xics_host == NULL);
         irq_set_default_host(xics_host);
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 08ce31e612c2..b0ea8e9495e8 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -16,15 +16,11 @@ obj-$(CONFIG_FSL_PCI)		+= fsl_pci.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
 obj-$(CONFIG_QUICC_ENGINE)      += qe_lib/
 mv64x60-$(CONFIG_PCI)           += mv64x60_pci.o
-obj-$(CONFIG_MV64X60)           += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o
+obj-$(CONFIG_MV64X60)           += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
+                                   mv64x60_udbg.o
 obj-$(CONFIG_RTC_DRV_CMOS)      += rtc_cmos_setup.o
 obj-$(CONFIG_AXON_RAM)          += axonram.o
 
-# contains only the suspend handler for time
-ifeq ($(CONFIG_RTC_CLASS),)
-obj-$(CONFIG_PM)                += timer.o
-endif
-
 ifeq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_PPC_INDIRECT_PCI)  += indirect_pci.o
 obj-$(CONFIG_PPC_I8259)         += i8259.o
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index dd5417aec1b4..160a8b49bdea 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -45,12 +45,11 @@
 #define CPM_MAP_SIZE    (0x4000)
 
 static void m8xx_cpm_dpinit(void);
-static  uint    host_buffer;    /* One page of host buffer */
-static  uint    host_end;       /* end + 1 */
-cpm8xx_t        *cpmp;          /* Pointer to comm processor space */
-cpic8xx_t       *cpic_reg;
+static uint host_buffer; /* One page of host buffer */
+static uint host_end;    /* end + 1 */
+cpm8xx_t *cpmp;          /* Pointer to comm processor space */
+cpic8xx_t *cpic_reg;
 
-static struct device_node *cpm_pic_node;
 static struct irq_host *cpm_pic_host;
 
 static void cpm_mask_irq(unsigned int irq)
@@ -95,11 +94,6 @@ int cpm_get_irq(void)
         return irq_linear_revmap(cpm_pic_host, cpm_vec);
 }
 
-static int cpm_pic_host_match(struct irq_host *h, struct device_node *node)
-{
-        return cpm_pic_node == node;
-}
-
 static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
@@ -115,7 +109,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
  * and return.  This is a no-op function so we don't need any special
  * tests in the interrupt handler.
  */
-static  irqreturn_t cpm_error_interrupt(int irq, void *dev)
+static irqreturn_t cpm_error_interrupt(int irq, void *dev)
 {
         return IRQ_HANDLED;
 }
@@ -127,7 +121,6 @@ static struct irqaction cpm_error_irqaction = {
 };
 
 static struct irq_host_ops cpm_pic_host_ops = {
-        .match = cpm_pic_host_match,
         .map = cpm_pic_host_map,
 };
 
@@ -165,9 +158,8 @@ unsigned int cpm_pic_init(void)
 
         out_be32(&cpic_reg->cpic_cimr, 0);
 
-        cpm_pic_node = of_node_get(np);
-
-        cpm_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &cpm_pic_host_ops, 64);
+        cpm_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR,
+                                      64, &cpm_pic_host_ops, 64);
         if (cpm_pic_host == NULL) {
                 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
                 sirq = NO_IRQ;
@@ -181,7 +173,7 @@ unsigned int cpm_pic_init(void)
                 printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
                 goto end;
         }
-        eirq= irq_of_parse_and_map(np, 0);
+        eirq = irq_of_parse_and_map(np, 0);
         if (eirq == NO_IRQ)
                 goto end;
 
@@ -197,15 +189,15 @@ end:
 
 void cpm_reset(void)
 {
-        cpm8xx_t        *commproc;
-        sysconf8xx_t    *siu_conf;
+        cpm8xx_t *commproc;
+        sysconf8xx_t *siu_conf;
 
         commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
 
 #ifdef CONFIG_UCODE_PATCH
         /* Perform a reset.
         */
-        out_be16(&commproc->cp_cpcr,  CPM_CR_RST | CPM_CR_FLG);
+        out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
 
         /* Wait for it.
         */
@@ -307,7 +299,7 @@ static rh_block_t cpm_boot_dpmem_rh_block[16];
 static rh_info_t cpm_dpmem_info;
 
 #define CPM_DPMEM_ALIGNMENT     8
-static u8* dpram_vbase;
+static u8 *dpram_vbase;
 static uint dpram_pbase;
 
 void m8xx_cpm_dpinit(void)
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index c827715a5090..3bf89b324760 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -201,7 +201,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
         }
 
         if (mode == CPM_CLK_RX)
-                shift +=3;
+                shift += 3;
 
         for (i=0; i<24; i++) {
                 if (clk_map[i][0] == target && clk_map[i][1] == clock) {
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index eabfe06fe05c..d5b36e0ecbda 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -50,7 +50,6 @@
 
 static intctl_cpm2_t *cpm2_intctl;
 
-static struct device_node *cpm2_pic_node;
 static struct irq_host *cpm2_pic_host;
 #define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
@@ -206,11 +205,6 @@ unsigned int cpm2_get_irq(void)
         return irq_linear_revmap(cpm2_pic_host, irq);
 }
 
-static int cpm2_pic_host_match(struct irq_host *h, struct device_node *node)
-{
-        return cpm2_pic_node == node;
-}
-
 static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
@@ -234,7 +228,6 @@ static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct,
 }
 
 static struct irq_host_ops cpm2_pic_host_ops = {
-        .match = cpm2_pic_host_match,
         .map = cpm2_pic_host_map,
         .xlate = cpm2_pic_host_xlate,
 };
@@ -273,8 +266,8 @@ void cpm2_pic_init(struct device_node *node)
         out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
 
         /* create a legacy host */
-        cpm2_pic_node = of_node_get(node);
-        cpm2_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &cpm2_pic_host_ops, 64);
+        cpm2_pic_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+                                       64, &cpm2_pic_host_ops, 64);
         if (cpm2_pic_host == NULL) {
                 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
                 return;
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index a1d2042bb304..e0e24b01e3a6 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -204,7 +204,7 @@ static void dart_free(struct iommu_table *tbl, long index, long npages)
 }
 
 
-static int dart_init(struct device_node *dart_node)
+static int __init dart_init(struct device_node *dart_node)
 {
         unsigned int i;
         unsigned long tmp, base, size;
@@ -313,7 +313,7 @@ static void pci_dma_bus_setup_dart(struct pci_bus *bus)
                 PCI_DN(dn)->iommu_table = &iommu_table_dart;
 }
 
-void iommu_init_early_dart(void)
+void __init iommu_init_early_dart(void)
 {
         struct device_node *dn;
 
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index 574b6ef44e0b..ab11c0b29024 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -33,6 +33,7 @@ unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
 
         return dr[index * 2];
 }
+EXPORT_SYMBOL_GPL(dcr_resource_start);
 
 unsigned int dcr_resource_len(struct device_node *np, unsigned int index)
 {
@@ -44,6 +45,7 @@ unsigned int dcr_resource_len(struct device_node *np, unsigned int index)
 
         return dr[index * 2 + 1];
 }
+EXPORT_SYMBOL_GPL(dcr_resource_len);
 
 #ifndef CONFIG_PPC_DCR_NATIVE
 
@@ -102,7 +104,7 @@ u64 of_translate_dcr_address(struct device_node *dev,
 dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
                    unsigned int dcr_c)
 {
-        dcr_host_t ret = { .token = NULL, .stride = 0 };
+        dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
         u64 addr;
 
         pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
@@ -122,6 +124,7 @@ dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
         ret.token -= dcr_n * ret.stride;
         return ret;
 }
+EXPORT_SYMBOL_GPL(dcr_map);
 
 void dcr_unmap(dcr_host_t host, unsigned int dcr_n, unsigned int dcr_c)
 {
@@ -133,5 +136,6 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_n, unsigned int dcr_c)
         iounmap(h.token);
         h.token = NULL;
 }
+EXPORT_SYMBOL_GPL(dcr_unmap);
 
 #endif /* !defined(CONFIG_PPC_DCR_NATIVE) */
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 114c90f8f560..34cad96e0de9 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -255,5 +255,7 @@ DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8533E, quirk_fsl_pcie_transpare
 DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8533, quirk_fsl_pcie_transparent);
 DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8544E, quirk_fsl_pcie_transparent);
 DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_transparent)
+DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_transparent);
 DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_transparent);
 DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_transparent);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 1cf29c9d4408..d028e8da027b 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -24,6 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
+#include <linux/spi/spi.h>
 #include <linux/fsl_devices.h>
 #include <linux/fs_enet_pd.h>
 #include <linux/fs_uart_pd.h>
@@ -52,13 +53,13 @@ phys_addr_t get_immrbase(void)
 
         soc = of_find_node_by_type(NULL, "soc");
         if (soc) {
-                unsigned int size;
+                int size;
                 const void *prop = of_get_property(soc, "reg", &size);
 
                 if (prop)
                         immrbase = of_translate_address(soc, prop);
                 of_node_put(soc);
-        };
+        }
 
         return immrbase;
 }
@@ -76,16 +77,23 @@ u32 get_brgfreq(void)
         if (brgfreq != -1)
                 return brgfreq;
 
-        node = of_find_node_by_type(NULL, "cpm");
+        node = of_find_compatible_node(NULL, NULL, "fsl,cpm1");
+        if (!node)
+                node = of_find_compatible_node(NULL, NULL, "fsl,cpm2");
+        if (!node)
+                node = of_find_node_by_type(NULL, "cpm");
         if (node) {
-                unsigned int size;
-                const unsigned int *prop = of_get_property(node,
-                                        "brg-frequency", &size);
+                int size;
+                const unsigned int *prop;
 
-                if (prop)
+                prop = of_get_property(node, "fsl,brg-frequency", &size);
+                if (!prop)
+                        prop = of_get_property(node, "brg-frequency", &size);
+                if (prop && size == 4)
                         brgfreq = *prop;
+
                 of_node_put(node);
-        };
+        }
 
         return brgfreq;
 }
@@ -103,14 +111,14 @@ u32 get_baudrate(void)
 
         node = of_find_node_by_type(NULL, "serial");
         if (node) {
-                unsigned int size;
+                int size;
                 const unsigned int *prop = of_get_property(node,
                                 "current-speed", &size);
 
                 if (prop)
                         fs_baudrate = *prop;
                 of_node_put(node);
-        };
+        }
 
         return fs_baudrate;
 }
@@ -321,21 +329,26 @@ static struct i2c_driver_device i2c_devices[] __initdata = {
         {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
 };
 
-static int __init of_find_i2c_driver(struct device_node *node, struct i2c_board_info *info)
+static int __init of_find_i2c_driver(struct device_node *node,
+                                     struct i2c_board_info *info)
 {
         int i;
 
         for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
                 if (!of_device_is_compatible(node, i2c_devices[i].of_device))
                         continue;
-                strncpy(info->driver_name, i2c_devices[i].i2c_driver, KOBJ_NAME_LEN);
-                strncpy(info->type, i2c_devices[i].i2c_type, I2C_NAME_SIZE);
+                if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver,
+                            KOBJ_NAME_LEN) >= KOBJ_NAME_LEN ||
+                    strlcpy(info->type, i2c_devices[i].i2c_type,
+                            I2C_NAME_SIZE) >= I2C_NAME_SIZE)
+                        return -ENOMEM;
                 return 0;
         }
         return -ENODEV;
 }
 
-static void __init of_register_i2c_devices(struct device_node *adap_node, int bus_num)
+static void __init of_register_i2c_devices(struct device_node *adap_node,
+                                           int bus_num)
 {
         struct device_node *node = NULL;
 
@@ -1187,3 +1200,89 @@ err:
 arch_initcall(cpm_smc_uart_of_init);
 
 #endif /* CONFIG_8xx */
+
+int __init fsl_spi_init(struct spi_board_info *board_infos,
+                        unsigned int num_board_infos,
+                        void (*activate_cs)(u8 cs, u8 polarity),
+                        void (*deactivate_cs)(u8 cs, u8 polarity))
+{
+        struct device_node *np;
+        unsigned int i;
+        const u32 *sysclk;
+
+        np = of_find_node_by_type(NULL, "qe");
+        if (!np)
+                return -ENODEV;
+
+        sysclk = of_get_property(np, "bus-frequency", NULL);
+        if (!sysclk)
+                return -ENODEV;
+
+        for (np = NULL, i = 1;
+             (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL;
+             i++) {
+                int ret = 0;
+                unsigned int j;
+                const void *prop;
+                struct resource res[2];
+                struct platform_device *pdev;
+                struct fsl_spi_platform_data pdata = {
+                        .activate_cs = activate_cs,
+                        .deactivate_cs = deactivate_cs,
+                };
+
+                memset(res, 0, sizeof(res));
+
+                pdata.sysclk = *sysclk;
+
+                prop = of_get_property(np, "reg", NULL);
+                if (!prop)
+                        goto err;
+                pdata.bus_num = *(u32 *)prop;
+
+                prop = of_get_property(np, "mode", NULL);
+                if (prop && !strcmp(prop, "cpu-qe"))
+                        pdata.qe_mode = 1;
+
+                for (j = 0; j < num_board_infos; j++) {
+                        if (board_infos[j].bus_num == pdata.bus_num)
+                                pdata.max_chipselect++;
+                }
+
+                if (!pdata.max_chipselect)
+                        goto err;
+
+                ret = of_address_to_resource(np, 0, &res[0]);
+                if (ret)
+                        goto err;
+
+                ret = of_irq_to_resource(np, 0, &res[1]);
+                if (ret == NO_IRQ)
+                        goto err;
+
+                pdev = platform_device_alloc("mpc83xx_spi", i);
+                if (!pdev)
+                        goto err;
+
+                ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+                if (ret)
+                        goto unreg;
+
+                ret = platform_device_add_resources(pdev, res,
+                                                    ARRAY_SIZE(res));
+                if (ret)
+                        goto unreg;
+
+                ret = platform_device_register(pdev);
+                if (ret)
+                        goto unreg;
+
+                continue;
+unreg:
+                platform_device_del(pdev);
+err:
+                continue;
+        }
+
+        return spi_register_board_info(board_infos, num_board_infos);
+}
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 04e145b5fc32..618d91d1e103 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -8,5 +8,12 @@ extern phys_addr_t get_immrbase(void);
 extern u32 get_brgfreq(void);
 extern u32 get_baudrate(void);
 
+struct spi_board_info;
+
+extern int fsl_spi_init(struct spi_board_info *board_infos,
+                        unsigned int num_board_infos,
+                        void (*activate_cs)(u8 cs, u8 polarity),
+                        void (*deactivate_cs)(u8 cs, u8 polarity));
+
 #endif
 #endif
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index ad87adc975bc..7c1b27ac7d3c 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -25,7 +25,6 @@ static unsigned char cached_8259[2] = { 0xff, 0xff };
 
 static DEFINE_SPINLOCK(i8259_lock);
 
-static struct device_node *i8259_node;
 static struct irq_host *i8259_host;
 
 /*
@@ -165,7 +164,7 @@ static struct resource pic_edgectrl_iores = {
 
 static int i8259_host_match(struct irq_host *h, struct device_node *node)
 {
-        return i8259_node == NULL || i8259_node == node;
+        return h->of_node == NULL || h->of_node == node;
 }
 
 static int i8259_host_map(struct irq_host *h, unsigned int virq,
@@ -276,9 +275,8 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)
         spin_unlock_irqrestore(&i8259_lock, flags);
 
         /* create a legacy host */
-        if (node)
-                i8259_node = of_node_get(node);
-        i8259_host = irq_alloc_host(IRQ_HOST_MAP_LEGACY, 0, &i8259_host_ops, 0);
+        i8259_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY,
+                                    0, &i8259_host_ops, 0);
         if (i8259_host == NULL) {
                 printk(KERN_ERR "i8259: failed to allocate irq host !\n");
                 return;
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index 5294560c7b00..b5d068204aa3 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -144,8 +144,8 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
 
 static struct pci_ops indirect_pci_ops =
 {
-        indirect_read_config,
-        indirect_write_config
+        .read = indirect_read_config,
+        .write = indirect_write_config,
 };
 
 void __init
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 473c415e9e25..05a56e55804c 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -511,10 +511,8 @@ static struct irq_chip ipic_irq_chip = {
 
 static int ipic_host_match(struct irq_host *h, struct device_node *node)
 {
-        struct ipic *ipic = h->host_data;
-
         /* Exact match, unless ipic node is NULL */
-        return ipic->of_node == NULL || ipic->of_node == node;
+        return h->of_node == NULL || h->of_node == node;
 }
 
 static int ipic_host_map(struct irq_host *h, unsigned int virq,
@@ -568,9 +566,8 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
                 return NULL;
 
         memset(ipic, 0, sizeof(struct ipic));
-        ipic->of_node = of_node_get(node);
 
-        ipic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR,
+        ipic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
                                        NR_IPIC_INTS,
                                        &ipic_host_ops, 0);
         if (ipic->irqhost == NULL) {
diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h
index c28e589877eb..bb309a501b2d 100644
--- a/arch/powerpc/sysdev/ipic.h
+++ b/arch/powerpc/sysdev/ipic.h
@@ -48,9 +48,6 @@ struct ipic {
 
         /* The "linux" controller struct */
         struct irq_chip         hc_irq;
-
-        /* The device node of the interrupt controller */
-        struct device_node      *of_node;
 };
 
 struct ipic_info {
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 2fc2bcd79b5e..565156ae65bc 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -19,7 +19,6 @@
 
 extern int cpm_get_irq(struct pt_regs *regs);
 
-static struct device_node *mpc8xx_pic_node;
 static struct irq_host *mpc8xx_pic_host;
 #define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
@@ -120,11 +119,6 @@ unsigned int mpc8xx_get_irq(void)
 
 }
 
-static int mpc8xx_pic_host_match(struct irq_host *h, struct device_node *node)
-{
-        return mpc8xx_pic_node == node;
-}
-
 static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
                           irq_hw_number_t hw)
 {
@@ -158,7 +152,6 @@ static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct,
 
 
 static struct irq_host_ops mpc8xx_pic_host_ops = {
-        .match = mpc8xx_pic_host_match,
         .map = mpc8xx_pic_host_map,
         .xlate = mpc8xx_pic_host_xlate,
 };
@@ -176,22 +169,24 @@ int mpc8xx_pic_init(void)
                 return -ENOMEM;
         }
 
-        mpc8xx_pic_node = of_node_get(np);
-
         ret = of_address_to_resource(np, 0, &res);
-        of_node_put(np);
         if (ret)
-                return ret;
+                goto out;
 
         siu_reg = (void *)ioremap(res.start, res.end - res.start + 1);
-        if (siu_reg == NULL)
-                return -EINVAL;
+        if (siu_reg == NULL) {
+                ret = -EINVAL;
+                goto out;
+        }
 
-        mpc8xx_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &mpc8xx_pic_host_ops, 64);
+        mpc8xx_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR,
+                                         64, &mpc8xx_pic_host_ops, 64);
         if (mpc8xx_pic_host == NULL) {
                 printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
                 ret = -ENOMEM;
         }
 
+out:
+        of_node_put(np);
         return ret;
 }
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 74c64c0d3b71..893e65439e85 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -156,8 +156,7 @@ static inline u32 _mpic_read(enum mpic_reg_type type,
         switch(type) {
 #ifdef CONFIG_PPC_DCR
         case mpic_access_dcr:
-                return dcr_read(rb->dhost,
-                                rb->dbase + reg + rb->doff);
+                return dcr_read(rb->dhost, rb->dhost.base + reg);
 #endif
         case mpic_access_mmio_be:
                 return in_be32(rb->base + (reg >> 2));
@@ -174,8 +173,7 @@ static inline void _mpic_write(enum mpic_reg_type type,
         switch(type) {
 #ifdef CONFIG_PPC_DCR
         case mpic_access_dcr:
-                return dcr_write(rb->dhost,
-                                 rb->dbase + reg + rb->doff, value);
+                return dcr_write(rb->dhost, rb->dhost.base + reg, value);
 #endif
         case mpic_access_mmio_be:
                 return out_be32(rb->base + (reg >> 2), value);
@@ -228,8 +226,13 @@ static inline u32 _mpic_irq_read(struct mpic *mpic, unsigned int src_no, unsigne
         unsigned int    isu = src_no >> mpic->isu_shift;
         unsigned int    idx = src_no & mpic->isu_mask;
 
-        return _mpic_read(mpic->reg_type, &mpic->isus[isu],
-                          reg + (idx * MPIC_INFO(IRQ_STRIDE)));
+#ifdef CONFIG_MPIC_BROKEN_REGREAD
+        if (reg == 0)
+                return mpic->isu_reg0_shadow[idx];
+        else
+#endif
+                return _mpic_read(mpic->reg_type, &mpic->isus[isu],
+                                  reg + (idx * MPIC_INFO(IRQ_STRIDE)));
 }
 
 static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
@@ -240,6 +243,11 @@ static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
 
         _mpic_write(mpic->reg_type, &mpic->isus[isu],
                     reg + (idx * MPIC_INFO(IRQ_STRIDE)), value);
+
+#ifdef CONFIG_MPIC_BROKEN_REGREAD
+        if (reg == 0)
+                mpic->isu_reg0_shadow[idx] = value;
+#endif
 }
 
 #define mpic_read(b,r)          _mpic_read(mpic->reg_type,&(b),(r))
@@ -269,9 +277,11 @@ static void _mpic_map_mmio(struct mpic *mpic, unsigned long phys_addr,
 static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
                           unsigned int offset, unsigned int size)
 {
-        rb->dbase = mpic->dcr_base;
-        rb->doff = offset;
-        rb->dhost = dcr_map(mpic->of_node, rb->dbase + rb->doff, size);
+        const u32 *dbasep;
+
+        dbasep = of_get_property(mpic->irqhost->of_node, "dcr-reg", NULL);
+
+        rb->dhost = dcr_map(mpic->irqhost->of_node, *dbasep + offset, size);
         BUG_ON(!DCR_MAP_OK(rb->dhost));
 }
 
@@ -758,7 +768,7 @@ static void mpic_end_ipi(unsigned int irq)
 
 #endif /* CONFIG_SMP */
 
-static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
+void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
 {
         struct mpic *mpic = mpic_from_irq(irq);
         unsigned int src = mpic_irq_to_hw(irq);
@@ -861,10 +871,8 @@ static struct irq_chip mpic_irq_ht_chip = {
 
 static int mpic_host_match(struct irq_host *h, struct device_node *node)
 {
-        struct mpic *mpic = h->host_data;
-
         /* Exact match, unless mpic node is NULL */
-        return mpic->of_node == NULL || mpic->of_node == node;
+        return h->of_node == NULL || h->of_node == node;
 }
 
 static int mpic_host_map(struct irq_host *h, unsigned int virq,
@@ -985,10 +993,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         
         memset(mpic, 0, sizeof(struct mpic));
         mpic->name = name;
-        mpic->of_node = of_node_get(node);
 
-        mpic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, isu_size,
-                                       &mpic_host_ops,
+        mpic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+                                       isu_size, &mpic_host_ops,
                                        flags & MPIC_LARGE_VECTORS ? 2048 : 256);
         if (mpic->irqhost == NULL) {
                 of_node_put(node);
@@ -1068,20 +1075,14 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         BUG_ON(paddr == 0 && node == NULL);
 
         /* If no physical address passed in, check if it's dcr based */
-        if (paddr == 0 && of_get_property(node, "dcr-reg", NULL) != NULL)
-                mpic->flags |= MPIC_USES_DCR;
-
+        if (paddr == 0 && of_get_property(node, "dcr-reg", NULL) != NULL) {
 #ifdef CONFIG_PPC_DCR
-        if (mpic->flags & MPIC_USES_DCR) {
-                const u32 *dbasep;
-                dbasep = of_get_property(node, "dcr-reg", NULL);
-                BUG_ON(dbasep == NULL);
-                mpic->dcr_base = *dbasep;
+                mpic->flags |= MPIC_USES_DCR;
                 mpic->reg_type = mpic_access_dcr;
-        }
 #else
-        BUG_ON (mpic->flags & MPIC_USES_DCR);
+                BUG();
 #endif /* CONFIG_PPC_DCR */
+        }
 
         /* If the MPIC is not DCR based, and no physical address was passed
          * in, try to obtain one
diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
index 3a1c3d2c594d..1cb6bd841027 100644
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -34,5 +34,6 @@ extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
 extern void mpic_end_irq(unsigned int irq);
 extern void mpic_mask_irq(unsigned int irq);
 extern void mpic_unmask_irq(unsigned int irq);
+extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask);
 
 #endif /* _POWERPC_SYSDEV_MPIC_H */
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index b076793033c2..d272a52ecd24 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -9,7 +9,6 @@
  */
 
 #include <linux/irq.h>
-#include <linux/bootmem.h>
 #include <linux/bitmap.h>
 #include <linux/msi.h>
 #include <asm/mpic.h>
@@ -117,16 +116,17 @@ static int mpic_msi_reserve_dt_hwirqs(struct mpic *mpic)
         int i, len;
         const u32 *p;
 
-        p = of_get_property(mpic->of_node, "msi-available-ranges", &len);
+        p = of_get_property(mpic->irqhost->of_node,
+                            "msi-available-ranges", &len);
         if (!p) {
                 pr_debug("mpic: no msi-available-ranges property found on %s\n",
-                          mpic->of_node->full_name);
+                          mpic->irqhost->of_node->full_name);
                 return -ENODEV;
         }
 
         if (len % 8 != 0) {
                 printk(KERN_WARNING "mpic: Malformed msi-available-ranges "
-                       "property on %s\n", mpic->of_node->full_name);
+                       "property on %s\n", mpic->irqhost->of_node->full_name);
                 return -EINVAL;
         }
 
@@ -151,10 +151,7 @@ int mpic_msi_init_allocator(struct mpic *mpic)
         size = BITS_TO_LONGS(mpic->irq_count) * sizeof(long);
         pr_debug("mpic: allocator bitmap size is 0x%x bytes\n", size);
 
-        if (mem_init_done)
-                mpic->hwirq_bitmap = kmalloc(size, GFP_KERNEL);
-        else
-                mpic->hwirq_bitmap = alloc_bootmem(size);
+        mpic->hwirq_bitmap = alloc_maybe_bootmem(size, GFP_KERNEL);
 
         if (!mpic->hwirq_bitmap) {
                 pr_debug("mpic: ENOMEM allocating allocator bitmap!\n");
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 305b864c25d9..1d5a40899b74 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -40,6 +40,7 @@ static struct irq_chip mpic_u3msi_chip = {
         .unmask         = mpic_u3msi_unmask_irq,
         .eoi            = mpic_end_irq,
         .set_type       = mpic_set_irq_type,
+        .set_affinity   = mpic_set_affinity,
         .typename       = "MPIC-U3MSI",
 };
 
@@ -107,59 +108,46 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
         return;
 }
 
-static void u3msi_compose_msi_msg(struct pci_dev *pdev, int virq,
-                                  struct msi_msg *msg)
-{
-        u64 addr;
-
-        addr = find_ht_magic_addr(pdev);
-        msg->address_lo = addr & 0xFFFFFFFF;
-        msg->address_hi = addr >> 32;
-        msg->data = virq_to_hw(virq);
-
-        pr_debug("u3msi: allocated virq 0x%x (hw 0x%lx) at address 0x%lx\n",
-                 virq, virq_to_hw(virq), addr);
-}
-
 static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 {
         irq_hw_number_t hwirq;
-        int rc;
         unsigned int virq;
         struct msi_desc *entry;
         struct msi_msg msg;
+        u64 addr;
+
+        addr = find_ht_magic_addr(pdev);
+        msg.address_lo = addr & 0xFFFFFFFF;
+        msg.address_hi = addr >> 32;
 
         list_for_each_entry(entry, &pdev->msi_list, list) {
                 hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1);
                 if (hwirq < 0) {
-                        rc = hwirq;
                         pr_debug("u3msi: failed allocating hwirq\n");
-                        goto out_free;
+                        return hwirq;
                 }
 
                 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
                 if (virq == NO_IRQ) {
                         pr_debug("u3msi: failed mapping hwirq 0x%lx\n", hwirq);
                         mpic_msi_free_hwirqs(msi_mpic, hwirq, 1);
-                        rc = -ENOSPC;
-                        goto out_free;
+                        return -ENOSPC;
                 }
 
                 set_irq_msi(virq, entry);
                 set_irq_chip(virq, &mpic_u3msi_chip);
                 set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
 
-                u3msi_compose_msi_msg(pdev, virq, &msg);
+                pr_debug("u3msi: allocated virq 0x%x (hw 0x%lx) addr 0x%lx\n",
+                          virq, hwirq, addr);
+
+                msg.data = hwirq;
                 write_msi_msg(virq, &msg);
 
                 hwirq++;
         }
 
         return 0;
-
- out_free:
-        u3msi_teardown_msi_irqs(pdev);
-        return rc;
 }
 
 int mpic_u3msi_init(struct mpic *mpic)
diff --git a/arch/powerpc/sysdev/mv64x60.h b/arch/powerpc/sysdev/mv64x60.h
index 2ff0b4ef2681..4f618fa465c0 100644
--- a/arch/powerpc/sysdev/mv64x60.h
+++ b/arch/powerpc/sysdev/mv64x60.h
@@ -7,5 +7,6 @@ extern void __init mv64x60_init_irq(void);
 extern unsigned int mv64x60_get_irq(void);
 
 extern void __init mv64x60_pci_init(void);
+extern void __init mv64x60_init_early(void);
 
 #endif /* __MV64X60_H__ */
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index 01d316287772..19e6ef263797 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -202,11 +202,6 @@ static struct irq_chip mv64x60_chip_gpp = {
  * mv64x60_host_ops functions
  */
 
-static int mv64x60_host_match(struct irq_host *h, struct device_node *np)
-{
-        return mv64x60_irq_host->host_data == np;
-}
-
 static struct irq_chip *mv64x60_chips[] = {
         [MV64x60_LEVEL1_LOW]  = &mv64x60_chip_low,
         [MV64x60_LEVEL1_HIGH] = &mv64x60_chip_high,
@@ -228,7 +223,6 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
 }
 
 static struct irq_host_ops mv64x60_host_ops = {
-        .match = mv64x60_host_match,
         .map   = mv64x60_host_map,
 };
 
@@ -253,14 +247,12 @@ void __init mv64x60_init_irq(void)
         np = of_find_compatible_node(NULL, NULL, "marvell,mv64x60-pic");
         reg = of_get_property(np, "reg", &size);
         paddr = of_translate_address(np, reg);
-        of_node_put(np);
         mv64x60_irq_reg_base = ioremap(paddr, reg[1]);
 
-        mv64x60_irq_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, MV64x60_NUM_IRQS,
+        mv64x60_irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
+                                          MV64x60_NUM_IRQS,
                                           &mv64x60_host_ops, MV64x60_NUM_IRQS);
 
-        mv64x60_irq_host->host_data = np;
-
         spin_lock_irqsave(&mv64x60_lock, flags);
         out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
                  mv64x60_cached_gpp_mask);
diff --git a/arch/powerpc/sysdev/mv64x60_udbg.c b/arch/powerpc/sysdev/mv64x60_udbg.c
new file mode 100644
index 000000000000..367e7b13ec00
--- /dev/null
+++ b/arch/powerpc/sysdev/mv64x60_udbg.c
@@ -0,0 +1,152 @@
+/*
+ * udbg serial input/output routines for the Marvell MV64x60 (Discovery).
+ *
+ * Author: Dale Farnsworth <dale@farnsworth.org>
+ *
+ * 2007 (c) MontaVista Software, Inc.  This file is licensed under
+ * the terms of the GNU General Public License version 2.  This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+
+#include <sysdev/mv64x60.h>
+
+#define MPSC_0_CR1_OFFSET       0x000c
+
+#define MPSC_0_CR2_OFFSET       0x0010
+#define MPSC_CHR_2_TCS          (1 << 9)
+
+#define MPSC_0_CHR_10_OFFSET    0x0030
+
+#define MPSC_INTR_CAUSE_OFF_0   0x0004
+#define MPSC_INTR_CAUSE_OFF_1   0x000c
+#define MPSC_INTR_CAUSE_RCC     (1<<6)
+
+static void __iomem *mpsc_base;
+static void __iomem *mpsc_intr_cause;
+
+static void mv64x60_udbg_putc(char c)
+{
+        if (c == '\n')
+                mv64x60_udbg_putc('\r');
+
+        while(in_le32(mpsc_base + MPSC_0_CR2_OFFSET) & MPSC_CHR_2_TCS)
+                ;
+        out_le32(mpsc_base + MPSC_0_CR1_OFFSET, c);
+        out_le32(mpsc_base + MPSC_0_CR2_OFFSET, MPSC_CHR_2_TCS);
+}
+
+static int mv64x60_udbg_testc(void)
+{
+        return (in_le32(mpsc_intr_cause) & MPSC_INTR_CAUSE_RCC) != 0;
+}
+
+static int mv64x60_udbg_getc(void)
+{
+        int cause = 0;
+        int c;
+
+        while (!mv64x60_udbg_testc())
+                ;
+
+        c = in_8(mpsc_base + MPSC_0_CHR_10_OFFSET + 2);
+        out_8(mpsc_base + MPSC_0_CHR_10_OFFSET + 2, c);
+        out_le32(mpsc_intr_cause, cause & ~MPSC_INTR_CAUSE_RCC);
+        return c;
+}
+
+static int mv64x60_udbg_getc_poll(void)
+{
+        if (!mv64x60_udbg_testc())
+                return -1;
+
+        return mv64x60_udbg_getc();
+}
+
+static void mv64x60_udbg_init(void)
+{
+        struct device_node *np, *mpscintr, *stdout = NULL;
+        const char *path;
+        const phandle *ph;
+        struct resource r[2];
+        const int *block_index;
+        int intr_cause_offset;
+        int err;
+
+        path = of_get_property(of_chosen, "linux,stdout-path", NULL);
+        if (!path)
+                return;
+
+        stdout = of_find_node_by_path(path);
+        if (!stdout)
+                return;
+
+        for (np = NULL;
+             (np = of_find_compatible_node(np, "serial", "marvell,mpsc")); )
+                if (np == stdout)
+                        break;
+
+        of_node_put(stdout);
+        if (!np)
+                return;
+
+        block_index = of_get_property(np, "block-index", NULL);
+        if (!block_index)
+                goto error;
+
+        switch (*block_index) {
+        case 0:
+                intr_cause_offset = MPSC_INTR_CAUSE_OFF_0;
+                break;
+        case 1:
+                intr_cause_offset = MPSC_INTR_CAUSE_OFF_1;
+                break;
+        default:
+                goto error;
+        }
+
+        err = of_address_to_resource(np, 0, &r[0]);
+        if (err)
+                goto error;
+
+        ph = of_get_property(np, "mpscintr", NULL);
+        mpscintr = of_find_node_by_phandle(*ph);
+        if (!mpscintr)
+                goto error;
+
+        err = of_address_to_resource(mpscintr, 0, &r[1]);
+        of_node_put(mpscintr);
+        if (err)
+                goto error;
+
+        of_node_put(np);
+
+        mpsc_base = ioremap(r[0].start, r[0].end - r[0].start + 1);
+        if (!mpsc_base)
+                return;
+
+        mpsc_intr_cause = ioremap(r[1].start, r[1].end - r[1].start + 1);
+        if (!mpsc_intr_cause) {
+                iounmap(mpsc_base);
+                return;
+        }
+        mpsc_intr_cause += intr_cause_offset;
+
+        udbg_putc = mv64x60_udbg_putc;
+        udbg_getc = mv64x60_udbg_getc;
+        udbg_getc_poll = mv64x60_udbg_getc_poll;
+
+        return;
+
+error:
+        of_node_put(np);
+}
+
+void mv64x60_init_early(void)
+{
+        mv64x60_udbg_init();
+}
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 4d1dcb45963d..55e6f394af82 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -245,10 +245,8 @@ static struct irq_chip qe_ic_irq_chip = {
 
 static int qe_ic_host_match(struct irq_host *h, struct device_node *node)
 {
-        struct qe_ic *qe_ic = h->host_data;
-
         /* Exact match, unless qe_ic node is NULL */
-        return qe_ic->of_node == NULL || qe_ic->of_node == node;
+        return h->of_node == NULL || h->of_node == node;
 }
 
 static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
@@ -352,9 +350,8 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags)
                 return;
 
         memset(qe_ic, 0, sizeof(struct qe_ic));
-        qe_ic->of_node = of_node_get(node);
 
-        qe_ic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR,
+        qe_ic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
                                         NR_QE_IC_INTS, &qe_ic_host_ops, 0);
         if (qe_ic->irqhost == NULL) {
                 of_node_put(node);
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.h b/arch/powerpc/sysdev/qe_lib/qe_ic.h
index 9a631adb189d..c1361d005a8a 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.h
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.h
@@ -84,9 +84,6 @@ struct qe_ic {
         /* The "linux" controller struct */
         struct irq_chip hc_irq;
 
-        /* The device node of the interrupt controller */
-        struct device_node *of_node;
-
         /* VIRQ numbers of QE high/low irqs */
         unsigned int virq_high;
         unsigned int virq_low;
diff --git a/arch/powerpc/sysdev/timer.c b/arch/powerpc/sysdev/timer.c
deleted file mode 100644
index e81e7ec2e799..000000000000
--- a/arch/powerpc/sysdev/timer.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Common code to keep time when machine suspends.
- *
- * Copyright 2007       Johannes Berg <johannes@sipsolutions.net>
- *
- * GPLv2
- */
-
-#include <linux/time.h>
-#include <linux/sysdev.h>
-#include <asm/rtc.h>
-
-static unsigned long suspend_rtc_time;
-
-/*
- * Reset the time after a sleep.
- */
-static int timer_resume(struct sys_device *dev)
-{
-        struct timeval tv;
-        struct timespec ts;
-        struct rtc_time cur_rtc_tm;
-        unsigned long cur_rtc_time, diff;
-
-        /* get current RTC time and convert to seconds */
-        get_rtc_time(&cur_rtc_tm);
-        cur_rtc_time = mktime(cur_rtc_tm.tm_year + 1900,
-                              cur_rtc_tm.tm_mon + 1,
-                              cur_rtc_tm.tm_mday,
-                              cur_rtc_tm.tm_hour,
-                              cur_rtc_tm.tm_min,
-                              cur_rtc_tm.tm_sec);
-
-        diff = cur_rtc_time - suspend_rtc_time;
-
-        /* adjust time of day by seconds that elapsed while
-         * we were suspended */
-        do_gettimeofday(&tv);
-        ts.tv_sec = tv.tv_sec + diff;
-        ts.tv_nsec = tv.tv_usec * NSEC_PER_USEC;
-        do_settimeofday(&ts);
-
-        return 0;
-}
-
-static int timer_suspend(struct sys_device *dev, pm_message_t state)
-{
-        struct rtc_time suspend_rtc_tm;
-        WARN_ON(!ppc_md.get_rtc_time);
-
-        get_rtc_time(&suspend_rtc_tm);
-        suspend_rtc_time = mktime(suspend_rtc_tm.tm_year + 1900,
-                                  suspend_rtc_tm.tm_mon + 1,
-                                  suspend_rtc_tm.tm_mday,
-                                  suspend_rtc_tm.tm_hour,
-                                  suspend_rtc_tm.tm_min,
-                                  suspend_rtc_tm.tm_sec);
-
-        return 0;
-}
-
-static struct sysdev_class timer_sysclass = {
-        .resume = timer_resume,
-        .suspend = timer_suspend,
-        set_kset_name("timer"),
-};
-
-static struct sys_device device_timer = {
-        .id = 0,
-        .cls = &timer_sysclass,
-};
-
-static int time_init_device(void)
-{
-        int error = sysdev_class_register(&timer_sysclass);
-        if (!error)
-                error = sysdev_register(&device_timer);
-        return error;
-}
-
-device_initcall(time_init_device);
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 90db8a720fed..31d3d33d91fc 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -52,7 +52,6 @@
 u32 tsi108_pci_cfg_base;
 static u32 tsi108_pci_cfg_phys;
 u32 tsi108_csr_vir_base;
-static struct device_node *pci_irq_node;
 static struct irq_host *pci_irq_host;
 
 extern u32 get_vir_csrbase(void);
@@ -193,8 +192,8 @@ void tsi108_clear_pci_cfg_error(void)
 }
 
 static struct pci_ops tsi108_direct_pci_ops = {
-        tsi108_direct_read_config,
-        tsi108_direct_write_config
+        .read = tsi108_direct_read_config,
+        .write = tsi108_direct_write_config,
 };
 
 int __init tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary)
@@ -405,13 +404,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
         return 0;
 }
 
-static int pci_irq_host_match(struct irq_host *h, struct device_node *node)
-{
-        return pci_irq_node == node;
-}
-
 static struct irq_host_ops pci_irq_host_ops = {
-        .match = pci_irq_host_match,
         .map = pci_irq_host_map,
         .xlate = pci_irq_host_xlate,
 };
@@ -433,10 +426,11 @@ void __init tsi108_pci_int_init(struct device_node *node)
 {
         DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
 
-        pci_irq_node = of_node_get(node);
-        pci_irq_host = irq_alloc_host(IRQ_HOST_MAP_LEGACY, 0, &pci_irq_host_ops, 0);
+        pci_irq_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY,
+                                      0, &pci_irq_host_ops, 0);
         if (pci_irq_host == NULL) {
                 printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n");
+                of_node_put(node);
                 return;
         }
 
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 89059895a20d..5149716c734d 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -24,6 +24,7 @@
 #include <linux/spinlock.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
 #include <asm/irq.h>
 #include <asm/io.h>
 #include <asm/prom.h>
@@ -55,9 +56,6 @@ struct uic {
 
         /* For secondary UICs, the cascade interrupt's irqaction */
         struct irqaction cascade;
-
-        /* The device node of the interrupt controller */
-        struct device_node *of_node;
 };
 
 static void uic_unmask_irq(unsigned int virq)
@@ -142,7 +140,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
 
         desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
         desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (trigger)
+        if (!trigger)
                 desc->status |= IRQ_LEVEL;
 
         spin_unlock_irqrestore(&uic->lock, flags);
@@ -159,10 +157,62 @@ static struct irq_chip uic_irq_chip = {
         .set_type       = uic_set_irq_type,
 };
 
-static int uic_host_match(struct irq_host *h, struct device_node *node)
+/**
+ *      handle_uic_irq - irq flow handler for UIC
+ *      @irq:   the interrupt number
+ *      @desc:  the interrupt description structure for this irq
+ *
+ * This is modified version of the generic handle_level_irq() suitable
+ * for the UIC.  On the UIC, acking (i.e. clearing the SR bit) a level
+ * irq will have no effect if the interrupt is still asserted by the
+ * device, even if the interrupt is already masked.  Therefore, unlike
+ * the standard handle_level_irq(), we must ack the interrupt *after*
+ * invoking the ISR (which should have de-asserted the interrupt in
+ * the external source).  For edge interrupts we ack at the beginning
+ * instead of the end, to keep the window in which we can miss an
+ * interrupt as small as possible.
+ */
+void fastcall handle_uic_irq(unsigned int irq, struct irq_desc *desc)
 {
-        struct uic *uic = h->host_data;
-        return uic->of_node == node;
+        unsigned int cpu = smp_processor_id();
+        struct irqaction *action;
+        irqreturn_t action_ret;
+
+        spin_lock(&desc->lock);
+        if (desc->status & IRQ_LEVEL)
+                desc->chip->mask(irq);
+        else
+                desc->chip->mask_ack(irq);
+
+        if (unlikely(desc->status & IRQ_INPROGRESS))
+                goto out_unlock;
+        desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
+        kstat_cpu(cpu).irqs[irq]++;
+
+        /*
+         * If its disabled or no action available
+         * keep it masked and get out of here
+         */
+        action = desc->action;
+        if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
+                desc->status |= IRQ_PENDING;
+                goto out_unlock;
+        }
+
+        desc->status |= IRQ_INPROGRESS;
+        desc->status &= ~IRQ_PENDING;
+        spin_unlock(&desc->lock);
+
+        action_ret = handle_IRQ_event(irq, action);
+
+        spin_lock(&desc->lock);
+        desc->status &= ~IRQ_INPROGRESS;
+        if (desc->status & IRQ_LEVEL)
+                desc->chip->ack(irq);
+        if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+                desc->chip->unmask(irq);
+out_unlock:
+        spin_unlock(&desc->lock);
 }
 
 static int uic_host_map(struct irq_host *h, unsigned int virq,
@@ -173,7 +223,7 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
         set_irq_chip_data(virq, uic);
         /* Despite the name, handle_level_irq() works for both level
          * and edge irqs on UIC.  FIXME: check this is correct */
-        set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
+        set_irq_chip_and_handler(virq, &uic_irq_chip, handle_uic_irq);
 
         /* Set default irq type */
         set_irq_type(virq, IRQ_TYPE_NONE);
@@ -194,7 +244,6 @@ static int uic_host_xlate(struct irq_host *h, struct device_node *ct,
 }
 
 static struct irq_host_ops uic_host_ops = {
-        .match  = uic_host_match,
         .map    = uic_host_map,
         .xlate  = uic_host_xlate,
 };
@@ -207,6 +256,9 @@ irqreturn_t uic_cascade(int virq, void *data)
         int subvirq;
 
         msr = mfdcr(uic->dcrbase + UIC_MSR);
+        if (!msr) /* spurious interrupt */
+                return IRQ_HANDLED;
+
         src = 32 - ffs(msr);
 
         subvirq = irq_linear_revmap(uic->irqhost, src);
@@ -229,7 +281,6 @@ static struct uic * __init uic_init_one(struct device_node *node)
 
         memset(uic, 0, sizeof(*uic));
         spin_lock_init(&uic->lock);
-        uic->of_node = of_node_get(node);
         indexp = of_get_property(node, "cell-index", &len);
         if (!indexp || (len != sizeof(u32))) {
                 printk(KERN_ERR "uic: Device node %s has missing or invalid "
@@ -246,8 +297,8 @@ static struct uic * __init uic_init_one(struct device_node *node)
         }
         uic->dcrbase = *dcrreg;
 
-        uic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, NR_UIC_INTS,
-                                      &uic_host_ops, -1);
+        uic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+                                      NR_UIC_INTS, &uic_host_ops, -1);
         if (! uic->irqhost) {
                 of_node_put(node);
                 return NULL; /* FIXME: panic? */
diff --git a/arch/ppc/.gitignore b/arch/ppc/.gitignore
index a1a869c8c840..1e79a0ae4473 100644
--- a/arch/ppc/.gitignore
+++ b/arch/ppc/.gitignore
@@ -1 +1 @@
-include
+/include
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 6bdeeb70b157..20dce4681259 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -4,6 +4,10 @@
 
 mainmenu "Linux/PowerPC Kernel Configuration"
 
+config WORD_SIZE
+        int
+        default 32
+
 config MMU
         bool
         default y
@@ -573,24 +577,9 @@ choice
 
           Select PReP if configuring for a PReP machine.
 
-          Select Gemini if configuring for a Synergy Microsystems' Gemini
-          series Single Board Computer.  More information is available at:
-          <http://www.synergymicro.com/PressRel/97_10_15.html>.
-
-          Select APUS if configuring for a PowerUP Amiga.  More information is
-          available at: <http://linux-apus.sourceforge.net/>.
-
 config PPC_PREP
         bool "PReP"
 
-config APUS
-        bool "Amiga-APUS"
-        depends on BROKEN
-        help
-          Select APUS if configuring for a PowerUP Amiga.
-          More information is available at:
-          <http://linux-apus.sourceforge.net/>.
-
 config KATANA
         bool "Artesyn-Katana"
         help
@@ -1027,133 +1016,7 @@ config CMDLINE
           some command-line options at build time by entering them here.  In
           most cases you will need to specify the root device here.
 
-config AMIGA
-        bool
-        depends on APUS
-        default y
-        help
-          This option enables support for the Amiga series of computers.
-
-config ZORRO
-        bool
-        depends on APUS
-        default y
-        help
-          This enables support for the Zorro bus in the Amiga. If you have
-          expansion cards in your Amiga that conform to the Amiga
-          AutoConfig(tm) specification, say Y, otherwise N. Note that even
-          expansion cards that do not fit in the Zorro slots but fit in e.g.
-          the CPU slot may fall in this category, so you have to say Y to let
-          Linux use these.
-
-config ABSTRACT_CONSOLE
-        bool
-        depends on APUS
-        default y
-
-config APUS_FAST_EXCEPT
-        bool
-        depends on APUS
-        default y
-
-config AMIGA_PCMCIA
-        bool "Amiga 1200/600 PCMCIA support"
-        depends on APUS && EXPERIMENTAL
-        help
-          Include support in the kernel for pcmcia on Amiga 1200 and Amiga
-          600. If you intend to use pcmcia cards say Y; otherwise say N.
-
-config AMIGA_BUILTIN_SERIAL
-        tristate "Amiga builtin serial support"
-        depends on APUS
-        help
-          If you want to use your Amiga's built-in serial port in Linux,
-          answer Y.
-
-          To compile this driver as a module, choose M here.
-
-config GVPIOEXT
-        tristate "GVP IO-Extender support"
-        depends on APUS
-        help
-          If you want to use a GVP IO-Extender serial card in Linux, say Y.
-          Otherwise, say N.
-
-config GVPIOEXT_LP
-        tristate "GVP IO-Extender parallel printer support"
-        depends on GVPIOEXT
-        help
-          Say Y to enable driving a printer from the parallel port on your
-          GVP IO-Extender card, N otherwise.
-
-config GVPIOEXT_PLIP
-        tristate "GVP IO-Extender PLIP support"
-        depends on GVPIOEXT
-        help
-          Say Y to enable doing IP over the parallel port on your GVP
-          IO-Extender card, N otherwise.
-
-config MULTIFACE_III_TTY
-        tristate "Multiface Card III serial support"
-        depends on APUS
-        help
-          If you want to use a Multiface III card's serial port in Linux,
-          answer Y.
-
-          To compile this driver as a module, choose M here.
-
-config A2232
-        tristate "Commodore A2232 serial support (EXPERIMENTAL)"
-        depends on EXPERIMENTAL && APUS
-        ---help---
-          This option supports the 2232 7-port serial card shipped with the
-          Amiga 2000 and other Zorro-bus machines, dating from 1989.  At
-          a max of 19,200 bps, the ports are served by a 6551 ACIA UART chip
-          each, plus a 8520 CIA, and a master 6502 CPU and buffer as well. The
-          ports were connected with 8 pin DIN connectors on the card bracket,
-          for which 8 pin to DB25 adapters were supplied. The card also had
-          jumpers internally to toggle various pinning configurations.
-
-          This driver can be built as a module; but then "generic_serial"
-          will also be built as a module. This has to be loaded before
-          "ser_a2232". If you want to do this, answer M here.
-
-config WHIPPET_SERIAL
-        tristate "Hisoft Whippet PCMCIA serial support"
-        depends on AMIGA_PCMCIA
-        help
-          HiSoft has a web page at <http://www.hisoft.co.uk/>, but there
-          is no listing for the Whippet in their Amiga section.
-
-config APNE
-        tristate "PCMCIA NE2000 support"
-        depends on AMIGA_PCMCIA
-        help
-          If you have a PCMCIA NE2000 compatible adapter, say Y.  Otherwise,
-          say N.
-
-          To compile this driver as a module, choose M here: the
-          module will be called apne.
-
-config SERIAL_CONSOLE
-        bool "Support for serial port console"
-        depends on APUS && (AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y)
-
-config HEARTBEAT
-        bool "Use power LED as a heartbeat"
-        depends on APUS
-        help
-          Use the power-on LED on your machine as a load meter.  The exact
-          behavior is platform-dependent, but normally the flash frequency is
-          a hyperbolic function of the 5-minute load average.
-
-config PROC_HARDWARE
-        bool "/proc/hardware support"
-        depends on APUS
-
-source "drivers/zorro/Kconfig"
-
-if !44x || BROKEN
+if BROKEN
 source kernel/power/Kconfig
 endif
 
@@ -1227,8 +1090,7 @@ config MCA
 
 config PCI
         bool "PCI support" if 40x || CPM2 || 83xx || 85xx || PPC_MPC52xx
-        default y if !40x && !CPM2 && !8xx && !APUS && !83xx && !85xx
-        default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
+        default y if !40x && !CPM2 && !8xx && !83xx && !85xx
         default PCI_QSPAN if !4xx && !CPM2 && 8xx
         help
           Find out whether your system includes a PCI bus. PCI is the name of
@@ -1284,10 +1146,6 @@ config 8260_PCI9_IDMA4
 
 endchoice
 
-config PCI_PERMEDIA
-        bool "PCI for Permedia2"
-        depends on !4xx && !8xx && APUS
-
 source "drivers/pci/Kconfig"
 
 source "drivers/pcmcia/Kconfig"
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 0db66dcf0723..eee6264e8a04 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -69,7 +69,6 @@ core-$(CONFIG_83xx)		+= arch/ppc/platforms/83xx/
 core-$(CONFIG_85xx)             += arch/ppc/platforms/85xx/
 core-$(CONFIG_MATH_EMULATION)   += arch/powerpc/math-emu/
 core-$(CONFIG_XMON)             += arch/ppc/xmon/
-core-$(CONFIG_APUS)             += arch/ppc/amiga/
 drivers-$(CONFIG_8xx)           += arch/ppc/8xx_io/
 drivers-$(CONFIG_4xx)           += arch/ppc/4xx_io/
 drivers-$(CONFIG_CPM2)          += arch/ppc/8260_io/
diff --git a/arch/ppc/amiga/Makefile b/arch/ppc/amiga/Makefile
deleted file mode 100644
index 59fec0a3ac8e..000000000000
--- a/arch/ppc/amiga/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for Linux arch/m68k/amiga source directory
-#
-
-obj-y           := config.o amiints.o cia.o time.o bootinfo.o amisound.o \
-                        chipram.o amiga_ksyms.o
-
-obj-$(CONFIG_AMIGA_PCMCIA) += pcmcia.o
diff --git a/arch/ppc/amiga/amiga_ksyms.c b/arch/ppc/amiga/amiga_ksyms.c
deleted file mode 100644
index ec74e5b7a1ce..000000000000
--- a/arch/ppc/amiga/amiga_ksyms.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../m68k/amiga/amiga_ksyms.c"
diff --git a/arch/ppc/amiga/amiints.c b/arch/ppc/amiga/amiints.c
deleted file mode 100644
index 265fcd3c6ab2..000000000000
--- a/arch/ppc/amiga/amiints.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * Amiga Linux interrupt handling code
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- *
- * 11/07/96: rewritten interrupt handling, irq lists are exists now only for
- *           this sources where it makes sense (VERTB/PORTS/EXTER) and you must
- *           be careful that dev_id for this sources is unique since this the
- *           only possibility to distinguish between different handlers for
- *           free_irq. irq lists also have different irq flags:
- *           - IRQ_FLG_FAST: handler is inserted at top of list (after other
- *                           fast handlers)
- *           - IRQ_FLG_SLOW: handler is inserted at bottom of list and before
- *                           they're executed irq level is set to the previous
- *                           one, but handlers don't need to be reentrant, if
- *                           reentrance occurred, slow handlers will be just
- *                           called again.
- *           The whole interrupt handling for CIAs is moved to cia.c
- *           /Roman Zippel
- *
- * 07/08/99: rewamp of the interrupt handling - we now have two types of
- *           interrupts, normal and fast handlers, fast handlers being
- *           marked with SA_INTERRUPT and runs with all other interrupts
- *           disabled. Normal interrupts disable their own source but
- *           run with all other interrupt sources enabled.
- *           PORTS and EXTER interrupts are always shared even if the
- *           drivers do not explicitly mark this when calling
- *           request_irq which they really should do.
- *           This is similar to the way interrupts are handled on all
- *           other architectures and makes a ton of sense besides
- *           having the advantage of making it easier to share
- *           drivers.
- *           /Jes
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/kernel_stat.h>
-#include <linux/init.h>
-
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/traps.h>
-#include <asm/amigahw.h>
-#include <asm/amigaints.h>
-#include <asm/amipcmcia.h>
-
-#ifdef CONFIG_APUS
-#include <asm/amigappc.h>
-#endif
-
-extern void cia_init_IRQ(struct ciabase *base);
-
-unsigned short ami_intena_vals[AMI_STD_IRQS] = {
-        IF_VERTB, IF_COPER, IF_AUD0, IF_AUD1, IF_AUD2, IF_AUD3, IF_BLIT,
-        IF_DSKSYN, IF_DSKBLK, IF_RBF, IF_TBE, IF_SOFT, IF_PORTS, IF_EXTER
-};
-static const unsigned char ami_servers[AMI_STD_IRQS] = {
-        1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1
-};
-
-static short ami_ablecount[AMI_IRQS];
-
-static void ami_badint(int irq, void *dev_id, struct pt_regs *fp)
-{
-/*      num_spurious += 1;*/
-}
-
-/*
- * void amiga_init_IRQ(void)
- *
- * Parameters:  None
- *
- * Returns:     Nothing
- *
- * This function should be called during kernel startup to initialize
- * the amiga IRQ handling routines.
- */
-
-__init
-void amiga_init_IRQ(void)
-{
-        int i;
-
-        for (i = 0; i < AMI_IRQS; i++)
-                ami_ablecount[i] = 0;
-
-        /* turn off PCMCIA interrupts */
-        if (AMIGAHW_PRESENT(PCMCIA))
-                gayle.inten = GAYLE_IRQ_IDE;
-
-        /* turn off all interrupts... */
-        amiga_custom.intena = 0x7fff;
-        amiga_custom.intreq = 0x7fff;
-
-#ifdef CONFIG_APUS
-        /* Clear any inter-CPU interrupt requests. Circumvents bug in
-           Blizzard IPL emulation HW (or so it appears). */
-        APUS_WRITE(APUS_INT_LVL, INTLVL_SETRESET | INTLVL_MASK);
-
-        /* Init IPL emulation. */
-        APUS_WRITE(APUS_REG_INT, REGINT_INTMASTER | REGINT_ENABLEIPL);
-        APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT);
-        APUS_WRITE(APUS_IPL_EMU, IPLEMU_SETRESET | IPLEMU_IPLMASK);
-#endif
-        /* ... and enable the master interrupt bit */
-        amiga_custom.intena = IF_SETCLR | IF_INTEN;
-
-        cia_init_IRQ(&ciaa_base);
-        cia_init_IRQ(&ciab_base);
-}
-
-/*
- * Enable/disable a particular machine specific interrupt source.
- * Note that this may affect other interrupts in case of a shared interrupt.
- * This function should only be called for a _very_ short time to change some
- * internal data, that may not be changed by the interrupt at the same time.
- * ami_(enable|disable)_irq calls may also be nested.
- */
-
-void amiga_enable_irq(unsigned int irq)
-{
-        if (irq >= AMI_IRQS) {
-                printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
-                return;
-        }
-
-        ami_ablecount[irq]--;
-        if (ami_ablecount[irq]<0)
-                ami_ablecount[irq]=0;
-        else if (ami_ablecount[irq])
-                return;
-
-        /* No action for auto-vector interrupts */
-        if (irq >= IRQ_AMIGA_AUTO){
-                printk("%s: Trying to enable auto-vector IRQ %i\n",
-                       __FUNCTION__, irq - IRQ_AMIGA_AUTO);
-                return;
-        }
-
-        if (irq >= IRQ_AMIGA_CIAA) {
-                cia_set_irq(irq, 0);
-                cia_able_irq(irq, 1);
-                return;
-        }
-
-        /* enable the interrupt */
-        amiga_custom.intena = IF_SETCLR | ami_intena_vals[irq];
-}
-
-void amiga_disable_irq(unsigned int irq)
-{
-        if (irq >= AMI_IRQS) {
-                printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
-                return;
-        }
-
-        if (ami_ablecount[irq]++)
-                return;
-
-        /* No action for auto-vector interrupts */
-        if (irq >= IRQ_AMIGA_AUTO) {
-                printk("%s: Trying to disable auto-vector IRQ %i\n",
-                       __FUNCTION__, irq - IRQ_AMIGA_AUTO);
-                return;
-        }
-
-        if (irq >= IRQ_AMIGA_CIAA) {
-                cia_able_irq(irq, 0);
-                return;
-        }
-
-        /* disable the interrupt */
-        amiga_custom.intena = ami_intena_vals[irq];
-}
-
-inline void amiga_do_irq(int irq, struct pt_regs *fp)
-{
-        irq_desc_t *desc = irq_desc + irq;
-        struct irqaction *action = desc->action;
-
-        kstat_cpu(0).irqs[irq]++;
-        action->handler(irq, action->dev_id, fp);
-}
-
-void amiga_do_irq_list(int irq, struct pt_regs *fp)
-{
-        irq_desc_t *desc = irq_desc + irq;
-        struct irqaction *action;
-
-        kstat_cpu(0).irqs[irq]++;
-
-        amiga_custom.intreq = ami_intena_vals[irq];
-
-        for (action = desc->action; action; action = action->next)
-                action->handler(irq, action->dev_id, fp);
-}
-
-/*
- * The builtin Amiga hardware interrupt handlers.
- */
-
-static void ami_int1(int irq, void *dev_id, struct pt_regs *fp)
-{
-        unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
-
-        /* if serial transmit buffer empty, interrupt */
-        if (ints & IF_TBE) {
-                amiga_custom.intreq = IF_TBE;
-                amiga_do_irq(IRQ_AMIGA_TBE, fp);
-        }
-
-        /* if floppy disk transfer complete, interrupt */
-        if (ints & IF_DSKBLK) {
-                amiga_custom.intreq = IF_DSKBLK;
-                amiga_do_irq(IRQ_AMIGA_DSKBLK, fp);
-        }
-
-        /* if software interrupt set, interrupt */
-        if (ints & IF_SOFT) {
-                amiga_custom.intreq = IF_SOFT;
-                amiga_do_irq(IRQ_AMIGA_SOFT, fp);
-        }
-}
-
-static void ami_int3(int irq, void *dev_id, struct pt_regs *fp)
-{
-        unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
-
-        /* if a blitter interrupt */
-        if (ints & IF_BLIT) {
-                amiga_custom.intreq = IF_BLIT;
-                amiga_do_irq(IRQ_AMIGA_BLIT, fp);
-        }
-
-        /* if a copper interrupt */
-        if (ints & IF_COPER) {
-                amiga_custom.intreq = IF_COPER;
-                amiga_do_irq(IRQ_AMIGA_COPPER, fp);
-        }
-
-        /* if a vertical blank interrupt */
-        if (ints & IF_VERTB)
-                amiga_do_irq_list(IRQ_AMIGA_VERTB, fp);
-}
-
-static void ami_int4(int irq, void *dev_id, struct pt_regs *fp)
-{
-        unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
-
-        /* if audio 0 interrupt */
-        if (ints & IF_AUD0) {
-                amiga_custom.intreq = IF_AUD0;
-                amiga_do_irq(IRQ_AMIGA_AUD0, fp);
-        }
-
-        /* if audio 1 interrupt */
-        if (ints & IF_AUD1) {
-                amiga_custom.intreq = IF_AUD1;
-                amiga_do_irq(IRQ_AMIGA_AUD1, fp);
-        }
-
-        /* if audio 2 interrupt */
-        if (ints & IF_AUD2) {
-                amiga_custom.intreq = IF_AUD2;
-                amiga_do_irq(IRQ_AMIGA_AUD2, fp);
-        }
-
-        /* if audio 3 interrupt */
-        if (ints & IF_AUD3) {
-                amiga_custom.intreq = IF_AUD3;
-                amiga_do_irq(IRQ_AMIGA_AUD3, fp);
-        }
-}
-
-static void ami_int5(int irq, void *dev_id, struct pt_regs *fp)
-{
-        unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
-
-        /* if serial receive buffer full interrupt */
-        if (ints & IF_RBF) {
-                /* acknowledge of IF_RBF must be done by the serial interrupt */
-                amiga_do_irq(IRQ_AMIGA_RBF, fp);
-        }
-
-        /* if a disk sync interrupt */
-        if (ints & IF_DSKSYN) {
-                amiga_custom.intreq = IF_DSKSYN;
-                amiga_do_irq(IRQ_AMIGA_DSKSYN, fp);
-        }
-}
-
-static void ami_int7(int irq, void *dev_id, struct pt_regs *fp)
-{
-        panic ("level 7 interrupt received\n");
-}
-
-#ifdef CONFIG_APUS
-/* The PPC irq handling links all handlers requested on the same vector
-   and executes them in a loop. Having ami_badint at the end of the chain
-   is a bad idea. */
-struct irqaction amiga_sys_irqaction[AUTO_IRQS] = {
-        { .handler = ami_badint, .name = "spurious int" },
-        { .handler = ami_int1, .name = "int1 handler" },
-        { 0, /* CIAA */ },
-        { .handler = ami_int3, .name = "int3 handler" },
-        { .handler = ami_int4, .name = "int4 handler" },
-        { .handler = ami_int5, .name = "int5 handler" },
-        { 0, /* CIAB */ },
-        { .handler = ami_int7, .name = "int7 handler" },
-};
-#else
-void (*amiga_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
-        ami_badint, ami_int1, ami_badint, ami_int3,
-        ami_int4, ami_int5, ami_badint, ami_int7
-};
-#endif
diff --git a/arch/ppc/amiga/amisound.c b/arch/ppc/amiga/amisound.c
deleted file mode 100644
index 2b86cbef79f6..000000000000
--- a/arch/ppc/amiga/amisound.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../m68k/amiga/amisound.c"
diff --git a/arch/ppc/amiga/bootinfo.c b/arch/ppc/amiga/bootinfo.c
deleted file mode 100644
index efd869a3ed9b..000000000000
--- a/arch/ppc/amiga/bootinfo.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- *  Extracted from arch/m68k/kernel/setup.c.
- *  Should be properly generalized and put somewhere else.
- *                              Jesper
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-
-#include <asm/setup.h>
-#include <asm/bootinfo.h>
-
-extern char cmd_line[CL_SIZE];
-
-extern int num_memory;
-extern int m68k_realnum_memory;
-extern struct mem_info memory[NUM_MEMINFO];
-extern struct mem_info m68k_memory[NUM_MEMINFO];
-extern struct mem_info ramdisk;
-
-extern int amiga_parse_bootinfo(const struct bi_record *);
-extern int atari_parse_bootinfo(const struct bi_record *);
-extern int mac_parse_bootinfo(const struct bi_record *);
-
-void __init parse_bootinfo(const struct bi_record *record)
-{
-    while (record->tag != BI_LAST) {
-        int unknown = 0;
-        const u_long *data = record->data;
-        switch (record->tag) {
-            case BI_MACHTYPE:
-            case BI_CPUTYPE:
-            case BI_FPUTYPE:
-            case BI_MMUTYPE:
-                /* Already set up by head.S */
-                break;
-
-            case BI_MEMCHUNK:
-                if (num_memory < NUM_MEMINFO) {
-                    memory[num_memory].addr = data[0];
-                    memory[num_memory].size = data[1];
-                    num_memory++;
-
-                    /* FIXME: duplicate for m68k drivers. */
-                    m68k_memory[m68k_realnum_memory].addr = data[0];
-                    m68k_memory[m68k_realnum_memory].size = data[1];
-                    m68k_realnum_memory++;
-                } else
-                    printk("parse_bootinfo: too many memory chunks\n");
-                break;
-
-            case BI_RAMDISK:
-                ramdisk.addr = data[0];
-                ramdisk.size = data[1];
-                break;
-
-            case BI_COMMAND_LINE:
-                strlcpy(cmd_line, (const char *)data, sizeof(cmd_line));
-                break;
-
-            default:
-                if (MACH_IS_AMIGA)
-                    unknown = amiga_parse_bootinfo(record);
-                else if (MACH_IS_ATARI)
-                    unknown = atari_parse_bootinfo(record);
-                else if (MACH_IS_MAC)
-                    unknown = mac_parse_bootinfo(record);
-                else
-                    unknown = 1;
-        }
-        if (unknown)
-            printk("parse_bootinfo: unknown tag 0x%04x ignored\n",
-                   record->tag);
-        record = (struct bi_record *)((u_long)record+record->size);
-    }
-}
diff --git a/arch/ppc/amiga/chipram.c b/arch/ppc/amiga/chipram.c
deleted file mode 100644
index e6ab3c6b223c..000000000000
--- a/arch/ppc/amiga/chipram.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../m68k/amiga/chipram.c"
diff --git a/arch/ppc/amiga/cia.c b/arch/ppc/amiga/cia.c
deleted file mode 100644
index 9558f2f40e64..000000000000
--- a/arch/ppc/amiga/cia.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- *  Copyright (C) 1996 Roman Zippel
- *
- *  The concept of some functions bases on the original Amiga OS function
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/kernel_stat.h>
-#include <linux/init.h>
-
-#include <asm/irq.h>
-#include <asm/amigahw.h>
-#include <asm/amigaints.h>
-
-struct ciabase {
-        volatile struct CIA *cia;
-        u_char icr_mask, icr_data;
-        u_short int_mask;
-        int handler_irq, cia_irq, server_irq;
-        char *name;
-} ciaa_base = {
-        &ciaa, 0, 0, IF_PORTS,
-        IRQ_AMIGA_AUTO_2, IRQ_AMIGA_CIAA,
-        IRQ_AMIGA_PORTS,
-        "CIAA handler"
-}, ciab_base = {
-        &ciab, 0, 0, IF_EXTER,
-        IRQ_AMIGA_AUTO_6, IRQ_AMIGA_CIAB,
-        IRQ_AMIGA_EXTER,
-        "CIAB handler"
-};
-
-#define CIA_SET_BASE_ADJUST_IRQ(base, irq)      \
-do {                                            \
-        if (irq >= IRQ_AMIGA_CIAB) {            \
-                base = &ciab_base;              \
-                irq -= IRQ_AMIGA_CIAB;          \
-        } else {                                \
-                base = &ciaa_base;              \
-                irq -= IRQ_AMIGA_CIAA;          \
-        }                                       \
-} while (0)
-
-/*
- *  Cause or clear CIA interrupts, return old interrupt status.
- */
-
-static unsigned char cia_set_irq_private(struct ciabase *base,
-                                         unsigned char mask)
-{
-        u_char old;
-
-        old = (base->icr_data |= base->cia->icr);
-        if (mask & CIA_ICR_SETCLR)
-                base->icr_data |= mask;
-        else
-                base->icr_data &= ~mask;
-        if (base->icr_data & base->icr_mask)
-                amiga_custom.intreq = IF_SETCLR | base->int_mask;
-        return old & base->icr_mask;
-}
-
-unsigned char cia_set_irq(unsigned int irq, int set)
-{
-        struct ciabase *base;
-        unsigned char mask;
-
-        if (irq >= IRQ_AMIGA_CIAB)
-                mask = (1 << (irq - IRQ_AMIGA_CIAB));
-        else
-                mask = (1 << (irq - IRQ_AMIGA_CIAA));
-        mask |= (set) ? CIA_ICR_SETCLR : 0;
-
-        CIA_SET_BASE_ADJUST_IRQ(base, irq);
-
-        return cia_set_irq_private(base, mask);
-}
-
-unsigned char cia_get_irq_mask(unsigned int irq)
-{
-        struct ciabase *base;
-
-        CIA_SET_BASE_ADJUST_IRQ(base, irq);
-
-        return base->cia->icr;
-}
-
-/*
- *  Enable or disable CIA interrupts, return old interrupt mask.
- */
-
-static unsigned char cia_able_irq_private(struct ciabase *base,
-                                          unsigned char mask)
-{
-        u_char old;
-
-        old = base->icr_mask;
-        base->icr_data |= base->cia->icr;
-        base->cia->icr = mask;
-        if (mask & CIA_ICR_SETCLR)
-                base->icr_mask |= mask;
-        else
-                base->icr_mask &= ~mask;
-        base->icr_mask &= CIA_ICR_ALL;
-
-        if (base->icr_data & base->icr_mask)
-                amiga_custom.intreq = IF_SETCLR | base->int_mask;
-        return old;
-}
-
-unsigned char cia_able_irq(unsigned int irq, int enable)
-{
-        struct ciabase *base;
-        unsigned char mask;
-
-        if (irq >= IRQ_AMIGA_CIAB)
-                mask = (1 << (irq - IRQ_AMIGA_CIAB));
-        else
-                mask = (1 << (irq - IRQ_AMIGA_CIAA));
-        mask |= (enable) ? CIA_ICR_SETCLR : 0;
-
-        CIA_SET_BASE_ADJUST_IRQ(base, irq);
-
-        return cia_able_irq_private(base, mask);
-}
-
-static void cia_handler(int irq, void *dev_id, struct pt_regs *fp)
-{
-        struct ciabase *base = (struct ciabase *)dev_id;
-        irq_desc_t *desc;
-        struct irqaction *action;
-        int i;
-        unsigned char ints;
-
-        irq = base->cia_irq;
-        desc = irq_desc + irq;
-        ints = cia_set_irq_private(base, CIA_ICR_ALL);
-        amiga_custom.intreq = base->int_mask;
-        for (i = 0; i < CIA_IRQS; i++, irq++) {
-                if (ints & 1) {
-                        kstat_cpu(0).irqs[irq]++;
-                        action = desc->action;
-                        action->handler(irq, action->dev_id, fp);
-                }
-                ints >>= 1;
-                desc++;
-        }
-        amiga_do_irq_list(base->server_irq, fp);
-}
-
-void __init cia_init_IRQ(struct ciabase *base)
-{
-        extern struct irqaction amiga_sys_irqaction[AUTO_IRQS];
-        struct irqaction *action;
-
-        /* clear any pending interrupt and turn off all interrupts */
-        cia_set_irq_private(base, CIA_ICR_ALL);
-        cia_able_irq_private(base, CIA_ICR_ALL);
-
-        /* install CIA handler */
-        action = &amiga_sys_irqaction[base->handler_irq-IRQ_AMIGA_AUTO];
-        action->handler = cia_handler;
-        action->dev_id = base;
-        action->name = base->name;
-        setup_irq(base->handler_irq, &amiga_sys_irqaction[base->handler_irq-IRQ_AMIGA_AUTO]);
-
-        amiga_custom.intena = IF_SETCLR | base->int_mask;
-}
diff --git a/arch/ppc/amiga/config.c b/arch/ppc/amiga/config.c
deleted file mode 100644
index bc50ed11957d..000000000000
--- a/arch/ppc/amiga/config.c
+++ /dev/null
@@ -1,953 +0,0 @@
-#define m68k_debug_device debug_device
-
-/*
- *  Copyright (C) 1993 Hamish Macdonald
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-/*
- * Miscellaneous Amiga stuff
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/kd.h>
-#include <linux/tty.h>
-#include <linux/console.h>
-#include <linux/init.h>
-#ifdef CONFIG_ZORRO
-#include <linux/zorro.h>
-#endif
-
-#include <asm/bootinfo.h>
-#include <asm/setup.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/amigahw.h>
-#include <asm/amigaints.h>
-#include <asm/irq.h>
-#include <asm/machdep.h>
-#include <asm/io.h>
-
-unsigned long powerup_PCI_present;
-unsigned long powerup_BPPCPLUS_present;
-unsigned long amiga_model;
-unsigned long amiga_eclock;
-unsigned long amiga_masterclock;
-unsigned long amiga_colorclock;
-unsigned long amiga_chipset;
-unsigned char amiga_vblank;
-unsigned char amiga_psfreq;
-struct amiga_hw_present amiga_hw_present;
-
-static char s_a500[] __initdata = "A500";
-static char s_a500p[] __initdata = "A500+";
-static char s_a600[] __initdata = "A600";
-static char s_a1000[] __initdata = "A1000";
-static char s_a1200[] __initdata = "A1200";
-static char s_a2000[] __initdata = "A2000";
-static char s_a2500[] __initdata = "A2500";
-static char s_a3000[] __initdata = "A3000";
-static char s_a3000t[] __initdata = "A3000T";
-static char s_a3000p[] __initdata = "A3000+";
-static char s_a4000[] __initdata = "A4000";
-static char s_a4000t[] __initdata = "A4000T";
-static char s_cdtv[] __initdata = "CDTV";
-static char s_cd32[] __initdata = "CD32";
-static char s_draco[] __initdata = "Draco";
-static char *amiga_models[] __initdata = {
-    s_a500, s_a500p, s_a600, s_a1000, s_a1200, s_a2000, s_a2500, s_a3000,
-    s_a3000t, s_a3000p, s_a4000, s_a4000t, s_cdtv, s_cd32, s_draco,
-};
-
-static char amiga_model_name[13] = "Amiga ";
-
-extern char m68k_debug_device[];
-
-static void amiga_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
-/* amiga specific irq functions */
-extern void amiga_init_IRQ (void);
-extern void (*amiga_default_handler[]) (int, void *, struct pt_regs *);
-extern int amiga_request_irq (unsigned int irq,
-                              void (*handler)(int, void *, struct pt_regs *),
-                              unsigned long flags, const char *devname,
-                              void *dev_id);
-extern void amiga_free_irq (unsigned int irq, void *dev_id);
-extern void amiga_enable_irq (unsigned int);
-extern void amiga_disable_irq (unsigned int);
-static void amiga_get_model(char *model);
-static int amiga_get_hardware_list(char *buffer);
-/* amiga specific timer functions */
-static unsigned long amiga_gettimeoffset (void);
-static void a3000_gettod (int *, int *, int *, int *, int *, int *);
-static void a2000_gettod (int *, int *, int *, int *, int *, int *);
-static int amiga_hwclk (int, struct hwclk_time *);
-static int amiga_set_clock_mmss (unsigned long);
-static void amiga_reset (void);
-extern void amiga_init_sound(void);
-static void amiga_savekmsg_init(void);
-static void amiga_mem_console_write(struct console *co, const char *b,
-                                    unsigned int count);
-void amiga_serial_console_write(struct console *co, const char *s,
-                                unsigned int count);
-static void amiga_debug_init(void);
-#ifdef CONFIG_HEARTBEAT
-static void amiga_heartbeat(int on);
-#endif
-
-static struct console amiga_console_driver = {
-        .name =         "debug",
-        .flags =        CON_PRINTBUFFER,
-        .index =        -1,
-};
-
-
-    /*
-     *  Motherboard Resources present in all Amiga models
-     */
-
-static struct {
-    struct resource _ciab, _ciaa, _custom, _kickstart;
-} mb_resources = {
-//    { "Ranger Memory", 0x00c00000, 0x00c7ffff },
-    ._ciab =      { "CIA B", 0x00bfd000, 0x00bfdfff },
-    ._ciaa =      { "CIA A", 0x00bfe000, 0x00bfefff },
-    ._custom =    { "Custom I/O", 0x00dff000, 0x00dfffff },
-    ._kickstart = { "Kickstart ROM", 0x00f80000, 0x00ffffff }
-};
-
-static struct resource rtc_resource = {
-    NULL, 0x00dc0000, 0x00dcffff
-};
-
-static struct resource ram_resource[NUM_MEMINFO];
-
-
-    /*
-     *  Parse an Amiga-specific record in the bootinfo
-     */
-
-int amiga_parse_bootinfo(const struct bi_record *record)
-{
-    int unknown = 0;
-    const unsigned long *data = record->data;
-
-    switch (record->tag) {
-        case BI_AMIGA_MODEL:
-        {
-                unsigned long d = *data;
-
-                powerup_PCI_present = d & 0x100;
-                amiga_model = d & 0xff;
-        }
-        break;
-
-        case BI_AMIGA_ECLOCK:
-            amiga_eclock = *data;
-            break;
-
-        case BI_AMIGA_CHIPSET:
-            amiga_chipset = *data;
-            break;
-
-        case BI_AMIGA_CHIP_SIZE:
-            amiga_chip_size = *(const int *)data;
-            break;
-
-        case BI_AMIGA_VBLANK:
-            amiga_vblank = *(const unsigned char *)data;
-            break;
-
-        case BI_AMIGA_PSFREQ:
-            amiga_psfreq = *(const unsigned char *)data;
-            break;
-
-        case BI_AMIGA_AUTOCON:
-#ifdef CONFIG_ZORRO
-            if (zorro_num_autocon < ZORRO_NUM_AUTO) {
-                const struct ConfigDev *cd = (struct ConfigDev *)data;
-                struct zorro_dev *dev = &zorro_autocon[zorro_num_autocon++];
-                dev->rom = cd->cd_Rom;
-                dev->slotaddr = cd->cd_SlotAddr;
-                dev->slotsize = cd->cd_SlotSize;
-                dev->resource.start = (unsigned long)cd->cd_BoardAddr;
-                dev->resource.end = dev->resource.start+cd->cd_BoardSize-1;
-            } else
-                printk("amiga_parse_bootinfo: too many AutoConfig devices\n");
-#endif /* CONFIG_ZORRO */
-            break;
-
-        case BI_AMIGA_SERPER:
-            /* serial port period: ignored here */
-            break;
-
-        case BI_AMIGA_PUP_BRIDGE:
-            powerup_PCI_present = *(const unsigned short *)data;
-            break;
-
-        case BI_AMIGA_BPPC_SCSI:
-            powerup_BPPCPLUS_present = *(const unsigned short *)data;
-            break;
-
-        default:
-            unknown = 1;
-    }
-    return(unknown);
-}
-
-    /*
-     *  Identify builtin hardware
-     */
-
-static void __init amiga_identify(void)
-{
-  /* Fill in some default values, if necessary */
-  if (amiga_eclock == 0)
-    amiga_eclock = 709379;
-
-  memset(&amiga_hw_present, 0, sizeof(amiga_hw_present));
-
-  printk("Amiga hardware found: ");
-  if (amiga_model >= AMI_500 && amiga_model <= AMI_DRACO) {
-    printk("[%s] ", amiga_models[amiga_model-AMI_500]);
-    strcat(amiga_model_name, amiga_models[amiga_model-AMI_500]);
-  }
-
-  switch(amiga_model) {
-  case AMI_UNKNOWN:
-    goto Generic;
-
-  case AMI_600:
-  case AMI_1200:
-    AMIGAHW_SET(A1200_IDE);
-    AMIGAHW_SET(PCMCIA);
-  case AMI_500:
-  case AMI_500PLUS:
-  case AMI_1000:
-  case AMI_2000:
-  case AMI_2500:
-    AMIGAHW_SET(A2000_CLK);     /* Is this correct for all models? */
-    goto Generic;
-
-  case AMI_3000:
-  case AMI_3000T:
-    AMIGAHW_SET(AMBER_FF);
-    AMIGAHW_SET(MAGIC_REKICK);
-    /* fall through */
-  case AMI_3000PLUS:
-    AMIGAHW_SET(A3000_SCSI);
-    AMIGAHW_SET(A3000_CLK);
-    AMIGAHW_SET(ZORRO3);
-    goto Generic;
-
-  case AMI_4000T:
-    AMIGAHW_SET(A4000_SCSI);
-    /* fall through */
-  case AMI_4000:
-    AMIGAHW_SET(A4000_IDE);
-    AMIGAHW_SET(A3000_CLK);
-    AMIGAHW_SET(ZORRO3);
-    goto Generic;
-
-  case AMI_CDTV:
-  case AMI_CD32:
-    AMIGAHW_SET(CD_ROM);
-    AMIGAHW_SET(A2000_CLK);             /* Is this correct? */
-    goto Generic;
-
-  Generic:
-    AMIGAHW_SET(AMI_VIDEO);
-    AMIGAHW_SET(AMI_BLITTER);
-    AMIGAHW_SET(AMI_AUDIO);
-    AMIGAHW_SET(AMI_FLOPPY);
-    AMIGAHW_SET(AMI_KEYBOARD);
-    AMIGAHW_SET(AMI_MOUSE);
-    AMIGAHW_SET(AMI_SERIAL);
-    AMIGAHW_SET(AMI_PARALLEL);
-    AMIGAHW_SET(CHIP_RAM);
-    AMIGAHW_SET(PAULA);
-
-    switch(amiga_chipset) {
-    case CS_OCS:
-    case CS_ECS:
-    case CS_AGA:
-      switch (amiga_custom.deniseid & 0xf) {
-      case 0x0c:
-        AMIGAHW_SET(DENISE_HR);
-        break;
-      case 0x08:
-        AMIGAHW_SET(LISA);
-        break;
-      }
-      break;
-    default:
-      AMIGAHW_SET(DENISE);
-      break;
-    }
-    switch ((amiga_custom.vposr>>8) & 0x7f) {
-    case 0x00:
-      AMIGAHW_SET(AGNUS_PAL);
-      break;
-    case 0x10:
-      AMIGAHW_SET(AGNUS_NTSC);
-      break;
-    case 0x20:
-    case 0x21:
-      AMIGAHW_SET(AGNUS_HR_PAL);
-      break;
-    case 0x30:
-    case 0x31:
-      AMIGAHW_SET(AGNUS_HR_NTSC);
-      break;
-    case 0x22:
-    case 0x23:
-      AMIGAHW_SET(ALICE_PAL);
-      break;
-    case 0x32:
-    case 0x33:
-      AMIGAHW_SET(ALICE_NTSC);
-      break;
-    }
-    AMIGAHW_SET(ZORRO);
-    break;
-
-  case AMI_DRACO:
-    panic("No support for Draco yet");
-
-  default:
-    panic("Unknown Amiga Model");
-  }
-
-#define AMIGAHW_ANNOUNCE(name, str)                     \
-  if (AMIGAHW_PRESENT(name))                            \
-    printk(str)
-
-  AMIGAHW_ANNOUNCE(AMI_VIDEO, "VIDEO ");
-  AMIGAHW_ANNOUNCE(AMI_BLITTER, "BLITTER ");
-  AMIGAHW_ANNOUNCE(AMBER_FF, "AMBER_FF ");
-  AMIGAHW_ANNOUNCE(AMI_AUDIO, "AUDIO ");
-  AMIGAHW_ANNOUNCE(AMI_FLOPPY, "FLOPPY ");
-  AMIGAHW_ANNOUNCE(A3000_SCSI, "A3000_SCSI ");
-  AMIGAHW_ANNOUNCE(A4000_SCSI, "A4000_SCSI ");
-  AMIGAHW_ANNOUNCE(A1200_IDE, "A1200_IDE ");
-  AMIGAHW_ANNOUNCE(A4000_IDE, "A4000_IDE ");
-  AMIGAHW_ANNOUNCE(CD_ROM, "CD_ROM ");
-  AMIGAHW_ANNOUNCE(AMI_KEYBOARD, "KEYBOARD ");
-  AMIGAHW_ANNOUNCE(AMI_MOUSE, "MOUSE ");
-  AMIGAHW_ANNOUNCE(AMI_SERIAL, "SERIAL ");
-  AMIGAHW_ANNOUNCE(AMI_PARALLEL, "PARALLEL ");
-  AMIGAHW_ANNOUNCE(A2000_CLK, "A2000_CLK ");
-  AMIGAHW_ANNOUNCE(A3000_CLK, "A3000_CLK ");
-  AMIGAHW_ANNOUNCE(CHIP_RAM, "CHIP_RAM ");
-  AMIGAHW_ANNOUNCE(PAULA, "PAULA ");
-  AMIGAHW_ANNOUNCE(DENISE, "DENISE ");
-  AMIGAHW_ANNOUNCE(DENISE_HR, "DENISE_HR ");
-  AMIGAHW_ANNOUNCE(LISA, "LISA ");
-  AMIGAHW_ANNOUNCE(AGNUS_PAL, "AGNUS_PAL ");
-  AMIGAHW_ANNOUNCE(AGNUS_NTSC, "AGNUS_NTSC ");
-  AMIGAHW_ANNOUNCE(AGNUS_HR_PAL, "AGNUS_HR_PAL ");
-  AMIGAHW_ANNOUNCE(AGNUS_HR_NTSC, "AGNUS_HR_NTSC ");
-  AMIGAHW_ANNOUNCE(ALICE_PAL, "ALICE_PAL ");
-  AMIGAHW_ANNOUNCE(ALICE_NTSC, "ALICE_NTSC ");
-  AMIGAHW_ANNOUNCE(MAGIC_REKICK, "MAGIC_REKICK ");
-  AMIGAHW_ANNOUNCE(PCMCIA, "PCMCIA ");
-  if (AMIGAHW_PRESENT(ZORRO))
-    printk("ZORRO%s ", AMIGAHW_PRESENT(ZORRO3) ? "3" : "");
-  printk("\n");
-
-#undef AMIGAHW_ANNOUNCE
-}
-
-    /*
-     *  Setup the Amiga configuration info
-     */
-
-void __init config_amiga(void)
-{
-  int i;
-
-  amiga_debug_init();
-  amiga_identify();
-
-  /* Some APUS boxes may have PCI memory, but ... */
-  iomem_resource.name = "Memory";
-  for (i = 0; i < 4; i++)
-    request_resource(&iomem_resource, &((struct resource *)&mb_resources)[i]);
-
-  mach_sched_init      = amiga_sched_init;
-  mach_init_IRQ        = amiga_init_IRQ;
-#ifndef CONFIG_APUS
-  mach_default_handler = &amiga_default_handler;
-  mach_request_irq     = amiga_request_irq;
-  mach_free_irq        = amiga_free_irq;
-  enable_irq           = amiga_enable_irq;
-  disable_irq          = amiga_disable_irq;
-#endif
-  mach_get_model       = amiga_get_model;
-  mach_get_hardware_list = amiga_get_hardware_list;
-  mach_gettimeoffset   = amiga_gettimeoffset;
-  if (AMIGAHW_PRESENT(A3000_CLK)){
-    mach_gettod  = a3000_gettod;
-    rtc_resource.name = "A3000 RTC";
-    request_resource(&iomem_resource, &rtc_resource);
-  }
-  else{ /* if (AMIGAHW_PRESENT(A2000_CLK)) */
-    mach_gettod  = a2000_gettod;
-    rtc_resource.name = "A2000 RTC";
-    request_resource(&iomem_resource, &rtc_resource);
-  }
-
-  mach_max_dma_address = 0xffffffff; /*
-                                      * default MAX_DMA=0xffffffff
-                                      * on all machines. If we don't
-                                      * do so, the SCSI code will not
-                                      * be able to allocate any mem
-                                      * for transfers, unless we are
-                                      * dealing with a Z2 mem only
-                                      * system.                  /Jes
-                                      */
-
-  mach_hwclk           = amiga_hwclk;
-  mach_set_clock_mmss  = amiga_set_clock_mmss;
-  mach_reset           = amiga_reset;
-#ifdef CONFIG_HEARTBEAT
-  mach_heartbeat = amiga_heartbeat;
-#endif
-
-  /* Fill in the clock values (based on the 700 kHz E-Clock) */
-  amiga_masterclock = 40*amiga_eclock;  /* 28 MHz */
-  amiga_colorclock = 5*amiga_eclock;    /* 3.5 MHz */
-
-  /* clear all DMA bits */
-  amiga_custom.dmacon = DMAF_ALL;
-  /* ensure that the DMA master bit is set */
-  amiga_custom.dmacon = DMAF_SETCLR | DMAF_MASTER;
-
-  /* request all RAM */
-  for (i = 0; i < m68k_num_memory; i++) {
-    ram_resource[i].name =
-      (m68k_memory[i].addr >= 0x01000000) ? "32-bit Fast RAM" :
-      (m68k_memory[i].addr < 0x00c00000) ? "16-bit Fast RAM" :
-      "16-bit Slow RAM";
-    ram_resource[i].start = m68k_memory[i].addr;
-    ram_resource[i].end = m68k_memory[i].addr+m68k_memory[i].size-1;
-    request_resource(&iomem_resource, &ram_resource[i]);
-  }
-
-  /* initialize chipram allocator */
-  amiga_chip_init ();
-
-  /* debugging using chipram */
-  if (!strcmp( m68k_debug_device, "mem" )){
-          if (!AMIGAHW_PRESENT(CHIP_RAM))
-                  printk("Warning: no chipram present for debugging\n");
-          else {
-                  amiga_savekmsg_init();
-                  amiga_console_driver.write = amiga_mem_console_write;
-                  register_console(&amiga_console_driver);
-          }
-  }
-
-  /* our beloved beeper */
-  if (AMIGAHW_PRESENT(AMI_AUDIO))
-          amiga_init_sound();
-
-  /*
-   * if it is an A3000, set the magic bit that forces
-   * a hard rekick
-   */
-  if (AMIGAHW_PRESENT(MAGIC_REKICK))
-          *(unsigned char *)ZTWO_VADDR(0xde0002) |= 0x80;
-}
-
-static unsigned short jiffy_ticks;
-
-static void __init amiga_sched_init(irqreturn_t (*timer_routine)(int, void *,
-                                                struct pt_regs *))
-{
-        static struct resource sched_res = {
-            "timer", 0x00bfd400, 0x00bfd5ff,
-        };
-        jiffy_ticks = (amiga_eclock+HZ/2)/HZ;
-
-        if (request_resource(&mb_resources._ciab, &sched_res))
-            printk("Cannot allocate ciab.ta{lo,hi}\n");
-        ciab.cra &= 0xC0;   /* turn off timer A, continuous mode, from Eclk */
-        ciab.talo = jiffy_ticks % 256;
-        ciab.tahi = jiffy_ticks / 256;
-
-        /* install interrupt service routine for CIAB Timer A
-         *
-         * Please don't change this to use ciaa, as it interferes with the
-         * SCSI code. We'll have to take a look at this later
-         */
-        request_irq(IRQ_AMIGA_CIAB_TA, timer_routine, 0, "timer", NULL);
-        /* start timer */
-        ciab.cra |= 0x11;
-}
-
-#define TICK_SIZE 10000
-
-extern unsigned char cia_get_irq_mask(unsigned int irq);
-
-/* This is always executed with interrupts disabled.  */
-static unsigned long amiga_gettimeoffset (void)
-{
-        unsigned short hi, lo, hi2;
-        unsigned long ticks, offset = 0;
-
-        /* read CIA B timer A current value */
-        hi  = ciab.tahi;
-        lo  = ciab.talo;
-        hi2 = ciab.tahi;
-
-        if (hi != hi2) {
-                lo = ciab.talo;
-                hi = hi2;
-        }
-
-        ticks = hi << 8 | lo;
-
-        if (ticks > jiffy_ticks / 2)
-                /* check for pending interrupt */
-                if (cia_get_irq_mask(IRQ_AMIGA_CIAB) & CIA_ICR_TA)
-                        offset = 10000;
-
-        ticks = jiffy_ticks - ticks;
-        ticks = (10000 * ticks) / jiffy_ticks;
-
-        return ticks + offset;
-}
-
-static void a3000_gettod (int *yearp, int *monp, int *dayp,
-                          int *hourp, int *minp, int *secp)
-{
-        volatile struct tod3000 *tod = TOD_3000;
-
-        tod->cntrl1 = TOD3000_CNTRL1_HOLD;
-
-        *secp  = tod->second1 * 10 + tod->second2;
-        *minp  = tod->minute1 * 10 + tod->minute2;
-        *hourp = tod->hour1   * 10 + tod->hour2;
-        *dayp  = tod->day1    * 10 + tod->day2;
-        *monp  = tod->month1  * 10 + tod->month2;
-        *yearp = tod->year1   * 10 + tod->year2;
-
-        tod->cntrl1 = TOD3000_CNTRL1_FREE;
-}
-
-static void a2000_gettod (int *yearp, int *monp, int *dayp,
-                          int *hourp, int *minp, int *secp)
-{
-        volatile struct tod2000 *tod = TOD_2000;
-
-        tod->cntrl1 = TOD2000_CNTRL1_HOLD;
-
-        while (tod->cntrl1 & TOD2000_CNTRL1_BUSY)
-                ;
-
-        *secp  = tod->second1     * 10 + tod->second2;
-        *minp  = tod->minute1     * 10 + tod->minute2;
-        *hourp = (tod->hour1 & 3) * 10 + tod->hour2;
-        *dayp  = tod->day1        * 10 + tod->day2;
-        *monp  = tod->month1      * 10 + tod->month2;
-        *yearp = tod->year1       * 10 + tod->year2;
-
-        if (!(tod->cntrl3 & TOD2000_CNTRL3_24HMODE)){
-                if (!(tod->hour1 & TOD2000_HOUR1_PM) && *hourp == 12)
-                        *hourp = 0;
-                else if ((tod->hour1 & TOD2000_HOUR1_PM) && *hourp != 12)
-                        *hourp += 12;
-        }
-
-        tod->cntrl1 &= ~TOD2000_CNTRL1_HOLD;
-}
-
-static int amiga_hwclk(int op, struct hwclk_time *t)
-{
-        if (AMIGAHW_PRESENT(A3000_CLK)) {
-                volatile struct tod3000 *tod = TOD_3000;
-
-                tod->cntrl1 = TOD3000_CNTRL1_HOLD;
-
-                if (!op) { /* read */
-                        t->sec  = tod->second1 * 10 + tod->second2;
-                        t->min  = tod->minute1 * 10 + tod->minute2;
-                        t->hour = tod->hour1   * 10 + tod->hour2;
-                        t->day  = tod->day1    * 10 + tod->day2;
-                        t->wday = tod->weekday;
-                        t->mon  = tod->month1  * 10 + tod->month2 - 1;
-                        t->year = tod->year1   * 10 + tod->year2;
-                        if (t->year <= 69)
-                                t->year += 100;
-                } else {
-                        tod->second1 = t->sec / 10;
-                        tod->second2 = t->sec % 10;
-                        tod->minute1 = t->min / 10;
-                        tod->minute2 = t->min % 10;
-                        tod->hour1   = t->hour / 10;
-                        tod->hour2   = t->hour % 10;
-                        tod->day1    = t->day / 10;
-                        tod->day2    = t->day % 10;
-                        if (t->wday != -1)
-                                tod->weekday = t->wday;
-                        tod->month1  = (t->mon + 1) / 10;
-                        tod->month2  = (t->mon + 1) % 10;
-                        if (t->year >= 100)
-                                t->year -= 100;
-                        tod->year1   = t->year / 10;
-                        tod->year2   = t->year % 10;
-                }
-
-                tod->cntrl1 = TOD3000_CNTRL1_FREE;
-        } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
-                volatile struct tod2000 *tod = TOD_2000;
-
-                tod->cntrl1 = TOD2000_CNTRL1_HOLD;
-        
-                while (tod->cntrl1 & TOD2000_CNTRL1_BUSY)
-                        ;
-
-                if (!op) { /* read */
-                        t->sec  = tod->second1     * 10 + tod->second2;
-                        t->min  = tod->minute1     * 10 + tod->minute2;
-                        t->hour = (tod->hour1 & 3) * 10 + tod->hour2;
-                        t->day  = tod->day1        * 10 + tod->day2;
-                        t->wday = tod->weekday;
-                        t->mon  = tod->month1      * 10 + tod->month2 - 1;
-                        t->year = tod->year1       * 10 + tod->year2;
-                        if (t->year <= 69)
-                                t->year += 100;
-
-                        if (!(tod->cntrl3 & TOD2000_CNTRL3_24HMODE)){
-                                if (!(tod->hour1 & TOD2000_HOUR1_PM) && t->hour == 12)
-                                        t->hour = 0;
-                                else if ((tod->hour1 & TOD2000_HOUR1_PM) && t->hour != 12)
-                                        t->hour += 12;
-                        }
-                } else {
-                        tod->second1 = t->sec / 10;
-                        tod->second2 = t->sec % 10;
-                        tod->minute1 = t->min / 10;
-                        tod->minute2 = t->min % 10;
-                        if (tod->cntrl3 & TOD2000_CNTRL3_24HMODE)
-                                tod->hour1 = t->hour / 10;
-                        else if (t->hour >= 12)
-                                tod->hour1 = TOD2000_HOUR1_PM +
-                                        (t->hour - 12) / 10;
-                        else
-                                tod->hour1 = t->hour / 10;
-                        tod->hour2   = t->hour % 10;
-                        tod->day1    = t->day / 10;
-                        tod->day2    = t->day % 10;
-                        if (t->wday != -1)
-                                tod->weekday = t->wday;
-                        tod->month1  = (t->mon + 1) / 10;
-                        tod->month2  = (t->mon + 1) % 10;
-                        if (t->year >= 100)
-                                t->year -= 100;
-                        tod->year1   = t->year / 10;
-                        tod->year2   = t->year % 10;
-                }
-
-                tod->cntrl1 &= ~TOD2000_CNTRL1_HOLD;
-        }
-
-        return 0;
-}
-
-static int amiga_set_clock_mmss (unsigned long nowtime)
-{
-        short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
-
-        if (AMIGAHW_PRESENT(A3000_CLK)) {
-                volatile struct tod3000 *tod = TOD_3000;
-
-                tod->cntrl1 = TOD3000_CNTRL1_HOLD;
-
-                tod->second1 = real_seconds / 10;
-                tod->second2 = real_seconds % 10;
-                tod->minute1 = real_minutes / 10;
-                tod->minute2 = real_minutes % 10;
-
-                tod->cntrl1 = TOD3000_CNTRL1_FREE;
-        } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
-                volatile struct tod2000 *tod = TOD_2000;
-
-                tod->cntrl1 = TOD2000_CNTRL1_HOLD;
-        
-                while (tod->cntrl1 & TOD2000_CNTRL1_BUSY)
-                        ;
-
-                tod->second1 = real_seconds / 10;
-                tod->second2 = real_seconds % 10;
-                tod->minute1 = real_minutes / 10;
-                tod->minute2 = real_minutes % 10;
-
-                tod->cntrl1 &= ~TOD2000_CNTRL1_HOLD;
-        }
-
-        return 0;
-}
-
-static NORET_TYPE void amiga_reset( void )
-    ATTRIB_NORET;
-
-static void amiga_reset (void)
-{
-  for (;;);
-}
-
-
-    /*
-     *  Debugging
-     */
-
-#define SAVEKMSG_MAXMEM         128*1024
-
-#define SAVEKMSG_MAGIC1         0x53415645      /* 'SAVE' */
-#define SAVEKMSG_MAGIC2         0x4B4D5347      /* 'KMSG' */
-
-struct savekmsg {
-    unsigned long magic1;               /* SAVEKMSG_MAGIC1 */
-    unsigned long magic2;               /* SAVEKMSG_MAGIC2 */
-    unsigned long magicptr;             /* address of magic1 */
-    unsigned long size;
-    char data[0];
-};
-
-static struct savekmsg *savekmsg = NULL;
-
-static void amiga_mem_console_write(struct console *co, const char *s,
-                                    unsigned int count)
-{
-    if (savekmsg->size+count <= SAVEKMSG_MAXMEM-sizeof(struct savekmsg)) {
-        memcpy(savekmsg->data+savekmsg->size, s, count);
-        savekmsg->size += count;
-    }
-}
-
-static void amiga_savekmsg_init(void)
-{
-    static struct resource debug_res = { "Debug" };
-
-    savekmsg = amiga_chip_alloc_res(SAVEKMSG_MAXMEM, &debug_res);
-    savekmsg->magic1 = SAVEKMSG_MAGIC1;
-    savekmsg->magic2 = SAVEKMSG_MAGIC2;
-    savekmsg->magicptr = virt_to_phys(savekmsg);
-    savekmsg->size = 0;
-}
-
-static void amiga_serial_putc(char c)
-{
-    amiga_custom.serdat = (unsigned char)c | 0x100;
-    mb();
-    while (!(amiga_custom.serdatr & 0x2000))
-       ;
-}
-
-void amiga_serial_console_write(struct console *co, const char *s,
-                                       unsigned int count)
-{
-#if 0 /* def CONFIG_KGDB */
-        /* FIXME:APUS GDB doesn't seem to like O-packages before it is
-           properly connected with the target. */
-        __gdb_output_string (s, count);
-#else
-        while (count--) {
-                if (*s == '\n')
-                        amiga_serial_putc('\r');
-                amiga_serial_putc(*s++);
-        }
-#endif
-}
-
-#ifdef CONFIG_SERIAL_CONSOLE
-void amiga_serial_puts(const char *s)
-{
-    amiga_serial_console_write(NULL, s, strlen(s));
-}
-
-int amiga_serial_console_wait_key(struct console *co)
-{
-    int ch;
-
-    while (!(amiga_custom.intreqr & IF_RBF))
-        barrier();
-    ch = amiga_custom.serdatr & 0xff;
-    /* clear the interrupt, so that another character can be read */
-    amiga_custom.intreq = IF_RBF;
-    return ch;
-}
-
-void amiga_serial_gets(struct console *co, char *s, int len)
-{
-    int ch, cnt = 0;
-
-    while (1) {
-        ch = amiga_serial_console_wait_key(co);
-
-        /* Check for backspace. */
-        if (ch == 8 || ch == 127) {
-            if (cnt == 0) {
-                amiga_serial_putc('\007');
-                continue;
-            }
-            cnt--;
-            amiga_serial_puts("\010 \010");
-            continue;
-        }
-
-        /* Check for enter. */
-        if (ch == 10 || ch == 13)
-            break;
-
-        /* See if line is too long. */
-        if (cnt >= len + 1) {
-            amiga_serial_putc(7);
-            cnt--;
-            continue;
-        }
-
-        /* Store and echo character. */
-        s[cnt++] = ch;
-        amiga_serial_putc(ch);
-    }
-    /* Print enter. */
-    amiga_serial_puts("\r\n");
-    s[cnt] = 0;
-}
-#endif
-
-static void __init amiga_debug_init(void)
-{
-        if (!strcmp( m68k_debug_device, "ser" )) {
-                /* no initialization required (?) */
-                amiga_console_driver.write = amiga_serial_console_write;
-                register_console(&amiga_console_driver);
-        }
-}
-
-#ifdef CONFIG_HEARTBEAT
-static void amiga_heartbeat(int on)
-{
-    if (on)
-        ciaa.pra &= ~2;
-    else
-        ciaa.pra |= 2;
-}
-#endif
-
-    /*
-     *  Amiga specific parts of /proc
-     */
-
-static void amiga_get_model(char *model)
-{
-    strcpy(model, amiga_model_name);
-}
-
-
-static int amiga_get_hardware_list(char *buffer)
-{
-    int len = 0;
-
-    if (AMIGAHW_PRESENT(CHIP_RAM))
-        len += sprintf(buffer+len, "Chip RAM:\t%ldK\n", amiga_chip_size>>10);
-    len += sprintf(buffer+len, "PS Freq:\t%dHz\nEClock Freq:\t%ldHz\n",
-                   amiga_psfreq, amiga_eclock);
-    if (AMIGAHW_PRESENT(AMI_VIDEO)) {
-        char *type;
-        switch(amiga_chipset) {
-            case CS_OCS:
-                type = "OCS";
-                break;
-            case CS_ECS:
-                type = "ECS";
-                break;
-            case CS_AGA:
-                type = "AGA";
-                break;
-            default:
-                type = "Old or Unknown";
-                break;
-        }
-        len += sprintf(buffer+len, "Graphics:\t%s\n", type);
-    }
-
-#define AMIGAHW_ANNOUNCE(name, str)                     \
-    if (AMIGAHW_PRESENT(name))                          \
-        len += sprintf (buffer+len, "\t%s\n", str)
-
-    len += sprintf (buffer + len, "Detected hardware:\n");
-
-    AMIGAHW_ANNOUNCE(AMI_VIDEO, "Amiga Video");
-    AMIGAHW_ANNOUNCE(AMI_BLITTER, "Blitter");
-    AMIGAHW_ANNOUNCE(AMBER_FF, "Amber Flicker Fixer");
-    AMIGAHW_ANNOUNCE(AMI_AUDIO, "Amiga Audio");
-    AMIGAHW_ANNOUNCE(AMI_FLOPPY, "Floppy Controller");
-    AMIGAHW_ANNOUNCE(A3000_SCSI, "SCSI Controller WD33C93 (A3000 style)");
-    AMIGAHW_ANNOUNCE(A4000_SCSI, "SCSI Controller NCR53C710 (A4000T style)");
-    AMIGAHW_ANNOUNCE(A1200_IDE, "IDE Interface (A1200 style)");
-    AMIGAHW_ANNOUNCE(A4000_IDE, "IDE Interface (A4000 style)");
-    AMIGAHW_ANNOUNCE(CD_ROM, "Internal CD ROM drive");
-    AMIGAHW_ANNOUNCE(AMI_KEYBOARD, "Keyboard");
-    AMIGAHW_ANNOUNCE(AMI_MOUSE, "Mouse Port");
-    AMIGAHW_ANNOUNCE(AMI_SERIAL, "Serial Port");
-    AMIGAHW_ANNOUNCE(AMI_PARALLEL, "Parallel Port");
-    AMIGAHW_ANNOUNCE(A2000_CLK, "Hardware Clock (A2000 style)");
-    AMIGAHW_ANNOUNCE(A3000_CLK, "Hardware Clock (A3000 style)");
-    AMIGAHW_ANNOUNCE(CHIP_RAM, "Chip RAM");
-    AMIGAHW_ANNOUNCE(PAULA, "Paula 8364");
-    AMIGAHW_ANNOUNCE(DENISE, "Denise 8362");
-    AMIGAHW_ANNOUNCE(DENISE_HR, "Denise 8373");
-    AMIGAHW_ANNOUNCE(LISA, "Lisa 8375");
-    AMIGAHW_ANNOUNCE(AGNUS_PAL, "Normal/Fat PAL Agnus 8367/8371");
-    AMIGAHW_ANNOUNCE(AGNUS_NTSC, "Normal/Fat NTSC Agnus 8361/8370");
-    AMIGAHW_ANNOUNCE(AGNUS_HR_PAL, "Fat Hires PAL Agnus 8372");
-    AMIGAHW_ANNOUNCE(AGNUS_HR_NTSC, "Fat Hires NTSC Agnus 8372");
-    AMIGAHW_ANNOUNCE(ALICE_PAL, "PAL Alice 8374");
-    AMIGAHW_ANNOUNCE(ALICE_NTSC, "NTSC Alice 8374");
-    AMIGAHW_ANNOUNCE(MAGIC_REKICK, "Magic Hard Rekick");
-    AMIGAHW_ANNOUNCE(PCMCIA, "PCMCIA Slot");
-    if (AMIGAHW_PRESENT(ZORRO))
-        len += sprintf(buffer+len, "\tZorro II%s AutoConfig: %d Expansion "
-                                   "Device%s\n",
-                       AMIGAHW_PRESENT(ZORRO3) ? "I" : "",
-                       zorro_num_autocon, zorro_num_autocon == 1 ? "" : "s");
-
-#undef AMIGAHW_ANNOUNCE
-
-    return(len);
-}
-
-#ifdef CONFIG_APUS
-int get_hardware_list(char *buffer)
-{
-        extern int get_cpuinfo(char *buffer);
-        int len = 0;
-        char model[80];
-        u_long mem;
-        int i;
-
-        if (mach_get_model)
-                mach_get_model(model);
-        else
-                strcpy(model, "Unknown PowerPC");
-
-        len += sprintf(buffer+len, "Model:\t\t%s\n", model);
-        len += get_cpuinfo(buffer+len);
-        for (mem = 0, i = 0; i < m68k_realnum_memory; i++)
-                mem += m68k_memory[i].size;
-        len += sprintf(buffer+len, "System Memory:\t%ldK\n", mem>>10);
-
-        if (mach_get_hardware_list)
-                len += mach_get_hardware_list(buffer+len);
-
-        return(len);
-}
-#endif
diff --git a/arch/ppc/amiga/ints.c b/arch/ppc/amiga/ints.c
deleted file mode 100644
index 083a17462190..000000000000
--- a/arch/ppc/amiga/ints.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- *  Linux/m68k general interrupt handling code from arch/m68k/kernel/ints.c
- *  Needed to drive the m68k emulating IRQ hardware on the PowerUp boards.
- */
-
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/kernel_stat.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/seq_file.h>
-
-#include <asm/setup.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/traps.h>
-#include <asm/page.h>
-#include <asm/machdep.h>
-
-/* table for system interrupt handlers */
-static irq_handler_t irq_list[SYS_IRQS];
-
-static const char *default_names[SYS_IRQS] = {
-        "spurious int", "int1 handler", "int2 handler", "int3 handler",
-        "int4 handler", "int5 handler", "int6 handler", "int7 handler"
-};
-
-/* The number of spurious interrupts */
-volatile unsigned int num_spurious;
-
-#define NUM_IRQ_NODES 100
-static irq_node_t nodes[NUM_IRQ_NODES];
-
-
-/*
- * void init_IRQ(void)
- *
- * Parameters:  None
- *
- * Returns:     Nothing
- *
- * This function should be called during kernel startup to initialize
- * the IRQ handling routines.
- */
-
-__init
-void m68k_init_IRQ(void)
-{
-        int i;
-
-        for (i = 0; i < SYS_IRQS; i++) {
-                if (mach_default_handler)
-                        irq_list[i].handler = (*mach_default_handler)[i];
-                irq_list[i].flags   = 0;
-                irq_list[i].dev_id  = NULL;
-                irq_list[i].devname = default_names[i];
-        }
-
-        for (i = 0; i < NUM_IRQ_NODES; i++)
-                nodes[i].handler = NULL;
-
-        mach_init_IRQ ();
-}
-
-irq_node_t *new_irq_node(void)
-{
-        irq_node_t *node;
-        short i;
-
-        for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--)
-                if (!node->handler)
-                        return node;
-
-        printk ("new_irq_node: out of nodes\n");
-        return NULL;
-}
-
-int sys_request_irq(unsigned int irq,
-                    void (*handler)(int, void *, struct pt_regs *),
-                    unsigned long flags, const char *devname, void *dev_id)
-{
-        if (irq < IRQ1 || irq > IRQ7) {
-                printk("%s: Incorrect IRQ %d from %s\n",
-                       __FUNCTION__, irq, devname);
-                return -ENXIO;
-        }
-
-#if 0
-        if (!(irq_list[irq].flags & IRQ_FLG_STD)) {
-                if (irq_list[irq].flags & IRQ_FLG_LOCK) {
-                        printk("%s: IRQ %d from %s is not replaceable\n",
-                               __FUNCTION__, irq, irq_list[irq].devname);
-                        return -EBUSY;
-                }
-                if (!(flags & IRQ_FLG_REPLACE)) {
-                        printk("%s: %s can't replace IRQ %d from %s\n",
-                               __FUNCTION__, devname, irq, irq_list[irq].devname);
-                        return -EBUSY;
-                }
-        }
-#endif
-
-        irq_list[irq].handler = handler;
-        irq_list[irq].flags   = flags;
-        irq_list[irq].dev_id  = dev_id;
-        irq_list[irq].devname = devname;
-        return 0;
-}
-
-void sys_free_irq(unsigned int irq, void *dev_id)
-{
-        if (irq < IRQ1 || irq > IRQ7) {
-                printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
-                return;
-        }
-
-        if (irq_list[irq].dev_id != dev_id)
-                printk("%s: Removing probably wrong IRQ %d from %s\n",
-                       __FUNCTION__, irq, irq_list[irq].devname);
-
-        irq_list[irq].handler = (*mach_default_handler)[irq];
-        irq_list[irq].flags   = 0;
-        irq_list[irq].dev_id  = NULL;
-        irq_list[irq].devname = default_names[irq];
-}
-
-asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
-{
-        if (vec >= VEC_INT1 && vec <= VEC_INT7 && !MACH_IS_BVME6000) {
-                vec -= VEC_SPUR;
-                kstat_cpu(0).irqs[vec]++;
-                irq_list[vec].handler(vec, irq_list[vec].dev_id, fp);
-        } else {
-                if (mach_process_int)
-                        mach_process_int(vec, fp);
-                else
-                        panic("Can't process interrupt vector %ld\n", vec);
-                return;
-        }
-}
-
-int m68k_get_irq_list(struct seq_file *p, void *v)
-{
-        int i;
-
-        /* autovector interrupts */
-        if (mach_default_handler) {
-                for (i = 0; i < SYS_IRQS; i++) {
-                        seq_printf(p, "auto %2d: %10u ", i,
-                                       i ? kstat_cpu(0).irqs[i] : num_spurious);
-                        seq_puts(p, "  ");
-                        seq_printf(p, "%s\n", irq_list[i].devname);
-                }
-        }
-
-        mach_get_irq_list(p, v);
-        return 0;
-}
diff --git a/arch/ppc/amiga/pcmcia.c b/arch/ppc/amiga/pcmcia.c
deleted file mode 100644
index 5d29dc65093c..000000000000
--- a/arch/ppc/amiga/pcmcia.c
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../m68k/amiga/pcmcia.c"
diff --git a/arch/ppc/amiga/time.c b/arch/ppc/amiga/time.c
deleted file mode 100644
index 8c880c0ca380..000000000000
--- a/arch/ppc/amiga/time.c
+++ /dev/null
@@ -1,57 +0,0 @@
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-
-#include <asm/machdep.h>
-#include <asm/io.h>
-
-#include <linux/timex.h>
-
-unsigned long m68k_get_rtc_time(void)
-{
-        unsigned int year, mon, day, hour, min, sec;
-
-        extern void arch_gettod(int *year, int *mon, int *day, int *hour,
-                                int *min, int *sec);
-
-        arch_gettod (&year, &mon, &day, &hour, &min, &sec);
-
-        if ((year += 1900) < 1970)
-                year += 100;
-
-        return mktime(year, mon, day, hour, min, sec);
-}
-
-int m68k_set_rtc_time(unsigned long nowtime)
-{
-  if (mach_set_clock_mmss)
-    return mach_set_clock_mmss (nowtime);
-  return -1;
-}
-
-void apus_heartbeat (void)
-{
-#ifdef CONFIG_HEARTBEAT
-        static unsigned cnt = 0, period = 0, dist = 0;
-
-        if (cnt == 0 || cnt == dist)
-                mach_heartbeat( 1 );
-        else if (cnt == 7 || cnt == dist+7)
-                mach_heartbeat( 0 );
-
-        if (++cnt > period) {
-                cnt = 0;
-                /* The hyperbolic function below modifies the heartbeat period
-                 * length in dependency of the current (5min) load. It goes
-                 * through the points f(0)=126, f(1)=86, f(5)=51,
-                 * f(inf)->30. */
-                period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
-                dist = period / 4;
-        }
-#endif
-        /* should be made smarter */
-        ppc_md.heartbeat_count = 1;
-}
diff --git a/arch/ppc/configs/apus_defconfig b/arch/ppc/configs/apus_defconfig
deleted file mode 100644
index e2245252d31f..000000000000
--- a/arch/ppc/configs/apus_defconfig
+++ /dev/null
@@ -1,920 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_8xx is not set
-
-#
-# IBM 4xx options
-#
-# CONFIG_8260 is not set
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PPC_STD_MMU=y
-CONFIG_SERIAL_CONSOLE=y
-# CONFIG_PPC_MULTIPLATFORM is not set
-CONFIG_APUS=y
-# CONFIG_WILLOW_2 is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_ALTIVEC is not set
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_PERMEDIA=y
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-CONFIG_PARPORT=m
-# CONFIG_PARPORT_PC is not set
-CONFIG_PARPORT_AMIGA=m
-# CONFIG_PARPORT_MFC3 is not set
-# CONFIG_PARPORT_OTHER is not set
-# CONFIG_PARPORT_1284 is not set
-CONFIG_PPC601_SYNC_FIX=y
-# CONFIG_CMDLINE_BOOL is not set
-CONFIG_AMIGA=y
-CONFIG_ZORRO=y
-CONFIG_ABSTRACT_CONSOLE=y
-CONFIG_APUS_FAST_EXCEPT=y
-CONFIG_AMIGA_PCMCIA=y
-CONFIG_AMIGA_BUILTIN_SERIAL=y
-CONFIG_GVPIOEXT=y
-CONFIG_GVPIOEXT_LP=m
-CONFIG_GVPIOEXT_PLIP=m
-CONFIG_MULTIFACE_III_TTY=y
-CONFIG_A2232=y
-CONFIG_WHIPPET_SERIAL=y
-CONFIG_APNE=y
-CONFIG_HEARTBEAT=y
-CONFIG_PROC_HARDWARE=y
-CONFIG_ZORRO_NAMES=y
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_AMIGA_FLOPPY=y
-CONFIG_AMIGA_Z2RAM=m
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=m
-CONFIG_MD_LINEAR=m
-CONFIG_MD_RAID0=m
-CONFIG_MD_RAID1=m
-CONFIG_MD_RAID5=m
-# CONFIG_MD_MULTIPATH is not set
-CONFIG_BLK_DEV_DM=m
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_IDEFLOPPY=y
-CONFIG_BLK_DEV_IDESCSI=m
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-CONFIG_BLK_DEV_GAYLE=y
-CONFIG_BLK_DEV_IDEDOUBLER=y
-CONFIG_BLK_DEV_BUDDHA=y
-
-#
-# SCSI support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=m
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_AM53C974 is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_GENERIC_NCR5380 is not set
-# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_PPA is not set
-# CONFIG_SCSI_IMM is not set
-# CONFIG_SCSI_NCR53C7xx is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_NCR53C8XX is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_U14_34F is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-CONFIG_A3000_SCSI=y
-CONFIG_A4000T_SCSI=y
-CONFIG_A2091_SCSI=y
-CONFIG_GVP11_SCSI=y
-CONFIG_CYBERSTORM_SCSI=y
-CONFIG_CYBERSTORMII_SCSI=y
-CONFIG_BLZ2060_SCSI=y
-CONFIG_BLZ1230_SCSI=y
-CONFIG_FASTLANE_SCSI=y
-CONFIG_A4091_SCSI=y
-CONFIG_WARPENGINE_SCSI=y
-CONFIG_BLZ603EPLUS_SCSI=y
-CONFIG_OKTAGON_SCSI=y
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=m
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=m
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_IP_NF_CONNTRACK=m
-CONFIG_IP_NF_FTP=m
-CONFIG_IP_NF_IRC=m
-CONFIG_IP_NF_TFTP=m
-CONFIG_IP_NF_AMANDA=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_LIMIT=m
-CONFIG_IP_NF_MATCH_MAC=m
-# CONFIG_IP_NF_MATCH_PKTTYPE is not set
-CONFIG_IP_NF_MATCH_MARK=m
-CONFIG_IP_NF_MATCH_MULTIPORT=m
-CONFIG_IP_NF_MATCH_TOS=m
-# CONFIG_IP_NF_MATCH_ECN is not set
-# CONFIG_IP_NF_MATCH_DSCP is not set
-# CONFIG_IP_NF_MATCH_AH_ESP is not set
-CONFIG_IP_NF_MATCH_LENGTH=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_MATCH_TCPMSS=m
-CONFIG_IP_NF_MATCH_HELPER=m
-CONFIG_IP_NF_MATCH_STATE=m
-CONFIG_IP_NF_MATCH_CONNTRACK=m
-CONFIG_IP_NF_MATCH_UNCLEAN=m
-CONFIG_IP_NF_MATCH_OWNER=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_MIRROR=m
-CONFIG_IP_NF_NAT=m
-CONFIG_IP_NF_NAT_NEEDED=y
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_NAT_SNMP_BASIC=m
-CONFIG_IP_NF_NAT_IRC=m
-CONFIG_IP_NF_NAT_FTP=m
-CONFIG_IP_NF_NAT_TFTP=m
-CONFIG_IP_NF_NAT_AMANDA=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_TOS=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_DSCP=m
-CONFIG_IP_NF_TARGET_MARK=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_TARGET_TCPMSS=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_COMPAT_IPCHAINS=m
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-CONFIG_TUN=m
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-CONFIG_ARIADNE=y
-# CONFIG_ZORRO8390 is not set
-CONFIG_A2065=y
-CONFIG_HYDRA=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PLIP=m
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_SYNC_TTY=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPPOE=y
-CONFIG_SLIP=y
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-CONFIG_FB=y
-# CONFIG_FB_CIRRUS is not set
-CONFIG_FB_PM2=y
-# CONFIG_FB_PM2_FIFO_DISCONNECT is not set
-# CONFIG_FB_PM2_PCI is not set
-CONFIG_FB_PM2_CVPPC=y
-CONFIG_FB_CYBER2000=y
-CONFIG_FB_AMIGA=y
-CONFIG_FB_AMIGA_OCS=y
-CONFIG_FB_AMIGA_ECS=y
-CONFIG_FB_AMIGA_AGA=y
-CONFIG_FB_CYBER=y
-CONFIG_FB_VIRGE=y
-CONFIG_FB_RETINAZ3=y
-CONFIG_FB_FM2=y
-# CONFIG_FB_CT65550 is not set
-# CONFIG_FB_IMSTT is not set
-# CONFIG_FB_S3TRIO is not set
-# CONFIG_FB_VGA16 is not set
-# CONFIG_FB_RIVA is not set
-# CONFIG_FB_MATROX is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_PM3 is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Logo configuration
-#
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=m
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-CONFIG_INPUT_JOYDEV=m
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=m
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PARKBD is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=m
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_KEYBOARD_AMIGA=m
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=m
-CONFIG_MOUSE_SERIAL=m
-CONFIG_MOUSE_AMIGA=m
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-CONFIG_INPUT_MISC=y
-# CONFIG_INPUT_PCSPKR is not set
-CONFIG_INPUT_UINPUT=m
-
-#
-# Macintosh device drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-CONFIG_PRINTER=m
-# CONFIG_LP_CONSOLE is not set
-# CONFIG_PPDEV is not set
-# CONFIG_TIPAR is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-CONFIG_BUSMOUSE=y
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-CONFIG_MINIX_FS=y
-CONFIG_ROMFS_FS=y
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-CONFIG_AFFS_FS=y
-CONFIG_HFS_FS=y
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=y
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-CONFIG_CODA_FS=m
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-CONFIG_AMIGA_PARTITION=y
-CONFIG_ATARI_PARTITION=y
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-# CONFIG_MINIX_SUBPARTITION is not set
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_UNIXWARE_DISKLABEL=y
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-# CONFIG_NLS_CODEPAGE_1250 is not set
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-CONFIG_DMASOUND_PAULA=m
-CONFIG_DMASOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
-# CONFIG_SND is not set
-
-#
-# Open Sound System
-#
-CONFIG_SOUND_PRIME=m
-# CONFIG_SOUND_BT878 is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_RME96XX is not set
-# CONFIG_SOUND_SONICVIBES is not set
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-CONFIG_SOUND_OSS=m
-CONFIG_SOUND_TRACEINIT=y
-CONFIG_SOUND_DMAP=y
-# CONFIG_SOUND_AD1816 is not set
-# CONFIG_SOUND_SGALAXY is not set
-# CONFIG_SOUND_ADLIB is not set
-# CONFIG_SOUND_ACI_MIXER is not set
-# CONFIG_SOUND_CS4232 is not set
-# CONFIG_SOUND_SSCAPE is not set
-# CONFIG_SOUND_GUS is not set
-CONFIG_SOUND_VMIDI=m
-# CONFIG_SOUND_TRIX is not set
-# CONFIG_SOUND_MSS is not set
-# CONFIG_SOUND_MPU401 is not set
-# CONFIG_SOUND_NM256 is not set
-# CONFIG_SOUND_MAD16 is not set
-# CONFIG_SOUND_PAS is not set
-# CONFIG_SOUND_PSS is not set
-# CONFIG_SOUND_SB is not set
-# CONFIG_SOUND_AWE32_SYNTH is not set
-# CONFIG_SOUND_WAVEFRONT is not set
-# CONFIG_SOUND_MAUI is not set
-# CONFIG_SOUND_YM3812 is not set
-# CONFIG_SOUND_OPL3SA1 is not set
-# CONFIG_SOUND_OPL3SA2 is not set
-# CONFIG_SOUND_YMFPCI is not set
-# CONFIG_SOUND_UART6850 is not set
-# CONFIG_SOUND_AEDSP16 is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index c7cb9d5f24a3..1b0ec7202dd5 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -32,10 +32,6 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 
-#ifdef CONFIG_APUS
-#include <asm/amigappc.h>
-#endif
-
 /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
 #define LOAD_BAT(n, reg, RA, RB)        \
         /* see the comment for clear_bats() -- Cort */ \
@@ -128,14 +124,6 @@ __start:
  */
         bl      early_init
 
-#ifdef CONFIG_APUS
-/* On APUS the __va/__pa constants need to be set to the correct
- * values before continuing.
- */
-        mr      r4,r30
-        bl      fix_mem_constants
-#endif /* CONFIG_APUS */
-
 /* Switch MMU off, clear BATs and flush TLB. At this point, r3 contains
  * the physical address we are running at, returned by early_init()
  */
@@ -145,7 +133,7 @@ __after_mmu_off:
         bl      flush_tlbs
 
         bl      initial_bats
-#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
+#ifdef CONFIG_BOOTX_TEXT
         bl      setup_disp_bat
 #endif
 
@@ -161,7 +149,6 @@ __after_mmu_off:
 #endif /* CONFIG_6xx */
 
 
-#ifndef CONFIG_APUS
 /*
  * We need to run with _start at physical address 0.
  * If the MMU is already turned on, we copy stuff to KERNELBASE,
@@ -172,7 +159,7 @@ __after_mmu_off:
         addis   r4,r3,KERNELBASE@h      /* current address of _start */
         cmpwi   0,r4,0                  /* are we already running at 0? */
         bne     relocate_kernel
-#endif /* CONFIG_APUS */
+
 /*
  * we now have the 1st 16M of ram mapped with the bats.
  * prep needs the mmu to be turned on here, but pmac already has it on.
@@ -812,85 +799,6 @@ copy_and_flush:
         addi    r6,r6,4
         blr
 
-#ifdef CONFIG_APUS
-/*
- * On APUS the physical base address of the kernel is not known at compile
- * time, which means the __pa/__va constants used are incorrect. In the
- * __init section is recorded the virtual addresses of instructions using
- * these constants, so all that has to be done is fix these before
- * continuing the kernel boot.
- *
- * r4 = The physical address of the kernel base.
- */
-fix_mem_constants:
-        mr      r10,r4
-        addis   r10,r10,-KERNELBASE@h    /* virt_to_phys constant */
-        neg     r11,r10                  /* phys_to_virt constant */
-
-        lis     r12,__vtop_table_begin@h
-        ori     r12,r12,__vtop_table_begin@l
-        add     r12,r12,r10              /* table begin phys address */
-        lis     r13,__vtop_table_end@h
-        ori     r13,r13,__vtop_table_end@l
-        add     r13,r13,r10              /* table end phys address */
-        subi    r12,r12,4
-        subi    r13,r13,4
-1:      lwzu    r14,4(r12)               /* virt address of instruction */
-        add     r14,r14,r10              /* phys address of instruction */
-        lwz     r15,0(r14)               /* instruction, now insert top */
-        rlwimi  r15,r10,16,16,31         /* half of vp const in low half */
-        stw     r15,0(r14)               /* of instruction and restore. */
-        dcbst   r0,r14                   /* write it to memory */
-        sync
-        icbi    r0,r14                   /* flush the icache line */
-        cmpw    r12,r13
-        bne     1b
-        sync                            /* additional sync needed on g4 */
-        isync
-
-/*
- * Map the memory where the exception handlers will
- * be copied to when hash constants have been patched.
- */
-#ifdef CONFIG_APUS_FAST_EXCEPT
-        lis     r8,0xfff0
-#else
-        lis     r8,0
-#endif
-        ori     r8,r8,0x2               /* 128KB, supervisor */
-        mtspr   SPRN_DBAT3U,r8
-        mtspr   SPRN_DBAT3L,r8
-
-        lis     r12,__ptov_table_begin@h
-        ori     r12,r12,__ptov_table_begin@l
-        add     r12,r12,r10              /* table begin phys address */
-        lis     r13,__ptov_table_end@h
-        ori     r13,r13,__ptov_table_end@l
-        add     r13,r13,r10              /* table end phys address */
-        subi    r12,r12,4
-        subi    r13,r13,4
-1:      lwzu    r14,4(r12)               /* virt address of instruction */
-        add     r14,r14,r10              /* phys address of instruction */
-        lwz     r15,0(r14)               /* instruction, now insert top */
-        rlwimi  r15,r11,16,16,31         /* half of pv const in low half*/
-        stw     r15,0(r14)               /* of instruction and restore. */
-        dcbst   r0,r14                   /* write it to memory */
-        sync
-        icbi    r0,r14                   /* flush the icache line */
-        cmpw    r12,r13
-        bne     1b
-
-        sync                            /* additional sync needed on g4 */
-        isync                           /* No speculative loading until now */
-        blr
-
-/***********************************************************************
- *  Please note that on APUS the exception handlers are located at the
- *  physical address 0xfff0000. For this reason, the exception handlers
- *  cannot use relative branches to access the code below.
- ***********************************************************************/
-#endif /* CONFIG_APUS */
-
 #ifdef CONFIG_SMP
         .globl  __secondary_start_pmac_0
 __secondary_start_pmac_0:
@@ -1043,19 +951,6 @@ start_here:
         bl      machine_init
         bl      MMU_init
 
-#ifdef CONFIG_APUS
-        /* Copy exception code to exception vector base on APUS. */
-        lis     r4,KERNELBASE@h
-#ifdef CONFIG_APUS_FAST_EXCEPT
-        lis     r3,0xfff0               /* Copy to 0xfff00000 */
-#else
-        lis     r3,0                    /* Copy to 0x00000000 */
-#endif
-        li      r5,0x4000               /* # bytes of memory to copy */
-        li      r6,0
-        bl      copy_and_flush          /* copy the first 0x4000 bytes */
-#endif  /* CONFIG_APUS */
-
 /*
  * Go back to running unmapped so we can load up new values
  * for SDR1 (hash table pointer) and the segment registers
@@ -1232,11 +1127,7 @@ initial_bats:
 #else
         ori     r8,r8,2                 /* R/W access */
 #endif /* CONFIG_SMP */
-#ifdef CONFIG_APUS
-        ori     r11,r11,BL_8M<<2|0x2    /* set up 8MB BAT registers for 604 */
-#else
         ori     r11,r11,BL_256M<<2|0x2  /* set up BAT registers for 604 */
-#endif /* CONFIG_APUS */
 
         mtspr   SPRN_DBAT0L,r8          /* N.B. 6xx (not 601) have valid */
         mtspr   SPRN_DBAT0U,r11         /* bit in upper BAT register */
@@ -1245,7 +1136,7 @@ initial_bats:
         isync
         blr
 
-#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
+#ifdef CONFIG_BOOTX_TEXT
 setup_disp_bat:
         /*
          * setup the display bat prepared for us in prom.c
@@ -1268,7 +1159,7 @@ setup_disp_bat:
         mtspr   SPRN_IBAT3U,r11
         blr
 
-#endif /* !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) */
+#endif /* defined(CONFIG_BOOTX_TEXT) */
 
 #ifdef CONFIG_8260
 /* Jump into the system reset for the rom.
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 63f0a987139b..22494ec123ea 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -60,8 +60,6 @@ long long __ashrdi3(long long, int);
 long long __ashldi3(long long, int);
 long long __lshrdi3(long long, int);
 
-extern unsigned long mm_ptov (unsigned long paddr);
-
 EXPORT_SYMBOL(clear_pages);
 EXPORT_SYMBOL(clear_user_page);
 EXPORT_SYMBOL(transfer_to_handler);
@@ -118,7 +116,6 @@ EXPORT_SYMBOL(_outsw_ns);
 EXPORT_SYMBOL(_insl_ns);
 EXPORT_SYMBOL(_outsl_ns);
 EXPORT_SYMBOL(iopa);
-EXPORT_SYMBOL(mm_ptov);
 EXPORT_SYMBOL(ioremap);
 #ifdef CONFIG_44x
 EXPORT_SYMBOL(ioremap64);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 967c1ef59a6b..aac88c2f3db9 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -25,7 +25,6 @@
 #include <asm/pgtable.h>
 #include <asm/bootinfo.h>
 #include <asm/setup.h>
-#include <asm/amigappc.h>
 #include <asm/smp.h>
 #include <asm/elf.h>
 #include <asm/cputable.h>
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S
index c0aac3ff9e91..98c1212674f6 100644
--- a/arch/ppc/kernel/vmlinux.lds.S
+++ b/arch/ppc/kernel/vmlinux.lds.S
@@ -91,6 +91,8 @@ SECTIONS
   . = ALIGN(8192);
   .data.init_task : { *(.data.init_task) }
 
+  NOTES
+
   . = ALIGN(4096);
   __init_begin = .;
   .init.text : {
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
index 35ebb6395ae3..1f51e6c94507 100644
--- a/arch/ppc/mm/pgtable.c
+++ b/arch/ppc/mm/pgtable.c
@@ -426,41 +426,3 @@ unsigned long iopa(unsigned long addr)
         return(pa);
 }
 
-/* This is will find the virtual address for a physical one....
- * Swiped from APUS, could be dangerous :-).
- * This is only a placeholder until I really find a way to make this
- * work.  -- Dan
- */
-unsigned long
-mm_ptov (unsigned long paddr)
-{
-        unsigned long ret;
-#if 0
-        if (paddr < 16*1024*1024)
-                ret = ZTWO_VADDR(paddr);
-        else {
-                int i;
-
-                for (i = 0; i < kmap_chunk_count;){
-                        unsigned long phys = kmap_chunks[i++];
-                        unsigned long size = kmap_chunks[i++];
-                        unsigned long virt = kmap_chunks[i++];
-                        if (paddr >= phys
-                            && paddr < (phys + size)){
-                                ret = virt + paddr - phys;
-                                goto exit;
-                        }
-                }
-        
-                ret = (unsigned long) __va(paddr);
-        }
-exit:
-#ifdef DEBUGPV
-        printk ("PTOV(%lx)=%lx\n", paddr, ret);
-#endif
-#else
-        ret = (unsigned long)paddr + KERNELBASE;
-#endif
-        return ret;
-}
-
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index e17fad470621..40f53fbe6d35 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -2,10 +2,6 @@
 # Makefile for the linux kernel.
 #
 
-obj-$(CONFIG_APUS)              += apus_setup.o
-ifeq ($(CONFIG_APUS),y)
-obj-$(CONFIG_PCI)               += apus_pci.o
-endif
 obj-$(CONFIG_PPC_PREP)          += prep_pci.o prep_setup.o
 obj-$(CONFIG_PREP_RESIDUAL)     += residual.o
 obj-$(CONFIG_PQ2ADS)            += pq2ads.o
diff --git a/arch/ppc/platforms/apus_pci.c b/arch/ppc/platforms/apus_pci.c
deleted file mode 100644
index dc165f0c8908..000000000000
--- a/arch/ppc/platforms/apus_pci.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * Copyright (C) Michel Dänzer <michdaen@iiic.ethz.ch>
- *
- * APUS PCI routines.
- *
- * Currently, only B/CVisionPPC cards (Permedia2) are supported.
- *
- * Thanks to Geert Uytterhoeven for the idea:
- * Read values from given config space(s) for the first devices, -1 otherwise
- *
- */
-
-#ifdef CONFIG_AMIGA
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-
-#include "apus_pci.h"
-
-
-/* These definitions are mostly adapted from pm2fb.c */
-
-#undef APUS_PCI_MASTER_DEBUG
-#ifdef APUS_PCI_MASTER_DEBUG
-#define DPRINTK(a,b...) printk(KERN_DEBUG "apus_pci: %s: " a, __FUNCTION__ , ## b)
-#else
-#define DPRINTK(a,b...)
-#endif
-
-/*
- * The _DEFINITIVE_ memory mapping/unmapping functions.
- * This is due to the fact that they're changing soooo often...
- */
-#define DEFW()          wmb()
-#define DEFR()          rmb()
-#define DEFRW()         mb()
-
-#define DEVNO(d)        ((d)>>3)
-#define FNNO(d)         ((d)&7)
-
-
-extern unsigned long powerup_PCI_present;
-
-static struct pci_controller *apus_hose;
-
-
-void *pci_io_base(unsigned int bus)
-{
-        return 0;
-}
-
-
-int
-apus_pcibios_read_config(struct pci_bus *bus, int devfn, int offset,
-                         int len, u32 *val)
-{
-        int fnno = FNNO(devfn);
-        int devno = DEVNO(devfn);
-        volatile unsigned char *cfg_data;
-
-        if (bus->number > 0 || devno != 1) {
-                *val = ~0;
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        }
-        /* base address + function offset + offset ^ endianness conversion */
-        /* XXX the fnno<<5 bit seems wacky  -- paulus */
-        cfg_data = apus_hose->cfg_data + (fnno<<5) + (offset ^ (len - 1));
-        switch (len) {
-        case 1:
-                *val = readb(cfg_data);
-                break;
-        case 2:
-                *val = readw(cfg_data);
-                break;
-        default:
-                *val = readl(cfg_data);
-                break;
-        }
-
-        DPRINTK("read b: 0x%x, d: 0x%x, f: 0x%x, o: 0x%x, l: %d, v: 0x%x\n",
-                bus->number, devfn>>3, devfn&7, offset, len, *val);
-        return PCIBIOS_SUCCESSFUL;
-}
-
-int
-apus_pcibios_write_config(struct pci_bus *bus, int devfn, int offset,
-                          int len, u32 *val)
-{
-        int fnno = FNNO(devfn);
-        int devno = DEVNO(devfn);
-        volatile unsigned char *cfg_data;
-
-        if (bus->number > 0 || devno != 1) {
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        }
-        /* base address + function offset + offset ^ endianness conversion */
-        /* XXX the fnno<<5 bit seems wacky  -- paulus */
-        cfg_data = apus_hose->cfg_data + (fnno<<5) + (offset ^ (len - 1));
-        switch (len) {
-        case 1:
-                writeb(val, cfg_data); DEFW();
-                break;
-        case 2:
-                writew(val, cfg_data); DEFW();
-                break;
-        default:
-                writel(val, cfg_data); DEFW();
-                break;
-        }
-
-        DPRINTK("write b: 0x%x, d: 0x%x, f: 0x%x, o: 0x%x, l: %d, v: 0x%x\n",
-                bus->number, devfn>>3, devfn&7, offset, len, val);
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops apus_pci_ops = {
-        apus_pcibios_read_config,
-        apus_pcibios_write_config
-};
-
-static struct resource pci_mem = { "B/CVisionPPC PCI mem", CVPPC_FB_APERTURE_ONE, CVPPC_PCI_CONFIG, IORESOURCE_MEM };
-
-void __init
-apus_pcibios_fixup(void)
-{
-/*      struct pci_dev *dev = pci_find_slot(0, 1<<3);
-        unsigned int reg, val, offset;*/
-
-        /* FIXME: interrupt? */
-        /*dev->interrupt = xxx;*/
-
-        request_resource(&iomem_resource, &pci_mem);
-        printk("%s: PCI mem resource requested\n", __FUNCTION__);
-}
-
-static void __init apus_pcibios_fixup_bus(struct pci_bus *bus)
-{
-        bus->resource[1] = &pci_mem;
-}
-
-
-/*
- * This is from pm2fb.c again
- *
- * Check if PCI (B/CVisionPPC) is available, initialize it and set up
- * the pcibios_* pointers
- */
-
-
-void __init
-apus_setup_pci_ptrs(void)
-{
-        if (!powerup_PCI_present) {
-                DPRINTK("no PCI bridge detected\n");
-                return;
-        }
-        DPRINTK("Phase5 B/CVisionPPC PCI bridge detected.\n");
-
-        apus_hose = pcibios_alloc_controller();
-        if (!apus_hose) {
-                printk("apus_pci: Can't allocate PCI controller structure\n");
-                return;
-        }
-
-        if (!(apus_hose->cfg_data = ioremap(CVPPC_PCI_CONFIG, 256))) {
-                printk("apus_pci: unable to map PCI config region\n");
-                return;
-        }
-
-        if (!(apus_hose->cfg_addr = ioremap(CSPPC_PCI_BRIDGE, 256))) {
-                printk("apus_pci: unable to map PCI bridge\n");
-                return;
-        }
-
-        writel(CSPPCF_BRIDGE_BIG_ENDIAN, apus_hose->cfg_addr + CSPPC_BRIDGE_ENDIAN);
-        DEFW();
-
-        writel(CVPPC_REGS_REGION,  apus_hose->cfg_data+ PCI_BASE_ADDRESS_0);
-        DEFW();
-        writel(CVPPC_FB_APERTURE_ONE, apus_hose->cfg_data + PCI_BASE_ADDRESS_1);
-        DEFW();
-        writel(CVPPC_FB_APERTURE_TWO, apus_hose->cfg_data + PCI_BASE_ADDRESS_2);
-        DEFW();
-        writel(CVPPC_ROM_ADDRESS, apus_hose->cfg_data + PCI_ROM_ADDRESS);
-        DEFW();
-
-        writel(0xef000000 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
-                PCI_COMMAND_MASTER, apus_hose->cfg_data + PCI_COMMAND);
-        DEFW();
-
-        apus_hose->first_busno = 0;
-        apus_hose->last_busno = 0;
-        apus_hose->ops = &apus_pci_ops;
-        ppc_md.pcibios_fixup = apus_pcibios_fixup;
-        ppc_md.pcibios_fixup_bus = apus_pcibios_fixup_bus;
-
-        return;
-}
-
-#endif /* CONFIG_AMIGA */
diff --git a/arch/ppc/platforms/apus_pci.h b/arch/ppc/platforms/apus_pci.h
deleted file mode 100644
index f15974ae0189..000000000000
--- a/arch/ppc/platforms/apus_pci.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Phase5 CybervisionPPC (TVP4020) definitions for the Permedia2 framebuffer
- * driver.
- *
- * Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
- * --------------------------------------------------------------------------
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file README.legal in the main directory of this archive
- * for more details.
- */
-
-#ifndef APUS_PCI_H
-#define APUS_PCI_H
-
-
-#define CSPPC_PCI_BRIDGE                0xfffe0000
-#define CSPPC_BRIDGE_ENDIAN             0x0000
-#define CSPPC_BRIDGE_INT                0x0010
-
-#define CVPPC_PCI_CONFIG                0xfffc0000
-#define CVPPC_ROM_ADDRESS               0xe2000001
-#define CVPPC_REGS_REGION               0xef000000
-#define CVPPC_FB_APERTURE_ONE           0xe0000000
-#define CVPPC_FB_APERTURE_TWO           0xe1000000
-#define CVPPC_FB_SIZE                   0x00800000
-
-/* CVPPC_BRIDGE_ENDIAN */
-#define CSPPCF_BRIDGE_BIG_ENDIAN        0x02
-
-/* CVPPC_BRIDGE_INT */
-#define CSPPCF_BRIDGE_ACTIVE_INT2       0x01
-
-
-#endif  /* APUS_PCI_H */
diff --git a/arch/ppc/platforms/apus_setup.c b/arch/ppc/platforms/apus_setup.c
deleted file mode 100644
index 063274d2c503..000000000000
--- a/arch/ppc/platforms/apus_setup.c
+++ /dev/null
@@ -1,798 +0,0 @@
-/*
- *  Copyright (C) 1998, 1999  Jesper Skov
- *
- *  Basically what is needed to replace functionality found in
- *  arch/m68k allowing Amiga drivers to work under APUS.
- *  Bits of code and/or ideas from arch/m68k and arch/ppc files.
- *
- * TODO:
- *  This file needs a *really* good cleanup. Restructure and optimize.
- *  Make sure it can be compiled for non-APUS configs. Begin to move
- *  Amiga specific stuff into mach/amiga.
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-
-/* Needs INITSERIAL call in head.S! */
-#undef APUS_DEBUG
-
-#include <asm/bootinfo.h>
-#include <asm/setup.h>
-#include <asm/amigahw.h>
-#include <asm/amigaints.h>
-#include <asm/amigappc.h>
-#include <asm/pgtable.h>
-#include <asm/dma.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-
-unsigned long m68k_machtype;
-char debug_device[6] = "";
-
-extern void amiga_init_IRQ(void);
-
-extern void apus_setup_pci_ptrs(void);
-
-void (*mach_sched_init) (void (*handler)(int, void *, struct pt_regs *)) __initdata = NULL;
-/* machine dependent irq functions */
-void (*mach_init_IRQ) (void) __initdata = NULL;
-void (*(*mach_default_handler)[]) (int, void *, struct pt_regs *) = NULL;
-void (*mach_get_model) (char *model) = NULL;
-int (*mach_get_hardware_list) (char *buffer) = NULL;
-int (*mach_get_irq_list) (struct seq_file *, void *) = NULL;
-void (*mach_process_int) (int, struct pt_regs *) = NULL;
-/* machine dependent timer functions */
-unsigned long (*mach_gettimeoffset) (void);
-void (*mach_gettod) (int*, int*, int*, int*, int*, int*);
-int (*mach_hwclk) (int, struct hwclk_time*) = NULL;
-int (*mach_set_clock_mmss) (unsigned long) = NULL;
-void (*mach_reset)( void );
-long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
-#ifdef CONFIG_HEARTBEAT
-void (*mach_heartbeat) (int) = NULL;
-extern void apus_heartbeat (void);
-#endif
-
-extern unsigned long amiga_model;
-extern unsigned decrementer_count;/* count value for 1e6/HZ microseconds */
-extern unsigned count_period_num; /* 1 decrementer count equals */
-extern unsigned count_period_den; /* count_period_num / count_period_den us */
-
-int num_memory = 0;
-struct mem_info memory[NUM_MEMINFO];/* memory description */
-/* FIXME: Duplicate memory data to avoid conflicts with m68k shared code. */
-int m68k_realnum_memory = 0;
-struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
-
-struct mem_info ramdisk;
-
-extern void config_amiga(void);
-
-static int __60nsram = 0;
-
-/* for cpuinfo */
-static int __bus_speed = 0;
-static int __speed_test_failed = 0;
-
-/********************************************** COMPILE PROTECTION */
-/* Provide some stubs that links to Amiga specific functions.
- * This allows CONFIG_APUS to be removed from generic PPC files while
- * preventing link errors for other PPC targets.
- */
-unsigned long apus_get_rtc_time(void)
-{
-#ifdef CONFIG_APUS
-        extern unsigned long m68k_get_rtc_time(void);
-
-        return m68k_get_rtc_time ();
-#else
-        return 0;
-#endif
-}
-
-int apus_set_rtc_time(unsigned long nowtime)
-{
-#ifdef CONFIG_APUS
-        extern int m68k_set_rtc_time(unsigned long nowtime);
-
-        return m68k_set_rtc_time (nowtime);
-#else
-        return 0;
-#endif
-}
-
-/*********************************************************** SETUP */
-/* From arch/m68k/kernel/setup.c. */
-void __init apus_setup_arch(void)
-{
-#ifdef CONFIG_APUS
-        extern char cmd_line[];
-        int i;
-        char *p, *q;
-
-        /* Let m68k-shared code know it should do the Amiga thing. */
-        m68k_machtype = MACH_AMIGA;
-
-        /* Parse the command line for arch-specific options.
-         * For the m68k, this is currently only "debug=xxx" to enable printing
-         * certain kernel messages to some machine-specific device.  */
-        for( p = cmd_line; p && *p; ) {
-            i = 0;
-            if (!strncmp( p, "debug=", 6 )) {
-                    strlcpy( debug_device, p+6, sizeof(debug_device) );
-                    if ((q = strchr( debug_device, ' ' ))) *q = 0;
-                    i = 1;
-            } else if (!strncmp( p, "60nsram", 7 )) {
-                    APUS_WRITE (APUS_REG_WAITSTATE,
-                                REGWAITSTATE_SETRESET
-                                |REGWAITSTATE_PPCR
-                                |REGWAITSTATE_PPCW);
-                    __60nsram = 1;
-                    i = 1;
-            }
-
-            if (i) {
-                /* option processed, delete it */
-                if ((q = strchr( p, ' ' )))
-                    strcpy( p, q+1 );
-                else
-                    *p = 0;
-            } else {
-                if ((p = strchr( p, ' ' ))) ++p;
-            }
-        }
-
-        config_amiga();
-
-#if 0 /* Enable for logging - also include logging.o in Makefile rule */
-        {
-#define LOG_SIZE 4096
-                void* base;
-
-                /* Throw away some memory - the P5 firmare stomps on top
-                 * of CHIP memory during bootup.
-                 */
-                amiga_chip_alloc(0x1000);
-
-                base = amiga_chip_alloc(LOG_SIZE+sizeof(klog_data_t));
-                LOG_INIT(base, base+sizeof(klog_data_t), LOG_SIZE);
-        }
-#endif
-#endif
-}
-
-int
-apus_show_cpuinfo(struct seq_file *m)
-{
-        extern int __map_without_bats;
-        extern unsigned long powerup_PCI_present;
-
-        seq_printf(m, "machine\t\t: Amiga\n");
-        seq_printf(m, "bus speed\t: %d%s", __bus_speed,
-                   (__speed_test_failed) ? " [failed]\n" : "\n");
-        seq_printf(m, "using BATs\t: %s\n",
-                   (__map_without_bats) ? "No" : "Yes");
-        seq_printf(m, "ram speed\t: %dns\n", (__60nsram) ? 60 : 70);
-        seq_printf(m, "PCI bridge\t: %s\n",
-                   (powerup_PCI_present) ? "Yes" : "No");
-        return 0;
-}
-
-static void get_current_tb(unsigned long long *time)
-{
-        __asm __volatile ("1:mftbu 4      \n\t"
-                          "  mftb  5      \n\t"
-                          "  mftbu 6      \n\t"
-                          "  cmpw  4,6    \n\t"
-                          "  bne   1b     \n\t"
-                          "  stw   4,0(%0)\n\t"
-                          "  stw   5,4(%0)\n\t"
-                          :
-                          : "r" (time)
-                          : "r4", "r5", "r6");
-}
-
-
-void apus_calibrate_decr(void)
-{
-#ifdef CONFIG_APUS
-        unsigned long freq;
-
-        /* This algorithm for determining the bus speed was
-           contributed by Ralph Schmidt. */
-        unsigned long long start, stop;
-        int bus_speed;
-        int speed_test_failed = 0;
-
-        {
-                unsigned long loop = amiga_eclock / 10;
-
-                get_current_tb (&start);
-                while (loop--) {
-                        unsigned char tmp;
-
-                        tmp = ciaa.pra;
-                }
-                get_current_tb (&stop);
-        }
-
-        bus_speed = (((unsigned long)(stop-start))*10*4) / 1000000;
-        if (AMI_1200 == amiga_model)
-                bus_speed /= 2;
-
-        if ((bus_speed >= 47) && (bus_speed < 53)) {
-                bus_speed = 50;
-                freq = 12500000;
-        } else if ((bus_speed >= 57) && (bus_speed < 63)) {
-                bus_speed = 60;
-                freq = 15000000;
-        } else if ((bus_speed >= 63) && (bus_speed < 69)) {
-                bus_speed = 67;
-                freq = 16666667;
-        } else {
-                printk ("APUS: Unable to determine bus speed (%d). "
-                        "Defaulting to 50MHz", bus_speed);
-                bus_speed = 50;
-                freq = 12500000;
-                speed_test_failed = 1;
-        }
-
-        /* Ease diagnostics... */
-        {
-                extern int __map_without_bats;
-                extern unsigned long powerup_PCI_present;
-
-                printk ("APUS: BATs=%d, BUS=%dMHz",
-                        (__map_without_bats) ? 0 : 1,
-                        bus_speed);
-                if (speed_test_failed)
-                        printk ("[FAILED - please report]");
-
-                printk (", RAM=%dns, PCI bridge=%d\n",
-                        (__60nsram) ? 60 : 70,
-                        (powerup_PCI_present) ? 1 : 0);
-
-                /* print a bit more if asked politely... */
-                if (!(ciaa.pra & 0x40)){
-                        extern unsigned int bat_addrs[4][3];
-                        int b;
-                        for (b = 0; b < 4; ++b) {
-                                printk ("APUS: BAT%d ", b);
-                                printk ("%08x-%08x -> %08x\n",
-                                        bat_addrs[b][0],
-                                        bat_addrs[b][1],
-                                        bat_addrs[b][2]);
-                        }
-                }
-
-        }
-
-        printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
-               freq/1000000, freq%1000000);
-        tb_ticks_per_jiffy = freq / HZ;
-        tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
-        __bus_speed = bus_speed;
-        __speed_test_failed = speed_test_failed;
-#endif
-}
-
-void arch_gettod(int *year, int *mon, int *day, int *hour,
-                 int *min, int *sec)
-{
-#ifdef CONFIG_APUS
-        if (mach_gettod)
-                mach_gettod(year, mon, day, hour, min, sec);
-        else
-                *year = *mon = *day = *hour = *min = *sec = 0;
-#endif
-}
-
-/* for "kbd-reset" cmdline param */
-__init
-void kbd_reset_setup(char *str, int *ints)
-{
-}
-
-/*********************************************************** MEMORY */
-#define KMAP_MAX 32
-unsigned long kmap_chunks[KMAP_MAX*3];
-int kmap_chunk_count = 0;
-
-/* From pgtable.h */
-static __inline__ pte_t *my_find_pte(struct mm_struct *mm,unsigned long va)
-{
-        pgd_t *dir = 0;
-        pmd_t *pmd = 0;
-        pte_t *pte = 0;
-
-        va &= PAGE_MASK;
-
-        dir = pgd_offset( mm, va );
-        if (dir)
-        {
-                pmd = pmd_offset(dir, va & PAGE_MASK);
-                if (pmd && pmd_present(*pmd))
-                {
-                        pte = pte_offset(pmd, va);
-                }
-        }
-        return pte;
-}
-
-
-/* Again simulating an m68k/mm/kmap.c function. */
-void kernel_set_cachemode( unsigned long address, unsigned long size,
-                           unsigned int cmode )
-{
-        unsigned long mask, flags;
-
-        switch (cmode)
-        {
-        case IOMAP_FULL_CACHING:
-                mask = ~(_PAGE_NO_CACHE | _PAGE_GUARDED);
-                flags = 0;
-                break;
-        case IOMAP_NOCACHE_SER:
-                mask = ~0;
-                flags = (_PAGE_NO_CACHE | _PAGE_GUARDED);
-                break;
-        default:
-                panic ("kernel_set_cachemode() doesn't support mode %d\n",
-                       cmode);
-                break;
-        }
-
-        size /= PAGE_SIZE;
-        address &= PAGE_MASK;
-        while (size--)
-        {
-                pte_t *pte;
-
-                pte = my_find_pte(&init_mm, address);
-                if ( !pte )
-                {
-                        printk("pte NULL in kernel_set_cachemode()\n");
-                        return;
-                }
-
-                pte_val (*pte) &= mask;
-                pte_val (*pte) |= flags;
-                flush_tlb_page(find_vma(&init_mm,address),address);
-
-                address += PAGE_SIZE;
-        }
-}
-
-unsigned long mm_ptov (unsigned long paddr)
-{
-        unsigned long ret;
-        if (paddr < 16*1024*1024)
-                ret = ZTWO_VADDR(paddr);
-        else {
-                int i;
-
-                for (i = 0; i < kmap_chunk_count;){
-                        unsigned long phys = kmap_chunks[i++];
-                        unsigned long size = kmap_chunks[i++];
-                        unsigned long virt = kmap_chunks[i++];
-                        if (paddr >= phys
-                            && paddr < (phys + size)){
-                                ret = virt + paddr - phys;
-                                goto exit;
-                        }
-                }
-
-                ret = (unsigned long) __va(paddr);
-        }
-exit:
-#ifdef DEBUGPV
-        printk ("PTOV(%lx)=%lx\n", paddr, ret);
-#endif
-        return ret;
-}
-
-int mm_end_of_chunk (unsigned long addr, int len)
-{
-        if (memory[0].addr + memory[0].size == addr + len)
-                return 1;
-        return 0;
-}
-
-/*********************************************************** CACHE */
-
-#define L1_CACHE_BYTES 32
-#define MAX_CACHE_SIZE 8192
-void cache_push(__u32 addr, int length)
-{
-        addr = mm_ptov(addr);
-
-        if (MAX_CACHE_SIZE < length)
-                length = MAX_CACHE_SIZE;
-
-        while(length > 0){
-                __asm ("dcbf 0,%0\n\t"
-                       : : "r" (addr));
-                addr += L1_CACHE_BYTES;
-                length -= L1_CACHE_BYTES;
-        }
-        /* Also flush trailing block */
-        __asm ("dcbf 0,%0\n\t"
-               "sync \n\t"
-               : : "r" (addr));
-}
-
-void cache_clear(__u32 addr, int length)
-{
-        if (MAX_CACHE_SIZE < length)
-                length = MAX_CACHE_SIZE;
-
-        addr = mm_ptov(addr);
-
-        __asm ("dcbf 0,%0\n\t"
-               "sync \n\t"
-               "icbi 0,%0 \n\t"
-               "isync \n\t"
-               : : "r" (addr));
-
-        addr += L1_CACHE_BYTES;
-        length -= L1_CACHE_BYTES;
-
-        while(length > 0){
-                __asm ("dcbf 0,%0\n\t"
-                       "sync \n\t"
-                       "icbi 0,%0 \n\t"
-                       "isync \n\t"
-                       : : "r" (addr));
-                addr += L1_CACHE_BYTES;
-                length -= L1_CACHE_BYTES;
-        }
-
-        __asm ("dcbf 0,%0\n\t"
-               "sync \n\t"
-               "icbi 0,%0 \n\t"
-               "isync \n\t"
-               : : "r" (addr));
-}
-
-/****************************************************** from setup.c */
-void
-apus_restart(char *cmd)
-{
-        local_irq_disable();
-
-        APUS_WRITE(APUS_REG_LOCK,
-                   REGLOCK_BLACKMAGICK1|REGLOCK_BLACKMAGICK2);
-        APUS_WRITE(APUS_REG_LOCK,
-                   REGLOCK_BLACKMAGICK1|REGLOCK_BLACKMAGICK3);
-        APUS_WRITE(APUS_REG_LOCK,
-                   REGLOCK_BLACKMAGICK2|REGLOCK_BLACKMAGICK3);
-        APUS_WRITE(APUS_REG_SHADOW, REGSHADOW_SELFRESET);
-        APUS_WRITE(APUS_REG_RESET, REGRESET_AMIGARESET);
-        for(;;);
-}
-
-void
-apus_power_off(void)
-{
-        for (;;);
-}
-
-void
-apus_halt(void)
-{
-   apus_restart(NULL);
-}
-
-/****************************************************** IRQ stuff */
-
-static unsigned char last_ipl[8];
-
-int apus_get_irq(void)
-{
-        unsigned char ipl_emu, mask;
-        unsigned int level;
-
-        APUS_READ(APUS_IPL_EMU, ipl_emu);
-        level = (ipl_emu >> 3) & IPLEMU_IPLMASK;
-        mask = IPLEMU_SETRESET|IPLEMU_DISABLEINT|level;
-        level ^= 7;
-
-        /* Save previous IPL value */
-        if (last_ipl[level])
-                return -2;
-        last_ipl[level] = ipl_emu;
-
-        /* Set to current IPL value */
-        APUS_WRITE(APUS_IPL_EMU, mask);
-        APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT|level);
-
-
-#ifdef __INTERRUPT_DEBUG
-        printk("<%d:%d>", level, ~ipl_emu & IPLEMU_IPLMASK);
-#endif
-        return level + IRQ_AMIGA_AUTO;
-}
-
-void apus_end_irq(unsigned int irq)
-{
-        unsigned char ipl_emu;
-        unsigned int level = irq - IRQ_AMIGA_AUTO;
-#ifdef __INTERRUPT_DEBUG
-        printk("{%d}", ~last_ipl[level] & IPLEMU_IPLMASK);
-#endif
-        /* Restore IPL to the previous value */
-        ipl_emu = last_ipl[level] & IPLEMU_IPLMASK;
-        APUS_WRITE(APUS_IPL_EMU, IPLEMU_SETRESET|IPLEMU_DISABLEINT|ipl_emu);
-        last_ipl[level] = 0;
-        ipl_emu ^= 7;
-        APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT|ipl_emu);
-}
-
-/****************************************************** debugging */
-
-/* some serial hardware definitions */
-#define SDR_OVRUN   (1<<15)
-#define SDR_RBF     (1<<14)
-#define SDR_TBE     (1<<13)
-#define SDR_TSRE    (1<<12)
-
-#define AC_SETCLR   (1<<15)
-#define AC_UARTBRK  (1<<11)
-
-#define SER_DTR     (1<<7)
-#define SER_RTS     (1<<6)
-#define SER_DCD     (1<<5)
-#define SER_CTS     (1<<4)
-#define SER_DSR     (1<<3)
-
-static __inline__ void ser_RTSon(void)
-{
-    ciab.pra &= ~SER_RTS; /* active low */
-}
-
-int __debug_ser_out( unsigned char c )
-{
-        amiga_custom.serdat = c | 0x100;
-        mb();
-        while (!(amiga_custom.serdatr & 0x2000))
-                barrier();
-        return 1;
-}
-
-unsigned char __debug_ser_in( void )
-{
-        unsigned char c;
-
-        /* XXX: is that ok?? derived from amiga_ser.c... */
-        while( !(amiga_custom.intreqr & IF_RBF) )
-                barrier();
-        c = amiga_custom.serdatr;
-        /* clear the interrupt, so that another character can be read */
-        amiga_custom.intreq = IF_RBF;
-        return c;
-}
-
-int __debug_serinit( void )
-{
-        unsigned long flags;
-
-        local_irq_save(flags);
-
-        /* turn off Rx and Tx interrupts */
-        amiga_custom.intena = IF_RBF | IF_TBE;
-
-        /* clear any pending interrupt */
-        amiga_custom.intreq = IF_RBF | IF_TBE;
-
-        local_irq_restore(flags);
-
-        /*
-         * set the appropriate directions for the modem control flags,
-         * and clear RTS and DTR
-         */
-        ciab.ddra |= (SER_DTR | SER_RTS);   /* outputs */
-        ciab.ddra &= ~(SER_DCD | SER_CTS | SER_DSR);  /* inputs */
-
-#ifdef CONFIG_KGDB
-        /* turn Rx interrupts on for GDB */
-        amiga_custom.intena = IF_SETCLR | IF_RBF;
-        ser_RTSon();
-#endif
-
-        return 0;
-}
-
-void __debug_print_hex(unsigned long x)
-{
-        int i;
-        char hexchars[] = "0123456789ABCDEF";
-
-        for (i = 0; i < 8; i++) {
-                __debug_ser_out(hexchars[(x >> 28) & 15]);
-                x <<= 4;
-        }
-        __debug_ser_out('\n');
-        __debug_ser_out('\r');
-}
-
-void __debug_print_string(char* s)
-{
-        unsigned char c;
-        while((c = *s++))
-                __debug_ser_out(c);
-        __debug_ser_out('\n');
-        __debug_ser_out('\r');
-}
-
-static void apus_progress(char *s, unsigned short value)
-{
-        __debug_print_string(s);
-}
-
-/****************************************************** init */
-
-/* The number of spurious interrupts */
-volatile unsigned int num_spurious;
-
-extern struct irqaction amiga_sys_irqaction[AUTO_IRQS];
-
-
-extern void amiga_enable_irq(unsigned int irq);
-extern void amiga_disable_irq(unsigned int irq);
-
-struct hw_interrupt_type amiga_sys_irqctrl = {
-        .typename = "Amiga IPL",
-        .end = apus_end_irq,
-};
-
-struct hw_interrupt_type amiga_irqctrl = {
-        .typename = "Amiga    ",
-        .enable = amiga_enable_irq,
-        .disable = amiga_disable_irq,
-};
-
-#define HARDWARE_MAPPED_SIZE (512*1024)
-unsigned long __init apus_find_end_of_memory(void)
-{
-        int shadow = 0;
-        unsigned long total;
-
-        /* The memory size reported by ADOS excludes the 512KB
-           reserved for PPC exception registers and possibly 512KB
-           containing a shadow of the ADOS ROM. */
-        {
-                unsigned long size = memory[0].size;
-
-                /* If 2MB aligned, size was probably user
-                   specified. We can't tell anything about shadowing
-                   in this case so skip shadow assignment. */
-                if (0 != (size & 0x1fffff)){
-                        /* Align to 512KB to ensure correct handling
-                           of both memfile and system specified
-                           sizes. */
-                        size = ((size+0x0007ffff) & 0xfff80000);
-                        /* If memory is 1MB aligned, assume
-                           shadowing. */
-                        shadow = !(size & 0x80000);
-                }
-
-                /* Add the chunk that ADOS does not see. by aligning
-                   the size to the nearest 2MB limit upwards.  */
-                memory[0].size = ((size+0x001fffff) & 0xffe00000);
-        }
-
-        ppc_memstart = memory[0].addr;
-        ppc_memoffset = PAGE_OFFSET - PPC_MEMSTART;
-        total = memory[0].size;
-
-        /* Remove the memory chunks that are controlled by special
-           Phase5 hardware. */
-
-        /* Remove the upper 512KB if it contains a shadow of
-           the ADOS ROM. FIXME: It might be possible to
-           disable this shadow HW. Check the booter
-           (ppc_boot.c) */
-        if (shadow)
-                total -= HARDWARE_MAPPED_SIZE;
-
-        /* Remove the upper 512KB where the PPC exception
-           vectors are mapped. */
-        total -= HARDWARE_MAPPED_SIZE;
-
-        /* Linux/APUS only handles one block of memory -- the one on
-           the PowerUP board. Other system memory is horrible slow in
-           comparison. The user can use other memory for swapping
-           using the z2ram device. */
-        return total;
-}
-
-static void __init
-apus_map_io(void)
-{
-        /* Map PPC exception vectors. */
-        io_block_mapping(0xfff00000, 0xfff00000, 0x00020000, _PAGE_KERNEL);
-        /* Map chip and ZorroII memory */
-        io_block_mapping(zTwoBase,   0x00000000, 0x01000000, _PAGE_IO);
-}
-
-__init
-void apus_init_IRQ(void)
-{
-        struct irqaction *action;
-        int i;
-
-#ifdef CONFIG_PCI
-        apus_setup_pci_ptrs();
-#endif
-
-        for ( i = 0 ; i < AMI_IRQS; i++ ) {
-                irq_desc[i].status = IRQ_LEVEL;
-                if (i < IRQ_AMIGA_AUTO) {
-                        irq_desc[i].chip = &amiga_irqctrl;
-                } else {
-                        irq_desc[i].chip = &amiga_sys_irqctrl;
-                        action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO];
-                        if (action->name)
-                                setup_irq(i, action);
-                }
-        }
-
-        amiga_init_IRQ();
-
-}
-
-__init
-void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-                   unsigned long r6, unsigned long r7)
-{
-        extern int parse_bootinfo(const struct bi_record *);
-        extern char _end[];
-
-        /* Parse bootinfo. The bootinfo is located right after
-           the kernel bss */
-        parse_bootinfo((const struct bi_record *)&_end);
-#ifdef CONFIG_BLK_DEV_INITRD
-        /* Take care of initrd if we have one. Use data from
-           bootinfo to avoid the need to initialize PPC
-           registers when kernel is booted via a PPC reset. */
-        if ( ramdisk.addr ) {
-                initrd_start = (unsigned long) __va(ramdisk.addr);
-                initrd_end = (unsigned long)
-                        __va(ramdisk.size + ramdisk.addr);
-        }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
-        ISA_DMA_THRESHOLD = 0x00ffffff;
-
-        ppc_md.setup_arch     = apus_setup_arch;
-        ppc_md.show_cpuinfo   = apus_show_cpuinfo;
-        ppc_md.init_IRQ       = apus_init_IRQ;
-        ppc_md.get_irq        = apus_get_irq;
-
-#ifdef CONFIG_HEARTBEAT
-        ppc_md.heartbeat      = apus_heartbeat;
-        ppc_md.heartbeat_count = 1;
-#endif
-#ifdef APUS_DEBUG
-        __debug_serinit();
-        ppc_md.progress       = apus_progress;
-#endif
-        ppc_md.init           = NULL;
-
-        ppc_md.restart        = apus_restart;
-        ppc_md.power_off      = apus_power_off;
-        ppc_md.halt           = apus_halt;
-
-        ppc_md.time_init      = NULL;
-        ppc_md.set_rtc_time   = apus_set_rtc_time;
-        ppc_md.get_rtc_time   = apus_get_rtc_time;
-        ppc_md.calibrate_decr = apus_calibrate_decr;
-
-        ppc_md.find_end_of_memory = apus_find_end_of_memory;
-        ppc_md.setup_io_mappings = apus_map_io;
-}
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
index 491fe9a57229..3f5be2c5ce99 100644
--- a/arch/ppc/syslib/ocp.c
+++ b/arch/ppc/syslib/ocp.c
@@ -44,11 +44,11 @@
 #include <linux/pm.h>
 #include <linux/bootmem.h>
 #include <linux/device.h>
+#include <linux/rwsem.h>
 
 #include <asm/io.h>
 #include <asm/ocp.h>
 #include <asm/errno.h>
-#include <asm/rwsem.h>
 #include <asm/semaphore.h>
 
 //#define DBG(x)        printk x
diff --git a/drivers/char/hvc_beat.c b/drivers/char/hvc_beat.c
index 6f019f19be71..e74bb949c289 100644
--- a/drivers/char/hvc_beat.c
+++ b/drivers/char/hvc_beat.c
@@ -97,7 +97,7 @@ static int hvc_beat_config(char *p)
         return 0;
 }
 
-static int hvc_beat_console_init(void)
+static int __init hvc_beat_console_init(void)
 {
         if (hvc_beat_useit && machine_is_compatible("Beat")) {
                 hvc_instantiate(0, 0, &hvc_beat_get_put_ops);
@@ -106,7 +106,7 @@ static int hvc_beat_console_init(void)
 }
 
 /* temp */
-static int hvc_beat_init(void)
+static int __init hvc_beat_init(void)
 {
         struct hvc_struct *hp;
 
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index dd441ff4af56..1dd3a065f57b 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -2252,19 +2252,19 @@ static int __devinit ipmi_of_probe(struct of_device *dev,
                 return ret;
         }
 
-        regsize = get_property(np, "reg-size", &proplen);
+        regsize = of_get_property(np, "reg-size", &proplen);
         if (regsize && proplen != 4) {
                 dev_warn(&dev->dev, PFX "invalid regsize from OF\n");
                 return -EINVAL;
         }
 
-        regspacing = get_property(np, "reg-spacing", &proplen);
+        regspacing = of_get_property(np, "reg-spacing", &proplen);
         if (regspacing && proplen != 4) {
                 dev_warn(&dev->dev, PFX "invalid regspacing from OF\n");
                 return -EINVAL;
         }
 
-        regshift = get_property(np, "reg-shift", &proplen);
+        regshift = of_get_property(np, "reg-shift", &proplen);
         if (regshift && proplen != 4) {
                 dev_warn(&dev->dev, PFX "invalid regshift from OF\n");
                 return -EINVAL;
diff --git a/drivers/macintosh/adb-iop.c b/drivers/macintosh/adb-iop.c
index 17ef5d3c01b4..444696625171 100644
--- a/drivers/macintosh/adb-iop.c
+++ b/drivers/macintosh/adb-iop.c
@@ -19,7 +19,6 @@
 #include <linux/init.h>
 #include <linux/proc_fs.h>
 
-#include <asm/bootinfo.h> 
 #include <asm/macintosh.h> 
 #include <asm/macints.h> 
 #include <asm/mac_iop.h>
diff --git a/drivers/macintosh/adbhid.c b/drivers/macintosh/adbhid.c
index b46817f699f1..48d17bf6c927 100644
--- a/drivers/macintosh/adbhid.c
+++ b/drivers/macintosh/adbhid.c
@@ -70,7 +70,7 @@ static struct notifier_block adbhid_adb_notifier = {
 #define ADB_KEY_POWER_OLD       0x7e
 #define ADB_KEY_POWER           0x7f
 
-u8 adb_to_linux_keycodes[128] = {
+u16 adb_to_linux_keycodes[128] = {
         /* 0x00 */ KEY_A,               /*  30 */
         /* 0x01 */ KEY_S,               /*  31 */
         /* 0x02 */ KEY_D,               /*  32 */
@@ -134,7 +134,7 @@ u8 adb_to_linux_keycodes[128] = {
         /* 0x3c */ KEY_RIGHT,           /* 106 */
         /* 0x3d */ KEY_DOWN,            /* 108 */
         /* 0x3e */ KEY_UP,              /* 103 */
-        /* 0x3f */ 0,
+        /* 0x3f */ KEY_FN,              /* 0x1d0 */
         /* 0x40 */ 0,
         /* 0x41 */ KEY_KPDOT,           /*  83 */
         /* 0x42 */ 0,
@@ -208,7 +208,7 @@ struct adbhid {
         int original_handler_id;
         int current_handler_id;
         int mouse_kind;
-        unsigned char *keycode;
+        u16 *keycode;
         char name[64];
         char phys[32];
         int flags;
@@ -275,7 +275,7 @@ static void
 adbhid_input_keycode(int id, int keycode, int repeat)
 {
         struct adbhid *ahid = adbhid[id];
-        int up_flag;
+        int up_flag, key;
 
         up_flag = (keycode & 0x80);
         keycode &= 0x7f;
@@ -321,8 +321,7 @@ adbhid_input_keycode(int id, int keycode, int repeat)
                         }
                 } else
                         ahid->flags |= FLAG_FN_KEY_PRESSED;
-                /* Swallow the key press */
-                return;
+                break;
         case ADB_KEY_DEL:
                 /* Emulate Fn+delete = forward delete */
                 if (ahid->flags & FLAG_FN_KEY_PRESSED) {
@@ -336,9 +335,9 @@ adbhid_input_keycode(int id, int keycode, int repeat)
 #endif /* CONFIG_PPC_PMAC */
         }
 
-        if (adbhid[id]->keycode[keycode]) {
-                input_report_key(adbhid[id]->input,
-                                 adbhid[id]->keycode[keycode], !up_flag);
+        key = adbhid[id]->keycode[keycode];
+        if (key) {
+                input_report_key(adbhid[id]->input, key, !up_flag);
                 input_sync(adbhid[id]->input);
         } else
                 printk(KERN_INFO "Unhandled ADB key (scancode %#02x) %s.\n", keycode,
@@ -757,8 +756,8 @@ adbhid_input_register(int id, int default_id, int original_handler_id,
                 input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_LED) | BIT(EV_REP);
                 input_dev->ledbit[0] = BIT(LED_SCROLLL) | BIT(LED_CAPSL) | BIT(LED_NUML);
                 input_dev->event = adbhid_kbd_event;
-                input_dev->keycodemax = 127;
-                input_dev->keycodesize = 1;
+                input_dev->keycodemax = KEY_FN;
+                input_dev->keycodesize = sizeof(hid->keycode[0]);
                 break;
 
         case ADB_MOUSE:
diff --git a/drivers/macintosh/ans-lcd.c b/drivers/macintosh/ans-lcd.c
index e54c4d9f6365..73c50bc02095 100644
--- a/drivers/macintosh/ans-lcd.c
+++ b/drivers/macintosh/ans-lcd.c
@@ -14,9 +14,10 @@
 #include <asm/uaccess.h>
 #include <asm/sections.h>
 #include <asm/prom.h>
-#include <asm/ans-lcd.h>
 #include <asm/io.h>
 
+#include "ans-lcd.h"
+
 #define ANSLCD_ADDR             0xf301c000
 #define ANSLCD_CTRL_IX 0x00
 #define ANSLCD_DATA_IX 0x10
diff --git a/include/asm-ppc/ans-lcd.h b/drivers/macintosh/ans-lcd.h
index d795b9fd2db6..d795b9fd2db6 100644
--- a/include/asm-ppc/ans-lcd.h
+++ b/drivers/macintosh/ans-lcd.h
diff --git a/drivers/macintosh/therm_adt746x.c b/drivers/macintosh/therm_adt746x.c
index f25685b9b7cf..276945d51513 100644
--- a/drivers/macintosh/therm_adt746x.c
+++ b/drivers/macintosh/therm_adt746x.c
@@ -379,13 +379,10 @@ static int attach_one_thermostat(struct i2c_adapter *adapter, int addr,
         if (thermostat)
                 return 0;
 
-        th = (struct thermostat *)
-                kmalloc(sizeof(struct thermostat), GFP_KERNEL);
-
+        th = kzalloc(sizeof(struct thermostat), GFP_KERNEL);
         if (!th)
                 return -ENOMEM;
 
-        memset(th, 0, sizeof(*th));
         th->clt.addr = addr;
         th->clt.adapter = adapter;
         th->clt.driver = &thermostat_driver;
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index 04f3973e3874..f7c509b7a8ea 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -410,7 +410,7 @@ static int __init via_pmu_start(void)
 
         irq = irq_of_parse_and_map(vias, 0);
         if (irq == NO_IRQ) {
-                printk(KERN_ERR "via-pmu: can't map interruptn");
+                printk(KERN_ERR "via-pmu: can't map interrupt\n");
                 return -ENODEV;
         }
         if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) {
diff --git a/drivers/macintosh/windfarm_smu_sat.c b/drivers/macintosh/windfarm_smu_sat.c
index 351982bcec1b..f449d775cdf4 100644
--- a/drivers/macintosh/windfarm_smu_sat.c
+++ b/drivers/macintosh/windfarm_smu_sat.c
@@ -380,10 +380,12 @@ static int __init sat_sensors_init(void)
         return i2c_add_driver(&wf_sat_driver);
 }
 
+#if 0   /* uncomment when module_exit() below is uncommented */
 static void __exit sat_sensors_exit(void)
 {
         i2c_del_driver(&wf_sat_driver);
 }
+#endif
 
 module_init(sat_sensors_init);
 /*module_exit(sat_sensors_exit); Uncomment when cleanup is implemented */
diff --git a/drivers/misc/hdpuftrs/hdpu_cpustate.c b/drivers/misc/hdpuftrs/hdpu_cpustate.c
index 276ba3c5143f..aa8ce7abe922 100644
--- a/drivers/misc/hdpuftrs/hdpu_cpustate.c
+++ b/drivers/misc/hdpuftrs/hdpu_cpustate.c
@@ -19,16 +19,41 @@
 #include <linux/spinlock.h>
 #include <linux/miscdevice.h>
 #include <linux/proc_fs.h>
+#include <linux/hdpu_features.h>
 #include <linux/platform_device.h>
 #include <asm/uaccess.h>
-#include <linux/hdpu_features.h>
+#include <linux/seq_file.h>
+#include <asm/io.h>
 
 #define SKY_CPUSTATE_VERSION            "1.1"
 
 static int hdpu_cpustate_probe(struct platform_device *pdev);
 static int hdpu_cpustate_remove(struct platform_device *pdev);
 
-struct cpustate_t cpustate;
+static unsigned char cpustate_get_state(void);
+static int cpustate_proc_open(struct inode *inode, struct file *file);
+static int cpustate_proc_read(struct seq_file *seq, void *offset);
+
+static struct cpustate_t cpustate;
+
+static const struct file_operations proc_cpustate = {
+        .open = cpustate_proc_open,
+        .read = seq_read,
+        .llseek = seq_lseek,
+        .release = single_release,
+        .owner = THIS_MODULE,
+};
+
+static int cpustate_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, cpustate_proc_read, NULL);
+}
+
+static int cpustate_proc_read(struct seq_file *seq, void *offset)
+{
+        seq_printf(seq, "CPU State: %04x\n", cpustate_get_state());
+        return 0;
+}
 
 static int cpustate_get_ref(int excl)
 {
@@ -66,13 +91,13 @@ static int cpustate_free_ref(void)
         return 0;
 }
 
-unsigned char cpustate_get_state(void)
+static unsigned char cpustate_get_state(void)
 {
 
         return cpustate.cached_val;
 }
 
-void cpustate_set_state(unsigned char new_state)
+static void cpustate_set_state(unsigned char new_state)
 {
         unsigned int state = (new_state << 21);
 
@@ -134,29 +159,6 @@ static int cpustate_release(struct inode *inode, struct file *file)
         return cpustate_free_ref();
 }
 
-/*
- *      Info exported via "/proc/sky_cpustate".
- */
-static int cpustate_read_proc(char *page, char **start, off_t off,
-                              int count, int *eof, void *data)
-{
-        char *p = page;
-        int len = 0;
-
-        p += sprintf(p, "CPU State: %04x\n", cpustate_get_state());
-        len = p - page;
-
-        if (len <= off + count)
-                *eof = 1;
-        *start = page + off;
-        len -= off;
-        if (len > count)
-                len = count;
-        if (len < 0)
-                len = 0;
-        return len;
-}
-
 static struct platform_driver hdpu_cpustate_driver = {
         .probe = hdpu_cpustate_probe,
         .remove = hdpu_cpustate_remove,
@@ -169,22 +171,18 @@ static struct platform_driver hdpu_cpustate_driver = {
  *      The various file operations we support.
  */
 static const struct file_operations cpustate_fops = {
-      owner:THIS_MODULE,
-      open:cpustate_open,
-      release:cpustate_release,
-      read:cpustate_read,
-      write:cpustate_write,
-      fasync:NULL,
-      poll:NULL,
-      ioctl:NULL,
-      llseek:no_llseek,
-
+      .owner    = THIS_MODULE,
+      .open     = cpustate_open,
+      .release  = cpustate_release,
+      .read     = cpustate_read,
+      .write    = cpustate_write,
+      .llseek   = no_llseek,
 };
 
 static struct miscdevice cpustate_dev = {
-        MISC_DYNAMIC_MINOR,
-        "sky_cpustate",
-        &cpustate_fops
+        .minor  = MISC_DYNAMIC_MINOR,
+        .name   = "sky_cpustate",
+        .fops   = &cpustate_fops,
 };
 
 static int hdpu_cpustate_probe(struct platform_device *pdev)
@@ -194,23 +192,31 @@ static int hdpu_cpustate_probe(struct platform_device *pdev)
         int ret;
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                printk(KERN_ERR "sky_cpustate: "
+                       "Invalid memory resource.\n");
+                return -EINVAL;
+        }
         cpustate.set_addr = (unsigned long *)res->start;
         cpustate.clr_addr = (unsigned long *)res->end - 1;
 
         ret = misc_register(&cpustate_dev);
         if (ret) {
-                printk(KERN_WARNING "sky_cpustate: Unable to register misc "
-                                        "device.\n");
+                printk(KERN_WARNING "sky_cpustate: "
+                       "Unable to register misc device.\n");
                 cpustate.set_addr = NULL;
                 cpustate.clr_addr = NULL;
                 return ret;
         }
 
-        proc_de = create_proc_read_entry("sky_cpustate", 0, 0,
-                                        cpustate_read_proc, NULL);
-        if (proc_de == NULL)
-                printk(KERN_WARNING "sky_cpustate: Unable to create proc "
-                                        "dir entry\n");
+        proc_de = create_proc_entry("sky_cpustate", 0666, &proc_root);
+        if (!proc_de) {
+                printk(KERN_WARNING "sky_cpustate: "
+                       "Unable to create proc entry\n");
+        } else {
+                proc_de->proc_fops = &proc_cpustate;
+                proc_de->owner = THIS_MODULE;
+        }
 
         printk(KERN_INFO "Sky CPU State Driver v" SKY_CPUSTATE_VERSION "\n");
         return 0;
@@ -218,21 +224,18 @@ static int hdpu_cpustate_probe(struct platform_device *pdev)
 
 static int hdpu_cpustate_remove(struct platform_device *pdev)
 {
-
         cpustate.set_addr = NULL;
         cpustate.clr_addr = NULL;
 
         remove_proc_entry("sky_cpustate", NULL);
         misc_deregister(&cpustate_dev);
-        return 0;
 
+        return 0;
 }
 
 static int __init cpustate_init(void)
 {
-        int rc;
-        rc = platform_driver_register(&hdpu_cpustate_driver);
-        return rc;
+        return platform_driver_register(&hdpu_cpustate_driver);
 }
 
 static void __exit cpustate_exit(void)
diff --git a/drivers/misc/hdpuftrs/hdpu_nexus.c b/drivers/misc/hdpuftrs/hdpu_nexus.c
index 60c8b26f0678..2887b2147980 100644
--- a/drivers/misc/hdpuftrs/hdpu_nexus.c
+++ b/drivers/misc/hdpuftrs/hdpu_nexus.c
@@ -18,17 +18,38 @@
 #include <linux/kernel.h>
 #include <linux/proc_fs.h>
 #include <linux/hdpu_features.h>
-
 #include <linux/platform_device.h>
+#include <linux/seq_file.h>
+#include <asm/io.h>
 
 static int hdpu_nexus_probe(struct platform_device *pdev);
 static int hdpu_nexus_remove(struct platform_device *pdev);
+static int hdpu_slot_id_open(struct inode *inode, struct file *file);
+static int hdpu_slot_id_read(struct seq_file *seq, void *offset);
+static int hdpu_chassis_id_open(struct inode *inode, struct file *file);
+static int hdpu_chassis_id_read(struct seq_file *seq, void *offset);
 
 static struct proc_dir_entry *hdpu_slot_id;
 static struct proc_dir_entry *hdpu_chassis_id;
 static int slot_id = -1;
 static int chassis_id = -1;
 
+static const struct file_operations proc_slot_id = {
+        .open = hdpu_slot_id_open,
+        .read = seq_read,
+        .llseek = seq_lseek,
+        .release = single_release,
+        .owner = THIS_MODULE,
+};
+
+static const struct file_operations proc_chassis_id = {
+        .open = hdpu_chassis_id_open,
+        .read = seq_read,
+        .llseek = seq_lseek,
+        .release = single_release,
+        .owner = THIS_MODULE,
+};
+
 static struct platform_driver hdpu_nexus_driver = {
         .probe = hdpu_nexus_probe,
         .remove = hdpu_nexus_remove,
@@ -37,43 +58,67 @@ static struct platform_driver hdpu_nexus_driver = {
         },
 };
 
-int hdpu_slot_id_read(char *buffer, char **buffer_location, off_t offset,
-                      int buffer_length, int *zero, void *ptr)
+static int hdpu_slot_id_open(struct inode *inode, struct file *file)
 {
+        return single_open(file, hdpu_slot_id_read, NULL);
+}
 
-        if (offset > 0)
-                return 0;
-        return sprintf(buffer, "%d\n", slot_id);
+static int hdpu_slot_id_read(struct seq_file *seq, void *offset)
+{
+        seq_printf(seq, "%d\n", slot_id);
+        return 0;
 }
 
-int hdpu_chassis_id_read(char *buffer, char **buffer_location, off_t offset,
-                         int buffer_length, int *zero, void *ptr)
+static int hdpu_chassis_id_open(struct inode *inode, struct file *file)
 {
+        return single_open(file, hdpu_chassis_id_read, NULL);
+}
 
-        if (offset > 0)
-                return 0;
-        return sprintf(buffer, "%d\n", chassis_id);
+static int hdpu_chassis_id_read(struct seq_file *seq, void *offset)
+{
+        seq_printf(seq, "%d\n", chassis_id);
+        return 0;
 }
 
 static int hdpu_nexus_probe(struct platform_device *pdev)
 {
         struct resource *res;
+        int *nexus_id_addr;
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        int *nexus_id_addr;
-        nexus_id_addr =
-            ioremap(res->start, (unsigned long)(res->end - res->start));
+        if (!res) {
+                printk(KERN_ERR "sky_nexus: "
+                       "Invalid memory resource.\n");
+                return -EINVAL;
+        }
+        nexus_id_addr = ioremap(res->start,
+                                (unsigned long)(res->end - res->start));
         if (nexus_id_addr) {
                 slot_id = (*nexus_id_addr >> 8) & 0x1f;
                 chassis_id = *nexus_id_addr & 0xff;
                 iounmap(nexus_id_addr);
-        } else
-                printk("Could not map slot id\n");
+        } else {
+                printk(KERN_ERR "sky_nexus: Could not map slot id\n");
+        }
+
         hdpu_slot_id = create_proc_entry("sky_slot_id", 0666, &proc_root);
-        hdpu_slot_id->read_proc = hdpu_slot_id_read;
+        if (!hdpu_slot_id) {
+                printk(KERN_WARNING "sky_nexus: "
+                       "Unable to create proc dir entry: sky_slot_id\n");
+        } else {
+                hdpu_slot_id->proc_fops = &proc_slot_id;
+                hdpu_slot_id->owner = THIS_MODULE;
+        }
 
         hdpu_chassis_id = create_proc_entry("sky_chassis_id", 0666, &proc_root);
-        hdpu_chassis_id->read_proc = hdpu_chassis_id_read;
+        if (!hdpu_chassis_id) {
+                printk(KERN_WARNING "sky_nexus: "
+                       "Unable to create proc dir entry: sky_chassis_id\n");
+        } else {
+                hdpu_chassis_id->proc_fops = &proc_chassis_id;
+                hdpu_chassis_id->owner = THIS_MODULE;
+        }
+
         return 0;
 }
 
@@ -81,18 +126,19 @@ static int hdpu_nexus_remove(struct platform_device *pdev)
 {
         slot_id = -1;
         chassis_id = -1;
+
         remove_proc_entry("sky_slot_id", &proc_root);
         remove_proc_entry("sky_chassis_id", &proc_root);
+
         hdpu_slot_id = 0;
         hdpu_chassis_id = 0;
+
         return 0;
 }
 
 static int __init nexus_init(void)
 {
-        int rc;
-        rc = platform_driver_register(&hdpu_nexus_driver);
-        return rc;
+        return platform_driver_register(&hdpu_nexus_driver);
 }
 
 static void __exit nexus_exit(void)
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index cc6c73442435..6cd132c75187 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -362,7 +362,7 @@ config MTD_WALNUT
 
 config MTD_EBONY
         tristate "Flash devices mapped on IBM 440GP Ebony"
-        depends on MTD_JEDECPROBE && EBONY
+        depends on MTD_JEDECPROBE && EBONY && !PPC_MERGE
         help
           This enables access routines for the flash chips on the IBM 440GP
           Ebony board. If you have one of these boards and would like to
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index bbb42c35b69b..cf75a566442e 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -1,9 +1,12 @@
 /*
- * Normal mappings of chips in physical memory for OF devices
+ * Flash mappings described by the OF (or flattened) device tree
  *
  * Copyright (C) 2006 MontaVista Software Inc.
  * Author: Vitaly Wool <vwool@ru.mvista.com>
  *
+ * Revised to handle newer style flash binding by:
+ *   Copyright (C) 2007 David Gibson, IBM Corporation.
+ *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
@@ -12,102 +15,157 @@
 
 #include <linux/module.h>
 #include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
 
-struct physmap_flash_info {
+struct of_flash {
         struct mtd_info         *mtd;
         struct map_info         map;
         struct resource         *res;
 #ifdef CONFIG_MTD_PARTITIONS
-        int                     nr_parts;
         struct mtd_partition    *parts;
 #endif
 };
 
-static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
 #ifdef CONFIG_MTD_PARTITIONS
-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
-#endif
+#define OF_FLASH_PARTS(info)    ((info)->parts)
 
-#ifdef CONFIG_MTD_PARTITIONS
-static int parse_flash_partitions(struct device_node *node,
-                struct mtd_partition **parts)
+static int parse_obsolete_partitions(struct of_device *dev,
+                                     struct of_flash *info,
+                                     struct device_node *dp)
 {
-        int i, plen, retval = -ENOMEM;
-        const  u32  *part;
-        const  char *name;
-
-        part = of_get_property(node, "partitions", &plen);
-        if (part == NULL)
-                goto err;
-
-        retval = plen / (2 * sizeof(u32));
-        *parts = kzalloc(retval * sizeof(struct mtd_partition), GFP_KERNEL);
-        if (*parts == NULL) {
-                printk(KERN_ERR "Can't allocate the flash partition data!\n");
-                goto err;
-        }
+        int i, plen, nr_parts;
+        const struct {
+                u32 offset, len;
+        } *part;
+        const char *names;
+
+        part = of_get_property(dp, "partitions", &plen);
+        if (!part)
+                return 0; /* No partitions found */
+
+        dev_warn(&dev->dev, "Device tree uses obsolete partition map binding\n");
+
+        nr_parts = plen / sizeof(part[0]);
+
+        info->parts = kzalloc(nr_parts * sizeof(*info->parts), GFP_KERNEL);
+        if (!info->parts)
+                return -ENOMEM;
 
-        name = of_get_property(node, "partition-names", &plen);
+        names = of_get_property(dp, "partition-names", &plen);
 
-        for (i = 0; i < retval; i++) {
-                (*parts)[i].offset = *part++;
-                (*parts)[i].size   = *part & ~1;
-                if (*part++ & 1) /* bit 0 set signifies read only partition */
-                        (*parts)[i].mask_flags = MTD_WRITEABLE;
+        for (i = 0; i < nr_parts; i++) {
+                info->parts[i].offset = part->offset;
+                info->parts[i].size   = part->len & ~1;
+                if (part->len & 1) /* bit 0 set signifies read only partition */
+                        info->parts[i].mask_flags = MTD_WRITEABLE;
 
-                if (name != NULL && plen > 0) {
-                        int len = strlen(name) + 1;
+                if (names && (plen > 0)) {
+                        int len = strlen(names) + 1;
 
-                        (*parts)[i].name = (char *)name;
+                        info->parts[i].name = (char *)names;
                         plen -= len;
-                        name += len;
-                } else
-                        (*parts)[i].name = "unnamed";
+                        names += len;
+                } else {
+                        info->parts[i].name = "unnamed";
+                }
+
+                part++;
         }
-err:
-        return retval;
+
+        return nr_parts;
 }
-#endif
 
-static int of_physmap_remove(struct of_device *dev)
+static int __devinit parse_partitions(struct of_flash *info,
+                                      struct of_device *dev)
+{
+        const char *partname;
+        static const char *part_probe_types[]
+                = { "cmdlinepart", "RedBoot", NULL };
+        struct device_node *dp = dev->node, *pp;
+        int nr_parts, i;
+
+        /* First look for RedBoot table or partitions on the command
+         * line, these take precedence over device tree information */
+        nr_parts = parse_mtd_partitions(info->mtd, part_probe_types,
+                                        &info->parts, 0);
+        if (nr_parts > 0) {
+                add_mtd_partitions(info->mtd, info->parts, nr_parts);
+                return 0;
+        }
+
+        /* First count the subnodes */
+        nr_parts = 0;
+        for (pp = dp->child; pp; pp = pp->sibling)
+                nr_parts++;
+
+        if (nr_parts == 0)
+                return parse_obsolete_partitions(dev, info, dp);
+
+        info->parts = kzalloc(nr_parts * sizeof(*info->parts),
+                              GFP_KERNEL);
+        if (!info->parts)
+                return -ENOMEM;
+
+        for (pp = dp->child, i = 0; pp; pp = pp->sibling, i++) {
+                const u32 *reg;
+                int len;
+
+                reg = of_get_property(pp, "reg", &len);
+                if (!reg || (len != 2*sizeof(u32))) {
+                        dev_err(&dev->dev, "Invalid 'reg' on %s\n",
+                                dp->full_name);
+                        kfree(info->parts);
+                        info->parts = NULL;
+                        return -EINVAL;
+                }
+                info->parts[i].offset = reg[0];
+                info->parts[i].size = reg[1];
+
+                partname = of_get_property(pp, "label", &len);
+                if (!partname)
+                        partname = of_get_property(pp, "name", &len);
+                info->parts[i].name = (char *)partname;
+
+                if (of_get_property(pp, "read-only", &len))
+                        info->parts[i].mask_flags = MTD_WRITEABLE;
+        }
+
+        return nr_parts;
+}
+#else /* MTD_PARTITIONS */
+#define OF_FLASH_PARTS(info)            (0)
+#define parse_partitions(info, dev)     (0)
+#endif /* MTD_PARTITIONS */
+
+static int of_flash_remove(struct of_device *dev)
 {
-        struct physmap_flash_info *info;
+        struct of_flash *info;
 
         info = dev_get_drvdata(&dev->dev);
-        if (info == NULL)
+        if (!info)
                 return 0;
         dev_set_drvdata(&dev->dev, NULL);
 
-        if (info->mtd != NULL) {
-#ifdef CONFIG_MTD_PARTITIONS
-                if (info->nr_parts) {
+        if (info->mtd) {
+                if (OF_FLASH_PARTS(info)) {
                         del_mtd_partitions(info->mtd);
-                        kfree(info->parts);
+                        kfree(OF_FLASH_PARTS(info));
                 } else {
                         del_mtd_device(info->mtd);
                 }
-#else
-                del_mtd_device(info->mtd);
-#endif
                 map_destroy(info->mtd);
         }
 
-        if (info->map.virt != NULL)
+        if (info->map.virt)
                 iounmap(info->map.virt);
 
-        if (info->res != NULL) {
+        if (info->res) {
                 release_resource(info->res);
                 kfree(info->res);
         }
@@ -115,48 +173,79 @@ static int of_physmap_remove(struct of_device *dev)
         return 0;
 }
 
-static int __devinit of_physmap_probe(struct of_device *dev, const struct of_device_id *match)
+/* Helper function to handle probing of the obsolete "direct-mapped"
+ * compatible binding, which has an extra "probe-type" property
+ * describing the type of flash probe necessary. */
+static struct mtd_info * __devinit obsolete_probe(struct of_device *dev,
+                                                  struct map_info *map)
 {
         struct device_node *dp = dev->node;
-        struct resource res;
-        struct physmap_flash_info *info;
-        const char **probe_type;
         const char *of_probe;
+        struct mtd_info *mtd;
+        static const char *rom_probe_types[]
+                = { "cfi_probe", "jedec_probe", "map_rom"};
+        int i;
+
+        dev_warn(&dev->dev, "Device tree uses obsolete \"direct-mapped\" "
+                 "flash binding\n");
+
+        of_probe = of_get_property(dp, "probe-type", NULL);
+        if (!of_probe) {
+                for (i = 0; i < ARRAY_SIZE(rom_probe_types); i++) {
+                        mtd = do_map_probe(rom_probe_types[i], map);
+                        if (mtd)
+                                return mtd;
+                }
+                return NULL;
+        } else if (strcmp(of_probe, "CFI") == 0) {
+                return do_map_probe("cfi_probe", map);
+        } else if (strcmp(of_probe, "JEDEC") == 0) {
+                return do_map_probe("jedec_probe", map);
+        } else {
+                if (strcmp(of_probe, "ROM") != 0)
+                        dev_warn(&dev->dev, "obsolete_probe: don't know probe "
+                                 "type '%s', mapping as rom\n", of_probe);
+                return do_map_probe("mtd_rom", map);
+        }
+}
+
+static int __devinit of_flash_probe(struct of_device *dev,
+                                    const struct of_device_id *match)
+{
+        struct device_node *dp = dev->node;
+        struct resource res;
+        struct of_flash *info;
+        const char *probe_type = match->data;
         const u32 *width;
         int err;
 
-
+        err = -ENXIO;
         if (of_address_to_resource(dp, 0, &res)) {
-                dev_err(&dev->dev, "Can't get the flash mapping!\n");
-                err = -EINVAL;
+                dev_err(&dev->dev, "Can't get IO address from device tree\n");
                 goto err_out;
         }
 
-        dev_dbg(&dev->dev, "physmap flash device: %.8llx at %.8llx\n",
-            (unsigned long long)res.end - res.start + 1,
-            (unsigned long long)res.start);
+        dev_dbg(&dev->dev, "of_flash device: %.8llx-%.8llx\n",
+                (unsigned long long)res.start, (unsigned long long)res.end);
 
-        info = kzalloc(sizeof(struct physmap_flash_info), GFP_KERNEL);
-        if (info == NULL) {
-                err = -ENOMEM;
+        err = -ENOMEM;
+        info = kzalloc(sizeof(*info), GFP_KERNEL);
+        if (!info)
                 goto err_out;
-        }
         memset(info, 0, sizeof(*info));
 
         dev_set_drvdata(&dev->dev, info);
 
+        err = -EBUSY;
         info->res = request_mem_region(res.start, res.end - res.start + 1,
-                        dev->dev.bus_id);
-        if (info->res == NULL) {
-                dev_err(&dev->dev, "Could not reserve memory region\n");
-                err = -ENOMEM;
+                                       dev->dev.bus_id);
+        if (!info->res)
                 goto err_out;
-        }
 
+        err = -ENXIO;
         width = of_get_property(dp, "bank-width", NULL);
-        if (width == NULL) {
-                dev_err(&dev->dev, "Can't get the flash bank width!\n");
-                err = -EINVAL;
+        if (!width) {
+                dev_err(&dev->dev, "Can't get bank width from device tree\n");
                 goto err_out;
         }
 
@@ -165,91 +254,87 @@ static int __devinit of_physmap_probe(struct of_device *dev, const struct of_dev
         info->map.size = res.end - res.start + 1;
         info->map.bankwidth = *width;
 
+        err = -ENOMEM;
         info->map.virt = ioremap(info->map.phys, info->map.size);
-        if (info->map.virt == NULL) {
-                dev_err(&dev->dev, "Failed to ioremap flash region\n");
-                err = EIO;
+        if (!info->map.virt) {
+                dev_err(&dev->dev, "Failed to ioremap() flash region\n");
                 goto err_out;
         }
 
         simple_map_init(&info->map);
 
-        of_probe = of_get_property(dp, "probe-type", NULL);
-        if (of_probe == NULL) {
-                probe_type = rom_probe_types;
-                for (; info->mtd == NULL && *probe_type != NULL; probe_type++)
-                        info->mtd = do_map_probe(*probe_type, &info->map);
-        } else if (!strcmp(of_probe, "CFI"))
-                info->mtd = do_map_probe("cfi_probe", &info->map);
-        else if (!strcmp(of_probe, "JEDEC"))
-                info->mtd = do_map_probe("jedec_probe", &info->map);
-        else {
-                if (strcmp(of_probe, "ROM"))
-                        dev_dbg(&dev->dev, "map_probe: don't know probe type "
-                        "'%s', mapping as rom\n", of_probe);
-                info->mtd = do_map_probe("mtd_rom", &info->map);
-        }
-        if (info->mtd == NULL) {
-                dev_err(&dev->dev, "map_probe failed\n");
-                err = -ENXIO;
+        if (probe_type)
+                info->mtd = do_map_probe(probe_type, &info->map);
+        else
+                info->mtd = obsolete_probe(dev, &info->map);
+
+        err = -ENXIO;
+        if (!info->mtd) {
+                dev_err(&dev->dev, "do_map_probe() failed\n");
                 goto err_out;
         }
         info->mtd->owner = THIS_MODULE;
 
-#ifdef CONFIG_MTD_PARTITIONS
-        err = parse_mtd_partitions(info->mtd, part_probe_types, &info->parts, 0);
-        if (err > 0) {
-                add_mtd_partitions(info->mtd, info->parts, err);
-        } else if ((err = parse_flash_partitions(dp, &info->parts)) > 0) {
-                dev_info(&dev->dev, "Using OF partition information\n");
-                add_mtd_partitions(info->mtd, info->parts, err);
-                info->nr_parts = err;
-        } else
-#endif
+        err = parse_partitions(info, dev);
+        if (err < 0)
+                goto err_out;
+
+        if (err > 0)
+                add_mtd_partitions(info->mtd, OF_FLASH_PARTS(info), err);
+        else
+                add_mtd_device(info->mtd);
 
-        add_mtd_device(info->mtd);
         return 0;
 
 err_out:
-        of_physmap_remove(dev);
+        of_flash_remove(dev);
         return err;
-
-        return 0;
-
-
 }
 
-static struct of_device_id of_physmap_match[] = {
+static struct of_device_id of_flash_match[] = {
+        {
+                .compatible     = "cfi-flash",
+                .data           = (void *)"cfi_probe",
+        },
+        {
+                /* FIXME: JEDEC chips can't be safely and reliably
+                 * probed, although the mtd code gets it right in
+                 * practice most of the time.  We should use the
+                 * vendor and device ids specified by the binding to
+                 * bypass the heuristic probe code, but the mtd layer
+                 * provides, at present, no interface for doing so
+                 * :(. */
+                .compatible     = "jedec-flash",
+                .data           = (void *)"jedec_probe",
+        },
         {
                 .type           = "rom",
                 .compatible     = "direct-mapped"
         },
         { },
 };
+MODULE_DEVICE_TABLE(of, of_flash_match);
 
-MODULE_DEVICE_TABLE(of, of_physmap_match);
-
-
-static struct of_platform_driver of_physmap_flash_driver = {
-        .name           = "physmap-flash",
-        .match_table    = of_physmap_match,
-        .probe          = of_physmap_probe,
-        .remove         = of_physmap_remove,
+static struct of_platform_driver of_flash_driver = {
+        .name           = "of-flash",
+        .match_table    = of_flash_match,
+        .probe          = of_flash_probe,
+        .remove         = of_flash_remove,
 };
 
-static int __init of_physmap_init(void)
+static int __init of_flash_init(void)
 {
-        return of_register_platform_driver(&of_physmap_flash_driver);
+        return of_register_platform_driver(&of_flash_driver);
 }
 
-static void __exit of_physmap_exit(void)
+static void __exit of_flash_exit(void)
 {
-        of_unregister_platform_driver(&of_physmap_flash_driver);
+        of_unregister_platform_driver(&of_flash_driver);
 }
 
-module_init(of_physmap_init);
-module_exit(of_physmap_exit);
+module_init(of_flash_init);
+module_exit(of_flash_exit);
 
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Vitaly Wool <vwool@ru.mvista.com>");
-MODULE_DESCRIPTION("Configurable MTD map driver for OF");
+MODULE_DESCRIPTION("Device tree based MTD map driver");
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index 6c257b88ce51..df884f0ad8e5 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -32,7 +32,6 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
-#include <asm/ocp.h>
 #include <linux/crc32.h>
 #include <linux/mii.h>
 #include <linux/phy.h>
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 81b52b7cca21..d6ae38e55d01 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -986,6 +986,31 @@ config SERIAL_PMACZILOG
           PowerMac machines.
           Say Y or M if you want to be able to these serial ports.
 
+config SERIAL_PMACZILOG_TTYS
+        bool "Use ttySn device nodes for Zilog z85c30"
+        depends on SERIAL_PMACZILOG
+        help
+          The pmac_zilog driver for the z85C30 chip on many powermacs
+          historically used the device numbers for /dev/ttySn.  The
+          8250 serial port driver also uses these numbers, which means
+          the two drivers being unable to coexist; you could not use
+          both z85C30 and 8250 type ports at the same time.
+
+          If this option is not selected, the pmac_zilog driver will
+          use the device numbers allocated for /dev/ttyPZn.  This allows
+          the pmac_zilog and 8250 drivers to co-exist, but may cause
+          existing userspace setups to break.  Programs that need to
+          access the built-in serial ports on powermacs will need to
+          be reconfigured to use /dev/ttyPZn instead of /dev/ttySn.
+
+          If you enable this option, any z85c30 ports in the system will
+          be registered as ttyS0 onwards as in the past, and you will be
+          unable to use the 8250 module for PCMCIA or other 16C550-style
+          UARTs.
+
+          Say N unless you need the z85c30 ports on your powermac
+          to appear as /dev/ttySn.
+
 config SERIAL_PMACZILOG_CONSOLE
         bool "Console on PowerMac z85c30 serial port"
         depends on SERIAL_PMACZILOG=y
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 35f8b86cc78f..035cca028199 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -1051,7 +1051,7 @@ mpc52xx_uart_of_assign(struct device_node *np, int idx)
         /* If the slot is already occupied, then swap slots */
         if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
                 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
-        mpc52xx_uart_nodes[i] = np;
+        mpc52xx_uart_nodes[idx] = np;
 }
 
 static void
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 0fa9f6761763..794bd0f50d73 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -88,6 +88,16 @@ MODULE_LICENSE("GPL");
 
 #define PWRDBG(fmt, arg...)     printk(KERN_DEBUG fmt , ## arg)
 
+#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
+#define PMACZILOG_MAJOR         TTY_MAJOR
+#define PMACZILOG_MINOR         64
+#define PMACZILOG_NAME          "ttyS"
+#else
+#define PMACZILOG_MAJOR         204
+#define PMACZILOG_MINOR         192
+#define PMACZILOG_NAME          "ttyPZ"
+#endif
+
 
 /*
  * For the sake of early serial console, we can do a pre-probe
@@ -99,9 +109,10 @@ static DEFINE_MUTEX(pmz_irq_mutex);
 
 static struct uart_driver pmz_uart_reg = {
         .owner          =       THIS_MODULE,
-        .driver_name    =       "ttyS",
-        .dev_name       =       "ttyS",
-        .major          =       TTY_MAJOR,
+        .driver_name    =       PMACZILOG_NAME,
+        .dev_name       =       PMACZILOG_NAME,
+        .major          =       PMACZILOG_MAJOR,
+        .minor          =       PMACZILOG_MINOR,
 };
 
 
@@ -1587,7 +1598,7 @@ static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
         if (pm_state.event == mdev->ofdev.dev.power.power_state.event)
                 return 0;
 
-        pmz_debug("suspend, switching to state %d\n", pm_state);
+        pmz_debug("suspend, switching to state %d\n", pm_state.event);
 
         state = pmz_uart_reg.state + uap->port.line;
 
@@ -1778,7 +1789,7 @@ static void pmz_console_write(struct console *con, const char *s, unsigned int c
 static int __init pmz_console_setup(struct console *co, char *options);
 
 static struct console pmz_console = {
-        .name   =       "ttyS",
+        .name   =       PMACZILOG_NAME,
         .write  =       pmz_console_write,
         .device =       uart_console_device,
         .setup  =       pmz_console_setup,
@@ -1802,7 +1813,6 @@ static int __init pmz_register(void)
         
         pmz_uart_reg.nr = pmz_ports_count;
         pmz_uart_reg.cons = PMACZILOG_CONSOLE;
-        pmz_uart_reg.minor = 64;
 
         /*
          * Register this driver with the serial core
diff --git a/drivers/video/platinumfb.c b/drivers/video/platinumfb.c
index 8503e733a172..cbe71a5338d0 100644
--- a/drivers/video/platinumfb.c
+++ b/drivers/video/platinumfb.c
@@ -17,6 +17,8 @@
  *  more details.
  */
 
+#undef DEBUG
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
@@ -535,33 +537,35 @@ static int __devinit platinumfb_probe(struct of_device* odev,
         volatile __u8           *fbuffer;
         int                     bank0, bank1, bank2, bank3, rc;
 
-        printk(KERN_INFO "platinumfb: Found Apple Platinum video hardware\n");
+        dev_info(&odev->dev, "Found Apple Platinum video hardware\n");
 
         info = framebuffer_alloc(sizeof(*pinfo), &odev->dev);
-        if (info == NULL)
+        if (info == NULL) {
+                dev_err(&odev->dev, "Failed to allocate fbdev !\n");
                 return -ENOMEM;
+        }
         pinfo = info->par;
 
         if (of_address_to_resource(dp, 0, &pinfo->rsrc_reg) ||
             of_address_to_resource(dp, 1, &pinfo->rsrc_fb)) {
-                printk(KERN_ERR "platinumfb: Can't get resources\n");
-                framebuffer_release(info);
-                return -ENXIO;
-        }
-        if (!request_mem_region(pinfo->rsrc_reg.start,
-                                pinfo->rsrc_reg.start -
-                                pinfo->rsrc_reg.end + 1,
-                                "platinumfb registers")) {
+                dev_err(&odev->dev, "Can't get resources\n");
                 framebuffer_release(info);
                 return -ENXIO;
         }
+        dev_dbg(&odev->dev, " registers  : 0x%llx...0x%llx\n",
+                (unsigned long long)pinfo->rsrc_reg.start,
+                (unsigned long long)pinfo->rsrc_reg.end);
+        dev_dbg(&odev->dev, " framebuffer: 0x%llx...0x%llx\n",
+                (unsigned long long)pinfo->rsrc_fb.start,
+                (unsigned long long)pinfo->rsrc_fb.end);
+
+        /* Do not try to request register space, they overlap with the
+         * northbridge and that can fail. Only request framebuffer
+         */
         if (!request_mem_region(pinfo->rsrc_fb.start,
-                                pinfo->rsrc_fb.start
-                                - pinfo->rsrc_fb.end + 1,
+                                pinfo->rsrc_fb.end - pinfo->rsrc_fb.start + 1,
                                 "platinumfb framebuffer")) {
-                release_mem_region(pinfo->rsrc_reg.start,
-                                   pinfo->rsrc_reg.end -
-                                   pinfo->rsrc_reg.start + 1);
+                printk(KERN_ERR "platinumfb: Can't request framebuffer !\n");
                 framebuffer_release(info);
                 return -ENXIO;
         }
@@ -600,7 +604,8 @@ static int __devinit platinumfb_probe(struct of_device* odev,
         bank2 = fbuffer[0x200000] == 0x56;
         bank3 = fbuffer[0x300000] == 0x78;
         pinfo->total_vram = (bank0 + bank1 + bank2 + bank3) * 0x100000;
-        printk(KERN_INFO "platinumfb: Total VRAM = %dMB (%d%d%d%d)\n", (int) (pinfo->total_vram / 1024 / 1024),
+        printk(KERN_INFO "platinumfb: Total VRAM = %dMB (%d%d%d%d)\n",
+               (unsigned int) (pinfo->total_vram / 1024 / 1024),
                bank3, bank2, bank1, bank0);
 
         /*
@@ -644,16 +649,15 @@ static int __devexit platinumfb_remove(struct of_device* odev)
         unregister_framebuffer (info);
         
         /* Unmap frame buffer and registers */
+        iounmap(pinfo->frame_buffer);
+        iounmap(pinfo->platinum_regs);
+        iounmap(pinfo->cmap_regs);
+
         release_mem_region(pinfo->rsrc_fb.start,
                            pinfo->rsrc_fb.end -
                            pinfo->rsrc_fb.start + 1);
-        release_mem_region(pinfo->rsrc_reg.start,
-                           pinfo->rsrc_reg.end -
-                           pinfo->rsrc_reg.start + 1);
-        iounmap(pinfo->frame_buffer);
-        iounmap(pinfo->platinum_regs);
+
         release_mem_region(pinfo->cmap_regs_phys, 0x1000);
-        iounmap(pinfo->cmap_regs);
 
         framebuffer_release(info);
 
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 4482a0673b15..b1013f34085d 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -1514,9 +1514,6 @@ static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file)
         int thread_status_size = 0;
         elf_addr_t *auxv;
         unsigned long mm_flags;
-#ifdef ELF_CORE_WRITE_EXTRA_NOTES
-        int extra_notes_size;
-#endif
 
         /*
          * We no longer stop all VM operations.
@@ -1645,10 +1642,7 @@ static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file)
                 
                 sz += thread_status_size;
 
-#ifdef ELF_CORE_WRITE_EXTRA_NOTES
-                extra_notes_size = ELF_CORE_EXTRA_NOTES_SIZE;
-                sz += extra_notes_size;
-#endif
+                sz += elf_coredump_extra_notes_size();
 
                 fill_elf_note_phdr(&phdr, sz, offset);
                 offset += sz;
@@ -1698,10 +1692,8 @@ static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file)
                 if (!writenote(notes + i, file, &foffset))
                         goto end_coredump;
 
-#ifdef ELF_CORE_WRITE_EXTRA_NOTES
-        ELF_CORE_WRITE_EXTRA_NOTES;
-        foffset += extra_notes_size;
-#endif
+        if (elf_coredump_extra_notes_write(file, &foffset))
+                goto end_coredump;
 
         /* write out the thread status notes section */
         list_for_each(t, &thread_list) {
diff --git a/include/asm-powerpc/8xx_immap.h b/include/asm-powerpc/8xx_immap.h
new file mode 100644
index 000000000000..1311cefdfd30
--- /dev/null
+++ b/include/asm-powerpc/8xx_immap.h
@@ -0,0 +1,564 @@
+/*
+ * MPC8xx Internal Memory Map
+ * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
+ *
+ * The I/O on the MPC860 is comprised of blocks of special registers
+ * and the dual port ram for the Communication Processor Module.
+ * Within this space are functional units such as the SIU, memory
+ * controller, system timers, and other control functions.  It is
+ * a combination that I found difficult to separate into logical
+ * functional files.....but anyone else is welcome to try.  -- Dan
+ */
+#ifdef __KERNEL__
+#ifndef __IMMAP_8XX__
+#define __IMMAP_8XX__
+
+/* System configuration registers.
+*/
+typedef struct sys_conf {
+        uint    sc_siumcr;
+        uint    sc_sypcr;
+        uint    sc_swt;
+        char    res1[2];
+        ushort  sc_swsr;
+        uint    sc_sipend;
+        uint    sc_simask;
+        uint    sc_siel;
+        uint    sc_sivec;
+        uint    sc_tesr;
+        char    res2[0xc];
+        uint    sc_sdcr;
+        char    res3[0x4c];
+} sysconf8xx_t;
+
+/* PCMCIA configuration registers.
+*/
+typedef struct pcmcia_conf {
+        uint    pcmc_pbr0;
+        uint    pcmc_por0;
+        uint    pcmc_pbr1;
+        uint    pcmc_por1;
+        uint    pcmc_pbr2;
+        uint    pcmc_por2;
+        uint    pcmc_pbr3;
+        uint    pcmc_por3;
+        uint    pcmc_pbr4;
+        uint    pcmc_por4;
+        uint    pcmc_pbr5;
+        uint    pcmc_por5;
+        uint    pcmc_pbr6;
+        uint    pcmc_por6;
+        uint    pcmc_pbr7;
+        uint    pcmc_por7;
+        char    res1[0x20];
+        uint    pcmc_pgcra;
+        uint    pcmc_pgcrb;
+        uint    pcmc_pscr;
+        char    res2[4];
+        uint    pcmc_pipr;
+        char    res3[4];
+        uint    pcmc_per;
+        char    res4[4];
+} pcmconf8xx_t;
+
+/* Memory controller registers.
+*/
+typedef struct  mem_ctlr {
+        uint    memc_br0;
+        uint    memc_or0;
+        uint    memc_br1;
+        uint    memc_or1;
+        uint    memc_br2;
+        uint    memc_or2;
+        uint    memc_br3;
+        uint    memc_or3;
+        uint    memc_br4;
+        uint    memc_or4;
+        uint    memc_br5;
+        uint    memc_or5;
+        uint    memc_br6;
+        uint    memc_or6;
+        uint    memc_br7;
+        uint    memc_or7;
+        char    res1[0x24];
+        uint    memc_mar;
+        uint    memc_mcr;
+        char    res2[4];
+        uint    memc_mamr;
+        uint    memc_mbmr;
+        ushort  memc_mstat;
+        ushort  memc_mptpr;
+        uint    memc_mdr;
+        char    res3[0x80];
+} memctl8xx_t;
+
+/*-----------------------------------------------------------------------
+ * BR - Memory Controler: Base Register                                 16-9
+ */
+#define BR_BA_MSK       0xffff8000      /* Base Address Mask                    */
+#define BR_AT_MSK       0x00007000      /* Address Type Mask                    */
+#define BR_PS_MSK       0x00000c00      /* Port Size Mask                       */
+#define BR_PS_32        0x00000000      /* 32 bit port size                     */
+#define BR_PS_16        0x00000800      /* 16 bit port size                     */
+#define BR_PS_8         0x00000400      /*  8 bit port size                     */
+#define BR_PARE         0x00000200      /* Parity Enable                        */
+#define BR_WP           0x00000100      /* Write Protect                        */
+#define BR_MS_MSK       0x000000c0      /* Machine Select Mask                  */
+#define BR_MS_GPCM      0x00000000      /* G.P.C.M. Machine Select              */
+#define BR_MS_UPMA      0x00000080      /* U.P.M.A Machine Select               */
+#define BR_MS_UPMB      0x000000c0      /* U.P.M.B Machine Select               */
+#define BR_V            0x00000001      /* Bank Valid                           */
+
+/*-----------------------------------------------------------------------
+ * OR - Memory Controler: Option Register                               16-11
+ */
+#define OR_AM_MSK       0xffff8000      /* Address Mask Mask                    */
+#define OR_ATM_MSK      0x00007000      /* Address Type Mask Mask               */
+#define OR_CSNT_SAM     0x00000800      /* Chip Select Negation Time/ Start     */
+                                        /* Address Multiplex                    */
+#define OR_ACS_MSK      0x00000600      /* Address to Chip Select Setup mask    */
+#define OR_ACS_DIV1     0x00000000      /* CS is output at the same time        */
+#define OR_ACS_DIV4     0x00000400      /* CS is output 1/4 a clock later       */
+#define OR_ACS_DIV2     0x00000600      /* CS is output 1/2 a clock later       */
+#define OR_G5LA         0x00000400      /* Output #GPL5 on #GPL_A5              */
+#define OR_G5LS         0x00000200      /* Drive #GPL high on falling edge of...*/
+#define OR_BI           0x00000100      /* Burst inhibit                        */
+#define OR_SCY_MSK      0x000000f0      /* Cycle Lenght in Clocks               */
+#define OR_SCY_0_CLK    0x00000000      /* 0 clock cycles wait states           */
+#define OR_SCY_1_CLK    0x00000010      /* 1 clock cycles wait states           */
+#define OR_SCY_2_CLK    0x00000020      /* 2 clock cycles wait states           */
+#define OR_SCY_3_CLK    0x00000030      /* 3 clock cycles wait states           */
+#define OR_SCY_4_CLK    0x00000040      /* 4 clock cycles wait states           */
+#define OR_SCY_5_CLK    0x00000050      /* 5 clock cycles wait states           */
+#define OR_SCY_6_CLK    0x00000060      /* 6 clock cycles wait states           */
+#define OR_SCY_7_CLK    0x00000070      /* 7 clock cycles wait states           */
+#define OR_SCY_8_CLK    0x00000080      /* 8 clock cycles wait states           */
+#define OR_SCY_9_CLK    0x00000090      /* 9 clock cycles wait states           */
+#define OR_SCY_10_CLK   0x000000a0      /* 10 clock cycles wait states          */
+#define OR_SCY_11_CLK   0x000000b0      /* 11 clock cycles wait states          */
+#define OR_SCY_12_CLK   0x000000c0      /* 12 clock cycles wait states          */
+#define OR_SCY_13_CLK   0x000000d0      /* 13 clock cycles wait states          */
+#define OR_SCY_14_CLK   0x000000e0      /* 14 clock cycles wait states          */
+#define OR_SCY_15_CLK   0x000000f0      /* 15 clock cycles wait states          */
+#define OR_SETA         0x00000008      /* External Transfer Acknowledge        */
+#define OR_TRLX         0x00000004      /* Timing Relaxed                       */
+#define OR_EHTR         0x00000002      /* Extended Hold Time on Read           */
+
+/* System Integration Timers.
+*/
+typedef struct  sys_int_timers {
+        ushort  sit_tbscr;
+        char    res0[0x02];
+        uint    sit_tbreff0;
+        uint    sit_tbreff1;
+        char    res1[0x14];
+        ushort  sit_rtcsc;
+        char    res2[0x02];
+        uint    sit_rtc;
+        uint    sit_rtsec;
+        uint    sit_rtcal;
+        char    res3[0x10];
+        ushort  sit_piscr;
+        char    res4[2];
+        uint    sit_pitc;
+        uint    sit_pitr;
+        char    res5[0x34];
+} sit8xx_t;
+
+#define TBSCR_TBIRQ_MASK        ((ushort)0xff00)
+#define TBSCR_REFA              ((ushort)0x0080)
+#define TBSCR_REFB              ((ushort)0x0040)
+#define TBSCR_REFAE             ((ushort)0x0008)
+#define TBSCR_REFBE             ((ushort)0x0004)
+#define TBSCR_TBF               ((ushort)0x0002)
+#define TBSCR_TBE               ((ushort)0x0001)
+
+#define RTCSC_RTCIRQ_MASK       ((ushort)0xff00)
+#define RTCSC_SEC               ((ushort)0x0080)
+#define RTCSC_ALR               ((ushort)0x0040)
+#define RTCSC_38K               ((ushort)0x0010)
+#define RTCSC_SIE               ((ushort)0x0008)
+#define RTCSC_ALE               ((ushort)0x0004)
+#define RTCSC_RTF               ((ushort)0x0002)
+#define RTCSC_RTE               ((ushort)0x0001)
+
+#define PISCR_PIRQ_MASK         ((ushort)0xff00)
+#define PISCR_PS                ((ushort)0x0080)
+#define PISCR_PIE               ((ushort)0x0004)
+#define PISCR_PTF               ((ushort)0x0002)
+#define PISCR_PTE               ((ushort)0x0001)
+
+/* Clocks and Reset.
+*/
+typedef struct clk_and_reset {
+        uint    car_sccr;
+        uint    car_plprcr;
+        uint    car_rsr;
+        char    res[0x74];        /* Reserved area                  */
+} car8xx_t;
+
+/* System Integration Timers keys.
+*/
+typedef struct sitk {
+        uint    sitk_tbscrk;
+        uint    sitk_tbreff0k;
+        uint    sitk_tbreff1k;
+        uint    sitk_tbk;
+        char    res1[0x10];
+        uint    sitk_rtcsck;
+        uint    sitk_rtck;
+        uint    sitk_rtseck;
+        uint    sitk_rtcalk;
+        char    res2[0x10];
+        uint    sitk_piscrk;
+        uint    sitk_pitck;
+        char    res3[0x38];
+} sitk8xx_t;
+
+/* Clocks and reset keys.
+*/
+typedef struct cark {
+        uint    cark_sccrk;
+        uint    cark_plprcrk;
+        uint    cark_rsrk;
+        char    res[0x474];
+} cark8xx_t;
+
+/* The key to unlock registers maintained by keep-alive power.
+*/
+#define KAPWR_KEY       ((unsigned int)0x55ccaa33)
+
+/* Video interface.  MPC823 Only.
+*/
+typedef struct vid823 {
+        ushort  vid_vccr;
+        ushort  res1;
+        u_char  vid_vsr;
+        u_char  res2;
+        u_char  vid_vcmr;
+        u_char  res3;
+        uint    vid_vbcb;
+        uint    res4;
+        uint    vid_vfcr0;
+        uint    vid_vfaa0;
+        uint    vid_vfba0;
+        uint    vid_vfcr1;
+        uint    vid_vfaa1;
+        uint    vid_vfba1;
+        u_char  res5[0x18];
+} vid823_t;
+
+/* LCD interface.  823 Only.
+*/
+typedef struct lcd {
+        uint    lcd_lccr;
+        uint    lcd_lchcr;
+        uint    lcd_lcvcr;
+        char    res1[4];
+        uint    lcd_lcfaa;
+        uint    lcd_lcfba;
+        char    lcd_lcsr;
+        char    res2[0x7];
+} lcd823_t;
+
+/* I2C
+*/
+typedef struct i2c {
+        u_char  i2c_i2mod;
+        char    res1[3];
+        u_char  i2c_i2add;
+        char    res2[3];
+        u_char  i2c_i2brg;
+        char    res3[3];
+        u_char  i2c_i2com;
+        char    res4[3];
+        u_char  i2c_i2cer;
+        char    res5[3];
+        u_char  i2c_i2cmr;
+        char    res6[0x8b];
+} i2c8xx_t;
+
+/* DMA control/status registers.
+*/
+typedef struct sdma_csr {
+        char    res1[4];
+        uint    sdma_sdar;
+        u_char  sdma_sdsr;
+        char    res3[3];
+        u_char  sdma_sdmr;
+        char    res4[3];
+        u_char  sdma_idsr1;
+        char    res5[3];
+        u_char  sdma_idmr1;
+        char    res6[3];
+        u_char  sdma_idsr2;
+        char    res7[3];
+        u_char  sdma_idmr2;
+        char    res8[0x13];
+} sdma8xx_t;
+
+/* Communication Processor Module Interrupt Controller.
+*/
+typedef struct cpm_ic {
+        ushort  cpic_civr;
+        char    res[0xe];
+        uint    cpic_cicr;
+        uint    cpic_cipr;
+        uint    cpic_cimr;
+        uint    cpic_cisr;
+} cpic8xx_t;
+
+/* Input/Output Port control/status registers.
+*/
+typedef struct io_port {
+        ushort  iop_padir;
+        ushort  iop_papar;
+        ushort  iop_paodr;
+        ushort  iop_padat;
+        char    res1[8];
+        ushort  iop_pcdir;
+        ushort  iop_pcpar;
+        ushort  iop_pcso;
+        ushort  iop_pcdat;
+        ushort  iop_pcint;
+        char    res2[6];
+        ushort  iop_pddir;
+        ushort  iop_pdpar;
+        char    res3[2];
+        ushort  iop_pddat;
+        uint    utmode;
+        char    res4[4];
+} iop8xx_t;
+
+/* Communication Processor Module Timers
+*/
+typedef struct cpm_timers {
+        ushort  cpmt_tgcr;
+        char    res1[0xe];
+        ushort  cpmt_tmr1;
+        ushort  cpmt_tmr2;
+        ushort  cpmt_trr1;
+        ushort  cpmt_trr2;
+        ushort  cpmt_tcr1;
+        ushort  cpmt_tcr2;
+        ushort  cpmt_tcn1;
+        ushort  cpmt_tcn2;
+        ushort  cpmt_tmr3;
+        ushort  cpmt_tmr4;
+        ushort  cpmt_trr3;
+        ushort  cpmt_trr4;
+        ushort  cpmt_tcr3;
+        ushort  cpmt_tcr4;
+        ushort  cpmt_tcn3;
+        ushort  cpmt_tcn4;
+        ushort  cpmt_ter1;
+        ushort  cpmt_ter2;
+        ushort  cpmt_ter3;
+        ushort  cpmt_ter4;
+        char    res2[8];
+} cpmtimer8xx_t;
+
+/* Finally, the Communication Processor stuff.....
+*/
+typedef struct scc {            /* Serial communication channels */
+        uint    scc_gsmrl;
+        uint    scc_gsmrh;
+        ushort  scc_psmr;
+        char    res1[2];
+        ushort  scc_todr;
+        ushort  scc_dsr;
+        ushort  scc_scce;
+        char    res2[2];
+        ushort  scc_sccm;
+        char    res3;
+        u_char  scc_sccs;
+        char    res4[8];
+} scc_t;
+
+typedef struct smc {            /* Serial management channels */
+        char    res1[2];
+        ushort  smc_smcmr;
+        char    res2[2];
+        u_char  smc_smce;
+        char    res3[3];
+        u_char  smc_smcm;
+        char    res4[5];
+} smc_t;
+
+/* MPC860T Fast Ethernet Controller.  It isn't part of the CPM, but
+ * it fits within the address space.
+ */
+
+typedef struct fec {
+        uint    fec_addr_low;           /* lower 32 bits of station address     */
+        ushort  fec_addr_high;          /* upper 16 bits of station address     */
+        ushort  res1;                   /* reserved                             */
+        uint    fec_hash_table_high;    /* upper 32-bits of hash table          */
+        uint    fec_hash_table_low;     /* lower 32-bits of hash table          */
+        uint    fec_r_des_start;        /* beginning of Rx descriptor ring      */
+        uint    fec_x_des_start;        /* beginning of Tx descriptor ring      */
+        uint    fec_r_buff_size;        /* Rx buffer size                       */
+        uint    res2[9];                /* reserved                             */
+        uint    fec_ecntrl;             /* ethernet control register            */
+        uint    fec_ievent;             /* interrupt event register             */
+        uint    fec_imask;              /* interrupt mask register              */
+        uint    fec_ivec;               /* interrupt level and vector status    */
+        uint    fec_r_des_active;       /* Rx ring updated flag                 */
+        uint    fec_x_des_active;       /* Tx ring updated flag                 */
+        uint    res3[10];               /* reserved                             */
+        uint    fec_mii_data;           /* MII data register                    */
+        uint    fec_mii_speed;          /* MII speed control register           */
+        uint    res4[17];               /* reserved                             */
+        uint    fec_r_bound;            /* end of RAM (read-only)               */
+        uint    fec_r_fstart;           /* Rx FIFO start address                */
+        uint    res5[6];                /* reserved                             */
+        uint    fec_x_fstart;           /* Tx FIFO start address                */
+        uint    res6[17];               /* reserved                             */
+        uint    fec_fun_code;           /* fec SDMA function code               */
+        uint    res7[3];                /* reserved                             */
+        uint    fec_r_cntrl;            /* Rx control register                  */
+        uint    fec_r_hash;             /* Rx hash register                     */
+        uint    res8[14];               /* reserved                             */
+        uint    fec_x_cntrl;            /* Tx control register                  */
+        uint    res9[0x1e];             /* reserved                             */
+} fec_t;
+
+/* The FEC and LCD color map share the same address space....
+ * I guess we will never see an 823T :-).
+ */
+union fec_lcd {
+        fec_t   fl_un_fec;
+        u_char  fl_un_cmap[0x200];
+};
+
+typedef struct comm_proc {
+        /* General control and status registers.
+        */
+        ushort  cp_cpcr;
+        u_char  res1[2];
+        ushort  cp_rccr;
+        u_char  res2;
+        u_char  cp_rmds;
+        u_char  res3[4];
+        ushort  cp_cpmcr1;
+        ushort  cp_cpmcr2;
+        ushort  cp_cpmcr3;
+        ushort  cp_cpmcr4;
+        u_char  res4[2];
+        ushort  cp_rter;
+        u_char  res5[2];
+        ushort  cp_rtmr;
+        u_char  res6[0x14];
+
+        /* Baud rate generators.
+        */
+        uint    cp_brgc1;
+        uint    cp_brgc2;
+        uint    cp_brgc3;
+        uint    cp_brgc4;
+
+        /* Serial Communication Channels.
+        */
+        scc_t   cp_scc[4];
+
+        /* Serial Management Channels.
+        */
+        smc_t   cp_smc[2];
+
+        /* Serial Peripheral Interface.
+        */
+        ushort  cp_spmode;
+        u_char  res7[4];
+        u_char  cp_spie;
+        u_char  res8[3];
+        u_char  cp_spim;
+        u_char  res9[2];
+        u_char  cp_spcom;
+        u_char  res10[2];
+
+        /* Parallel Interface Port.
+        */
+        u_char  res11[2];
+        ushort  cp_pipc;
+        u_char  res12[2];
+        ushort  cp_ptpr;
+        uint    cp_pbdir;
+        uint    cp_pbpar;
+        u_char  res13[2];
+        ushort  cp_pbodr;
+        uint    cp_pbdat;
+
+        /* Port E - MPC87x/88x only.
+         */
+        uint    cp_pedir;
+        uint    cp_pepar;
+        uint    cp_peso;
+        uint    cp_peodr;
+        uint    cp_pedat;
+
+        /* Communications Processor Timing Register -
+           Contains RMII Timing for the FECs on MPC87x/88x only.
+        */
+        uint    cp_cptr;
+
+        /* Serial Interface and Time Slot Assignment.
+        */
+        uint    cp_simode;
+        u_char  cp_sigmr;
+        u_char  res15;
+        u_char  cp_sistr;
+        u_char  cp_sicmr;
+        u_char  res16[4];
+        uint    cp_sicr;
+        uint    cp_sirp;
+        u_char  res17[0xc];
+
+        /* 256 bytes of MPC823 video controller RAM array.
+        */
+        u_char  cp_vcram[0x100];
+        u_char  cp_siram[0x200];
+
+        /* The fast ethernet controller is not really part of the CPM,
+         * but it resides in the address space.
+         * The LCD color map is also here.
+         */
+        union   fec_lcd fl_un;
+#define cp_fec          fl_un.fl_un_fec
+#define lcd_cmap        fl_un.fl_un_cmap
+        char    res18[0xE00];
+
+        /* The DUET family has a second FEC here */
+        fec_t   cp_fec2;
+#define cp_fec1 cp_fec  /* consistency macro */
+
+        /* Dual Ported RAM follows.
+         * There are many different formats for this memory area
+         * depending upon the devices used and options chosen.
+         * Some processors don't have all of it populated.
+         */
+        u_char  cp_dpmem[0x1C00];       /* BD / Data / ucode */
+        u_char  cp_dparam[0x400];       /* Parameter RAM */
+} cpm8xx_t;
+
+/* Internal memory map.
+*/
+typedef struct immap {
+        sysconf8xx_t    im_siu_conf;    /* SIU Configuration */
+        pcmconf8xx_t    im_pcmcia;      /* PCMCIA Configuration */
+        memctl8xx_t     im_memctl;      /* Memory Controller */
+        sit8xx_t        im_sit;         /* System integration timers */
+        car8xx_t        im_clkrst;      /* Clocks and reset */
+        sitk8xx_t       im_sitk;        /* Sys int timer keys */
+        cark8xx_t       im_clkrstk;     /* Clocks and reset keys */
+        vid823_t        im_vid;         /* Video (823 only) */
+        lcd823_t        im_lcd;         /* LCD (823 only) */
+        i2c8xx_t        im_i2c;         /* I2C control/status */
+        sdma8xx_t       im_sdma;        /* SDMA control/status */
+        cpic8xx_t       im_cpic;        /* CPM Interrupt Controller */
+        iop8xx_t        im_ioport;      /* IO Port control/status */
+        cpmtimer8xx_t   im_cpmtimer;    /* CPM timers */
+        cpm8xx_t        im_cpm;         /* Communication processor */
+} immap_t;
+
+#endif /* __IMMAP_8XX__ */
+#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index c44810b9d322..f3fc733758f5 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -5,7 +5,7 @@
  * PowerPC atomic operations
  */
 
-typedef struct { volatile int counter; } atomic_t;
+typedef struct { int counter; } atomic_t;
 
 #ifdef __KERNEL__
 #include <linux/compiler.h>
@@ -15,8 +15,19 @@ typedef struct { volatile int counter; } atomic_t;
 
 #define ATOMIC_INIT(i)          { (i) }
 
-#define atomic_read(v)          ((v)->counter)
-#define atomic_set(v,i)         (((v)->counter) = (i))
+static __inline__ int atomic_read(const atomic_t *v)
+{
+        int t;
+
+        __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter));
+
+        return t;
+}
+
+static __inline__ void atomic_set(atomic_t *v, int i)
+{
+        __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i));
+}
 
 static __inline__ void atomic_add(int a, atomic_t *v)
 {
@@ -240,12 +251,23 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
 
 #ifdef __powerpc64__
 
-typedef struct { volatile long counter; } atomic64_t;
+typedef struct { long counter; } atomic64_t;
 
 #define ATOMIC64_INIT(i)        { (i) }
 
-#define atomic64_read(v)        ((v)->counter)
-#define atomic64_set(v,i)       (((v)->counter) = (i))
+static __inline__ long atomic64_read(const atomic64_t *v)
+{
+        long t;
+
+        __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter));
+
+        return t;
+}
+
+static __inline__ void atomic64_set(atomic64_t *v, long i)
+{
+        __asm__ __volatile__("std%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i));
+}
 
 static __inline__ void atomic64_add(long a, atomic64_t *v)
 {
diff --git a/include/asm-powerpc/clk_interface.h b/include/asm-powerpc/clk_interface.h
new file mode 100644
index 000000000000..ab1882c1e176
--- /dev/null
+++ b/include/asm-powerpc/clk_interface.h
@@ -0,0 +1,20 @@
+#ifndef __ASM_POWERPC_CLK_INTERFACE_H
+#define __ASM_POWERPC_CLK_INTERFACE_H
+
+#include <linux/clk.h>
+
+struct clk_interface {
+        struct clk*     (*clk_get)      (struct device *dev, const char *id);
+        int             (*clk_enable)   (struct clk *clk);
+        void            (*clk_disable)  (struct clk *clk);
+        unsigned long   (*clk_get_rate) (struct clk *clk);
+        void            (*clk_put)      (struct clk *clk);
+        long            (*clk_round_rate) (struct clk *clk, unsigned long rate);
+        int             (*clk_set_rate) (struct clk *clk, unsigned long rate);
+        int             (*clk_set_parent) (struct clk *clk, struct clk *parent);
+        struct clk*     (*clk_get_parent) (struct clk *clk);
+};
+
+extern struct clk_interface clk_functions;
+
+#endif /* __ASM_POWERPC_CLK_INTERFACE_H */
diff --git a/include/asm-powerpc/commproc.h b/include/asm-powerpc/commproc.h
new file mode 100644
index 000000000000..397248705e0e
--- /dev/null
+++ b/include/asm-powerpc/commproc.h
@@ -0,0 +1,692 @@
+/*
+ * MPC8xx Communication Processor Module.
+ * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
+ *
+ * This file contains structures and information for the communication
+ * processor channels.  Some CPM control and status is available
+ * throught the MPC8xx internal memory map.  See immap.h for details.
+ * This file only contains what I need for the moment, not the total
+ * CPM capabilities.  I (or someone else) will add definitions as they
+ * are needed.  -- Dan
+ *
+ * On the MBX board, EPPC-Bug loads CPM microcode into the first 512
+ * bytes of the DP RAM and relocates the I2C parameter area to the
+ * IDMA1 space.  The remaining DP RAM is available for buffer descriptors
+ * or other use.
+ */
+#ifndef __CPM_8XX__
+#define __CPM_8XX__
+
+#include <asm/8xx_immap.h>
+#include <asm/ptrace.h>
+
+/* CPM Command register.
+*/
+#define CPM_CR_RST      ((ushort)0x8000)
+#define CPM_CR_OPCODE   ((ushort)0x0f00)
+#define CPM_CR_CHAN     ((ushort)0x00f0)
+#define CPM_CR_FLG      ((ushort)0x0001)
+
+/* Some commands (there are more...later)
+*/
+#define CPM_CR_INIT_TRX         ((ushort)0x0000)
+#define CPM_CR_INIT_RX          ((ushort)0x0001)
+#define CPM_CR_INIT_TX          ((ushort)0x0002)
+#define CPM_CR_HUNT_MODE        ((ushort)0x0003)
+#define CPM_CR_STOP_TX          ((ushort)0x0004)
+#define CPM_CR_GRA_STOP_TX      ((ushort)0x0005)
+#define CPM_CR_RESTART_TX       ((ushort)0x0006)
+#define CPM_CR_CLOSE_RX_BD      ((ushort)0x0007)
+#define CPM_CR_SET_GADDR        ((ushort)0x0008)
+#define CPM_CR_SET_TIMER        CPM_CR_SET_GADDR
+
+/* Channel numbers.
+*/
+#define CPM_CR_CH_SCC1          ((ushort)0x0000)
+#define CPM_CR_CH_I2C           ((ushort)0x0001)        /* I2C and IDMA1 */
+#define CPM_CR_CH_SCC2          ((ushort)0x0004)
+#define CPM_CR_CH_SPI           ((ushort)0x0005)        /* SPI / IDMA2 / Timers */
+#define CPM_CR_CH_TIMER         CPM_CR_CH_SPI
+#define CPM_CR_CH_SCC3          ((ushort)0x0008)
+#define CPM_CR_CH_SMC1          ((ushort)0x0009)        /* SMC1 / DSP1 */
+#define CPM_CR_CH_SCC4          ((ushort)0x000c)
+#define CPM_CR_CH_SMC2          ((ushort)0x000d)        /* SMC2 / DSP2 */
+
+#define mk_cr_cmd(CH, CMD)      ((CMD << 8) | (CH << 4))
+
+/* The dual ported RAM is multi-functional.  Some areas can be (and are
+ * being) used for microcode.  There is an area that can only be used
+ * as data ram for buffer descriptors, which is all we use right now.
+ * Currently the first 512 and last 256 bytes are used for microcode.
+ */
+#define CPM_DATAONLY_BASE       ((uint)0x0800)
+#define CPM_DATAONLY_SIZE       ((uint)0x0700)
+#define CPM_DP_NOSPACE          ((uint)0x7fffffff)
+
+/* Export the base address of the communication processor registers
+ * and dual port ram.
+ */
+extern  cpm8xx_t        *cpmp;          /* Pointer to comm processor */
+extern unsigned long cpm_dpalloc(uint size, uint align);
+extern int cpm_dpfree(unsigned long offset);
+extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
+extern void cpm_dpdump(void);
+extern void *cpm_dpram_addr(unsigned long offset);
+extern uint cpm_dpram_phys(u8* addr);
+extern void cpm_setbrg(uint brg, uint rate);
+
+extern uint m8xx_cpm_hostalloc(uint size);
+extern int  m8xx_cpm_hostfree(uint start);
+extern void m8xx_cpm_hostdump(void);
+
+extern void cpm_load_patch(volatile immap_t *immr);
+
+/* Buffer descriptors used by many of the CPM protocols.
+*/
+typedef struct cpm_buf_desc {
+        ushort  cbd_sc;         /* Status and Control */
+        ushort  cbd_datlen;     /* Data length in buffer */
+        uint    cbd_bufaddr;    /* Buffer address in host memory */
+} cbd_t;
+
+#define BD_SC_EMPTY     ((ushort)0x8000)        /* Receive is empty */
+#define BD_SC_READY     ((ushort)0x8000)        /* Transmit is ready */
+#define BD_SC_WRAP      ((ushort)0x2000)        /* Last buffer descriptor */
+#define BD_SC_INTRPT    ((ushort)0x1000)        /* Interrupt on change */
+#define BD_SC_LAST      ((ushort)0x0800)        /* Last buffer in frame */
+#define BD_SC_TC        ((ushort)0x0400)        /* Transmit CRC */
+#define BD_SC_CM        ((ushort)0x0200)        /* Continous mode */
+#define BD_SC_ID        ((ushort)0x0100)        /* Rec'd too many idles */
+#define BD_SC_P         ((ushort)0x0100)        /* xmt preamble */
+#define BD_SC_BR        ((ushort)0x0020)        /* Break received */
+#define BD_SC_FR        ((ushort)0x0010)        /* Framing error */
+#define BD_SC_PR        ((ushort)0x0008)        /* Parity error */
+#define BD_SC_NAK       ((ushort)0x0004)        /* NAK - did not respond */
+#define BD_SC_OV        ((ushort)0x0002)        /* Overrun */
+#define BD_SC_UN        ((ushort)0x0002)        /* Underrun */
+#define BD_SC_CD        ((ushort)0x0001)        /* ?? */
+#define BD_SC_CL        ((ushort)0x0001)        /* Collision */
+
+/* Parameter RAM offsets.
+*/
+#define PROFF_SCC1      ((uint)0x0000)
+#define PROFF_IIC       ((uint)0x0080)
+#define PROFF_SCC2      ((uint)0x0100)
+#define PROFF_SPI       ((uint)0x0180)
+#define PROFF_SCC3      ((uint)0x0200)
+#define PROFF_SMC1      ((uint)0x0280)
+#define PROFF_SCC4      ((uint)0x0300)
+#define PROFF_SMC2      ((uint)0x0380)
+
+/* Define enough so I can at least use the serial port as a UART.
+ * The MBX uses SMC1 as the host serial port.
+ */
+typedef struct smc_uart {
+        ushort  smc_rbase;      /* Rx Buffer descriptor base address */
+        ushort  smc_tbase;      /* Tx Buffer descriptor base address */
+        u_char  smc_rfcr;       /* Rx function code */
+        u_char  smc_tfcr;       /* Tx function code */
+        ushort  smc_mrblr;      /* Max receive buffer length */
+        uint    smc_rstate;     /* Internal */
+        uint    smc_idp;        /* Internal */
+        ushort  smc_rbptr;      /* Internal */
+        ushort  smc_ibc;        /* Internal */
+        uint    smc_rxtmp;      /* Internal */
+        uint    smc_tstate;     /* Internal */
+        uint    smc_tdp;        /* Internal */
+        ushort  smc_tbptr;      /* Internal */
+        ushort  smc_tbc;        /* Internal */
+        uint    smc_txtmp;      /* Internal */
+        ushort  smc_maxidl;     /* Maximum idle characters */
+        ushort  smc_tmpidl;     /* Temporary idle counter */
+        ushort  smc_brklen;     /* Last received break length */
+        ushort  smc_brkec;      /* rcv'd break condition counter */
+        ushort  smc_brkcr;      /* xmt break count register */
+        ushort  smc_rmask;      /* Temporary bit mask */
+        char    res1[8];        /* Reserved */
+        ushort  smc_rpbase;     /* Relocation pointer */
+} smc_uart_t;
+
+/* Function code bits.
+*/
+#define SMC_EB  ((u_char)0x10)  /* Set big endian byte order */
+
+/* SMC uart mode register.
+*/
+#define SMCMR_REN       ((ushort)0x0001)
+#define SMCMR_TEN       ((ushort)0x0002)
+#define SMCMR_DM        ((ushort)0x000c)
+#define SMCMR_SM_GCI    ((ushort)0x0000)
+#define SMCMR_SM_UART   ((ushort)0x0020)
+#define SMCMR_SM_TRANS  ((ushort)0x0030)
+#define SMCMR_SM_MASK   ((ushort)0x0030)
+#define SMCMR_PM_EVEN   ((ushort)0x0100)        /* Even parity, else odd */
+#define SMCMR_REVD      SMCMR_PM_EVEN
+#define SMCMR_PEN       ((ushort)0x0200)        /* Parity enable */
+#define SMCMR_BS        SMCMR_PEN
+#define SMCMR_SL        ((ushort)0x0400)        /* Two stops, else one */
+#define SMCR_CLEN_MASK  ((ushort)0x7800)        /* Character length */
+#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
+
+/* SMC2 as Centronics parallel printer.  It is half duplex, in that
+ * it can only receive or transmit.  The parameter ram values for
+ * each direction are either unique or properly overlap, so we can
+ * include them in one structure.
+ */
+typedef struct smc_centronics {
+        ushort  scent_rbase;
+        ushort  scent_tbase;
+        u_char  scent_cfcr;
+        u_char  scent_smask;
+        ushort  scent_mrblr;
+        uint    scent_rstate;
+        uint    scent_r_ptr;
+        ushort  scent_rbptr;
+        ushort  scent_r_cnt;
+        uint    scent_rtemp;
+        uint    scent_tstate;
+        uint    scent_t_ptr;
+        ushort  scent_tbptr;
+        ushort  scent_t_cnt;
+        uint    scent_ttemp;
+        ushort  scent_max_sl;
+        ushort  scent_sl_cnt;
+        ushort  scent_character1;
+        ushort  scent_character2;
+        ushort  scent_character3;
+        ushort  scent_character4;
+        ushort  scent_character5;
+        ushort  scent_character6;
+        ushort  scent_character7;
+        ushort  scent_character8;
+        ushort  scent_rccm;
+        ushort  scent_rccr;
+} smc_cent_t;
+
+/* Centronics Status Mask Register.
+*/
+#define SMC_CENT_F      ((u_char)0x08)
+#define SMC_CENT_PE     ((u_char)0x04)
+#define SMC_CENT_S      ((u_char)0x02)
+
+/* SMC Event and Mask register.
+*/
+#define SMCM_BRKE       ((unsigned char)0x40)   /* When in UART Mode */
+#define SMCM_BRK        ((unsigned char)0x10)   /* When in UART Mode */
+#define SMCM_TXE        ((unsigned char)0x10)   /* When in Transparent Mode */
+#define SMCM_BSY        ((unsigned char)0x04)
+#define SMCM_TX         ((unsigned char)0x02)
+#define SMCM_RX         ((unsigned char)0x01)
+
+/* Baud rate generators.
+*/
+#define CPM_BRG_RST             ((uint)0x00020000)
+#define CPM_BRG_EN              ((uint)0x00010000)
+#define CPM_BRG_EXTC_INT        ((uint)0x00000000)
+#define CPM_BRG_EXTC_CLK2       ((uint)0x00004000)
+#define CPM_BRG_EXTC_CLK6       ((uint)0x00008000)
+#define CPM_BRG_ATB             ((uint)0x00002000)
+#define CPM_BRG_CD_MASK         ((uint)0x00001ffe)
+#define CPM_BRG_DIV16           ((uint)0x00000001)
+
+/* SI Clock Route Register
+*/
+#define SICR_RCLK_SCC1_BRG1     ((uint)0x00000000)
+#define SICR_TCLK_SCC1_BRG1     ((uint)0x00000000)
+#define SICR_RCLK_SCC2_BRG2     ((uint)0x00000800)
+#define SICR_TCLK_SCC2_BRG2     ((uint)0x00000100)
+#define SICR_RCLK_SCC3_BRG3     ((uint)0x00100000)
+#define SICR_TCLK_SCC3_BRG3     ((uint)0x00020000)
+#define SICR_RCLK_SCC4_BRG4     ((uint)0x18000000)
+#define SICR_TCLK_SCC4_BRG4     ((uint)0x03000000)
+
+/* SCCs.
+*/
+#define SCC_GSMRH_IRP           ((uint)0x00040000)
+#define SCC_GSMRH_GDE           ((uint)0x00010000)
+#define SCC_GSMRH_TCRC_CCITT    ((uint)0x00008000)
+#define SCC_GSMRH_TCRC_BISYNC   ((uint)0x00004000)
+#define SCC_GSMRH_TCRC_HDLC     ((uint)0x00000000)
+#define SCC_GSMRH_REVD          ((uint)0x00002000)
+#define SCC_GSMRH_TRX           ((uint)0x00001000)
+#define SCC_GSMRH_TTX           ((uint)0x00000800)
+#define SCC_GSMRH_CDP           ((uint)0x00000400)
+#define SCC_GSMRH_CTSP          ((uint)0x00000200)
+#define SCC_GSMRH_CDS           ((uint)0x00000100)
+#define SCC_GSMRH_CTSS          ((uint)0x00000080)
+#define SCC_GSMRH_TFL           ((uint)0x00000040)
+#define SCC_GSMRH_RFW           ((uint)0x00000020)
+#define SCC_GSMRH_TXSY          ((uint)0x00000010)
+#define SCC_GSMRH_SYNL16        ((uint)0x0000000c)
+#define SCC_GSMRH_SYNL8         ((uint)0x00000008)
+#define SCC_GSMRH_SYNL4         ((uint)0x00000004)
+#define SCC_GSMRH_RTSM          ((uint)0x00000002)
+#define SCC_GSMRH_RSYN          ((uint)0x00000001)
+
+#define SCC_GSMRL_SIR           ((uint)0x80000000)      /* SCC2 only */
+#define SCC_GSMRL_EDGE_NONE     ((uint)0x60000000)
+#define SCC_GSMRL_EDGE_NEG      ((uint)0x40000000)
+#define SCC_GSMRL_EDGE_POS      ((uint)0x20000000)
+#define SCC_GSMRL_EDGE_BOTH     ((uint)0x00000000)
+#define SCC_GSMRL_TCI           ((uint)0x10000000)
+#define SCC_GSMRL_TSNC_3        ((uint)0x0c000000)
+#define SCC_GSMRL_TSNC_4        ((uint)0x08000000)
+#define SCC_GSMRL_TSNC_14       ((uint)0x04000000)
+#define SCC_GSMRL_TSNC_INF      ((uint)0x00000000)
+#define SCC_GSMRL_RINV          ((uint)0x02000000)
+#define SCC_GSMRL_TINV          ((uint)0x01000000)
+#define SCC_GSMRL_TPL_128       ((uint)0x00c00000)
+#define SCC_GSMRL_TPL_64        ((uint)0x00a00000)
+#define SCC_GSMRL_TPL_48        ((uint)0x00800000)
+#define SCC_GSMRL_TPL_32        ((uint)0x00600000)
+#define SCC_GSMRL_TPL_16        ((uint)0x00400000)
+#define SCC_GSMRL_TPL_8         ((uint)0x00200000)
+#define SCC_GSMRL_TPL_NONE      ((uint)0x00000000)
+#define SCC_GSMRL_TPP_ALL1      ((uint)0x00180000)
+#define SCC_GSMRL_TPP_01        ((uint)0x00100000)
+#define SCC_GSMRL_TPP_10        ((uint)0x00080000)
+#define SCC_GSMRL_TPP_ZEROS     ((uint)0x00000000)
+#define SCC_GSMRL_TEND          ((uint)0x00040000)
+#define SCC_GSMRL_TDCR_32       ((uint)0x00030000)
+#define SCC_GSMRL_TDCR_16       ((uint)0x00020000)
+#define SCC_GSMRL_TDCR_8        ((uint)0x00010000)
+#define SCC_GSMRL_TDCR_1        ((uint)0x00000000)
+#define SCC_GSMRL_RDCR_32       ((uint)0x0000c000)
+#define SCC_GSMRL_RDCR_16       ((uint)0x00008000)
+#define SCC_GSMRL_RDCR_8        ((uint)0x00004000)
+#define SCC_GSMRL_RDCR_1        ((uint)0x00000000)
+#define SCC_GSMRL_RENC_DFMAN    ((uint)0x00003000)
+#define SCC_GSMRL_RENC_MANCH    ((uint)0x00002000)
+#define SCC_GSMRL_RENC_FM0      ((uint)0x00001000)
+#define SCC_GSMRL_RENC_NRZI     ((uint)0x00000800)
+#define SCC_GSMRL_RENC_NRZ      ((uint)0x00000000)
+#define SCC_GSMRL_TENC_DFMAN    ((uint)0x00000600)
+#define SCC_GSMRL_TENC_MANCH    ((uint)0x00000400)
+#define SCC_GSMRL_TENC_FM0      ((uint)0x00000200)
+#define SCC_GSMRL_TENC_NRZI     ((uint)0x00000100)
+#define SCC_GSMRL_TENC_NRZ      ((uint)0x00000000)
+#define SCC_GSMRL_DIAG_LE       ((uint)0x000000c0)      /* Loop and echo */
+#define SCC_GSMRL_DIAG_ECHO     ((uint)0x00000080)
+#define SCC_GSMRL_DIAG_LOOP     ((uint)0x00000040)
+#define SCC_GSMRL_DIAG_NORM     ((uint)0x00000000)
+#define SCC_GSMRL_ENR           ((uint)0x00000020)
+#define SCC_GSMRL_ENT           ((uint)0x00000010)
+#define SCC_GSMRL_MODE_ENET     ((uint)0x0000000c)
+#define SCC_GSMRL_MODE_QMC      ((uint)0x0000000a)
+#define SCC_GSMRL_MODE_DDCMP    ((uint)0x00000009)
+#define SCC_GSMRL_MODE_BISYNC   ((uint)0x00000008)
+#define SCC_GSMRL_MODE_V14      ((uint)0x00000007)
+#define SCC_GSMRL_MODE_AHDLC    ((uint)0x00000006)
+#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005)
+#define SCC_GSMRL_MODE_UART     ((uint)0x00000004)
+#define SCC_GSMRL_MODE_SS7      ((uint)0x00000003)
+#define SCC_GSMRL_MODE_ATALK    ((uint)0x00000002)
+#define SCC_GSMRL_MODE_HDLC     ((uint)0x00000000)
+
+#define SCC_TODR_TOD            ((ushort)0x8000)
+
+/* SCC Event and Mask register.
+*/
+#define SCCM_TXE        ((unsigned char)0x10)
+#define SCCM_BSY        ((unsigned char)0x04)
+#define SCCM_TX         ((unsigned char)0x02)
+#define SCCM_RX         ((unsigned char)0x01)
+
+typedef struct scc_param {
+        ushort  scc_rbase;      /* Rx Buffer descriptor base address */
+        ushort  scc_tbase;      /* Tx Buffer descriptor base address */
+        u_char  scc_rfcr;       /* Rx function code */
+        u_char  scc_tfcr;       /* Tx function code */
+        ushort  scc_mrblr;      /* Max receive buffer length */
+        uint    scc_rstate;     /* Internal */
+        uint    scc_idp;        /* Internal */
+        ushort  scc_rbptr;      /* Internal */
+        ushort  scc_ibc;        /* Internal */
+        uint    scc_rxtmp;      /* Internal */
+        uint    scc_tstate;     /* Internal */
+        uint    scc_tdp;        /* Internal */
+        ushort  scc_tbptr;      /* Internal */
+        ushort  scc_tbc;        /* Internal */
+        uint    scc_txtmp;      /* Internal */
+        uint    scc_rcrc;       /* Internal */
+        uint    scc_tcrc;       /* Internal */
+} sccp_t;
+
+/* Function code bits.
+*/
+#define SCC_EB  ((u_char)0x10)  /* Set big endian byte order */
+
+/* CPM Ethernet through SCCx.
+ */
+typedef struct scc_enet {
+        sccp_t  sen_genscc;
+        uint    sen_cpres;      /* Preset CRC */
+        uint    sen_cmask;      /* Constant mask for CRC */
+        uint    sen_crcec;      /* CRC Error counter */
+        uint    sen_alec;       /* alignment error counter */
+        uint    sen_disfc;      /* discard frame counter */
+        ushort  sen_pads;       /* Tx short frame pad character */
+        ushort  sen_retlim;     /* Retry limit threshold */
+        ushort  sen_retcnt;     /* Retry limit counter */
+        ushort  sen_maxflr;     /* maximum frame length register */
+        ushort  sen_minflr;     /* minimum frame length register */
+        ushort  sen_maxd1;      /* maximum DMA1 length */
+        ushort  sen_maxd2;      /* maximum DMA2 length */
+        ushort  sen_maxd;       /* Rx max DMA */
+        ushort  sen_dmacnt;     /* Rx DMA counter */
+        ushort  sen_maxb;       /* Max BD byte count */
+        ushort  sen_gaddr1;     /* Group address filter */
+        ushort  sen_gaddr2;
+        ushort  sen_gaddr3;
+        ushort  sen_gaddr4;
+        uint    sen_tbuf0data0; /* Save area 0 - current frame */
+        uint    sen_tbuf0data1; /* Save area 1 - current frame */
+        uint    sen_tbuf0rba;   /* Internal */
+        uint    sen_tbuf0crc;   /* Internal */
+        ushort  sen_tbuf0bcnt;  /* Internal */
+        ushort  sen_paddrh;     /* physical address (MSB) */
+        ushort  sen_paddrm;
+        ushort  sen_paddrl;     /* physical address (LSB) */
+        ushort  sen_pper;       /* persistence */
+        ushort  sen_rfbdptr;    /* Rx first BD pointer */
+        ushort  sen_tfbdptr;    /* Tx first BD pointer */
+        ushort  sen_tlbdptr;    /* Tx last BD pointer */
+        uint    sen_tbuf1data0; /* Save area 0 - current frame */
+        uint    sen_tbuf1data1; /* Save area 1 - current frame */
+        uint    sen_tbuf1rba;   /* Internal */
+        uint    sen_tbuf1crc;   /* Internal */
+        ushort  sen_tbuf1bcnt;  /* Internal */
+        ushort  sen_txlen;      /* Tx Frame length counter */
+        ushort  sen_iaddr1;     /* Individual address filter */
+        ushort  sen_iaddr2;
+        ushort  sen_iaddr3;
+        ushort  sen_iaddr4;
+        ushort  sen_boffcnt;    /* Backoff counter */
+
+        /* NOTE: Some versions of the manual have the following items
+         * incorrectly documented.  Below is the proper order.
+         */
+        ushort  sen_taddrh;     /* temp address (MSB) */
+        ushort  sen_taddrm;
+        ushort  sen_taddrl;     /* temp address (LSB) */
+} scc_enet_t;
+
+/* SCC Event register as used by Ethernet.
+*/
+#define SCCE_ENET_GRA   ((ushort)0x0080)        /* Graceful stop complete */
+#define SCCE_ENET_TXE   ((ushort)0x0010)        /* Transmit Error */
+#define SCCE_ENET_RXF   ((ushort)0x0008)        /* Full frame received */
+#define SCCE_ENET_BSY   ((ushort)0x0004)        /* All incoming buffers full */
+#define SCCE_ENET_TXB   ((ushort)0x0002)        /* A buffer was transmitted */
+#define SCCE_ENET_RXB   ((ushort)0x0001)        /* A buffer was received */
+
+/* SCC Mode Register (PMSR) as used by Ethernet.
+*/
+#define SCC_PSMR_HBC    ((ushort)0x8000)        /* Enable heartbeat */
+#define SCC_PSMR_FC     ((ushort)0x4000)        /* Force collision */
+#define SCC_PSMR_RSH    ((ushort)0x2000)        /* Receive short frames */
+#define SCC_PSMR_IAM    ((ushort)0x1000)        /* Check individual hash */
+#define SCC_PSMR_ENCRC  ((ushort)0x0800)        /* Ethernet CRC mode */
+#define SCC_PSMR_PRO    ((ushort)0x0200)        /* Promiscuous mode */
+#define SCC_PSMR_BRO    ((ushort)0x0100)        /* Catch broadcast pkts */
+#define SCC_PSMR_SBT    ((ushort)0x0080)        /* Special backoff timer */
+#define SCC_PSMR_LPB    ((ushort)0x0040)        /* Set Loopback mode */
+#define SCC_PSMR_SIP    ((ushort)0x0020)        /* Sample Input Pins */
+#define SCC_PSMR_LCW    ((ushort)0x0010)        /* Late collision window */
+#define SCC_PSMR_NIB22  ((ushort)0x000a)        /* Start frame search */
+#define SCC_PSMR_FDE    ((ushort)0x0001)        /* Full duplex enable */
+
+/* Buffer descriptor control/status used by Ethernet receive.
+*/
+#define BD_ENET_RX_EMPTY        ((ushort)0x8000)
+#define BD_ENET_RX_WRAP         ((ushort)0x2000)
+#define BD_ENET_RX_INTR         ((ushort)0x1000)
+#define BD_ENET_RX_LAST         ((ushort)0x0800)
+#define BD_ENET_RX_FIRST        ((ushort)0x0400)
+#define BD_ENET_RX_MISS         ((ushort)0x0100)
+#define BD_ENET_RX_LG           ((ushort)0x0020)
+#define BD_ENET_RX_NO           ((ushort)0x0010)
+#define BD_ENET_RX_SH           ((ushort)0x0008)
+#define BD_ENET_RX_CR           ((ushort)0x0004)
+#define BD_ENET_RX_OV           ((ushort)0x0002)
+#define BD_ENET_RX_CL           ((ushort)0x0001)
+#define BD_ENET_RX_BC           ((ushort)0x0080)        /* DA is Broadcast */
+#define BD_ENET_RX_MC           ((ushort)0x0040)        /* DA is Multicast */
+#define BD_ENET_RX_STATS        ((ushort)0x013f)        /* All status bits */
+
+/* Buffer descriptor control/status used by Ethernet transmit.
+*/
+#define BD_ENET_TX_READY        ((ushort)0x8000)
+#define BD_ENET_TX_PAD          ((ushort)0x4000)
+#define BD_ENET_TX_WRAP         ((ushort)0x2000)
+#define BD_ENET_TX_INTR         ((ushort)0x1000)
+#define BD_ENET_TX_LAST         ((ushort)0x0800)
+#define BD_ENET_TX_TC           ((ushort)0x0400)
+#define BD_ENET_TX_DEF          ((ushort)0x0200)
+#define BD_ENET_TX_HB           ((ushort)0x0100)
+#define BD_ENET_TX_LC           ((ushort)0x0080)
+#define BD_ENET_TX_RL           ((ushort)0x0040)
+#define BD_ENET_TX_RCMASK       ((ushort)0x003c)
+#define BD_ENET_TX_UN           ((ushort)0x0002)
+#define BD_ENET_TX_CSL          ((ushort)0x0001)
+#define BD_ENET_TX_STATS        ((ushort)0x03ff)        /* All status bits */
+
+/* SCC as UART
+*/
+typedef struct scc_uart {
+        sccp_t  scc_genscc;
+        char    res1[8];        /* Reserved */
+        ushort  scc_maxidl;     /* Maximum idle chars */
+        ushort  scc_idlc;       /* temp idle counter */
+        ushort  scc_brkcr;      /* Break count register */
+        ushort  scc_parec;      /* receive parity error counter */
+        ushort  scc_frmec;      /* receive framing error counter */
+        ushort  scc_nosec;      /* receive noise counter */
+        ushort  scc_brkec;      /* receive break condition counter */
+        ushort  scc_brkln;      /* last received break length */
+        ushort  scc_uaddr1;     /* UART address character 1 */
+        ushort  scc_uaddr2;     /* UART address character 2 */
+        ushort  scc_rtemp;      /* Temp storage */
+        ushort  scc_toseq;      /* Transmit out of sequence char */
+        ushort  scc_char1;      /* control character 1 */
+        ushort  scc_char2;      /* control character 2 */
+        ushort  scc_char3;      /* control character 3 */
+        ushort  scc_char4;      /* control character 4 */
+        ushort  scc_char5;      /* control character 5 */
+        ushort  scc_char6;      /* control character 6 */
+        ushort  scc_char7;      /* control character 7 */
+        ushort  scc_char8;      /* control character 8 */
+        ushort  scc_rccm;       /* receive control character mask */
+        ushort  scc_rccr;       /* receive control character register */
+        ushort  scc_rlbc;       /* receive last break character */
+} scc_uart_t;
+
+/* SCC Event and Mask registers when it is used as a UART.
+*/
+#define UART_SCCM_GLR           ((ushort)0x1000)
+#define UART_SCCM_GLT           ((ushort)0x0800)
+#define UART_SCCM_AB            ((ushort)0x0200)
+#define UART_SCCM_IDL           ((ushort)0x0100)
+#define UART_SCCM_GRA           ((ushort)0x0080)
+#define UART_SCCM_BRKE          ((ushort)0x0040)
+#define UART_SCCM_BRKS          ((ushort)0x0020)
+#define UART_SCCM_CCR           ((ushort)0x0008)
+#define UART_SCCM_BSY           ((ushort)0x0004)
+#define UART_SCCM_TX            ((ushort)0x0002)
+#define UART_SCCM_RX            ((ushort)0x0001)
+
+/* The SCC PMSR when used as a UART.
+*/
+#define SCU_PSMR_FLC            ((ushort)0x8000)
+#define SCU_PSMR_SL             ((ushort)0x4000)
+#define SCU_PSMR_CL             ((ushort)0x3000)
+#define SCU_PSMR_UM             ((ushort)0x0c00)
+#define SCU_PSMR_FRZ            ((ushort)0x0200)
+#define SCU_PSMR_RZS            ((ushort)0x0100)
+#define SCU_PSMR_SYN            ((ushort)0x0080)
+#define SCU_PSMR_DRT            ((ushort)0x0040)
+#define SCU_PSMR_PEN            ((ushort)0x0010)
+#define SCU_PSMR_RPM            ((ushort)0x000c)
+#define SCU_PSMR_REVP           ((ushort)0x0008)
+#define SCU_PSMR_TPM            ((ushort)0x0003)
+#define SCU_PSMR_TEVP           ((ushort)0x0002)
+
+/* CPM Transparent mode SCC.
+ */
+typedef struct scc_trans {
+        sccp_t  st_genscc;
+        uint    st_cpres;       /* Preset CRC */
+        uint    st_cmask;       /* Constant mask for CRC */
+} scc_trans_t;
+
+#define BD_SCC_TX_LAST          ((ushort)0x0800)
+
+/* IIC parameter RAM.
+*/
+typedef struct iic {
+        ushort  iic_rbase;      /* Rx Buffer descriptor base address */
+        ushort  iic_tbase;      /* Tx Buffer descriptor base address */
+        u_char  iic_rfcr;       /* Rx function code */
+        u_char  iic_tfcr;       /* Tx function code */
+        ushort  iic_mrblr;      /* Max receive buffer length */
+        uint    iic_rstate;     /* Internal */
+        uint    iic_rdp;        /* Internal */
+        ushort  iic_rbptr;      /* Internal */
+        ushort  iic_rbc;        /* Internal */
+        uint    iic_rxtmp;      /* Internal */
+        uint    iic_tstate;     /* Internal */
+        uint    iic_tdp;        /* Internal */
+        ushort  iic_tbptr;      /* Internal */
+        ushort  iic_tbc;        /* Internal */
+        uint    iic_txtmp;      /* Internal */
+        char    res1[4];        /* Reserved */
+        ushort  iic_rpbase;     /* Relocation pointer */
+        char    res2[2];        /* Reserved */
+} iic_t;
+
+#define BD_IIC_START            ((ushort)0x0400)
+
+/* SPI parameter RAM.
+*/
+typedef struct spi {
+        ushort  spi_rbase;      /* Rx Buffer descriptor base address */
+        ushort  spi_tbase;      /* Tx Buffer descriptor base address */
+        u_char  spi_rfcr;       /* Rx function code */
+        u_char  spi_tfcr;       /* Tx function code */
+        ushort  spi_mrblr;      /* Max receive buffer length */
+        uint    spi_rstate;     /* Internal */
+        uint    spi_rdp;        /* Internal */
+        ushort  spi_rbptr;      /* Internal */
+        ushort  spi_rbc;        /* Internal */
+        uint    spi_rxtmp;      /* Internal */
+        uint    spi_tstate;     /* Internal */
+        uint    spi_tdp;        /* Internal */
+        ushort  spi_tbptr;      /* Internal */
+        ushort  spi_tbc;        /* Internal */
+        uint    spi_txtmp;      /* Internal */
+        uint    spi_res;
+        ushort  spi_rpbase;     /* Relocation pointer */
+        ushort  spi_res2;
+} spi_t;
+
+/* SPI Mode register.
+*/
+#define SPMODE_LOOP     ((ushort)0x4000)        /* Loopback */
+#define SPMODE_CI       ((ushort)0x2000)        /* Clock Invert */
+#define SPMODE_CP       ((ushort)0x1000)        /* Clock Phase */
+#define SPMODE_DIV16    ((ushort)0x0800)        /* BRG/16 mode */
+#define SPMODE_REV      ((ushort)0x0400)        /* Reversed Data */
+#define SPMODE_MSTR     ((ushort)0x0200)        /* SPI Master */
+#define SPMODE_EN       ((ushort)0x0100)        /* Enable */
+#define SPMODE_LENMSK   ((ushort)0x00f0)        /* character length */
+#define SPMODE_LEN4     ((ushort)0x0030)        /*  4 bits per char */
+#define SPMODE_LEN8     ((ushort)0x0070)        /*  8 bits per char */
+#define SPMODE_LEN16    ((ushort)0x00f0)        /* 16 bits per char */
+#define SPMODE_PMMSK    ((ushort)0x000f)        /* prescale modulus */
+
+/* SPIE fields */
+#define SPIE_MME        0x20
+#define SPIE_TXE        0x10
+#define SPIE_BSY        0x04
+#define SPIE_TXB        0x02
+#define SPIE_RXB        0x01
+
+/*
+ * RISC Controller Configuration Register definitons
+ */
+#define RCCR_TIME       0x8000                  /* RISC Timer Enable */
+#define RCCR_TIMEP(t)   (((t) & 0x3F)<<8)       /* RISC Timer Period */
+#define RCCR_TIME_MASK  0x00FF                  /* not RISC Timer related bits */
+
+/* RISC Timer Parameter RAM offset */
+#define PROFF_RTMR      ((uint)0x01B0)
+
+typedef struct risc_timer_pram {
+        unsigned short  tm_base;        /* RISC Timer Table Base Address */
+        unsigned short  tm_ptr;         /* RISC Timer Table Pointer (internal) */
+        unsigned short  r_tmr;          /* RISC Timer Mode Register */
+        unsigned short  r_tmv;          /* RISC Timer Valid Register */
+        unsigned long   tm_cmd;         /* RISC Timer Command Register */
+        unsigned long   tm_cnt;         /* RISC Timer Internal Count */
+} rt_pram_t;
+
+/* Bits in RISC Timer Command Register */
+#define TM_CMD_VALID    0x80000000      /* Valid - Enables the timer */
+#define TM_CMD_RESTART  0x40000000      /* Restart - for automatic restart */
+#define TM_CMD_PWM      0x20000000      /* Run in Pulse Width Modulation Mode */
+#define TM_CMD_NUM(n)   (((n)&0xF)<<16) /* Timer Number */
+#define TM_CMD_PERIOD(p) ((p)&0xFFFF)   /* Timer Period */
+
+/* CPM interrupts.  There are nearly 32 interrupts generated by CPM
+ * channels or devices.  All of these are presented to the PPC core
+ * as a single interrupt.  The CPM interrupt handler dispatches its
+ * own handlers, in a similar fashion to the PPC core handler.  We
+ * use the table as defined in the manuals (i.e. no special high
+ * priority and SCC1 == SCCa, etc...).
+ */
+#define CPMVEC_NR               32
+#define CPMVEC_PIO_PC15         ((ushort)0x1f)
+#define CPMVEC_SCC1             ((ushort)0x1e)
+#define CPMVEC_SCC2             ((ushort)0x1d)
+#define CPMVEC_SCC3             ((ushort)0x1c)
+#define CPMVEC_SCC4             ((ushort)0x1b)
+#define CPMVEC_PIO_PC14         ((ushort)0x1a)
+#define CPMVEC_TIMER1           ((ushort)0x19)
+#define CPMVEC_PIO_PC13         ((ushort)0x18)
+#define CPMVEC_PIO_PC12         ((ushort)0x17)
+#define CPMVEC_SDMA_CB_ERR      ((ushort)0x16)
+#define CPMVEC_IDMA1            ((ushort)0x15)
+#define CPMVEC_IDMA2            ((ushort)0x14)
+#define CPMVEC_TIMER2           ((ushort)0x12)
+#define CPMVEC_RISCTIMER        ((ushort)0x11)
+#define CPMVEC_I2C              ((ushort)0x10)
+#define CPMVEC_PIO_PC11         ((ushort)0x0f)
+#define CPMVEC_PIO_PC10         ((ushort)0x0e)
+#define CPMVEC_TIMER3           ((ushort)0x0c)
+#define CPMVEC_PIO_PC9          ((ushort)0x0b)
+#define CPMVEC_PIO_PC8          ((ushort)0x0a)
+#define CPMVEC_PIO_PC7          ((ushort)0x09)
+#define CPMVEC_TIMER4           ((ushort)0x07)
+#define CPMVEC_PIO_PC6          ((ushort)0x06)
+#define CPMVEC_SPI              ((ushort)0x05)
+#define CPMVEC_SMC1             ((ushort)0x04)
+#define CPMVEC_SMC2             ((ushort)0x03)
+#define CPMVEC_PIO_PC5          ((ushort)0x02)
+#define CPMVEC_PIO_PC4          ((ushort)0x01)
+#define CPMVEC_ERROR            ((ushort)0x00)
+
+/* CPM interrupt configuration vector.
+*/
+#define CICR_SCD_SCC4           ((uint)0x00c00000)      /* SCC4 @ SCCd */
+#define CICR_SCC_SCC3           ((uint)0x00200000)      /* SCC3 @ SCCc */
+#define CICR_SCB_SCC2           ((uint)0x00040000)      /* SCC2 @ SCCb */
+#define CICR_SCA_SCC1           ((uint)0x00000000)      /* SCC1 @ SCCa */
+#define CICR_IRL_MASK           ((uint)0x0000e000)      /* Core interrrupt */
+#define CICR_HP_MASK            ((uint)0x00001f00)      /* Hi-pri int. */
+#define CICR_IEN                ((uint)0x00000080)      /* Int. enable */
+#define CICR_SPS                ((uint)0x00000001)      /* SCC Spread */
+
+extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id);
+extern void cpm_free_handler(int vec);
+
+#endif /* __CPM_8XX__ */
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
new file mode 100644
index 000000000000..12a2860f9a9c
--- /dev/null
+++ b/include/asm-powerpc/cpm2.h
@@ -0,0 +1,1248 @@
+/*
+ * Communication Processor Module v2.
+ *
+ * This file contains structures and information for the communication
+ * processor channels found in the dual port RAM or parameter RAM.
+ * All CPM control and status is available through the CPM2 internal
+ * memory map.  See immap_cpm2.h for details.
+ */
+#ifdef __KERNEL__
+#ifndef __CPM2__
+#define __CPM2__
+
+#include <asm/immap_cpm2.h>
+
+/* CPM Command register.
+*/
+#define CPM_CR_RST      ((uint)0x80000000)
+#define CPM_CR_PAGE     ((uint)0x7c000000)
+#define CPM_CR_SBLOCK   ((uint)0x03e00000)
+#define CPM_CR_FLG      ((uint)0x00010000)
+#define CPM_CR_MCN      ((uint)0x00003fc0)
+#define CPM_CR_OPCODE   ((uint)0x0000000f)
+
+/* Device sub-block and page codes.
+*/
+#define CPM_CR_SCC1_SBLOCK      (0x04)
+#define CPM_CR_SCC2_SBLOCK      (0x05)
+#define CPM_CR_SCC3_SBLOCK      (0x06)
+#define CPM_CR_SCC4_SBLOCK      (0x07)
+#define CPM_CR_SMC1_SBLOCK      (0x08)
+#define CPM_CR_SMC2_SBLOCK      (0x09)
+#define CPM_CR_SPI_SBLOCK       (0x0a)
+#define CPM_CR_I2C_SBLOCK       (0x0b)
+#define CPM_CR_TIMER_SBLOCK     (0x0f)
+#define CPM_CR_RAND_SBLOCK      (0x0e)
+#define CPM_CR_FCC1_SBLOCK      (0x10)
+#define CPM_CR_FCC2_SBLOCK      (0x11)
+#define CPM_CR_FCC3_SBLOCK      (0x12)
+#define CPM_CR_IDMA1_SBLOCK     (0x14)
+#define CPM_CR_IDMA2_SBLOCK     (0x15)
+#define CPM_CR_IDMA3_SBLOCK     (0x16)
+#define CPM_CR_IDMA4_SBLOCK     (0x17)
+#define CPM_CR_MCC1_SBLOCK      (0x1c)
+
+#define CPM_CR_FCC_SBLOCK(x)    (x + 0x10)
+
+#define CPM_CR_SCC1_PAGE        (0x00)
+#define CPM_CR_SCC2_PAGE        (0x01)
+#define CPM_CR_SCC3_PAGE        (0x02)
+#define CPM_CR_SCC4_PAGE        (0x03)
+#define CPM_CR_SMC1_PAGE        (0x07)
+#define CPM_CR_SMC2_PAGE        (0x08)
+#define CPM_CR_SPI_PAGE         (0x09)
+#define CPM_CR_I2C_PAGE         (0x0a)
+#define CPM_CR_TIMER_PAGE       (0x0a)
+#define CPM_CR_RAND_PAGE        (0x0a)
+#define CPM_CR_FCC1_PAGE        (0x04)
+#define CPM_CR_FCC2_PAGE        (0x05)
+#define CPM_CR_FCC3_PAGE        (0x06)
+#define CPM_CR_IDMA1_PAGE       (0x07)
+#define CPM_CR_IDMA2_PAGE       (0x08)
+#define CPM_CR_IDMA3_PAGE       (0x09)
+#define CPM_CR_IDMA4_PAGE       (0x0a)
+#define CPM_CR_MCC1_PAGE        (0x07)
+#define CPM_CR_MCC2_PAGE        (0x08)
+
+#define CPM_CR_FCC_PAGE(x)      (x + 0x04)
+
+/* Some opcodes (there are more...later)
+*/
+#define CPM_CR_INIT_TRX         ((ushort)0x0000)
+#define CPM_CR_INIT_RX          ((ushort)0x0001)
+#define CPM_CR_INIT_TX          ((ushort)0x0002)
+#define CPM_CR_HUNT_MODE        ((ushort)0x0003)
+#define CPM_CR_STOP_TX          ((ushort)0x0004)
+#define CPM_CR_GRA_STOP_TX      ((ushort)0x0005)
+#define CPM_CR_RESTART_TX       ((ushort)0x0006)
+#define CPM_CR_SET_GADDR        ((ushort)0x0008)
+#define CPM_CR_START_IDMA       ((ushort)0x0009)
+#define CPM_CR_STOP_IDMA        ((ushort)0x000b)
+
+#define mk_cr_cmd(PG, SBC, MCN, OP) \
+        ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
+
+/* Dual Port RAM addresses.  The first 16K is available for almost
+ * any CPM use, so we put the BDs there.  The first 128 bytes are
+ * used for SMC1 and SMC2 parameter RAM, so we start allocating
+ * BDs above that.  All of this must change when we start
+ * downloading RAM microcode.
+ */
+#define CPM_DATAONLY_BASE       ((uint)128)
+#define CPM_DP_NOSPACE          ((uint)0x7fffffff)
+#if defined(CONFIG_8272) || defined(CONFIG_MPC8555)
+#define CPM_DATAONLY_SIZE       ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
+#define CPM_FCC_SPECIAL_BASE    ((uint)0x00009000)
+#else
+#define CPM_DATAONLY_SIZE       ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
+#define CPM_FCC_SPECIAL_BASE    ((uint)0x0000b000)
+#endif
+
+/* The number of pages of host memory we allocate for CPM.  This is
+ * done early in kernel initialization to get physically contiguous
+ * pages.
+ */
+#define NUM_CPM_HOST_PAGES      2
+
+/* Export the base address of the communication processor registers
+ * and dual port ram.
+ */
+extern          cpm_cpm2_t      *cpmp;   /* Pointer to comm processor */
+
+extern unsigned long cpm_dpalloc(uint size, uint align);
+extern int cpm_dpfree(unsigned long offset);
+extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
+extern void cpm_dpdump(void);
+extern void *cpm_dpram_addr(unsigned long offset);
+extern void cpm_setbrg(uint brg, uint rate);
+extern void cpm2_fastbrg(uint brg, uint rate, int div16);
+extern void cpm2_reset(void);
+
+
+/* Buffer descriptors used by many of the CPM protocols.
+*/
+typedef struct cpm_buf_desc {
+        ushort  cbd_sc;         /* Status and Control */
+        ushort  cbd_datlen;     /* Data length in buffer */
+        uint    cbd_bufaddr;    /* Buffer address in host memory */
+} cbd_t;
+
+#define BD_SC_EMPTY     ((ushort)0x8000)        /* Receive is empty */
+#define BD_SC_READY     ((ushort)0x8000)        /* Transmit is ready */
+#define BD_SC_WRAP      ((ushort)0x2000)        /* Last buffer descriptor */
+#define BD_SC_INTRPT    ((ushort)0x1000)        /* Interrupt on change */
+#define BD_SC_LAST      ((ushort)0x0800)        /* Last buffer in frame */
+#define BD_SC_CM        ((ushort)0x0200)        /* Continous mode */
+#define BD_SC_ID        ((ushort)0x0100)        /* Rec'd too many idles */
+#define BD_SC_P         ((ushort)0x0100)        /* xmt preamble */
+#define BD_SC_BR        ((ushort)0x0020)        /* Break received */
+#define BD_SC_FR        ((ushort)0x0010)        /* Framing error */
+#define BD_SC_PR        ((ushort)0x0008)        /* Parity error */
+#define BD_SC_OV        ((ushort)0x0002)        /* Overrun */
+#define BD_SC_CD        ((ushort)0x0001)        /* ?? */
+
+/* Function code bits, usually generic to devices.
+*/
+#define CPMFCR_GBL      ((u_char)0x20)  /* Set memory snooping */
+#define CPMFCR_EB       ((u_char)0x10)  /* Set big endian byte order */
+#define CPMFCR_TC2      ((u_char)0x04)  /* Transfer code 2 value */
+#define CPMFCR_DTB      ((u_char)0x02)  /* Use local bus for data when set */
+#define CPMFCR_BDB      ((u_char)0x01)  /* Use local bus for BD when set */
+
+/* Parameter RAM offsets from the base.
+*/
+#define PROFF_SCC1              ((uint)0x8000)
+#define PROFF_SCC2              ((uint)0x8100)
+#define PROFF_SCC3              ((uint)0x8200)
+#define PROFF_SCC4              ((uint)0x8300)
+#define PROFF_FCC1              ((uint)0x8400)
+#define PROFF_FCC2              ((uint)0x8500)
+#define PROFF_FCC3              ((uint)0x8600)
+#define PROFF_MCC1              ((uint)0x8700)
+#define PROFF_SMC1_BASE         ((uint)0x87fc)
+#define PROFF_IDMA1_BASE        ((uint)0x87fe)
+#define PROFF_MCC2              ((uint)0x8800)
+#define PROFF_SMC2_BASE         ((uint)0x88fc)
+#define PROFF_IDMA2_BASE        ((uint)0x88fe)
+#define PROFF_SPI_BASE          ((uint)0x89fc)
+#define PROFF_IDMA3_BASE        ((uint)0x89fe)
+#define PROFF_TIMERS            ((uint)0x8ae0)
+#define PROFF_REVNUM            ((uint)0x8af0)
+#define PROFF_RAND              ((uint)0x8af8)
+#define PROFF_I2C_BASE          ((uint)0x8afc)
+#define PROFF_IDMA4_BASE        ((uint)0x8afe)
+
+#define PROFF_SCC_SIZE          ((uint)0x100)
+#define PROFF_FCC_SIZE          ((uint)0x100)
+#define PROFF_SMC_SIZE          ((uint)64)
+
+/* The SMCs are relocated to any of the first eight DPRAM pages.
+ * We will fix these at the first locations of DPRAM, until we
+ * get some microcode patches :-).
+ * The parameter ram space for the SMCs is fifty-some bytes, and
+ * they are required to start on a 64 byte boundary.
+ */
+#define PROFF_SMC1      (0)
+#define PROFF_SMC2      (64)
+
+
+/* Define enough so I can at least use the serial port as a UART.
+ */
+typedef struct smc_uart {
+        ushort  smc_rbase;      /* Rx Buffer descriptor base address */
+        ushort  smc_tbase;      /* Tx Buffer descriptor base address */
+        u_char  smc_rfcr;       /* Rx function code */
+        u_char  smc_tfcr;       /* Tx function code */
+        ushort  smc_mrblr;      /* Max receive buffer length */
+        uint    smc_rstate;     /* Internal */
+        uint    smc_idp;        /* Internal */
+        ushort  smc_rbptr;      /* Internal */
+        ushort  smc_ibc;        /* Internal */
+        uint    smc_rxtmp;      /* Internal */
+        uint    smc_tstate;     /* Internal */
+        uint    smc_tdp;        /* Internal */
+        ushort  smc_tbptr;      /* Internal */
+        ushort  smc_tbc;        /* Internal */
+        uint    smc_txtmp;      /* Internal */
+        ushort  smc_maxidl;     /* Maximum idle characters */
+        ushort  smc_tmpidl;     /* Temporary idle counter */
+        ushort  smc_brklen;     /* Last received break length */
+        ushort  smc_brkec;      /* rcv'd break condition counter */
+        ushort  smc_brkcr;      /* xmt break count register */
+        ushort  smc_rmask;      /* Temporary bit mask */
+        uint    smc_stmp;       /* SDMA Temp */
+} smc_uart_t;
+
+/* SMC uart mode register (Internal memory map).
+*/
+#define SMCMR_REN       ((ushort)0x0001)
+#define SMCMR_TEN       ((ushort)0x0002)
+#define SMCMR_DM        ((ushort)0x000c)
+#define SMCMR_SM_GCI    ((ushort)0x0000)
+#define SMCMR_SM_UART   ((ushort)0x0020)
+#define SMCMR_SM_TRANS  ((ushort)0x0030)
+#define SMCMR_SM_MASK   ((ushort)0x0030)
+#define SMCMR_PM_EVEN   ((ushort)0x0100)        /* Even parity, else odd */
+#define SMCMR_REVD      SMCMR_PM_EVEN
+#define SMCMR_PEN       ((ushort)0x0200)        /* Parity enable */
+#define SMCMR_BS        SMCMR_PEN
+#define SMCMR_SL        ((ushort)0x0400)        /* Two stops, else one */
+#define SMCR_CLEN_MASK  ((ushort)0x7800)        /* Character length */
+#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
+
+/* SMC Event and Mask register.
+*/
+#define SMCM_BRKE       ((unsigned char)0x40)   /* When in UART Mode */
+#define SMCM_BRK        ((unsigned char)0x10)   /* When in UART Mode */
+#define SMCM_TXE        ((unsigned char)0x10)
+#define SMCM_BSY        ((unsigned char)0x04)
+#define SMCM_TX         ((unsigned char)0x02)
+#define SMCM_RX         ((unsigned char)0x01)
+
+/* Baud rate generators.
+*/
+#define CPM_BRG_RST             ((uint)0x00020000)
+#define CPM_BRG_EN              ((uint)0x00010000)
+#define CPM_BRG_EXTC_INT        ((uint)0x00000000)
+#define CPM_BRG_EXTC_CLK3_9     ((uint)0x00004000)
+#define CPM_BRG_EXTC_CLK5_15    ((uint)0x00008000)
+#define CPM_BRG_ATB             ((uint)0x00002000)
+#define CPM_BRG_CD_MASK         ((uint)0x00001ffe)
+#define CPM_BRG_DIV16           ((uint)0x00000001)
+
+/* SCCs.
+*/
+#define SCC_GSMRH_IRP           ((uint)0x00040000)
+#define SCC_GSMRH_GDE           ((uint)0x00010000)
+#define SCC_GSMRH_TCRC_CCITT    ((uint)0x00008000)
+#define SCC_GSMRH_TCRC_BISYNC   ((uint)0x00004000)
+#define SCC_GSMRH_TCRC_HDLC     ((uint)0x00000000)
+#define SCC_GSMRH_REVD          ((uint)0x00002000)
+#define SCC_GSMRH_TRX           ((uint)0x00001000)
+#define SCC_GSMRH_TTX           ((uint)0x00000800)
+#define SCC_GSMRH_CDP           ((uint)0x00000400)
+#define SCC_GSMRH_CTSP          ((uint)0x00000200)
+#define SCC_GSMRH_CDS           ((uint)0x00000100)
+#define SCC_GSMRH_CTSS          ((uint)0x00000080)
+#define SCC_GSMRH_TFL           ((uint)0x00000040)
+#define SCC_GSMRH_RFW           ((uint)0x00000020)
+#define SCC_GSMRH_TXSY          ((uint)0x00000010)
+#define SCC_GSMRH_SYNL16        ((uint)0x0000000c)
+#define SCC_GSMRH_SYNL8         ((uint)0x00000008)
+#define SCC_GSMRH_SYNL4         ((uint)0x00000004)
+#define SCC_GSMRH_RTSM          ((uint)0x00000002)
+#define SCC_GSMRH_RSYN          ((uint)0x00000001)
+
+#define SCC_GSMRL_SIR           ((uint)0x80000000)      /* SCC2 only */
+#define SCC_GSMRL_EDGE_NONE     ((uint)0x60000000)
+#define SCC_GSMRL_EDGE_NEG      ((uint)0x40000000)
+#define SCC_GSMRL_EDGE_POS      ((uint)0x20000000)
+#define SCC_GSMRL_EDGE_BOTH     ((uint)0x00000000)
+#define SCC_GSMRL_TCI           ((uint)0x10000000)
+#define SCC_GSMRL_TSNC_3        ((uint)0x0c000000)
+#define SCC_GSMRL_TSNC_4        ((uint)0x08000000)
+#define SCC_GSMRL_TSNC_14       ((uint)0x04000000)
+#define SCC_GSMRL_TSNC_INF      ((uint)0x00000000)
+#define SCC_GSMRL_RINV          ((uint)0x02000000)
+#define SCC_GSMRL_TINV          ((uint)0x01000000)
+#define SCC_GSMRL_TPL_128       ((uint)0x00c00000)
+#define SCC_GSMRL_TPL_64        ((uint)0x00a00000)
+#define SCC_GSMRL_TPL_48        ((uint)0x00800000)
+#define SCC_GSMRL_TPL_32        ((uint)0x00600000)
+#define SCC_GSMRL_TPL_16        ((uint)0x00400000)
+#define SCC_GSMRL_TPL_8         ((uint)0x00200000)
+#define SCC_GSMRL_TPL_NONE      ((uint)0x00000000)
+#define SCC_GSMRL_TPP_ALL1      ((uint)0x00180000)
+#define SCC_GSMRL_TPP_01        ((uint)0x00100000)
+#define SCC_GSMRL_TPP_10        ((uint)0x00080000)
+#define SCC_GSMRL_TPP_ZEROS     ((uint)0x00000000)
+#define SCC_GSMRL_TEND          ((uint)0x00040000)
+#define SCC_GSMRL_TDCR_32       ((uint)0x00030000)
+#define SCC_GSMRL_TDCR_16       ((uint)0x00020000)
+#define SCC_GSMRL_TDCR_8        ((uint)0x00010000)
+#define SCC_GSMRL_TDCR_1        ((uint)0x00000000)
+#define SCC_GSMRL_RDCR_32       ((uint)0x0000c000)
+#define SCC_GSMRL_RDCR_16       ((uint)0x00008000)
+#define SCC_GSMRL_RDCR_8        ((uint)0x00004000)
+#define SCC_GSMRL_RDCR_1        ((uint)0x00000000)
+#define SCC_GSMRL_RENC_DFMAN    ((uint)0x00003000)
+#define SCC_GSMRL_RENC_MANCH    ((uint)0x00002000)
+#define SCC_GSMRL_RENC_FM0      ((uint)0x00001000)
+#define SCC_GSMRL_RENC_NRZI     ((uint)0x00000800)
+#define SCC_GSMRL_RENC_NRZ      ((uint)0x00000000)
+#define SCC_GSMRL_TENC_DFMAN    ((uint)0x00000600)
+#define SCC_GSMRL_TENC_MANCH    ((uint)0x00000400)
+#define SCC_GSMRL_TENC_FM0      ((uint)0x00000200)
+#define SCC_GSMRL_TENC_NRZI     ((uint)0x00000100)
+#define SCC_GSMRL_TENC_NRZ      ((uint)0x00000000)
+#define SCC_GSMRL_DIAG_LE       ((uint)0x000000c0)      /* Loop and echo */
+#define SCC_GSMRL_DIAG_ECHO     ((uint)0x00000080)
+#define SCC_GSMRL_DIAG_LOOP     ((uint)0x00000040)
+#define SCC_GSMRL_DIAG_NORM     ((uint)0x00000000)
+#define SCC_GSMRL_ENR           ((uint)0x00000020)
+#define SCC_GSMRL_ENT           ((uint)0x00000010)
+#define SCC_GSMRL_MODE_ENET     ((uint)0x0000000c)
+#define SCC_GSMRL_MODE_DDCMP    ((uint)0x00000009)
+#define SCC_GSMRL_MODE_BISYNC   ((uint)0x00000008)
+#define SCC_GSMRL_MODE_V14      ((uint)0x00000007)
+#define SCC_GSMRL_MODE_AHDLC    ((uint)0x00000006)
+#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005)
+#define SCC_GSMRL_MODE_UART     ((uint)0x00000004)
+#define SCC_GSMRL_MODE_SS7      ((uint)0x00000003)
+#define SCC_GSMRL_MODE_ATALK    ((uint)0x00000002)
+#define SCC_GSMRL_MODE_HDLC     ((uint)0x00000000)
+
+#define SCC_TODR_TOD            ((ushort)0x8000)
+
+/* SCC Event and Mask register.
+*/
+#define SCCM_TXE        ((unsigned char)0x10)
+#define SCCM_BSY        ((unsigned char)0x04)
+#define SCCM_TX         ((unsigned char)0x02)
+#define SCCM_RX         ((unsigned char)0x01)
+
+typedef struct scc_param {
+        ushort  scc_rbase;      /* Rx Buffer descriptor base address */
+        ushort  scc_tbase;      /* Tx Buffer descriptor base address */
+        u_char  scc_rfcr;       /* Rx function code */
+        u_char  scc_tfcr;       /* Tx function code */
+        ushort  scc_mrblr;      /* Max receive buffer length */
+        uint    scc_rstate;     /* Internal */
+        uint    scc_idp;        /* Internal */
+        ushort  scc_rbptr;      /* Internal */
+        ushort  scc_ibc;        /* Internal */
+        uint    scc_rxtmp;      /* Internal */
+        uint    scc_tstate;     /* Internal */
+        uint    scc_tdp;        /* Internal */
+        ushort  scc_tbptr;      /* Internal */
+        ushort  scc_tbc;        /* Internal */
+        uint    scc_txtmp;      /* Internal */
+        uint    scc_rcrc;       /* Internal */
+        uint    scc_tcrc;       /* Internal */
+} sccp_t;
+
+/* CPM Ethernet through SCC1.
+ */
+typedef struct scc_enet {
+        sccp_t  sen_genscc;
+        uint    sen_cpres;      /* Preset CRC */
+        uint    sen_cmask;      /* Constant mask for CRC */
+        uint    sen_crcec;      /* CRC Error counter */
+        uint    sen_alec;       /* alignment error counter */
+        uint    sen_disfc;      /* discard frame counter */
+        ushort  sen_pads;       /* Tx short frame pad character */
+        ushort  sen_retlim;     /* Retry limit threshold */
+        ushort  sen_retcnt;     /* Retry limit counter */
+        ushort  sen_maxflr;     /* maximum frame length register */
+        ushort  sen_minflr;     /* minimum frame length register */
+        ushort  sen_maxd1;      /* maximum DMA1 length */
+        ushort  sen_maxd2;      /* maximum DMA2 length */
+        ushort  sen_maxd;       /* Rx max DMA */
+        ushort  sen_dmacnt;     /* Rx DMA counter */
+        ushort  sen_maxb;       /* Max BD byte count */
+        ushort  sen_gaddr1;     /* Group address filter */
+        ushort  sen_gaddr2;
+        ushort  sen_gaddr3;
+        ushort  sen_gaddr4;
+        uint    sen_tbuf0data0; /* Save area 0 - current frame */
+        uint    sen_tbuf0data1; /* Save area 1 - current frame */
+        uint    sen_tbuf0rba;   /* Internal */
+        uint    sen_tbuf0crc;   /* Internal */
+        ushort  sen_tbuf0bcnt;  /* Internal */
+        ushort  sen_paddrh;     /* physical address (MSB) */
+        ushort  sen_paddrm;
+        ushort  sen_paddrl;     /* physical address (LSB) */
+        ushort  sen_pper;       /* persistence */
+        ushort  sen_rfbdptr;    /* Rx first BD pointer */
+        ushort  sen_tfbdptr;    /* Tx first BD pointer */
+        ushort  sen_tlbdptr;    /* Tx last BD pointer */
+        uint    sen_tbuf1data0; /* Save area 0 - current frame */
+        uint    sen_tbuf1data1; /* Save area 1 - current frame */
+        uint    sen_tbuf1rba;   /* Internal */
+        uint    sen_tbuf1crc;   /* Internal */
+        ushort  sen_tbuf1bcnt;  /* Internal */
+        ushort  sen_txlen;      /* Tx Frame length counter */
+        ushort  sen_iaddr1;     /* Individual address filter */
+        ushort  sen_iaddr2;
+        ushort  sen_iaddr3;
+        ushort  sen_iaddr4;
+        ushort  sen_boffcnt;    /* Backoff counter */
+
+        /* NOTE: Some versions of the manual have the following items
+         * incorrectly documented.  Below is the proper order.
+         */
+        ushort  sen_taddrh;     /* temp address (MSB) */
+        ushort  sen_taddrm;
+        ushort  sen_taddrl;     /* temp address (LSB) */
+} scc_enet_t;
+
+
+/* SCC Event register as used by Ethernet.
+*/
+#define SCCE_ENET_GRA   ((ushort)0x0080)        /* Graceful stop complete */
+#define SCCE_ENET_TXE   ((ushort)0x0010)        /* Transmit Error */
+#define SCCE_ENET_RXF   ((ushort)0x0008)        /* Full frame received */
+#define SCCE_ENET_BSY   ((ushort)0x0004)        /* All incoming buffers full */
+#define SCCE_ENET_TXB   ((ushort)0x0002)        /* A buffer was transmitted */
+#define SCCE_ENET_RXB   ((ushort)0x0001)        /* A buffer was received */
+
+/* SCC Mode Register (PSMR) as used by Ethernet.
+*/
+#define SCC_PSMR_HBC    ((ushort)0x8000)        /* Enable heartbeat */
+#define SCC_PSMR_FC     ((ushort)0x4000)        /* Force collision */
+#define SCC_PSMR_RSH    ((ushort)0x2000)        /* Receive short frames */
+#define SCC_PSMR_IAM    ((ushort)0x1000)        /* Check individual hash */
+#define SCC_PSMR_ENCRC  ((ushort)0x0800)        /* Ethernet CRC mode */
+#define SCC_PSMR_PRO    ((ushort)0x0200)        /* Promiscuous mode */
+#define SCC_PSMR_BRO    ((ushort)0x0100)        /* Catch broadcast pkts */
+#define SCC_PSMR_SBT    ((ushort)0x0080)        /* Special backoff timer */
+#define SCC_PSMR_LPB    ((ushort)0x0040)        /* Set Loopback mode */
+#define SCC_PSMR_SIP    ((ushort)0x0020)        /* Sample Input Pins */
+#define SCC_PSMR_LCW    ((ushort)0x0010)        /* Late collision window */
+#define SCC_PSMR_NIB22  ((ushort)0x000a)        /* Start frame search */
+#define SCC_PSMR_FDE    ((ushort)0x0001)        /* Full duplex enable */
+
+/* Buffer descriptor control/status used by Ethernet receive.
+ * Common to SCC and FCC.
+ */
+#define BD_ENET_RX_EMPTY        ((ushort)0x8000)
+#define BD_ENET_RX_WRAP         ((ushort)0x2000)
+#define BD_ENET_RX_INTR         ((ushort)0x1000)
+#define BD_ENET_RX_LAST         ((ushort)0x0800)
+#define BD_ENET_RX_FIRST        ((ushort)0x0400)
+#define BD_ENET_RX_MISS         ((ushort)0x0100)
+#define BD_ENET_RX_BC           ((ushort)0x0080)        /* FCC Only */
+#define BD_ENET_RX_MC           ((ushort)0x0040)        /* FCC Only */
+#define BD_ENET_RX_LG           ((ushort)0x0020)
+#define BD_ENET_RX_NO           ((ushort)0x0010)
+#define BD_ENET_RX_SH           ((ushort)0x0008)
+#define BD_ENET_RX_CR           ((ushort)0x0004)
+#define BD_ENET_RX_OV           ((ushort)0x0002)
+#define BD_ENET_RX_CL           ((ushort)0x0001)
+#define BD_ENET_RX_STATS        ((ushort)0x01ff)        /* All status bits */
+
+/* Buffer descriptor control/status used by Ethernet transmit.
+ * Common to SCC and FCC.
+ */
+#define BD_ENET_TX_READY        ((ushort)0x8000)
+#define BD_ENET_TX_PAD          ((ushort)0x4000)
+#define BD_ENET_TX_WRAP         ((ushort)0x2000)
+#define BD_ENET_TX_INTR         ((ushort)0x1000)
+#define BD_ENET_TX_LAST         ((ushort)0x0800)
+#define BD_ENET_TX_TC           ((ushort)0x0400)
+#define BD_ENET_TX_DEF          ((ushort)0x0200)
+#define BD_ENET_TX_HB           ((ushort)0x0100)
+#define BD_ENET_TX_LC           ((ushort)0x0080)
+#define BD_ENET_TX_RL           ((ushort)0x0040)
+#define BD_ENET_TX_RCMASK       ((ushort)0x003c)
+#define BD_ENET_TX_UN           ((ushort)0x0002)
+#define BD_ENET_TX_CSL          ((ushort)0x0001)
+#define BD_ENET_TX_STATS        ((ushort)0x03ff)        /* All status bits */
+
+/* SCC as UART
+*/
+typedef struct scc_uart {
+        sccp_t  scc_genscc;
+        uint    scc_res1;       /* Reserved */
+        uint    scc_res2;       /* Reserved */
+        ushort  scc_maxidl;     /* Maximum idle chars */
+        ushort  scc_idlc;       /* temp idle counter */
+        ushort  scc_brkcr;      /* Break count register */
+        ushort  scc_parec;      /* receive parity error counter */
+        ushort  scc_frmec;      /* receive framing error counter */
+        ushort  scc_nosec;      /* receive noise counter */
+        ushort  scc_brkec;      /* receive break condition counter */
+        ushort  scc_brkln;      /* last received break length */
+        ushort  scc_uaddr1;     /* UART address character 1 */
+        ushort  scc_uaddr2;     /* UART address character 2 */
+        ushort  scc_rtemp;      /* Temp storage */
+        ushort  scc_toseq;      /* Transmit out of sequence char */
+        ushort  scc_char1;      /* control character 1 */
+        ushort  scc_char2;      /* control character 2 */
+        ushort  scc_char3;      /* control character 3 */
+        ushort  scc_char4;      /* control character 4 */
+        ushort  scc_char5;      /* control character 5 */
+        ushort  scc_char6;      /* control character 6 */
+        ushort  scc_char7;      /* control character 7 */
+        ushort  scc_char8;      /* control character 8 */
+        ushort  scc_rccm;       /* receive control character mask */
+        ushort  scc_rccr;       /* receive control character register */
+        ushort  scc_rlbc;       /* receive last break character */
+} scc_uart_t;
+
+/* SCC Event and Mask registers when it is used as a UART.
+*/
+#define UART_SCCM_GLR           ((ushort)0x1000)
+#define UART_SCCM_GLT           ((ushort)0x0800)
+#define UART_SCCM_AB            ((ushort)0x0200)
+#define UART_SCCM_IDL           ((ushort)0x0100)
+#define UART_SCCM_GRA           ((ushort)0x0080)
+#define UART_SCCM_BRKE          ((ushort)0x0040)
+#define UART_SCCM_BRKS          ((ushort)0x0020)
+#define UART_SCCM_CCR           ((ushort)0x0008)
+#define UART_SCCM_BSY           ((ushort)0x0004)
+#define UART_SCCM_TX            ((ushort)0x0002)
+#define UART_SCCM_RX            ((ushort)0x0001)
+
+/* The SCC PSMR when used as a UART.
+*/
+#define SCU_PSMR_FLC            ((ushort)0x8000)
+#define SCU_PSMR_SL             ((ushort)0x4000)
+#define SCU_PSMR_CL             ((ushort)0x3000)
+#define SCU_PSMR_UM             ((ushort)0x0c00)
+#define SCU_PSMR_FRZ            ((ushort)0x0200)
+#define SCU_PSMR_RZS            ((ushort)0x0100)
+#define SCU_PSMR_SYN            ((ushort)0x0080)
+#define SCU_PSMR_DRT            ((ushort)0x0040)
+#define SCU_PSMR_PEN            ((ushort)0x0010)
+#define SCU_PSMR_RPM            ((ushort)0x000c)
+#define SCU_PSMR_REVP           ((ushort)0x0008)
+#define SCU_PSMR_TPM            ((ushort)0x0003)
+#define SCU_PSMR_TEVP           ((ushort)0x0002)
+
+/* CPM Transparent mode SCC.
+ */
+typedef struct scc_trans {
+        sccp_t  st_genscc;
+        uint    st_cpres;       /* Preset CRC */
+        uint    st_cmask;       /* Constant mask for CRC */
+} scc_trans_t;
+
+#define BD_SCC_TX_LAST          ((ushort)0x0800)
+
+/* How about some FCCs.....
+*/
+#define FCC_GFMR_DIAG_NORM      ((uint)0x00000000)
+#define FCC_GFMR_DIAG_LE        ((uint)0x40000000)
+#define FCC_GFMR_DIAG_AE        ((uint)0x80000000)
+#define FCC_GFMR_DIAG_ALE       ((uint)0xc0000000)
+#define FCC_GFMR_TCI            ((uint)0x20000000)
+#define FCC_GFMR_TRX            ((uint)0x10000000)
+#define FCC_GFMR_TTX            ((uint)0x08000000)
+#define FCC_GFMR_TTX            ((uint)0x08000000)
+#define FCC_GFMR_CDP            ((uint)0x04000000)
+#define FCC_GFMR_CTSP           ((uint)0x02000000)
+#define FCC_GFMR_CDS            ((uint)0x01000000)
+#define FCC_GFMR_CTSS           ((uint)0x00800000)
+#define FCC_GFMR_SYNL_NONE      ((uint)0x00000000)
+#define FCC_GFMR_SYNL_AUTO      ((uint)0x00004000)
+#define FCC_GFMR_SYNL_8         ((uint)0x00008000)
+#define FCC_GFMR_SYNL_16        ((uint)0x0000c000)
+#define FCC_GFMR_RTSM           ((uint)0x00002000)
+#define FCC_GFMR_RENC_NRZ       ((uint)0x00000000)
+#define FCC_GFMR_RENC_NRZI      ((uint)0x00000800)
+#define FCC_GFMR_REVD           ((uint)0x00000400)
+#define FCC_GFMR_TENC_NRZ       ((uint)0x00000000)
+#define FCC_GFMR_TENC_NRZI      ((uint)0x00000100)
+#define FCC_GFMR_TCRC_16        ((uint)0x00000000)
+#define FCC_GFMR_TCRC_32        ((uint)0x00000080)
+#define FCC_GFMR_ENR            ((uint)0x00000020)
+#define FCC_GFMR_ENT            ((uint)0x00000010)
+#define FCC_GFMR_MODE_ENET      ((uint)0x0000000c)
+#define FCC_GFMR_MODE_ATM       ((uint)0x0000000a)
+#define FCC_GFMR_MODE_HDLC      ((uint)0x00000000)
+
+/* Generic FCC parameter ram.
+*/
+typedef struct fcc_param {
+        ushort  fcc_riptr;      /* Rx Internal temp pointer */
+        ushort  fcc_tiptr;      /* Tx Internal temp pointer */
+        ushort  fcc_res1;
+        ushort  fcc_mrblr;      /* Max receive buffer length, mod 32 bytes */
+        uint    fcc_rstate;     /* Upper byte is Func code, must be set */
+        uint    fcc_rbase;      /* Receive BD base */
+        ushort  fcc_rbdstat;    /* RxBD status */
+        ushort  fcc_rbdlen;     /* RxBD down counter */
+        uint    fcc_rdptr;      /* RxBD internal data pointer */
+        uint    fcc_tstate;     /* Upper byte is Func code, must be set */
+        uint    fcc_tbase;      /* Transmit BD base */
+        ushort  fcc_tbdstat;    /* TxBD status */
+        ushort  fcc_tbdlen;     /* TxBD down counter */
+        uint    fcc_tdptr;      /* TxBD internal data pointer */
+        uint    fcc_rbptr;      /* Rx BD Internal buf pointer */
+        uint    fcc_tbptr;      /* Tx BD Internal buf pointer */
+        uint    fcc_rcrc;       /* Rx temp CRC */
+        uint    fcc_res2;
+        uint    fcc_tcrc;       /* Tx temp CRC */
+} fccp_t;
+
+
+/* Ethernet controller through FCC.
+*/
+typedef struct fcc_enet {
+        fccp_t  fen_genfcc;
+        uint    fen_statbuf;    /* Internal status buffer */
+        uint    fen_camptr;     /* CAM address */
+        uint    fen_cmask;      /* Constant mask for CRC */
+        uint    fen_cpres;      /* Preset CRC */
+        uint    fen_crcec;      /* CRC Error counter */
+        uint    fen_alec;       /* alignment error counter */
+        uint    fen_disfc;      /* discard frame counter */
+        ushort  fen_retlim;     /* Retry limit */
+        ushort  fen_retcnt;     /* Retry counter */
+        ushort  fen_pper;       /* Persistence */
+        ushort  fen_boffcnt;    /* backoff counter */
+        uint    fen_gaddrh;     /* Group address filter, high 32-bits */
+        uint    fen_gaddrl;     /* Group address filter, low 32-bits */
+        ushort  fen_tfcstat;    /* out of sequence TxBD */
+        ushort  fen_tfclen;
+        uint    fen_tfcptr;
+        ushort  fen_mflr;       /* Maximum frame length (1518) */
+        ushort  fen_paddrh;     /* MAC address */
+        ushort  fen_paddrm;
+        ushort  fen_paddrl;
+        ushort  fen_ibdcount;   /* Internal BD counter */
+        ushort  fen_ibdstart;   /* Internal BD start pointer */
+        ushort  fen_ibdend;     /* Internal BD end pointer */
+        ushort  fen_txlen;      /* Internal Tx frame length counter */
+        uint    fen_ibdbase[8]; /* Internal use */
+        uint    fen_iaddrh;     /* Individual address filter */
+        uint    fen_iaddrl;
+        ushort  fen_minflr;     /* Minimum frame length (64) */
+        ushort  fen_taddrh;     /* Filter transfer MAC address */
+        ushort  fen_taddrm;
+        ushort  fen_taddrl;
+        ushort  fen_padptr;     /* Pointer to pad byte buffer */
+        ushort  fen_cftype;     /* control frame type */
+        ushort  fen_cfrange;    /* control frame range */
+        ushort  fen_maxb;       /* maximum BD count */
+        ushort  fen_maxd1;      /* Max DMA1 length (1520) */
+        ushort  fen_maxd2;      /* Max DMA2 length (1520) */
+        ushort  fen_maxd;       /* internal max DMA count */
+        ushort  fen_dmacnt;     /* internal DMA counter */
+        uint    fen_octc;       /* Total octect counter */
+        uint    fen_colc;       /* Total collision counter */
+        uint    fen_broc;       /* Total broadcast packet counter */
+        uint    fen_mulc;       /* Total multicast packet count */
+        uint    fen_uspc;       /* Total packets < 64 bytes */
+        uint    fen_frgc;       /* Total packets < 64 bytes with errors */
+        uint    fen_ospc;       /* Total packets > 1518 */
+        uint    fen_jbrc;       /* Total packets > 1518 with errors */
+        uint    fen_p64c;       /* Total packets == 64 bytes */
+        uint    fen_p65c;       /* Total packets 64 < bytes <= 127 */
+        uint    fen_p128c;      /* Total packets 127 < bytes <= 255 */
+        uint    fen_p256c;      /* Total packets 256 < bytes <= 511 */
+        uint    fen_p512c;      /* Total packets 512 < bytes <= 1023 */
+        uint    fen_p1024c;     /* Total packets 1024 < bytes <= 1518 */
+        uint    fen_cambuf;     /* Internal CAM buffer poiner */
+        ushort  fen_rfthr;      /* Received frames threshold */
+        ushort  fen_rfcnt;      /* Received frames count */
+} fcc_enet_t;
+
+/* FCC Event/Mask register as used by Ethernet.
+*/
+#define FCC_ENET_GRA    ((ushort)0x0080)        /* Graceful stop complete */
+#define FCC_ENET_RXC    ((ushort)0x0040)        /* Control Frame Received */
+#define FCC_ENET_TXC    ((ushort)0x0020)        /* Out of seq. Tx sent */
+#define FCC_ENET_TXE    ((ushort)0x0010)        /* Transmit Error */
+#define FCC_ENET_RXF    ((ushort)0x0008)        /* Full frame received */
+#define FCC_ENET_BSY    ((ushort)0x0004)        /* Busy.  Rx Frame dropped */
+#define FCC_ENET_TXB    ((ushort)0x0002)        /* A buffer was transmitted */
+#define FCC_ENET_RXB    ((ushort)0x0001)        /* A buffer was received */
+
+/* FCC Mode Register (FPSMR) as used by Ethernet.
+*/
+#define FCC_PSMR_HBC    ((uint)0x80000000)      /* Enable heartbeat */
+#define FCC_PSMR_FC     ((uint)0x40000000)      /* Force Collision */
+#define FCC_PSMR_SBT    ((uint)0x20000000)      /* Stop backoff timer */
+#define FCC_PSMR_LPB    ((uint)0x10000000)      /* Local protect. 1 = FDX */
+#define FCC_PSMR_LCW    ((uint)0x08000000)      /* Late collision select */
+#define FCC_PSMR_FDE    ((uint)0x04000000)      /* Full Duplex Enable */
+#define FCC_PSMR_MON    ((uint)0x02000000)      /* RMON Enable */
+#define FCC_PSMR_PRO    ((uint)0x00400000)      /* Promiscuous Enable */
+#define FCC_PSMR_FCE    ((uint)0x00200000)      /* Flow Control Enable */
+#define FCC_PSMR_RSH    ((uint)0x00100000)      /* Receive Short Frames */
+#define FCC_PSMR_CAM    ((uint)0x00000400)      /* CAM enable */
+#define FCC_PSMR_BRO    ((uint)0x00000200)      /* Broadcast pkt discard */
+#define FCC_PSMR_ENCRC  ((uint)0x00000080)      /* Use 32-bit CRC */
+
+/* IIC parameter RAM.
+*/
+typedef struct iic {
+        ushort  iic_rbase;      /* Rx Buffer descriptor base address */
+        ushort  iic_tbase;      /* Tx Buffer descriptor base address */
+        u_char  iic_rfcr;       /* Rx function code */
+        u_char  iic_tfcr;       /* Tx function code */
+        ushort  iic_mrblr;      /* Max receive buffer length */
+        uint    iic_rstate;     /* Internal */
+        uint    iic_rdp;        /* Internal */
+        ushort  iic_rbptr;      /* Internal */
+        ushort  iic_rbc;        /* Internal */
+        uint    iic_rxtmp;      /* Internal */
+        uint    iic_tstate;     /* Internal */
+        uint    iic_tdp;        /* Internal */
+        ushort  iic_tbptr;      /* Internal */
+        ushort  iic_tbc;        /* Internal */
+        uint    iic_txtmp;      /* Internal */
+} iic_t;
+
+/* SPI parameter RAM.
+*/
+typedef struct spi {
+        ushort  spi_rbase;      /* Rx Buffer descriptor base address */
+        ushort  spi_tbase;      /* Tx Buffer descriptor base address */
+        u_char  spi_rfcr;       /* Rx function code */
+        u_char  spi_tfcr;       /* Tx function code */
+        ushort  spi_mrblr;      /* Max receive buffer length */
+        uint    spi_rstate;     /* Internal */
+        uint    spi_rdp;        /* Internal */
+        ushort  spi_rbptr;      /* Internal */
+        ushort  spi_rbc;        /* Internal */
+        uint    spi_rxtmp;      /* Internal */
+        uint    spi_tstate;     /* Internal */
+        uint    spi_tdp;        /* Internal */
+        ushort  spi_tbptr;      /* Internal */
+        ushort  spi_tbc;        /* Internal */
+        uint    spi_txtmp;      /* Internal */
+        uint    spi_res;        /* Tx temp. */
+        uint    spi_res1[4];    /* SDMA temp. */
+} spi_t;
+
+/* SPI Mode register.
+*/
+#define SPMODE_LOOP     ((ushort)0x4000)        /* Loopback */
+#define SPMODE_CI       ((ushort)0x2000)        /* Clock Invert */
+#define SPMODE_CP       ((ushort)0x1000)        /* Clock Phase */
+#define SPMODE_DIV16    ((ushort)0x0800)        /* BRG/16 mode */
+#define SPMODE_REV      ((ushort)0x0400)        /* Reversed Data */
+#define SPMODE_MSTR     ((ushort)0x0200)        /* SPI Master */
+#define SPMODE_EN       ((ushort)0x0100)        /* Enable */
+#define SPMODE_LENMSK   ((ushort)0x00f0)        /* character length */
+#define SPMODE_PMMSK    ((ushort)0x000f)        /* prescale modulus */
+
+#define SPMODE_LEN(x)   ((((x)-1)&0xF)<<4)
+#define SPMODE_PM(x)    ((x) &0xF)
+
+#define SPI_EB          ((u_char)0x10)          /* big endian byte order */
+
+#define BD_IIC_START            ((ushort)0x0400)
+
+/* IDMA parameter RAM
+*/
+typedef struct idma {
+        ushort ibase;           /* IDMA buffer descriptor table base address */
+        ushort dcm;             /* DMA channel mode */
+        ushort ibdptr;          /* IDMA current buffer descriptor pointer */
+        ushort dpr_buf;         /* IDMA transfer buffer base address */
+        ushort buf_inv;         /* internal buffer inventory */
+        ushort ss_max;          /* steady-state maximum transfer size */
+        ushort dpr_in_ptr;      /* write pointer inside the internal buffer */
+        ushort sts;             /* source transfer size */
+        ushort dpr_out_ptr;     /* read pointer inside the internal buffer */
+        ushort seob;            /* source end of burst */
+        ushort deob;            /* destination end of burst */
+        ushort dts;             /* destination transfer size */
+        ushort ret_add;         /* return address when working in ERM=1 mode */
+        ushort res0;            /* reserved */
+        uint   bd_cnt;          /* internal byte count */
+        uint   s_ptr;           /* source internal data pointer */
+        uint   d_ptr;           /* destination internal data pointer */
+        uint   istate;          /* internal state */
+        u_char res1[20];        /* pad to 64-byte length */
+} idma_t;
+
+/* DMA channel mode bit fields
+*/
+#define IDMA_DCM_FB             ((ushort)0x8000) /* fly-by mode */
+#define IDMA_DCM_LP             ((ushort)0x4000) /* low priority */
+#define IDMA_DCM_TC2            ((ushort)0x0400) /* value driven on TC[2] */
+#define IDMA_DCM_DMA_WRAP_MASK  ((ushort)0x01c0) /* mask for DMA wrap */
+#define IDMA_DCM_DMA_WRAP_64    ((ushort)0x0000) /* 64-byte DMA xfer buffer */
+#define IDMA_DCM_DMA_WRAP_128   ((ushort)0x0040) /* 128-byte DMA xfer buffer */
+#define IDMA_DCM_DMA_WRAP_256   ((ushort)0x0080) /* 256-byte DMA xfer buffer */
+#define IDMA_DCM_DMA_WRAP_512   ((ushort)0x00c0) /* 512-byte DMA xfer buffer */
+#define IDMA_DCM_DMA_WRAP_1024  ((ushort)0x0100) /* 1024-byte DMA xfer buffer */
+#define IDMA_DCM_DMA_WRAP_2048  ((ushort)0x0140) /* 2048-byte DMA xfer buffer */
+#define IDMA_DCM_SINC           ((ushort)0x0020) /* source inc addr */
+#define IDMA_DCM_DINC           ((ushort)0x0010) /* destination inc addr */
+#define IDMA_DCM_ERM            ((ushort)0x0008) /* external request mode */
+#define IDMA_DCM_DT             ((ushort)0x0004) /* DONE treatment */
+#define IDMA_DCM_SD_MASK        ((ushort)0x0003) /* mask for SD bit field */
+#define IDMA_DCM_SD_MEM2MEM     ((ushort)0x0000) /* memory-to-memory xfer */
+#define IDMA_DCM_SD_PER2MEM     ((ushort)0x0002) /* peripheral-to-memory xfer */
+#define IDMA_DCM_SD_MEM2PER     ((ushort)0x0001) /* memory-to-peripheral xfer */
+
+/* IDMA Buffer Descriptors
+*/
+typedef struct idma_bd {
+        uint flags;
+        uint len;       /* data length */
+        uint src;       /* source data buffer pointer */
+        uint dst;       /* destination data buffer pointer */
+} idma_bd_t;
+
+/* IDMA buffer descriptor flag bit fields
+*/
+#define IDMA_BD_V       ((uint)0x80000000)      /* valid */
+#define IDMA_BD_W       ((uint)0x20000000)      /* wrap */
+#define IDMA_BD_I       ((uint)0x10000000)      /* interrupt */
+#define IDMA_BD_L       ((uint)0x08000000)      /* last */
+#define IDMA_BD_CM      ((uint)0x02000000)      /* continuous mode */
+#define IDMA_BD_SDN     ((uint)0x00400000)      /* source done */
+#define IDMA_BD_DDN     ((uint)0x00200000)      /* destination done */
+#define IDMA_BD_DGBL    ((uint)0x00100000)      /* destination global */
+#define IDMA_BD_DBO_LE  ((uint)0x00040000)      /* little-end dest byte order */
+#define IDMA_BD_DBO_BE  ((uint)0x00080000)      /* big-end dest byte order */
+#define IDMA_BD_DDTB    ((uint)0x00010000)      /* destination data bus */
+#define IDMA_BD_SGBL    ((uint)0x00002000)      /* source global */
+#define IDMA_BD_SBO_LE  ((uint)0x00000800)      /* little-end src byte order */
+#define IDMA_BD_SBO_BE  ((uint)0x00001000)      /* big-end src byte order */
+#define IDMA_BD_SDTB    ((uint)0x00000200)      /* source data bus */
+
+/* per-channel IDMA registers
+*/
+typedef struct im_idma {
+        u_char idsr;                    /* IDMAn event status register */
+        u_char res0[3];
+        u_char idmr;                    /* IDMAn event mask register */
+        u_char res1[3];
+} im_idma_t;
+
+/* IDMA event register bit fields
+*/
+#define IDMA_EVENT_SC   ((unsigned char)0x08)   /* stop completed */
+#define IDMA_EVENT_OB   ((unsigned char)0x04)   /* out of buffers */
+#define IDMA_EVENT_EDN  ((unsigned char)0x02)   /* external DONE asserted */
+#define IDMA_EVENT_BC   ((unsigned char)0x01)   /* buffer descriptor complete */
+
+/* RISC Controller Configuration Register (RCCR) bit fields
+*/
+#define RCCR_TIME       ((uint)0x80000000) /* timer enable */
+#define RCCR_TIMEP_MASK ((uint)0x3f000000) /* mask for timer period bit field */
+#define RCCR_DR0M       ((uint)0x00800000) /* IDMA0 request mode */
+#define RCCR_DR1M       ((uint)0x00400000) /* IDMA1 request mode */
+#define RCCR_DR2M       ((uint)0x00000080) /* IDMA2 request mode */
+#define RCCR_DR3M       ((uint)0x00000040) /* IDMA3 request mode */
+#define RCCR_DR0QP_MASK ((uint)0x00300000) /* mask for IDMA0 req priority */
+#define RCCR_DR0QP_HIGH ((uint)0x00000000) /* IDMA0 has high req priority */
+#define RCCR_DR0QP_MED  ((uint)0x00100000) /* IDMA0 has medium req priority */
+#define RCCR_DR0QP_LOW  ((uint)0x00200000) /* IDMA0 has low req priority */
+#define RCCR_DR1QP_MASK ((uint)0x00030000) /* mask for IDMA1 req priority */
+#define RCCR_DR1QP_HIGH ((uint)0x00000000) /* IDMA1 has high req priority */
+#define RCCR_DR1QP_MED  ((uint)0x00010000) /* IDMA1 has medium req priority */
+#define RCCR_DR1QP_LOW  ((uint)0x00020000) /* IDMA1 has low req priority */
+#define RCCR_DR2QP_MASK ((uint)0x00000030) /* mask for IDMA2 req priority */
+#define RCCR_DR2QP_HIGH ((uint)0x00000000) /* IDMA2 has high req priority */
+#define RCCR_DR2QP_MED  ((uint)0x00000010) /* IDMA2 has medium req priority */
+#define RCCR_DR2QP_LOW  ((uint)0x00000020) /* IDMA2 has low req priority */
+#define RCCR_DR3QP_MASK ((uint)0x00000003) /* mask for IDMA3 req priority */
+#define RCCR_DR3QP_HIGH ((uint)0x00000000) /* IDMA3 has high req priority */
+#define RCCR_DR3QP_MED  ((uint)0x00000001) /* IDMA3 has medium req priority */
+#define RCCR_DR3QP_LOW  ((uint)0x00000002) /* IDMA3 has low req priority */
+#define RCCR_EIE        ((uint)0x00080000) /* external interrupt enable */
+#define RCCR_SCD        ((uint)0x00040000) /* scheduler configuration */
+#define RCCR_ERAM_MASK  ((uint)0x0000e000) /* mask for enable RAM microcode */
+#define RCCR_ERAM_0KB   ((uint)0x00000000) /* use 0KB of dpram for microcode */
+#define RCCR_ERAM_2KB   ((uint)0x00002000) /* use 2KB of dpram for microcode */
+#define RCCR_ERAM_4KB   ((uint)0x00004000) /* use 4KB of dpram for microcode */
+#define RCCR_ERAM_6KB   ((uint)0x00006000) /* use 6KB of dpram for microcode */
+#define RCCR_ERAM_8KB   ((uint)0x00008000) /* use 8KB of dpram for microcode */
+#define RCCR_ERAM_10KB  ((uint)0x0000a000) /* use 10KB of dpram for microcode */
+#define RCCR_ERAM_12KB  ((uint)0x0000c000) /* use 12KB of dpram for microcode */
+#define RCCR_EDM0       ((uint)0x00000800) /* DREQ0 edge detect mode */
+#define RCCR_EDM1       ((uint)0x00000400) /* DREQ1 edge detect mode */
+#define RCCR_EDM2       ((uint)0x00000200) /* DREQ2 edge detect mode */
+#define RCCR_EDM3       ((uint)0x00000100) /* DREQ3 edge detect mode */
+#define RCCR_DEM01      ((uint)0x00000008) /* DONE0/DONE1 edge detect mode */
+#define RCCR_DEM23      ((uint)0x00000004) /* DONE2/DONE3 edge detect mode */
+
+/*-----------------------------------------------------------------------
+ * CMXFCR - CMX FCC Clock Route Register
+ */
+#define CMXFCR_FC1         0x40000000   /* FCC1 connection              */
+#define CMXFCR_RF1CS_MSK   0x38000000   /* Receive FCC1 Clock Source Mask */
+#define CMXFCR_TF1CS_MSK   0x07000000   /* Transmit FCC1 Clock Source Mask */
+#define CMXFCR_FC2         0x00400000   /* FCC2 connection              */
+#define CMXFCR_RF2CS_MSK   0x00380000   /* Receive FCC2 Clock Source Mask */
+#define CMXFCR_TF2CS_MSK   0x00070000   /* Transmit FCC2 Clock Source Mask */
+#define CMXFCR_FC3         0x00004000   /* FCC3 connection              */
+#define CMXFCR_RF3CS_MSK   0x00003800   /* Receive FCC3 Clock Source Mask */
+#define CMXFCR_TF3CS_MSK   0x00000700   /* Transmit FCC3 Clock Source Mask */
+
+#define CMXFCR_RF1CS_BRG5  0x00000000   /* Receive FCC1 Clock Source is BRG5 */
+#define CMXFCR_RF1CS_BRG6  0x08000000   /* Receive FCC1 Clock Source is BRG6 */
+#define CMXFCR_RF1CS_BRG7  0x10000000   /* Receive FCC1 Clock Source is BRG7 */
+#define CMXFCR_RF1CS_BRG8  0x18000000   /* Receive FCC1 Clock Source is BRG8 */
+#define CMXFCR_RF1CS_CLK9  0x20000000   /* Receive FCC1 Clock Source is CLK9 */
+#define CMXFCR_RF1CS_CLK10 0x28000000   /* Receive FCC1 Clock Source is CLK10 */
+#define CMXFCR_RF1CS_CLK11 0x30000000   /* Receive FCC1 Clock Source is CLK11 */
+#define CMXFCR_RF1CS_CLK12 0x38000000   /* Receive FCC1 Clock Source is CLK12 */
+
+#define CMXFCR_TF1CS_BRG5  0x00000000   /* Transmit FCC1 Clock Source is BRG5 */
+#define CMXFCR_TF1CS_BRG6  0x01000000   /* Transmit FCC1 Clock Source is BRG6 */
+#define CMXFCR_TF1CS_BRG7  0x02000000   /* Transmit FCC1 Clock Source is BRG7 */
+#define CMXFCR_TF1CS_BRG8  0x03000000   /* Transmit FCC1 Clock Source is BRG8 */
+#define CMXFCR_TF1CS_CLK9  0x04000000   /* Transmit FCC1 Clock Source is CLK9 */
+#define CMXFCR_TF1CS_CLK10 0x05000000   /* Transmit FCC1 Clock Source is CLK10 */
+#define CMXFCR_TF1CS_CLK11 0x06000000   /* Transmit FCC1 Clock Source is CLK11 */
+#define CMXFCR_TF1CS_CLK12 0x07000000   /* Transmit FCC1 Clock Source is CLK12 */
+
+#define CMXFCR_RF2CS_BRG5  0x00000000   /* Receive FCC2 Clock Source is BRG5 */
+#define CMXFCR_RF2CS_BRG6  0x00080000   /* Receive FCC2 Clock Source is BRG6 */
+#define CMXFCR_RF2CS_BRG7  0x00100000   /* Receive FCC2 Clock Source is BRG7 */
+#define CMXFCR_RF2CS_BRG8  0x00180000   /* Receive FCC2 Clock Source is BRG8 */
+#define CMXFCR_RF2CS_CLK13 0x00200000   /* Receive FCC2 Clock Source is CLK13 */
+#define CMXFCR_RF2CS_CLK14 0x00280000   /* Receive FCC2 Clock Source is CLK14 */
+#define CMXFCR_RF2CS_CLK15 0x00300000   /* Receive FCC2 Clock Source is CLK15 */
+#define CMXFCR_RF2CS_CLK16 0x00380000   /* Receive FCC2 Clock Source is CLK16 */
+
+#define CMXFCR_TF2CS_BRG5  0x00000000   /* Transmit FCC2 Clock Source is BRG5 */
+#define CMXFCR_TF2CS_BRG6  0x00010000   /* Transmit FCC2 Clock Source is BRG6 */
+#define CMXFCR_TF2CS_BRG7  0x00020000   /* Transmit FCC2 Clock Source is BRG7 */
+#define CMXFCR_TF2CS_BRG8  0x00030000   /* Transmit FCC2 Clock Source is BRG8 */
+#define CMXFCR_TF2CS_CLK13 0x00040000   /* Transmit FCC2 Clock Source is CLK13 */
+#define CMXFCR_TF2CS_CLK14 0x00050000   /* Transmit FCC2 Clock Source is CLK14 */
+#define CMXFCR_TF2CS_CLK15 0x00060000   /* Transmit FCC2 Clock Source is CLK15 */
+#define CMXFCR_TF2CS_CLK16 0x00070000   /* Transmit FCC2 Clock Source is CLK16 */
+
+#define CMXFCR_RF3CS_BRG5  0x00000000   /* Receive FCC3 Clock Source is BRG5 */
+#define CMXFCR_RF3CS_BRG6  0x00000800   /* Receive FCC3 Clock Source is BRG6 */
+#define CMXFCR_RF3CS_BRG7  0x00001000   /* Receive FCC3 Clock Source is BRG7 */
+#define CMXFCR_RF3CS_BRG8  0x00001800   /* Receive FCC3 Clock Source is BRG8 */
+#define CMXFCR_RF3CS_CLK13 0x00002000   /* Receive FCC3 Clock Source is CLK13 */
+#define CMXFCR_RF3CS_CLK14 0x00002800   /* Receive FCC3 Clock Source is CLK14 */
+#define CMXFCR_RF3CS_CLK15 0x00003000   /* Receive FCC3 Clock Source is CLK15 */
+#define CMXFCR_RF3CS_CLK16 0x00003800   /* Receive FCC3 Clock Source is CLK16 */
+
+#define CMXFCR_TF3CS_BRG5  0x00000000   /* Transmit FCC3 Clock Source is BRG5 */
+#define CMXFCR_TF3CS_BRG6  0x00000100   /* Transmit FCC3 Clock Source is BRG6 */
+#define CMXFCR_TF3CS_BRG7  0x00000200   /* Transmit FCC3 Clock Source is BRG7 */
+#define CMXFCR_TF3CS_BRG8  0x00000300   /* Transmit FCC3 Clock Source is BRG8 */
+#define CMXFCR_TF3CS_CLK13 0x00000400   /* Transmit FCC3 Clock Source is CLK13 */
+#define CMXFCR_TF3CS_CLK14 0x00000500   /* Transmit FCC3 Clock Source is CLK14 */
+#define CMXFCR_TF3CS_CLK15 0x00000600   /* Transmit FCC3 Clock Source is CLK15 */
+#define CMXFCR_TF3CS_CLK16 0x00000700   /* Transmit FCC3 Clock Source is CLK16 */
+
+/*-----------------------------------------------------------------------
+ * CMXSCR - CMX SCC Clock Route Register
+ */
+#define CMXSCR_GR1         0x80000000   /* Grant Support of SCC1        */
+#define CMXSCR_SC1         0x40000000   /* SCC1 connection              */
+#define CMXSCR_RS1CS_MSK   0x38000000   /* Receive SCC1 Clock Source Mask */
+#define CMXSCR_TS1CS_MSK   0x07000000   /* Transmit SCC1 Clock Source Mask */
+#define CMXSCR_GR2         0x00800000   /* Grant Support of SCC2        */
+#define CMXSCR_SC2         0x00400000   /* SCC2 connection              */
+#define CMXSCR_RS2CS_MSK   0x00380000   /* Receive SCC2 Clock Source Mask */
+#define CMXSCR_TS2CS_MSK   0x00070000   /* Transmit SCC2 Clock Source Mask */
+#define CMXSCR_GR3         0x00008000   /* Grant Support of SCC3        */
+#define CMXSCR_SC3         0x00004000   /* SCC3 connection              */
+#define CMXSCR_RS3CS_MSK   0x00003800   /* Receive SCC3 Clock Source Mask */
+#define CMXSCR_TS3CS_MSK   0x00000700   /* Transmit SCC3 Clock Source Mask */
+#define CMXSCR_GR4         0x00000080   /* Grant Support of SCC4        */
+#define CMXSCR_SC4         0x00000040   /* SCC4 connection              */
+#define CMXSCR_RS4CS_MSK   0x00000038   /* Receive SCC4 Clock Source Mask */
+#define CMXSCR_TS4CS_MSK   0x00000007   /* Transmit SCC4 Clock Source Mask */
+
+#define CMXSCR_RS1CS_BRG1  0x00000000   /* SCC1 Rx Clock Source is BRG1 */
+#define CMXSCR_RS1CS_BRG2  0x08000000   /* SCC1 Rx Clock Source is BRG2 */
+#define CMXSCR_RS1CS_BRG3  0x10000000   /* SCC1 Rx Clock Source is BRG3 */
+#define CMXSCR_RS1CS_BRG4  0x18000000   /* SCC1 Rx Clock Source is BRG4 */
+#define CMXSCR_RS1CS_CLK11 0x20000000   /* SCC1 Rx Clock Source is CLK11 */
+#define CMXSCR_RS1CS_CLK12 0x28000000   /* SCC1 Rx Clock Source is CLK12 */
+#define CMXSCR_RS1CS_CLK3  0x30000000   /* SCC1 Rx Clock Source is CLK3 */
+#define CMXSCR_RS1CS_CLK4  0x38000000   /* SCC1 Rx Clock Source is CLK4 */
+
+#define CMXSCR_TS1CS_BRG1  0x00000000   /* SCC1 Tx Clock Source is BRG1 */
+#define CMXSCR_TS1CS_BRG2  0x01000000   /* SCC1 Tx Clock Source is BRG2 */
+#define CMXSCR_TS1CS_BRG3  0x02000000   /* SCC1 Tx Clock Source is BRG3 */
+#define CMXSCR_TS1CS_BRG4  0x03000000   /* SCC1 Tx Clock Source is BRG4 */
+#define CMXSCR_TS1CS_CLK11 0x04000000   /* SCC1 Tx Clock Source is CLK11 */
+#define CMXSCR_TS1CS_CLK12 0x05000000   /* SCC1 Tx Clock Source is CLK12 */
+#define CMXSCR_TS1CS_CLK3  0x06000000   /* SCC1 Tx Clock Source is CLK3 */
+#define CMXSCR_TS1CS_CLK4  0x07000000   /* SCC1 Tx Clock Source is CLK4 */
+
+#define CMXSCR_RS2CS_BRG1  0x00000000   /* SCC2 Rx Clock Source is BRG1 */
+#define CMXSCR_RS2CS_BRG2  0x00080000   /* SCC2 Rx Clock Source is BRG2 */
+#define CMXSCR_RS2CS_BRG3  0x00100000   /* SCC2 Rx Clock Source is BRG3 */
+#define CMXSCR_RS2CS_BRG4  0x00180000   /* SCC2 Rx Clock Source is BRG4 */
+#define CMXSCR_RS2CS_CLK11 0x00200000   /* SCC2 Rx Clock Source is CLK11 */
+#define CMXSCR_RS2CS_CLK12 0x00280000   /* SCC2 Rx Clock Source is CLK12 */
+#define CMXSCR_RS2CS_CLK3  0x00300000   /* SCC2 Rx Clock Source is CLK3 */
+#define CMXSCR_RS2CS_CLK4  0x00380000   /* SCC2 Rx Clock Source is CLK4 */
+
+#define CMXSCR_TS2CS_BRG1  0x00000000   /* SCC2 Tx Clock Source is BRG1 */
+#define CMXSCR_TS2CS_BRG2  0x00010000   /* SCC2 Tx Clock Source is BRG2 */
+#define CMXSCR_TS2CS_BRG3  0x00020000   /* SCC2 Tx Clock Source is BRG3 */
+#define CMXSCR_TS2CS_BRG4  0x00030000   /* SCC2 Tx Clock Source is BRG4 */
+#define CMXSCR_TS2CS_CLK11 0x00040000   /* SCC2 Tx Clock Source is CLK11 */
+#define CMXSCR_TS2CS_CLK12 0x00050000   /* SCC2 Tx Clock Source is CLK12 */
+#define CMXSCR_TS2CS_CLK3  0x00060000   /* SCC2 Tx Clock Source is CLK3 */
+#define CMXSCR_TS2CS_CLK4  0x00070000   /* SCC2 Tx Clock Source is CLK4 */
+
+#define CMXSCR_RS3CS_BRG1  0x00000000   /* SCC3 Rx Clock Source is BRG1 */
+#define CMXSCR_RS3CS_BRG2  0x00000800   /* SCC3 Rx Clock Source is BRG2 */
+#define CMXSCR_RS3CS_BRG3  0x00001000   /* SCC3 Rx Clock Source is BRG3 */
+#define CMXSCR_RS3CS_BRG4  0x00001800   /* SCC3 Rx Clock Source is BRG4 */
+#define CMXSCR_RS3CS_CLK5  0x00002000   /* SCC3 Rx Clock Source is CLK5 */
+#define CMXSCR_RS3CS_CLK6  0x00002800   /* SCC3 Rx Clock Source is CLK6 */
+#define CMXSCR_RS3CS_CLK7  0x00003000   /* SCC3 Rx Clock Source is CLK7 */
+#define CMXSCR_RS3CS_CLK8  0x00003800   /* SCC3 Rx Clock Source is CLK8 */
+
+#define CMXSCR_TS3CS_BRG1  0x00000000   /* SCC3 Tx Clock Source is BRG1 */
+#define CMXSCR_TS3CS_BRG2  0x00000100   /* SCC3 Tx Clock Source is BRG2 */
+#define CMXSCR_TS3CS_BRG3  0x00000200   /* SCC3 Tx Clock Source is BRG3 */
+#define CMXSCR_TS3CS_BRG4  0x00000300   /* SCC3 Tx Clock Source is BRG4 */
+#define CMXSCR_TS3CS_CLK5  0x00000400   /* SCC3 Tx Clock Source is CLK5 */
+#define CMXSCR_TS3CS_CLK6  0x00000500   /* SCC3 Tx Clock Source is CLK6 */
+#define CMXSCR_TS3CS_CLK7  0x00000600   /* SCC3 Tx Clock Source is CLK7 */
+#define CMXSCR_TS3CS_CLK8  0x00000700   /* SCC3 Tx Clock Source is CLK8 */
+
+#define CMXSCR_RS4CS_BRG1  0x00000000   /* SCC4 Rx Clock Source is BRG1 */
+#define CMXSCR_RS4CS_BRG2  0x00000008   /* SCC4 Rx Clock Source is BRG2 */
+#define CMXSCR_RS4CS_BRG3  0x00000010   /* SCC4 Rx Clock Source is BRG3 */
+#define CMXSCR_RS4CS_BRG4  0x00000018   /* SCC4 Rx Clock Source is BRG4 */
+#define CMXSCR_RS4CS_CLK5  0x00000020   /* SCC4 Rx Clock Source is CLK5 */
+#define CMXSCR_RS4CS_CLK6  0x00000028   /* SCC4 Rx Clock Source is CLK6 */
+#define CMXSCR_RS4CS_CLK7  0x00000030   /* SCC4 Rx Clock Source is CLK7 */
+#define CMXSCR_RS4CS_CLK8  0x00000038   /* SCC4 Rx Clock Source is CLK8 */
+
+#define CMXSCR_TS4CS_BRG1  0x00000000   /* SCC4 Tx Clock Source is BRG1 */
+#define CMXSCR_TS4CS_BRG2  0x00000001   /* SCC4 Tx Clock Source is BRG2 */
+#define CMXSCR_TS4CS_BRG3  0x00000002   /* SCC4 Tx Clock Source is BRG3 */
+#define CMXSCR_TS4CS_BRG4  0x00000003   /* SCC4 Tx Clock Source is BRG4 */
+#define CMXSCR_TS4CS_CLK5  0x00000004   /* SCC4 Tx Clock Source is CLK5 */
+#define CMXSCR_TS4CS_CLK6  0x00000005   /* SCC4 Tx Clock Source is CLK6 */
+#define CMXSCR_TS4CS_CLK7  0x00000006   /* SCC4 Tx Clock Source is CLK7 */
+#define CMXSCR_TS4CS_CLK8  0x00000007   /* SCC4 Tx Clock Source is CLK8 */
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration Register                            4-31
+ */
+#define SIUMCR_BBD      0x80000000      /* Bus Busy Disable             */
+#define SIUMCR_ESE      0x40000000      /* External Snoop Enable        */
+#define SIUMCR_PBSE     0x20000000      /* Parity Byte Select Enable    */
+#define SIUMCR_CDIS     0x10000000      /* Core Disable                 */
+#define SIUMCR_DPPC00   0x00000000      /* Data Parity Pins Configuration*/
+#define SIUMCR_DPPC01   0x04000000      /* - " -                        */
+#define SIUMCR_DPPC10   0x08000000      /* - " -                        */
+#define SIUMCR_DPPC11   0x0c000000      /* - " -                        */
+#define SIUMCR_L2CPC00  0x00000000      /* L2 Cache Pins Configuration  */
+#define SIUMCR_L2CPC01  0x01000000      /* - " -                        */
+#define SIUMCR_L2CPC10  0x02000000      /* - " -                        */
+#define SIUMCR_L2CPC11  0x03000000      /* - " -                        */
+#define SIUMCR_LBPC00   0x00000000      /* Local Bus Pins Configuration */
+#define SIUMCR_LBPC01   0x00400000      /* - " -                        */
+#define SIUMCR_LBPC10   0x00800000      /* - " -                        */
+#define SIUMCR_LBPC11   0x00c00000      /* - " -                        */
+#define SIUMCR_APPC00   0x00000000      /* Address Parity Pins Configuration*/
+#define SIUMCR_APPC01   0x00100000      /* - " -                        */
+#define SIUMCR_APPC10   0x00200000      /* - " -                        */
+#define SIUMCR_APPC11   0x00300000      /* - " -                        */
+#define SIUMCR_CS10PC00 0x00000000      /* CS10 Pin Configuration       */
+#define SIUMCR_CS10PC01 0x00040000      /* - " -                        */
+#define SIUMCR_CS10PC10 0x00080000      /* - " -                        */
+#define SIUMCR_CS10PC11 0x000c0000      /* - " -                        */
+#define SIUMCR_BCTLC00  0x00000000      /* Buffer Control Configuration */
+#define SIUMCR_BCTLC01  0x00010000      /* - " -                        */
+#define SIUMCR_BCTLC10  0x00020000      /* - " -                        */
+#define SIUMCR_BCTLC11  0x00030000      /* - " -                        */
+#define SIUMCR_MMR00    0x00000000      /* Mask Masters Requests        */
+#define SIUMCR_MMR01    0x00004000      /* - " -                        */
+#define SIUMCR_MMR10    0x00008000      /* - " -                        */
+#define SIUMCR_MMR11    0x0000c000      /* - " -                        */
+#define SIUMCR_LPBSE    0x00002000      /* LocalBus Parity Byte Select Enable*/
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock Control Register                                  9-8
+*/
+#define SCCR_PCI_MODE   0x00000100      /* PCI Mode     */
+#define SCCR_PCI_MODCK  0x00000080      /* Value of PCI_MODCK pin       */
+#define SCCR_PCIDF_MSK  0x00000078      /* PCI division factor  */
+#define SCCR_PCIDF_SHIFT 3
+
+#ifndef CPM_IMMR_OFFSET
+#define CPM_IMMR_OFFSET 0x101a8
+#endif
+
+#define FCC_PSMR_RMII   ((uint)0x00020000)      /* Use RMII interface */
+
+/* FCC iop & clock configuration. BSP code is responsible to define Fx_RXCLK & Fx_TXCLK
+ * in order to use clock-computing stuff below for the FCC x
+ */
+
+/* Automatically generates register configurations */
+#define PC_CLK(x)       ((uint)(1<<(x-1)))      /* FCC CLK I/O ports */
+
+#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27))     /* FCC1 Receive Clock Source */
+#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24))     /* FCC1 Transmit Clock Source */
+#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19))     /* FCC2 Receive Clock Source */
+#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16))     /* FCC2 Transmit Clock Source */
+#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11))     /* FCC3 Receive Clock Source */
+#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8))      /* FCC3 Transmit Clock Source */
+
+#define PC_F1RXCLK      PC_CLK(F1_RXCLK)
+#define PC_F1TXCLK      PC_CLK(F1_TXCLK)
+#define CMX1_CLK_ROUTE  (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
+#define CMX1_CLK_MASK   ((uint)0xff000000)
+
+#define PC_F2RXCLK      PC_CLK(F2_RXCLK)
+#define PC_F2TXCLK      PC_CLK(F2_TXCLK)
+#define CMX2_CLK_ROUTE  (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
+#define CMX2_CLK_MASK   ((uint)0x00ff0000)
+
+#define PC_F3RXCLK      PC_CLK(F3_RXCLK)
+#define PC_F3TXCLK      PC_CLK(F3_TXCLK)
+#define CMX3_CLK_ROUTE  (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
+#define CMX3_CLK_MASK   ((uint)0x0000ff00)
+
+#define CPMUX_CLK_MASK (CMX3_CLK_MASK | CMX2_CLK_MASK)
+#define CPMUX_CLK_ROUTE (CMX3_CLK_ROUTE | CMX2_CLK_ROUTE)
+
+#define CLK_TRX (PC_F3TXCLK | PC_F3RXCLK | PC_F2TXCLK | PC_F2RXCLK)
+
+/* I/O Pin assignment for FCC1.  I don't yet know the best way to do this,
+ * but there is little variation among the choices.
+ */
+#define PA1_COL         0x00000001U
+#define PA1_CRS         0x00000002U
+#define PA1_TXER        0x00000004U
+#define PA1_TXEN        0x00000008U
+#define PA1_RXDV        0x00000010U
+#define PA1_RXER        0x00000020U
+#define PA1_TXDAT       0x00003c00U
+#define PA1_RXDAT       0x0003c000U
+#define PA1_PSORA0      (PA1_RXDAT | PA1_TXDAT)
+#define PA1_PSORA1      (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
+                PA1_RXDV | PA1_RXER)
+#define PA1_DIRA0       (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
+#define PA1_DIRA1       (PA1_TXDAT | PA1_TXEN | PA1_TXER)
+
+
+/* I/O Pin assignment for FCC2.  I don't yet know the best way to do this,
+ * but there is little variation among the choices.
+ */
+#define PB2_TXER        0x00000001U
+#define PB2_RXDV        0x00000002U
+#define PB2_TXEN        0x00000004U
+#define PB2_RXER        0x00000008U
+#define PB2_COL         0x00000010U
+#define PB2_CRS         0x00000020U
+#define PB2_TXDAT       0x000003c0U
+#define PB2_RXDAT       0x00003c00U
+#define PB2_PSORB0      (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
+                PB2_RXER | PB2_RXDV | PB2_TXER)
+#define PB2_PSORB1      (PB2_TXEN)
+#define PB2_DIRB0       (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
+#define PB2_DIRB1       (PB2_TXDAT | PB2_TXEN | PB2_TXER)
+
+
+/* I/O Pin assignment for FCC3.  I don't yet know the best way to do this,
+ * but there is little variation among the choices.
+ */
+#define PB3_RXDV        0x00004000U
+#define PB3_RXER        0x00008000U
+#define PB3_TXER        0x00010000U
+#define PB3_TXEN        0x00020000U
+#define PB3_COL         0x00040000U
+#define PB3_CRS         0x00080000U
+#define PB3_TXDAT       0x0f000000U
+#define PC3_TXDAT       0x00000010U
+#define PB3_RXDAT       0x00f00000U
+#define PB3_PSORB0      (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
+                PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
+#define PB3_PSORB1      0
+#define PB3_DIRB0       (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
+#define PB3_DIRB1       (PB3_TXDAT | PB3_TXEN | PB3_TXER)
+#define PC3_DIRC1       (PC3_TXDAT)
+
+/* Handy macro to specify mem for FCCs*/
+#define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128))
+#define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0)
+#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1)
+#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2)
+
+/* Clocks and GRG's */
+
+enum cpm_clk_dir {
+        CPM_CLK_RX,
+        CPM_CLK_TX,
+        CPM_CLK_RTX
+};
+
+enum cpm_clk_target {
+        CPM_CLK_SCC1,
+        CPM_CLK_SCC2,
+        CPM_CLK_SCC3,
+        CPM_CLK_SCC4,
+        CPM_CLK_FCC1,
+        CPM_CLK_FCC2,
+        CPM_CLK_FCC3
+};
+
+enum cpm_clk {
+        CPM_CLK_NONE = 0,
+        CPM_BRG1,       /* Baud Rate Generator  1 */
+        CPM_BRG2,       /* Baud Rate Generator  2 */
+        CPM_BRG3,       /* Baud Rate Generator  3 */
+        CPM_BRG4,       /* Baud Rate Generator  4 */
+        CPM_BRG5,       /* Baud Rate Generator  5 */
+        CPM_BRG6,       /* Baud Rate Generator  6 */
+        CPM_BRG7,       /* Baud Rate Generator  7 */
+        CPM_BRG8,       /* Baud Rate Generator  8 */
+        CPM_CLK1,       /* Clock  1 */
+        CPM_CLK2,       /* Clock  2 */
+        CPM_CLK3,       /* Clock  3 */
+        CPM_CLK4,       /* Clock  4 */
+        CPM_CLK5,       /* Clock  5 */
+        CPM_CLK6,       /* Clock  6 */
+        CPM_CLK7,       /* Clock  7 */
+        CPM_CLK8,       /* Clock  8 */
+        CPM_CLK9,       /* Clock  9 */
+        CPM_CLK10,      /* Clock 10 */
+        CPM_CLK11,      /* Clock 11 */
+        CPM_CLK12,      /* Clock 12 */
+        CPM_CLK13,      /* Clock 13 */
+        CPM_CLK14,      /* Clock 14 */
+        CPM_CLK15,      /* Clock 15 */
+        CPM_CLK16,      /* Clock 16 */
+        CPM_CLK17,      /* Clock 17 */
+        CPM_CLK18,      /* Clock 18 */
+        CPM_CLK19,      /* Clock 19 */
+        CPM_CLK20,      /* Clock 20 */
+        CPM_CLK_DUMMY
+};
+
+extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
+
+#endif /* __CPM2__ */
+#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 3dc8e2dfca84..f62cffd56c0c 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -136,6 +136,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
 #define CPU_FTR_REAL_LE                 ASM_CONST(0x0000000000400000)
 #define CPU_FTR_FPU_UNAVAILABLE         ASM_CONST(0x0000000000800000)
 #define CPU_FTR_UNIFIED_ID_CACHE        ASM_CONST(0x0000000001000000)
+#define CPU_FTR_SPE                     ASM_CONST(0x0000000002000000)
 
 /*
  * Add the 64-bit processor unique features in the top half of the word;
@@ -180,6 +181,21 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
 #define PPC_FEATURE_HAS_ALTIVEC_COMP    0
 #endif
 
+/* We only set the spe features if the kernel was compiled with spe
+ * support
+ */
+#ifdef CONFIG_SPE
+#define CPU_FTR_SPE_COMP        CPU_FTR_SPE
+#define PPC_FEATURE_HAS_SPE_COMP PPC_FEATURE_HAS_SPE
+#define PPC_FEATURE_HAS_EFP_SINGLE_COMP PPC_FEATURE_HAS_EFP_SINGLE
+#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP PPC_FEATURE_HAS_EFP_DOUBLE
+#else
+#define CPU_FTR_SPE_COMP        0
+#define PPC_FEATURE_HAS_SPE_COMP    0
+#define PPC_FEATURE_HAS_EFP_SINGLE_COMP 0
+#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0
+#endif
+
 /* We need to mark all pages as being coherent if we're SMP or we
  * have a 74[45]x and an MPC107 host bridge. Also 83xx requires
  * it for PCI "streaming/prefetch" to work properly.
@@ -310,10 +326,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
 #define CPU_FTRS_8XX    (CPU_FTR_USE_TB)
 #define CPU_FTRS_40X    (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
 #define CPU_FTRS_44X    (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E200   (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
-            CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE)
-#define CPU_FTRS_E500   (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_E200   (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
+            CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
+            CPU_FTR_UNIFIED_ID_CACHE)
+#define CPU_FTRS_E500   (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
+            CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
             CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN)
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 
diff --git a/include/asm-powerpc/dcr-mmio.h b/include/asm-powerpc/dcr-mmio.h
index 5dbfca8dde36..6b82c3ba495a 100644
--- a/include/asm-powerpc/dcr-mmio.h
+++ b/include/asm-powerpc/dcr-mmio.h
@@ -23,7 +23,11 @@
 
 #include <asm/io.h>
 
-typedef struct { void __iomem *token; unsigned int stride; } dcr_host_t;
+typedef struct {
+        void __iomem *token;
+        unsigned int stride;
+        unsigned int base;
+} dcr_host_t;
 
 #define DCR_MAP_OK(host)        ((host).token != NULL)
 
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index 05af081222f6..f41058c0f6cb 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -22,11 +22,13 @@
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
-typedef struct {} dcr_host_t;
+typedef struct {
+        unsigned int base;
+} dcr_host_t;
 
 #define DCR_MAP_OK(host)        (1)
 
-#define dcr_map(dev, dcr_n, dcr_c)      ((dcr_host_t){})
+#define dcr_map(dev, dcr_n, dcr_c)      ((dcr_host_t){ .base = (dcr_n) })
 #define dcr_unmap(host, dcr_n, dcr_c)   do {} while (0)
 #define dcr_read(host, dcr_n)           mfdcr(dcr_n)
 #define dcr_write(host, dcr_n, value)   mtdcr(dcr_n, value)
diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 744d6bb24116..d05891608f74 100644
--- a/include/asm-powerpc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -249,8 +249,12 @@ dma_map_single(struct device *dev, void *ptr, size_t size,
         return virt_to_bus(ptr);
 }
 
-/* We do nothing. */
-#define dma_unmap_single(dev, addr, size, dir)  ((void)0)
+static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
+                                    size_t size,
+                                    enum dma_data_direction direction)
+{
+        /* We do nothing. */
+}
 
 static inline dma_addr_t
 dma_map_page(struct device *dev, struct page *page,
@@ -264,8 +268,12 @@ dma_map_page(struct device *dev, struct page *page,
         return page_to_bus(page) + offset;
 }
 
-/* We do nothing. */
-#define dma_unmap_page(dev, handle, size, dir)  ((void)0)
+static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
+                                  size_t size,
+                                  enum dma_data_direction direction)
+{
+        /* We do nothing. */
+}
 
 static inline int
 dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
@@ -284,8 +292,12 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
         return nents;
 }
 
-/* We don't do anything here. */
-#define dma_unmap_sg(dev, sg, nents, dir)       ((void)0)
+static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+                                int nhwentries,
+                                enum dma_data_direction direction)
+{
+        /* We don't do anything here. */
+}
 
 #endif /* CONFIG_PPC64 */
 
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index de507995c7b1..e42820d6d25b 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -413,13 +413,8 @@ do {									\
 /* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
 #define NT_SPU          1
 
-extern int arch_notes_size(void);
-extern void arch_write_notes(struct file *file);
-
-#define ELF_CORE_EXTRA_NOTES_SIZE arch_notes_size()
-#define ELF_CORE_WRITE_EXTRA_NOTES arch_write_notes(file)
-
 #define ARCH_HAVE_EXTRA_ELF_NOTES
-#endif /* CONFIG_PPC_CELL */
+
+#endif /* CONFIG_SPU_BASE */
 
 #endif /* _ASM_POWERPC_ELF_H */
diff --git a/include/asm-powerpc/exception.h b/include/asm-powerpc/exception.h
new file mode 100644
index 000000000000..39abdb02fdef
--- /dev/null
+++ b/include/asm-powerpc/exception.h
@@ -0,0 +1,311 @@
+#ifndef _ASM_POWERPC_EXCEPTION_H
+#define _ASM_POWERPC_EXCEPTION_H
+/*
+ * Extracted from head_64.S
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *
+ *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
+ *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
+ *
+ *  This file contains the low-level support and setup for the
+ *  PowerPC-64 platform, including trap and interrupt dispatch.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+/*
+ * The following macros define the code that appears as
+ * the prologue to each of the exception handlers.  They
+ * are split into two parts to allow a single kernel binary
+ * to be used for pSeries and iSeries.
+ *
+ * We make as much of the exception code common between native
+ * exception handlers (including pSeries LPAR) and iSeries LPAR
+ * implementations as possible.
+ */
+
+#define EX_R9           0
+#define EX_R10          8
+#define EX_R11          16
+#define EX_R12          24
+#define EX_R13          32
+#define EX_SRR0         40
+#define EX_DAR          48
+#define EX_DSISR        56
+#define EX_CCR          60
+#define EX_R3           64
+#define EX_LR           72
+
+/*
+ * We're short on space and time in the exception prolog, so we can't
+ * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
+ * low halfword of the address, but for Kdump we need the whole low
+ * word.
+ */
+#ifdef CONFIG_CRASH_DUMP
+#define LOAD_HANDLER(reg, label)                                        \
+        oris    reg,reg,(label)@h;      /* virt addr of handler ... */  \
+        ori     reg,reg,(label)@l;      /* .. and the rest */
+#else
+#define LOAD_HANDLER(reg, label)                                        \
+        ori     reg,reg,(label)@l;      /* virt addr of handler ... */
+#endif
+
+#define EXCEPTION_PROLOG_1(area)                                \
+        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
+        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
+        std     r10,area+EX_R10(r13);                                   \
+        std     r11,area+EX_R11(r13);                                   \
+        std     r12,area+EX_R12(r13);                                   \
+        mfspr   r9,SPRN_SPRG1;                                          \
+        std     r9,area+EX_R13(r13);                                    \
+        mfcr    r9
+
+/*
+ * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode.
+ * The firmware calls the registered system_reset_fwnmi and
+ * machine_check_fwnmi handlers in 32bit mode if the cpu happens to run
+ * a 32bit application at the time of the event.
+ * This firmware bug is present on POWER4 and JS20.
+ */
+#define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label)               \
+        EXCEPTION_PROLOG_1(area);                                       \
+        clrrdi  r12,r13,32;             /* get high part of &label */   \
+        mfmsr   r10;                                                    \
+        /* force 64bit mode */                                          \
+        li      r11,5;                  /* MSR_SF_LG|MSR_ISF_LG */      \
+        rldimi  r10,r11,61,0;           /* insert into top 3 bits */    \
+        /* done 64bit mode */                                           \
+        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
+        LOAD_HANDLER(r12,label)                                         \
+        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
+        mtspr   SPRN_SRR0,r12;                                          \
+        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mtspr   SPRN_SRR1,r10;                                          \
+        rfid;                                                           \
+        b       .       /* prevent speculative execution */
+
+#define EXCEPTION_PROLOG_PSERIES(area, label)                           \
+        EXCEPTION_PROLOG_1(area);                                       \
+        clrrdi  r12,r13,32;             /* get high part of &label */   \
+        mfmsr   r10;                                                    \
+        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
+        LOAD_HANDLER(r12,label)                                         \
+        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
+        mtspr   SPRN_SRR0,r12;                                          \
+        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mtspr   SPRN_SRR1,r10;                                          \
+        rfid;                                                           \
+        b       .       /* prevent speculative execution */
+
+/*
+ * The common exception prolog is used for all except a few exceptions
+ * such as a segment miss on a kernel address.  We have to be prepared
+ * to take another exception from the point where we first touch the
+ * kernel stack onwards.
+ *
+ * On entry r13 points to the paca, r9-r13 are saved in the paca,
+ * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
+ * SRR1, and relocation is on.
+ */
+#define EXCEPTION_PROLOG_COMMON(n, area)                                   \
+        andi.   r10,r12,MSR_PR;         /* See if coming from user      */ \
+        mr      r10,r1;                 /* Save r1                      */ \
+        subi    r1,r1,INT_FRAME_SIZE;   /* alloc frame on kernel stack  */ \
+        beq-    1f;                                                        \
+        ld      r1,PACAKSAVE(r13);      /* kernel stack to use          */ \
+1:      cmpdi   cr1,r1,0;               /* check if r1 is in userspace  */ \
+        bge-    cr1,2f;                 /* abort if it is               */ \
+        b       3f;                                                        \
+2:      li      r1,(n);                 /* will be reloaded later       */ \
+        sth     r1,PACA_TRAP_SAVE(r13);                                    \
+        b       bad_stack;                                                 \
+3:      std     r9,_CCR(r1);            /* save CR in stackframe        */ \
+        std     r11,_NIP(r1);           /* save SRR0 in stackframe      */ \
+        std     r12,_MSR(r1);           /* save SRR1 in stackframe      */ \
+        std     r10,0(r1);              /* make stack chain pointer     */ \
+        std     r0,GPR0(r1);            /* save r0 in stackframe        */ \
+        std     r10,GPR1(r1);           /* save r1 in stackframe        */ \
+        ACCOUNT_CPU_USER_ENTRY(r9, r10);                                   \
+        std     r2,GPR2(r1);            /* save r2 in stackframe        */ \
+        SAVE_4GPRS(3, r1);              /* save r3 - r6 in stackframe   */ \
+        SAVE_2GPRS(7, r1);              /* save r7, r8 in stackframe    */ \
+        ld      r9,area+EX_R9(r13);     /* move r9, r10 to stackframe   */ \
+        ld      r10,area+EX_R10(r13);                                      \
+        std     r9,GPR9(r1);                                               \
+        std     r10,GPR10(r1);                                             \
+        ld      r9,area+EX_R11(r13);    /* move r11 - r13 to stackframe */ \
+        ld      r10,area+EX_R12(r13);                                      \
+        ld      r11,area+EX_R13(r13);                                      \
+        std     r9,GPR11(r1);                                              \
+        std     r10,GPR12(r1);                                             \
+        std     r11,GPR13(r1);                                             \
+        ld      r2,PACATOC(r13);        /* get kernel TOC into r2       */ \
+        mflr    r9;                     /* save LR in stackframe        */ \
+        std     r9,_LINK(r1);                                              \
+        mfctr   r10;                    /* save CTR in stackframe       */ \
+        std     r10,_CTR(r1);                                              \
+        lbz     r10,PACASOFTIRQEN(r13);                            \
+        mfspr   r11,SPRN_XER;           /* save XER in stackframe       */ \
+        std     r10,SOFTE(r1);                                             \
+        std     r11,_XER(r1);                                              \
+        li      r9,(n)+1;                                                  \
+        std     r9,_TRAP(r1);           /* set trap number              */ \
+        li      r10,0;                                                     \
+        ld      r11,exception_marker@toc(r2);                              \
+        std     r10,RESULT(r1);         /* clear regs->result           */ \
+        std     r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame      */
+
+/*
+ * Exception vectors.
+ */
+#define STD_EXCEPTION_PSERIES(n, label)                 \
+        . = n;                                          \
+        .globl label##_pSeries;                         \
+label##_pSeries:                                        \
+        HMT_MEDIUM;                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+
+#define HSTD_EXCEPTION_PSERIES(n, label)                \
+        . = n;                                          \
+        .globl label##_pSeries;                         \
+label##_pSeries:                                        \
+        HMT_MEDIUM;                                     \
+        mtspr   SPRN_SPRG1,r20;         /* save r20 */  \
+        mfspr   r20,SPRN_HSRR0;         /* copy HSRR0 to SRR0 */ \
+        mtspr   SPRN_SRR0,r20;                          \
+        mfspr   r20,SPRN_HSRR1;         /* copy HSRR0 to SRR0 */ \
+        mtspr   SPRN_SRR1,r20;                          \
+        mfspr   r20,SPRN_SPRG1;         /* restore r20 */ \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+
+
+#define MASKABLE_EXCEPTION_PSERIES(n, label)                            \
+        . = n;                                                          \
+        .globl label##_pSeries;                                         \
+label##_pSeries:                                                        \
+        HMT_MEDIUM;                                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
+        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
+        std     r9,PACA_EXGEN+EX_R9(r13);       /* save r9, r10 */      \
+        std     r10,PACA_EXGEN+EX_R10(r13);                             \
+        lbz     r10,PACASOFTIRQEN(r13);                                 \
+        mfcr    r9;                                                     \
+        cmpwi   r10,0;                                                  \
+        beq     masked_interrupt;                                       \
+        mfspr   r10,SPRN_SPRG1;                                         \
+        std     r10,PACA_EXGEN+EX_R13(r13);                             \
+        std     r11,PACA_EXGEN+EX_R11(r13);                             \
+        std     r12,PACA_EXGEN+EX_R12(r13);                             \
+        clrrdi  r12,r13,32;             /* get high part of &label */   \
+        mfmsr   r10;                                                    \
+        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
+        LOAD_HANDLER(r12,label##_common)                                \
+        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
+        mtspr   SPRN_SRR0,r12;                                          \
+        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mtspr   SPRN_SRR1,r10;                                          \
+        rfid;                                                           \
+        b       .       /* prevent speculative execution */
+
+#ifdef CONFIG_PPC_ISERIES
+#define DISABLE_INTS                            \
+        li      r11,0;                          \
+        stb     r11,PACASOFTIRQEN(r13);         \
+BEGIN_FW_FTR_SECTION;                           \
+        stb     r11,PACAHARDIRQEN(r13);         \
+END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES);   \
+BEGIN_FW_FTR_SECTION;                           \
+        mfmsr   r10;                            \
+        ori     r10,r10,MSR_EE;                 \
+        mtmsrd  r10,1;                          \
+END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
+
+#else
+#define DISABLE_INTS                            \
+        li      r11,0;                          \
+        stb     r11,PACASOFTIRQEN(r13);         \
+        stb     r11,PACAHARDIRQEN(r13)
+
+#endif /* CONFIG_PPC_ISERIES */
+
+#define ENABLE_INTS                             \
+        ld      r12,_MSR(r1);                   \
+        mfmsr   r11;                            \
+        rlwimi  r11,r12,0,MSR_EE;               \
+        mtmsrd  r11,1
+
+#define STD_EXCEPTION_COMMON(trap, label, hdlr)         \
+        .align  7;                                      \
+        .globl label##_common;                          \
+label##_common:                                         \
+        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
+        DISABLE_INTS;                                   \
+        bl      .save_nvgprs;                           \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
+        bl      hdlr;                                   \
+        b       .ret_from_except
+
+/*
+ * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
+ * in the idle task and therefore need the special idle handling.
+ */
+#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr)    \
+        .align  7;                                      \
+        .globl label##_common;                          \
+label##_common:                                         \
+        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
+        FINISH_NAP;                                     \
+        DISABLE_INTS;                                   \
+        bl      .save_nvgprs;                           \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
+        bl      hdlr;                                   \
+        b       .ret_from_except
+
+#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr)    \
+        .align  7;                                      \
+        .globl label##_common;                          \
+label##_common:                                         \
+        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
+        FINISH_NAP;                                     \
+        DISABLE_INTS;                                   \
+BEGIN_FTR_SECTION                                       \
+        bl      .ppc64_runlatch_on;                     \
+END_FTR_SECTION_IFSET(CPU_FTR_CTRL)                     \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
+        bl      hdlr;                                   \
+        b       .ret_from_except_lite
+
+/*
+ * When the idle code in power4_idle puts the CPU into NAP mode,
+ * it has to do so in a loop, and relies on the external interrupt
+ * and decrementer interrupt entry code to get it out of the loop.
+ * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
+ * to signal that it is in the loop and needs help to get out.
+ */
+#ifdef CONFIG_PPC_970_NAP
+#define FINISH_NAP                              \
+BEGIN_FTR_SECTION                               \
+        clrrdi  r11,r1,THREAD_SHIFT;            \
+        ld      r9,TI_LOCAL_FLAGS(r11);         \
+        andi.   r10,r9,_TLF_NAPPING;            \
+        bnel    power4_fixup_nap;               \
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
+#else
+#define FINISH_NAP
+#endif
+
+#endif  /* _ASM_POWERPC_EXCEPTION_H */
diff --git a/include/asm-powerpc/highmem.h b/include/asm-powerpc/highmem.h
new file mode 100644
index 000000000000..f7b21ee302b4
--- /dev/null
+++ b/include/asm-powerpc/highmem.h
@@ -0,0 +1,135 @@
+/*
+ * highmem.h: virtual kernel memory mappings for high memory
+ *
+ * PowerPC version, stolen from the i386 version.
+ *
+ * Used in CONFIG_HIGHMEM systems for memory pages which
+ * are not addressable by direct kernel virtual addresses.
+ *
+ * Copyright (C) 1999 Gerhard Wichert, Siemens AG
+ *                    Gerhard.Wichert@pdb.siemens.de
+ *
+ *
+ * Redesigned the x86 32-bit VM architecture to deal with
+ * up to 16 Terrabyte physical memory. With current x86 CPUs
+ * we now support up to 64 Gigabytes physical RAM.
+ *
+ * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
+ */
+
+#ifndef _ASM_HIGHMEM_H
+#define _ASM_HIGHMEM_H
+
+#ifdef __KERNEL__
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/kmap_types.h>
+#include <asm/tlbflush.h>
+#include <asm/page.h>
+
+/* undef for production */
+#define HIGHMEM_DEBUG 1
+
+extern pte_t *kmap_pte;
+extern pgprot_t kmap_prot;
+extern pte_t *pkmap_page_table;
+
+/*
+ * Right now we initialize only a single pte table. It can be extended
+ * easily, subsequent pte tables have to be allocated in one physical
+ * chunk of RAM.
+ */
+#define PKMAP_BASE      CONFIG_HIGHMEM_START
+#define LAST_PKMAP      (1 << PTE_SHIFT)
+#define LAST_PKMAP_MASK (LAST_PKMAP-1)
+#define PKMAP_NR(virt)  ((virt-PKMAP_BASE) >> PAGE_SHIFT)
+#define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
+
+#define KMAP_FIX_BEGIN  (PKMAP_BASE + 0x00400000UL)
+
+extern void *kmap_high(struct page *page);
+extern void kunmap_high(struct page *page);
+
+static inline void *kmap(struct page *page)
+{
+        might_sleep();
+        if (!PageHighMem(page))
+                return page_address(page);
+        return kmap_high(page);
+}
+
+static inline void kunmap(struct page *page)
+{
+        BUG_ON(in_interrupt());
+        if (!PageHighMem(page))
+                return;
+        kunmap_high(page);
+}
+
+/*
+ * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
+ * gives a more generic (and caching) interface. But kmap_atomic can
+ * be used in IRQ contexts, so in some (very limited) cases we need
+ * it.
+ */
+static inline void *kmap_atomic(struct page *page, enum km_type type)
+{
+        unsigned int idx;
+        unsigned long vaddr;
+
+        /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */
+        pagefault_disable();
+        if (!PageHighMem(page))
+                return page_address(page);
+
+        idx = type + KM_TYPE_NR*smp_processor_id();
+        vaddr = KMAP_FIX_BEGIN + idx * PAGE_SIZE;
+#ifdef HIGHMEM_DEBUG
+        BUG_ON(!pte_none(*(kmap_pte+idx)));
+#endif
+        set_pte_at(&init_mm, vaddr, kmap_pte+idx, mk_pte(page, kmap_prot));
+        flush_tlb_page(NULL, vaddr);
+
+        return (void*) vaddr;
+}
+
+static inline void kunmap_atomic(void *kvaddr, enum km_type type)
+{
+#ifdef HIGHMEM_DEBUG
+        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
+        unsigned int idx = type + KM_TYPE_NR*smp_processor_id();
+
+        if (vaddr < KMAP_FIX_BEGIN) { // FIXME
+                pagefault_enable();
+                return;
+        }
+
+        BUG_ON(vaddr != KMAP_FIX_BEGIN + idx * PAGE_SIZE);
+
+        /*
+         * force other mappings to Oops if they'll try to access
+         * this pte without first remap it
+         */
+        pte_clear(&init_mm, vaddr, kmap_pte+idx);
+        flush_tlb_page(NULL, vaddr);
+#endif
+        pagefault_enable();
+}
+
+static inline struct page *kmap_atomic_to_page(void *ptr)
+{
+        unsigned long idx, vaddr = (unsigned long) ptr;
+
+        if (vaddr < KMAP_FIX_BEGIN)
+                return virt_to_page(ptr);
+
+        idx = (vaddr - KMAP_FIX_BEGIN) >> PAGE_SHIFT;
+        return pte_page(kmap_pte[idx]);
+}
+
+#define flush_cache_kmaps()     flush_cache_all()
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-powerpc/hydra.h b/include/asm-powerpc/hydra.h
new file mode 100644
index 000000000000..1ad4eed07fbe
--- /dev/null
+++ b/include/asm-powerpc/hydra.h
@@ -0,0 +1,102 @@
+/*
+ *  include/asm-ppc/hydra.h -- Mac I/O `Hydra' definitions
+ *
+ *  Copyright (C) 1997 Geert Uytterhoeven
+ *
+ *  This file is based on the following documentation:
+ *
+ *      Macintosh Technology in the Common Hardware Reference Platform
+ *      Apple Computer, Inc.
+ *
+ *      © Copyright 1995 Apple Computer, Inc. All rights reserved.
+ *
+ *  It's available online from http://chrp.apple.com/MacTech.pdf.
+ *  You can obtain paper copies of this book from computer bookstores or by
+ *  writing Morgan Kaufmann Publishers, Inc., 340 Pine Street, Sixth Floor, San
+ *  Francisco, CA 94104. Reference ISBN 1-55860-393-X.
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License.  See the file COPYING in the main directory of this archive
+ *  for more details.
+ */
+
+#ifndef _ASMPPC_HYDRA_H
+#define _ASMPPC_HYDRA_H
+
+#ifdef __KERNEL__
+
+struct Hydra {
+    /* DBDMA Controller Register Space */
+    char Pad1[0x30];
+    u_int CachePD;
+    u_int IDs;
+    u_int Feature_Control;
+    char Pad2[0x7fc4];
+    /* DBDMA Channel Register Space */
+    char SCSI_DMA[0x100];
+    char Pad3[0x300];
+    char SCCA_Tx_DMA[0x100];
+    char SCCA_Rx_DMA[0x100];
+    char SCCB_Tx_DMA[0x100];
+    char SCCB_Rx_DMA[0x100];
+    char Pad4[0x7800];
+    /* Device Register Space */
+    char SCSI[0x1000];
+    char ADB[0x1000];
+    char SCC_Legacy[0x1000];
+    char SCC[0x1000];
+    char Pad9[0x2000];
+    char VIA[0x2000];
+    char Pad10[0x28000];
+    char OpenPIC[0x40000];
+};
+
+extern volatile struct Hydra __iomem *Hydra;
+
+
+    /*
+     *  Feature Control Register
+     */
+
+#define HYDRA_FC_SCC_CELL_EN    0x00000001      /* Enable SCC Clock */
+#define HYDRA_FC_SCSI_CELL_EN   0x00000002      /* Enable SCSI Clock */
+#define HYDRA_FC_SCCA_ENABLE    0x00000004      /* Enable SCC A Lines */
+#define HYDRA_FC_SCCB_ENABLE    0x00000008      /* Enable SCC B Lines */
+#define HYDRA_FC_ARB_BYPASS     0x00000010      /* Bypass Internal Arbiter */
+#define HYDRA_FC_RESET_SCC      0x00000020      /* Reset SCC */
+#define HYDRA_FC_MPIC_ENABLE    0x00000040      /* Enable OpenPIC */
+#define HYDRA_FC_SLOW_SCC_PCLK  0x00000080      /* 1=15.6672, 0=25 MHz */
+#define HYDRA_FC_MPIC_IS_MASTER 0x00000100      /* OpenPIC Master Mode */
+
+
+    /*
+     *  OpenPIC Interrupt Sources
+     */
+
+#define HYDRA_INT_SIO           0
+#define HYDRA_INT_SCSI_DMA      1
+#define HYDRA_INT_SCCA_TX_DMA   2
+#define HYDRA_INT_SCCA_RX_DMA   3
+#define HYDRA_INT_SCCB_TX_DMA   4
+#define HYDRA_INT_SCCB_RX_DMA   5
+#define HYDRA_INT_SCSI          6
+#define HYDRA_INT_SCCA          7
+#define HYDRA_INT_SCCB          8
+#define HYDRA_INT_VIA           9
+#define HYDRA_INT_ADB           10
+#define HYDRA_INT_ADB_NMI       11
+#define HYDRA_INT_EXT1          12      /* PCI IRQW */
+#define HYDRA_INT_EXT2          13      /* PCI IRQX */
+#define HYDRA_INT_EXT3          14      /* PCI IRQY */
+#define HYDRA_INT_EXT4          15      /* PCI IRQZ */
+#define HYDRA_INT_EXT5          16      /* IDE Primay/Secondary */
+#define HYDRA_INT_EXT6          17      /* IDE Secondary */
+#define HYDRA_INT_EXT7          18      /* Power Off Request */
+#define HYDRA_INT_SPARE         19
+
+extern int hydra_init(void);
+extern void macio_adb_init(void);
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASMPPC_HYDRA_H */
diff --git a/include/asm-powerpc/ide.h b/include/asm-powerpc/ide.h
index 0f66f0f82c32..1644e44c8757 100644
--- a/include/asm-powerpc/ide.h
+++ b/include/asm-powerpc/ide.h
@@ -67,7 +67,7 @@ static __inline__ unsigned long ide_default_io_base(int index)
 #define ide_init_default_irq(base)      ide_default_irq(base)
 #endif
 
-#if (defined CONFIG_APUS || defined CONFIG_BLK_DEV_MPC8xx_IDE )
+#ifdef CONFIG_BLK_DEV_MPC8xx_IDE
 #define IDE_ARCH_ACK_INTR  1
 #define ide_ack_intr(hwif) (hwif->hw.ack_intr ? hwif->hw.ack_intr(hwif) : 1)
 #endif
diff --git a/include/asm-powerpc/immap_86xx.h b/include/asm-powerpc/immap_86xx.h
index 59b9e07b8e99..c83d7ad16606 100644
--- a/include/asm-powerpc/immap_86xx.h
+++ b/include/asm-powerpc/immap_86xx.h
@@ -1,124 +1,65 @@
-/*
+/**
  * MPC86xx Internal Memory Map
  *
- * Author: Jeff Brown
+ * Authors: Jeff Brown
+ *          Timur Tabi <timur@freescale.com>
  *
- * Copyright 2004 Freescale Semiconductor, Inc
+ * Copyright 2004,2007 Freescale Semiconductor, Inc
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
  *
+ * This header file defines structures for various 86xx SOC devices that are
+ * used by multiple source files.
  */
 
 #ifndef __ASM_POWERPC_IMMAP_86XX_H__
 #define __ASM_POWERPC_IMMAP_86XX_H__
 #ifdef __KERNEL__
 
-/* Eventually this should define all the IO block registers in 86xx */
-
-/* PCI Registers */
-typedef struct ccsr_pci {
-        uint    cfg_addr;       /* 0x.000 - PCI Configuration Address Register */
-        uint    cfg_data;       /* 0x.004 - PCI Configuration Data Register */
-        uint    int_ack;        /* 0x.008 - PCI Interrupt Acknowledge Register */
-        char    res1[3060];
-        uint    potar0;         /* 0x.c00 - PCI Outbound Transaction Address Register 0 */
-        uint    potear0;        /* 0x.c04 - PCI Outbound Translation Extended Address Register 0 */
-        uint    powbar0;        /* 0x.c08 - PCI Outbound Window Base Address Register 0 */
-        char    res2[4];
-        uint    powar0;         /* 0x.c10 - PCI Outbound Window Attributes Register 0 */
-        char    res3[12];
-        uint    potar1;         /* 0x.c20 - PCI Outbound Transaction Address Register 1 */
-        uint    potear1;        /* 0x.c24 - PCI Outbound Translation Extended Address Register 1 */
-        uint    powbar1;        /* 0x.c28 - PCI Outbound Window Base Address Register 1 */
-        char    res4[4];
-        uint    powar1;         /* 0x.c30 - PCI Outbound Window Attributes Register 1 */
-        char    res5[12];
-        uint    potar2;         /* 0x.c40 - PCI Outbound Transaction Address Register 2 */
-        uint    potear2;        /* 0x.c44 - PCI Outbound Translation Extended Address Register 2 */
-        uint    powbar2;        /* 0x.c48 - PCI Outbound Window Base Address Register 2 */
-        char    res6[4];
-        uint    powar2;         /* 0x.c50 - PCI Outbound Window Attributes Register 2 */
-        char    res7[12];
-        uint    potar3;         /* 0x.c60 - PCI Outbound Transaction Address Register 3 */
-        uint    potear3;        /* 0x.c64 - PCI Outbound Translation Extended Address Register 3 */
-        uint    powbar3;        /* 0x.c68 - PCI Outbound Window Base Address Register 3 */
-        char    res8[4];
-        uint    powar3;         /* 0x.c70 - PCI Outbound Window Attributes Register 3 */
-        char    res9[12];
-        uint    potar4;         /* 0x.c80 - PCI Outbound Transaction Address Register 4 */
-        uint    potear4;        /* 0x.c84 - PCI Outbound Translation Extended Address Register 4 */
-        uint    powbar4;        /* 0x.c88 - PCI Outbound Window Base Address Register 4 */
-        char    res10[4];
-        uint    powar4;         /* 0x.c90 - PCI Outbound Window Attributes Register 4 */
-        char    res11[268];
-        uint    pitar3;         /* 0x.da0 - PCI Inbound Translation Address Register 3  */
-        char    res12[4];
-        uint    piwbar3;        /* 0x.da8 - PCI Inbound Window Base Address Register 3 */
-        uint    piwbear3;       /* 0x.dac - PCI Inbound Window Base Extended Address Register 3 */
-        uint    piwar3;         /* 0x.db0 - PCI Inbound Window Attributes Register 3 */
-        char    res13[12];
-        uint    pitar2;         /* 0x.dc0 - PCI Inbound Translation Address Register 2  */
-        char    res14[4];
-        uint    piwbar2;        /* 0x.dc8 - PCI Inbound Window Base Address Register 2 */
-        uint    piwbear2;       /* 0x.dcc - PCI Inbound Window Base Extended Address Register 2 */
-        uint    piwar2;         /* 0x.dd0 - PCI Inbound Window Attributes Register 2 */
-        char    res15[12];
-        uint    pitar1;         /* 0x.de0 - PCI Inbound Translation Address Register 1  */
-        char    res16[4];
-        uint    piwbar1;        /* 0x.de8 - PCI Inbound Window Base Address Register 1 */
-        char    res17[4];
-        uint    piwar1;         /* 0x.df0 - PCI Inbound Window Attributes Register 1 */
-        char    res18[12];
-        uint    err_dr;         /* 0x.e00 - PCI Error Detect Register */
-        uint    err_cap_dr;     /* 0x.e04 - PCI Error Capture Disable Register */
-        uint    err_en;         /* 0x.e08 - PCI Error Enable Register */
-        uint    err_attrib;     /* 0x.e0c - PCI Error Attributes Capture Register */
-        uint    err_addr;       /* 0x.e10 - PCI Error Address Capture Register */
-        uint    err_ext_addr;   /* 0x.e14 - PCI Error Extended Address Capture Register */
-        uint    err_dl;         /* 0x.e18 - PCI Error Data Low Capture Register */
-        uint    err_dh;         /* 0x.e1c - PCI Error Data High Capture Register */
-        uint    gas_timr;       /* 0x.e20 - PCI Gasket Timer Register */
-        uint    pci_timr;       /* 0x.e24 - PCI Timer Register */
-        char    res19[472];
-} ccsr_pci_t;
-
 /* Global Utility Registers */
-typedef struct ccsr_guts {
-        uint    porpllsr;       /* 0x.0000 - POR PLL Ratio Status Register */
-        uint    porbmsr;        /* 0x.0004 - POR Boot Mode Status Register */
-        uint    porimpscr;      /* 0x.0008 - POR I/O Impedance Status and Control Register */
-        uint    pordevsr;       /* 0x.000c - POR I/O Device Status Register */
-        uint    pordbgmsr;      /* 0x.0010 - POR Debug Mode Status Register */
-        char    res1[12];
-        uint    gpporcr;        /* 0x.0020 - General-Purpose POR Configuration Register */
-        char    res2[12];
-        uint    gpiocr;         /* 0x.0030 - GPIO Control Register */
-        char    res3[12];
-        uint    gpoutdr;        /* 0x.0040 - General-Purpose Output Data Register */
-        char    res4[12];
-        uint    gpindr;         /* 0x.0050 - General-Purpose Input Data Register */
-        char    res5[12];
-        uint    pmuxcr;         /* 0x.0060 - Alternate Function Signal Multiplex Control */
-        char    res6[12];
-        uint    devdisr;        /* 0x.0070 - Device Disable Control */
-        char    res7[12];
-        uint    powmgtcsr;      /* 0x.0080 - Power Management Status and Control Register */
-        char    res8[12];
-        uint    mcpsumr;        /* 0x.0090 - Machine Check Summary Register */
-        char    res9[12];
-        uint    pvr;            /* 0x.00a0 - Processor Version Register */
-        uint    svr;            /* 0x.00a4 - System Version Register */
-        char    res10[3416];
-        uint    clkocr;         /* 0x.0e00 - Clock Out Select Register */
-        char    res11[12];
-        uint    ddrdllcr;       /* 0x.0e10 - DDR DLL Control Register */
-        char    res12[12];
-        uint    lbcdllcr;       /* 0x.0e20 - LBC DLL Control Register */
-        char    res13[61916];
-} ccsr_guts_t;
+struct ccsr_guts {
+        __be32  porpllsr;       /* 0x.0000 - POR PLL Ratio Status Register */
+        __be32  porbmsr;        /* 0x.0004 - POR Boot Mode Status Register */
+        __be32  porimpscr;      /* 0x.0008 - POR I/O Impedance Status and Control Register */
+        __be32  pordevsr;       /* 0x.000c - POR I/O Device Status Register */
+        __be32  pordbgmsr;      /* 0x.0010 - POR Debug Mode Status Register */
+        u8      res1[0x20 - 0x14];
+        __be32  porcir;         /* 0x.0020 - POR Configuration Information Register */
+        u8      res2[0x30 - 0x24];
+        __be32  gpiocr;         /* 0x.0030 - GPIO Control Register */
+        u8      res3[0x40 - 0x34];
+        __be32  gpoutdr;        /* 0x.0040 - General-Purpose Output Data Register */
+        u8      res4[0x50 - 0x44];
+        __be32  gpindr;         /* 0x.0050 - General-Purpose Input Data Register */
+        u8      res5[0x60 - 0x54];
+        __be32  pmuxcr;         /* 0x.0060 - Alternate Function Signal Multiplex Control */
+        u8      res6[0x70 - 0x64];
+        __be32  devdisr;        /* 0x.0070 - Device Disable Control */
+        u8      res7[0x80 - 0x74];
+        __be32  powmgtcsr;      /* 0x.0080 - Power Management Status and Control Register */
+        u8      res8[0x90 - 0x84];
+        __be32  mcpsumr;        /* 0x.0090 - Machine Check Summary Register */
+        __be32  rstrscr;        /* 0x.0094 - Reset Request Status and Control Register */
+        u8      res9[0xA0 - 0x98];
+        __be32  pvr;            /* 0x.00a0 - Processor Version Register */
+        __be32  svr;            /* 0x.00a4 - System Version Register */
+        u8      res10[0xB0 - 0xA8];
+        __be32  rstcr;          /* 0x.00b0 - Reset Control Register */
+        u8      res11[0xB20 - 0xB4];
+        __be32  ddr1clkdr;      /* 0x.0b20 - DDRC1 Clock Disable Register */
+        __be32  ddr2clkdr;      /* 0x.0b24 - DDRC2 Clock Disable Register */
+        u8      res12[0xE00 - 0xB28];
+        __be32  clkocr;         /* 0x.0e00 - Clock Out Select Register */
+        u8      res13[0xF04 - 0xE04];
+        __be32  srds1cr0;       /* 0x.0f04 - SerDes1 Control Register 0 */
+        __be32  srds1cr1;       /* 0x.0f08 - SerDes1 Control Register 0 */
+        u8      res14[0xF40 - 0xF0C];
+        __be32  srds2cr0;       /* 0x.0f40 - SerDes1 Control Register 0 */
+        __be32  srds2cr1;       /* 0x.0f44 - SerDes1 Control Register 0 */
+};
 
 #endif /* __ASM_POWERPC_IMMAP_86XX_H__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/immap_cpm2.h b/include/asm-powerpc/immap_cpm2.h
new file mode 100644
index 000000000000..f316a91c628a
--- /dev/null
+++ b/include/asm-powerpc/immap_cpm2.h
@@ -0,0 +1,648 @@
+/*
+ * CPM2 Internal Memory Map
+ * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
+ *
+ * The Internal Memory Map for devices with CPM2 on them.  This
+ * is the superset of all CPM2 devices (8260, 8266, 8280, 8272,
+ * 8560).
+ */
+#ifdef __KERNEL__
+#ifndef __IMMAP_CPM2__
+#define __IMMAP_CPM2__
+
+/* System configuration registers.
+*/
+typedef struct sys_82xx_conf {
+        u32     sc_siumcr;
+        u32     sc_sypcr;
+        u8      res1[6];
+        u16     sc_swsr;
+        u8      res2[20];
+        u32     sc_bcr;
+        u8      sc_ppc_acr;
+        u8      res3[3];
+        u32     sc_ppc_alrh;
+        u32     sc_ppc_alrl;
+        u8      sc_lcl_acr;
+        u8      res4[3];
+        u32     sc_lcl_alrh;
+        u32     sc_lcl_alrl;
+        u32     sc_tescr1;
+        u32     sc_tescr2;
+        u32     sc_ltescr1;
+        u32     sc_ltescr2;
+        u32     sc_pdtea;
+        u8      sc_pdtem;
+        u8      res5[3];
+        u32     sc_ldtea;
+        u8      sc_ldtem;
+        u8      res6[163];
+} sysconf_82xx_cpm2_t;
+
+typedef struct sys_85xx_conf {
+        u32     sc_cear;
+        u16     sc_ceer;
+        u16     sc_cemr;
+        u8      res1[70];
+        u32     sc_smaer;
+        u8      res2[4];
+        u32     sc_smevr;
+        u32     sc_smctr;
+        u32     sc_lmaer;
+        u8      res3[4];
+        u32     sc_lmevr;
+        u32     sc_lmctr;
+        u8      res4[144];
+} sysconf_85xx_cpm2_t;
+
+typedef union sys_conf {
+        sysconf_82xx_cpm2_t     siu_82xx;
+        sysconf_85xx_cpm2_t     siu_85xx;
+} sysconf_cpm2_t;
+
+
+
+/* Memory controller registers.
+*/
+typedef struct  mem_ctlr {
+        u32     memc_br0;
+        u32     memc_or0;
+        u32     memc_br1;
+        u32     memc_or1;
+        u32     memc_br2;
+        u32     memc_or2;
+        u32     memc_br3;
+        u32     memc_or3;
+        u32     memc_br4;
+        u32     memc_or4;
+        u32     memc_br5;
+        u32     memc_or5;
+        u32     memc_br6;
+        u32     memc_or6;
+        u32     memc_br7;
+        u32     memc_or7;
+        u32     memc_br8;
+        u32     memc_or8;
+        u32     memc_br9;
+        u32     memc_or9;
+        u32     memc_br10;
+        u32     memc_or10;
+        u32     memc_br11;
+        u32     memc_or11;
+        u8      res1[8];
+        u32     memc_mar;
+        u8      res2[4];
+        u32     memc_mamr;
+        u32     memc_mbmr;
+        u32     memc_mcmr;
+        u8      res3[8];
+        u16     memc_mptpr;
+        u8      res4[2];
+        u32     memc_mdr;
+        u8      res5[4];
+        u32     memc_psdmr;
+        u32     memc_lsdmr;
+        u8      memc_purt;
+        u8      res6[3];
+        u8      memc_psrt;
+        u8      res7[3];
+        u8      memc_lurt;
+        u8      res8[3];
+        u8      memc_lsrt;
+        u8      res9[3];
+        u32     memc_immr;
+        u32     memc_pcibr0;
+        u32     memc_pcibr1;
+        u8      res10[16];
+        u32     memc_pcimsk0;
+        u32     memc_pcimsk1;
+        u8      res11[52];
+} memctl_cpm2_t;
+
+/* System Integration Timers.
+*/
+typedef struct  sys_int_timers {
+        u8      res1[32];
+        u16     sit_tmcntsc;
+        u8      res2[2];
+        u32     sit_tmcnt;
+        u8      res3[4];
+        u32     sit_tmcntal;
+        u8      res4[16];
+        u16     sit_piscr;
+        u8      res5[2];
+        u32     sit_pitc;
+        u32     sit_pitr;
+        u8      res6[94];
+        u8      res7[390];
+} sit_cpm2_t;
+
+#define PISCR_PIRQ_MASK         ((u16)0xff00)
+#define PISCR_PS                ((u16)0x0080)
+#define PISCR_PIE               ((u16)0x0004)
+#define PISCR_PTF               ((u16)0x0002)
+#define PISCR_PTE               ((u16)0x0001)
+
+/* PCI Controller.
+*/
+typedef struct pci_ctlr {
+        u32     pci_omisr;
+        u32     pci_omimr;
+        u8      res1[8];
+        u32     pci_ifqpr;
+        u32     pci_ofqpr;
+        u8      res2[8];
+        u32     pci_imr0;
+        u32     pci_imr1;
+        u32     pci_omr0;
+        u32     pci_omr1;
+        u32     pci_odr;
+        u8      res3[4];
+        u32     pci_idr;
+        u8      res4[20];
+        u32     pci_imisr;
+        u32     pci_imimr;
+        u8      res5[24];
+        u32     pci_ifhpr;
+        u8      res6[4];
+        u32     pci_iftpr;
+        u8      res7[4];
+        u32     pci_iphpr;
+        u8      res8[4];
+        u32     pci_iptpr;
+        u8      res9[4];
+        u32     pci_ofhpr;
+        u8      res10[4];
+        u32     pci_oftpr;
+        u8      res11[4];
+        u32     pci_ophpr;
+        u8      res12[4];
+        u32     pci_optpr;
+        u8      res13[8];
+        u32     pci_mucr;
+        u8      res14[8];
+        u32     pci_qbar;
+        u8      res15[12];
+        u32     pci_dmamr0;
+        u32     pci_dmasr0;
+        u32     pci_dmacdar0;
+        u8      res16[4];
+        u32     pci_dmasar0;
+        u8      res17[4];
+        u32     pci_dmadar0;
+        u8      res18[4];
+        u32     pci_dmabcr0;
+        u32     pci_dmandar0;
+        u8      res19[86];
+        u32     pci_dmamr1;
+        u32     pci_dmasr1;
+        u32     pci_dmacdar1;
+        u8      res20[4];
+        u32     pci_dmasar1;
+        u8      res21[4];
+        u32     pci_dmadar1;
+        u8      res22[4];
+        u32     pci_dmabcr1;
+        u32     pci_dmandar1;
+        u8      res23[88];
+        u32     pci_dmamr2;
+        u32     pci_dmasr2;
+        u32     pci_dmacdar2;
+        u8      res24[4];
+        u32     pci_dmasar2;
+        u8      res25[4];
+        u32     pci_dmadar2;
+        u8      res26[4];
+        u32     pci_dmabcr2;
+        u32     pci_dmandar2;
+        u8      res27[88];
+        u32     pci_dmamr3;
+        u32     pci_dmasr3;
+        u32     pci_dmacdar3;
+        u8      res28[4];
+        u32     pci_dmasar3;
+        u8      res29[4];
+        u32     pci_dmadar3;
+        u8      res30[4];
+        u32     pci_dmabcr3;
+        u32     pci_dmandar3;
+        u8      res31[344];
+        u32     pci_potar0;
+        u8      res32[4];
+        u32     pci_pobar0;
+        u8      res33[4];
+        u32     pci_pocmr0;
+        u8      res34[4];
+        u32     pci_potar1;
+        u8      res35[4];
+        u32     pci_pobar1;
+        u8      res36[4];
+        u32     pci_pocmr1;
+        u8      res37[4];
+        u32     pci_potar2;
+        u8      res38[4];
+        u32     pci_pobar2;
+        u8      res39[4];
+        u32     pci_pocmr2;
+        u8      res40[50];
+        u32     pci_ptcr;
+        u32     pci_gpcr;
+        u32     pci_gcr;
+        u32     pci_esr;
+        u32     pci_emr;
+        u32     pci_ecr;
+        u32     pci_eacr;
+        u8      res41[4];
+        u32     pci_edcr;
+        u8      res42[4];
+        u32     pci_eccr;
+        u8      res43[44];
+        u32     pci_pitar1;
+        u8      res44[4];
+        u32     pci_pibar1;
+        u8      res45[4];
+        u32     pci_picmr1;
+        u8      res46[4];
+        u32     pci_pitar0;
+        u8      res47[4];
+        u32     pci_pibar0;
+        u8      res48[4];
+        u32     pci_picmr0;
+        u8      res49[4];
+        u32     pci_cfg_addr;
+        u32     pci_cfg_data;
+        u32     pci_int_ack;
+        u8      res50[756];
+} pci_cpm2_t;
+
+/* Interrupt Controller.
+*/
+typedef struct interrupt_controller {
+        u16     ic_sicr;
+        u8      res1[2];
+        u32     ic_sivec;
+        u32     ic_sipnrh;
+        u32     ic_sipnrl;
+        u32     ic_siprr;
+        u32     ic_scprrh;
+        u32     ic_scprrl;
+        u32     ic_simrh;
+        u32     ic_simrl;
+        u32     ic_siexr;
+        u8      res2[88];
+} intctl_cpm2_t;
+
+/* Clocks and Reset.
+*/
+typedef struct clk_and_reset {
+        u32     car_sccr;
+        u8      res1[4];
+        u32     car_scmr;
+        u8      res2[4];
+        u32     car_rsr;
+        u32     car_rmr;
+        u8      res[104];
+} car_cpm2_t;
+
+/* Input/Output Port control/status registers.
+ * Names consistent with processor manual, although they are different
+ * from the original 8xx names.......
+ */
+typedef struct io_port {
+        u32     iop_pdira;
+        u32     iop_ppara;
+        u32     iop_psora;
+        u32     iop_podra;
+        u32     iop_pdata;
+        u8      res1[12];
+        u32     iop_pdirb;
+        u32     iop_pparb;
+        u32     iop_psorb;
+        u32     iop_podrb;
+        u32     iop_pdatb;
+        u8      res2[12];
+        u32     iop_pdirc;
+        u32     iop_pparc;
+        u32     iop_psorc;
+        u32     iop_podrc;
+        u32     iop_pdatc;
+        u8      res3[12];
+        u32     iop_pdird;
+        u32     iop_ppard;
+        u32     iop_psord;
+        u32     iop_podrd;
+        u32     iop_pdatd;
+        u8      res4[12];
+} iop_cpm2_t;
+
+/* Communication Processor Module Timers
+*/
+typedef struct cpm_timers {
+        u8      cpmt_tgcr1;
+        u8      res1[3];
+        u8      cpmt_tgcr2;
+        u8      res2[11];
+        u16     cpmt_tmr1;
+        u16     cpmt_tmr2;
+        u16     cpmt_trr1;
+        u16     cpmt_trr2;
+        u16     cpmt_tcr1;
+        u16     cpmt_tcr2;
+        u16     cpmt_tcn1;
+        u16     cpmt_tcn2;
+        u16     cpmt_tmr3;
+        u16     cpmt_tmr4;
+        u16     cpmt_trr3;
+        u16     cpmt_trr4;
+        u16     cpmt_tcr3;
+        u16     cpmt_tcr4;
+        u16     cpmt_tcn3;
+        u16     cpmt_tcn4;
+        u16     cpmt_ter1;
+        u16     cpmt_ter2;
+        u16     cpmt_ter3;
+        u16     cpmt_ter4;
+        u8      res3[584];
+} cpmtimer_cpm2_t;
+
+/* DMA control/status registers.
+*/
+typedef struct sdma_csr {
+        u8      res0[24];
+        u8      sdma_sdsr;
+        u8      res1[3];
+        u8      sdma_sdmr;
+        u8      res2[3];
+        u8      sdma_idsr1;
+        u8      res3[3];
+        u8      sdma_idmr1;
+        u8      res4[3];
+        u8      sdma_idsr2;
+        u8      res5[3];
+        u8      sdma_idmr2;
+        u8      res6[3];
+        u8      sdma_idsr3;
+        u8      res7[3];
+        u8      sdma_idmr3;
+        u8      res8[3];
+        u8      sdma_idsr4;
+        u8      res9[3];
+        u8      sdma_idmr4;
+        u8      res10[707];
+} sdma_cpm2_t;
+
+/* Fast controllers
+*/
+typedef struct fcc {
+        u32     fcc_gfmr;
+        u32     fcc_fpsmr;
+        u16     fcc_ftodr;
+        u8      res1[2];
+        u16     fcc_fdsr;
+        u8      res2[2];
+        u16     fcc_fcce;
+        u8      res3[2];
+        u16     fcc_fccm;
+        u8      res4[2];
+        u8      fcc_fccs;
+        u8      res5[3];
+        u8      fcc_ftirr_phy[4];
+} fcc_t;
+
+/* Fast controllers continued
+ */
+typedef struct fcc_c {
+        u32     fcc_firper;
+        u32     fcc_firer;
+        u32     fcc_firsr_hi;
+        u32     fcc_firsr_lo;
+        u8      fcc_gfemr;
+        u8      res1[15];
+} fcc_c_t;
+
+/* TC Layer
+ */
+typedef struct tclayer {
+        u16     tc_tcmode;
+        u16     tc_cdsmr;
+        u16     tc_tcer;
+        u16     tc_rcc;
+        u16     tc_tcmr;
+        u16     tc_fcc;
+        u16     tc_ccc;
+        u16     tc_icc;
+        u16     tc_tcc;
+        u16     tc_ecc;
+        u8      res1[12];
+} tclayer_t;
+
+
+/* I2C
+*/
+typedef struct i2c {
+        u8      i2c_i2mod;
+        u8      res1[3];
+        u8      i2c_i2add;
+        u8      res2[3];
+        u8      i2c_i2brg;
+        u8      res3[3];
+        u8      i2c_i2com;
+        u8      res4[3];
+        u8      i2c_i2cer;
+        u8      res5[3];
+        u8      i2c_i2cmr;
+        u8      res6[331];
+} i2c_cpm2_t;
+
+typedef struct scc {            /* Serial communication channels */
+        u32     scc_gsmrl;
+        u32     scc_gsmrh;
+        u16     scc_psmr;
+        u8      res1[2];
+        u16     scc_todr;
+        u16     scc_dsr;
+        u16     scc_scce;
+        u8      res2[2];
+        u16     scc_sccm;
+        u8      res3;
+        u8      scc_sccs;
+        u8      res4[8];
+} scc_t;
+
+typedef struct smc {            /* Serial management channels */
+        u8      res1[2];
+        u16     smc_smcmr;
+        u8      res2[2];
+        u8      smc_smce;
+        u8      res3[3];
+        u8      smc_smcm;
+        u8      res4[5];
+} smc_t;
+
+/* Serial Peripheral Interface.
+*/
+typedef struct spi_ctrl {
+        u16     spi_spmode;
+        u8      res1[4];
+        u8      spi_spie;
+        u8      res2[3];
+        u8      spi_spim;
+        u8      res3[2];
+        u8      spi_spcom;
+        u8      res4[82];
+} spictl_cpm2_t;
+
+/* CPM Mux.
+*/
+typedef struct cpmux {
+        u8      cmx_si1cr;
+        u8      res1;
+        u8      cmx_si2cr;
+        u8      res2;
+        u32     cmx_fcr;
+        u32     cmx_scr;
+        u8      cmx_smr;
+        u8      res3;
+        u16     cmx_uar;
+        u8      res4[16];
+} cpmux_t;
+
+/* SIRAM control
+*/
+typedef struct siram {
+        u16     si_amr;
+        u16     si_bmr;
+        u16     si_cmr;
+        u16     si_dmr;
+        u8      si_gmr;
+        u8      res1;
+        u8      si_cmdr;
+        u8      res2;
+        u8      si_str;
+        u8      res3;
+        u16     si_rsr;
+} siramctl_t;
+
+typedef struct mcc {
+        u16     mcc_mcce;
+        u8      res1[2];
+        u16     mcc_mccm;
+        u8      res2[2];
+        u8      mcc_mccf;
+        u8      res3[7];
+} mcc_t;
+
+typedef struct comm_proc {
+        u32     cp_cpcr;
+        u32     cp_rccr;
+        u8      res1[14];
+        u16     cp_rter;
+        u8      res2[2];
+        u16     cp_rtmr;
+        u16     cp_rtscr;
+        u8      res3[2];
+        u32     cp_rtsr;
+        u8      res4[12];
+} cpm_cpm2_t;
+
+/* USB Controller.
+*/
+typedef struct usb_ctlr {
+        u8      usb_usmod;
+        u8      usb_usadr;
+        u8      usb_uscom;
+        u8      res1[1];
+        u16     usb_usep1;
+        u16     usb_usep2;
+        u16     usb_usep3;
+        u16     usb_usep4;
+        u8      res2[4];
+        u16     usb_usber;
+        u8      res3[2];
+        u16     usb_usbmr;
+        u8      usb_usbs;
+        u8      res4[7];
+} usb_cpm2_t;
+
+/* ...and the whole thing wrapped up....
+*/
+
+typedef struct immap {
+        /* Some references are into the unique and known dpram spaces,
+         * others are from the generic base.
+         */
+#define im_dprambase    im_dpram1
+        u8              im_dpram1[16*1024];
+        u8              res1[16*1024];
+        u8              im_dpram2[4*1024];
+        u8              res2[8*1024];
+        u8              im_dpram3[4*1024];
+        u8              res3[16*1024];
+
+        sysconf_cpm2_t  im_siu_conf;    /* SIU Configuration */
+        memctl_cpm2_t   im_memctl;      /* Memory Controller */
+        sit_cpm2_t      im_sit;         /* System Integration Timers */
+        pci_cpm2_t      im_pci;         /* PCI Controller */
+        intctl_cpm2_t   im_intctl;      /* Interrupt Controller */
+        car_cpm2_t      im_clkrst;      /* Clocks and reset */
+        iop_cpm2_t      im_ioport;      /* IO Port control/status */
+        cpmtimer_cpm2_t im_cpmtimer;    /* CPM timers */
+        sdma_cpm2_t     im_sdma;        /* SDMA control/status */
+
+        fcc_t           im_fcc[3];      /* Three FCCs */
+        u8              res4z[32];
+        fcc_c_t         im_fcc_c[3];    /* Continued FCCs */
+
+        u8              res4[32];
+
+        tclayer_t       im_tclayer[8];  /* Eight TCLayers */
+        u16             tc_tcgsr;
+        u16             tc_tcger;
+
+        /* First set of baud rate generators.
+        */
+        u8              res[236];
+        u32             im_brgc5;
+        u32             im_brgc6;
+        u32             im_brgc7;
+        u32             im_brgc8;
+
+        u8              res5[608];
+
+        i2c_cpm2_t      im_i2c;         /* I2C control/status */
+        cpm_cpm2_t      im_cpm;         /* Communication processor */
+
+        /* Second set of baud rate generators.
+        */
+        u32             im_brgc1;
+        u32             im_brgc2;
+        u32             im_brgc3;
+        u32             im_brgc4;
+
+        scc_t           im_scc[4];      /* Four SCCs */
+        smc_t           im_smc[2];      /* Couple of SMCs */
+        spictl_cpm2_t   im_spi;         /* A SPI */
+        cpmux_t         im_cpmux;       /* CPM clock route mux */
+        siramctl_t      im_siramctl1;   /* First SI RAM Control */
+        mcc_t           im_mcc1;        /* First MCC */
+        siramctl_t      im_siramctl2;   /* Second SI RAM Control */
+        mcc_t           im_mcc2;        /* Second MCC */
+        usb_cpm2_t      im_usb;         /* USB Controller */
+
+        u8              res6[1153];
+
+        u16             im_si1txram[256];
+        u8              res7[512];
+        u16             im_si1rxram[256];
+        u8              res8[512];
+        u16             im_si2txram[256];
+        u8              res9[512];
+        u16             im_si2rxram[256];
+        u8              res10[512];
+        u8              res11[4096];
+} cpm2_map_t;
+
+extern cpm2_map_t       *cpm2_immr;
+
+#endif /* __IMMAP_CPM2__ */
+#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index bb8d965f96c6..affba7052fb6 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -86,7 +86,7 @@ extern unsigned long pci_dram_offset;
  */
 
 #ifdef CONFIG_PPC64
-#define IO_SET_SYNC_FLAG()      do { get_paca()->io_sync = 1; } while(0)
+#define IO_SET_SYNC_FLAG()      do { local_paca->io_sync = 1; } while(0)
 #else
 #define IO_SET_SYNC_FLAG()
 #endif
@@ -734,6 +734,32 @@ static inline void * bus_to_virt(unsigned long address)
 #define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) |  (_v))
 #define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
 
+#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) |  (_v))
+#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) & ~(_v))
+
+/* Clear and set bits in one shot.  These macros can be used to clear and
+ * set multiple bits in a register using a single read-modify-write.  These
+ * macros can also be used to set a multiple-bit bit pattern using a mask,
+ * by specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrsetbits(type, addr, clear, set) \
+        out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#ifdef __powerpc64__
+#define clrsetbits_be64(addr, clear, set) clrsetbits(be64, addr, clear, set)
+#define clrsetbits_le64(addr, clear, set) clrsetbits(le64, addr, clear, set)
+#endif
+
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_POWERPC_IO_H */
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index 0485c53db2b5..1392db456523 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -124,6 +124,9 @@ struct irq_host {
         struct irq_host_ops     *ops;
         void                    *host_data;
         irq_hw_number_t         inval_irq;
+
+        /* Optional device node pointer */
+        struct device_node      *of_node;
 };
 
 /* The main irq map itself is an array of NR_IRQ entries containing the
@@ -142,7 +145,7 @@ extern irq_hw_number_t virq_to_hw(unsigned int virq);
 
 /**
  * irq_alloc_host - Allocate a new irq_host data structure
- * @node: device-tree node of the interrupt controller
+ * @of_node: optional device-tree node of the interrupt controller
  * @revmap_type: type of reverse mapping to use
  * @revmap_arg: for IRQ_HOST_MAP_LINEAR linear only: size of the map
  * @ops: map/unmap host callbacks
@@ -156,7 +159,8 @@ extern irq_hw_number_t virq_to_hw(unsigned int virq);
  * later during boot automatically (the reverse mapping will use the slow path
  * until that happens).
  */
-extern struct irq_host *irq_alloc_host(unsigned int revmap_type,
+extern struct irq_host *irq_alloc_host(struct device_node *of_node,
+                                       unsigned int revmap_type,
                                        unsigned int revmap_arg,
                                        struct irq_host_ops *ops,
                                        irq_hw_number_t inval_irq);
diff --git a/include/asm-powerpc/iseries/lpar_map.h b/include/asm-powerpc/iseries/lpar_map.h
index 2ec384d66abb..5e9f3e128ee2 100644
--- a/include/asm-powerpc/iseries/lpar_map.h
+++ b/include/asm-powerpc/iseries/lpar_map.h
@@ -22,6 +22,8 @@
 
 #include <asm/types.h>
 
+#endif
+
 /*
  * The iSeries hypervisor will set up mapping for one or more
  * ESID/VSID pairs (in SLB/segment registers) and will set up
@@ -56,6 +58,7 @@
 /* Hypervisor initially maps 32MB of the load area */
 #define HvPagesToMap    8192
 
+#ifndef __ASSEMBLY__
 struct LparMap {
         u64     xNumberEsids;   // Number of ESID/VSID pairs
         u64     xNumberRanges;  // Number of VA ranges to map
diff --git a/include/asm-powerpc/kgdb.h b/include/asm-powerpc/kgdb.h
new file mode 100644
index 000000000000..b617dac82969
--- /dev/null
+++ b/include/asm-powerpc/kgdb.h
@@ -0,0 +1,57 @@
+/*
+ * kgdb.h: Defines and declarations for serial line source level
+ *         remote debugging of the Linux kernel using gdb.
+ *
+ * PPC Mods (C) 1998 Michael Tesch (tesch@cs.wisc.edu)
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+#ifdef __KERNEL__
+#ifndef _PPC_KGDB_H
+#define _PPC_KGDB_H
+
+#ifndef __ASSEMBLY__
+
+/* Things specific to the gen550 backend. */
+struct uart_port;
+
+extern void gen550_progress(char *, unsigned short);
+extern void gen550_kgdb_map_scc(void);
+extern void gen550_init(int, struct uart_port *);
+
+/* Things specific to the pmac backend. */
+extern void zs_kgdb_hook(int tty_num);
+
+/* To init the kgdb engine. (called by serial hook)*/
+extern void set_debug_traps(void);
+
+/* To enter the debugger explicitly. */
+extern void breakpoint(void);
+
+/* For taking exceptions
+ * these are defined in traps.c
+ */
+extern int (*debugger)(struct pt_regs *regs);
+extern int (*debugger_bpt)(struct pt_regs *regs);
+extern int (*debugger_sstep)(struct pt_regs *regs);
+extern int (*debugger_iabr_match)(struct pt_regs *regs);
+extern int (*debugger_dabr_match)(struct pt_regs *regs);
+extern void (*debugger_fault_handler)(struct pt_regs *regs);
+
+/* What we bring to the party */
+int kgdb_bpt(struct pt_regs *regs);
+int kgdb_sstep(struct pt_regs *regs);
+void kgdb(struct pt_regs *regs);
+int kgdb_iabr_match(struct pt_regs *regs);
+int kgdb_dabr_match(struct pt_regs *regs);
+
+/*
+ * external low-level support routines (ie macserial.c)
+ */
+extern void kgdb_interruptible(int); /* control interrupts from serial */
+extern void putDebugChar(char);   /* write a single character      */
+extern char getDebugChar(void);   /* read and return a single char */
+
+#endif /* !(__ASSEMBLY__) */
+#endif /* !(_PPC_KGDB_H) */
+#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h
index 0c5880f70225..b5f9f4c9c294 100644
--- a/include/asm-powerpc/lmb.h
+++ b/include/asm-powerpc/lmb.h
@@ -1,5 +1,5 @@
-#ifndef _PPC64_LMB_H
-#define _PPC64_LMB_H
+#ifndef _ASM_POWERPC_LMB_H
+#define _ASM_POWERPC_LMB_H
 #ifdef __KERNEL__
 
 /*
@@ -77,4 +77,4 @@ lmb_end_pfn(struct lmb_region *type, unsigned long region_nr)
 }
 
 #endif /* __KERNEL__ */
-#endif /* _PPC64_LMB_H */
+#endif /* _ASM_POWERPC_LMB_H */
diff --git a/include/asm-powerpc/mmu-40x.h b/include/asm-powerpc/mmu-40x.h
new file mode 100644
index 000000000000..7d37f77043ac
--- /dev/null
+++ b/include/asm-powerpc/mmu-40x.h
@@ -0,0 +1,65 @@
+#ifndef _ASM_POWERPC_MMU_40X_H_
+#define _ASM_POWERPC_MMU_40X_H_
+
+/*
+ * PPC40x support
+ */
+
+#define PPC40X_TLB_SIZE 64
+
+/*
+ * TLB entries are defined by a "high" tag portion and a "low" data
+ * portion.  On all architectures, the data portion is 32-bits.
+ *
+ * TLB entries are managed entirely under software control by reading,
+ * writing, and searchoing using the 4xx-specific tlbre, tlbwr, and tlbsx
+ * instructions.
+ */
+
+#define TLB_LO          1
+#define TLB_HI          0
+
+#define TLB_DATA        TLB_LO
+#define TLB_TAG         TLB_HI
+
+/* Tag portion */
+
+#define TLB_EPN_MASK    0xFFFFFC00      /* Effective Page Number */
+#define TLB_PAGESZ_MASK 0x00000380
+#define TLB_PAGESZ(x)   (((x) & 0x7) << 7)
+#define   PAGESZ_1K             0
+#define   PAGESZ_4K             1
+#define   PAGESZ_16K            2
+#define   PAGESZ_64K            3
+#define   PAGESZ_256K           4
+#define   PAGESZ_1M             5
+#define   PAGESZ_4M             6
+#define   PAGESZ_16M            7
+#define TLB_VALID       0x00000040      /* Entry is valid */
+
+/* Data portion */
+
+#define TLB_RPN_MASK    0xFFFFFC00      /* Real Page Number */
+#define TLB_PERM_MASK   0x00000300
+#define TLB_EX          0x00000200      /* Instruction execution allowed */
+#define TLB_WR          0x00000100      /* Writes permitted */
+#define TLB_ZSEL_MASK   0x000000F0
+#define TLB_ZSEL(x)     (((x) & 0xF) << 4)
+#define TLB_ATTR_MASK   0x0000000F
+#define TLB_W           0x00000008      /* Caching is write-through */
+#define TLB_I           0x00000004      /* Caching is inhibited */
+#define TLB_M           0x00000002      /* Memory is coherent */
+#define TLB_G           0x00000001      /* Memory is guarded from prefetch */
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long phys_addr_t;
+
+typedef struct {
+        unsigned long id;
+        unsigned long vdso_base;
+} mm_context_t;
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_POWERPC_MMU_40X_H_ */
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 3112ad14ad95..b22b0d20e157 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -256,6 +256,7 @@ extern void hpte_init_native(void);
 extern void hpte_init_lpar(void);
 extern void hpte_init_iSeries(void);
 extern void hpte_init_beat(void);
+extern void hpte_init_beat_v3(void);
 
 extern void stabs_alloc(void);
 extern void slb_initialize(void);
diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h
index d44d211e7588..4c0e1b4f975c 100644
--- a/include/asm-powerpc/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -8,6 +8,9 @@
 #elif defined(CONFIG_PPC_STD_MMU)
 /* 32-bit classic hash table MMU */
 #  include <asm/mmu-hash32.h>
+#elif defined(CONFIG_40x)
+/* 40x-style software loaded TLB */
+#  include <asm/mmu-40x.h>
 #elif defined(CONFIG_44x)
 /* 44x-style software loaded TLB */
 #  include <asm/mmu-44x.h>
diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h
index c4631f6dd4f9..1a3dbb743a3f 100644
--- a/include/asm-powerpc/mpc52xx.h
+++ b/include/asm-powerpc/mpc52xx.h
@@ -262,6 +262,16 @@ struct mpc52xx_suspend {
 extern struct mpc52xx_suspend mpc52xx_suspend;
 extern int __init mpc52xx_pm_init(void);
 extern int mpc52xx_set_wakeup_gpio(u8 pin, u8 level);
+
+#ifdef CONFIG_PPC_LITE5200
+extern int __init lite5200_pm_init(void);
+
+/* lite5200 calls mpc5200 suspend functions, so here they are */
+extern int mpc52xx_pm_prepare(suspend_state_t);
+extern int mpc52xx_pm_enter(suspend_state_t);
+extern int mpc52xx_pm_finish(suspend_state_t);
+extern char saved_sram[0x4000]; /* reuse buffer from mpc52xx suspend */
+#endif
 #endif /* CONFIG_PM */
 
 #endif /* __ASM_POWERPC_MPC52xx_H__ */
diff --git a/include/asm-powerpc/mpc52xx_psc.h b/include/asm-powerpc/mpc52xx_psc.h
new file mode 100644
index 000000000000..26690d2b32f5
--- /dev/null
+++ b/include/asm-powerpc/mpc52xx_psc.h
@@ -0,0 +1,191 @@
+/*
+ * include/asm-ppc/mpc52xx_psc.h
+ *
+ * Definitions of consts/structs to drive the Freescale MPC52xx OnChip
+ * PSCs. Theses are shared between multiple drivers since a PSC can be
+ * UART, AC97, IR, I2S, ... So this header is in asm-ppc.
+ *
+ *
+ * Maintainer : Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Based/Extracted from some header of the 2.4 originally written by
+ * Dale Farnsworth <dfarnsworth@mvista.com>
+ *
+ * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright (C) 2003 MontaVista, Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __ASM_MPC52xx_PSC_H__
+#define __ASM_MPC52xx_PSC_H__
+
+#include <asm/types.h>
+
+/* Max number of PSCs */
+#define MPC52xx_PSC_MAXNUM      6
+
+/* Programmable Serial Controller (PSC) status register bits */
+#define MPC52xx_PSC_SR_CDE      0x0080
+#define MPC52xx_PSC_SR_RXRDY    0x0100
+#define MPC52xx_PSC_SR_RXFULL   0x0200
+#define MPC52xx_PSC_SR_TXRDY    0x0400
+#define MPC52xx_PSC_SR_TXEMP    0x0800
+#define MPC52xx_PSC_SR_OE       0x1000
+#define MPC52xx_PSC_SR_PE       0x2000
+#define MPC52xx_PSC_SR_FE       0x4000
+#define MPC52xx_PSC_SR_RB       0x8000
+
+/* PSC Command values */
+#define MPC52xx_PSC_RX_ENABLE           0x0001
+#define MPC52xx_PSC_RX_DISABLE          0x0002
+#define MPC52xx_PSC_TX_ENABLE           0x0004
+#define MPC52xx_PSC_TX_DISABLE          0x0008
+#define MPC52xx_PSC_SEL_MODE_REG_1      0x0010
+#define MPC52xx_PSC_RST_RX              0x0020
+#define MPC52xx_PSC_RST_TX              0x0030
+#define MPC52xx_PSC_RST_ERR_STAT        0x0040
+#define MPC52xx_PSC_RST_BRK_CHG_INT     0x0050
+#define MPC52xx_PSC_START_BRK           0x0060
+#define MPC52xx_PSC_STOP_BRK            0x0070
+
+/* PSC TxRx FIFO status bits */
+#define MPC52xx_PSC_RXTX_FIFO_ERR       0x0040
+#define MPC52xx_PSC_RXTX_FIFO_UF        0x0020
+#define MPC52xx_PSC_RXTX_FIFO_OF        0x0010
+#define MPC52xx_PSC_RXTX_FIFO_FR        0x0008
+#define MPC52xx_PSC_RXTX_FIFO_FULL      0x0004
+#define MPC52xx_PSC_RXTX_FIFO_ALARM     0x0002
+#define MPC52xx_PSC_RXTX_FIFO_EMPTY     0x0001
+
+/* PSC interrupt mask bits */
+#define MPC52xx_PSC_IMR_TXRDY           0x0100
+#define MPC52xx_PSC_IMR_RXRDY           0x0200
+#define MPC52xx_PSC_IMR_DB              0x0400
+#define MPC52xx_PSC_IMR_IPC             0x8000
+
+/* PSC input port change bit */
+#define MPC52xx_PSC_CTS                 0x01
+#define MPC52xx_PSC_DCD                 0x02
+#define MPC52xx_PSC_D_CTS               0x10
+#define MPC52xx_PSC_D_DCD               0x20
+
+/* PSC mode fields */
+#define MPC52xx_PSC_MODE_5_BITS                 0x00
+#define MPC52xx_PSC_MODE_6_BITS                 0x01
+#define MPC52xx_PSC_MODE_7_BITS                 0x02
+#define MPC52xx_PSC_MODE_8_BITS                 0x03
+#define MPC52xx_PSC_MODE_BITS_MASK              0x03
+#define MPC52xx_PSC_MODE_PAREVEN                0x00
+#define MPC52xx_PSC_MODE_PARODD                 0x04
+#define MPC52xx_PSC_MODE_PARFORCE               0x08
+#define MPC52xx_PSC_MODE_PARNONE                0x10
+#define MPC52xx_PSC_MODE_ERR                    0x20
+#define MPC52xx_PSC_MODE_FFULL                  0x40
+#define MPC52xx_PSC_MODE_RXRTS                  0x80
+
+#define MPC52xx_PSC_MODE_ONE_STOP_5_BITS        0x00
+#define MPC52xx_PSC_MODE_ONE_STOP               0x07
+#define MPC52xx_PSC_MODE_TWO_STOP               0x0f
+
+#define MPC52xx_PSC_RFNUM_MASK  0x01ff
+
+
+/* Structure of the hardware registers */
+struct mpc52xx_psc {
+        u8              mode;           /* PSC + 0x00 */
+        u8              reserved0[3];
+        union {                         /* PSC + 0x04 */
+                u16     status;
+                u16     clock_select;
+        } sr_csr;
+#define mpc52xx_psc_status      sr_csr.status
+#define mpc52xx_psc_clock_select sr_csr.clock_select
+        u16             reserved1;
+        u8              command;        /* PSC + 0x08 */
+        u8              reserved2[3];
+        union {                         /* PSC + 0x0c */
+                u8      buffer_8;
+                u16     buffer_16;
+                u32     buffer_32;
+        } buffer;
+#define mpc52xx_psc_buffer_8    buffer.buffer_8
+#define mpc52xx_psc_buffer_16   buffer.buffer_16
+#define mpc52xx_psc_buffer_32   buffer.buffer_32
+        union {                         /* PSC + 0x10 */
+                u8      ipcr;
+                u8      acr;
+        } ipcr_acr;
+#define mpc52xx_psc_ipcr        ipcr_acr.ipcr
+#define mpc52xx_psc_acr         ipcr_acr.acr
+        u8              reserved3[3];
+        union {                         /* PSC + 0x14 */
+                u16     isr;
+                u16     imr;
+        } isr_imr;
+#define mpc52xx_psc_isr         isr_imr.isr
+#define mpc52xx_psc_imr         isr_imr.imr
+        u16             reserved4;
+        u8              ctur;           /* PSC + 0x18 */
+        u8              reserved5[3];
+        u8              ctlr;           /* PSC + 0x1c */
+        u8              reserved6[3];
+        u16             ccr;            /* PSC + 0x20 */
+        u8              reserved7[14];
+        u8              ivr;            /* PSC + 0x30 */
+        u8              reserved8[3];
+        u8              ip;             /* PSC + 0x34 */
+        u8              reserved9[3];
+        u8              op1;            /* PSC + 0x38 */
+        u8              reserved10[3];
+        u8              op0;            /* PSC + 0x3c */
+        u8              reserved11[3];
+        u32             sicr;           /* PSC + 0x40 */
+        u8              ircr1;          /* PSC + 0x44 */
+        u8              reserved13[3];
+        u8              ircr2;          /* PSC + 0x44 */
+        u8              reserved14[3];
+        u8              irsdr;          /* PSC + 0x4c */
+        u8              reserved15[3];
+        u8              irmdr;          /* PSC + 0x50 */
+        u8              reserved16[3];
+        u8              irfdr;          /* PSC + 0x54 */
+        u8              reserved17[3];
+        u16             rfnum;          /* PSC + 0x58 */
+        u16             reserved18;
+        u16             tfnum;          /* PSC + 0x5c */
+        u16             reserved19;
+        u32             rfdata;         /* PSC + 0x60 */
+        u16             rfstat;         /* PSC + 0x64 */
+        u16             reserved20;
+        u8              rfcntl;         /* PSC + 0x68 */
+        u8              reserved21[5];
+        u16             rfalarm;        /* PSC + 0x6e */
+        u16             reserved22;
+        u16             rfrptr;         /* PSC + 0x72 */
+        u16             reserved23;
+        u16             rfwptr;         /* PSC + 0x76 */
+        u16             reserved24;
+        u16             rflrfptr;       /* PSC + 0x7a */
+        u16             reserved25;
+        u16             rflwfptr;       /* PSC + 0x7e */
+        u32             tfdata;         /* PSC + 0x80 */
+        u16             tfstat;         /* PSC + 0x84 */
+        u16             reserved26;
+        u8              tfcntl;         /* PSC + 0x88 */
+        u8              reserved27[5];
+        u16             tfalarm;        /* PSC + 0x8e */
+        u16             reserved28;
+        u16             tfrptr;         /* PSC + 0x92 */
+        u16             reserved29;
+        u16             tfwptr;         /* PSC + 0x96 */
+        u16             reserved30;
+        u16             tflrfptr;       /* PSC + 0x9a */
+        u16             reserved31;
+        u16             tflwfptr;       /* PSC + 0x9e */
+};
+
+
+#endif  /* __ASM_MPC52xx_PSC_H__ */
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 262db6b8da73..ae84dde3bc7f 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -224,8 +224,6 @@ struct mpic_reg_bank {
         u32 __iomem     *base;
 #ifdef CONFIG_PPC_DCR
         dcr_host_t      dhost;
-        unsigned int    dbase;
-        unsigned int    doff;
 #endif /* CONFIG_PPC_DCR */
 };
 
@@ -240,9 +238,6 @@ struct mpic_irq_save {
 /* The instance data of a given MPIC */
 struct mpic
 {
-        /* The device node of the interrupt controller */
-        struct device_node      *of_node;
-
         /* The remapper for this MPIC */
         struct irq_host         *irqhost;
 
@@ -292,10 +287,6 @@ struct mpic
         struct mpic_reg_bank    cpuregs[MPIC_MAX_CPUS];
         struct mpic_reg_bank    isus[MPIC_MAX_ISU];
 
-#ifdef CONFIG_PPC_DCR
-        unsigned int            dcr_base;
-#endif
-
         /* Protected sources */
         unsigned long           *protected;
 
@@ -309,6 +300,10 @@ struct mpic
         unsigned long           *hwirq_bitmap;
 #endif
 
+#ifdef CONFIG_MPIC_BROKEN_REGREAD
+        u32                     isu_reg0_shadow[MPIC_MAX_IRQ_SOURCES];
+#endif
+
         /* link */
         struct mpic             *next;
 
diff --git a/include/asm-powerpc/nvram.h b/include/asm-powerpc/nvram.h
index f3563e11e260..9877982508bf 100644
--- a/include/asm-powerpc/nvram.h
+++ b/include/asm-powerpc/nvram.h
@@ -63,8 +63,10 @@ struct nvram_partition {
 };
 
 
-extern int nvram_write_error_log(char * buff, int length, unsigned int err_type);
-extern int nvram_read_error_log(char * buff, int length, unsigned int * err_type);
+extern int nvram_write_error_log(char * buff, int length,
+                                         unsigned int err_type, unsigned int err_seq);
+extern int nvram_read_error_log(char * buff, int length,
+                                         unsigned int * err_type, unsigned int *err_seq);
 extern int nvram_clear_error_log(void);
 extern struct nvram_partition *nvram_find_partition(int sig, const char *name);
 
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index c6a5b1735666..fcd7b428ed0b 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -21,7 +21,18 @@
 #include        <asm/mmu.h>
 
 register struct paca_struct *local_paca asm("r13");
+
+#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
+extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
+/*
+ * Add standard checks that preemption cannot occur when using get_paca():
+ * otherwise the paca_struct it points to may be the wrong one just after.
+ */
+#define get_paca()      ((void) debug_smp_processor_id(), local_paca)
+#else
 #define get_paca()      local_paca
+#endif
+
 #define get_lppaca()    (get_paca()->lppaca_ptr)
 #define get_slb_shadow()        (get_paca()->slb_shadow_ptr)
 
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index 3448a3d4bc64..56a2df0f6836 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -28,7 +28,7 @@
 
 /* Segment size */
 #define SID_SHIFT               28
-#define SID_MASK                0xfffffffffUL
+#define SID_MASK                ASM_CONST(0xfffffffff)
 #define ESID_MASK               0xfffffffff0000000UL
 #define GET_ESID(x)             (((x) >> SID_SHIFT) & SID_MASK)
 
@@ -121,6 +121,7 @@ extern unsigned int get_slice_psize(struct mm_struct *mm,
 
 extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
 extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
+#define slice_mm_new_context(mm)        ((mm)->context.id == 0)
 
 #define ARCH_HAS_HUGEPAGE_ONLY_RANGE
 extern int is_hugepage_only_range(struct mm_struct *m,
@@ -130,6 +131,12 @@ extern int is_hugepage_only_range(struct mm_struct *m,
 #endif /* __ASSEMBLY__ */
 #else
 #define slice_init()
+#define slice_set_user_psize(mm, psize)         \
+do {                                            \
+        (mm)->context.user_psize = (psize);     \
+        (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
+} while (0)
+#define slice_mm_new_context(mm)        1
 #endif /* CONFIG_PPC_MM_SLICES */
 
 #ifdef CONFIG_HUGETLB_PAGE
diff --git a/include/asm-powerpc/percpu.h b/include/asm-powerpc/percpu.h
index 73dc8ba4010d..6b229626d3ff 100644
--- a/include/asm-powerpc/percpu.h
+++ b/include/asm-powerpc/percpu.h
@@ -28,7 +28,7 @@
 /* var is in discarded region: offset to particular copy we want */
 #define per_cpu(var, cpu) (*RELOC_HIDE(&per_cpu__##var, __per_cpu_offset(cpu)))
 #define __get_cpu_var(var) (*RELOC_HIDE(&per_cpu__##var, __my_cpu_offset()))
-#define __raw_get_cpu_var(var) (*RELOC_HIDE(&per_cpu__##var, __my_cpu_offset()))
+#define __raw_get_cpu_var(var) (*RELOC_HIDE(&per_cpu__##var, local_paca->data_offset))
 
 /* A macro to avoid #include hell... */
 #define percpu_modcopy(pcpudst, src, size)                      \
diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index add5481fd7c7..818e2abc81e2 100644
--- a/include/asm-powerpc/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
@@ -10,10 +10,12 @@
 #define PUD_INDEX_SIZE  7
 #define PGD_INDEX_SIZE  9
 
+#ifndef __ASSEMBLY__
 #define PTE_TABLE_SIZE  (sizeof(pte_t) << PTE_INDEX_SIZE)
 #define PMD_TABLE_SIZE  (sizeof(pmd_t) << PMD_INDEX_SIZE)
 #define PUD_TABLE_SIZE  (sizeof(pud_t) << PUD_INDEX_SIZE)
 #define PGD_TABLE_SIZE  (sizeof(pgd_t) << PGD_INDEX_SIZE)
+#endif  /* __ASSEMBLY__ */
 
 #define PTRS_PER_PTE    (1 << PTE_INDEX_SIZE)
 #define PTRS_PER_PMD    (1 << PMD_INDEX_SIZE)
diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 33ae9018fe72..bd54b772fbc6 100644
--- a/include/asm-powerpc/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
@@ -9,9 +9,11 @@
 #define PUD_INDEX_SIZE  0
 #define PGD_INDEX_SIZE  4
 
+#ifndef __ASSEMBLY__
 #define PTE_TABLE_SIZE  (sizeof(real_pte_t) << PTE_INDEX_SIZE)
 #define PMD_TABLE_SIZE  (sizeof(pmd_t) << PMD_INDEX_SIZE)
 #define PGD_TABLE_SIZE  (sizeof(pgd_t) << PGD_INDEX_SIZE)
+#endif  /* __ASSEMBLY__ */
 
 #define PTRS_PER_PTE    (1 << PTE_INDEX_SIZE)
 #define PTRS_PER_PMD    (1 << PMD_INDEX_SIZE)
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index 65325721446d..2dbd4e7884fa 100644
--- a/include/asm-powerpc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -155,6 +155,20 @@ name: \
         .type GLUE(.,name),@function; \
 GLUE(.,name):
 
+#define _INIT_GLOBAL(name) \
+        .section ".text.init.refok"; \
+        .align 2 ; \
+        .globl name; \
+        .globl GLUE(.,name); \
+        .section ".opd","aw"; \
+name: \
+        .quad GLUE(.,name); \
+        .quad .TOC.@tocbase; \
+        .quad 0; \
+        .previous; \
+        .type GLUE(.,name),@function; \
+GLUE(.,name):
+
 #define _KPROBE(name) \
         .section ".kprobes.text","a"; \
         .align 2 ; \
@@ -195,6 +209,10 @@ GLUE(.,name):
 
 #else /* 32-bit */
 
+#define _ENTRY(n)       \
+        .globl n;       \
+n:
+
 #define _GLOBAL(n)      \
         .text;          \
         .stabs __stringify(n:F-1),N_FUN,0,0,n;\
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index e28b10805159..dba7c948189d 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -145,9 +145,9 @@ struct thread_struct {
         unsigned long   dabr;           /* Data address breakpoint register */
 #ifdef CONFIG_ALTIVEC
         /* Complete AltiVec register set */
-        vector128       vr[32] __attribute((aligned(16)));
+        vector128       vr[32] __attribute__((aligned(16)));
         /* AltiVec status */
-        vector128       vscr __attribute((aligned(16)));
+        vector128       vscr __attribute__((aligned(16)));
         unsigned long   vrsave;
         int             used_vr;        /* set if process has used altivec */
 #endif /* CONFIG_ALTIVEC */
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index 672083787a1d..925e2d384bb3 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -24,7 +24,7 @@
 #define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 1
 #define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1
 
-#define of_compat_cmp(s1, s2, l)        strncasecmp((s1), (s2), (l))
+#define of_compat_cmp(s1, s2, l)        strcasecmp((s1), (s2))
 #define of_prop_cmp(s1, s2)             strcmp((s1), (s2))
 #define of_node_cmp(s1, s2)             strcasecmp((s1), (s2))
 
@@ -145,7 +145,6 @@ extern void of_detach_node(struct device_node *);
 extern void finish_device_tree(void);
 extern void unflatten_device_tree(void);
 extern void early_init_devtree(void *);
-#define device_is_compatible(d, c)      of_device_is_compatible((d), (c))
 extern int machine_is_compatible(const char *compat);
 extern void print_properties(struct device_node *node);
 extern int prom_n_intr_cells(struct device_node* np);
diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h
index a6f3f5ee7ca7..f577a16c6728 100644
--- a/include/asm-powerpc/ps3.h
+++ b/include/asm-powerpc/ps3.h
@@ -229,6 +229,9 @@ enum lv1_result {
         LV1_INVALID_CLASS_ID            = -21,
         LV1_CONSTRAINT_NOT_SATISFIED    = -22,
         LV1_ALIGNMENT_ERROR             = -23,
+        LV1_HARDWARE_ERROR              = -24,
+        LV1_INVALID_DATA_FORMAT         = -25,
+        LV1_INVALID_OPERATION           = -26,
         LV1_INTERNAL_ERROR              = -32768,
 };
 
@@ -284,6 +287,12 @@ static inline const char* ps3_result(int result)
                 return "LV1_CONSTRAINT_NOT_SATISFIED (-22)";
         case LV1_ALIGNMENT_ERROR:
                 return "LV1_ALIGNMENT_ERROR (-23)";
+        case LV1_HARDWARE_ERROR:
+                return "LV1_HARDWARE_ERROR (-24)";
+        case LV1_INVALID_DATA_FORMAT:
+                return "LV1_INVALID_DATA_FORMAT (-25)";
+        case LV1_INVALID_OPERATION:
+                return "LV1_INVALID_OPERATION (-26)";
         case LV1_INTERNAL_ERROR:
                 return "LV1_INTERNAL_ERROR (-32768)";
         default:
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index 9d304b1f1608..ad23c580631c 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -32,6 +32,9 @@
 extern void qe_reset(void);
 extern int par_io_init(struct device_node *np);
 extern int par_io_of_config(struct device_node *np);
+extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
+                             int assignment, int has_irq);
+extern int par_io_data_set(u8 port, u8 pin, u8 val);
 
 /* QE internal API */
 int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 281011e953ec..e775ff1ca413 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -102,12 +102,8 @@
 #else /* 32-bit */
 /* Default MSR for kernel mode. */
 #ifndef MSR_KERNEL      /* reg_booke.h also defines this */
-#ifdef CONFIG_APUS_FAST_EXCEPT
-#define MSR_KERNEL      (MSR_ME|MSR_IP|MSR_RI|MSR_IR|MSR_DR)
-#else
 #define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
 #endif
-#endif
 
 #define MSR_USER        (MSR_KERNEL|MSR_PR|MSR_EE)
 #endif
@@ -518,21 +514,47 @@
 #define   PA6T_MMCR1_ES4        0x0000000000ff0000UL
 #define   PA6T_MMCR1_ES5        0x00000000ff000000UL
 
-#define SPRN_PA6T_SIAR  780
-#define SPRN_PA6T_UPMC0 771
-#define SPRN_PA6T_UPMC1 772
+#define SPRN_PA6T_UPMC0 771     /* User PerfMon Counter 0 */
+#define SPRN_PA6T_UPMC1 772     /* ... */
 #define SPRN_PA6T_UPMC2 773
 #define SPRN_PA6T_UPMC3 774
 #define SPRN_PA6T_UPMC4 775
 #define SPRN_PA6T_UPMC5 776
-#define SPRN_PA6T_UMMCR0 779
-#define SPRN_PA6T_UMMCR1 782
-#define SPRN_PA6T_PMC0  787
-#define SPRN_PA6T_PMC1  788
-#define SPRN_PA6T_PMC2  789
-#define SPRN_PA6T_PMC3  790
-#define SPRN_PA6T_PMC4  791
-#define SPRN_PA6T_PMC5  792
+#define SPRN_PA6T_UMMCR0 779    /* User Monitor Mode Control Register 0 */
+#define SPRN_PA6T_SIAR  780     /* Sampled Instruction Address */
+#define SPRN_PA6T_UMMCR1 782    /* User Monitor Mode Control Register 1 */
+#define SPRN_PA6T_SIER  785     /* Sampled Instruction Event Register */
+#define SPRN_PA6T_PMC0  787
+#define SPRN_PA6T_PMC1  788
+#define SPRN_PA6T_PMC2  789
+#define SPRN_PA6T_PMC3  790
+#define SPRN_PA6T_PMC4  791
+#define SPRN_PA6T_PMC5  792
+#define SPRN_PA6T_TSR0  793     /* Timestamp Register 0 */
+#define SPRN_PA6T_TSR1  794     /* Timestamp Register 1 */
+#define SPRN_PA6T_TSR2  799     /* Timestamp Register 2 */
+#define SPRN_PA6T_TSR3  784     /* Timestamp Register 3 */
+
+#define SPRN_PA6T_IER   981     /* Icache Error Register */
+#define SPRN_PA6T_DER   982     /* Dcache Error Register */
+#define SPRN_PA6T_BER   862     /* BIU Error Address Register */
+#define SPRN_PA6T_MER   849     /* MMU Error Register */
+
+#define SPRN_PA6T_IMA0  880     /* Instruction Match Array 0 */
+#define SPRN_PA6T_IMA1  881     /* ... */
+#define SPRN_PA6T_IMA2  882
+#define SPRN_PA6T_IMA3  883
+#define SPRN_PA6T_IMA4  884
+#define SPRN_PA6T_IMA5  885
+#define SPRN_PA6T_IMA6  886
+#define SPRN_PA6T_IMA7  887
+#define SPRN_PA6T_IMA8  888
+#define SPRN_PA6T_IMA9  889
+#define SPRN_PA6T_BTCR  978     /* Breakpoint and Tagging Control Register */
+#define SPRN_PA6T_IMAAT 979     /* Instruction Match Array Action Table */
+#define SPRN_PA6T_PCCR  1019    /* Power Counter Control Register */
+#define SPRN_PA6T_RPCCR 1021    /* Retire PC Trace Control Register */
+
 
 #else /* 32-bit */
 #define SPRN_MMCR0      952     /* Monitor Mode Control Register 0 */
diff --git a/include/asm-powerpc/rwsem.h b/include/asm-powerpc/rwsem.h
index e929145e1e46..cefc14728cc5 100644
--- a/include/asm-powerpc/rwsem.h
+++ b/include/asm-powerpc/rwsem.h
@@ -1,6 +1,10 @@
 #ifndef _ASM_POWERPC_RWSEM_H
 #define _ASM_POWERPC_RWSEM_H
 
+#ifndef _LINUX_RWSEM_H
+#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
+#endif
+
 #ifdef __KERNEL__
 
 /*
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h
index d037f50580e2..19102bfc14ca 100644
--- a/include/asm-powerpc/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -45,7 +45,7 @@ void generic_mach_cpu_die(void);
 #endif
 
 #ifdef CONFIG_PPC64
-#define raw_smp_processor_id()  (get_paca()->paca_index)
+#define raw_smp_processor_id()  (local_paca->paca_index)
 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
 #else
 /* 32-bit */
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 5bde3980bf49..b1accce77bb5 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -238,19 +238,14 @@ extern long spu_sys_callback(struct spu_syscall_block *s);
 
 /* syscalls implemented in spufs */
 struct file;
-extern struct spufs_calls {
-        asmlinkage long (*create_thread)(const char __user *name,
+struct spufs_calls {
+        long (*create_thread)(const char __user *name,
                                         unsigned int flags, mode_t mode,
                                         struct file *neighbor);
-        asmlinkage long (*spu_run)(struct file *filp, __u32 __user *unpc,
+        long (*spu_run)(struct file *filp, __u32 __user *unpc,
                                                 __u32 __user *ustatus);
-        struct module *owner;
-} spufs_calls;
-
-/* coredump calls implemented in spufs */
-struct spu_coredump_calls {
-        asmlinkage int (*arch_notes_size)(void);
-        asmlinkage void (*arch_write_notes)(struct file *file);
+        int (*coredump_extra_notes_size)(void);
+        int (*coredump_extra_notes_write)(struct file *file, loff_t *foffset);
         struct module *owner;
 };
 
@@ -274,21 +269,8 @@ struct spu_coredump_calls {
 #define SPU_CREATE_FLAG_ALL             0x003f /* mask of all valid flags */
 
 
-#ifdef CONFIG_SPU_FS_MODULE
 int register_spu_syscalls(struct spufs_calls *calls);
 void unregister_spu_syscalls(struct spufs_calls *calls);
-#else
-static inline int register_spu_syscalls(struct spufs_calls *calls)
-{
-        return 0;
-}
-static inline void unregister_spu_syscalls(struct spufs_calls *calls)
-{
-}
-#endif /* MODULE */
-
-int register_arch_coredump_calls(struct spu_coredump_calls *calls);
-void unregister_arch_coredump_calls(struct spu_coredump_calls *calls);
 
 int spu_add_sysdev_attr(struct sysdev_attribute *attr);
 void spu_remove_sysdev_attr(struct sysdev_attribute *attr);
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 41520b7a7b76..d10e99bf5001 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -189,6 +189,9 @@ extern int mem_init_done;	/* set on boot once kmalloc can be called */
 extern unsigned long memory_limit;
 extern unsigned long klimit;
 
+extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
+extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
+
 extern int powersave_nap;       /* set if nap mode can be used in idle loop */
 
 /*
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index c104c15c6625..fa331dad97cb 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -179,7 +179,7 @@ static inline unsigned int get_dec(void)
 static inline void set_dec(int val)
 {
 #if defined(CONFIG_40x)
-        return;         /* Have to let it auto-reload */
+        mtspr(SPRN_PIT, val);
 #elif defined(CONFIG_8xx_CPU6)
         set_dec_cpu6(val);
 #else
diff --git a/include/asm-powerpc/tlb.h b/include/asm-powerpc/tlb.h
index 66714042e438..e20ff7541f36 100644
--- a/include/asm-powerpc/tlb.h
+++ b/include/asm-powerpc/tlb.h
@@ -23,6 +23,8 @@
 #include <asm/mmu.h>
 #endif
 
+#include <linux/pagemap.h>
+
 struct mmu_gather;
 
 #define tlb_start_vma(tlb, vma) do { } while (0)
diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h
index 3b363757a2bb..a584341c87e3 100644
--- a/include/asm-powerpc/types.h
+++ b/include/asm-powerpc/types.h
@@ -48,7 +48,7 @@ typedef unsigned long long __u64;
 
 typedef struct {
         __u32 u[4];
-} __attribute((aligned(16))) __vector128;
+} __attribute__((aligned(16))) __vector128;
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/include/asm-powerpc/vio.h b/include/asm-powerpc/vio.h
index 3a0975e2adad..598d111e8098 100644
--- a/include/asm-powerpc/vio.h
+++ b/include/asm-powerpc/vio.h
@@ -63,7 +63,6 @@ struct vio_driver {
 };
 
 extern struct dma_mapping_ops vio_dma_ops;
-extern struct bus_type vio_bus_type;
 
 extern int vio_register_driver(struct vio_driver *drv);
 extern void vio_unregister_driver(struct vio_driver *drv);
diff --git a/include/asm-ppc/amigahw.h b/include/asm-ppc/amigahw.h
deleted file mode 100644
index 90fd1274d727..000000000000
--- a/include/asm-ppc/amigahw.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifdef __KERNEL__
-#ifndef __ASMPPC_AMIGAHW_H
-#define __ASMPPC_AMIGAHW_H
-
-#include <asm-m68k/amigahw.h>
-
-#undef CHIP_PHYSADDR
-#ifdef CONFIG_APUS_FAST_EXCEPT
-#define CHIP_PHYSADDR      (0x000000)
-#else
-#define CHIP_PHYSADDR      (0x004000)
-#endif
-
-
-#endif /* __ASMPPC_AMIGAHW_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/amigaints.h b/include/asm-ppc/amigaints.h
deleted file mode 100644
index aa3ff6349e81..000000000000
--- a/include/asm-ppc/amigaints.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
-** amigaints.h -- Amiga Linux interrupt handling structs and prototypes
-**
-** Copyright 1992 by Greg Harp
-**
-** This file is subject to the terms and conditions of the GNU General Public
-** License.  See the file COPYING in the main directory of this archive
-** for more details.
-**
-** Created 10/2/92 by Greg Harp
-*/
-
-#ifdef __KERNEL__
-#ifndef _ASMm68k_AMIGAINTS_H_
-#define _ASMm68k_AMIGAINTS_H_
-
-/*
-** Amiga Interrupt sources.
-**
-*/
-
-#define AUTO_IRQS           (8)
-#define AMI_STD_IRQS        (14)
-#define CIA_IRQS            (5)
-#define AMI_IRQS            (32) /* AUTO_IRQS+AMI_STD_IRQS+2*CIA_IRQS */
-
-/* vertical blanking interrupt */
-#define IRQ_AMIGA_VERTB     0
-
-/* copper interrupt */
-#define IRQ_AMIGA_COPPER    1
-
-/* Audio interrupts */
-#define IRQ_AMIGA_AUD0      2
-#define IRQ_AMIGA_AUD1      3
-#define IRQ_AMIGA_AUD2      4
-#define IRQ_AMIGA_AUD3      5
-
-/* Blitter done interrupt */
-#define IRQ_AMIGA_BLIT      6
-
-/* floppy disk interrupts */
-#define IRQ_AMIGA_DSKSYN    7
-#define IRQ_AMIGA_DSKBLK    8
-
-/* builtin serial port interrupts */
-#define IRQ_AMIGA_RBF       9
-#define IRQ_AMIGA_TBE       10
-
-/* software interrupts */
-#define IRQ_AMIGA_SOFT      11
-
-/* interrupts from external hardware */
-#define IRQ_AMIGA_PORTS     12
-#define IRQ_AMIGA_EXTER     13
-
-/* CIA interrupt sources */
-#define IRQ_AMIGA_CIAA      14
-#define IRQ_AMIGA_CIAA_TA   14
-#define IRQ_AMIGA_CIAA_TB   15
-#define IRQ_AMIGA_CIAA_ALRM 16
-#define IRQ_AMIGA_CIAA_SP   17
-#define IRQ_AMIGA_CIAA_FLG  18
-#define IRQ_AMIGA_CIAB      19
-#define IRQ_AMIGA_CIAB_TA   19
-#define IRQ_AMIGA_CIAB_TB   20
-#define IRQ_AMIGA_CIAB_ALRM 21
-#define IRQ_AMIGA_CIAB_SP   22
-#define IRQ_AMIGA_CIAB_FLG  23
-
-/* auto-vector interrupts */
-#define IRQ_AMIGA_AUTO      24
-#define IRQ_AMIGA_AUTO_0    24 /* This is just a dummy */
-#define IRQ_AMIGA_AUTO_1    25
-#define IRQ_AMIGA_AUTO_2    26
-#define IRQ_AMIGA_AUTO_3    27
-#define IRQ_AMIGA_AUTO_4    28
-#define IRQ_AMIGA_AUTO_5    29
-#define IRQ_AMIGA_AUTO_6    30
-#define IRQ_AMIGA_AUTO_7    31
-
-#define IRQ_FLOPPY          IRQ_AMIGA_DSKBLK
-
-/* INTREQR masks */
-#define IRQ1_MASK   0x0007      /* INTREQR mask for IRQ 1 */
-#define IRQ2_MASK   0x0008      /* INTREQR mask for IRQ 2 */
-#define IRQ3_MASK   0x0070      /* INTREQR mask for IRQ 3 */
-#define IRQ4_MASK   0x0780      /* INTREQR mask for IRQ 4 */
-#define IRQ5_MASK   0x1800      /* INTREQR mask for IRQ 5 */
-#define IRQ6_MASK   0x2000      /* INTREQR mask for IRQ 6 */
-#define IRQ7_MASK   0x4000      /* INTREQR mask for IRQ 7 */
-
-#define IF_SETCLR   0x8000      /* set/clr bit */
-#define IF_INTEN    0x4000      /* master interrupt bit in INT* registers */
-#define IF_EXTER    0x2000      /* external level 6 and CIA B interrupt */
-#define IF_DSKSYN   0x1000      /* disk sync interrupt */
-#define IF_RBF      0x0800      /* serial receive buffer full interrupt */
-#define IF_AUD3     0x0400      /* audio channel 3 done interrupt */
-#define IF_AUD2     0x0200      /* audio channel 2 done interrupt */
-#define IF_AUD1     0x0100      /* audio channel 1 done interrupt */
-#define IF_AUD0     0x0080      /* audio channel 0 done interrupt */
-#define IF_BLIT     0x0040      /* blitter done interrupt */
-#define IF_VERTB    0x0020      /* vertical blanking interrupt */
-#define IF_COPER    0x0010      /* copper interrupt */
-#define IF_PORTS    0x0008      /* external level 2 and CIA A interrupt */
-#define IF_SOFT     0x0004      /* software initiated interrupt */
-#define IF_DSKBLK   0x0002      /* diskblock DMA finished */
-#define IF_TBE      0x0001      /* serial transmit buffer empty interrupt */
-
-extern void amiga_do_irq(int irq, struct pt_regs *fp);
-extern void amiga_do_irq_list(int irq, struct pt_regs *fp);
-
-/* CIA interrupt control register bits */
-
-#define CIA_ICR_TA      0x01
-#define CIA_ICR_TB      0x02
-#define CIA_ICR_ALRM    0x04
-#define CIA_ICR_SP      0x08
-#define CIA_ICR_FLG     0x10
-#define CIA_ICR_ALL     0x1f
-#define CIA_ICR_SETCLR  0x80
-
-/* to access the interrupt control registers of CIA's use only
-** these functions, they behave exactly like the amiga os routines
-*/
-
-extern struct ciabase ciaa_base, ciab_base;
-
-extern unsigned char cia_set_irq(unsigned int irq, int set);
-extern unsigned char cia_able_irq(unsigned int irq, int enable);
-
-#endif /* asm-m68k/amigaints.h */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/amigappc.h b/include/asm-ppc/amigappc.h
deleted file mode 100644
index 35114ce5135f..000000000000
--- a/include/asm-ppc/amigappc.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
-** asm-ppc/amigappc.h -- This header defines some values and pointers for
-**                        the Phase 5 PowerUp card.
-**
-** Copyright 1997, 1998 by Phase5, Germany.
-**
-** This file is subject to the terms and conditions of the GNU General Public
-** License.  See the file COPYING in the main directory of this archive
-** for more details.
-**
-** Created: 7/22/97 by Jesper Skov
-*/
-
-#ifdef __KERNEL__
-#ifndef _M68K_AMIGAPPC_H
-#define _M68K_AMIGAPPC_H
-
-#ifndef __ASSEMBLY__
-
-/* #include <asm/system.h> */
-#define mb()  __asm__ __volatile__ ("sync" : : : "memory")
-
-#define APUS_WRITE(_a_, _v_)                            \
-do {                                                    \
-        (*((volatile unsigned char *)(_a_)) = (_v_));   \
-        mb();                                           \
-} while (0)
-
-#define APUS_READ(_a_, _v_)                             \
-do {                                                    \
-        (_v_) = (*((volatile unsigned char *)(_a_)));   \
-        mb();                                           \
-} while (0)
-#endif /* ndef __ASSEMBLY__ */
-
-/* Maybe add a [#ifdef WANT_ZTWOBASE] condition to amigahw.h? */
-#define zTwoBase (0x80000000)
-
-#define APUS_IPL_BASE           (zTwoBase + 0x00f60000)
-#define APUS_REG_RESET          (APUS_IPL_BASE + 0x00)
-#define APUS_REG_WAITSTATE      (APUS_IPL_BASE + 0x10)
-#define APUS_REG_SHADOW         (APUS_IPL_BASE + 0x18)
-#define APUS_REG_LOCK           (APUS_IPL_BASE + 0x20)
-#define APUS_REG_INT            (APUS_IPL_BASE + 0x28)
-#define APUS_IPL_EMU            (APUS_IPL_BASE + 0x30)
-#define APUS_INT_LVL            (APUS_IPL_BASE + 0x38)
-
-#define REGSHADOW_SETRESET      (0x80)
-#define REGSHADOW_SELFRESET     (0x40)
-
-#define REGLOCK_SETRESET        (0x80)
-#define REGLOCK_BLACKMAGICK1    (0x40)
-#define REGLOCK_BLACKMAGICK2    (0x20)
-#define REGLOCK_BLACKMAGICK3    (0x10)
-
-#define REGWAITSTATE_SETRESET   (0x80)
-#define REGWAITSTATE_PPCW       (0x08)
-#define REGWAITSTATE_PPCR       (0x04)
-
-#define REGRESET_SETRESET       (0x80)
-#define REGRESET_PPCRESET       (0x10)
-#define REGRESET_M68KRESET      (0x08)
-#define REGRESET_AMIGARESET     (0x04)
-#define REGRESET_AUXRESET       (0x02)
-#define REGRESET_SCSIRESET      (0x01)
-
-#define REGINT_SETRESET         (0x80)
-#define REGINT_ENABLEIPL        (0x02)
-#define REGINT_INTMASTER        (0x01)
-
-#define IPLEMU_SETRESET         (0x80)
-#define IPLEMU_DISABLEINT       (0x40)
-#define IPLEMU_IPL2             (0x20)
-#define IPLEMU_IPL1             (0x10)
-#define IPLEMU_IPL0             (0x08)
-#define IPLEMU_PPCIPL2          (0x04)
-#define IPLEMU_PPCIPL1          (0x02)
-#define IPLEMU_PPCIPL0          (0x01)
-#define IPLEMU_IPLMASK          (IPLEMU_PPCIPL2|IPLEMU_PPCIPL1|IPLEMU_PPCIPL0)
-
-#define INTLVL_SETRESET         (0x80)
-#define INTLVL_MASK             (0x7f)
-
-#endif /* _M68k_AMIGAPPC_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/bootinfo.h b/include/asm-ppc/bootinfo.h
index 2ace4a74f263..f6ed77aee328 100644
--- a/include/asm-ppc/bootinfo.h
+++ b/include/asm-ppc/bootinfo.h
@@ -11,10 +11,6 @@
 
 #include <asm/page.h>
 
-#if defined(CONFIG_APUS) && !defined(__BOOTER__)
-#include <asm-m68k/bootinfo.h>
-#else
-
 struct bi_record {
         unsigned long tag;              /* tag ID */
         unsigned long size;             /* size of record (in bytes) */
@@ -44,7 +40,6 @@ bootinfo_addr(unsigned long offset)
         return (struct bi_record *)_ALIGN((offset) + (1 << 20) - 1,
                                           (1 << 20));
 }
-#endif /* CONFIG_APUS */
 
 
 #endif /* _PPC_BOOTINFO_H */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 95d590423cf2..8f58231a8bc6 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -30,7 +30,7 @@
 #include <asm/mpc8xx.h>
 #elif defined(CONFIG_8260)
 #include <asm/mpc8260.h>
-#elif defined(CONFIG_APUS) || !defined(CONFIG_PCI)
+#elif !defined(CONFIG_PCI)
 #define _IO_BASE        0
 #define _ISA_MEM_BASE   0
 #define PCI_DRAM_OFFSET 0
@@ -145,24 +145,7 @@ static inline void writeb(__u8 b, volatile void __iomem *addr)
 }
 #endif
 
-#if defined(CONFIG_APUS)
-static inline __u16 readw(const volatile void __iomem *addr)
-{
-        return *(__force volatile __u16 *)(addr);
-}
-static inline __u32 readl(const volatile void __iomem *addr)
-{
-        return *(__force volatile __u32 *)(addr);
-}
-static inline void writew(__u16 b, volatile void __iomem *addr)
-{
-        *(__force volatile __u16 *)(addr) = b;
-}
-static inline void writel(__u32 b, volatile void __iomem *addr)
-{
-        *(__force volatile __u32 *)(addr) = b;
-}
-#elif defined (CONFIG_8260_PCI9)
+#if defined (CONFIG_8260_PCI9)
 /* Use macros if PCI9 workaround enabled */
 #define readw(addr) in_le16((volatile u16 *)(addr))
 #define readl(addr) in_le32((volatile u32 *)(addr))
@@ -185,7 +168,7 @@ static inline void writel(__u32 b, volatile void __iomem *addr)
 {
         out_le32(addr, b);
 }
-#endif /* CONFIG_APUS */
+#endif /* CONFIG_8260_PCI9 */
 
 #define readb_relaxed(addr) readb(addr)
 #define readw_relaxed(addr) readw(addr)
@@ -300,13 +283,7 @@ extern __inline__ void name(unsigned int val, unsigned int port) \
 }
 
 __do_out_asm(outb, "stbx")
-#ifdef CONFIG_APUS
-__do_in_asm(inb, "lbzx")
-__do_in_asm(inw, "lhz%U1%X1")
-__do_in_asm(inl, "lwz%U1%X1")
-__do_out_asm(outl,"stw%U0%X0")
-__do_out_asm(outw, "sth%U0%X0")
-#elif defined (CONFIG_8260_PCI9)
+#if defined (CONFIG_8260_PCI9)
 /* in asm cannot be defined if PCI9 workaround is used */
 #define inb(port)               in_8((port)+___IO_BASE)
 #define inw(port)               in_le16((port)+___IO_BASE)
@@ -371,7 +348,6 @@ extern void __iomem *ioremap64(unsigned long long address, unsigned long size);
 #define ioremap_nocache(addr, size)     ioremap((addr), (size))
 extern void iounmap(volatile void __iomem *addr);
 extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
 extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
                              unsigned int size, int flags);
 
@@ -384,24 +360,16 @@ extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
  */
 extern inline unsigned long virt_to_bus(volatile void * address)
 {
-#ifndef CONFIG_APUS
         if (address == (void *)0)
                 return 0;
         return (unsigned long)address - KERNELBASE + PCI_DRAM_OFFSET;
-#else
-        return iopa ((unsigned long) address);
-#endif
 }
 
 extern inline void * bus_to_virt(unsigned long address)
 {
-#ifndef CONFIG_APUS
         if (address == 0)
                 return NULL;
         return (void *)(address - PCI_DRAM_OFFSET + KERNELBASE);
-#else
-        return (void*) mm_ptov (address);
-#endif
 }
 
 /*
@@ -410,20 +378,12 @@ extern inline void * bus_to_virt(unsigned long address)
  */
 extern inline unsigned long virt_to_phys(volatile void * address)
 {
-#ifndef CONFIG_APUS
         return (unsigned long) address - KERNELBASE;
-#else
-        return iopa ((unsigned long) address);
-#endif
 }
 
 extern inline void * phys_to_virt(unsigned long address)
 {
-#ifndef CONFIG_APUS
         return (void *) (address + KERNELBASE);
-#else
-        return (void*) mm_ptov (address);
-#endif
 }
 
 /*
@@ -553,4 +513,7 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
 #define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) |  (_v))
 #define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
 
+#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) |  (_v))
+#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) & ~(_v))
+
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index 293a444a1d77..a20b499b0186 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -8,10 +8,6 @@
 #include <asm/setup.h>
 #include <asm/page.h>
 
-#ifdef CONFIG_APUS
-#include <asm-m68k/machdep.h>
-#endif
-
 struct pt_regs;
 struct pci_bus; 
 struct pci_dev;
diff --git a/include/asm-ppc/ocp.h b/include/asm-ppc/ocp.h
index 16dbc7d17450..1379a4f76de3 100644
--- a/include/asm-ppc/ocp.h
+++ b/include/asm-ppc/ocp.h
@@ -27,10 +27,10 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/device.h>
+#include <linux/rwsem.h>
 
 #include <asm/mmu.h>
 #include <asm/ocp_ids.h>
-#include <asm/rwsem.h>
 #include <asm/semaphore.h>
 
 #ifdef CONFIG_PPC_OCP
diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h
index fe95c8258cf9..ad4c5a1bc9d6 100644
--- a/include/asm-ppc/page.h
+++ b/include/asm-ppc/page.h
@@ -97,62 +97,22 @@ extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
 extern void copy_user_page(void *to, void *from, unsigned long vaddr,
                            struct page *pg);
 
-#ifndef CONFIG_APUS
 #define PPC_MEMSTART    0
-#define PPC_PGSTART     0
 #define PPC_MEMOFFSET   PAGE_OFFSET
-#else
-extern unsigned long ppc_memstart;
-extern unsigned long ppc_pgstart;
-extern unsigned long ppc_memoffset;
-#define PPC_MEMSTART    ppc_memstart
-#define PPC_PGSTART     ppc_pgstart
-#define PPC_MEMOFFSET   ppc_memoffset
-#endif
 
-#if defined(CONFIG_APUS) && !defined(MODULE)
-/* map phys->virtual and virtual->phys for RAM pages */
-static inline unsigned long ___pa(unsigned long v)
-{
-        unsigned long p;
-        asm volatile ("1: addis %0, %1, %2;"
-                      ".section \".vtop_fixup\",\"aw\";"
-                      ".align  1;"
-                      ".long   1b;"
-                      ".previous;"
-                      : "=r" (p)
-                      : "b" (v), "K" (((-PAGE_OFFSET) >> 16) & 0xffff));
-
-        return p;
-}
-static inline void* ___va(unsigned long p)
-{
-        unsigned long v;
-        asm volatile ("1: addis %0, %1, %2;"
-                      ".section \".ptov_fixup\",\"aw\";"
-                      ".align  1;"
-                      ".long   1b;"
-                      ".previous;"
-                      : "=r" (v)
-                      : "b" (p), "K" (((PAGE_OFFSET) >> 16) & 0xffff));
-
-        return (void*) v;
-}
-#else
 #define ___pa(vaddr) ((vaddr)-PPC_MEMOFFSET)
 #define ___va(paddr) ((paddr)+PPC_MEMOFFSET)
-#endif
 
 extern int page_is_ram(unsigned long pfn);
 
 #define __pa(x) ___pa((unsigned long)(x))
 #define __va(x) ((void *)(___va((unsigned long)(x))))
 
-#define ARCH_PFN_OFFSET         (PPC_PGSTART)
+#define ARCH_PFN_OFFSET         0
 #define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
 #define page_to_virt(page)      __va(page_to_pfn(page) << PAGE_SHIFT)
 
-#define pfn_valid(pfn)          (((pfn) - PPC_PGSTART) < max_mapnr)
+#define pfn_valid(pfn)          ((pfn) < max_mapnr)
 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 
 /* Pure 2^n version of get_order */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index c159315d2c8f..063ad91cbbcc 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -765,14 +765,6 @@ extern void paging_init(void);
 #define pte_to_pgoff(pte)       (pte_val(pte) >> 3)
 #define pgoff_to_pte(off)       ((pte_t) { ((off) << 3) | _PAGE_FILE })
 
-/* CONFIG_APUS */
-/* For virtual address to physical address conversion */
-extern void cache_clear(__u32 addr, int length);
-extern void cache_push(__u32 addr, int length);
-extern int mm_end_of_chunk (unsigned long addr, int len);
-extern unsigned long iopa(unsigned long addr);
-extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
-
 /* Values for nocacheflag and cmode */
 /* These are not used by the APUS kernel_map, but prevents
    compilation errors. */
diff --git a/include/asm-ppc/prom.h b/include/asm-ppc/prom.h
index 901f7fa8b2d7..71f4c996fe75 100644
--- a/include/asm-ppc/prom.h
+++ b/include/asm-ppc/prom.h
@@ -35,7 +35,6 @@ extern unsigned long sub_reloc_offset(unsigned long);
 #define machine_is_compatible(x)                0
 #define of_find_compatible_node(f, t, c)        NULL
 #define of_get_property(p, n, l)                NULL
-#define get_property(a, b, c)                   of_get_property((a), (b), (c))
 
 #endif /* _PPC_PROM_H */
 #endif /* __KERNEL__ */
diff --git a/include/linux/elf.h b/include/linux/elf.h
index 8b17ffe222c4..d2da84acf45d 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -389,12 +389,14 @@ extern Elf64_Dyn _DYNAMIC [];
 
 #endif
 
+/* Optional callbacks to write extra ELF notes. */
 #ifndef ARCH_HAVE_EXTRA_ELF_NOTES
-static inline int arch_notes_size(void) { return 0; }
-static inline void arch_write_notes(struct file *file) { }
-
-#define ELF_CORE_EXTRA_NOTES_SIZE arch_notes_size()
-#define ELF_CORE_WRITE_EXTRA_NOTES arch_write_notes(file)
-#endif /* ARCH_HAVE_EXTRA_ELF_NOTES */
+static inline int elf_coredump_extra_notes_size(void) { return 0; }
+static inline int elf_coredump_extra_notes_write(struct file *file,
+                        loff_t *foffset) { return 0; }
+#else
+extern int elf_coredump_extra_notes_size(void);
+extern int elf_coredump_extra_notes_write(struct file *file, loff_t *foffset);
+#endif
 
 #endif /* _LINUX_ELF_H */
diff --git a/include/linux/of.h b/include/linux/of.h
index 47734ffd9745..6df80e985914 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -54,7 +54,6 @@ extern int of_device_is_compatible(const struct device_node *device,
 extern const void *of_get_property(const struct device_node *node,
                                 const char *name,
                                 int *lenp);
-#define get_property(a, b, c)   of_get_property((a), (b), (c))
 extern int of_n_addr_cells(struct device_node *np);
 extern int of_n_size_cells(struct device_node *np);
 
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 55f307ffbf96..545f24ce2638 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2100,6 +2100,8 @@
 #define PCI_DEVICE_ID_MPC8533           0x0031
 #define PCI_DEVICE_ID_MPC8544E          0x0032
 #define PCI_DEVICE_ID_MPC8544           0x0033
+#define PCI_DEVICE_ID_MPC8572E          0x0040
+#define PCI_DEVICE_ID_MPC8572           0x0041
 #define PCI_DEVICE_ID_MPC8641           0x7010
 #define PCI_DEVICE_ID_MPC8641D          0x7011
 
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 495863a500cd..39fc6ae173b9 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -167,7 +167,7 @@ config SLUB_DEBUG_ON
 
 config DEBUG_PREEMPT
         bool "Debug preemptible kernel"
-        depends on DEBUG_KERNEL && PREEMPT && TRACE_IRQFLAGS_SUPPORT
+        depends on DEBUG_KERNEL && PREEMPT && (TRACE_IRQFLAGS_SUPPORT || PPC64)
         default y
         help
           If you say Y here then the kernel will use a debug variant of the