43 files changed, 5815 insertions, 1955 deletions
diff --git a/Documentation/networking/phy.txt b/Documentation/networking/phy.txt
new file mode 100644
index 000000000000..29ccae409031
--- /dev/null
+++ b/Documentation/networking/phy.txt
@@ -0,0 +1,288 @@
+-------
+PHY Abstraction Layer
+(Updated 2005-07-21)
+Purpose
+ Most network devices consist of set of registers which provide an interface
+ to a MAC layer, which communicates with the physical connection through a
+ PHY.  The PHY concerns itself with negotiating link parameters with the link
+ partner on the other side of the network connection (typically, an ethernet
+ cable), and provides a register interface to allow drivers to determine what
+ settings were chosen, and to configure what settings are allowed.
+ While these devices are distinct from the network devices, and conform to a
+ standard layout for the registers, it has been common practice to integrate
+ the PHY management code with the network driver.  This has resulted in large
+ amounts of redundant code.  Also, on embedded systems with multiple (and
+ sometimes quite different) ethernet controllers connected to the same 
+ management bus, it is difficult to ensure safe use of the bus.
+ Since the PHYs are devices, and the management busses through which they are
+ accessed are, in fact, busses, the PHY Abstraction Layer treats them as such.
+ In doing so, it has these goals:
+   1) Increase code-reuse
+   2) Increase overall code-maintainability
+   3) Speed development time for new network drivers, and for new systems
+ 
+ Basically, this layer is meant to provide an interface to PHY devices which
+ allows network driver writers to write as little code as possible, while
+ still providing a full feature set.
+The MDIO bus
+ Most network devices are connected to a PHY by means of a management bus.
+ Different devices use different busses (though some share common interfaces).
+ In order to take advantage of the PAL, each bus interface needs to be
+ registered as a distinct device.
+ 1) read and write functions must be implemented.  Their prototypes are:
+     int write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
+     int read(struct mii_bus *bus, int mii_id, int regnum);
+   mii_id is the address on the bus for the PHY, and regnum is the register
+   number.  These functions are guaranteed not to be called from interrupt
+   time, so it is safe for them to block, waiting for an interrupt to signal
+   the operation is complete
+ 
+ 2) A reset function is necessary.  This is used to return the bus to an
+   initialized state.
+ 3) A probe function is needed.  This function should set up anything the bus
+   driver needs, setup the mii_bus structure, and register with the PAL using
+   mdiobus_register.  Similarly, there's a remove function to undo all of
+   that (use mdiobus_unregister).
+ 
+ 4) Like any driver, the device_driver structure must be configured, and init
+   exit functions are used to register the driver.
+ 5) The bus must also be declared somewhere as a device, and registered.
+ As an example for how one driver implemented an mdio bus driver, see
+ drivers/net/gianfar_mii.c and arch/ppc/syslib/mpc85xx_devices.c
+Connecting to a PHY
+ Sometime during startup, the network driver needs to establish a connection
+ between the PHY device, and the network device.  At this time, the PHY's bus
+ and drivers need to all have been loaded, so it is ready for the connection.
+ At this point, there are several ways to connect to the PHY:
+ 1) The PAL handles everything, and only calls the network driver when
+   the link state changes, so it can react.
+ 2) The PAL handles everything except interrupts (usually because the
+   controller has the interrupt registers).
+ 3) The PAL handles everything, but checks in with the driver every second,
+   allowing the network driver to react first to any changes before the PAL
+   does.
+ 
+ 4) The PAL serves only as a library of functions, with the network device
+   manually calling functions to update status, and configure the PHY
+Letting the PHY Abstraction Layer do Everything
+ If you choose option 1 (The hope is that every driver can, but to still be
+ useful to drivers that can't), connecting to the PHY is simple:
+ First, you need a function to react to changes in the link state.  This
+ function follows this protocol:
+   static void adjust_link(struct net_device *dev);
+ 
+ Next, you need to know the device name of the PHY connected to this device. 
+ The name will look something like, "phy0:0", where the first number is the
+ bus id, and the second is the PHY's address on that bus.
+ 
+ Now, to connect, just call this function:
+ 
+   phydev = phy_connect(dev, phy_name, &adjust_link, flags);
+ phydev is a pointer to the phy_device structure which represents the PHY.  If
+ phy_connect is successful, it will return the pointer.  dev, here, is the
+ pointer to your net_device.  Once done, this function will have started the
+ PHY's software state machine, and registered for the PHY's interrupt, if it
+ has one.  The phydev structure will be populated with information about the
+ current state, though the PHY will not yet be truly operational at this
+ point.
+ flags is a u32 which can optionally contain phy-specific flags.
+ This is useful if the system has put hardware restrictions on
+ the PHY/controller, of which the PHY needs to be aware.
+ Now just make sure that phydev->supported and phydev->advertising have any
+ values pruned from them which don't make sense for your controller (a 10/100
+ controller may be connected to a gigabit capable PHY, so you would need to
+ mask off SUPPORTED_1000baseT*).  See include/linux/ethtool.h for definitions
+ for these bitfields. Note that you should not SET any bits, or the PHY may
+ get put into an unsupported state.
+ Lastly, once the controller is ready to handle network traffic, you call
+ phy_start(phydev).  This tells the PAL that you are ready, and configures the
+ PHY to connect to the network.  If you want to handle your own interrupts,
+ just set phydev->irq to PHY_IGNORE_INTERRUPT before you call phy_start.
+ Similarly, if you don't want to use interrupts, set phydev->irq to PHY_POLL.
+ When you want to disconnect from the network (even if just briefly), you call
+ phy_stop(phydev).
+Keeping Close Tabs on the PAL
+ It is possible that the PAL's built-in state machine needs a little help to
+ keep your network device and the PHY properly in sync.  If so, you can
+ register a helper function when connecting to the PHY, which will be called
+ every second before the state machine reacts to any changes.  To do this, you
+ need to manually call phy_attach() and phy_prepare_link(), and then call
+ phy_start_machine() with the second argument set to point to your special
+ handler.
+ Currently there are no examples of how to use this functionality, and testing
+ on it has been limited because the author does not have any drivers which use
+ it (they all use option 1).  So Caveat Emptor.
+Doing it all yourself
+ There's a remote chance that the PAL's built-in state machine cannot track
+ the complex interactions between the PHY and your network device.  If this is
+ so, you can simply call phy_attach(), and not call phy_start_machine or
+ phy_prepare_link().  This will mean that phydev->state is entirely yours to
+ handle (phy_start and phy_stop toggle between some of the states, so you
+ might need to avoid them).
+ An effort has been made to make sure that useful functionality can be
+ accessed without the state-machine running, and most of these functions are
+ descended from functions which did not interact with a complex state-machine.
+ However, again, no effort has been made so far to test running without the
+ state machine, so tryer beware.
+ Here is a brief rundown of the functions:
+ int phy_read(struct phy_device *phydev, u16 regnum);
+ int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
+   Simple read/write primitives.  They invoke the bus's read/write function
+   pointers.
+ void phy_print_status(struct phy_device *phydev);
+ 
+   A convenience function to print out the PHY status neatly.
+ int phy_clear_interrupt(struct phy_device *phydev);
+ int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);
+   
+   Clear the PHY's interrupt, and configure which ones are allowed,
+   respectively.  Currently only supports all on, or all off.
+ 
+ int phy_enable_interrupts(struct phy_device *phydev);
+ int phy_disable_interrupts(struct phy_device *phydev);
+   Functions which enable/disable PHY interrupts, clearing them
+   before and after, respectively.
+ int phy_start_interrupts(struct phy_device *phydev);
+ int phy_stop_interrupts(struct phy_device *phydev);
+   Requests the IRQ for the PHY interrupts, then enables them for
+   start, or disables then frees them for stop.
+ struct phy_device * phy_attach(struct net_device *dev, const char *phy_id,
+                 u32 flags);
+   Attaches a network device to a particular PHY, binding the PHY to a generic
+   driver if none was found during bus initialization.  Passes in
+   any phy-specific flags as needed.
+ int phy_start_aneg(struct phy_device *phydev);
+   
+   Using variables inside the phydev structure, either configures advertising
+   and resets autonegotiation, or disables autonegotiation, and configures
+   forced settings.
+ static inline int phy_read_status(struct phy_device *phydev);
+   Fills the phydev structure with up-to-date information about the current
+   settings in the PHY.
+ void phy_sanitize_settings(struct phy_device *phydev)
+   
+   Resolves differences between currently desired settings, and
+   supported settings for the given PHY device.  Does not make
+   the changes in the hardware, though.
+ int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
+ int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
+   Ethtool convenience functions.
+ int phy_mii_ioctl(struct phy_device *phydev,
+                 struct mii_ioctl_data *mii_data, int cmd);
+   The MII ioctl.  Note that this function will completely screw up the state
+   machine if you write registers like BMCR, BMSR, ADVERTISE, etc.  Best to
+   use this only to write registers which are not standard, and don't set off
+   a renegotiation.
+PHY Device Drivers
+ With the PHY Abstraction Layer, adding support for new PHYs is
+ quite easy.  In some cases, no work is required at all!  However,
+ many PHYs require a little hand-holding to get up-and-running.
+Generic PHY driver
+ If the desired PHY doesn't have any errata, quirks, or special
+ features you want to support, then it may be best to not add
+ support, and let the PHY Abstraction Layer's Generic PHY Driver
+ do all of the work.  
+Writing a PHY driver
+ If you do need to write a PHY driver, the first thing to do is
+ make sure it can be matched with an appropriate PHY device.
+ This is done during bus initialization by reading the device's
+ UID (stored in registers 2 and 3), then comparing it to each
+ driver's phy_id field by ANDing it with each driver's
+ phy_id_mask field.  Also, it needs a name.  Here's an example:
+   static struct phy_driver dm9161_driver = {
+         .phy_id         = 0x0181b880,
+         .name           = "Davicom DM9161E",
+         .phy_id_mask    = 0x0ffffff0,
+         ...
+   }
+ Next, you need to specify what features (speed, duplex, autoneg,
+ etc) your PHY device and driver support.  Most PHYs support
+ PHY_BASIC_FEATURES, but you can look in include/mii.h for other
+ features.
+ Each driver consists of a number of function pointers:
+   config_init: configures PHY into a sane state after a reset.
+     For instance, a Davicom PHY requires descrambling disabled.
+   probe: Does any setup needed by the driver
+   suspend/resume: power management
+   config_aneg: Changes the speed/duplex/negotiation settings
+   read_status: Reads the current speed/duplex/negotiation settings
+   ack_interrupt: Clear a pending interrupt
+   config_intr: Enable or disable interrupts
+   remove: Does any driver take-down
+ Of these, only config_aneg and read_status are required to be
+ assigned by the driver code.  The rest are optional.  Also, it is
+ preferred to use the generic phy driver's versions of these two
+ functions if at all possible: genphy_read_status and
+ genphy_config_aneg.  If this is not possible, it is likely that
+ you only need to perform some actions before and after invoking
+ these functions, and so your functions will wrap the generic
+ ones.
+ Feel free to look at the Marvell, Cicada, and Davicom drivers in
+ drivers/net/phy/ for examples (the lxt and qsemi drivers have
+ not been tested as of this writing)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 8a835eb58808..1e50b8e32add 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -131,6 +131,8 @@ config NET_SB1000
        source "drivers/net/arcnet/Kconfig"
+source "drivers/net/phy/Kconfig"
 #
 #       Ethernet
 #
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 63c6d1e6d4d9..a369ae284a9a 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -65,6 +65,7 @@ obj-$(CONFIG_ADAPTEC_STARFIRE) += starfire.o
 #
 obj-$(CONFIG_MII) += mii.o
+obj-$(CONFIG_PHYLIB) += phy/
 obj-$(CONFIG_SUNDANCE) += sundance.o
 obj-$(CONFIG_HAMACHI) += hamachi.o
diff --git a/drivers/net/Space.c b/drivers/net/Space.c
index 3707df6b0cfa..11c44becc08f 100644
--- a/drivers/net/Space.c
+++ b/drivers/net/Space.c
@@ -323,12 +323,6 @@ extern struct net_device *proteon_probe(int unit);
 extern struct net_device *smctr_probe(int unit);
 static struct devprobe2 tr_probes2[] __initdata = {
-#ifdef CONFIG_SKISA
-        {sk_isa_probe, 0},
-#endif
-#ifdef CONFIG_PROTEON
-        {proteon_probe, 0},
-#endif
 #ifdef CONFIG_SMCTR
        {smctr_probe, 0},
 #endif
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index 5ce606d9dc03..19e829b567d0 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -1106,18 +1106,13 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav
                        }
                }
-                if (found) {
+                if (!found)
-                        /* a slave was found that is using the mac address
+                        return 0;
-                         * of the new slave
-                         */
-                        printk(KERN_ERR DRV_NAME
-                               ": Error: the hw address of slave %s is not "
-                               "unique - cannot enslave it!",
-                               slave->dev->name);
-                        return -EINVAL;
-                }
-                return 0;
+                /* Try setting slave mac to bond address and fall-through
+                   to code handling that situation below... */
+                alb_set_slave_mac_addr(slave, bond->dev->dev_addr,
+                                       bond->alb_info.rlb_enabled);
        }
        /* The slave's address is equal to the address of the bond.
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 64f0f697c958..f165ae973985 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -85,6 +85,14 @@
 *      0.33: 16 May 2005: Support for MCP51 added.
 *      0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
 *      0.35: 26 Jun 2005: Support for MCP55 added.
+ *      0.36: 28 Jun 2005: Add jumbo frame support.
+ *      0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
+ *      0.38: 16 Jul 2005: tx irq rewrite: Use global flags instead of
+ *                         per-packet flags.
+ *      0.39: 18 Jul 2005: Add 64bit descriptor support.
+ *      0.40: 19 Jul 2005: Add support for mac address change.
+ *      0.41: 30 Jul 2005: Write back original MAC in nv_close instead
+ *                         of nv_remove
 *
 * Known bugs:
 * We suspect that on some hardware no TX done interrupts are generated.
@@ -96,7 +104,7 @@
 * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
 * superfluous timer interrupts from the nic.
 */
-#define FORCEDETH_VERSION               "0.35"
+#define FORCEDETH_VERSION               "0.41"
 #define DRV_NAME                        "forcedeth"
 #include <linux/module.h>
@@ -131,11 +139,10 @@
 * Hardware access:
 */
-#define DEV_NEED_LASTPACKET1    0x0001  /* set LASTPACKET1 in tx flags */
+#define DEV_NEED_TIMERIRQ       0x0001  /* set the timer irq flag in the irq mask */
-#define DEV_IRQMASK_1           0x0002  /* use NVREG_IRQMASK_WANTED_1 for irq mask */
+#define DEV_NEED_LINKTIMER      0x0002  /* poll link settings. Relies on the timer irq */
-#define DEV_IRQMASK_2           0x0004  /* use NVREG_IRQMASK_WANTED_2 for irq mask */
+#define DEV_HAS_LARGEDESC       0x0004  /* device supports jumbo frames and needs packet format 2 */
-#define DEV_NEED_TIMERIRQ       0x0008  /* set the timer irq flag in the irq mask */
+#define DEV_HAS_HIGH_DMA        0x0008  /* device supports 64bit dma */
-#define DEV_NEED_LINKTIMER      0x0010  /* poll link settings. Relies on the timer irq */
 enum {
        NvRegIrqStatus = 0x000,
@@ -146,13 +153,16 @@ enum {
 #define NVREG_IRQ_RX                    0x0002
 #define NVREG_IRQ_RX_NOBUF              0x0004
 #define NVREG_IRQ_TX_ERR                0x0008
-#define NVREG_IRQ_TX2                   0x0010
+#define NVREG_IRQ_TX_OK                 0x0010
 #define NVREG_IRQ_TIMER                 0x0020
 #define NVREG_IRQ_LINK                  0x0040
+#define NVREG_IRQ_TX_ERROR              0x0080
 #define NVREG_IRQ_TX1                   0x0100
-#define NVREG_IRQMASK_WANTED_1          0x005f
+#define NVREG_IRQMASK_WANTED            0x00df
-#define NVREG_IRQMASK_WANTED_2          0x0147
-#define NVREG_IRQ_UNKNOWN               (~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR|NVREG_IRQ_TX2|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_TX1))
+#define NVREG_IRQ_UNKNOWN       (~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
+                                        NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_TX_ERROR| \
+                                        NVREG_IRQ_TX1))
        NvRegUnknownSetupReg6 = 0x008,
 #define NVREG_UNKSETUP6_VAL             3
@@ -286,6 +296,18 @@ struct ring_desc {
        u32 FlagLen;
 };
+struct ring_desc_ex {
+        u32 PacketBufferHigh;
+        u32 PacketBufferLow;
+        u32 Reserved;
+        u32 FlagLen;
+};
+typedef union _ring_type {
+        struct ring_desc* orig;
+        struct ring_desc_ex* ex;
+} ring_type;
 #define FLAG_MASK_V1 0xffff0000
 #define FLAG_MASK_V2 0xffffc000
 #define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1)
@@ -293,7 +315,7 @@ struct ring_desc {
 #define NV_TX_LASTPACKET        (1<<16)
 #define NV_TX_RETRYERROR        (1<<19)
-#define NV_TX_LASTPACKET1       (1<<24)
+#define NV_TX_FORCED_INTERRUPT  (1<<24)
 #define NV_TX_DEFERRED          (1<<26)
 #define NV_TX_CARRIERLOST       (1<<27)
 #define NV_TX_LATECOLLISION     (1<<28)
@@ -303,7 +325,7 @@ struct ring_desc {
 #define NV_TX2_LASTPACKET       (1<<29)
 #define NV_TX2_RETRYERROR       (1<<18)
-#define NV_TX2_LASTPACKET1      (1<<23)
+#define NV_TX2_FORCED_INTERRUPT (1<<30)
 #define NV_TX2_DEFERRED         (1<<25)
 #define NV_TX2_CARRIERLOST      (1<<26)
 #define NV_TX2_LATECOLLISION    (1<<27)
@@ -379,9 +401,13 @@ struct ring_desc {
 #define TX_LIMIT_START  62
 /* rx/tx mac addr + type + vlan + align + slack*/
-#define RX_NIC_BUFSIZE          (ETH_DATA_LEN + 64)
+#define NV_RX_HEADERS           (64)
-/* even more slack */
+/* even more slack. */
-#define RX_ALLOC_BUFSIZE        (ETH_DATA_LEN + 128)
+#define NV_RX_ALLOC_PAD         (64)
+/* maximum mtu size */
+#define NV_PKTLIMIT_1   ETH_DATA_LEN    /* hard limit not known */
+#define NV_PKTLIMIT_2   9100    /* Actual limit according to NVidia: 9202 */
 #define OOM_REFILL      (1+HZ/20)
 #define POLL_WAIT       (1+HZ/100)
@@ -396,6 +422,7 @@ struct ring_desc {
 */
 #define DESC_VER_1      0x0
 #define DESC_VER_2      (0x02100|NVREG_TXRXCTL_RXCHECK)
+#define DESC_VER_3      (0x02200|NVREG_TXRXCTL_RXCHECK)
 /* PHY defines */
 #define PHY_OUI_MARVELL 0x5043
@@ -468,11 +495,12 @@ struct fe_priv {
        /* rx specific fields.
         * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
         */
-        struct ring_desc *rx_ring;
+        ring_type rx_ring;
        unsigned int cur_rx, refill_rx;
        struct sk_buff *rx_skbuff[RX_RING];
        dma_addr_t rx_dma[RX_RING];
        unsigned int rx_buf_sz;
+        unsigned int pkt_limit;
        struct timer_list oom_kick;
        struct timer_list nic_poll;
@@ -484,7 +512,7 @@ struct fe_priv {
        /*
         * tx specific fields.
         */
-        struct ring_desc *tx_ring;
+        ring_type tx_ring;
        unsigned int next_tx, nic_tx;
        struct sk_buff *tx_skbuff[TX_RING];
        dma_addr_t tx_dma[TX_RING];
@@ -519,6 +547,11 @@ static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v)
                & ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2);
 }
+static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v)
+{
+        return le32_to_cpu(prd->FlagLen) & LEN_MASK_V2;
+}
 static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
                                int delay, int delaymax, const char *msg)
 {
@@ -792,7 +825,7 @@ static int nv_alloc_rx(struct net_device *dev)
                nr = refill_rx % RX_RING;
                if (np->rx_skbuff[nr] == NULL) {
-                        skb = dev_alloc_skb(RX_ALLOC_BUFSIZE);
+                        skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
                        if (!skb)
                                break;
@@ -803,9 +836,16 @@ static int nv_alloc_rx(struct net_device *dev)
                }
                np->rx_dma[nr] = pci_map_single(np->pci_dev, skb->data, skb->len,
                                                PCI_DMA_FROMDEVICE);
-                np->rx_ring[nr].PacketBuffer = cpu_to_le32(np->rx_dma[nr]);
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-                wmb();
+                        np->rx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->rx_dma[nr]);
-                np->rx_ring[nr].FlagLen = cpu_to_le32(RX_NIC_BUFSIZE | NV_RX_AVAIL);
+                        wmb();
+                        np->rx_ring.orig[nr].FlagLen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL);
+                } else {
+                        np->rx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->rx_dma[nr]) >> 32;
+                        np->rx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->rx_dma[nr]) & 0x0FFFFFFFF;
+                        wmb();
+                        np->rx_ring.ex[nr].FlagLen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL);
+                }
                dprintk(KERN_DEBUG "%s: nv_alloc_rx: Packet %d marked as Available\n",
                                        dev->name, refill_rx);
                refill_rx++;
@@ -831,19 +871,37 @@ static void nv_do_rx_refill(unsigned long data)
        enable_irq(dev->irq);
 }
-static int nv_init_ring(struct net_device *dev)
+static void nv_init_rx(struct net_device *dev) 
 {
        struct fe_priv *np = get_nvpriv(dev);
        int i;
-        np->next_tx = np->nic_tx = 0;
-        for (i = 0; i < TX_RING; i++)
-                np->tx_ring[i].FlagLen = 0;
        np->cur_rx = RX_RING;
        np->refill_rx = 0;
        for (i = 0; i < RX_RING; i++)
-                np->rx_ring[i].FlagLen = 0;
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        np->rx_ring.orig[i].FlagLen = 0;
+                else
+                        np->rx_ring.ex[i].FlagLen = 0;
+}
+static void nv_init_tx(struct net_device *dev)
+{
+        struct fe_priv *np = get_nvpriv(dev);
+        int i;
+        np->next_tx = np->nic_tx = 0;
+        for (i = 0; i < TX_RING; i++)
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        np->tx_ring.orig[i].FlagLen = 0;
+                else
+                        np->tx_ring.ex[i].FlagLen = 0;
+}
+static int nv_init_ring(struct net_device *dev)
+{
+        nv_init_tx(dev);
+        nv_init_rx(dev);
        return nv_alloc_rx(dev);
 }
@@ -852,7 +910,10 @@ static void nv_drain_tx(struct net_device *dev)
        struct fe_priv *np = get_nvpriv(dev);
        int i;
        for (i = 0; i < TX_RING; i++) {
-                np->tx_ring[i].FlagLen = 0;
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        np->tx_ring.orig[i].FlagLen = 0;
+                else
+                        np->tx_ring.ex[i].FlagLen = 0;
                if (np->tx_skbuff[i]) {
                        pci_unmap_single(np->pci_dev, np->tx_dma[i],
                                                np->tx_skbuff[i]->len,
@@ -869,7 +930,10 @@ static void nv_drain_rx(struct net_device *dev)
        struct fe_priv *np = get_nvpriv(dev);
        int i;
        for (i = 0; i < RX_RING; i++) {
-                np->rx_ring[i].FlagLen = 0;
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        np->rx_ring.orig[i].FlagLen = 0;
+                else
+                        np->rx_ring.ex[i].FlagLen = 0;
                wmb();
                if (np->rx_skbuff[i]) {
                        pci_unmap_single(np->pci_dev, np->rx_dma[i],
@@ -900,11 +964,19 @@ static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
        np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data,skb->len,
                                        PCI_DMA_TODEVICE);
-        np->tx_ring[nr].PacketBuffer = cpu_to_le32(np->tx_dma[nr]);
+        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                np->tx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->tx_dma[nr]);
+        else {
+                np->tx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
+                np->tx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
+        }
        spin_lock_irq(&np->lock);
        wmb();
-        np->tx_ring[nr].FlagLen = cpu_to_le32( (skb->len-1) | np->tx_flags );
+        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                np->tx_ring.orig[nr].FlagLen = cpu_to_le32( (skb->len-1) | np->tx_flags );
+        else
+                np->tx_ring.ex[nr].FlagLen = cpu_to_le32( (skb->len-1) | np->tx_flags );
        dprintk(KERN_DEBUG "%s: nv_start_xmit: packet packet %d queued for transmission.\n",
                                dev->name, np->next_tx);
        {
@@ -942,7 +1014,10 @@ static void nv_tx_done(struct net_device *dev)
        while (np->nic_tx != np->next_tx) {
                i = np->nic_tx % TX_RING;
-                Flags = le32_to_cpu(np->tx_ring[i].FlagLen);
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        Flags = le32_to_cpu(np->tx_ring.orig[i].FlagLen);
+                else
+                        Flags = le32_to_cpu(np->tx_ring.ex[i].FlagLen);
                dprintk(KERN_DEBUG "%s: nv_tx_done: looking at packet %d, Flags 0x%x.\n",
                                        dev->name, np->nic_tx, Flags);
@@ -993,9 +1068,56 @@ static void nv_tx_timeout(struct net_device *dev)
        struct fe_priv *np = get_nvpriv(dev);
        u8 __iomem *base = get_hwbase(dev);
-        dprintk(KERN_DEBUG "%s: Got tx_timeout. irq: %08x\n", dev->name,
+        printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name,
                        readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK);
+        {
+                int i;
+                printk(KERN_INFO "%s: Ring at %lx: next %d nic %d\n",
+                                dev->name, (unsigned long)np->ring_addr,
+                                np->next_tx, np->nic_tx);
+                printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
+                for (i=0;i<0x400;i+= 32) {
+                        printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+                                        i,
+                                        readl(base + i + 0), readl(base + i + 4),
+                                        readl(base + i + 8), readl(base + i + 12),
+                                        readl(base + i + 16), readl(base + i + 20),
+                                        readl(base + i + 24), readl(base + i + 28));
+                }
+                printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
+                for (i=0;i<TX_RING;i+= 4) {
+                        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+                                printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
+                                       i, 
+                                       le32_to_cpu(np->tx_ring.orig[i].PacketBuffer),
+                                       le32_to_cpu(np->tx_ring.orig[i].FlagLen),
+                                       le32_to_cpu(np->tx_ring.orig[i+1].PacketBuffer),
+                                       le32_to_cpu(np->tx_ring.orig[i+1].FlagLen),
+                                       le32_to_cpu(np->tx_ring.orig[i+2].PacketBuffer),
+                                       le32_to_cpu(np->tx_ring.orig[i+2].FlagLen),
+                                       le32_to_cpu(np->tx_ring.orig[i+3].PacketBuffer),
+                                       le32_to_cpu(np->tx_ring.orig[i+3].FlagLen));
+                        } else {
+                                printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n",
+                                       i, 
+                                       le32_to_cpu(np->tx_ring.ex[i].PacketBufferHigh),
+                                       le32_to_cpu(np->tx_ring.ex[i].PacketBufferLow),
+                                       le32_to_cpu(np->tx_ring.ex[i].FlagLen),
+                                       le32_to_cpu(np->tx_ring.ex[i+1].PacketBufferHigh),
+                                       le32_to_cpu(np->tx_ring.ex[i+1].PacketBufferLow),
+                                       le32_to_cpu(np->tx_ring.ex[i+1].FlagLen),
+                                       le32_to_cpu(np->tx_ring.ex[i+2].PacketBufferHigh),
+                                       le32_to_cpu(np->tx_ring.ex[i+2].PacketBufferLow),
+                                       le32_to_cpu(np->tx_ring.ex[i+2].FlagLen),
+                                       le32_to_cpu(np->tx_ring.ex[i+3].PacketBufferHigh),
+                                       le32_to_cpu(np->tx_ring.ex[i+3].PacketBufferLow),
+                                       le32_to_cpu(np->tx_ring.ex[i+3].FlagLen));
+                        }
+                }
+        }
        spin_lock_irq(&np->lock);
        /* 1) stop tx engine */
@@ -1009,7 +1131,10 @@ static void nv_tx_timeout(struct net_device *dev)
                printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name);
                nv_drain_tx(dev);
                np->next_tx = np->nic_tx = 0;
-                writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
+                else
+                        writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
                netif_wake_queue(dev);
        }
@@ -1084,8 +1209,13 @@ static void nv_rx_process(struct net_device *dev)
                        break;  /* we scanned the whole ring - do not continue */
                i = np->cur_rx % RX_RING;
-                Flags = le32_to_cpu(np->rx_ring[i].FlagLen);
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-                len = nv_descr_getlength(&np->rx_ring[i], np->desc_ver);
+                        Flags = le32_to_cpu(np->rx_ring.orig[i].FlagLen);
+                        len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver);
+                } else {
+                        Flags = le32_to_cpu(np->rx_ring.ex[i].FlagLen);
+                        len = nv_descr_getlength_ex(&np->rx_ring.ex[i], np->desc_ver);
+                }
                dprintk(KERN_DEBUG "%s: nv_rx_process: looking at packet %d, Flags 0x%x.\n",
                                        dev->name, np->cur_rx, Flags);
@@ -1207,15 +1337,133 @@ next_pkt:
        }
 }
+static void set_bufsize(struct net_device *dev)
+{
+        struct fe_priv *np = netdev_priv(dev);
+        if (dev->mtu <= ETH_DATA_LEN)
+                np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS;
+        else
+                np->rx_buf_sz = dev->mtu + NV_RX_HEADERS;
+}
 /*
 * nv_change_mtu: dev->change_mtu function
 * Called with dev_base_lock held for read.
 */
 static int nv_change_mtu(struct net_device *dev, int new_mtu)
 {
-        if (new_mtu > ETH_DATA_LEN)
+        struct fe_priv *np = get_nvpriv(dev);
+        int old_mtu;
+        if (new_mtu < 64 || new_mtu > np->pkt_limit)
                return -EINVAL;
+        old_mtu = dev->mtu;
        dev->mtu = new_mtu;
+        /* return early if the buffer sizes will not change */
+        if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN)
+                return 0;
+        if (old_mtu == new_mtu)
+                return 0;
+        /* synchronized against open : rtnl_lock() held by caller */
+        if (netif_running(dev)) {
+                u8 *base = get_hwbase(dev);
+                /*
+                 * It seems that the nic preloads valid ring entries into an
+                 * internal buffer. The procedure for flushing everything is
+                 * guessed, there is probably a simpler approach.
+                 * Changing the MTU is a rare event, it shouldn't matter.
+                 */
+                disable_irq(dev->irq);
+                spin_lock_bh(&dev->xmit_lock);
+                spin_lock(&np->lock);
+                /* stop engines */
+                nv_stop_rx(dev);
+                nv_stop_tx(dev);
+                nv_txrx_reset(dev);
+                /* drain rx queue */
+                nv_drain_rx(dev);
+                nv_drain_tx(dev);
+                /* reinit driver view of the rx queue */
+                nv_init_rx(dev);
+                nv_init_tx(dev);
+                /* alloc new rx buffers */
+                set_bufsize(dev);
+                if (nv_alloc_rx(dev)) {
+                        if (!np->in_shutdown)
+                                mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
+                }
+                /* reinit nic view of the rx queue */
+                writel(np->rx_buf_sz, base + NvRegOffloadConfig);
+                writel((u32) np->ring_addr, base + NvRegRxRingPhysAddr);
+                if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                        writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
+                else
+                        writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
+                writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
+                        base + NvRegRingSizes);
+                pci_push(base);
+                writel(NVREG_TXRXCTL_KICK|np->desc_ver, get_hwbase(dev) + NvRegTxRxControl);
+                pci_push(base);
+                /* restart rx engine */
+                nv_start_rx(dev);
+                nv_start_tx(dev);
+                spin_unlock(&np->lock);
+                spin_unlock_bh(&dev->xmit_lock);
+                enable_irq(dev->irq);
+        }
+        return 0;
+}
+static void nv_copy_mac_to_hw(struct net_device *dev)
+{
+        u8 *base = get_hwbase(dev);
+        u32 mac[2];
+        mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
+                        (dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
+        mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
+        writel(mac[0], base + NvRegMacAddrA);
+        writel(mac[1], base + NvRegMacAddrB);
+}
+/*
+ * nv_set_mac_address: dev->set_mac_address function
+ * Called with rtnl_lock() held.
+ */
+static int nv_set_mac_address(struct net_device *dev, void *addr)
+{
+        struct fe_priv *np = get_nvpriv(dev);
+        struct sockaddr *macaddr = (struct sockaddr*)addr;
+        if(!is_valid_ether_addr(macaddr->sa_data))
+                return -EADDRNOTAVAIL;
+        /* synchronized against open : rtnl_lock() held by caller */
+        memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN);
+        if (netif_running(dev)) {
+                spin_lock_bh(&dev->xmit_lock);
+                spin_lock_irq(&np->lock);
+                /* stop rx engine */
+                nv_stop_rx(dev);
+                /* set mac address */
+                nv_copy_mac_to_hw(dev);
+                /* restart rx engine */
+                nv_start_rx(dev);
+                spin_unlock_irq(&np->lock);
+                spin_unlock_bh(&dev->xmit_lock);
+        } else {
+                nv_copy_mac_to_hw(dev);
+        }
        return 0;
 }
@@ -1470,7 +1718,7 @@ static irqreturn_t nv_nic_irq(int foo, void *data, struct pt_regs *regs)
                if (!(events & np->irqmask))
                        break;
-                if (events & (NVREG_IRQ_TX1|NVREG_IRQ_TX2|NVREG_IRQ_TX_ERR)) {
+                if (events & (NVREG_IRQ_TX1|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_ERROR|NVREG_IRQ_TX_ERR)) {
                        spin_lock(&np->lock);
                        nv_tx_done(dev);
                        spin_unlock(&np->lock);
@@ -1761,6 +2009,50 @@ static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
        return 0;
 }
+#define FORCEDETH_REGS_VER      1
+#define FORCEDETH_REGS_SIZE     0x400 /* 256 32-bit registers */
+static int nv_get_regs_len(struct net_device *dev)
+{
+        return FORCEDETH_REGS_SIZE;
+}
+static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
+{
+        struct fe_priv *np = get_nvpriv(dev);
+        u8 __iomem *base = get_hwbase(dev);
+        u32 *rbuf = buf;
+        int i;
+        regs->version = FORCEDETH_REGS_VER;
+        spin_lock_irq(&np->lock);
+        for (i=0;i<FORCEDETH_REGS_SIZE/sizeof(u32);i++)
+                rbuf[i] = readl(base + i*sizeof(u32));
+        spin_unlock_irq(&np->lock);
+}
+static int nv_nway_reset(struct net_device *dev)
+{
+        struct fe_priv *np = get_nvpriv(dev);
+        int ret;
+        spin_lock_irq(&np->lock);
+        if (np->autoneg) {
+                int bmcr;
+                bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
+                bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
+                mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
+                ret = 0;
+        } else {
+                ret = -EINVAL;
+        }
+        spin_unlock_irq(&np->lock);
+        return ret;
+}
 static struct ethtool_ops ops = {
        .get_drvinfo = nv_get_drvinfo,
        .get_link = ethtool_op_get_link,
@@ -1768,6 +2060,9 @@ static struct ethtool_ops ops = {
        .set_wol = nv_set_wol,
        .get_settings = nv_get_settings,
        .set_settings = nv_set_settings,
+        .get_regs_len = nv_get_regs_len,
+        .get_regs = nv_get_regs,
+        .nway_reset = nv_nway_reset,
 };
 static int nv_open(struct net_device *dev)
@@ -1792,6 +2087,7 @@ static int nv_open(struct net_device *dev)
        writel(0, base + NvRegAdapterControl);
        /* 2) initialize descriptor rings */
+        set_bufsize(dev);
        oom = nv_init_ring(dev);
        writel(0, base + NvRegLinkSpeed);
@@ -1802,20 +2098,14 @@ static int nv_open(struct net_device *dev)
        np->in_shutdown = 0;
        /* 3) set mac address */
-        {
+        nv_copy_mac_to_hw(dev);
-                u32 mac[2];
-                mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-                                (dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-                mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-                writel(mac[0], base + NvRegMacAddrA);
-                writel(mac[1], base + NvRegMacAddrB);
-        }
        /* 4) give hw rings */
        writel((u32) np->ring_addr, base + NvRegRxRingPhysAddr);
-        writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
+        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
+        else
+                writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
        writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
                base + NvRegRingSizes);
@@ -1837,7 +2127,7 @@ static int nv_open(struct net_device *dev)
        writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
        writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
        writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
-        writel(NVREG_OFFLOAD_NORMAL, base + NvRegOffloadConfig);
+        writel(np->rx_buf_sz, base + NvRegOffloadConfig);
        writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
        get_random_bytes(&i, sizeof(i));
@@ -1942,6 +2232,12 @@ static int nv_close(struct net_device *dev)
        if (np->wolenabled)
                nv_start_rx(dev);
+        /* special op: write back the misordered MAC address - otherwise
+         * the next nv_probe would see a wrong address.
+         */
+        writel(np->orig_mac[0], base + NvRegMacAddrA);
+        writel(np->orig_mac[1], base + NvRegMacAddrB);
        /* FIXME: power down nic */
        return 0;
@@ -2006,32 +2302,55 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
        }
        /* handle different descriptor versions */
-        if (pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_1 ||
+        if (id->driver_data & DEV_HAS_HIGH_DMA) {
-                pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_2 ||
+                /* packet format 3: supports 40-bit addressing */
-                pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_3 ||    
+                np->desc_ver = DESC_VER_3;
-                pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||
+                if (pci_set_dma_mask(pci_dev, 0x0000007fffffffffULL)) {
-                pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_13)
+                        printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
-                np->desc_ver = DESC_VER_1;
+                                        pci_name(pci_dev));
-        else
+                }
+        } else if (id->driver_data & DEV_HAS_LARGEDESC) {
+                /* packet format 2: supports jumbo frames */
                np->desc_ver = DESC_VER_2;
+        } else {
+                /* original packet format */
+                np->desc_ver = DESC_VER_1;
+        }
+        np->pkt_limit = NV_PKTLIMIT_1;
+        if (id->driver_data & DEV_HAS_LARGEDESC)
+                np->pkt_limit = NV_PKTLIMIT_2;
        err = -ENOMEM;
        np->base = ioremap(addr, NV_PCI_REGSZ);
        if (!np->base)
                goto out_relreg;
        dev->base_addr = (unsigned long)np->base;
        dev->irq = pci_dev->irq;
-        np->rx_ring = pci_alloc_consistent(pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING),
-                                                &np->ring_addr);
+        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-        if (!np->rx_ring)
+                np->rx_ring.orig = pci_alloc_consistent(pci_dev,
-                goto out_unmap;
+                                        sizeof(struct ring_desc) * (RX_RING + TX_RING),
-        np->tx_ring = &np->rx_ring[RX_RING];
+                                        &np->ring_addr);
+                if (!np->rx_ring.orig)
+                        goto out_unmap;
+                np->tx_ring.orig = &np->rx_ring.orig[RX_RING];
+        } else {
+                np->rx_ring.ex = pci_alloc_consistent(pci_dev,
+                                        sizeof(struct ring_desc_ex) * (RX_RING + TX_RING),
+                                        &np->ring_addr);
+                if (!np->rx_ring.ex)
+                        goto out_unmap;
+                np->tx_ring.ex = &np->rx_ring.ex[RX_RING];
+        }
        dev->open = nv_open;
        dev->stop = nv_close;
        dev->hard_start_xmit = nv_start_xmit;
        dev->get_stats = nv_get_stats;
        dev->change_mtu = nv_change_mtu;
+        dev->set_mac_address = nv_set_mac_address;
        dev->set_multicast_list = nv_set_multicast;
 #ifdef CONFIG_NET_POLL_CONTROLLER
        dev->poll_controller = nv_poll_controller;
@@ -2080,17 +2399,10 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
        if (np->desc_ver == DESC_VER_1) {
                np->tx_flags = NV_TX_LASTPACKET|NV_TX_VALID;
-                if (id->driver_data & DEV_NEED_LASTPACKET1)
-                        np->tx_flags |= NV_TX_LASTPACKET1;
        } else {
                np->tx_flags = NV_TX2_LASTPACKET|NV_TX2_VALID;
-                if (id->driver_data & DEV_NEED_LASTPACKET1)
-                        np->tx_flags |= NV_TX2_LASTPACKET1;
        }
-        if (id->driver_data & DEV_IRQMASK_1)
+        np->irqmask = NVREG_IRQMASK_WANTED;
-                np->irqmask = NVREG_IRQMASK_WANTED_1;
-        if (id->driver_data & DEV_IRQMASK_2)
-                np->irqmask = NVREG_IRQMASK_WANTED_2;
        if (id->driver_data & DEV_NEED_TIMERIRQ)
                np->irqmask |= NVREG_IRQ_TIMER;
        if (id->driver_data & DEV_NEED_LINKTIMER) {
@@ -2155,8 +2467,12 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
        return 0;
 out_freering:
-        pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING),
+        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-                                np->rx_ring, np->ring_addr);
+                pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING),
+                                    np->rx_ring.orig, np->ring_addr);
+        else
+                pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING),
+                                    np->rx_ring.ex, np->ring_addr);
        pci_set_drvdata(pci_dev, NULL);
 out_unmap:
        iounmap(get_hwbase(dev));
@@ -2174,18 +2490,14 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
 {
        struct net_device *dev = pci_get_drvdata(pci_dev);
        struct fe_priv *np = get_nvpriv(dev);
-        u8 __iomem *base = get_hwbase(dev);
        unregister_netdev(dev);
-        /* special op: write back the misordered MAC address - otherwise
-         * the next nv_probe would see a wrong address.
-         */
-        writel(np->orig_mac[0], base + NvRegMacAddrA);
-        writel(np->orig_mac[1], base + NvRegMacAddrB);
        /* free all structures */
-        pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING), np->rx_ring, np->ring_addr);
+        if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
+                pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING), np->rx_ring.orig, np->ring_addr);
+        else
+                pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING), np->rx_ring.ex, np->ring_addr);
        iounmap(get_hwbase(dev));
        pci_release_regions(pci_dev);
        pci_disable_device(pci_dev);
@@ -2195,109 +2507,64 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
 static struct pci_device_id pci_tbl[] = {
        {       /* nForce Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_1,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_IRQMASK_1|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* nForce2 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_2,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* nForce3 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_3,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* nForce3 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_4,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* nForce3 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_5,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* nForce3 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_6,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* nForce3 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_7,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* CK804 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_8,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* CK804 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_9,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* MCP04 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_10,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* MCP04 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_11,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* MCP51 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_12,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* MCP51 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_13,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* MCP55 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_14,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {       /* MCP55 Ethernet Controller */
-                .vendor = PCI_VENDOR_ID_NVIDIA,
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
-                .device = PCI_DEVICE_ID_NVIDIA_NVENET_15,
+                .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA,
-                .subvendor = PCI_ANY_ID,
-                .subdevice = PCI_ANY_ID,
-                .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
        },
        {0,},
 };
diff --git a/drivers/net/hamradio/baycom_epp.c b/drivers/net/hamradio/baycom_epp.c
index a7f15d9f13e5..5298096afbdb 100644
--- a/drivers/net/hamradio/baycom_epp.c
+++ b/drivers/net/hamradio/baycom_epp.c
@@ -54,6 +54,7 @@
 #include <linux/kmod.h>
 #include <linux/hdlcdrv.h>
 #include <linux/baycom.h>
+#include <linux/jiffies.h>
 #if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE)
 /* prototypes for ax25_encapsulate and ax25_rebuild_header */
 #include <net/ax25.h> 
@@ -287,7 +288,7 @@ static inline void baycom_int_freq(struct baycom_state *bc)
         * measure the interrupt frequency
         */
        bc->debug_vals.cur_intcnt++;
-        if ((cur_jiffies - bc->debug_vals.last_jiffies) >= HZ) {
+        if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
                bc->debug_vals.last_jiffies = cur_jiffies;
                bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
                bc->debug_vals.cur_intcnt = 0;
diff --git a/drivers/net/hamradio/baycom_par.c b/drivers/net/hamradio/baycom_par.c
index 612ad452bee0..3b1bef1ee215 100644
--- a/drivers/net/hamradio/baycom_par.c
+++ b/drivers/net/hamradio/baycom_par.c
@@ -84,6 +84,7 @@
 #include <linux/baycom.h>
 #include <linux/parport.h>
 #include <linux/bitops.h>
+#include <linux/jiffies.h>
 #include <asm/bug.h>
 #include <asm/system.h>
@@ -165,7 +166,7 @@ static void __inline__ baycom_int_freq(struct baycom_state *bc)
         * measure the interrupt frequency
         */
        bc->debug_vals.cur_intcnt++;
-        if ((cur_jiffies - bc->debug_vals.last_jiffies) >= HZ) {
+        if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
                bc->debug_vals.last_jiffies = cur_jiffies;
                bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
                bc->debug_vals.cur_intcnt = 0;
diff --git a/drivers/net/hamradio/baycom_ser_fdx.c b/drivers/net/hamradio/baycom_ser_fdx.c
index 25f270b05378..232793d2ce6b 100644
--- a/drivers/net/hamradio/baycom_ser_fdx.c
+++ b/drivers/net/hamradio/baycom_ser_fdx.c
@@ -79,6 +79,7 @@
 #include <asm/io.h>
 #include <linux/hdlcdrv.h>
 #include <linux/baycom.h>
+#include <linux/jiffies.h>
 /* --------------------------------------------------------------------- */
@@ -159,7 +160,7 @@ static inline void baycom_int_freq(struct baycom_state *bc)
         * measure the interrupt frequency
         */
        bc->debug_vals.cur_intcnt++;
-        if ((cur_jiffies - bc->debug_vals.last_jiffies) >= HZ) {
+        if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
                bc->debug_vals.last_jiffies = cur_jiffies;
                bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
                bc->debug_vals.cur_intcnt = 0;
diff --git a/drivers/net/hamradio/baycom_ser_hdx.c b/drivers/net/hamradio/baycom_ser_hdx.c
index eead85d00962..be596a3eb3fd 100644
--- a/drivers/net/hamradio/baycom_ser_hdx.c
+++ b/drivers/net/hamradio/baycom_ser_hdx.c
@@ -69,6 +69,7 @@
 #include <asm/io.h>
 #include <linux/hdlcdrv.h>
 #include <linux/baycom.h>
+#include <linux/jiffies.h>
 /* --------------------------------------------------------------------- */
@@ -150,7 +151,7 @@ static inline void baycom_int_freq(struct baycom_state *bc)
         * measure the interrupt frequency
         */
        bc->debug_vals.cur_intcnt++;
-        if ((cur_jiffies - bc->debug_vals.last_jiffies) >= HZ) {
+        if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
                bc->debug_vals.last_jiffies = cur_jiffies;
                bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
                bc->debug_vals.cur_intcnt = 0;
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c
index 3035422f5ad8..e94952e799fe 100644
--- a/drivers/net/hamradio/mkiss.c
+++ b/drivers/net/hamradio/mkiss.c
@@ -46,6 +46,7 @@
 #include <linux/etherdevice.h>
 #include <linux/skbuff.h>
 #include <linux/if_arp.h>
+#include <linux/jiffies.h>
 #include <net/ax25.h>
@@ -429,7 +430,7 @@ static int ax_xmit(struct sk_buff *skb, struct net_device *dev)
                 * May be we must check transmitter timeout here ?
                 *      14 Oct 1994 Dmitry Gorodchanin.
                 */
-                if (jiffies - dev->trans_start  < 20 * HZ) {
+                if (time_before(jiffies, dev->trans_start + 20 * HZ)) {
                        /* 20 sec timeout not reached */
                        return 1;
                }
diff --git a/drivers/net/ixgb/ixgb.h b/drivers/net/ixgb/ixgb.h
index f8d3385c7842..c83271b38621 100644
--- a/drivers/net/ixgb/ixgb.h
+++ b/drivers/net/ixgb/ixgb.h
@@ -119,7 +119,7 @@ struct ixgb_adapter;
 * so a DMA handle can be stored along with the buffer */
 struct ixgb_buffer {
        struct sk_buff *skb;
-        uint64_t dma;
+        dma_addr_t dma;
        unsigned long time_stamp;
        uint16_t length;
        uint16_t next_to_watch;
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c
index 3aae110c5560..661a46b95a61 100644
--- a/drivers/net/ixgb/ixgb_ee.c
+++ b/drivers/net/ixgb/ixgb_ee.c
@@ -565,24 +565,6 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
        }
 }
-/******************************************************************************
- * return the compatibility flags from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          compatibility flags if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_compatibility(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->compatibility));
-        return(0);
-}
 /******************************************************************************
 * return the Printed Board Assembly number from EEPROM
@@ -602,81 +584,6 @@ ixgb_get_ee_pba_number(struct ixgb_hw *hw)
        return(0);
 }
-/******************************************************************************
- * return the Initialization Control Word 1 from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          Initialization Control Word 1 if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->init_ctrl_reg_1));
-        return(0);
-}
-/******************************************************************************
- * return the Initialization Control Word 2 from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          Initialization Control Word 2 if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->init_ctrl_reg_2));
-        return(0);
-}
-/******************************************************************************
- * return the Subsystem Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          Subsystem Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_subsystem_id(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->subsystem_id));
-        return(0);
-}
-/******************************************************************************
- * return the Sub Vendor Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          Sub Vendor Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_subvendor_id(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->subvendor_id));
-        return(0);
-}
 /******************************************************************************
 * return the Device Id from EEPROM
@@ -694,81 +601,6 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw)
        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
                return (le16_to_cpu(ee_map->device_id));
-        return(0);
+        return (0);
-}
-/******************************************************************************
- * return the Vendor Id from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          Device Id if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_vendor_id(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->vendor_id));
-        return(0);
-}
-/******************************************************************************
- * return the Software Defined Pins Register from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          SDP Register if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint16_t
-ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->swdpins_reg));
-        return(0);
 }
-/******************************************************************************
- * return the D3 Power Management Bits from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          D3 Power Management Bits if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint8_t
-ixgb_get_ee_d3_power(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->d3_power));
-        return(0);
-}
-/******************************************************************************
- * return the D0 Power Management Bits from EEPROM
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Returns:
- *          D0 Power Management Bits if EEPROM contents are valid, 0 otherwise
- ******************************************************************************/
-uint8_t
-ixgb_get_ee_d0_power(struct ixgb_hw *hw)
-{
-        struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
-        if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
-                return (le16_to_cpu(ee_map->d0_power));
-        return(0);
-}
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c
index 3fa113854eeb..9d026ed77ddd 100644
--- a/drivers/net/ixgb/ixgb_ethtool.c
+++ b/drivers/net/ixgb/ixgb_ethtool.c
@@ -98,10 +98,10 @@ static struct ixgb_stats ixgb_gstrings_stats[] = {
 static int
 ixgb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
-        ecmd->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
+        ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
        ecmd->port = PORT_FIBRE;
        ecmd->transceiver = XCVR_EXTERNAL;
@@ -120,7 +120,7 @@ ixgb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 static int
 ixgb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        if(ecmd->autoneg == AUTONEG_ENABLE ||
           ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL)
@@ -130,6 +130,12 @@ ixgb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
                ixgb_down(adapter, TRUE);
                ixgb_reset(adapter);
                ixgb_up(adapter);
+                /* be optimistic about our link, since we were up before */
+                adapter->link_speed = 10000;
+                adapter->link_duplex = FULL_DUPLEX;
+                netif_carrier_on(netdev);
+                netif_wake_queue(netdev);
+                
        } else
                ixgb_reset(adapter);
@@ -140,7 +146,7 @@ static void
 ixgb_get_pauseparam(struct net_device *netdev,
                         struct ethtool_pauseparam *pause)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        
        pause->autoneg = AUTONEG_DISABLE;
@@ -159,7 +165,7 @@ static int
 ixgb_set_pauseparam(struct net_device *netdev,
                         struct ethtool_pauseparam *pause)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        
        if(pause->autoneg == AUTONEG_ENABLE)
@@ -177,6 +183,11 @@ ixgb_set_pauseparam(struct net_device *netdev,
        if(netif_running(adapter->netdev)) {
                ixgb_down(adapter, TRUE);
                ixgb_up(adapter);
+                /* be optimistic about our link, since we were up before */
+                adapter->link_speed = 10000;
+                adapter->link_duplex = FULL_DUPLEX;
+                netif_carrier_on(netdev);
+                netif_wake_queue(netdev);
        } else
                ixgb_reset(adapter);
                
@@ -186,19 +197,26 @@ ixgb_set_pauseparam(struct net_device *netdev,
 static uint32_t
 ixgb_get_rx_csum(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        return adapter->rx_csum;
 }
 static int
 ixgb_set_rx_csum(struct net_device *netdev, uint32_t data)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        adapter->rx_csum = data;
        if(netif_running(netdev)) {
                ixgb_down(adapter,TRUE);
                ixgb_up(adapter);
+                /* be optimistic about our link, since we were up before */
+                adapter->link_speed = 10000;
+                adapter->link_duplex = FULL_DUPLEX;
+                netif_carrier_on(netdev);
+                netif_wake_queue(netdev);
        } else
                ixgb_reset(adapter);
        return 0;
@@ -246,14 +264,15 @@ static void
 ixgb_get_regs(struct net_device *netdev,
                   struct ethtool_regs *regs, void *p)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        uint32_t *reg = p;
        uint32_t *reg_start = reg;
        uint8_t i;
        /* the 1 (one) below indicates an attempt at versioning, if the
-         * interface in ethtool or the driver this 1 should be incremented */
+         * interface in ethtool or the driver changes, this 1 should be
+         * incremented */
        regs->version = (1<<24) | hw->revision_id << 16 | hw->device_id;
        /* General Registers */
@@ -283,7 +302,8 @@ ixgb_get_regs(struct net_device *netdev,
        *reg++ = IXGB_READ_REG(hw, RAIDC);      /*  19 */
        *reg++ = IXGB_READ_REG(hw, RXCSUM);     /*  20 */
-        for (i = 0; i < IXGB_RAR_ENTRIES; i++) {
+        /* there are 16 RAR entries in hardware, we only use 3 */
+        for(i = 0; i < 16; i++) {
                *reg++ = IXGB_READ_REG_ARRAY(hw, RAL, (i << 1)); /*21,...,51 */
                *reg++ = IXGB_READ_REG_ARRAY(hw, RAH, (i << 1)); /*22,...,52 */
        }
@@ -391,7 +411,7 @@ static int
 ixgb_get_eeprom(struct net_device *netdev,
                  struct ethtool_eeprom *eeprom, uint8_t *bytes)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        uint16_t *eeprom_buff;
        int i, max_len, first_word, last_word;
@@ -439,7 +459,7 @@ static int
 ixgb_set_eeprom(struct net_device *netdev,
                  struct ethtool_eeprom *eeprom, uint8_t *bytes)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        uint16_t *eeprom_buff;
        void *ptr;
@@ -497,7 +517,7 @@ static void
 ixgb_get_drvinfo(struct net_device *netdev,
                   struct ethtool_drvinfo *drvinfo)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        strncpy(drvinfo->driver,  ixgb_driver_name, 32);
        strncpy(drvinfo->version, ixgb_driver_version, 32);
@@ -512,7 +532,7 @@ static void
 ixgb_get_ringparam(struct net_device *netdev,
                struct ethtool_ringparam *ring)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_desc_ring *txdr = &adapter->tx_ring;
        struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
@@ -530,7 +550,7 @@ static int
 ixgb_set_ringparam(struct net_device *netdev,
                struct ethtool_ringparam *ring)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_desc_ring *txdr = &adapter->tx_ring;
        struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
        struct ixgb_desc_ring tx_old, tx_new, rx_old, rx_new;
@@ -573,6 +593,11 @@ ixgb_set_ringparam(struct net_device *netdev,
                adapter->tx_ring = tx_new;
                if((err = ixgb_up(adapter)))
                        return err;
+                /* be optimistic about our link, since we were up before */
+                adapter->link_speed = 10000;
+                adapter->link_duplex = FULL_DUPLEX;
+                netif_carrier_on(netdev);
+                netif_wake_queue(netdev);
        }
        return 0;
@@ -607,7 +632,7 @@ ixgb_led_blink_callback(unsigned long data)
 static int
 ixgb_phys_id(struct net_device *netdev, uint32_t data)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
                data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
@@ -643,7 +668,7 @@ static void
 ixgb_get_ethtool_stats(struct net_device *netdev, 
                struct ethtool_stats *stats, uint64_t *data)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        int i;
        ixgb_update_stats(adapter);
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h
index 97898efe7cc8..8bcf31ed10c2 100644
--- a/drivers/net/ixgb/ixgb_hw.h
+++ b/drivers/net/ixgb/ixgb_hw.h
@@ -822,17 +822,8 @@ extern void ixgb_clear_vfta(struct ixgb_hw *hw);
 /* Access functions to eeprom data */
 void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr);
-uint16_t ixgb_get_ee_compatibility(struct ixgb_hw *hw);
 uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_subsystem_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_subvendor_id(struct ixgb_hw *hw);
 uint16_t ixgb_get_ee_device_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_vendor_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw);
-uint8_t ixgb_get_ee_d3_power(struct ixgb_hw *hw);
-uint8_t ixgb_get_ee_d0_power(struct ixgb_hw *hw);
 boolean_t ixgb_get_eeprom_data(struct ixgb_hw *hw);
 uint16_t ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index);
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index 097b90ccf575..5c555373adbe 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -29,6 +29,11 @@
 #include "ixgb.h"
 /* Change Log
+ * 1.0.96 04/19/05
+ * - Make needlessly global code static -- bunk@stusta.de
+ * - ethtool cleanup -- shemminger@osdl.org
+ * - Support for MODULE_VERSION -- linville@tuxdriver.com
+ * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
 * 1.0.88 01/05/05
 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
@@ -47,10 +52,9 @@ char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
 #else
 #define DRIVERNAPI "-NAPI"
 #endif
+#define DRV_VERSION             "1.0.100-k2"DRIVERNAPI
-#define DRV_VERSION "1.0.95-k2"DRIVERNAPI
 char ixgb_driver_version[] = DRV_VERSION;
-char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
+static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
 /* ixgb_pci_tbl - PCI Device ID Table
 *
@@ -145,10 +149,12 @@ MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_VERSION);
 /* some defines for controlling descriptor fetches in h/w */
-#define RXDCTL_PTHRESH_DEFAULT 128      /* chip considers prefech below this */
-#define RXDCTL_HTHRESH_DEFAULT 16       /* chip will only prefetch if tail is 
-                                           pushed this many descriptors from head */
 #define RXDCTL_WTHRESH_DEFAULT 16       /* chip writes back at this many or RXT0 */
+#define RXDCTL_PTHRESH_DEFAULT 0                /* chip considers prefech below
+                                                 * this */
+#define RXDCTL_HTHRESH_DEFAULT 0                /* chip will only prefetch if tail
+                                                 * is pushed this many descriptors
+                                                 * from head */
 /**
 * ixgb_init_module - Driver Registration Routine
@@ -376,7 +382,7 @@ ixgb_probe(struct pci_dev *pdev,
        SET_NETDEV_DEV(netdev, &pdev->dev);
        pci_set_drvdata(pdev, netdev);
-        adapter = netdev->priv;
+        adapter = netdev_priv(netdev);
        adapter->netdev = netdev;
        adapter->pdev = pdev;
        adapter->hw.back = adapter;
@@ -512,7 +518,7 @@ static void __devexit
 ixgb_remove(struct pci_dev *pdev)
 {
        struct net_device *netdev = pci_get_drvdata(pdev);
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        unregister_netdev(netdev);
@@ -583,7 +589,7 @@ ixgb_sw_init(struct ixgb_adapter *adapter)
 static int
 ixgb_open(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        int err;
        /* allocate transmit descriptors */
@@ -626,7 +632,7 @@ err_setup_tx:
 static int
 ixgb_close(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        ixgb_down(adapter, TRUE);
@@ -1017,7 +1023,7 @@ ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
 static int
 ixgb_set_mac(struct net_device *netdev, void *p)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct sockaddr *addr = p;
        if(!is_valid_ether_addr(addr->sa_data))
@@ -1043,7 +1049,7 @@ ixgb_set_mac(struct net_device *netdev, void *p)
 static void
 ixgb_set_multi(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        struct dev_mc_list *mc_ptr;
        uint32_t rctl;
@@ -1371,7 +1377,7 @@ ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
 static int
 ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        unsigned int first;
        unsigned int tx_flags = 0;
        unsigned long flags;
@@ -1425,7 +1431,7 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
 static void
 ixgb_tx_timeout(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        /* Do the reset outside of interrupt context */
        schedule_work(&adapter->tx_timeout_task);
@@ -1434,7 +1440,7 @@ ixgb_tx_timeout(struct net_device *netdev)
 static void
 ixgb_tx_timeout_task(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        ixgb_down(adapter, TRUE);
        ixgb_up(adapter);
@@ -1451,7 +1457,7 @@ ixgb_tx_timeout_task(struct net_device *netdev)
 static struct net_device_stats *
 ixgb_get_stats(struct net_device *netdev)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        return &adapter->net_stats;
 }
@@ -1467,7 +1473,7 @@ ixgb_get_stats(struct net_device *netdev)
 static int
 ixgb_change_mtu(struct net_device *netdev, int new_mtu)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
        int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
@@ -1522,7 +1528,8 @@ ixgb_update_stats(struct ixgb_adapter *adapter)
                multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
                /* fix up multicast stats by removing broadcasts */
-                multi -= bcast;
+                if(multi >= bcast)
+                        multi -= bcast;
                
                adapter->stats.mprcl += (multi & 0xFFFFFFFF);
                adapter->stats.mprch += (multi >> 32);
@@ -1641,7 +1648,7 @@ static irqreturn_t
 ixgb_intr(int irq, void *data, struct pt_regs *regs)
 {
        struct net_device *netdev = data;
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        struct ixgb_hw *hw = &adapter->hw;
        uint32_t icr = IXGB_READ_REG(hw, ICR);
 #ifndef CONFIG_IXGB_NAPI
@@ -1688,7 +1695,7 @@ ixgb_intr(int irq, void *data, struct pt_regs *regs)
 static int
 ixgb_clean(struct net_device *netdev, int *budget)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        int work_to_do = min(*budget, netdev->quota);
        int tx_cleaned;
        int work_done = 0;
@@ -2017,7 +2024,7 @@ ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
 static void
 ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        uint32_t ctrl, rctl;
        ixgb_irq_disable(adapter);
@@ -2055,7 +2062,7 @@ ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
 static void
 ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        uint32_t vfta, index;
        /* add VID to filter table */
@@ -2069,7 +2076,7 @@ ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
 static void
 ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
 {
-        struct ixgb_adapter *adapter = netdev->priv;
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
        uint32_t vfta, index;
        ixgb_irq_disable(adapter);
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 1f61f0cc95d8..690a1aae0b34 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -68,6 +68,7 @@ static DEFINE_PER_CPU(struct net_device_stats, loopback_stats);
 * of largesending device modulo TCP checksum, which is ignored for loopback.
 */
+#ifdef LOOPBACK_TSO
 static void emulate_large_send_offload(struct sk_buff *skb)
 {
        struct iphdr *iph = skb->nh.iph;
@@ -119,6 +120,7 @@ static void emulate_large_send_offload(struct sk_buff *skb)
        dev_kfree_skb(skb);
 }
+#endif /* LOOPBACK_TSO */
 /*
 * The higher levels take care of making this non-reentrant (it's
@@ -130,12 +132,13 @@ static int loopback_xmit(struct sk_buff *skb, struct net_device *dev)
        skb_orphan(skb);
-        skb->protocol=eth_type_trans(skb,dev);
+        skb->protocol = eth_type_trans(skb,dev);
-        skb->dev=dev;
+        skb->dev = dev;
 #ifndef LOOPBACK_MUST_CHECKSUM
        skb->ip_summed = CHECKSUM_UNNECESSARY;
 #endif
+#ifdef LOOPBACK_TSO
        if (skb_shinfo(skb)->tso_size) {
                BUG_ON(skb->protocol != htons(ETH_P_IP));
                BUG_ON(skb->nh.iph->protocol != IPPROTO_TCP);
@@ -143,14 +146,14 @@ static int loopback_xmit(struct sk_buff *skb, struct net_device *dev)
                emulate_large_send_offload(skb);
                return 0;
        }
+#endif
        dev->last_rx = jiffies;
        lb_stats = &per_cpu(loopback_stats, get_cpu());
        lb_stats->rx_bytes += skb->len;
-        lb_stats->tx_bytes += skb->len;
+        lb_stats->tx_bytes = lb_stats->rx_bytes;
        lb_stats->rx_packets++;
-        lb_stats->tx_packets++;
+        lb_stats->tx_packets = lb_stats->rx_packets;
        put_cpu();
        netif_rx(skb);
@@ -208,9 +211,12 @@ struct net_device loopback_dev = {
        .type                   = ARPHRD_LOOPBACK,      /* 0x0001*/
        .rebuild_header         = eth_rebuild_header,
        .flags                  = IFF_LOOPBACK,
-        .features               = NETIF_F_SG|NETIF_F_FRAGLIST
+        .features               = NETIF_F_SG | NETIF_F_FRAGLIST
-                                  |NETIF_F_NO_CSUM|NETIF_F_HIGHDMA
+#ifdef LOOPBACK_TSO
-                                  |NETIF_F_LLTX,
+                                  | NETIF_F_TSO
+#endif
+                                  | NETIF_F_NO_CSUM | NETIF_F_HIGHDMA
+                                  | NETIF_F_LLTX,
        .ethtool_ops            = &loopback_ethtool_ops,
 };
diff --git a/drivers/net/pci-skeleton.c b/drivers/net/pci-skeleton.c
index 4a391ea0f58a..a1ac4bd1696e 100644
--- a/drivers/net/pci-skeleton.c
+++ b/drivers/net/pci-skeleton.c
@@ -486,9 +486,9 @@ struct netdrv_private {
 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
 MODULE_DESCRIPTION ("Skeleton for a PCI Fast Ethernet driver");
 MODULE_LICENSE("GPL");
-MODULE_PARM (multicast_filter_limit, "i");
+module_param(multicast_filter_limit, int, 0);
-MODULE_PARM (max_interrupt_work, "i");
+module_param(max_interrupt_work, int, 0);
-MODULE_PARM (media, "1-" __MODULE_STRING(8) "i");
+module_param_array(media, int, NULL, 0);
 MODULE_PARM_DESC (multicast_filter_limit, "pci-skeleton maximum number of filtered multicast addresses");
 MODULE_PARM_DESC (max_interrupt_work, "pci-skeleton maximum events handled per interrupt");
 MODULE_PARM_DESC (media, "pci-skeleton: Bits 0-3: media type, bit 17: full duplex");
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
new file mode 100644
index 000000000000..6450bd71deb4
--- /dev/null
+++ b/drivers/net/phy/Kconfig
@@ -0,0 +1,49 @@
+#
+# PHY Layer Configuration
+#
+menu "PHY device support"
+config PHYLIB
+        tristate "PHY Device support and infrastructure"
+        depends on NET_ETHERNET
+        help
+          Ethernet controllers are usually attached to PHY
+          devices.  This option provides infrastructure for
+          managing PHY devices.
+comment "MII PHY device drivers"
+        depends on PHYLIB
+config MARVELL_PHY
+        tristate "Drivers for Marvell PHYs"
+        depends on PHYLIB
+        ---help---
+          Currently has a driver for the 88E1011S
+        
+config DAVICOM_PHY
+        tristate "Drivers for Davicom PHYs"
+        depends on PHYLIB
+        ---help---
+          Currently supports dm9161e and dm9131
+config QSEMI_PHY
+        tristate "Drivers for Quality Semiconductor PHYs"
+        depends on PHYLIB
+        ---help---
+          Currently supports the qs6612
+config LXT_PHY
+        tristate "Drivers for the Intel LXT PHYs"
+        depends on PHYLIB
+        ---help---
+          Currently supports the lxt970, lxt971
+config CICADA_PHY
+        tristate "Drivers for the Cicada PHYs"
+        depends on PHYLIB
+        ---help---
+          Currently supports the cis8204
+endmenu
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
new file mode 100644
index 000000000000..fb7cb385a659
--- /dev/null
+++ b/drivers/net/phy/Makefile
@@ -0,0 +1,9 @@
+# Makefile for Linux PHY drivers
+libphy-objs                     := phy.o phy_device.o mdio_bus.o
+obj-$(CONFIG_MARVELL_PHY)       += libphy.o marvell.o
+obj-$(CONFIG_DAVICOM_PHY)       += libphy.o davicom.o
+obj-$(CONFIG_CICADA_PHY)        += libphy.o cicada.o
+obj-$(CONFIG_LXT_PHY)           += libphy.o lxt.o
+obj-$(CONFIG_QSEMI_PHY)         += libphy.o qsemi.o
diff --git a/drivers/net/phy/cicada.c b/drivers/net/phy/cicada.c
new file mode 100644
index 000000000000..c47fb2ecd147
--- /dev/null
+++ b/drivers/net/phy/cicada.c
@@ -0,0 +1,134 @@
+/*
+ * drivers/net/phy/cicada.c
+ *
+ * Driver for Cicada PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+/* Cicada Extended Control Register 1 */
+#define MII_CIS8201_EXT_CON1           0x17
+#define MII_CIS8201_EXTCON1_INIT       0x0000
+/* Cicada Interrupt Mask Register */
+#define MII_CIS8201_IMASK               0x19
+#define MII_CIS8201_IMASK_IEN           0x8000
+#define MII_CIS8201_IMASK_SPEED 0x4000
+#define MII_CIS8201_IMASK_LINK          0x2000
+#define MII_CIS8201_IMASK_DUPLEX        0x1000
+#define MII_CIS8201_IMASK_MASK          0xf000
+/* Cicada Interrupt Status Register */
+#define MII_CIS8201_ISTAT               0x1a
+#define MII_CIS8201_ISTAT_STATUS        0x8000
+#define MII_CIS8201_ISTAT_SPEED 0x4000
+#define MII_CIS8201_ISTAT_LINK          0x2000
+#define MII_CIS8201_ISTAT_DUPLEX        0x1000
+/* Cicada Auxiliary Control/Status Register */
+#define MII_CIS8201_AUX_CONSTAT        0x1c
+#define MII_CIS8201_AUXCONSTAT_INIT    0x0004
+#define MII_CIS8201_AUXCONSTAT_DUPLEX  0x0020
+#define MII_CIS8201_AUXCONSTAT_SPEED   0x0018
+#define MII_CIS8201_AUXCONSTAT_GBIT    0x0010
+#define MII_CIS8201_AUXCONSTAT_100     0x0008
+MODULE_DESCRIPTION("Cicadia PHY driver");
+MODULE_AUTHOR("Andy Fleming");
+MODULE_LICENSE("GPL");
+static int cis820x_config_init(struct phy_device *phydev)
+{
+        int err;
+        err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT,
+                        MII_CIS8201_AUXCONSTAT_INIT);
+        if (err < 0)
+                return err;
+        err = phy_write(phydev, MII_CIS8201_EXT_CON1,
+                        MII_CIS8201_EXTCON1_INIT);
+        return err;
+}
+static int cis820x_ack_interrupt(struct phy_device *phydev)
+{
+        int err = phy_read(phydev, MII_CIS8201_ISTAT);
+        return (err < 0) ? err : 0;
+}
+static int cis820x_config_intr(struct phy_device *phydev)
+{
+        int err;
+        if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
+                err = phy_write(phydev, MII_CIS8201_IMASK, 
+                                MII_CIS8201_IMASK_MASK);
+        else
+                err = phy_write(phydev, MII_CIS8201_IMASK, 0);
+        return err;
+}
+/* Cicada 820x */
+static struct phy_driver cis8204_driver = {
+        .phy_id         = 0x000fc440,
+        .name           = "Cicada Cis8204",
+        .phy_id_mask    = 0x000fffc0,
+        .features       = PHY_GBIT_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_init    = &cis820x_config_init,
+        .config_aneg    = &genphy_config_aneg,
+        .read_status    = &genphy_read_status,
+        .ack_interrupt  = &cis820x_ack_interrupt,
+        .config_intr    = &cis820x_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static int __init cis8204_init(void)
+{
+        return phy_driver_register(&cis8204_driver);
+}
+static void __exit cis8204_exit(void)
+{
+        phy_driver_unregister(&cis8204_driver);
+}
+module_init(cis8204_init);
+module_exit(cis8204_exit);
diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c
new file mode 100644
index 000000000000..6caf499fae32
--- /dev/null
+++ b/drivers/net/phy/davicom.c
@@ -0,0 +1,195 @@
+/*
+ * drivers/net/phy/davicom.c
+ *
+ * Driver for Davicom PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#define MII_DM9161_SCR          0x10
+#define MII_DM9161_SCR_INIT     0x0610
+/* DM9161 Interrupt Register */
+#define MII_DM9161_INTR 0x15
+#define MII_DM9161_INTR_PEND            0x8000
+#define MII_DM9161_INTR_DPLX_MASK       0x0800
+#define MII_DM9161_INTR_SPD_MASK        0x0400
+#define MII_DM9161_INTR_LINK_MASK       0x0200
+#define MII_DM9161_INTR_MASK            0x0100
+#define MII_DM9161_INTR_DPLX_CHANGE     0x0010
+#define MII_DM9161_INTR_SPD_CHANGE      0x0008
+#define MII_DM9161_INTR_LINK_CHANGE     0x0004
+#define MII_DM9161_INTR_INIT            0x0000
+#define MII_DM9161_INTR_STOP    \
+(MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \
+ | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK)
+/* DM9161 10BT Configuration/Status */
+#define MII_DM9161_10BTCSR      0x12
+#define MII_DM9161_10BTCSR_INIT 0x7800
+MODULE_DESCRIPTION("Davicom PHY driver");
+MODULE_AUTHOR("Andy Fleming");
+MODULE_LICENSE("GPL");
+#define DM9161_DELAY 1
+static int dm9161_config_intr(struct phy_device *phydev)
+{
+        int temp;
+        temp = phy_read(phydev, MII_DM9161_INTR);
+        if (temp < 0)
+                return temp;
+        if(PHY_INTERRUPT_ENABLED == phydev->interrupts )
+                temp &= ~(MII_DM9161_INTR_STOP);
+        else
+                temp |= MII_DM9161_INTR_STOP;
+        temp = phy_write(phydev, MII_DM9161_INTR, temp);
+        return temp;
+}
+static int dm9161_config_aneg(struct phy_device *phydev)
+{
+        int err;
+        /* Isolate the PHY */
+        err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
+        if (err < 0)
+                return err;
+        /* Configure the new settings */
+        err = genphy_config_aneg(phydev);
+        if (err < 0)
+                return err;
+        return 0;
+}
+static int dm9161_config_init(struct phy_device *phydev)
+{
+        int err;
+        /* Isolate the PHY */
+        err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
+        if (err < 0)
+                return err;
+        /* Do not bypass the scrambler/descrambler */
+        err = phy_write(phydev, MII_DM9161_SCR, MII_DM9161_SCR_INIT);
+        if (err < 0)
+                return err;
+        /* Clear 10BTCSR to default */
+        err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);
+        if (err < 0)
+                return err;
+        /* Reconnect the PHY, and enable Autonegotiation */
+        err = phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
+        if (err < 0)
+                return err;
+        return 0;
+}
+static int dm9161_ack_interrupt(struct phy_device *phydev)
+{
+        int err = phy_read(phydev, MII_DM9161_INTR);
+        return (err < 0) ? err : 0;
+}
+static struct phy_driver dm9161_driver = {
+        .phy_id         = 0x0181b880,
+        .name           = "Davicom DM9161E",
+        .phy_id_mask    = 0x0ffffff0,
+        .features       = PHY_BASIC_FEATURES,
+        .config_init    = dm9161_config_init,
+        .config_aneg    = dm9161_config_aneg,
+        .read_status    = genphy_read_status,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static struct phy_driver dm9131_driver = {
+        .phy_id         = 0x00181b80,
+        .name           = "Davicom DM9131",
+        .phy_id_mask    = 0x0ffffff0,
+        .features       = PHY_BASIC_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_aneg    = genphy_config_aneg,
+        .read_status    = genphy_read_status,
+        .ack_interrupt  = dm9161_ack_interrupt,
+        .config_intr    = dm9161_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static int __init davicom_init(void)
+{
+        int ret;
+        ret = phy_driver_register(&dm9161_driver);
+        if (ret)
+                goto err1;
+        ret = phy_driver_register(&dm9131_driver);
+        if (ret)
+                goto err2;
+        return 0;
+ err2:  
+        phy_driver_unregister(&dm9161_driver);
+ err1:
+        return ret;
+}
+static void __exit davicom_exit(void)
+{
+        phy_driver_unregister(&dm9161_driver);
+        phy_driver_unregister(&dm9131_driver);
+}
+module_init(davicom_init);
+module_exit(davicom_exit);
diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c
new file mode 100644
index 000000000000..4c840448ec86
--- /dev/null
+++ b/drivers/net/phy/lxt.c
@@ -0,0 +1,179 @@
+/*
+ * drivers/net/phy/lxt.c
+ *
+ * Driver for Intel LXT PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+/* The Level one LXT970 is used by many boards                               */
+#define MII_LXT970_IER       17  /* Interrupt Enable Register */
+#define MII_LXT970_IER_IEN      0x0002
+#define MII_LXT970_ISR       18  /* Interrupt Status Register */
+#define MII_LXT970_CONFIG    19  /* Configuration Register    */
+/* ------------------------------------------------------------------------- */
+/* The Level one LXT971 is used on some of my custom boards                  */
+/* register definitions for the 971 */
+#define MII_LXT971_IER          18  /* Interrupt Enable Register */
+#define MII_LXT971_IER_IEN      0x00f2
+#define MII_LXT971_ISR          19  /* Interrupt Status Register */
+MODULE_DESCRIPTION("Intel LXT PHY driver");
+MODULE_AUTHOR("Andy Fleming");
+MODULE_LICENSE("GPL");
+static int lxt970_ack_interrupt(struct phy_device *phydev)
+{
+        int err;
+        err = phy_read(phydev, MII_BMSR);
+        if (err < 0)
+                return err;
+        err = phy_read(phydev, MII_LXT970_ISR);
+        if (err < 0)
+                return err;
+        return 0;
+}
+static int lxt970_config_intr(struct phy_device *phydev)
+{
+        int err;
+        if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
+                err = phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
+        else
+                err = phy_write(phydev, MII_LXT970_IER, 0);
+        return err;
+}
+static int lxt970_config_init(struct phy_device *phydev)
+{
+        int err;
+        err = phy_write(phydev, MII_LXT970_CONFIG, 0);
+        return err;
+}
+static int lxt971_ack_interrupt(struct phy_device *phydev)
+{
+        int err = phy_read(phydev, MII_LXT971_ISR);
+        if (err < 0)
+                return err;
+        return 0;
+}
+static int lxt971_config_intr(struct phy_device *phydev)
+{
+        int err;
+        if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
+                err = phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
+        else
+                err = phy_write(phydev, MII_LXT971_IER, 0);
+        return err;
+}
+static struct phy_driver lxt970_driver = {
+        .phy_id         = 0x07810000,
+        .name           = "LXT970",
+        .phy_id_mask    = 0x0fffffff,
+        .features       = PHY_BASIC_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_init    = lxt970_config_init,
+        .config_aneg    = genphy_config_aneg,
+        .read_status    = genphy_read_status,
+        .ack_interrupt  = lxt970_ack_interrupt,
+        .config_intr    = lxt970_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static struct phy_driver lxt971_driver = {
+        .phy_id         = 0x0001378e,
+        .name           = "LXT971",
+        .phy_id_mask    = 0x0fffffff,
+        .features       = PHY_BASIC_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_aneg    = genphy_config_aneg,
+        .read_status    = genphy_read_status,
+        .ack_interrupt  = lxt971_ack_interrupt,
+        .config_intr    = lxt971_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static int __init lxt_init(void)
+{
+        int ret;
+        ret = phy_driver_register(&lxt970_driver);
+        if (ret)
+                goto err1;
+        ret = phy_driver_register(&lxt971_driver);
+        if (ret)
+                goto err2;
+        return 0;
+ err2:  
+        phy_driver_unregister(&lxt970_driver);
+ err1:
+        return ret;
+}
+static void __exit lxt_exit(void)
+{
+        phy_driver_unregister(&lxt970_driver);
+        phy_driver_unregister(&lxt971_driver);
+}
+module_init(lxt_init);
+module_exit(lxt_exit);
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
new file mode 100644
index 000000000000..4a72b025006b
--- /dev/null
+++ b/drivers/net/phy/marvell.c
@@ -0,0 +1,140 @@
+/*
+ * drivers/net/phy/marvell.c
+ *
+ * Driver for Marvell PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#define MII_M1011_IEVENT                0x13
+#define MII_M1011_IEVENT_CLEAR          0x0000
+#define MII_M1011_IMASK                 0x12
+#define MII_M1011_IMASK_INIT            0x6400
+#define MII_M1011_IMASK_CLEAR           0x0000
+MODULE_DESCRIPTION("Marvell PHY driver");
+MODULE_AUTHOR("Andy Fleming");
+MODULE_LICENSE("GPL");
+static int marvell_ack_interrupt(struct phy_device *phydev)
+{
+        int err;
+        /* Clear the interrupts by reading the reg */
+        err = phy_read(phydev, MII_M1011_IEVENT);
+        if (err < 0)
+                return err;
+        return 0;
+}
+static int marvell_config_intr(struct phy_device *phydev)
+{
+        int err;
+        if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
+                err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
+        else
+                err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
+        return err;
+}
+static int marvell_config_aneg(struct phy_device *phydev)
+{
+        int err;
+        /* The Marvell PHY has an errata which requires
+         * that certain registers get written in order
+         * to restart autonegotiation */
+        err = phy_write(phydev, MII_BMCR, BMCR_RESET);
+        if (err < 0)
+                return err;
+        err = phy_write(phydev, 0x1d, 0x1f);
+        if (err < 0)
+                return err;
+        err = phy_write(phydev, 0x1e, 0x200c);
+        if (err < 0)
+                return err;
+        err = phy_write(phydev, 0x1d, 0x5);
+        if (err < 0)
+                return err;
+        err = phy_write(phydev, 0x1e, 0);
+        if (err < 0)
+                return err;
+        err = phy_write(phydev, 0x1e, 0x100);
+        if (err < 0)
+                return err;
+        err = genphy_config_aneg(phydev);
+        return err;
+}
+static struct phy_driver m88e1101_driver = {
+        .phy_id         = 0x01410c00,
+        .phy_id_mask    = 0xffffff00,
+        .name           = "Marvell 88E1101",
+        .features       = PHY_GBIT_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_aneg    = &marvell_config_aneg,
+        .read_status    = &genphy_read_status,
+        .ack_interrupt  = &marvell_ack_interrupt,
+        .config_intr    = &marvell_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static int __init marvell_init(void)
+{
+        return phy_driver_register(&m88e1101_driver);
+}
+static void __exit marvell_exit(void)
+{
+        phy_driver_unregister(&m88e1101_driver);
+}
+module_init(marvell_init);
+module_exit(marvell_exit);
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
new file mode 100644
index 000000000000..d5a05be28818
--- /dev/null
+++ b/drivers/net/phy/mdio_bus.c
@@ -0,0 +1,99 @@
+/*
+ * drivers/net/phy/mdio_bus.c
+ *
+ * MDIO Bus interface
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+/* mdio_bus_match
+ *
+ * description: Given a PHY device, and a PHY driver, return 1 if
+ *   the driver supports the device.  Otherwise, return 0
+ */
+static int mdio_bus_match(struct device *dev, struct device_driver *drv)
+{
+        struct phy_device *phydev = to_phy_device(dev);
+        struct phy_driver *phydrv = to_phy_driver(drv);
+        return (phydrv->phy_id == (phydev->phy_id & phydrv->phy_id_mask));
+}
+/* Suspend and resume.  Copied from platform_suspend and
+ * platform_resume
+ */
+static int mdio_bus_suspend(struct device * dev, u32 state)
+{
+        int ret = 0;
+        struct device_driver *drv = dev->driver;
+        if (drv && drv->suspend) {
+                ret = drv->suspend(dev, state, SUSPEND_DISABLE);
+                if (ret == 0)
+                        ret = drv->suspend(dev, state, SUSPEND_SAVE_STATE);
+                if (ret == 0)
+                        ret = drv->suspend(dev, state, SUSPEND_POWER_DOWN);
+        }
+        return ret;
+}
+static int mdio_bus_resume(struct device * dev)
+{
+        int ret = 0;
+        struct device_driver *drv = dev->driver;
+        if (drv && drv->resume) {
+                ret = drv->resume(dev, RESUME_POWER_ON);
+                if (ret == 0)
+                        ret = drv->resume(dev, RESUME_RESTORE_STATE);
+                if (ret == 0)
+                        ret = drv->resume(dev, RESUME_ENABLE);
+        }
+        return ret;
+}
+struct bus_type mdio_bus_type = {
+        .name           = "mdio_bus",
+        .match          = mdio_bus_match,
+        .suspend        = mdio_bus_suspend,
+        .resume         = mdio_bus_resume,
+};
+int __init mdio_bus_init(void)
+{
+        return bus_register(&mdio_bus_type);
+}
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
new file mode 100644
index 000000000000..d3e43631b89b
--- /dev/null
+++ b/drivers/net/phy/phy.c
@@ -0,0 +1,690 @@
+/*
+ * drivers/net/phy/phy.c
+ *
+ * Framework for configuring and reading PHY devices
+ * Based on code in sungem_phy.c and gianfar_phy.c
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+static void phy_timer(unsigned long data);
+static int phy_disable_interrupts(struct phy_device *phydev);
+static void phy_sanitize_settings(struct phy_device *phydev);
+static int phy_stop_interrupts(struct phy_device *phydev);
+/* Convenience functions for reading/writing a given PHY
+ * register. They MUST NOT be called from interrupt context,
+ * because the bus read/write functions may wait for an interrupt
+ * to conclude the operation. */
+int phy_read(struct phy_device *phydev, u16 regnum)
+{
+        int retval;
+        struct mii_bus *bus = phydev->bus;
+        spin_lock_bh(&bus->mdio_lock);
+        retval = bus->read(bus, phydev->addr, regnum);
+        spin_unlock_bh(&bus->mdio_lock);
+        return retval;
+}
+EXPORT_SYMBOL(phy_read);
+int phy_write(struct phy_device *phydev, u16 regnum, u16 val)
+{
+        int err;
+        struct mii_bus *bus = phydev->bus;
+        spin_lock_bh(&bus->mdio_lock);
+        err = bus->write(bus, phydev->addr, regnum, val);
+        spin_unlock_bh(&bus->mdio_lock);
+        return err;
+}
+EXPORT_SYMBOL(phy_write);
+int phy_clear_interrupt(struct phy_device *phydev)
+{
+        int err = 0;
+        if (phydev->drv->ack_interrupt)
+                err = phydev->drv->ack_interrupt(phydev);
+        return err;
+}
+int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
+{
+        int err = 0;
+        phydev->interrupts = interrupts;
+        if (phydev->drv->config_intr)
+                err = phydev->drv->config_intr(phydev);
+        return err;
+}
+/* phy_aneg_done
+ *
+ * description: Reads the status register and returns 0 either if
+ *   auto-negotiation is incomplete, or if there was an error.
+ *   Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
+ */
+static inline int phy_aneg_done(struct phy_device *phydev)
+{
+        int retval;
+        retval = phy_read(phydev, MII_BMSR);
+        return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
+}
+/* phy_start_aneg
+ *
+ * description: Calls the PHY driver's config_aneg, and then
+ *   sets the PHY state to PHY_AN if auto-negotiation is enabled,
+ *   and to PHY_FORCING if auto-negotiation is disabled. Unless
+ *   the PHY is currently HALTED.
+ */
+static int phy_start_aneg(struct phy_device *phydev)
+{
+        int err;
+        spin_lock(&phydev->lock);
+        if (AUTONEG_DISABLE == phydev->autoneg)
+                phy_sanitize_settings(phydev);
+        err = phydev->drv->config_aneg(phydev);
+        if (err < 0)
+                goto out_unlock;
+        if (phydev->state != PHY_HALTED) {
+                if (AUTONEG_ENABLE == phydev->autoneg) {
+                        phydev->state = PHY_AN;
+                        phydev->link_timeout = PHY_AN_TIMEOUT;
+                } else {
+                        phydev->state = PHY_FORCING;
+                        phydev->link_timeout = PHY_FORCE_TIMEOUT;
+                }
+        }
+out_unlock:
+        spin_unlock(&phydev->lock);
+        return err;
+}
+/* A structure for mapping a particular speed and duplex
+ * combination to a particular SUPPORTED and ADVERTISED value */
+struct phy_setting {
+        int speed;
+        int duplex;
+        u32 setting;
+};
+/* A mapping of all SUPPORTED settings to speed/duplex */
+static struct phy_setting settings[] = {
+        {
+                .speed = 10000,
+                .duplex = DUPLEX_FULL,
+                .setting = SUPPORTED_10000baseT_Full,
+        },
+        {
+                .speed = SPEED_1000,
+                .duplex = DUPLEX_FULL,
+                .setting = SUPPORTED_1000baseT_Full,
+        },
+        {
+                .speed = SPEED_1000,
+                .duplex = DUPLEX_HALF,
+                .setting = SUPPORTED_1000baseT_Half,
+        },
+        {
+                .speed = SPEED_100,
+                .duplex = DUPLEX_FULL,
+                .setting = SUPPORTED_100baseT_Full,
+        },
+        {
+                .speed = SPEED_100,
+                .duplex = DUPLEX_HALF,
+                .setting = SUPPORTED_100baseT_Half,
+        },
+        {
+                .speed = SPEED_10,
+                .duplex = DUPLEX_FULL,
+                .setting = SUPPORTED_10baseT_Full,
+        },
+        {
+                .speed = SPEED_10,
+                .duplex = DUPLEX_HALF,
+                .setting = SUPPORTED_10baseT_Half,
+        },
+};
+#define MAX_NUM_SETTINGS (sizeof(settings)/sizeof(struct phy_setting))
+/* phy_find_setting
+ *
+ * description: Searches the settings array for the setting which
+ *   matches the desired speed and duplex, and returns the index
+ *   of that setting.  Returns the index of the last setting if
+ *   none of the others match.
+ */
+static inline int phy_find_setting(int speed, int duplex)
+{
+        int idx = 0;
+        while (idx < ARRAY_SIZE(settings) &&
+                        (settings[idx].speed != speed ||
+                        settings[idx].duplex != duplex))
+                idx++;
+        return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
+}
+/* phy_find_valid
+ * idx: The first index in settings[] to search
+ * features: A mask of the valid settings
+ *
+ * description: Returns the index of the first valid setting less
+ *   than or equal to the one pointed to by idx, as determined by
+ *   the mask in features.  Returns the index of the last setting
+ *   if nothing else matches.
+ */
+static inline int phy_find_valid(int idx, u32 features)
+{
+        while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
+                idx++;
+        return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
+}
+/* phy_sanitize_settings
+ *
+ * description: Make sure the PHY is set to supported speeds and
+ *   duplexes.  Drop down by one in this order:  1000/FULL,
+ *   1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF
+ */
+static void phy_sanitize_settings(struct phy_device *phydev)
+{
+        u32 features = phydev->supported;
+        int idx;
+        /* Sanitize settings based on PHY capabilities */
+        if ((features & SUPPORTED_Autoneg) == 0)
+                phydev->autoneg = 0;
+        idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
+                        features);
+        phydev->speed = settings[idx].speed;
+        phydev->duplex = settings[idx].duplex;
+}
+/* phy_force_reduction
+ *
+ * description: Reduces the speed/duplex settings by
+ *   one notch.  The order is so:
+ *   1000/FULL, 1000/HALF, 100/FULL, 100/HALF,
+ *   10/FULL, 10/HALF.  The function bottoms out at 10/HALF.
+ */
+static void phy_force_reduction(struct phy_device *phydev)
+{
+        int idx;
+        idx = phy_find_setting(phydev->speed, phydev->duplex);
+        
+        idx++;
+        idx = phy_find_valid(idx, phydev->supported);
+        phydev->speed = settings[idx].speed;
+        phydev->duplex = settings[idx].duplex;
+        pr_info("Trying %d/%s\n", phydev->speed,
+                        DUPLEX_FULL == phydev->duplex ?
+                        "FULL" : "HALF");
+}
+/* phy_ethtool_sset:
+ * A generic ethtool sset function.  Handles all the details
+ *
+ * A few notes about parameter checking:
+ * - We don't set port or transceiver, so we don't care what they
+ *   were set to.
+ * - phy_start_aneg() will make sure forced settings are sane, and
+ *   choose the next best ones from the ones selected, so we don't
+ *   care if ethtool tries to give us bad values
+ */
+int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
+{
+        if (cmd->phy_address != phydev->addr)
+                return -EINVAL;
+        /* We make sure that we don't pass unsupported
+         * values in to the PHY */
+        cmd->advertising &= phydev->supported;
+        /* Verify the settings we care about. */
+        if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
+                return -EINVAL;
+        if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
+                return -EINVAL;
+        if (cmd->autoneg == AUTONEG_DISABLE
+                        && ((cmd->speed != SPEED_1000
+                                        && cmd->speed != SPEED_100
+                                        && cmd->speed != SPEED_10)
+                                || (cmd->duplex != DUPLEX_HALF
+                                        && cmd->duplex != DUPLEX_FULL)))
+                return -EINVAL;
+        phydev->autoneg = cmd->autoneg;
+        phydev->speed = cmd->speed;
+        phydev->advertising = cmd->advertising;
+        if (AUTONEG_ENABLE == cmd->autoneg)
+                phydev->advertising |= ADVERTISED_Autoneg;
+        else
+                phydev->advertising &= ~ADVERTISED_Autoneg;
+        phydev->duplex = cmd->duplex;
+        /* Restart the PHY */
+        phy_start_aneg(phydev);
+        return 0;
+}
+int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
+{
+        cmd->supported = phydev->supported;
+        cmd->advertising = phydev->advertising;
+        cmd->speed = phydev->speed;
+        cmd->duplex = phydev->duplex;
+        cmd->port = PORT_MII;
+        cmd->phy_address = phydev->addr;
+        cmd->transceiver = XCVR_EXTERNAL;
+        cmd->autoneg = phydev->autoneg;
+        return 0;
+}
+/* Note that this function is currently incompatible with the
+ * PHYCONTROL layer.  It changes registers without regard to
+ * current state.  Use at own risk
+ */
+int phy_mii_ioctl(struct phy_device *phydev,
+                struct mii_ioctl_data *mii_data, int cmd)
+{
+        u16 val = mii_data->val_in;
+        switch (cmd) {
+        case SIOCGMIIPHY:
+                mii_data->phy_id = phydev->addr;
+                break;
+        case SIOCGMIIREG:
+                mii_data->val_out = phy_read(phydev, mii_data->reg_num);
+                break;
+        case SIOCSMIIREG:
+                if (!capable(CAP_NET_ADMIN))
+                        return -EPERM;
+                if (mii_data->phy_id == phydev->addr) {
+                        switch(mii_data->reg_num) {
+                        case MII_BMCR:
+                                if (val & (BMCR_RESET|BMCR_ANENABLE))
+                                        phydev->autoneg = AUTONEG_DISABLE;
+                                else
+                                        phydev->autoneg = AUTONEG_ENABLE;
+                                if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
+                                        phydev->duplex = DUPLEX_FULL;
+                                else
+                                        phydev->duplex = DUPLEX_HALF;
+                                break;
+                        case MII_ADVERTISE:
+                                phydev->advertising = val;
+                                break;
+                        default:
+                                /* do nothing */
+                                break;
+                        }
+                }
+                phy_write(phydev, mii_data->reg_num, val);
+                
+                if (mii_data->reg_num == MII_BMCR 
+                                && val & BMCR_RESET
+                                && phydev->drv->config_init)
+                        phydev->drv->config_init(phydev);
+                break;
+        }
+        return 0;
+}
+/* phy_start_machine:
+ *
+ * description: The PHY infrastructure can run a state machine
+ *   which tracks whether the PHY is starting up, negotiating,
+ *   etc.  This function starts the timer which tracks the state
+ *   of the PHY.  If you want to be notified when the state
+ *   changes, pass in the callback, otherwise, pass NULL.  If you
+ *   want to maintain your own state machine, do not call this
+ *   function. */
+void phy_start_machine(struct phy_device *phydev,
+                void (*handler)(struct net_device *))
+{
+        phydev->adjust_state = handler;
+        init_timer(&phydev->phy_timer);
+        phydev->phy_timer.function = &phy_timer;
+        phydev->phy_timer.data = (unsigned long) phydev;
+        mod_timer(&phydev->phy_timer, jiffies + HZ);
+}
+/* phy_stop_machine
+ *
+ * description: Stops the state machine timer, sets the state to
+ *   UP (unless it wasn't up yet), and then frees the interrupt,
+ *   if it is in use. This function must be called BEFORE
+ *   phy_detach.
+ */
+void phy_stop_machine(struct phy_device *phydev)
+{
+        del_timer_sync(&phydev->phy_timer);
+        spin_lock(&phydev->lock);
+        if (phydev->state > PHY_UP)
+                phydev->state = PHY_UP;
+        spin_unlock(&phydev->lock);
+        if (phydev->irq != PHY_POLL)
+                phy_stop_interrupts(phydev);
+        phydev->adjust_state = NULL;
+}
+/* phy_error:
+ *
+ * Moves the PHY to the HALTED state in response to a read
+ * or write error, and tells the controller the link is down.
+ * Must not be called from interrupt context, or while the
+ * phydev->lock is held.
+ */
+void phy_error(struct phy_device *phydev)
+{
+        spin_lock(&phydev->lock);
+        phydev->state = PHY_HALTED;
+        spin_unlock(&phydev->lock);
+}
+static int phy_stop_interrupts(struct phy_device *phydev)
+{
+        int err;
+        err = phy_disable_interrupts(phydev);
+        if (err)
+                phy_error(phydev);
+        free_irq(phydev->irq, phydev);
+        return err;
+}
+/* Disable the PHY interrupts from the PHY side */
+static int phy_disable_interrupts(struct phy_device *phydev)
+{
+        int err;
+        /* Disable PHY interrupts */
+        err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
+        if (err)
+                goto phy_err;
+        /* Clear the interrupt */
+        err = phy_clear_interrupt(phydev);
+        if (err)
+                goto phy_err;
+        return 0;
+phy_err:
+        phy_error(phydev);
+        return err;
+}
+/* PHY timer which handles the state machine */
+static void phy_timer(unsigned long data)
+{
+        struct phy_device *phydev = (struct phy_device *)data;
+        int needs_aneg = 0;
+        int err = 0;
+        spin_lock(&phydev->lock);
+        if (phydev->adjust_state)
+                phydev->adjust_state(phydev->attached_dev);
+        switch(phydev->state) {
+                case PHY_DOWN:
+                case PHY_STARTING:
+                case PHY_READY:
+                case PHY_PENDING:
+                        break;
+                case PHY_UP:
+                        needs_aneg = 1;
+                        phydev->link_timeout = PHY_AN_TIMEOUT;
+                        break;
+                case PHY_AN:
+                        /* Check if negotiation is done.  Break
+                         * if there's an error */
+                        err = phy_aneg_done(phydev);
+                        if (err < 0)
+                                break;
+                        /* If auto-negotiation is done, we change to
+                         * either RUNNING, or NOLINK */
+                        if (err > 0) {
+                                err = phy_read_status(phydev);
+                                if (err)
+                                        break;
+                                if (phydev->link) {
+                                        phydev->state = PHY_RUNNING;
+                                        netif_carrier_on(phydev->attached_dev);
+                                } else {
+                                        phydev->state = PHY_NOLINK;
+                                        netif_carrier_off(phydev->attached_dev);
+                                }
+                                phydev->adjust_link(phydev->attached_dev);
+                        } else if (0 == phydev->link_timeout--) {
+                                /* The counter expired, so either we
+                                 * switch to forced mode, or the
+                                 * magic_aneg bit exists, and we try aneg
+                                 * again */
+                                if (!(phydev->drv->flags & PHY_HAS_MAGICANEG)) {
+                                        int idx;
+                                        /* We'll start from the
+                                         * fastest speed, and work
+                                         * our way down */
+                                        idx = phy_find_valid(0,
+                                                        phydev->supported);
+                                        phydev->speed = settings[idx].speed;
+                                        phydev->duplex = settings[idx].duplex;
+                                        
+                                        phydev->autoneg = AUTONEG_DISABLE;
+                                        phydev->state = PHY_FORCING;
+                                        phydev->link_timeout =
+                                                PHY_FORCE_TIMEOUT;
+                                        pr_info("Trying %d/%s\n",
+                                                        phydev->speed,
+                                                        DUPLEX_FULL ==
+                                                        phydev->duplex ?
+                                                        "FULL" : "HALF");
+                                }
+                                needs_aneg = 1;
+                        }
+                        break;
+                case PHY_NOLINK:
+                        err = phy_read_status(phydev);
+                        if (err)
+                                break;
+                        if (phydev->link) {
+                                phydev->state = PHY_RUNNING;
+                                netif_carrier_on(phydev->attached_dev);
+                                phydev->adjust_link(phydev->attached_dev);
+                        }
+                        break;
+                case PHY_FORCING:
+                        err = phy_read_status(phydev);
+                        if (err)
+                                break;
+                        if (phydev->link) {
+                                phydev->state = PHY_RUNNING;
+                                netif_carrier_on(phydev->attached_dev);
+                        } else {
+                                if (0 == phydev->link_timeout--) {
+                                        phy_force_reduction(phydev);
+                                        needs_aneg = 1;
+                                }
+                        }
+                        phydev->adjust_link(phydev->attached_dev);
+                        break;
+                case PHY_RUNNING:
+                        /* Only register a CHANGE if we are
+                         * polling */
+                        if (PHY_POLL == phydev->irq)
+                                phydev->state = PHY_CHANGELINK;
+                        break;
+                case PHY_CHANGELINK:
+                        err = phy_read_status(phydev);
+                        if (err)
+                                break;
+                        if (phydev->link) {
+                                phydev->state = PHY_RUNNING;
+                                netif_carrier_on(phydev->attached_dev);
+                        } else {
+                                phydev->state = PHY_NOLINK;
+                                netif_carrier_off(phydev->attached_dev);
+                        }
+                        phydev->adjust_link(phydev->attached_dev);
+                        if (PHY_POLL != phydev->irq)
+                                err = phy_config_interrupt(phydev,
+                                                PHY_INTERRUPT_ENABLED);
+                        break;
+                case PHY_HALTED:
+                        if (phydev->link) {
+                                phydev->link = 0;
+                                netif_carrier_off(phydev->attached_dev);
+                                phydev->adjust_link(phydev->attached_dev);
+                        }
+                        break;
+                case PHY_RESUMING:
+                        err = phy_clear_interrupt(phydev);
+                        if (err)
+                                break;
+                        err = phy_config_interrupt(phydev,
+                                        PHY_INTERRUPT_ENABLED);
+                        if (err)
+                                break;
+                        if (AUTONEG_ENABLE == phydev->autoneg) {
+                                err = phy_aneg_done(phydev);
+                                if (err < 0)
+                                        break;
+                                /* err > 0 if AN is done.
+                                 * Otherwise, it's 0, and we're
+                                 * still waiting for AN */
+                                if (err > 0) {
+                                        phydev->state = PHY_RUNNING;
+                                } else {
+                                        phydev->state = PHY_AN;
+                                        phydev->link_timeout = PHY_AN_TIMEOUT;
+                                }
+                        } else
+                                phydev->state = PHY_RUNNING;
+                        break;
+        }
+        spin_unlock(&phydev->lock);
+        if (needs_aneg)
+                err = phy_start_aneg(phydev);
+        if (err < 0)
+                phy_error(phydev);
+        mod_timer(&phydev->phy_timer, jiffies + PHY_STATE_TIME * HZ);
+}
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
new file mode 100644
index 000000000000..c44d54f6310a
--- /dev/null
+++ b/drivers/net/phy/phy_device.c
@@ -0,0 +1,572 @@
+/*
+ * drivers/net/phy/phy_device.c
+ *
+ * Framework for finding and configuring PHYs.
+ * Also contains generic PHY driver
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+static int genphy_config_init(struct phy_device *phydev);
+static struct phy_driver genphy_driver = {
+        .phy_id         = 0xffffffff,
+        .phy_id_mask    = 0xffffffff,
+        .name           = "Generic PHY",
+        .config_init    = genphy_config_init,
+        .features       = 0,
+        .config_aneg    = genphy_config_aneg,
+        .read_status    = genphy_read_status,
+        .driver =       {.owner = THIS_MODULE, },
+};
+/* get_phy_device
+ *
+ * description: Reads the ID registers of the PHY at addr on the
+ *   bus, then allocates and returns the phy_device to
+ *   represent it.
+ */
+struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
+{
+        int phy_reg;
+        u32 phy_id;
+        struct phy_device *dev = NULL;
+        /* Grab the bits from PHYIR1, and put them
+         * in the upper half */
+        phy_reg = bus->read(bus, addr, MII_PHYSID1);
+        if (phy_reg < 0)
+                return ERR_PTR(phy_reg);
+        phy_id = (phy_reg & 0xffff) << 16;
+        /* Grab the bits from PHYIR2, and put them in the lower half */
+        phy_reg = bus->read(bus, addr, MII_PHYSID2);
+        if (phy_reg < 0)
+                return ERR_PTR(phy_reg);
+        phy_id |= (phy_reg & 0xffff);
+        /* If the phy_id is all Fs, there is no device there */
+        if (0xffffffff == phy_id)
+                return NULL;
+        /* Otherwise, we allocate the device, and initialize the
+         * default values */
+        dev = kcalloc(1, sizeof(*dev), GFP_KERNEL);
+        if (NULL == dev)
+                return ERR_PTR(-ENOMEM);
+        dev->speed = 0;
+        dev->duplex = -1;
+        dev->pause = dev->asym_pause = 0;
+        dev->link = 1;
+        dev->autoneg = AUTONEG_ENABLE;
+        dev->addr = addr;
+        dev->phy_id = phy_id;
+        dev->bus = bus;
+        dev->state = PHY_DOWN;
+        spin_lock_init(&dev->lock);
+        return dev;
+}
+/* phy_prepare_link:
+ *
+ * description: Tells the PHY infrastructure to handle the
+ *   gory details on monitoring link status (whether through
+ *   polling or an interrupt), and to call back to the
+ *   connected device driver when the link status changes.
+ *   If you want to monitor your own link state, don't call
+ *   this function */
+void phy_prepare_link(struct phy_device *phydev,
+                void (*handler)(struct net_device *))
+{
+        phydev->adjust_link = handler;
+}
+/* Generic PHY support and helper functions */
+/* genphy_config_advert
+ *
+ * description: Writes MII_ADVERTISE with the appropriate values,
+ *   after sanitizing the values to make sure we only advertise
+ *   what is supported
+ */
+static int genphy_config_advert(struct phy_device *phydev)
+{
+        u32 advertise;
+        int adv;
+        int err;
+        /* Only allow advertising what
+         * this PHY supports */
+        phydev->advertising &= phydev->supported;
+        advertise = phydev->advertising;
+        /* Setup standard advertisement */
+        adv = phy_read(phydev, MII_ADVERTISE);
+        if (adv < 0)
+                return adv;
+        adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 
+                 ADVERTISE_PAUSE_ASYM);
+        if (advertise & ADVERTISED_10baseT_Half)
+                adv |= ADVERTISE_10HALF;
+        if (advertise & ADVERTISED_10baseT_Full)
+                adv |= ADVERTISE_10FULL;
+        if (advertise & ADVERTISED_100baseT_Half)
+                adv |= ADVERTISE_100HALF;
+        if (advertise & ADVERTISED_100baseT_Full)
+                adv |= ADVERTISE_100FULL;
+        if (advertise & ADVERTISED_Pause)
+                adv |= ADVERTISE_PAUSE_CAP;
+        if (advertise & ADVERTISED_Asym_Pause)
+                adv |= ADVERTISE_PAUSE_ASYM;
+        err = phy_write(phydev, MII_ADVERTISE, adv);
+        if (err < 0)
+                return err;
+        /* Configure gigabit if it's supported */
+        if (phydev->supported & (SUPPORTED_1000baseT_Half |
+                                SUPPORTED_1000baseT_Full)) {
+                adv = phy_read(phydev, MII_CTRL1000);
+                if (adv < 0)
+                        return adv;
+                adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
+                if (advertise & SUPPORTED_1000baseT_Half)
+                        adv |= ADVERTISE_1000HALF;
+                if (advertise & SUPPORTED_1000baseT_Full)
+                        adv |= ADVERTISE_1000FULL;
+                err = phy_write(phydev, MII_CTRL1000, adv);
+                if (err < 0)
+                        return err;
+        }
+        return adv;
+}
+/* genphy_setup_forced
+ *
+ * description: Configures MII_BMCR to force speed/duplex
+ *   to the values in phydev. Assumes that the values are valid.
+ *   Please see phy_sanitize_settings() */
+int genphy_setup_forced(struct phy_device *phydev)
+{
+        int ctl = BMCR_RESET;
+        phydev->pause = phydev->asym_pause = 0;
+        if (SPEED_1000 == phydev->speed)
+                ctl |= BMCR_SPEED1000;
+        else if (SPEED_100 == phydev->speed)
+                ctl |= BMCR_SPEED100;
+        if (DUPLEX_FULL == phydev->duplex)
+                ctl |= BMCR_FULLDPLX;
+        
+        ctl = phy_write(phydev, MII_BMCR, ctl);
+        if (ctl < 0)
+                return ctl;
+        /* We just reset the device, so we'd better configure any
+         * settings the PHY requires to operate */
+        if (phydev->drv->config_init)
+                ctl = phydev->drv->config_init(phydev);
+        return ctl;
+}
+/* Enable and Restart Autonegotiation */
+int genphy_restart_aneg(struct phy_device *phydev)
+{
+        int ctl;
+        ctl = phy_read(phydev, MII_BMCR);
+        if (ctl < 0)
+                return ctl;
+        ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
+        /* Don't isolate the PHY if we're negotiating */
+        ctl &= ~(BMCR_ISOLATE);
+        ctl = phy_write(phydev, MII_BMCR, ctl);
+        return ctl;
+}
+/* genphy_config_aneg
+ *
+ * description: If auto-negotiation is enabled, we configure the
+ *   advertising, and then restart auto-negotiation.  If it is not
+ *   enabled, then we write the BMCR
+ */
+int genphy_config_aneg(struct phy_device *phydev)
+{
+        int err = 0;
+        if (AUTONEG_ENABLE == phydev->autoneg) {
+                err = genphy_config_advert(phydev);
+                if (err < 0)
+                        return err;
+                err = genphy_restart_aneg(phydev);
+        } else
+                err = genphy_setup_forced(phydev);
+        return err;
+}
+EXPORT_SYMBOL(genphy_config_aneg);
+/* genphy_update_link
+ *
+ * description: Update the value in phydev->link to reflect the
+ *   current link value.  In order to do this, we need to read
+ *   the status register twice, keeping the second value
+ */
+int genphy_update_link(struct phy_device *phydev)
+{
+        int status;
+        /* Do a fake read */
+        status = phy_read(phydev, MII_BMSR);
+        if (status < 0)
+                return status;
+        /* Read link and autonegotiation status */
+        status = phy_read(phydev, MII_BMSR);
+        if (status < 0)
+                return status;
+        if ((status & BMSR_LSTATUS) == 0)
+                phydev->link = 0;
+        else
+                phydev->link = 1;
+        return 0;
+}
+/* genphy_read_status
+ *
+ * description: Check the link, then figure out the current state
+ *   by comparing what we advertise with what the link partner
+ *   advertises.  Start by checking the gigabit possibilities,
+ *   then move on to 10/100.
+ */
+int genphy_read_status(struct phy_device *phydev)
+{
+        int adv;
+        int err;
+        int lpa;
+        int lpagb = 0;
+        /* Update the link, but return if there
+         * was an error */
+        err = genphy_update_link(phydev);
+        if (err)
+                return err;
+        if (AUTONEG_ENABLE == phydev->autoneg) {
+                if (phydev->supported & (SUPPORTED_1000baseT_Half
+                                        | SUPPORTED_1000baseT_Full)) {
+                        lpagb = phy_read(phydev, MII_STAT1000);
+                        if (lpagb < 0)
+                                return lpagb;
+                        adv = phy_read(phydev, MII_CTRL1000);
+                        if (adv < 0)
+                                return adv;
+                        lpagb &= adv << 2;
+                }
+                lpa = phy_read(phydev, MII_LPA);
+                if (lpa < 0)
+                        return lpa;
+                adv = phy_read(phydev, MII_ADVERTISE);
+                if (adv < 0)
+                        return adv;
+                lpa &= adv;
+                phydev->speed = SPEED_10;
+                phydev->duplex = DUPLEX_HALF;
+                phydev->pause = phydev->asym_pause = 0;
+                if (lpagb & (LPA_1000FULL | LPA_1000HALF)) {
+                        phydev->speed = SPEED_1000;
+                        if (lpagb & LPA_1000FULL)
+                                phydev->duplex = DUPLEX_FULL;
+                } else if (lpa & (LPA_100FULL | LPA_100HALF)) {
+                        phydev->speed = SPEED_100;
+                        
+                        if (lpa & LPA_100FULL)
+                                phydev->duplex = DUPLEX_FULL;
+                } else
+                        if (lpa & LPA_10FULL)
+                                phydev->duplex = DUPLEX_FULL;
+                if (phydev->duplex == DUPLEX_FULL){
+                        phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
+                        phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
+                }
+        } else {
+                int bmcr = phy_read(phydev, MII_BMCR);
+                if (bmcr < 0)
+                        return bmcr;
+                if (bmcr & BMCR_FULLDPLX)
+                        phydev->duplex = DUPLEX_FULL;
+                else
+                        phydev->duplex = DUPLEX_HALF;
+                if (bmcr & BMCR_SPEED1000)
+                        phydev->speed = SPEED_1000;
+                else if (bmcr & BMCR_SPEED100)
+                        phydev->speed = SPEED_100;
+                else
+                        phydev->speed = SPEED_10;
+                phydev->pause = phydev->asym_pause = 0;
+        }
+        return 0;
+}
+EXPORT_SYMBOL(genphy_read_status);
+static int genphy_config_init(struct phy_device *phydev)
+{
+        u32 val;
+        u32 features;
+        /* For now, I'll claim that the generic driver supports
+         * all possible port types */
+        features = (SUPPORTED_TP | SUPPORTED_MII
+                        | SUPPORTED_AUI | SUPPORTED_FIBRE |
+                        SUPPORTED_BNC);
+        /* Do we support autonegotiation? */
+        val = phy_read(phydev, MII_BMSR);
+        if (val < 0)
+                return val;
+        if (val & BMSR_ANEGCAPABLE)
+                features |= SUPPORTED_Autoneg;
+        if (val & BMSR_100FULL)
+                features |= SUPPORTED_100baseT_Full;
+        if (val & BMSR_100HALF)
+                features |= SUPPORTED_100baseT_Half;
+        if (val & BMSR_10FULL)
+                features |= SUPPORTED_10baseT_Full;
+        if (val & BMSR_10HALF)
+                features |= SUPPORTED_10baseT_Half;
+        if (val & BMSR_ESTATEN) {
+                val = phy_read(phydev, MII_ESTATUS);
+                if (val < 0)
+                        return val;
+                if (val & ESTATUS_1000_TFULL)
+                        features |= SUPPORTED_1000baseT_Full;
+                if (val & ESTATUS_1000_THALF)
+                        features |= SUPPORTED_1000baseT_Half;
+        }
+        phydev->supported = features;
+        phydev->advertising = features;
+        return 0;
+}
+/* phy_probe
+ *
+ * description: Take care of setting up the phy_device structure,
+ *   set the state to READY (the driver's init function should
+ *   set it to STARTING if needed).
+ */
+static int phy_probe(struct device *dev)
+{
+        struct phy_device *phydev;
+        struct phy_driver *phydrv;
+        struct device_driver *drv;
+        int err = 0;
+        phydev = to_phy_device(dev);
+        /* Make sure the driver is held.
+         * XXX -- Is this correct? */
+        drv = get_driver(phydev->dev.driver);
+        phydrv = to_phy_driver(drv);
+        phydev->drv = phydrv;
+        /* Disable the interrupt if the PHY doesn't support it */
+        if (!(phydrv->flags & PHY_HAS_INTERRUPT))
+                phydev->irq = PHY_POLL;
+        spin_lock(&phydev->lock);
+        /* Start out supporting everything. Eventually,
+         * a controller will attach, and may modify one
+         * or both of these values */
+        phydev->supported = phydrv->features;
+        phydev->advertising = phydrv->features;
+        /* Set the state to READY by default */
+        phydev->state = PHY_READY;
+        if (phydev->drv->probe)
+                err = phydev->drv->probe(phydev);
+        spin_unlock(&phydev->lock);
+        if (err < 0)
+                return err;
+        if (phydev->drv->config_init)
+                err = phydev->drv->config_init(phydev);
+        return err;
+}
+static int phy_remove(struct device *dev)
+{
+        struct phy_device *phydev;
+        phydev = to_phy_device(dev);
+        spin_lock(&phydev->lock);
+        phydev->state = PHY_DOWN;
+        spin_unlock(&phydev->lock);
+        if (phydev->drv->remove)
+                phydev->drv->remove(phydev);
+        put_driver(dev->driver);
+        phydev->drv = NULL;
+        return 0;
+}
+int phy_driver_register(struct phy_driver *new_driver)
+{
+        int retval;
+        memset(&new_driver->driver, 0, sizeof(new_driver->driver));
+        new_driver->driver.name = new_driver->name;
+        new_driver->driver.bus = &mdio_bus_type;
+        new_driver->driver.probe = phy_probe;
+        new_driver->driver.remove = phy_remove;
+        retval = driver_register(&new_driver->driver);
+        if (retval) {
+                printk(KERN_ERR "%s: Error %d in registering driver\n",
+                                new_driver->name, retval);
+                return retval;
+        }
+        pr_info("%s: Registered new driver\n", new_driver->name);
+        return 0;
+}
+EXPORT_SYMBOL(phy_driver_register);
+void phy_driver_unregister(struct phy_driver *drv)
+{
+        driver_unregister(&drv->driver);
+}
+EXPORT_SYMBOL(phy_driver_unregister);
+static int __init phy_init(void)
+{
+        int rc;
+        extern int mdio_bus_init(void);
+        rc = phy_driver_register(&genphy_driver);
+        if (rc)
+                goto out;
+        rc = mdio_bus_init();
+        if (rc)
+                goto out_unreg;
+        return 0;
+out_unreg:
+        phy_driver_unregister(&genphy_driver);
+out:
+        return rc;
+}
+static void __exit phy_exit(void)
+{
+        phy_driver_unregister(&genphy_driver);
+}
+module_init(phy_init);
+module_exit(phy_exit);
diff --git a/drivers/net/phy/qsemi.c b/drivers/net/phy/qsemi.c
new file mode 100644
index 000000000000..d461ba457631
--- /dev/null
+++ b/drivers/net/phy/qsemi.c
@@ -0,0 +1,143 @@
+/*
+ * drivers/net/phy/qsemi.c
+ *
+ * Driver for Quality Semiconductor PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+/* ------------------------------------------------------------------------- */
+/* The Quality Semiconductor QS6612 is used on the RPX CLLF                  */
+/* register definitions */
+#define MII_QS6612_MCR          17  /* Mode Control Register      */
+#define MII_QS6612_FTR          27  /* Factory Test Register      */
+#define MII_QS6612_MCO          28  /* Misc. Control Register     */
+#define MII_QS6612_ISR          29  /* Interrupt Source Register  */
+#define MII_QS6612_IMR          30  /* Interrupt Mask Register    */
+#define MII_QS6612_IMR_INIT     0x003a
+#define MII_QS6612_PCR          31  /* 100BaseTx PHY Control Reg. */
+#define QS6612_PCR_AN_COMPLETE  0x1000
+#define QS6612_PCR_RLBEN        0x0200
+#define QS6612_PCR_DCREN        0x0100
+#define QS6612_PCR_4B5BEN       0x0040
+#define QS6612_PCR_TX_ISOLATE   0x0020
+#define QS6612_PCR_MLT3_DIS     0x0002
+#define QS6612_PCR_SCRM_DESCRM  0x0001
+MODULE_DESCRIPTION("Quality Semiconductor PHY driver");
+MODULE_AUTHOR("Andy Fleming");
+MODULE_LICENSE("GPL");
+/* Returns 0, unless there's a write error */
+static int qs6612_config_init(struct phy_device *phydev)
+{
+        /* The PHY powers up isolated on the RPX,
+         * so send a command to allow operation.
+         * XXX - My docs indicate this should be 0x0940
+         * ...or something.  The current value sets three
+         * reserved bits, bit 11, which specifies it should be
+         * set to one, bit 10, which specifies it should be set
+         * to 0, and bit 7, which doesn't specify.  However, my
+         * docs are preliminary, and I will leave it like this
+         * until someone more knowledgable corrects me or it.
+         * -- Andy Fleming
+         */
+        return phy_write(phydev, MII_QS6612_PCR, 0x0dc0);
+}
+static int qs6612_ack_interrupt(struct phy_device *phydev)
+{
+        int err;
+        err = phy_read(phydev, MII_QS6612_ISR);
+        if (err < 0)
+                return err;
+        err = phy_read(phydev, MII_BMSR);
+        if (err < 0)
+                return err;
+        err = phy_read(phydev, MII_EXPANSION);
+        if (err < 0)
+                return err;
+        return 0;
+}
+static int qs6612_config_intr(struct phy_device *phydev)
+{
+        int err;
+        if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
+                err = phy_write(phydev, MII_QS6612_IMR,
+                                MII_QS6612_IMR_INIT);
+        else
+                err = phy_write(phydev, MII_QS6612_IMR, 0);
+        return err;
+}
+static struct phy_driver qs6612_driver = {
+        .phy_id         = 0x00181440,
+        .name           = "QS6612",
+        .phy_id_mask    = 0xfffffff0,
+        .features       = PHY_BASIC_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_init    = qs6612_config_init,
+        .config_aneg    = genphy_config_aneg,
+        .read_status    = genphy_read_status,
+        .ack_interrupt  = qs6612_ack_interrupt,
+        .config_intr    = qs6612_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+static int __init qs6612_init(void)
+{
+        return phy_driver_register(&qs6612_driver);
+}
+static void __exit qs6612_exit(void)
+{
+        phy_driver_unregister(&qs6612_driver);
+}
+module_init(qs6612_init);
+module_exit(qs6612_exit);
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h
index 7092ca6b277e..2234a8f05eb2 100644
--- a/drivers/net/s2io-regs.h
+++ b/drivers/net/s2io-regs.h
@@ -62,6 +62,7 @@ typedef struct _XENA_dev_config {
 #define ADAPTER_STATUS_RMAC_REMOTE_FAULT   BIT(6)
 #define ADAPTER_STATUS_RMAC_LOCAL_FAULT    BIT(7)
 #define ADAPTER_STATUS_RMAC_PCC_IDLE       vBIT(0xFF,8,8)
+#define ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE  vBIT(0x0F,8,8)
 #define ADAPTER_STATUS_RC_PRC_QUIESCENT    vBIT(0xFF,16,8)
 #define ADAPTER_STATUS_MC_DRAM_READY       BIT(24)
 #define ADAPTER_STATUS_MC_QUEUES_READY     BIT(25)
@@ -77,21 +78,34 @@ typedef struct _XENA_dev_config {
 #define ADAPTER_ECC_EN                     BIT(55)
        u64 serr_source;
-#define SERR_SOURCE_PIC                                 BIT(0)
+#define SERR_SOURCE_PIC                 BIT(0)
-#define SERR_SOURCE_TXDMA                               BIT(1)
+#define SERR_SOURCE_TXDMA               BIT(1)
-#define SERR_SOURCE_RXDMA                               BIT(2)
+#define SERR_SOURCE_RXDMA               BIT(2)
 #define SERR_SOURCE_MAC                 BIT(3)
 #define SERR_SOURCE_MC                  BIT(4)
 #define SERR_SOURCE_XGXS                BIT(5)
-#define SERR_SOURCE_ANY                                 (SERR_SOURCE_PIC                | \
+#define SERR_SOURCE_ANY                 (SERR_SOURCE_PIC        | \
-                                                                                SERR_SOURCE_TXDMA       | \
+                                        SERR_SOURCE_TXDMA       | \
-                                                                                SERR_SOURCE_RXDMA       | \
+                                        SERR_SOURCE_RXDMA       | \
-                                                                                SERR_SOURCE_MAC         | \
+                                        SERR_SOURCE_MAC         | \
-                                                                                SERR_SOURCE_MC      | \
+                                        SERR_SOURCE_MC          | \
-                                                                                SERR_SOURCE_XGXS)
+                                        SERR_SOURCE_XGXS)
+        u64 pci_mode;
-        u8 unused_0[0x800 - 0x120];
+#define GET_PCI_MODE(val)               ((val & vBIT(0xF, 0, 4)) >> 60)
+#define PCI_MODE_PCI_33                 0
+#define PCI_MODE_PCI_66                 0x1
+#define PCI_MODE_PCIX_M1_66             0x2
+#define PCI_MODE_PCIX_M1_100            0x3
+#define PCI_MODE_PCIX_M1_133            0x4
+#define PCI_MODE_PCIX_M2_66             0x5
+#define PCI_MODE_PCIX_M2_100            0x6
+#define PCI_MODE_PCIX_M2_133            0x7
+#define PCI_MODE_UNSUPPORTED            BIT(0)
+#define PCI_MODE_32_BITS                BIT(8)
+#define PCI_MODE_UNKNOWN_MODE           BIT(9)
+        u8 unused_0[0x800 - 0x128];
 /* PCI-X Controller registers */
        u64 pic_int_status;
@@ -153,7 +167,11 @@ typedef struct _XENA_dev_config {
        u8 unused4[0x08];
        u64 gpio_int_reg;
+#define GPIO_INT_REG_LINK_DOWN                 BIT(1)
+#define GPIO_INT_REG_LINK_UP                   BIT(2)
        u64 gpio_int_mask;
+#define GPIO_INT_MASK_LINK_DOWN                BIT(1)
+#define GPIO_INT_MASK_LINK_UP                  BIT(2)
        u64 gpio_alarms;
        u8 unused5[0x38];
@@ -223,19 +241,16 @@ typedef struct _XENA_dev_config {
        u64 xmsi_data;
        u64 rx_mat;
+#define RX_MAT_SET(ring, msi)                   vBIT(msi, (8 * ring), 8)
        u8 unused6[0x8];
-        u64 tx_mat0_7;
+        u64 tx_mat0_n[0x8];
-        u64 tx_mat8_15;
+#define TX_MAT_SET(fifo, msi)                   vBIT(msi, (8 * fifo), 8)
-        u64 tx_mat16_23;
-        u64 tx_mat24_31;
-        u64 tx_mat32_39;
-        u64 tx_mat40_47;
-        u64 tx_mat48_55;
-        u64 tx_mat56_63;
-        u8 unused_1[0x10];
+        u8 unused_1[0x8];
+        u64 stat_byte_cnt;
+#define STAT_BC(n)                              vBIT(n,4,12)
        /* Automated statistics collection */
        u64 stat_cfg;
@@ -246,6 +261,7 @@ typedef struct _XENA_dev_config {
 #define STAT_TRSF_PER(n)           TBD
 #define PER_SEC                                    0x208d5
 #define SET_UPDT_PERIOD(n)                 vBIT((PER_SEC*n),32,32)
+#define SET_UPDT_CLICKS(val)               vBIT(val, 32, 32)
        u64 stat_addr;
@@ -267,8 +283,15 @@ typedef struct _XENA_dev_config {
        u64 gpio_control;
 #define GPIO_CTRL_GPIO_0                BIT(8)
+        u64 misc_control;
+#define MISC_LINK_STABILITY_PRD(val)   vBIT(val,29,3)
+        u8 unused7_1[0x240 - 0x208];
+        u64 wreq_split_mask;
+#define WREQ_SPLIT_MASK_SET_MASK(val)   vBIT(val, 52, 12)
-        u8 unused7[0x600];
+        u8 unused7_2[0x800 - 0x248];
 /* TxDMA registers */
        u64 txdma_int_status;
@@ -290,6 +313,7 @@ typedef struct _XENA_dev_config {
        u64 pcc_err_reg;
 #define PCC_FB_ECC_DB_ERR               vBIT(0xFF, 16, 8)
+#define PCC_ENABLE_FOUR                 vBIT(0x0F,0,8)
        u64 pcc_err_mask;
        u64 pcc_err_alarm;
@@ -468,6 +492,7 @@ typedef struct _XENA_dev_config {
 #define PRC_CTRL_NO_SNOOP                      (BIT(22)|BIT(23))
 #define PRC_CTRL_NO_SNOOP_DESC                 BIT(22)
 #define PRC_CTRL_NO_SNOOP_BUFF                 BIT(23)
+#define PRC_CTRL_BIMODAL_INTERRUPT             BIT(37)
 #define PRC_CTRL_RXD_BACKOFF_INTERVAL(val)     vBIT(val,40,24)
        u64 prc_alarm_action;
@@ -691,6 +716,10 @@ typedef struct _XENA_dev_config {
 #define MC_ERR_REG_MIRI_CRI_ERR_0          BIT(22)
 #define MC_ERR_REG_MIRI_CRI_ERR_1          BIT(23)
 #define MC_ERR_REG_SM_ERR                  BIT(31)
+#define MC_ERR_REG_ECC_ALL_SNG             (BIT(6) | \
+                                        BIT(7) | BIT(17) | BIT(19))
+#define MC_ERR_REG_ECC_ALL_DBL             (BIT(14) | \
+                                        BIT(15) | BIT(18) | BIT(20))
        u64 mc_err_mask;
        u64 mc_err_alarm;
@@ -736,7 +765,19 @@ typedef struct _XENA_dev_config {
        u64 mc_rldram_test_d1;
        u8 unused24[0x300 - 0x288];
        u64 mc_rldram_test_d2;
-        u8 unused25[0x700 - 0x308];
+        u8 unused24_1[0x360 - 0x308];
+        u64 mc_rldram_ctrl;
+#define MC_RLDRAM_ENABLE_ODT            BIT(7)
+        u8 unused24_2[0x640 - 0x368];
+        u64 mc_rldram_ref_per_herc;
+#define MC_RLDRAM_SET_REF_PERIOD(val)   vBIT(val, 0, 16)
+        u8 unused24_3[0x660 - 0x648];
+        u64 mc_rldram_mrs_herc;
+        u8 unused25[0x700 - 0x668];
        u64 mc_debug_ctrl;
        u8 unused26[0x3000 - 0x2f08];
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index ea638b162d3f..e083351e3f42 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -11,29 +11,28 @@
 * See the file COPYING in this distribution for more information.
 *
 * Credits:
- * Jeff Garzik          : For pointing out the improper error condition 
+ * Jeff Garzik          : For pointing out the improper error condition
- *                        check in the s2io_xmit routine and also some 
+ *                        check in the s2io_xmit routine and also some
- *                        issues in the Tx watch dog function. Also for
+ *                        issues in the Tx watch dog function. Also for
- *                        patiently answering all those innumerable 
+ *                        patiently answering all those innumerable
 *                        questions regaring the 2.6 porting issues.
 * Stephen Hemminger    : Providing proper 2.6 porting mechanism for some
 *                        macros available only in 2.6 Kernel.
- * Francois Romieu      : For pointing out all code part that were 
+ * Francois Romieu      : For pointing out all code part that were
 *                        deprecated and also styling related comments.
- * Grant Grundler       : For helping me get rid of some Architecture 
+ * Grant Grundler       : For helping me get rid of some Architecture
 *                        dependent code.
 * Christopher Hellwig  : Some more 2.6 specific issues in the driver.
- *                              
+ *
 * The module loadable parameters that are supported by the driver and a brief
 * explaination of all the variables.
- * rx_ring_num : This can be used to program the number of receive rings used 
+ * rx_ring_num : This can be used to program the number of receive rings used
- * in the driver.                                       
+ * in the driver.
- * rx_ring_len: This defines the number of descriptors each ring can have. This 
+ * rx_ring_len: This defines the number of descriptors each ring can have. This
 * is also an array of size 8.
 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
- * tx_fifo_len: This too is an array of 8. Each element defines the number of 
+ * tx_fifo_len: This too is an array of 8. Each element defines the number of
 * Tx descriptors that can be associated with each corresponding FIFO.
- * in PCI Configuration space.
 ************************************************************************/
 #include <linux/config.h>
@@ -56,27 +55,39 @@
 #include <linux/ethtool.h>
 #include <linux/version.h>
 #include <linux/workqueue.h>
+#include <linux/if_vlan.h>
-#include <asm/io.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
+#include <asm/io.h>
 /* local include */
 #include "s2io.h"
 #include "s2io-regs.h"
 /* S2io Driver name & version. */
-static char s2io_driver_name[] = "s2io";
+static char s2io_driver_name[] = "Neterion";
-static char s2io_driver_version[] = "Version 1.7.7.1";
+static char s2io_driver_version[] = "Version 2.0.2.1";
+static inline int RXD_IS_UP2DT(RxD_t *rxdp)
+{
+        int ret;
+        ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
+                (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));
-/* 
+        return ret;
+}
+/*
 * Cards with following subsystem_id have a link state indication
 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
 * macro below identifies these cards given the subsystem_id.
 */
-#define CARDS_WITH_FAULTY_LINK_INDICATORS(subid) \
+#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
-                (((subid >= 0x600B) && (subid <= 0x600D)) || \
+        (dev_type == XFRAME_I_DEVICE) ?                 \
-                 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0
+                ((((subid >= 0x600B) && (subid <= 0x600D)) || \
+                 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
 #define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
                                      ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
@@ -86,9 +97,12 @@ static char s2io_driver_version[] = "Version 1.7.7.1";
 static inline int rx_buffer_level(nic_t * sp, int rxb_size, int ring)
 {
        int level = 0;
-        if ((sp->pkt_cnt[ring] - rxb_size) > 16) {
+        mac_info_t *mac_control;
+        mac_control = &sp->mac_control;
+        if ((mac_control->rings[ring].pkt_cnt - rxb_size) > 16) {
                level = LOW;
-                if ((sp->pkt_cnt[ring] - rxb_size) < MAX_RXDS_PER_BLOCK) {
+                if (rxb_size <= MAX_RXDS_PER_BLOCK) {
                        level = PANIC;
                }
        }
@@ -145,6 +159,9 @@ static char ethtool_stats_keys[][ETH_GSTRING_LEN] = {
        {"rmac_pause_cnt"},
        {"rmac_accepted_ip"},
        {"rmac_err_tcp"},
+        {"\n DRIVER STATISTICS"},
+        {"single_bit_ecc_errs"},
+        {"double_bit_ecc_errs"},
 };
 #define S2IO_STAT_LEN sizeof(ethtool_stats_keys)/ ETH_GSTRING_LEN
@@ -153,8 +170,37 @@ static char ethtool_stats_keys[][ETH_GSTRING_LEN] = {
 #define S2IO_TEST_LEN   sizeof(s2io_gstrings) / ETH_GSTRING_LEN
 #define S2IO_STRINGS_LEN        S2IO_TEST_LEN * ETH_GSTRING_LEN
+#define S2IO_TIMER_CONF(timer, handle, arg, exp)                \
+                        init_timer(&timer);                     \
+                        timer.function = handle;                \
+                        timer.data = (unsigned long) arg;       \
+                        mod_timer(&timer, (jiffies + exp))      \
+/* Add the vlan */
+static void s2io_vlan_rx_register(struct net_device *dev,
+                                        struct vlan_group *grp)
+{
+        nic_t *nic = dev->priv;
+        unsigned long flags;
+        spin_lock_irqsave(&nic->tx_lock, flags);
+        nic->vlgrp = grp;
+        spin_unlock_irqrestore(&nic->tx_lock, flags);
+}
+/* Unregister the vlan */
+static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned long vid)
+{
+        nic_t *nic = dev->priv;
+        unsigned long flags;
+        spin_lock_irqsave(&nic->tx_lock, flags);
+        if (nic->vlgrp)
+                nic->vlgrp->vlan_devices[vid] = NULL;
+        spin_unlock_irqrestore(&nic->tx_lock, flags);
+}
-/* 
+/*
 * Constants to be programmed into the Xena's registers, to configure
 * the XAUI.
 */
@@ -162,7 +208,24 @@ static char ethtool_stats_keys[][ETH_GSTRING_LEN] = {
 #define SWITCH_SIGN     0xA5A5A5A5A5A5A5A5ULL
 #define END_SIGN        0x0
-static u64 default_mdio_cfg[] = {
+static u64 herc_act_dtx_cfg[] = {
+        /* Set address */
+        0x80000515BA750000ULL, 0x80000515BA7500E0ULL,
+        /* Write data */
+        0x80000515BA750004ULL, 0x80000515BA7500E4ULL,
+        /* Set address */
+        0x80010515003F0000ULL, 0x80010515003F00E0ULL,
+        /* Write data */
+        0x80010515003F0004ULL, 0x80010515003F00E4ULL,
+        /* Set address */
+        0x80020515F2100000ULL, 0x80020515F21000E0ULL,
+        /* Write data */
+        0x80020515F2100004ULL, 0x80020515F21000E4ULL,
+        /* Done */
+        END_SIGN
+};
+static u64 xena_mdio_cfg[] = {
        /* Reset PMA PLL */
        0xC001010000000000ULL, 0xC0010100000000E0ULL,
        0xC0010100008000E4ULL,
@@ -172,7 +235,7 @@ static u64 default_mdio_cfg[] = {
        END_SIGN
 };
-static u64 default_dtx_cfg[] = {
+static u64 xena_dtx_cfg[] = {
        0x8000051500000000ULL, 0x80000515000000E0ULL,
        0x80000515D93500E4ULL, 0x8001051500000000ULL,
        0x80010515000000E0ULL, 0x80010515001E00E4ULL,
@@ -196,8 +259,7 @@ static u64 default_dtx_cfg[] = {
        END_SIGN
 };
+/*
-/* 
 * Constants for Fixing the MacAddress problem seen mostly on
 * Alpha machines.
 */
@@ -226,20 +288,25 @@ static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
 static unsigned int rx_ring_num = 1;
 static unsigned int rx_ring_sz[MAX_RX_RINGS] =
    {[0 ...(MAX_RX_RINGS - 1)] = 0 };
-static unsigned int Stats_refresh_time = 4;
+static unsigned int rts_frm_len[MAX_RX_RINGS] =
+    {[0 ...(MAX_RX_RINGS - 1)] = 0 };
+static unsigned int use_continuous_tx_intrs = 1;
 static unsigned int rmac_pause_time = 65535;
 static unsigned int mc_pause_threshold_q0q3 = 187;
 static unsigned int mc_pause_threshold_q4q7 = 187;
 static unsigned int shared_splits;
 static unsigned int tmac_util_period = 5;
 static unsigned int rmac_util_period = 5;
+static unsigned int bimodal = 0;
 #ifndef CONFIG_S2IO_NAPI
 static unsigned int indicate_max_pkts;
 #endif
+/* Frequency of Rx desc syncs expressed as power of 2 */
+static unsigned int rxsync_frequency = 3;
-/* 
+/*
 * S2IO device table.
- * This table lists all the devices that this driver supports. 
+ * This table lists all the devices that this driver supports.
 */
 static struct pci_device_id s2io_tbl[] __devinitdata = {
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
@@ -247,9 +314,9 @@ static struct pci_device_id s2io_tbl[] __devinitdata = {
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
         PCI_ANY_ID, PCI_ANY_ID},
        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
-         PCI_ANY_ID, PCI_ANY_ID},
+         PCI_ANY_ID, PCI_ANY_ID},
-        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
+        {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
-         PCI_ANY_ID, PCI_ANY_ID},
+         PCI_ANY_ID, PCI_ANY_ID},
        {0,}
 };
@@ -268,8 +335,8 @@ static struct pci_driver s2io_driver = {
 /**
 * init_shared_mem - Allocation and Initialization of Memory
 * @nic: Device private variable.
- * Description: The function allocates all the memory areas shared 
+ * Description: The function allocates all the memory areas shared
- * between the NIC and the driver. This includes Tx descriptors, 
+ * between the NIC and the driver. This includes Tx descriptors,
 * Rx descriptors and the statistics block.
 */
@@ -279,11 +346,11 @@ static int init_shared_mem(struct s2io_nic *nic)
        void *tmp_v_addr, *tmp_v_addr_next;
        dma_addr_t tmp_p_addr, tmp_p_addr_next;
        RxD_block_t *pre_rxd_blk = NULL;
-        int i, j, blk_cnt;
+        int i, j, blk_cnt, rx_sz, tx_sz;
        int lst_size, lst_per_page;
        struct net_device *dev = nic->dev;
 #ifdef CONFIG_2BUFF_MODE
-        unsigned long tmp;
+        u64 tmp;
        buffAdd_t *ba;
 #endif
@@ -300,36 +367,41 @@ static int init_shared_mem(struct s2io_nic *nic)
                size += config->tx_cfg[i].fifo_len;
        }
        if (size > MAX_AVAILABLE_TXDS) {
-                DBG_PRINT(ERR_DBG, "%s: Total number of Tx FIFOs ",
+                DBG_PRINT(ERR_DBG, "%s: Requested TxDs too high, ",
-                          dev->name);
+                          __FUNCTION__);
-                DBG_PRINT(ERR_DBG, "exceeds the maximum value ");
+                DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);
-                DBG_PRINT(ERR_DBG, "that can be used\n");
                return FAILURE;
        }
        lst_size = (sizeof(TxD_t) * config->max_txds);
+        tx_sz = lst_size * size;
        lst_per_page = PAGE_SIZE / lst_size;
        for (i = 0; i < config->tx_fifo_num; i++) {
                int fifo_len = config->tx_cfg[i].fifo_len;
                int list_holder_size = fifo_len * sizeof(list_info_hold_t);
-                nic->list_info[i] = kmalloc(list_holder_size, GFP_KERNEL);
+                mac_control->fifos[i].list_info = kmalloc(list_holder_size,
-                if (!nic->list_info[i]) {
+                                                          GFP_KERNEL);
+                if (!mac_control->fifos[i].list_info) {
                        DBG_PRINT(ERR_DBG,
                                  "Malloc failed for list_info\n");
                        return -ENOMEM;
                }
-                memset(nic->list_info[i], 0, list_holder_size);
+                memset(mac_control->fifos[i].list_info, 0, list_holder_size);
        }
        for (i = 0; i < config->tx_fifo_num; i++) {
                int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
                                                lst_per_page);
-                mac_control->tx_curr_put_info[i].offset = 0;
+                mac_control->fifos[i].tx_curr_put_info.offset = 0;
-                mac_control->tx_curr_put_info[i].fifo_len =
+                mac_control->fifos[i].tx_curr_put_info.fifo_len =
                    config->tx_cfg[i].fifo_len - 1;
-                mac_control->tx_curr_get_info[i].offset = 0;
+                mac_control->fifos[i].tx_curr_get_info.offset = 0;
-                mac_control->tx_curr_get_info[i].fifo_len =
+                mac_control->fifos[i].tx_curr_get_info.fifo_len =
                    config->tx_cfg[i].fifo_len - 1;
+                mac_control->fifos[i].fifo_no = i;
+                mac_control->fifos[i].nic = nic;
+                mac_control->fifos[i].max_txds = MAX_SKB_FRAGS;
                for (j = 0; j < page_num; j++) {
                        int k = 0;
                        dma_addr_t tmp_p;
@@ -345,16 +417,15 @@ static int init_shared_mem(struct s2io_nic *nic)
                        while (k < lst_per_page) {
                                int l = (j * lst_per_page) + k;
                                if (l == config->tx_cfg[i].fifo_len)
-                                        goto end_txd_alloc;
+                                        break;
-                                nic->list_info[i][l].list_virt_addr =
+                                mac_control->fifos[i].list_info[l].list_virt_addr =
                                    tmp_v + (k * lst_size);
-                                nic->list_info[i][l].list_phy_addr =
+                                mac_control->fifos[i].list_info[l].list_phy_addr =
                                    tmp_p + (k * lst_size);
                                k++;
                        }
                }
        }
-      end_txd_alloc:
        /* Allocation and initialization of RXDs in Rings */
        size = 0;
@@ -367,21 +438,26 @@ static int init_shared_mem(struct s2io_nic *nic)
                        return FAILURE;
                }
                size += config->rx_cfg[i].num_rxd;
-                nic->block_count[i] =
+                mac_control->rings[i].block_count =
                    config->rx_cfg[i].num_rxd / (MAX_RXDS_PER_BLOCK + 1);
-                nic->pkt_cnt[i] =
+                mac_control->rings[i].pkt_cnt =
-                    config->rx_cfg[i].num_rxd - nic->block_count[i];
+                    config->rx_cfg[i].num_rxd - mac_control->rings[i].block_count;
        }
+        size = (size * (sizeof(RxD_t)));
+        rx_sz = size;
        for (i = 0; i < config->rx_ring_num; i++) {
-                mac_control->rx_curr_get_info[i].block_index = 0;
+                mac_control->rings[i].rx_curr_get_info.block_index = 0;
-                mac_control->rx_curr_get_info[i].offset = 0;
+                mac_control->rings[i].rx_curr_get_info.offset = 0;
-                mac_control->rx_curr_get_info[i].ring_len =
+                mac_control->rings[i].rx_curr_get_info.ring_len =
                    config->rx_cfg[i].num_rxd - 1;
-                mac_control->rx_curr_put_info[i].block_index = 0;
+                mac_control->rings[i].rx_curr_put_info.block_index = 0;
-                mac_control->rx_curr_put_info[i].offset = 0;
+                mac_control->rings[i].rx_curr_put_info.offset = 0;
-                mac_control->rx_curr_put_info[i].ring_len =
+                mac_control->rings[i].rx_curr_put_info.ring_len =
                    config->rx_cfg[i].num_rxd - 1;
+                mac_control->rings[i].nic = nic;
+                mac_control->rings[i].ring_no = i;
                blk_cnt =
                    config->rx_cfg[i].num_rxd / (MAX_RXDS_PER_BLOCK + 1);
                /*  Allocating all the Rx blocks */
@@ -395,32 +471,36 @@ static int init_shared_mem(struct s2io_nic *nic)
                                                          &tmp_p_addr);
                        if (tmp_v_addr == NULL) {
                                /*
-                                 * In case of failure, free_shared_mem() 
+                                 * In case of failure, free_shared_mem()
-                                 * is called, which should free any 
+                                 * is called, which should free any
-                                 * memory that was alloced till the 
+                                 * memory that was alloced till the
                                 * failure happened.
                                 */
-                                nic->rx_blocks[i][j].block_virt_addr =
+                                mac_control->rings[i].rx_blocks[j].block_virt_addr =
                                    tmp_v_addr;
                                return -ENOMEM;
                        }
                        memset(tmp_v_addr, 0, size);
-                        nic->rx_blocks[i][j].block_virt_addr = tmp_v_addr;
+                        mac_control->rings[i].rx_blocks[j].block_virt_addr =
-                        nic->rx_blocks[i][j].block_dma_addr = tmp_p_addr;
+                                tmp_v_addr;
+                        mac_control->rings[i].rx_blocks[j].block_dma_addr =
+                                tmp_p_addr;
                }
                /* Interlinking all Rx Blocks */
                for (j = 0; j < blk_cnt; j++) {
-                        tmp_v_addr = nic->rx_blocks[i][j].block_virt_addr;
+                        tmp_v_addr =
+                                mac_control->rings[i].rx_blocks[j].block_virt_addr;
                        tmp_v_addr_next =
-                            nic->rx_blocks[i][(j + 1) %
+                                mac_control->rings[i].rx_blocks[(j + 1) %
                                              blk_cnt].block_virt_addr;
-                        tmp_p_addr = nic->rx_blocks[i][j].block_dma_addr;
+                        tmp_p_addr =
+                                mac_control->rings[i].rx_blocks[j].block_dma_addr;
                        tmp_p_addr_next =
-                            nic->rx_blocks[i][(j + 1) %
+                                mac_control->rings[i].rx_blocks[(j + 1) %
                                              blk_cnt].block_dma_addr;
                        pre_rxd_blk = (RxD_block_t *) tmp_v_addr;
-                        pre_rxd_blk->reserved_1 = END_OF_BLOCK; /* last RxD 
+                        pre_rxd_blk->reserved_1 = END_OF_BLOCK; /* last RxD
                                                                 * marker.
                                                                 */
 #ifndef CONFIG_2BUFF_MODE
@@ -433,43 +513,43 @@ static int init_shared_mem(struct s2io_nic *nic)
        }
 #ifdef CONFIG_2BUFF_MODE
-        /* 
+        /*
         * Allocation of Storages for buffer addresses in 2BUFF mode
         * and the buffers as well.
         */
        for (i = 0; i < config->rx_ring_num; i++) {
                blk_cnt =
                    config->rx_cfg[i].num_rxd / (MAX_RXDS_PER_BLOCK + 1);
-                nic->ba[i] = kmalloc((sizeof(buffAdd_t *) * blk_cnt),
+                mac_control->rings[i].ba = kmalloc((sizeof(buffAdd_t *) * blk_cnt),
                                     GFP_KERNEL);
-                if (!nic->ba[i])
+                if (!mac_control->rings[i].ba)
                        return -ENOMEM;
                for (j = 0; j < blk_cnt; j++) {
                        int k = 0;
-                        nic->ba[i][j] = kmalloc((sizeof(buffAdd_t) *
+                        mac_control->rings[i].ba[j] = kmalloc((sizeof(buffAdd_t) *
                                                 (MAX_RXDS_PER_BLOCK + 1)),
                                                GFP_KERNEL);
-                        if (!nic->ba[i][j])
+                        if (!mac_control->rings[i].ba[j])
                                return -ENOMEM;
                        while (k != MAX_RXDS_PER_BLOCK) {
-                                ba = &nic->ba[i][j][k];
+                                ba = &mac_control->rings[i].ba[j][k];
-                                ba->ba_0_org = kmalloc
+                                ba->ba_0_org = (void *) kmalloc
                                    (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
                                if (!ba->ba_0_org)
                                        return -ENOMEM;
-                                tmp = (unsigned long) ba->ba_0_org;
+                                tmp = (u64) ba->ba_0_org;
                                tmp += ALIGN_SIZE;
-                                tmp &= ~((unsigned long) ALIGN_SIZE);
+                                tmp &= ~((u64) ALIGN_SIZE);
                                ba->ba_0 = (void *) tmp;
-                                ba->ba_1_org = kmalloc
+                                ba->ba_1_org = (void *) kmalloc
                                    (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
                                if (!ba->ba_1_org)
                                        return -ENOMEM;
-                                tmp = (unsigned long) ba->ba_1_org;
+                                tmp = (u64) ba->ba_1_org;
                                tmp += ALIGN_SIZE;
-                                tmp &= ~((unsigned long) ALIGN_SIZE);
+                                tmp &= ~((u64) ALIGN_SIZE);
                                ba->ba_1 = (void *) tmp;
                                k++;
                        }
@@ -483,9 +563,9 @@ static int init_shared_mem(struct s2io_nic *nic)
            (nic->pdev, size, &mac_control->stats_mem_phy);
        if (!mac_control->stats_mem) {
-                /* 
+                /*
-                 * In case of failure, free_shared_mem() is called, which 
+                 * In case of failure, free_shared_mem() is called, which
-                 * should free any memory that was alloced till the 
+                 * should free any memory that was alloced till the
                 * failure happened.
                 */
                return -ENOMEM;
@@ -495,15 +575,14 @@ static int init_shared_mem(struct s2io_nic *nic)
        tmp_v_addr = mac_control->stats_mem;
        mac_control->stats_info = (StatInfo_t *) tmp_v_addr;
        memset(tmp_v_addr, 0, size);
        DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,
                  (unsigned long long) tmp_p_addr);
        return SUCCESS;
 }
-/**  
+/**
- * free_shared_mem - Free the allocated Memory 
+ * free_shared_mem - Free the allocated Memory
 * @nic:  Device private variable.
 * Description: This function is to free all memory locations allocated by
 * the init_shared_mem() function and return it to the kernel.
@@ -533,15 +612,19 @@ static void free_shared_mem(struct s2io_nic *nic)
                                                lst_per_page);
                for (j = 0; j < page_num; j++) {
                        int mem_blks = (j * lst_per_page);
-                        if (!nic->list_info[i][mem_blks].list_virt_addr)
+                        if ((!mac_control->fifos[i].list_info) ||
+                                (!mac_control->fifos[i].list_info[mem_blks].
+                                 list_virt_addr))
                                break;
                        pci_free_consistent(nic->pdev, PAGE_SIZE,
-                                            nic->list_info[i][mem_blks].
+                                            mac_control->fifos[i].
+                                            list_info[mem_blks].
                                            list_virt_addr,
-                                            nic->list_info[i][mem_blks].
+                                            mac_control->fifos[i].
+                                            list_info[mem_blks].
                                            list_phy_addr);
                }
-                kfree(nic->list_info[i]);
+                kfree(mac_control->fifos[i].list_info);
        }
 #ifndef CONFIG_2BUFF_MODE
@@ -550,10 +633,12 @@ static void free_shared_mem(struct s2io_nic *nic)
        size = SIZE_OF_BLOCK;
 #endif
        for (i = 0; i < config->rx_ring_num; i++) {
-                blk_cnt = nic->block_count[i];
+                blk_cnt = mac_control->rings[i].block_count;
                for (j = 0; j < blk_cnt; j++) {
-                        tmp_v_addr = nic->rx_blocks[i][j].block_virt_addr;
+                        tmp_v_addr = mac_control->rings[i].rx_blocks[j].
-                        tmp_p_addr = nic->rx_blocks[i][j].block_dma_addr;
+                                block_virt_addr;
+                        tmp_p_addr = mac_control->rings[i].rx_blocks[j].
+                                block_dma_addr;
                        if (tmp_v_addr == NULL)
                                break;
                        pci_free_consistent(nic->pdev, size,
@@ -566,35 +651,21 @@ static void free_shared_mem(struct s2io_nic *nic)
        for (i = 0; i < config->rx_ring_num; i++) {
                blk_cnt =
                    config->rx_cfg[i].num_rxd / (MAX_RXDS_PER_BLOCK + 1);
-                if (!nic->ba[i])
-                        goto end_free;
                for (j = 0; j < blk_cnt; j++) {
                        int k = 0;
-                        if (!nic->ba[i][j]) {
+                        if (!mac_control->rings[i].ba[j])
-                                kfree(nic->ba[i]);
+                                continue;
-                                goto end_free;
-                        }
                        while (k != MAX_RXDS_PER_BLOCK) {
-                                buffAdd_t *ba = &nic->ba[i][j][k];
+                                buffAdd_t *ba = &mac_control->rings[i].ba[j][k];
-                                if (!ba || !ba->ba_0_org || !ba->ba_1_org)
-                                {
-                                        kfree(nic->ba[i]);
-                                        kfree(nic->ba[i][j]);
-                                        if(ba->ba_0_org)
-                                                kfree(ba->ba_0_org);
-                                        if(ba->ba_1_org)
-                                                kfree(ba->ba_1_org);
-                                        goto end_free;
-                                }
                                kfree(ba->ba_0_org);
                                kfree(ba->ba_1_org);
                                k++;
                        }
-                        kfree(nic->ba[i][j]);
+                        kfree(mac_control->rings[i].ba[j]);
                }
-                kfree(nic->ba[i]);
+                if (mac_control->rings[i].ba)
+                        kfree(mac_control->rings[i].ba);
        }
-end_free:
 #endif
        if (mac_control->stats_mem) {
@@ -605,12 +676,93 @@ end_free:
        }
 }
-/**  
+/**
- *  init_nic - Initialization of hardware 
+ * s2io_verify_pci_mode -
+ */
+static int s2io_verify_pci_mode(nic_t *nic)
+{
+        XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
+        register u64 val64 = 0;
+        int     mode;
+        val64 = readq(&bar0->pci_mode);
+        mode = (u8)GET_PCI_MODE(val64);
+        if ( val64 & PCI_MODE_UNKNOWN_MODE)
+                return -1;      /* Unknown PCI mode */
+        return mode;
+}
+/**
+ * s2io_print_pci_mode -
+ */
+static int s2io_print_pci_mode(nic_t *nic)
+{
+        XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
+        register u64 val64 = 0;
+        int     mode;
+        struct config_param *config = &nic->config;
+        val64 = readq(&bar0->pci_mode);
+        mode = (u8)GET_PCI_MODE(val64);
+        if ( val64 & PCI_MODE_UNKNOWN_MODE)
+                return -1;      /* Unknown PCI mode */
+        if (val64 & PCI_MODE_32_BITS) {
+                DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name);
+        } else {
+                DBG_PRINT(ERR_DBG, "%s: Device is on 64 bit ", nic->dev->name);
+        }
+        switch(mode) {
+                case PCI_MODE_PCI_33:
+                        DBG_PRINT(ERR_DBG, "33MHz PCI bus\n");
+                        config->bus_speed = 33;
+                        break;
+                case PCI_MODE_PCI_66:
+                        DBG_PRINT(ERR_DBG, "66MHz PCI bus\n");
+                        config->bus_speed = 133;
+                        break;
+                case PCI_MODE_PCIX_M1_66:
+                        DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n");
+                        config->bus_speed = 133; /* Herc doubles the clock rate */
+                        break;
+                case PCI_MODE_PCIX_M1_100:
+                        DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n");
+                        config->bus_speed = 200;
+                        break;
+                case PCI_MODE_PCIX_M1_133:
+                        DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n");
+                        config->bus_speed = 266;
+                        break;
+                case PCI_MODE_PCIX_M2_66:
+                        DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n");
+                        config->bus_speed = 133;
+                        break;
+                case PCI_MODE_PCIX_M2_100:
+                        DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n");
+                        config->bus_speed = 200;
+                        break;
+                case PCI_MODE_PCIX_M2_133:
+                        DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n");
+                        config->bus_speed = 266;
+                        break;
+                default:
+                        return -1;      /* Unsupported bus speed */
+        }
+        return mode;
+}
+/**
+ *  init_nic - Initialization of hardware
 *  @nic: device peivate variable
- *  Description: The function sequentially configures every block 
+ *  Description: The function sequentially configures every block
- *  of the H/W from their reset values. 
+ *  of the H/W from their reset values.
- *  Return Value:  SUCCESS on success and 
+ *  Return Value:  SUCCESS on success and
 *  '-1' on failure (endian settings incorrect).
 */
@@ -626,21 +778,32 @@ static int init_nic(struct s2io_nic *nic)
        struct config_param *config;
        int mdio_cnt = 0, dtx_cnt = 0;
        unsigned long long mem_share;
+        int mem_size;
        mac_control = &nic->mac_control;
        config = &nic->config;
-        /* Initialize swapper control register */
+        /* to set the swapper controle on the card */
-        if (s2io_set_swapper(nic)) {
+        if(s2io_set_swapper(nic)) {
                DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
                return -1;
        }
+        /*
+         * Herc requires EOI to be removed from reset before XGXS, so..
+         */
+        if (nic->device_type & XFRAME_II_DEVICE) {
+                val64 = 0xA500000000ULL;
+                writeq(val64, &bar0->sw_reset);
+                msleep(500);
+                val64 = readq(&bar0->sw_reset);
+        }
        /* Remove XGXS from reset state */
        val64 = 0;
        writeq(val64, &bar0->sw_reset);
-        val64 = readq(&bar0->sw_reset);
        msleep(500);
+        val64 = readq(&bar0->sw_reset);
        /*  Enable Receiving broadcasts */
        add = &bar0->mac_cfg;
@@ -660,48 +823,58 @@ static int init_nic(struct s2io_nic *nic)
        val64 = dev->mtu;
        writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
-        /* 
+        /*
-         * Configuring the XAUI Interface of Xena. 
+         * Configuring the XAUI Interface of Xena.
         * ***************************************
-         * To Configure the Xena's XAUI, one has to write a series 
+         * To Configure the Xena's XAUI, one has to write a series
-         * of 64 bit values into two registers in a particular 
+         * of 64 bit values into two registers in a particular
-         * sequence. Hence a macro 'SWITCH_SIGN' has been defined 
+         * sequence. Hence a macro 'SWITCH_SIGN' has been defined
-         * which will be defined in the array of configuration values 
+         * which will be defined in the array of configuration values
-         * (default_dtx_cfg & default_mdio_cfg) at appropriate places 
+         * (xena_dtx_cfg & xena_mdio_cfg) at appropriate places
-         * to switch writing from one regsiter to another. We continue 
+         * to switch writing from one regsiter to another. We continue
         * writing these values until we encounter the 'END_SIGN' macro.
-         * For example, After making a series of 21 writes into 
+         * For example, After making a series of 21 writes into
-         * dtx_control register the 'SWITCH_SIGN' appears and hence we 
+         * dtx_control register the 'SWITCH_SIGN' appears and hence we
         * start writing into mdio_control until we encounter END_SIGN.
         */
-        while (1) {
+        if (nic->device_type & XFRAME_II_DEVICE) {
-              dtx_cfg:
+                while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
-                while (default_dtx_cfg[dtx_cnt] != END_SIGN) {
+                        SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
-                        if (default_dtx_cfg[dtx_cnt] == SWITCH_SIGN) {
-                                dtx_cnt++;
-                                goto mdio_cfg;
-                        }
-                        SPECIAL_REG_WRITE(default_dtx_cfg[dtx_cnt],
                                          &bar0->dtx_control, UF);
-                        val64 = readq(&bar0->dtx_control);
+                        if (dtx_cnt & 0x1)
+                                msleep(1); /* Necessary!! */
                        dtx_cnt++;
                }
-              mdio_cfg:
+        } else {
-                while (default_mdio_cfg[mdio_cnt] != END_SIGN) {
+                while (1) {
-                        if (default_mdio_cfg[mdio_cnt] == SWITCH_SIGN) {
+                      dtx_cfg:
+                        while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
+                                if (xena_dtx_cfg[dtx_cnt] == SWITCH_SIGN) {
+                                        dtx_cnt++;
+                                        goto mdio_cfg;
+                                }
+                                SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
+                                                  &bar0->dtx_control, UF);
+                                val64 = readq(&bar0->dtx_control);
+                                dtx_cnt++;
+                        }
+                      mdio_cfg:
+                        while (xena_mdio_cfg[mdio_cnt] != END_SIGN) {
+                                if (xena_mdio_cfg[mdio_cnt] == SWITCH_SIGN) {
+                                        mdio_cnt++;
+                                        goto dtx_cfg;
+                                }
+                                SPECIAL_REG_WRITE(xena_mdio_cfg[mdio_cnt],
+                                                  &bar0->mdio_control, UF);
+                                val64 = readq(&bar0->mdio_control);
                                mdio_cnt++;
+                        }
+                        if ((xena_dtx_cfg[dtx_cnt] == END_SIGN) &&
+                            (xena_mdio_cfg[mdio_cnt] == END_SIGN)) {
+                                break;
+                        } else {
                                goto dtx_cfg;
                        }
-                        SPECIAL_REG_WRITE(default_mdio_cfg[mdio_cnt],
-                                          &bar0->mdio_control, UF);
-                        val64 = readq(&bar0->mdio_control);
-                        mdio_cnt++;
-                }
-                if ((default_dtx_cfg[dtx_cnt] == END_SIGN) &&
-                    (default_mdio_cfg[mdio_cnt] == END_SIGN)) {
-                        break;
-                } else {
-                        goto dtx_cfg;
                }
        }
@@ -748,12 +921,20 @@ static int init_nic(struct s2io_nic *nic)
        val64 |= BIT(0);        /* To enable the FIFO partition. */
        writeq(val64, &bar0->tx_fifo_partition_0);
+        /*
+         * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
+         * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
+         */
+        if ((nic->device_type == XFRAME_I_DEVICE) &&
+                (get_xena_rev_id(nic->pdev) < 4))
+                writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);
        val64 = readq(&bar0->tx_fifo_partition_0);
        DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
                  &bar0->tx_fifo_partition_0, (unsigned long long) val64);
-        /* 
+        /*
-         * Initialization of Tx_PA_CONFIG register to ignore packet 
+         * Initialization of Tx_PA_CONFIG register to ignore packet
         * integrity checking.
         */
        val64 = readq(&bar0->tx_pa_cfg);
@@ -770,85 +951,304 @@ static int init_nic(struct s2io_nic *nic)
        }
        writeq(val64, &bar0->rx_queue_priority);
-        /* 
+        /*
-         * Allocating equal share of memory to all the 
+         * Allocating equal share of memory to all the
         * configured Rings.
         */
        val64 = 0;
+        if (nic->device_type & XFRAME_II_DEVICE)
+                mem_size = 32;
+        else
+                mem_size = 64;
        for (i = 0; i < config->rx_ring_num; i++) {
                switch (i) {
                case 0:
-                        mem_share = (64 / config->rx_ring_num +
+                        mem_share = (mem_size / config->rx_ring_num +
-                                     64 % config->rx_ring_num);
+                                     mem_size % config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
                        continue;
                case 1:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
                        continue;
                case 2:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
                        continue;
                case 3:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
                        continue;
                case 4:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
                        continue;
                case 5:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
                        continue;
                case 6:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
                        continue;
                case 7:
-                        mem_share = (64 / config->rx_ring_num);
+                        mem_share = (mem_size / config->rx_ring_num);
                        val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
                        continue;
                }
        }
        writeq(val64, &bar0->rx_queue_cfg);
-        /* 
+        /*
-         * Initializing the Tx round robin registers to 0.
+         * Filling Tx round robin registers
-         * Filling Tx and Rx round robin registers as per the 
+         * as per the number of FIFOs
-         * number of FIFOs and Rings is still TODO.
-         */
-        writeq(0, &bar0->tx_w_round_robin_0);
-        writeq(0, &bar0->tx_w_round_robin_1);
-        writeq(0, &bar0->tx_w_round_robin_2);
-        writeq(0, &bar0->tx_w_round_robin_3);
-        writeq(0, &bar0->tx_w_round_robin_4);
-        /* 
-         * TODO
-         * Disable Rx steering. Hard coding all packets be steered to
-         * Queue 0 for now. 
         */
-        val64 = 0x8080808080808080ULL;
+        switch (config->tx_fifo_num) {
-        writeq(val64, &bar0->rts_qos_steering);
+        case 1:
+                val64 = 0x0000000000000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 2:
+                val64 = 0x0000010000010000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0100000100000100ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0001000001000001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0000010000010000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0100000000000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 3:
+                val64 = 0x0001000102000001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0001020000010001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0200000100010200ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0001000102000001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0001020000000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 4:
+                val64 = 0x0001020300010200ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0100000102030001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0200010000010203ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0001020001000001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0203000100000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 5:
+                val64 = 0x0001000203000102ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0001020001030004ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0001000203000102ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0001020001030004ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0001000000000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 6:
+                val64 = 0x0001020304000102ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0304050001020001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0203000100000102ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0304000102030405ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0001000200000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 7:
+                val64 = 0x0001020001020300ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0102030400010203ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0405060001020001ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0304050000010200ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0102030000000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        case 8:
+                val64 = 0x0001020300040105ULL;
+                writeq(val64, &bar0->tx_w_round_robin_0);
+                val64 = 0x0200030106000204ULL;
+                writeq(val64, &bar0->tx_w_round_robin_1);
+                val64 = 0x0103000502010007ULL;
+                writeq(val64, &bar0->tx_w_round_robin_2);
+                val64 = 0x0304010002060500ULL;
+                writeq(val64, &bar0->tx_w_round_robin_3);
+                val64 = 0x0103020400000000ULL;
+                writeq(val64, &bar0->tx_w_round_robin_4);
+                break;
+        }
+        /* Filling the Rx round robin registers as per the
+         * number of Rings and steering based on QoS.
+         */
+        switch (config->rx_ring_num) {
+        case 1:
+                val64 = 0x8080808080808080ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 2:
+                val64 = 0x0000010000010000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0100000100000100ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0001000001000001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0000010000010000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0100000000000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8080808040404040ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 3:
+                val64 = 0x0001000102000001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0001020000010001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0200000100010200ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0001000102000001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0001020000000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8080804040402020ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 4:
+                val64 = 0x0001020300010200ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0100000102030001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0200010000010203ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0001020001000001ULL;  
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0203000100000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8080404020201010ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 5:
+                val64 = 0x0001000203000102ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0001020001030004ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0001000203000102ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0001020001030004ULL;
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0001000000000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8080404020201008ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 6:
+                val64 = 0x0001020304000102ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0304050001020001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0203000100000102ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0304000102030405ULL;
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0001000200000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8080404020100804ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 7:
+                val64 = 0x0001020001020300ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0102030400010203ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0405060001020001ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0304050000010200ULL;
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0102030000000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8080402010080402ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        case 8:
+                val64 = 0x0001020300040105ULL;
+                writeq(val64, &bar0->rx_w_round_robin_0);
+                val64 = 0x0200030106000204ULL;
+                writeq(val64, &bar0->rx_w_round_robin_1);
+                val64 = 0x0103000502010007ULL;
+                writeq(val64, &bar0->rx_w_round_robin_2);
+                val64 = 0x0304010002060500ULL;
+                writeq(val64, &bar0->rx_w_round_robin_3);
+                val64 = 0x0103020400000000ULL;
+                writeq(val64, &bar0->rx_w_round_robin_4);
+                val64 = 0x8040201008040201ULL;
+                writeq(val64, &bar0->rts_qos_steering);
+                break;
+        }
        /* UDP Fix */
        val64 = 0;
-        for (i = 1; i < 8; i++)
+        for (i = 0; i < 8; i++)
+                writeq(val64, &bar0->rts_frm_len_n[i]);
+        /* Set the default rts frame length for the rings configured */
+        val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
+        for (i = 0 ; i < config->rx_ring_num ; i++)
                writeq(val64, &bar0->rts_frm_len_n[i]);
-        /* Set rts_frm_len register for fifo 0 */
+        /* Set the frame length for the configured rings
-        writeq(MAC_RTS_FRM_LEN_SET(dev->mtu + 22),
+         * desired by the user
-               &bar0->rts_frm_len_n[0]);
+         */
+        for (i = 0; i < config->rx_ring_num; i++) {
+                /* If rts_frm_len[i] == 0 then it is assumed that user not
+                 * specified frame length steering.
+                 * If the user provides the frame length then program
+                 * the rts_frm_len register for those values or else
+                 * leave it as it is.
+                 */
+                if (rts_frm_len[i] != 0) {
+                        writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
+                                &bar0->rts_frm_len_n[i]);
+                }
+        }
-        /* Enable statistics */
+        /* Program statistics memory */
        writeq(mac_control->stats_mem_phy, &bar0->stat_addr);
-        val64 = SET_UPDT_PERIOD(Stats_refresh_time) |
-            STAT_CFG_STAT_RO | STAT_CFG_STAT_EN;
-        writeq(val64, &bar0->stat_cfg);
-        /* 
+        if (nic->device_type == XFRAME_II_DEVICE) {
+                val64 = STAT_BC(0x320);
+                writeq(val64, &bar0->stat_byte_cnt);
+        }
+        /*
         * Initializing the sampling rate for the device to calculate the
         * bandwidth utilization.
         */
@@ -857,30 +1257,38 @@ static int init_nic(struct s2io_nic *nic)
        writeq(val64, &bar0->mac_link_util);
-        /* 
+        /*
-         * Initializing the Transmit and Receive Traffic Interrupt 
+         * Initializing the Transmit and Receive Traffic Interrupt
         * Scheme.
         */
-        /* TTI Initialization. Default Tx timer gets us about
+        /*
+         * TTI Initialization. Default Tx timer gets us about
         * 250 interrupts per sec. Continuous interrupts are enabled
         * by default.
         */
-        val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078) |
+        if (nic->device_type == XFRAME_II_DEVICE) {
-            TTI_DATA1_MEM_TX_URNG_A(0xA) |
+                int count = (nic->config.bus_speed * 125)/2;
+                val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
+        } else {
+                val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);
+        }
+        val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
            TTI_DATA1_MEM_TX_URNG_B(0x10) |
-            TTI_DATA1_MEM_TX_URNG_C(0x30) | TTI_DATA1_MEM_TX_TIMER_AC_EN |
+            TTI_DATA1_MEM_TX_URNG_C(0x30) | TTI_DATA1_MEM_TX_TIMER_AC_EN;
-                TTI_DATA1_MEM_TX_TIMER_CI_EN;
+                if (use_continuous_tx_intrs)
+                        val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
        writeq(val64, &bar0->tti_data1_mem);
        val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
            TTI_DATA2_MEM_TX_UFC_B(0x20) |
-            TTI_DATA2_MEM_TX_UFC_C(0x40) | TTI_DATA2_MEM_TX_UFC_D(0x80);
+            TTI_DATA2_MEM_TX_UFC_C(0x70) | TTI_DATA2_MEM_TX_UFC_D(0x80);
        writeq(val64, &bar0->tti_data2_mem);
        val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD;
        writeq(val64, &bar0->tti_command_mem);
-        /* 
+        /*
         * Once the operation completes, the Strobe bit of the command
         * register will be reset. We poll for this particular condition
         * We wait for a maximum of 500ms for the operation to complete,
@@ -901,52 +1309,97 @@ static int init_nic(struct s2io_nic *nic)
                time++;
        }
-        /* RTI Initialization */
+        if (nic->config.bimodal) {
-        val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF) |
+                int k = 0;
-            RTI_DATA1_MEM_RX_URNG_A(0xA) |
+                for (k = 0; k < config->rx_ring_num; k++) {
-            RTI_DATA1_MEM_RX_URNG_B(0x10) |
+                        val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD;
-            RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;
+                        val64 |= TTI_CMD_MEM_OFFSET(0x38+k);
+                        writeq(val64, &bar0->tti_command_mem);
+                /*
+                 * Once the operation completes, the Strobe bit of the command
+                 * register will be reset. We poll for this particular condition
+                 * We wait for a maximum of 500ms for the operation to complete,
+                 * if it's not complete by then we return error.
+                */
+                        time = 0;
+                        while (TRUE) {
+                                val64 = readq(&bar0->tti_command_mem);
+                                if (!(val64 & TTI_CMD_MEM_STROBE_NEW_CMD)) {
+                                        break;
+                                }
+                                if (time > 10) {
+                                        DBG_PRINT(ERR_DBG,
+                                                "%s: TTI init Failed\n",
+                                        dev->name);
+                                        return -1;
+                                }
+                                time++;
+                                msleep(50);
+                        }
+                }
+        } else {
-        writeq(val64, &bar0->rti_data1_mem);
+                /* RTI Initialization */
+                if (nic->device_type == XFRAME_II_DEVICE) {
+                        /*
+                         * Programmed to generate Apprx 500 Intrs per
+                         * second
+                         */
+                        int count = (nic->config.bus_speed * 125)/4;
+                        val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
+                } else {
+                        val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
+                }
+                val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
+                    RTI_DATA1_MEM_RX_URNG_B(0x10) |
+                    RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;
-        val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
+                writeq(val64, &bar0->rti_data1_mem);
-            RTI_DATA2_MEM_RX_UFC_B(0x2) |
-            RTI_DATA2_MEM_RX_UFC_C(0x40) | RTI_DATA2_MEM_RX_UFC_D(0x80);
-        writeq(val64, &bar0->rti_data2_mem);
-        val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD;
+                val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
-        writeq(val64, &bar0->rti_command_mem);
+                    RTI_DATA2_MEM_RX_UFC_B(0x2) |
+                    RTI_DATA2_MEM_RX_UFC_C(0x40) | RTI_DATA2_MEM_RX_UFC_D(0x80);
+                writeq(val64, &bar0->rti_data2_mem);
-        /* 
+                for (i = 0; i < config->rx_ring_num; i++) {
-         * Once the operation completes, the Strobe bit of the command
+                        val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
-         * register will be reset. We poll for this particular condition
+                                        | RTI_CMD_MEM_OFFSET(i);
-         * We wait for a maximum of 500ms for the operation to complete,
+                        writeq(val64, &bar0->rti_command_mem);
-         * if it's not complete by then we return error.
-         */
+                        /*
-        time = 0;
+                         * Once the operation completes, the Strobe bit of the
-        while (TRUE) {
+                         * command register will be reset. We poll for this
-                val64 = readq(&bar0->rti_command_mem);
+                         * particular condition. We wait for a maximum of 500ms
-                if (!(val64 & TTI_CMD_MEM_STROBE_NEW_CMD)) {
+                         * for the operation to complete, if it's not complete
-                        break;
+                         * by then we return error.
-                }
+                         */
-                if (time > 10) {
+                        time = 0;
-                        DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
+                        while (TRUE) {
-                                  dev->name);
+                                val64 = readq(&bar0->rti_command_mem);
-                        return -1;
+                                if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD)) {
+                                        break;
+                                }
+                                if (time > 10) {
+                                        DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
+                                                  dev->name);
+                                        return -1;
+                                }
+                                time++;
+                                msleep(50);
+                        }
                }
-                time++;
-                msleep(50);
        }
-        /* 
+        /*
-         * Initializing proper values as Pause threshold into all 
+         * Initializing proper values as Pause threshold into all
         * the 8 Queues on Rx side.
         */
        writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
        writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);
        /* Disable RMAC PAD STRIPPING */
-        add = &bar0->mac_cfg;
+        add = (void *) &bar0->mac_cfg;
        val64 = readq(&bar0->mac_cfg);
        val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
        writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
@@ -955,8 +1408,8 @@ static int init_nic(struct s2io_nic *nic)
        writel((u32) (val64 >> 32), (add + 4));
        val64 = readq(&bar0->mac_cfg);
-        /* 
+        /*
-         * Set the time value to be inserted in the pause frame 
+         * Set the time value to be inserted in the pause frame
         * generated by xena.
         */
        val64 = readq(&bar0->rmac_pause_cfg);
@@ -964,7 +1417,7 @@ static int init_nic(struct s2io_nic *nic)
        val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
        writeq(val64, &bar0->rmac_pause_cfg);
-        /* 
+        /*
         * Set the Threshold Limit for Generating the pause frame
         * If the amount of data in any Queue exceeds ratio of
         * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
@@ -988,25 +1441,54 @@ static int init_nic(struct s2io_nic *nic)
        }
        writeq(val64, &bar0->mc_pause_thresh_q4q7);
-        /* 
+        /*
-         * TxDMA will stop Read request if the number of read split has 
+         * TxDMA will stop Read request if the number of read split has
         * exceeded the limit pointed by shared_splits
         */
        val64 = readq(&bar0->pic_control);
        val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
        writeq(val64, &bar0->pic_control);
+        /*
+         * Programming the Herc to split every write transaction
+         * that does not start on an ADB to reduce disconnects.
+         */
+        if (nic->device_type == XFRAME_II_DEVICE) {
+                val64 = WREQ_SPLIT_MASK_SET_MASK(255);
+                writeq(val64, &bar0->wreq_split_mask);
+        }
+        /* Setting Link stability period to 64 ms */ 
+        if (nic->device_type == XFRAME_II_DEVICE) {
+                val64 = MISC_LINK_STABILITY_PRD(3);
+                writeq(val64, &bar0->misc_control);
+        }
        return SUCCESS;
 }
+#define LINK_UP_DOWN_INTERRUPT          1
+#define MAC_RMAC_ERR_TIMER              2
-/**  
+#if defined(CONFIG_MSI_MODE) || defined(CONFIG_MSIX_MODE)
- *  en_dis_able_nic_intrs - Enable or Disable the interrupts 
+#define s2io_link_fault_indication(x) MAC_RMAC_ERR_TIMER
+#else
+int s2io_link_fault_indication(nic_t *nic)
+{
+        if (nic->device_type == XFRAME_II_DEVICE)
+                return LINK_UP_DOWN_INTERRUPT;
+        else
+                return MAC_RMAC_ERR_TIMER;
+}
+#endif
+/**
+ *  en_dis_able_nic_intrs - Enable or Disable the interrupts
 *  @nic: device private variable,
 *  @mask: A mask indicating which Intr block must be modified and,
 *  @flag: A flag indicating whether to enable or disable the Intrs.
 *  Description: This function will either disable or enable the interrupts
- *  depending on the flag argument. The mask argument can be used to 
+ *  depending on the flag argument. The mask argument can be used to
- *  enable/disable any Intr block. 
+ *  enable/disable any Intr block.
 *  Return Value: NONE.
 */
@@ -1024,20 +1506,31 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /*  
+                        /*
-                         * Disabled all PCIX, Flash, MDIO, IIC and GPIO
+                         * If Hercules adapter enable GPIO otherwise
-                         * interrupts for now. 
+                         * disabled all PCIX, Flash, MDIO, IIC and GPIO
-                         * TODO 
+                         * interrupts for now.
+                         * TODO
                         */
-                        writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
+                        if (s2io_link_fault_indication(nic) ==
-                        /* 
+                                        LINK_UP_DOWN_INTERRUPT ) {
+                                temp64 = readq(&bar0->pic_int_mask);
+                                temp64 &= ~((u64) PIC_INT_GPIO);
+                                writeq(temp64, &bar0->pic_int_mask);
+                                temp64 = readq(&bar0->gpio_int_mask);
+                                temp64 &= ~((u64) GPIO_INT_MASK_LINK_UP);
+                                writeq(temp64, &bar0->gpio_int_mask);
+                        } else {
+                                writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
+                        }
+                        /*
                         * No MSI Support is available presently, so TTI and
                         * RTI interrupts are also disabled.
                         */
                } else if (flag == DISABLE_INTRS) {
-                        /*  
+                        /*
-                         * Disable PIC Intrs in the general 
+                         * Disable PIC Intrs in the general
-                         * intr mask register 
+                         * intr mask register
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
                        temp64 = readq(&bar0->general_int_mask);
@@ -1055,27 +1548,27 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /* 
+                        /*
-                         * Keep all interrupts other than PFC interrupt 
+                         * Keep all interrupts other than PFC interrupt
                         * and PCC interrupt disabled in DMA level.
                         */
                        val64 = DISABLE_ALL_INTRS & ~(TXDMA_PFC_INT_M |
                                                      TXDMA_PCC_INT_M);
                        writeq(val64, &bar0->txdma_int_mask);
-                        /* 
+                        /*
-                         * Enable only the MISC error 1 interrupt in PFC block 
+                         * Enable only the MISC error 1 interrupt in PFC block
                         */
                        val64 = DISABLE_ALL_INTRS & (~PFC_MISC_ERR_1);
                        writeq(val64, &bar0->pfc_err_mask);
-                        /* 
+                        /*
-                         * Enable only the FB_ECC error interrupt in PCC block 
+                         * Enable only the FB_ECC error interrupt in PCC block
                         */
                        val64 = DISABLE_ALL_INTRS & (~PCC_FB_ECC_ERR);
                        writeq(val64, &bar0->pcc_err_mask);
                } else if (flag == DISABLE_INTRS) {
-                        /* 
+                        /*
-                         * Disable TxDMA Intrs in the general intr mask 
+                         * Disable TxDMA Intrs in the general intr mask
-                         * register 
+                         * register
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->txdma_int_mask);
                        writeq(DISABLE_ALL_INTRS, &bar0->pfc_err_mask);
@@ -1093,15 +1586,15 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /* 
+                        /*
-                         * All RxDMA block interrupts are disabled for now 
+                         * All RxDMA block interrupts are disabled for now
-                         * TODO 
+                         * TODO
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->rxdma_int_mask);
                } else if (flag == DISABLE_INTRS) {
-                        /*  
+                        /*
-                         * Disable RxDMA Intrs in the general intr mask 
+                         * Disable RxDMA Intrs in the general intr mask
-                         * register 
+                         * register
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->rxdma_int_mask);
                        temp64 = readq(&bar0->general_int_mask);
@@ -1118,22 +1611,13 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /* 
+                        /*
-                         * All MAC block error interrupts are disabled for now 
+                         * All MAC block error interrupts are disabled for now
-                         * except the link status change interrupt.
                         * TODO
                         */
-                        val64 = MAC_INT_STATUS_RMAC_INT;
-                        temp64 = readq(&bar0->mac_int_mask);
-                        temp64 &= ~((u64) val64);
-                        writeq(temp64, &bar0->mac_int_mask);
-                        val64 = readq(&bar0->mac_rmac_err_mask);
-                        val64 &= ~((u64) RMAC_LINK_STATE_CHANGE_INT);
-                        writeq(val64, &bar0->mac_rmac_err_mask);
                } else if (flag == DISABLE_INTRS) {
-                        /*  
+                        /*
-                         * Disable MAC Intrs in the general intr mask register 
+                         * Disable MAC Intrs in the general intr mask register
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->mac_int_mask);
                        writeq(DISABLE_ALL_INTRS,
@@ -1152,14 +1636,14 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /* 
+                        /*
                         * All XGXS block error interrupts are disabled for now
-                         * TODO 
+                         * TODO
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->xgxs_int_mask);
                } else if (flag == DISABLE_INTRS) {
-                        /*  
+                        /*
-                         * Disable MC Intrs in the general intr mask register 
+                         * Disable MC Intrs in the general intr mask register
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->xgxs_int_mask);
                        temp64 = readq(&bar0->general_int_mask);
@@ -1175,11 +1659,11 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /* 
+                        /*
-                         * All MC block error interrupts are disabled for now
+                         * Enable all MC Intrs.
-                         * TODO 
                         */
-                        writeq(DISABLE_ALL_INTRS, &bar0->mc_int_mask);
+                        writeq(0x0, &bar0->mc_int_mask);
+                        writeq(0x0, &bar0->mc_err_mask);
                } else if (flag == DISABLE_INTRS) {
                        /*
                         * Disable MC Intrs in the general intr mask register
@@ -1199,14 +1683,14 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        temp64 = readq(&bar0->general_int_mask);
                        temp64 &= ~((u64) val64);
                        writeq(temp64, &bar0->general_int_mask);
-                        /* 
+                        /*
                         * Enable all the Tx side interrupts
-                         * writing 0 Enables all 64 TX interrupt levels 
+                         * writing 0 Enables all 64 TX interrupt levels
                         */
                        writeq(0x0, &bar0->tx_traffic_mask);
                } else if (flag == DISABLE_INTRS) {
-                        /* 
+                        /*
-                         * Disable Tx Traffic Intrs in the general intr mask 
+                         * Disable Tx Traffic Intrs in the general intr mask
                         * register.
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
@@ -1226,8 +1710,8 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
                        /* writing 0 Enables all 8 RX interrupt levels */
                        writeq(0x0, &bar0->rx_traffic_mask);
                } else if (flag == DISABLE_INTRS) {
-                        /*  
+                        /*
-                         * Disable Rx Traffic Intrs in the general intr mask 
+                         * Disable Rx Traffic Intrs in the general intr mask
                         * register.
                         */
                        writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
@@ -1238,24 +1722,66 @@ static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
        }
 }
-/**  
+static int check_prc_pcc_state(u64 val64, int flag, int rev_id, int herc)
- *  verify_xena_quiescence - Checks whether the H/W is ready 
+{
+        int ret = 0;
+        if (flag == FALSE) {
+                if ((!herc && (rev_id >= 4)) || herc) {
+                        if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) &&
+                            ((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
+                             ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
+                                ret = 1;
+                        }
+                }else {
+                        if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) &&
+                            ((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
+                             ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
+                                ret = 1;
+                        }
+                }
+        } else {
+                if ((!herc && (rev_id >= 4)) || herc) {
+                        if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
+                             ADAPTER_STATUS_RMAC_PCC_IDLE) &&
+                            (!(val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ||
+                             ((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
+                              ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
+                                ret = 1;
+                        }
+                } else {
+                        if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
+                             ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) &&
+                            (!(val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ||
+                             ((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
+                              ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
+                                ret = 1;
+                        }
+                }
+        }
+        return ret;
+}
+/**
+ *  verify_xena_quiescence - Checks whether the H/W is ready
 *  @val64 :  Value read from adapter status register.
 *  @flag : indicates if the adapter enable bit was ever written once
 *  before.
 *  Description: Returns whether the H/W is ready to go or not. Depending
- *  on whether adapter enable bit was written or not the comparison 
+ *  on whether adapter enable bit was written or not the comparison
 *  differs and the calling function passes the input argument flag to
 *  indicate this.
- *  Return: 1 If xena is quiescence 
+ *  Return: 1 If xena is quiescence
 *          0 If Xena is not quiescence
 */
-static int verify_xena_quiescence(u64 val64, int flag)
+static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag)
 {
-        int ret = 0;
+        int ret = 0, herc;
        u64 tmp64 = ~((u64) val64);
+        int rev_id = get_xena_rev_id(sp->pdev);
+        herc = (sp->device_type == XFRAME_II_DEVICE);
        if (!
            (tmp64 &
             (ADAPTER_STATUS_TDMA_READY | ADAPTER_STATUS_RDMA_READY |
@@ -1263,25 +1789,7 @@ static int verify_xena_quiescence(u64 val64, int flag)
              ADAPTER_STATUS_PIC_QUIESCENT | ADAPTER_STATUS_MC_DRAM_READY |
              ADAPTER_STATUS_MC_QUEUES_READY | ADAPTER_STATUS_M_PLL_LOCK |
              ADAPTER_STATUS_P_PLL_LOCK))) {
-                if (flag == FALSE) {
+                ret = check_prc_pcc_state(val64, flag, rev_id, herc);
-                        if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) &&
-                            ((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
-                             ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
-                                ret = 1;
-                        }
-                } else {
-                        if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
-                             ADAPTER_STATUS_RMAC_PCC_IDLE) &&
-                            (!(val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ||
-                             ((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
-                              ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
-                                ret = 1;
-                        }
-                }
        }
        return ret;
@@ -1290,12 +1798,12 @@ static int verify_xena_quiescence(u64 val64, int flag)
 /**
 * fix_mac_address -  Fix for Mac addr problem on Alpha platforms
 * @sp: Pointer to device specifc structure
- * Description : 
+ * Description :
 * New procedure to clear mac address reading  problems on Alpha platforms
 *
 */
-static void fix_mac_address(nic_t * sp)
+void fix_mac_address(nic_t * sp)
 {
        XENA_dev_config_t __iomem *bar0 = sp->bar0;
        u64 val64;
@@ -1303,20 +1811,21 @@ static void fix_mac_address(nic_t * sp)
        while (fix_mac[i] != END_SIGN) {
                writeq(fix_mac[i++], &bar0->gpio_control);
+                udelay(10);
                val64 = readq(&bar0->gpio_control);
        }
 }
 /**
- *  start_nic - Turns the device on   
+ *  start_nic - Turns the device on
 *  @nic : device private variable.
- *  Description: 
+ *  Description:
- *  This function actually turns the device on. Before this  function is 
+ *  This function actually turns the device on. Before this  function is
- *  called,all Registers are configured from their reset states 
+ *  called,all Registers are configured from their reset states
- *  and shared memory is allocated but the NIC is still quiescent. On 
+ *  and shared memory is allocated but the NIC is still quiescent. On
 *  calling this function, the device interrupts are cleared and the NIC is
 *  literally switched on by writing into the adapter control register.
- *  Return Value: 
+ *  Return Value:
 *  SUCCESS on success and -1 on failure.
 */
@@ -1325,8 +1834,8 @@ static int start_nic(struct s2io_nic *nic)
        XENA_dev_config_t __iomem *bar0 = nic->bar0;
        struct net_device *dev = nic->dev;
        register u64 val64 = 0;
-        u16 interruptible, i;
+        u16 interruptible;
-        u16 subid;
+        u16 subid, i;
        mac_info_t *mac_control;
        struct config_param *config;
@@ -1335,10 +1844,12 @@ static int start_nic(struct s2io_nic *nic)
        /*  PRC Initialization and configuration */
        for (i = 0; i < config->rx_ring_num; i++) {
-                writeq((u64) nic->rx_blocks[i][0].block_dma_addr,
+                writeq((u64) mac_control->rings[i].rx_blocks[0].block_dma_addr,
                       &bar0->prc_rxd0_n[i]);
                val64 = readq(&bar0->prc_ctrl_n[i]);
+                if (nic->config.bimodal)
+                        val64 |= PRC_CTRL_BIMODAL_INTERRUPT;
 #ifndef CONFIG_2BUFF_MODE
                val64 |= PRC_CTRL_RC_ENABLED;
 #else
@@ -1354,7 +1865,7 @@ static int start_nic(struct s2io_nic *nic)
        writeq(val64, &bar0->rx_pa_cfg);
 #endif
-        /* 
+        /*
         * Enabling MC-RLDRAM. After enabling the device, we timeout
         * for around 100ms, which is approximately the time required
         * for the device to be ready for operation.
@@ -1364,27 +1875,27 @@ static int start_nic(struct s2io_nic *nic)
        SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
        val64 = readq(&bar0->mc_rldram_mrs);
-        msleep(100);                    /* Delay by around 100 ms. */
+        msleep(100);    /* Delay by around 100 ms. */
        /* Enabling ECC Protection. */
        val64 = readq(&bar0->adapter_control);
        val64 &= ~ADAPTER_ECC_EN;
        writeq(val64, &bar0->adapter_control);
-        /* 
+        /*
-         * Clearing any possible Link state change interrupts that 
+         * Clearing any possible Link state change interrupts that
         * could have popped up just before Enabling the card.
         */
        val64 = readq(&bar0->mac_rmac_err_reg);
        if (val64)
                writeq(val64, &bar0->mac_rmac_err_reg);
-        /* 
+        /*
-         * Verify if the device is ready to be enabled, if so enable 
+         * Verify if the device is ready to be enabled, if so enable
         * it.
         */
        val64 = readq(&bar0->adapter_status);
-        if (!verify_xena_quiescence(val64, nic->device_enabled_once)) {
+        if (!verify_xena_quiescence(nic, val64, nic->device_enabled_once)) {
                DBG_PRINT(ERR_DBG, "%s: device is not ready, ", dev->name);
                DBG_PRINT(ERR_DBG, "Adapter status reads: 0x%llx\n",
                          (unsigned long long) val64);
@@ -1392,16 +1903,18 @@ static int start_nic(struct s2io_nic *nic)
        }
        /*  Enable select interrupts */
-        interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR | TX_MAC_INTR |
+        interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR | MC_INTR;
-            RX_MAC_INTR;
+        interruptible |= TX_PIC_INTR | RX_PIC_INTR;
+        interruptible |= TX_MAC_INTR | RX_MAC_INTR;
        en_dis_able_nic_intrs(nic, interruptible, ENABLE_INTRS);
-        /* 
+        /*
         * With some switches, link might be already up at this point.
-         * Because of this weird behavior, when we enable laser, 
+         * Because of this weird behavior, when we enable laser,
-         * we may not get link. We need to handle this. We cannot 
+         * we may not get link. We need to handle this. We cannot
-         * figure out which switch is misbehaving. So we are forced to 
+         * figure out which switch is misbehaving. So we are forced to
-         * make a global change. 
+         * make a global change.
         */
        /* Enabling Laser. */
@@ -1411,44 +1924,30 @@ static int start_nic(struct s2io_nic *nic)
        /* SXE-002: Initialize link and activity LED */
        subid = nic->pdev->subsystem_device;
-        if ((subid & 0xFF) >= 0x07) {
+        if (((subid & 0xFF) >= 0x07) &&
+            (nic->device_type == XFRAME_I_DEVICE)) {
                val64 = readq(&bar0->gpio_control);
                val64 |= 0x0000800000000000ULL;
                writeq(val64, &bar0->gpio_control);
                val64 = 0x0411040400000000ULL;
-                writeq(val64, (void __iomem *) bar0 + 0x2700);
+                writeq(val64, (void __iomem *) ((u8 *) bar0 + 0x2700));
        }
-        /* 
+        /*
-         * Don't see link state interrupts on certain switches, so 
+         * Don't see link state interrupts on certain switches, so
         * directly scheduling a link state task from here.
         */
        schedule_work(&nic->set_link_task);
-        /* 
-         * Here we are performing soft reset on XGXS to 
-         * force link down. Since link is already up, we will get
-         * link state change interrupt after this reset
-         */
-        SPECIAL_REG_WRITE(0x80010515001E0000ULL, &bar0->dtx_control, UF);
-        val64 = readq(&bar0->dtx_control);
-        udelay(50);
-        SPECIAL_REG_WRITE(0x80010515001E00E0ULL, &bar0->dtx_control, UF);
-        val64 = readq(&bar0->dtx_control);
-        udelay(50);
-        SPECIAL_REG_WRITE(0x80070515001F00E4ULL, &bar0->dtx_control, UF);
-        val64 = readq(&bar0->dtx_control);
-        udelay(50);
        return SUCCESS;
 }
-/** 
+/**
- *  free_tx_buffers - Free all queued Tx buffers 
+ *  free_tx_buffers - Free all queued Tx buffers
 *  @nic : device private variable.
- *  Description: 
+ *  Description:
 *  Free all queued Tx buffers.
- *  Return Value: void 
+ *  Return Value: void
 */
 static void free_tx_buffers(struct s2io_nic *nic)
@@ -1459,39 +1958,61 @@ static void free_tx_buffers(struct s2io_nic *nic)
        int i, j;
        mac_info_t *mac_control;
        struct config_param *config;
-        int cnt = 0;
+        int cnt = 0, frg_cnt;
        mac_control = &nic->mac_control;
        config = &nic->config;
        for (i = 0; i < config->tx_fifo_num; i++) {
                for (j = 0; j < config->tx_cfg[i].fifo_len - 1; j++) {
-                        txdp = (TxD_t *) nic->list_info[i][j].
+                        txdp = (TxD_t *) mac_control->fifos[i].list_info[j].
                            list_virt_addr;
                        skb =
                            (struct sk_buff *) ((unsigned long) txdp->
                                                Host_Control);
                        if (skb == NULL) {
-                                memset(txdp, 0, sizeof(TxD_t));
+                                memset(txdp, 0, sizeof(TxD_t) *
+                                       config->max_txds);
                                continue;
                        }
+                        frg_cnt = skb_shinfo(skb)->nr_frags;
+                        pci_unmap_single(nic->pdev, (dma_addr_t)
+                                         txdp->Buffer_Pointer,
+                                         skb->len - skb->data_len,
+                                         PCI_DMA_TODEVICE);
+                        if (frg_cnt) {
+                                TxD_t *temp;
+                                temp = txdp;
+                                txdp++;
+                                for (j = 0; j < frg_cnt; j++, txdp++) {
+                                        skb_frag_t *frag =
+                                            &skb_shinfo(skb)->frags[j];
+                                        pci_unmap_page(nic->pdev,
+                                                       (dma_addr_t)
+                                                       txdp->
+                                                       Buffer_Pointer,
+                                                       frag->size,
+                                                       PCI_DMA_TODEVICE);
+                                }
+                                txdp = temp;
+                        }
                        dev_kfree_skb(skb);
-                        memset(txdp, 0, sizeof(TxD_t));
+                        memset(txdp, 0, sizeof(TxD_t) * config->max_txds);
                        cnt++;
                }
                DBG_PRINT(INTR_DBG,
                          "%s:forcibly freeing %d skbs on FIFO%d\n",
                          dev->name, cnt, i);
-                mac_control->tx_curr_get_info[i].offset = 0;
+                mac_control->fifos[i].tx_curr_get_info.offset = 0;
-                mac_control->tx_curr_put_info[i].offset = 0;
+                mac_control->fifos[i].tx_curr_put_info.offset = 0;
        }
 }
-/**  
+/**
- *   stop_nic -  To stop the nic  
+ *   stop_nic -  To stop the nic
 *   @nic ; device private variable.
- *   Description: 
+ *   Description:
- *   This function does exactly the opposite of what the start_nic() 
+ *   This function does exactly the opposite of what the start_nic()
 *   function does. This function is called to stop the device.
 *   Return Value:
 *   void.
@@ -1509,8 +2030,9 @@ static void stop_nic(struct s2io_nic *nic)
        config = &nic->config;
        /*  Disable all interrupts */
-        interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR | TX_MAC_INTR |
+        interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR | MC_INTR;
-            RX_MAC_INTR;
+        interruptible |= TX_PIC_INTR | RX_PIC_INTR;
+        interruptible |= TX_MAC_INTR | RX_MAC_INTR;
        en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);
        /*  Disable PRCs */
@@ -1521,11 +2043,11 @@ static void stop_nic(struct s2io_nic *nic)
        }
 }
-/**  
+/**
- *  fill_rx_buffers - Allocates the Rx side skbs 
+ *  fill_rx_buffers - Allocates the Rx side skbs
 *  @nic:  device private variable
- *  @ring_no: ring number 
+ *  @ring_no: ring number
- *  Description: 
+ *  Description:
 *  The function allocates Rx side skbs and puts the physical
 *  address of these buffers into the RxD buffer pointers, so that the NIC
 *  can DMA the received frame into these locations.
@@ -1533,8 +2055,8 @@ static void stop_nic(struct s2io_nic *nic)
 *  1. single buffer,
 *  2. three buffer and
 *  3. Five buffer modes.
- *  Each mode defines how many fragments the received frame will be split 
+ *  Each mode defines how many fragments the received frame will be split
- *  up into by the NIC. The frame is split into L3 header, L4 Header, 
+ *  up into by the NIC. The frame is split into L3 header, L4 Header,
 *  L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
 *  is split into 3 fragments. As of now only single buffer mode is
 *  supported.
@@ -1542,7 +2064,7 @@ static void stop_nic(struct s2io_nic *nic)
 *  SUCCESS on success or an appropriate -ve value on failure.
 */
-static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
+int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
 {
        struct net_device *dev = nic->dev;
        struct sk_buff *skb;
@@ -1550,34 +2072,35 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
        int off, off1, size, block_no, block_no1;
        int offset, offset1;
        u32 alloc_tab = 0;
-        u32 alloc_cnt = nic->pkt_cnt[ring_no] -
+        u32 alloc_cnt;
-            atomic_read(&nic->rx_bufs_left[ring_no]);
        mac_info_t *mac_control;
        struct config_param *config;
 #ifdef CONFIG_2BUFF_MODE
        RxD_t *rxdpnext;
        int nextblk;
-        unsigned long tmp;
+        u64 tmp;
        buffAdd_t *ba;
        dma_addr_t rxdpphys;
 #endif
 #ifndef CONFIG_S2IO_NAPI
        unsigned long flags;
 #endif
+        RxD_t *first_rxdp = NULL;
        mac_control = &nic->mac_control;
        config = &nic->config;
+        alloc_cnt = mac_control->rings[ring_no].pkt_cnt -
+            atomic_read(&nic->rx_bufs_left[ring_no]);
        size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
            HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
        while (alloc_tab < alloc_cnt) {
-                block_no = mac_control->rx_curr_put_info[ring_no].
+                block_no = mac_control->rings[ring_no].rx_curr_put_info.
                    block_index;
-                block_no1 = mac_control->rx_curr_get_info[ring_no].
+                block_no1 = mac_control->rings[ring_no].rx_curr_get_info.
                    block_index;
-                off = mac_control->rx_curr_put_info[ring_no].offset;
+                off = mac_control->rings[ring_no].rx_curr_put_info.offset;
-                off1 = mac_control->rx_curr_get_info[ring_no].offset;
+                off1 = mac_control->rings[ring_no].rx_curr_get_info.offset;
 #ifndef CONFIG_2BUFF_MODE
                offset = block_no * (MAX_RXDS_PER_BLOCK + 1) + off;
                offset1 = block_no1 * (MAX_RXDS_PER_BLOCK + 1) + off1;
@@ -1586,7 +2109,7 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                offset1 = block_no1 * (MAX_RXDS_PER_BLOCK) + off1;
 #endif
-                rxdp = nic->rx_blocks[ring_no][block_no].
+                rxdp = mac_control->rings[ring_no].rx_blocks[block_no].
                    block_virt_addr + off;
                if ((offset == offset1) && (rxdp->Host_Control)) {
                        DBG_PRINT(INTR_DBG, "%s: Get and Put", dev->name);
@@ -1595,15 +2118,15 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                }
 #ifndef CONFIG_2BUFF_MODE
                if (rxdp->Control_1 == END_OF_BLOCK) {
-                        mac_control->rx_curr_put_info[ring_no].
+                        mac_control->rings[ring_no].rx_curr_put_info.
                            block_index++;
-                        mac_control->rx_curr_put_info[ring_no].
+                        mac_control->rings[ring_no].rx_curr_put_info.
-                            block_index %= nic->block_count[ring_no];
+                            block_index %= mac_control->rings[ring_no].block_count;
-                        block_no = mac_control->rx_curr_put_info
+                        block_no = mac_control->rings[ring_no].rx_curr_put_info.
-                            [ring_no].block_index;
+                                block_index;
                        off++;
                        off %= (MAX_RXDS_PER_BLOCK + 1);
-                        mac_control->rx_curr_put_info[ring_no].offset =
+                        mac_control->rings[ring_no].rx_curr_put_info.offset =
                            off;
                        rxdp = (RxD_t *) ((unsigned long) rxdp->Control_2);
                        DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
@@ -1611,30 +2134,30 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                }
 #ifndef CONFIG_S2IO_NAPI
                spin_lock_irqsave(&nic->put_lock, flags);
-                nic->put_pos[ring_no] =
+                mac_control->rings[ring_no].put_pos =
                    (block_no * (MAX_RXDS_PER_BLOCK + 1)) + off;
                spin_unlock_irqrestore(&nic->put_lock, flags);
 #endif
 #else
                if (rxdp->Host_Control == END_OF_BLOCK) {
-                        mac_control->rx_curr_put_info[ring_no].
+                        mac_control->rings[ring_no].rx_curr_put_info.
                            block_index++;
-                        mac_control->rx_curr_put_info[ring_no].
+                        mac_control->rings[ring_no].rx_curr_put_info.block_index
-                            block_index %= nic->block_count[ring_no];
+                            %= mac_control->rings[ring_no].block_count;
-                        block_no = mac_control->rx_curr_put_info
+                        block_no = mac_control->rings[ring_no].rx_curr_put_info
-                            [ring_no].block_index;
+                            .block_index;
                        off = 0;
                        DBG_PRINT(INTR_DBG, "%s: block%d at: 0x%llx\n",
                                  dev->name, block_no,
                                  (unsigned long long) rxdp->Control_1);
-                        mac_control->rx_curr_put_info[ring_no].offset =
+                        mac_control->rings[ring_no].rx_curr_put_info.offset =
                            off;
-                        rxdp = nic->rx_blocks[ring_no][block_no].
+                        rxdp = mac_control->rings[ring_no].rx_blocks[block_no].
                            block_virt_addr;
                }
 #ifndef CONFIG_S2IO_NAPI
                spin_lock_irqsave(&nic->put_lock, flags);
-                nic->put_pos[ring_no] = (block_no *
+                mac_control->rings[ring_no].put_pos = (block_no *
                                         (MAX_RXDS_PER_BLOCK + 1)) + off;
                spin_unlock_irqrestore(&nic->put_lock, flags);
 #endif
@@ -1646,27 +2169,27 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                if (rxdp->Control_2 & BIT(0))
 #endif
                {
-                        mac_control->rx_curr_put_info[ring_no].
+                        mac_control->rings[ring_no].rx_curr_put_info.
                            offset = off;
                        goto end;
                }
 #ifdef  CONFIG_2BUFF_MODE
-                /* 
+                /*
-                 * RxDs Spanning cache lines will be replenished only 
+                 * RxDs Spanning cache lines will be replenished only
-                 * if the succeeding RxD is also owned by Host. It 
+                 * if the succeeding RxD is also owned by Host. It
-                 * will always be the ((8*i)+3) and ((8*i)+6) 
+                 * will always be the ((8*i)+3) and ((8*i)+6)
-                 * descriptors for the 48 byte descriptor. The offending 
+                 * descriptors for the 48 byte descriptor. The offending
                 * decsriptor is of-course the 3rd descriptor.
                 */
-                rxdpphys = nic->rx_blocks[ring_no][block_no].
+                rxdpphys = mac_control->rings[ring_no].rx_blocks[block_no].
                    block_dma_addr + (off * sizeof(RxD_t));
                if (((u64) (rxdpphys)) % 128 > 80) {
-                        rxdpnext = nic->rx_blocks[ring_no][block_no].
+                        rxdpnext = mac_control->rings[ring_no].rx_blocks[block_no].
                            block_virt_addr + (off + 1);
                        if (rxdpnext->Host_Control == END_OF_BLOCK) {
                                nextblk = (block_no + 1) %
-                                    (nic->block_count[ring_no]);
+                                    (mac_control->rings[ring_no].block_count);
-                                rxdpnext = nic->rx_blocks[ring_no]
+                                rxdpnext = mac_control->rings[ring_no].rx_blocks
                                    [nextblk].block_virt_addr;
                        }
                        if (rxdpnext->Control_2 & BIT(0))
@@ -1682,6 +2205,10 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                if (!skb) {
                        DBG_PRINT(ERR_DBG, "%s: Out of ", dev->name);
                        DBG_PRINT(ERR_DBG, "memory to allocate SKBs\n");
+                        if (first_rxdp) {
+                                wmb();
+                                first_rxdp->Control_1 |= RXD_OWN_XENA;
+                        }
                        return -ENOMEM;
                }
 #ifndef CONFIG_2BUFF_MODE
@@ -1692,12 +2219,13 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                rxdp->Control_2 &= (~MASK_BUFFER0_SIZE);
                rxdp->Control_2 |= SET_BUFFER0_SIZE(size);
                rxdp->Host_Control = (unsigned long) (skb);
-                rxdp->Control_1 |= RXD_OWN_XENA;
+                if (alloc_tab & ((1 << rxsync_frequency) - 1))
+                        rxdp->Control_1 |= RXD_OWN_XENA;
                off++;
                off %= (MAX_RXDS_PER_BLOCK + 1);
-                mac_control->rx_curr_put_info[ring_no].offset = off;
+                mac_control->rings[ring_no].rx_curr_put_info.offset = off;
 #else
-                ba = &nic->ba[ring_no][block_no][off];
+                ba = &mac_control->rings[ring_no].ba[block_no][off];
                skb_reserve(skb, BUF0_LEN);
                tmp = ((unsigned long) skb->data & ALIGN_SIZE);
                if (tmp)
@@ -1719,22 +2247,41 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
                rxdp->Control_2 |= SET_BUFFER1_SIZE(1); /* dummy. */
                rxdp->Control_2 |= BIT(0);      /* Set Buffer_Empty bit. */
                rxdp->Host_Control = (u64) ((unsigned long) (skb));
-                rxdp->Control_1 |= RXD_OWN_XENA;
+                if (alloc_tab & ((1 << rxsync_frequency) - 1))
+                        rxdp->Control_1 |= RXD_OWN_XENA;
                off++;
-                mac_control->rx_curr_put_info[ring_no].offset = off;
+                mac_control->rings[ring_no].rx_curr_put_info.offset = off;
 #endif
+                rxdp->Control_2 |= SET_RXD_MARKER;
+                if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
+                        if (first_rxdp) {
+                                wmb();
+                                first_rxdp->Control_1 |= RXD_OWN_XENA;
+                        }
+                        first_rxdp = rxdp;
+                }
                atomic_inc(&nic->rx_bufs_left[ring_no]);
                alloc_tab++;
        }
      end:
+        /* Transfer ownership of first descriptor to adapter just before
+         * exiting. Before that, use memory barrier so that ownership
+         * and other fields are seen by adapter correctly.
+         */
+        if (first_rxdp) {
+                wmb();
+                first_rxdp->Control_1 |= RXD_OWN_XENA;
+        }
        return SUCCESS;
 }
 /**
- *  free_rx_buffers - Frees all Rx buffers   
+ *  free_rx_buffers - Frees all Rx buffers
 *  @sp: device private variable.
- *  Description: 
+ *  Description:
 *  This function will free all Rx buffers allocated by host.
 *  Return Value:
 *  NONE.
@@ -1758,7 +2305,8 @@ static void free_rx_buffers(struct s2io_nic *sp)
        for (i = 0; i < config->rx_ring_num; i++) {
                for (j = 0, blk = 0; j < config->rx_cfg[i].num_rxd; j++) {
                        off = j % (MAX_RXDS_PER_BLOCK + 1);
-                        rxdp = sp->rx_blocks[i][blk].block_virt_addr + off;
+                        rxdp = mac_control->rings[i].rx_blocks[blk].
+                                block_virt_addr + off;
 #ifndef CONFIG_2BUFF_MODE
                        if (rxdp->Control_1 == END_OF_BLOCK) {
@@ -1793,7 +2341,7 @@ static void free_rx_buffers(struct s2io_nic *sp)
                                                 HEADER_SNAP_SIZE,
                                                 PCI_DMA_FROMDEVICE);
 #else
-                                ba = &sp->ba[i][blk][off];
+                                ba = &mac_control->rings[i].ba[blk][off];
                                pci_unmap_single(sp->pdev, (dma_addr_t)
                                                 rxdp->Buffer0_ptr,
                                                 BUF0_LEN,
@@ -1813,10 +2361,10 @@ static void free_rx_buffers(struct s2io_nic *sp)
                        }
                        memset(rxdp, 0, sizeof(RxD_t));
                }
-                mac_control->rx_curr_put_info[i].block_index = 0;
+                mac_control->rings[i].rx_curr_put_info.block_index = 0;
-                mac_control->rx_curr_get_info[i].block_index = 0;
+                mac_control->rings[i].rx_curr_get_info.block_index = 0;
-                mac_control->rx_curr_put_info[i].offset = 0;
+                mac_control->rings[i].rx_curr_put_info.offset = 0;
-                mac_control->rx_curr_get_info[i].offset = 0;
+                mac_control->rings[i].rx_curr_get_info.offset = 0;
                atomic_set(&sp->rx_bufs_left[i], 0);
                DBG_PRINT(INIT_DBG, "%s:Freed 0x%x Rx Buffers on ring%d\n",
                          dev->name, buf_cnt, i);
@@ -1826,7 +2374,7 @@ static void free_rx_buffers(struct s2io_nic *sp)
 /**
 * s2io_poll - Rx interrupt handler for NAPI support
 * @dev : pointer to the device structure.
- * @budget : The number of packets that were budgeted to be processed 
+ * @budget : The number of packets that were budgeted to be processed
 * during  one pass through the 'Poll" function.
 * Description:
 * Comes into picture only if NAPI support has been incorporated. It does
@@ -1836,160 +2384,36 @@ static void free_rx_buffers(struct s2io_nic *sp)
 * 0 on success and 1 if there are No Rx packets to be processed.
 */
-#ifdef CONFIG_S2IO_NAPI
+#if defined(CONFIG_S2IO_NAPI)
 static int s2io_poll(struct net_device *dev, int *budget)
 {
        nic_t *nic = dev->priv;
-        XENA_dev_config_t __iomem *bar0 = nic->bar0;
+        int pkt_cnt = 0, org_pkts_to_process;
-        int pkts_to_process = *budget, pkt_cnt = 0;
-        register u64 val64 = 0;
-        rx_curr_get_info_t get_info, put_info;
-        int i, get_block, put_block, get_offset, put_offset, ring_bufs;
-#ifndef CONFIG_2BUFF_MODE
-        u16 val16, cksum;
-#endif
-        struct sk_buff *skb;
-        RxD_t *rxdp;
        mac_info_t *mac_control;
        struct config_param *config;
-#ifdef CONFIG_2BUFF_MODE
+        XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
-        buffAdd_t *ba;
+        u64 val64;
-#endif
+        int i;
+        atomic_inc(&nic->isr_cnt);
        mac_control = &nic->mac_control;
        config = &nic->config;
-        if (pkts_to_process > dev->quota)
+        nic->pkts_to_process = *budget;
-                pkts_to_process = dev->quota;
+        if (nic->pkts_to_process > dev->quota)
+                nic->pkts_to_process = dev->quota;
+        org_pkts_to_process = nic->pkts_to_process;
        val64 = readq(&bar0->rx_traffic_int);
        writeq(val64, &bar0->rx_traffic_int);
        for (i = 0; i < config->rx_ring_num; i++) {
-                get_info = mac_control->rx_curr_get_info[i];
+                rx_intr_handler(&mac_control->rings[i]);
-                get_block = get_info.block_index;
+                pkt_cnt = org_pkts_to_process - nic->pkts_to_process;
-                put_info = mac_control->rx_curr_put_info[i];
+                if (!nic->pkts_to_process) {
-                put_block = put_info.block_index;
+                        /* Quota for the current iteration has been met */
-                ring_bufs = config->rx_cfg[i].num_rxd;
+                        goto no_rx;
-                rxdp = nic->rx_blocks[i][get_block].block_virt_addr +
-                    get_info.offset;
-#ifndef CONFIG_2BUFF_MODE
-                get_offset = (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                    get_info.offset;
-                put_offset = (put_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                    put_info.offset;
-                while ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
-                       (((get_offset + 1) % ring_bufs) != put_offset)) {
-                        if (--pkts_to_process < 0) {
-                                goto no_rx;
-                        }
-                        if (rxdp->Control_1 == END_OF_BLOCK) {
-                                rxdp =
-                                    (RxD_t *) ((unsigned long) rxdp->
-                                               Control_2);
-                                get_info.offset++;
-                                get_info.offset %=
-                                    (MAX_RXDS_PER_BLOCK + 1);
-                                get_block++;
-                                get_block %= nic->block_count[i];
-                                mac_control->rx_curr_get_info[i].
-                                    offset = get_info.offset;
-                                mac_control->rx_curr_get_info[i].
-                                    block_index = get_block;
-                                continue;
-                        }
-                        get_offset =
-                            (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                            get_info.offset;
-                        skb =
-                            (struct sk_buff *) ((unsigned long) rxdp->
-                                                Host_Control);
-                        if (skb == NULL) {
-                                DBG_PRINT(ERR_DBG, "%s: The skb is ",
-                                          dev->name);
-                                DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
-                                goto no_rx;
-                        }
-                        val64 = RXD_GET_BUFFER0_SIZE(rxdp->Control_2);
-                        val16 = (u16) (val64 >> 48);
-                        cksum = RXD_GET_L4_CKSUM(rxdp->Control_1);
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer0_ptr,
-                                         dev->mtu +
-                                         HEADER_ETHERNET_II_802_3_SIZE +
-                                         HEADER_802_2_SIZE +
-                                         HEADER_SNAP_SIZE,
-                                         PCI_DMA_FROMDEVICE);
-                        rx_osm_handler(nic, val16, rxdp, i);
-                        pkt_cnt++;
-                        get_info.offset++;
-                        get_info.offset %= (MAX_RXDS_PER_BLOCK + 1);
-                        rxdp =
-                            nic->rx_blocks[i][get_block].block_virt_addr +
-                            get_info.offset;
-                        mac_control->rx_curr_get_info[i].offset =
-                            get_info.offset;
                }
-#else
-                get_offset = (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                    get_info.offset;
-                put_offset = (put_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                    put_info.offset;
-                while (((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
-                        !(rxdp->Control_2 & BIT(0))) &&
-                       (((get_offset + 1) % ring_bufs) != put_offset)) {
-                        if (--pkts_to_process < 0) {
-                                goto no_rx;
-                        }
-                        skb = (struct sk_buff *) ((unsigned long)
-                                                  rxdp->Host_Control);
-                        if (skb == NULL) {
-                                DBG_PRINT(ERR_DBG, "%s: The skb is ",
-                                          dev->name);
-                                DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
-                                goto no_rx;
-                        }
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer0_ptr,
-                                         BUF0_LEN, PCI_DMA_FROMDEVICE);
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer1_ptr,
-                                         BUF1_LEN, PCI_DMA_FROMDEVICE);
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer2_ptr,
-                                         dev->mtu + BUF0_LEN + 4,
-                                         PCI_DMA_FROMDEVICE);
-                        ba = &nic->ba[i][get_block][get_info.offset];
-                        rx_osm_handler(nic, rxdp, i, ba);
-                        get_info.offset++;
-                        mac_control->rx_curr_get_info[i].offset =
-                            get_info.offset;
-                        rxdp =
-                            nic->rx_blocks[i][get_block].block_virt_addr +
-                            get_info.offset;
-                        if (get_info.offset &&
-                            (!(get_info.offset % MAX_RXDS_PER_BLOCK))) {
-                                get_info.offset = 0;
-                                mac_control->rx_curr_get_info[i].
-                                    offset = get_info.offset;
-                                get_block++;
-                                get_block %= nic->block_count[i];
-                                mac_control->rx_curr_get_info[i].
-                                    block_index = get_block;
-                                rxdp =
-                                    nic->rx_blocks[i][get_block].
-                                    block_virt_addr;
-                        }
-                        get_offset =
-                            (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                            get_info.offset;
-                        pkt_cnt++;
-                }
-#endif
        }
        if (!pkt_cnt)
                pkt_cnt = 1;
@@ -2007,9 +2431,10 @@ static int s2io_poll(struct net_device *dev, int *budget)
        }
        /* Re enable the Rx interrupts. */
        en_dis_able_nic_intrs(nic, RX_TRAFFIC_INTR, ENABLE_INTRS);
+        atomic_dec(&nic->isr_cnt);
        return 0;
-      no_rx:
+no_rx:
        dev->quota -= pkt_cnt;
        *budget -= pkt_cnt;
@@ -2020,279 +2445,204 @@ static int s2io_poll(struct net_device *dev, int *budget)
                        break;
                }
        }
+        atomic_dec(&nic->isr_cnt);
        return 1;
 }
-#else
+#endif
-/**  
+/**
 *  rx_intr_handler - Rx interrupt handler
 *  @nic: device private variable.
- *  Description: 
+ *  Description:
- *  If the interrupt is because of a received frame or if the 
+ *  If the interrupt is because of a received frame or if the
 *  receive ring contains fresh as yet un-processed frames,this function is
- *  called. It picks out the RxD at which place the last Rx processing had 
+ *  called. It picks out the RxD at which place the last Rx processing had
- *  stopped and sends the skb to the OSM's Rx handler and then increments 
+ *  stopped and sends the skb to the OSM's Rx handler and then increments
 *  the offset.
 *  Return Value:
 *  NONE.
 */
+static void rx_intr_handler(ring_info_t *ring_data)
-static void rx_intr_handler(struct s2io_nic *nic)
 {
+        nic_t *nic = ring_data->nic;
        struct net_device *dev = (struct net_device *) nic->dev;
-        XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0;
+        int get_block, get_offset, put_block, put_offset, ring_bufs;
        rx_curr_get_info_t get_info, put_info;
        RxD_t *rxdp;
        struct sk_buff *skb;
-#ifndef CONFIG_2BUFF_MODE
+#ifndef CONFIG_S2IO_NAPI
-        u16 val16, cksum;
+        int pkt_cnt = 0;
-#endif
-        register u64 val64 = 0;
-        int get_block, get_offset, put_block, put_offset, ring_bufs;
-        int i, pkt_cnt = 0;
-        mac_info_t *mac_control;
-        struct config_param *config;
-#ifdef CONFIG_2BUFF_MODE
-        buffAdd_t *ba;
 #endif
+        spin_lock(&nic->rx_lock);
+        if (atomic_read(&nic->card_state) == CARD_DOWN) {
+                DBG_PRINT(ERR_DBG, "%s: %s going down for reset\n",
+                          __FUNCTION__, dev->name);
+                spin_unlock(&nic->rx_lock);
+        }
-        mac_control = &nic->mac_control;
+        get_info = ring_data->rx_curr_get_info;
-        config = &nic->config;
+        get_block = get_info.block_index;
+        put_info = ring_data->rx_curr_put_info;
-        /* 
+        put_block = put_info.block_index;
-         * rx_traffic_int reg is an R1 register, hence we read and write back 
+        ring_bufs = get_info.ring_len+1;
-         * the samevalue in the register to clear it.
+        rxdp = ring_data->rx_blocks[get_block].block_virt_addr +
-         */
-        val64 = readq(&bar0->rx_traffic_int);
-        writeq(val64, &bar0->rx_traffic_int);
-        for (i = 0; i < config->rx_ring_num; i++) {
-                get_info = mac_control->rx_curr_get_info[i];
-                get_block = get_info.block_index;
-                put_info = mac_control->rx_curr_put_info[i];
-                put_block = put_info.block_index;
-                ring_bufs = config->rx_cfg[i].num_rxd;
-                rxdp = nic->rx_blocks[i][get_block].block_virt_addr +
-                    get_info.offset;
-#ifndef CONFIG_2BUFF_MODE
-                get_offset = (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
                    get_info.offset;
-                spin_lock(&nic->put_lock);
+        get_offset = (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                put_offset = nic->put_pos[i];
+                get_info.offset;
-                spin_unlock(&nic->put_lock);
+#ifndef CONFIG_S2IO_NAPI
-                while ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
+        spin_lock(&nic->put_lock);
-                       (((get_offset + 1) % ring_bufs) != put_offset)) {
+        put_offset = ring_data->put_pos;
-                        if (rxdp->Control_1 == END_OF_BLOCK) {
+        spin_unlock(&nic->put_lock);
-                                rxdp = (RxD_t *) ((unsigned long)
+#else
-                                                  rxdp->Control_2);
+        put_offset = (put_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                                get_info.offset++;
+                put_info.offset;
-                                get_info.offset %=
+#endif
-                                    (MAX_RXDS_PER_BLOCK + 1);
+        while (RXD_IS_UP2DT(rxdp) &&
-                                get_block++;
+               (((get_offset + 1) % ring_bufs) != put_offset)) {
-                                get_block %= nic->block_count[i];
+                skb = (struct sk_buff *) ((unsigned long)rxdp->Host_Control);
-                                mac_control->rx_curr_get_info[i].
+                if (skb == NULL) {
-                                    offset = get_info.offset;
+                        DBG_PRINT(ERR_DBG, "%s: The skb is ",
-                                mac_control->rx_curr_get_info[i].
+                                  dev->name);
-                                    block_index = get_block;
+                        DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
-                                continue;
+                        spin_unlock(&nic->rx_lock);
-                        }
+                        return;
-                        get_offset =
-                            (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                            get_info.offset;
-                        skb = (struct sk_buff *) ((unsigned long)
-                                                  rxdp->Host_Control);
-                        if (skb == NULL) {
-                                DBG_PRINT(ERR_DBG, "%s: The skb is ",
-                                          dev->name);
-                                DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
-                                return;
-                        }
-                        val64 = RXD_GET_BUFFER0_SIZE(rxdp->Control_2);
-                        val16 = (u16) (val64 >> 48);
-                        cksum = RXD_GET_L4_CKSUM(rxdp->Control_1);
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer0_ptr,
-                                         dev->mtu +
-                                         HEADER_ETHERNET_II_802_3_SIZE +
-                                         HEADER_802_2_SIZE +
-                                         HEADER_SNAP_SIZE,
-                                         PCI_DMA_FROMDEVICE);
-                        rx_osm_handler(nic, val16, rxdp, i);
-                        get_info.offset++;
-                        get_info.offset %= (MAX_RXDS_PER_BLOCK + 1);
-                        rxdp =
-                            nic->rx_blocks[i][get_block].block_virt_addr +
-                            get_info.offset;
-                        mac_control->rx_curr_get_info[i].offset =
-                            get_info.offset;
-                        pkt_cnt++;
-                        if ((indicate_max_pkts)
-                            && (pkt_cnt > indicate_max_pkts))
-                                break;
                }
+#ifndef CONFIG_2BUFF_MODE
+                pci_unmap_single(nic->pdev, (dma_addr_t)
+                                 rxdp->Buffer0_ptr,
+                                 dev->mtu +
+                                 HEADER_ETHERNET_II_802_3_SIZE +
+                                 HEADER_802_2_SIZE +
+                                 HEADER_SNAP_SIZE,
+                                 PCI_DMA_FROMDEVICE);
 #else
-                get_offset = (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
+                pci_unmap_single(nic->pdev, (dma_addr_t)
+                                 rxdp->Buffer0_ptr,
+                                 BUF0_LEN, PCI_DMA_FROMDEVICE);
+                pci_unmap_single(nic->pdev, (dma_addr_t)
+                                 rxdp->Buffer1_ptr,
+                                 BUF1_LEN, PCI_DMA_FROMDEVICE);
+                pci_unmap_single(nic->pdev, (dma_addr_t)
+                                 rxdp->Buffer2_ptr,
+                                 dev->mtu + BUF0_LEN + 4,
+                                 PCI_DMA_FROMDEVICE);
+#endif
+                rx_osm_handler(ring_data, rxdp);
+                get_info.offset++;
+                ring_data->rx_curr_get_info.offset =
                    get_info.offset;
-                spin_lock(&nic->put_lock);
+                rxdp = ring_data->rx_blocks[get_block].block_virt_addr +
-                put_offset = nic->put_pos[i];
+                    get_info.offset;
-                spin_unlock(&nic->put_lock);
+                if (get_info.offset &&
-                while (((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
+                    (!(get_info.offset % MAX_RXDS_PER_BLOCK))) {
-                        !(rxdp->Control_2 & BIT(0))) &&
+                        get_info.offset = 0;
-                       (((get_offset + 1) % ring_bufs) != put_offset)) {
+                        ring_data->rx_curr_get_info.offset
-                        skb = (struct sk_buff *) ((unsigned long)
+                            = get_info.offset;
-                                                  rxdp->Host_Control);
+                        get_block++;
-                        if (skb == NULL) {
+                        get_block %= ring_data->block_count;
-                                DBG_PRINT(ERR_DBG, "%s: The skb is ",
+                        ring_data->rx_curr_get_info.block_index
-                                          dev->name);
+                            = get_block;
-                                DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
+                        rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
-                                return;
+                }
-                        }
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer0_ptr,
-                                         BUF0_LEN, PCI_DMA_FROMDEVICE);
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer1_ptr,
-                                         BUF1_LEN, PCI_DMA_FROMDEVICE);
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         rxdp->Buffer2_ptr,
-                                         dev->mtu + BUF0_LEN + 4,
-                                         PCI_DMA_FROMDEVICE);
-                        ba = &nic->ba[i][get_block][get_info.offset];
-                        rx_osm_handler(nic, rxdp, i, ba);
-                        get_info.offset++;
-                        mac_control->rx_curr_get_info[i].offset =
-                            get_info.offset;
-                        rxdp =
-                            nic->rx_blocks[i][get_block].block_virt_addr +
-                            get_info.offset;
-                        if (get_info.offset &&
+                get_offset = (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
-                            (!(get_info.offset % MAX_RXDS_PER_BLOCK))) {
-                                get_info.offset = 0;
-                                mac_control->rx_curr_get_info[i].
-                                    offset = get_info.offset;
-                                get_block++;
-                                get_block %= nic->block_count[i];
-                                mac_control->rx_curr_get_info[i].
-                                    block_index = get_block;
-                                rxdp =
-                                    nic->rx_blocks[i][get_block].
-                                    block_virt_addr;
-                        }
-                        get_offset =
-                            (get_block * (MAX_RXDS_PER_BLOCK + 1)) +
                            get_info.offset;
-                        pkt_cnt++;
+#ifdef CONFIG_S2IO_NAPI
-                        if ((indicate_max_pkts)
+                nic->pkts_to_process -= 1;
-                            && (pkt_cnt > indicate_max_pkts))
+                if (!nic->pkts_to_process)
-                                break;
+                        break;
-                }
+#else
-#endif
+                pkt_cnt++;
                if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
                        break;
+#endif
        }
+        spin_unlock(&nic->rx_lock);
 }
-#endif
-/**  
+/**
 *  tx_intr_handler - Transmit interrupt handler
 *  @nic : device private variable
- *  Description: 
+ *  Description:
- *  If an interrupt was raised to indicate DMA complete of the 
+ *  If an interrupt was raised to indicate DMA complete of the
- *  Tx packet, this function is called. It identifies the last TxD 
+ *  Tx packet, this function is called. It identifies the last TxD
- *  whose buffer was freed and frees all skbs whose data have already 
+ *  whose buffer was freed and frees all skbs whose data have already
 *  DMA'ed into the NICs internal memory.
 *  Return Value:
 *  NONE
 */
-static void tx_intr_handler(struct s2io_nic *nic)
+static void tx_intr_handler(fifo_info_t *fifo_data)
 {
-        XENA_dev_config_t __iomem *bar0 = nic->bar0;
+        nic_t *nic = fifo_data->nic;
        struct net_device *dev = (struct net_device *) nic->dev;
        tx_curr_get_info_t get_info, put_info;
        struct sk_buff *skb;
        TxD_t *txdlp;
-        register u64 val64 = 0;
-        int i;
        u16 j, frg_cnt;
-        mac_info_t *mac_control;
-        struct config_param *config;
-        mac_control = &nic->mac_control;
+        get_info = fifo_data->tx_curr_get_info;
-        config = &nic->config;
+        put_info = fifo_data->tx_curr_put_info;
+        txdlp = (TxD_t *) fifo_data->list_info[get_info.offset].
-        /* 
+            list_virt_addr;
-         * tx_traffic_int reg is an R1 register, hence we read and write 
+        while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
-         * back the samevalue in the register to clear it.
+               (get_info.offset != put_info.offset) &&
-         */
+               (txdlp->Host_Control)) {
-        val64 = readq(&bar0->tx_traffic_int);
+                /* Check for TxD errors */
-        writeq(val64, &bar0->tx_traffic_int);
+                if (txdlp->Control_1 & TXD_T_CODE) {
+                        unsigned long long err;
-        for (i = 0; i < config->tx_fifo_num; i++) {
+                        err = txdlp->Control_1 & TXD_T_CODE;
-                get_info = mac_control->tx_curr_get_info[i];
+                        DBG_PRINT(ERR_DBG, "***TxD error %llx\n",
-                put_info = mac_control->tx_curr_put_info[i];
+                                  err);
-                txdlp = (TxD_t *) nic->list_info[i][get_info.offset].
+                }
-                    list_virt_addr;
-                while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
-                       (get_info.offset != put_info.offset) &&
-                       (txdlp->Host_Control)) {
-                        /* Check for TxD errors */
-                        if (txdlp->Control_1 & TXD_T_CODE) {
-                                unsigned long long err;
-                                err = txdlp->Control_1 & TXD_T_CODE;
-                                DBG_PRINT(ERR_DBG, "***TxD error %llx\n",
-                                          err);
-                        }
-                        skb = (struct sk_buff *) ((unsigned long)
-                                                  txdlp->Host_Control);
-                        if (skb == NULL) {
-                                DBG_PRINT(ERR_DBG, "%s: Null skb ",
-                                          dev->name);
-                                DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
-                                return;
-                        }
-                        nic->tx_pkt_count++;
-                        frg_cnt = skb_shinfo(skb)->nr_frags;
+                skb = (struct sk_buff *) ((unsigned long)
+                                txdlp->Host_Control);
+                if (skb == NULL) {
+                        DBG_PRINT(ERR_DBG, "%s: Null skb ",
+                        __FUNCTION__);
+                        DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
+                        return;
+                }
-                        /*  For unfragmented skb */
+                frg_cnt = skb_shinfo(skb)->nr_frags;
-                        pci_unmap_single(nic->pdev, (dma_addr_t)
+                nic->tx_pkt_count++;
-                                         txdlp->Buffer_Pointer,
-                                         skb->len - skb->data_len,
+                pci_unmap_single(nic->pdev, (dma_addr_t)
-                                         PCI_DMA_TODEVICE);
+                                 txdlp->Buffer_Pointer,
-                        if (frg_cnt) {
+                                 skb->len - skb->data_len,
-                                TxD_t *temp = txdlp;
+                                 PCI_DMA_TODEVICE);
-                                txdlp++;
+                if (frg_cnt) {
-                                for (j = 0; j < frg_cnt; j++, txdlp++) {
+                        TxD_t *temp;
-                                        skb_frag_t *frag =
+                        temp = txdlp;
-                                            &skb_shinfo(skb)->frags[j];
+                        txdlp++;
-                                        pci_unmap_page(nic->pdev,
+                        for (j = 0; j < frg_cnt; j++, txdlp++) {
-                                                       (dma_addr_t)
+                                skb_frag_t *frag =
-                                                       txdlp->
+                                    &skb_shinfo(skb)->frags[j];
-                                                       Buffer_Pointer,
+                                if (!txdlp->Buffer_Pointer)
-                                                       frag->size,
+                                        break;
-                                                       PCI_DMA_TODEVICE);
+                                pci_unmap_page(nic->pdev,
-                                }
+                                               (dma_addr_t)
-                                txdlp = temp;
+                                               txdlp->
+                                               Buffer_Pointer,
+                                               frag->size,
+                                               PCI_DMA_TODEVICE);
                        }
-                        memset(txdlp, 0,
+                        txdlp = temp;
-                               (sizeof(TxD_t) * config->max_txds));
-                        /* Updating the statistics block */
-                        nic->stats.tx_packets++;
-                        nic->stats.tx_bytes += skb->len;
-                        dev_kfree_skb_irq(skb);
-                        get_info.offset++;
-                        get_info.offset %= get_info.fifo_len + 1;
-                        txdlp = (TxD_t *) nic->list_info[i]
-                            [get_info.offset].list_virt_addr;
-                        mac_control->tx_curr_get_info[i].offset =
-                            get_info.offset;
                }
+                memset(txdlp, 0,
+                       (sizeof(TxD_t) * fifo_data->max_txds));
+                /* Updating the statistics block */
+                nic->stats.tx_bytes += skb->len;
+                dev_kfree_skb_irq(skb);
+                get_info.offset++;
+                get_info.offset %= get_info.fifo_len + 1;
+                txdlp = (TxD_t *) fifo_data->list_info
+                    [get_info.offset].list_virt_addr;
+                fifo_data->tx_curr_get_info.offset =
+                    get_info.offset;
        }
        spin_lock(&nic->tx_lock);
@@ -2301,13 +2651,13 @@ static void tx_intr_handler(struct s2io_nic *nic)
        spin_unlock(&nic->tx_lock);
 }
-/**  
+/**
 *  alarm_intr_handler - Alarm Interrrupt handler
 *  @nic: device private variable
- *  Description: If the interrupt was neither because of Rx packet or Tx 
+ *  Description: If the interrupt was neither because of Rx packet or Tx
 *  complete, this function is called. If the interrupt was to indicate
- *  a loss of link, the OSM link status handler is invoked for any other 
+ *  a loss of link, the OSM link status handler is invoked for any other
- *  alarm interrupt the block that raised the interrupt is displayed 
+ *  alarm interrupt the block that raised the interrupt is displayed
 *  and a H/W reset is issued.
 *  Return Value:
 *  NONE
@@ -2320,10 +2670,30 @@ static void alarm_intr_handler(struct s2io_nic *nic)
        register u64 val64 = 0, err_reg = 0;
        /* Handling link status change error Intr */
-        err_reg = readq(&bar0->mac_rmac_err_reg);
+        if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
-        writeq(err_reg, &bar0->mac_rmac_err_reg);
+                err_reg = readq(&bar0->mac_rmac_err_reg);
-        if (err_reg & RMAC_LINK_STATE_CHANGE_INT) {
+                writeq(err_reg, &bar0->mac_rmac_err_reg);
-                schedule_work(&nic->set_link_task);
+                if (err_reg & RMAC_LINK_STATE_CHANGE_INT) {
+                        schedule_work(&nic->set_link_task);
+                }
+        }
+        /* Handling Ecc errors */
+        val64 = readq(&bar0->mc_err_reg);
+        writeq(val64, &bar0->mc_err_reg);
+        if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
+                if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
+                        nic->mac_control.stats_info->sw_stat.
+                                double_ecc_errs++;
+                        DBG_PRINT(ERR_DBG, "%s: Device indicates ",
+                                  dev->name);
+                        DBG_PRINT(ERR_DBG, "double ECC error!!\n");
+                        netif_stop_queue(dev);
+                        schedule_work(&nic->rst_timer_task);
+                } else {
+                        nic->mac_control.stats_info->sw_stat.
+                                single_ecc_errs++;
+                }
        }
        /* In case of a serious error, the device will be Reset. */
@@ -2338,7 +2708,7 @@ static void alarm_intr_handler(struct s2io_nic *nic)
        /*
         * Also as mentioned in the latest Errata sheets if the PCC_FB_ECC
         * Error occurs, the adapter will be recycled by disabling the
-         * adapter enable bit and enabling it again after the device 
+         * adapter enable bit and enabling it again after the device
         * becomes Quiescent.
         */
        val64 = readq(&bar0->pcc_err_reg);
@@ -2354,18 +2724,18 @@ static void alarm_intr_handler(struct s2io_nic *nic)
        /* Other type of interrupts are not being handled now,  TODO */
 }
-/** 
+/**
 *  wait_for_cmd_complete - waits for a command to complete.
- *  @sp : private member of the device structure, which is a pointer to the 
+ *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
- *  Description: Function that waits for a command to Write into RMAC 
+ *  Description: Function that waits for a command to Write into RMAC
- *  ADDR DATA registers to be completed and returns either success or 
+ *  ADDR DATA registers to be completed and returns either success or
- *  error depending on whether the command was complete or not. 
+ *  error depending on whether the command was complete or not.
 *  Return value:
 *   SUCCESS on success and FAILURE on failure.
 */
-static int wait_for_cmd_complete(nic_t * sp)
+int wait_for_cmd_complete(nic_t * sp)
 {
        XENA_dev_config_t __iomem *bar0 = sp->bar0;
        int ret = FAILURE, cnt = 0;
@@ -2385,29 +2755,33 @@ static int wait_for_cmd_complete(nic_t * sp)
        return ret;
 }
-/** 
+/**
- *  s2io_reset - Resets the card. 
+ *  s2io_reset - Resets the card.
 *  @sp : private member of the device structure.
 *  Description: Function to Reset the card. This function then also
- *  restores the previously saved PCI configuration space registers as 
+ *  restores the previously saved PCI configuration space registers as
 *  the card reset also resets the configuration space.
 *  Return value:
 *  void.
 */
-static void s2io_reset(nic_t * sp)
+void s2io_reset(nic_t * sp)
 {
        XENA_dev_config_t __iomem *bar0 = sp->bar0;
        u64 val64;
-        u16 subid;
+        u16 subid, pci_cmd;
+        /* Back up  the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
+        if (sp->device_type == XFRAME_I_DEVICE)
+                pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
        val64 = SW_RESET_ALL;
        writeq(val64, &bar0->sw_reset);
-        /* 
+        /*
-         * At this stage, if the PCI write is indeed completed, the 
+         * At this stage, if the PCI write is indeed completed, the
-         * card is reset and so is the PCI Config space of the device. 
+         * card is reset and so is the PCI Config space of the device.
-         * So a read cannot be issued at this stage on any of the 
+         * So a read cannot be issued at this stage on any of the
         * registers to ensure the write into "sw_reset" register
         * has gone through.
         * Question: Is there any system call that will explicitly force
@@ -2418,42 +2792,76 @@ static void s2io_reset(nic_t * sp)
         */
        msleep(250);
-        /* Restore the PCI state saved during initializarion. */
+        if (!(sp->device_type & XFRAME_II_DEVICE)) {
-        pci_restore_state(sp->pdev);
+                /* Restore the PCI state saved during initializarion. */
+                pci_restore_state(sp->pdev);
+                pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
+                                     pci_cmd);
+        } else {
+                pci_set_master(sp->pdev);
+        }
        s2io_init_pci(sp);
        msleep(250);
+        /* Set swapper to enable I/O register access */
+        s2io_set_swapper(sp);
+        /* Clear certain PCI/PCI-X fields after reset */
+        if (sp->device_type == XFRAME_II_DEVICE) {
+                /* Clear parity err detect bit */
+                pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
+                /* Clearing PCIX Ecc status register */
+                pci_write_config_dword(sp->pdev, 0x68, 0x7C);
+                /* Clearing PCI_STATUS error reflected here */
+                writeq(BIT(62), &bar0->txpic_int_reg);
+        }
+        /* Reset device statistics maintained by OS */
+        memset(&sp->stats, 0, sizeof (struct net_device_stats));
        /* SXE-002: Configure link and activity LED to turn it off */
        subid = sp->pdev->subsystem_device;
-        if ((subid & 0xFF) >= 0x07) {
+        if (((subid & 0xFF) >= 0x07) &&
+            (sp->device_type == XFRAME_I_DEVICE)) {
                val64 = readq(&bar0->gpio_control);
                val64 |= 0x0000800000000000ULL;
                writeq(val64, &bar0->gpio_control);
                val64 = 0x0411040400000000ULL;
-                writeq(val64, (void __iomem *) bar0 + 0x2700);
+                writeq(val64, (void __iomem *) ((u8 *) bar0 + 0x2700));
+        }
+        /*
+         * Clear spurious ECC interrupts that would have occured on
+         * XFRAME II cards after reset.
+         */
+        if (sp->device_type == XFRAME_II_DEVICE) {
+                val64 = readq(&bar0->pcc_err_reg);
+                writeq(val64, &bar0->pcc_err_reg);
        }
        sp->device_enabled_once = FALSE;
 }
 /**
- *  s2io_set_swapper - to set the swapper controle on the card 
+ *  s2io_set_swapper - to set the swapper controle on the card
- *  @sp : private member of the device structure, 
+ *  @sp : private member of the device structure,
 *  pointer to the s2io_nic structure.
- *  Description: Function to set the swapper control on the card 
+ *  Description: Function to set the swapper control on the card
 *  correctly depending on the 'endianness' of the system.
 *  Return value:
 *  SUCCESS on success and FAILURE on failure.
 */
-static int s2io_set_swapper(nic_t * sp)
+int s2io_set_swapper(nic_t * sp)
 {
        struct net_device *dev = sp->dev;
        XENA_dev_config_t __iomem *bar0 = sp->bar0;
        u64 val64, valt, valr;
-        /* 
+        /*
         * Set proper endian settings and verify the same by reading
         * the PIF Feed-back register.
         */
@@ -2505,8 +2913,9 @@ static int s2io_set_swapper(nic_t * sp)
                        i++;
                }
                if(i == 4) {
+                        unsigned long long x = val64;
                        DBG_PRINT(ERR_DBG, "Write failed, Xmsi_addr ");
-                        DBG_PRINT(ERR_DBG, "reads:0x%llx\n",val64);
+                        DBG_PRINT(ERR_DBG, "reads:0x%llx\n", x);
                        return FAILURE;
                }
        }
@@ -2514,8 +2923,8 @@ static int s2io_set_swapper(nic_t * sp)
        val64 &= 0xFFFF000000000000ULL;
 #ifdef  __BIG_ENDIAN
-        /* 
+        /*
-         * The device by default set to a big endian format, so a 
+         * The device by default set to a big endian format, so a
         * big endian driver need not set anything.
         */
        val64 |= (SWAPPER_CTRL_TXP_FE |
@@ -2531,9 +2940,9 @@ static int s2io_set_swapper(nic_t * sp)
                 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
        writeq(val64, &bar0->swapper_ctrl);
 #else
-        /* 
+        /*
         * Initially we enable all bits to make it accessible by the
-         * driver, then we selectively enable only those bits that 
+         * driver, then we selectively enable only those bits that
         * we want to set.
         */
        val64 |= (SWAPPER_CTRL_TXP_FE |
@@ -2555,8 +2964,8 @@ static int s2io_set_swapper(nic_t * sp)
 #endif
        val64 = readq(&bar0->swapper_ctrl);
-        /* 
+        /*
-         * Verifying if endian settings are accurate by reading a 
+         * Verifying if endian settings are accurate by reading a
         * feedback register.
         */
        val64 = readq(&bar0->pif_rd_swapper_fb);
@@ -2576,55 +2985,63 @@ static int s2io_set_swapper(nic_t * sp)
 * Functions defined below concern the OS part of the driver *
 * ********************************************************* */
-/**  
+/**
 *  s2io_open - open entry point of the driver
 *  @dev : pointer to the device structure.
 *  Description:
 *  This function is the open entry point of the driver. It mainly calls a
 *  function to allocate Rx buffers and inserts them into the buffer
- *  descriptors and then enables the Rx part of the NIC. 
+ *  descriptors and then enables the Rx part of the NIC.
 *  Return value:
 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 *   file on failure.
 */
-static int s2io_open(struct net_device *dev)
+int s2io_open(struct net_device *dev)
 {
        nic_t *sp = dev->priv;
        int err = 0;
-        /* 
+        /*
-         * Make sure you have link off by default every time 
+         * Make sure you have link off by default every time
         * Nic is initialized
         */
        netif_carrier_off(dev);
-        sp->last_link_state = LINK_DOWN;
+        sp->last_link_state = 0;
        /* Initialize H/W and enable interrupts */
        if (s2io_card_up(sp)) {
                DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
                          dev->name);
-                return -ENODEV;
+                err = -ENODEV;
+                goto hw_init_failed;
        }
        /* After proper initialization of H/W, register ISR */
-        err = request_irq((int) sp->irq, s2io_isr, SA_SHIRQ,
+        err = request_irq((int) sp->pdev->irq, s2io_isr, SA_SHIRQ,
                          sp->name, dev);
        if (err) {
-                s2io_reset(sp);
                DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
                          dev->name);
-                return err;
+                goto isr_registration_failed;
        }
        if (s2io_set_mac_addr(dev, dev->dev_addr) == FAILURE) {
                DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
-                s2io_reset(sp);
+                err = -ENODEV;
-                return -ENODEV;
+                goto setting_mac_address_failed;
        }
        netif_start_queue(dev);
        return 0;
+setting_mac_address_failed:
+        free_irq(sp->pdev->irq, dev);
+isr_registration_failed:
+        del_timer_sync(&sp->alarm_timer);
+        s2io_reset(sp);
+hw_init_failed:
+        return err;
 }
 /**
@@ -2640,16 +3057,15 @@ static int s2io_open(struct net_device *dev)
 *  file on failure.
 */
-static int s2io_close(struct net_device *dev)
+int s2io_close(struct net_device *dev)
 {
        nic_t *sp = dev->priv;
        flush_scheduled_work();
        netif_stop_queue(dev);
        /* Reset card, kill tasklet and free Tx and Rx buffers. */
        s2io_card_down(sp);
-        free_irq(dev->irq, dev);
+        free_irq(sp->pdev->irq, dev);
        sp->device_close_flag = TRUE;   /* Device is shut down. */
        return 0;
 }
@@ -2667,7 +3083,7 @@ static int s2io_close(struct net_device *dev)
 *  0 on success & 1 on failure.
 */
-static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
+int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
 {
        nic_t *sp = dev->priv;
        u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
@@ -2678,29 +3094,39 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
 #ifdef NETIF_F_TSO
        int mss;
 #endif
+        u16 vlan_tag = 0;
+        int vlan_priority = 0;
        mac_info_t *mac_control;
        struct config_param *config;
-        XENA_dev_config_t __iomem *bar0 = sp->bar0;
        mac_control = &sp->mac_control;
        config = &sp->config;
-        DBG_PRINT(TX_DBG, "%s: In S2IO Tx routine\n", dev->name);
+        DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
        spin_lock_irqsave(&sp->tx_lock, flags);
        if (atomic_read(&sp->card_state) == CARD_DOWN) {
-                DBG_PRINT(ERR_DBG, "%s: Card going down for reset\n",
+                DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
                          dev->name);
                spin_unlock_irqrestore(&sp->tx_lock, flags);
-                return 1;
+                dev_kfree_skb(skb);
+                return 0;
        }
        queue = 0;
-        put_off = (u16) mac_control->tx_curr_put_info[queue].offset;
-        get_off = (u16) mac_control->tx_curr_get_info[queue].offset;
-        txdp = (TxD_t *) sp->list_info[queue][put_off].list_virt_addr;
-        queue_len = mac_control->tx_curr_put_info[queue].fifo_len + 1;
+        /* Get Fifo number to Transmit based on vlan priority */
+        if (sp->vlgrp && vlan_tx_tag_present(skb)) {
+                vlan_tag = vlan_tx_tag_get(skb);
+                vlan_priority = vlan_tag >> 13;
+                queue = config->fifo_mapping[vlan_priority];
+        }
+        put_off = (u16) mac_control->fifos[queue].tx_curr_put_info.offset;
+        get_off = (u16) mac_control->fifos[queue].tx_curr_get_info.offset;
+        txdp = (TxD_t *) mac_control->fifos[queue].list_info[put_off].
+                list_virt_addr;
+        queue_len = mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1;
        /* Avoid "put" pointer going beyond "get" pointer */
        if (txdp->Host_Control || (((put_off + 1) % queue_len) == get_off)) {
                DBG_PRINT(ERR_DBG, "Error in xmit, No free TXDs.\n");
@@ -2709,6 +3135,15 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
                spin_unlock_irqrestore(&sp->tx_lock, flags);
                return 0;
        }
+        /* A buffer with no data will be dropped */
+        if (!skb->len) {
+                DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
+                dev_kfree_skb(skb);
+                spin_unlock_irqrestore(&sp->tx_lock, flags);
+                return 0;
+        }
 #ifdef NETIF_F_TSO
        mss = skb_shinfo(skb)->tso_size;
        if (mss) {
@@ -2720,9 +3155,9 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
        frg_cnt = skb_shinfo(skb)->nr_frags;
        frg_len = skb->len - skb->data_len;
-        txdp->Host_Control = (unsigned long) skb;
        txdp->Buffer_Pointer = pci_map_single
            (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE);
+        txdp->Host_Control = (unsigned long) skb;
        if (skb->ip_summed == CHECKSUM_HW) {
                txdp->Control_2 |=
                    (TXD_TX_CKO_IPV4_EN | TXD_TX_CKO_TCP_EN |
@@ -2731,6 +3166,11 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
        txdp->Control_2 |= config->tx_intr_type;
+        if (sp->vlgrp && vlan_tx_tag_present(skb)) {
+                txdp->Control_2 |= TXD_VLAN_ENABLE;
+                txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
+        }
        txdp->Control_1 |= (TXD_BUFFER0_SIZE(frg_len) |
                            TXD_GATHER_CODE_FIRST);
        txdp->Control_1 |= TXD_LIST_OWN_XENA;
@@ -2738,6 +3178,9 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
        /* For fragmented SKB. */
        for (i = 0; i < frg_cnt; i++) {
                skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+                /* A '0' length fragment will be ignored */
+                if (!frag->size)
+                        continue;
                txdp++;
                txdp->Buffer_Pointer = (u64) pci_map_page
                    (sp->pdev, frag->page, frag->page_offset,
@@ -2747,23 +3190,23 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
        txdp->Control_1 |= TXD_GATHER_CODE_LAST;
        tx_fifo = mac_control->tx_FIFO_start[queue];
-        val64 = sp->list_info[queue][put_off].list_phy_addr;
+        val64 = mac_control->fifos[queue].list_info[put_off].list_phy_addr;
        writeq(val64, &tx_fifo->TxDL_Pointer);
        val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
                 TX_FIFO_LAST_LIST);
 #ifdef NETIF_F_TSO
        if (mss)
                val64 |= TX_FIFO_SPECIAL_FUNC;
 #endif
        writeq(val64, &tx_fifo->List_Control);
-        /* Perform a PCI read to flush previous writes */
+        mmiowb();
-        val64 = readq(&bar0->general_int_status);
        put_off++;
-        put_off %= mac_control->tx_curr_put_info[queue].fifo_len + 1;
+        put_off %= mac_control->fifos[queue].tx_curr_put_info.fifo_len + 1;
-        mac_control->tx_curr_put_info[queue].offset = put_off;
+        mac_control->fifos[queue].tx_curr_put_info.offset = put_off;
        /* Avoid "put" pointer going beyond "get" pointer */
        if (((put_off + 1) % queue_len) == get_off) {
@@ -2779,18 +3222,74 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
        return 0;
 }
+static void
+s2io_alarm_handle(unsigned long data)
+{
+        nic_t *sp = (nic_t *)data;
+        alarm_intr_handler(sp);
+        mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
+}
+static void s2io_txpic_intr_handle(nic_t *sp)
+{
+        XENA_dev_config_t *bar0 = (XENA_dev_config_t *) sp->bar0;
+        u64 val64;
+        val64 = readq(&bar0->pic_int_status);
+        if (val64 & PIC_INT_GPIO) {
+                val64 = readq(&bar0->gpio_int_reg);
+                if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
+                    (val64 & GPIO_INT_REG_LINK_UP)) {
+                        val64 |=  GPIO_INT_REG_LINK_DOWN;
+                        val64 |= GPIO_INT_REG_LINK_UP;
+                        writeq(val64, &bar0->gpio_int_reg);
+                        goto masking;
+                }
+                if (((sp->last_link_state == LINK_UP) &&
+                        (val64 & GPIO_INT_REG_LINK_DOWN)) ||
+                ((sp->last_link_state == LINK_DOWN) &&
+                (val64 & GPIO_INT_REG_LINK_UP))) {
+                        val64 = readq(&bar0->gpio_int_mask);
+                        val64 |=  GPIO_INT_MASK_LINK_DOWN;
+                        val64 |= GPIO_INT_MASK_LINK_UP;
+                        writeq(val64, &bar0->gpio_int_mask);
+                        s2io_set_link((unsigned long)sp);
+                }
+masking:
+                if (sp->last_link_state == LINK_UP) {
+                        /*enable down interrupt */
+                        val64 = readq(&bar0->gpio_int_mask);
+                        /* unmasks link down intr */
+                        val64 &=  ~GPIO_INT_MASK_LINK_DOWN;
+                        /* masks link up intr */
+                        val64 |= GPIO_INT_MASK_LINK_UP;
+                        writeq(val64, &bar0->gpio_int_mask);
+                } else {
+                        /*enable UP Interrupt */
+                        val64 = readq(&bar0->gpio_int_mask);
+                        /* unmasks link up interrupt */
+                        val64 &= ~GPIO_INT_MASK_LINK_UP;
+                        /* masks link down interrupt */
+                        val64 |=  GPIO_INT_MASK_LINK_DOWN;
+                        writeq(val64, &bar0->gpio_int_mask);
+                }
+        }
+}
 /**
 *  s2io_isr - ISR handler of the device .
 *  @irq: the irq of the device.
 *  @dev_id: a void pointer to the dev structure of the NIC.
 *  @pt_regs: pointer to the registers pushed on the stack.
- *  Description:  This function is the ISR handler of the device. It 
+ *  Description:  This function is the ISR handler of the device. It
- *  identifies the reason for the interrupt and calls the relevant 
+ *  identifies the reason for the interrupt and calls the relevant
- *  service routines. As a contongency measure, this ISR allocates the 
+ *  service routines. As a contongency measure, this ISR allocates the
 *  recv buffers, if their numbers are below the panic value which is
 *  presently set to 25% of the original number of rcv buffers allocated.
 *  Return value:
- *   IRQ_HANDLED: will be returned if IRQ was handled by this routine 
+ *   IRQ_HANDLED: will be returned if IRQ was handled by this routine
 *   IRQ_NONE: will be returned if interrupt is not from our device
 */
 static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs)
@@ -2798,40 +3297,31 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs)
        struct net_device *dev = (struct net_device *) dev_id;
        nic_t *sp = dev->priv;
        XENA_dev_config_t __iomem *bar0 = sp->bar0;
-#ifndef CONFIG_S2IO_NAPI
+        int i;
-        int i, ret;
+        u64 reason = 0, val64;
-#endif
-        u64 reason = 0;
        mac_info_t *mac_control;
        struct config_param *config;
+        atomic_inc(&sp->isr_cnt);
        mac_control = &sp->mac_control;
        config = &sp->config;
-        /* 
+        /*
         * Identify the cause for interrupt and call the appropriate
         * interrupt handler. Causes for the interrupt could be;
         * 1. Rx of packet.
         * 2. Tx complete.
         * 3. Link down.
-         * 4. Error in any functional blocks of the NIC. 
+         * 4. Error in any functional blocks of the NIC.
         */
        reason = readq(&bar0->general_int_status);
        if (!reason) {
                /* The interrupt was not raised by Xena. */
+                atomic_dec(&sp->isr_cnt);
                return IRQ_NONE;
        }
-        /* If Intr is because of Tx Traffic */
-        if (reason & GEN_INTR_TXTRAFFIC) {
-                tx_intr_handler(sp);
-        }
-        /* If Intr is because of an error */
-        if (reason & (GEN_ERROR_INTR))
-                alarm_intr_handler(sp);
 #ifdef CONFIG_S2IO_NAPI
        if (reason & GEN_INTR_RXTRAFFIC) {
                if (netif_rx_schedule_prep(dev)) {
@@ -2843,17 +3333,43 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs)
 #else
        /* If Intr is because of Rx Traffic */
        if (reason & GEN_INTR_RXTRAFFIC) {
-                rx_intr_handler(sp);
+                /*
+                 * rx_traffic_int reg is an R1 register, writing all 1's
+                 * will ensure that the actual interrupt causing bit get's
+                 * cleared and hence a read can be avoided.
+                 */
+                val64 = 0xFFFFFFFFFFFFFFFFULL;
+                writeq(val64, &bar0->rx_traffic_int);
+                for (i = 0; i < config->rx_ring_num; i++) {
+                        rx_intr_handler(&mac_control->rings[i]);
+                }
        }
 #endif
-        /* 
+        /* If Intr is because of Tx Traffic */
-         * If the Rx buffer count is below the panic threshold then 
+        if (reason & GEN_INTR_TXTRAFFIC) {
-         * reallocate the buffers from the interrupt handler itself, 
+                /*
+                 * tx_traffic_int reg is an R1 register, writing all 1's
+                 * will ensure that the actual interrupt causing bit get's
+                 * cleared and hence a read can be avoided.
+                 */
+                val64 = 0xFFFFFFFFFFFFFFFFULL;
+                writeq(val64, &bar0->tx_traffic_int);
+                for (i = 0; i < config->tx_fifo_num; i++)
+                        tx_intr_handler(&mac_control->fifos[i]);
+        }
+        if (reason & GEN_INTR_TXPIC)
+                s2io_txpic_intr_handle(sp);
+        /*
+         * If the Rx buffer count is below the panic threshold then
+         * reallocate the buffers from the interrupt handler itself,
         * else schedule a tasklet to reallocate the buffers.
         */
 #ifndef CONFIG_S2IO_NAPI
        for (i = 0; i < config->rx_ring_num; i++) {
+                int ret;
                int rxb_size = atomic_read(&sp->rx_bufs_left[i]);
                int level = rx_buffer_level(sp, rxb_size, i);
@@ -2865,6 +3381,7 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs)
                                          dev->name);
                                DBG_PRINT(ERR_DBG, " in ISR!!\n");
                                clear_bit(0, (&sp->tasklet_status));
+                                atomic_dec(&sp->isr_cnt);
                                return IRQ_HANDLED;
                        }
                        clear_bit(0, (&sp->tasklet_status));
@@ -2874,33 +3391,69 @@ static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs)
        }
 #endif
+        atomic_dec(&sp->isr_cnt);
        return IRQ_HANDLED;
 }
 /**
- *  s2io_get_stats - Updates the device statistics structure. 
+ * s2io_updt_stats -
+ */
+static void s2io_updt_stats(nic_t *sp)
+{
+        XENA_dev_config_t __iomem *bar0 = sp->bar0;
+        u64 val64;
+        int cnt = 0;
+        if (atomic_read(&sp->card_state) == CARD_UP) {
+                /* Apprx 30us on a 133 MHz bus */
+                val64 = SET_UPDT_CLICKS(10) |
+                        STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
+                writeq(val64, &bar0->stat_cfg);
+                do {
+                        udelay(100);
+                        val64 = readq(&bar0->stat_cfg);
+                        if (!(val64 & BIT(0)))
+                                break;
+                        cnt++;
+                        if (cnt == 5)
+                                break; /* Updt failed */
+                } while(1);
+        }
+}
+/**
+ *  s2io_get_stats - Updates the device statistics structure.
 *  @dev : pointer to the device structure.
 *  Description:
- *  This function updates the device statistics structure in the s2io_nic 
+ *  This function updates the device statistics structure in the s2io_nic
 *  structure and returns a pointer to the same.
 *  Return value:
 *  pointer to the updated net_device_stats structure.
 */
-static struct net_device_stats *s2io_get_stats(struct net_device *dev)
+struct net_device_stats *s2io_get_stats(struct net_device *dev)
 {
        nic_t *sp = dev->priv;
        mac_info_t *mac_control;
        struct config_param *config;
        mac_control = &sp->mac_control;
        config = &sp->config;
-        sp->stats.tx_errors = mac_control->stats_info->tmac_any_err_frms;
+        /* Configure Stats for immediate updt */
-        sp->stats.rx_errors = mac_control->stats_info->rmac_drop_frms;
+        s2io_updt_stats(sp);
-        sp->stats.multicast = mac_control->stats_info->rmac_vld_mcst_frms;
+        sp->stats.tx_packets =
+                le32_to_cpu(mac_control->stats_info->tmac_frms);
+        sp->stats.tx_errors =
+                le32_to_cpu(mac_control->stats_info->tmac_any_err_frms);
+        sp->stats.rx_errors =
+                le32_to_cpu(mac_control->stats_info->rmac_drop_frms);
+        sp->stats.multicast =
+                le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms);
        sp->stats.rx_length_errors =
-            mac_control->stats_info->rmac_long_frms;
+                le32_to_cpu(mac_control->stats_info->rmac_long_frms);
        return (&sp->stats);
 }
@@ -2909,8 +3462,8 @@ static struct net_device_stats *s2io_get_stats(struct net_device *dev)
 *  s2io_set_multicast - entry point for multicast address enable/disable.
 *  @dev : pointer to the device structure
 *  Description:
- *  This function is a driver entry point which gets called by the kernel 
+ *  This function is a driver entry point which gets called by the kernel
- *  whenever multicast addresses must be enabled/disabled. This also gets 
+ *  whenever multicast addresses must be enabled/disabled. This also gets
 *  called to set/reset promiscuous mode. Depending on the deivce flag, we
 *  determine, if multicast address must be enabled or if promiscuous mode
 *  is to be disabled etc.
@@ -2948,6 +3501,8 @@ static void s2io_set_multicast(struct net_device *dev)
                /*  Disable all Multicast addresses */
                writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
                       &bar0->rmac_addr_data0_mem);
+                writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
+                       &bar0->rmac_addr_data1_mem);
                val64 = RMAC_ADDR_CMD_MEM_WE |
                    RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
                    RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
@@ -3010,7 +3565,7 @@ static void s2io_set_multicast(struct net_device *dev)
                        writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
                               &bar0->rmac_addr_data0_mem);
                        writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
-                                &bar0->rmac_addr_data1_mem);
+                                &bar0->rmac_addr_data1_mem);
                        val64 = RMAC_ADDR_CMD_MEM_WE |
                            RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
                            RMAC_ADDR_CMD_MEM_OFFSET
@@ -3039,8 +3594,7 @@ static void s2io_set_multicast(struct net_device *dev)
                        writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
                               &bar0->rmac_addr_data0_mem);
                        writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
-                                &bar0->rmac_addr_data1_mem);
+                                &bar0->rmac_addr_data1_mem);
                        val64 = RMAC_ADDR_CMD_MEM_WE |
                            RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
                            RMAC_ADDR_CMD_MEM_OFFSET
@@ -3059,12 +3613,12 @@ static void s2io_set_multicast(struct net_device *dev)
 }
 /**
- *  s2io_set_mac_addr - Programs the Xframe mac address 
+ *  s2io_set_mac_addr - Programs the Xframe mac address
 *  @dev : pointer to the device structure.
 *  @addr: a uchar pointer to the new mac address which is to be set.
- *  Description : This procedure will program the Xframe to receive 
+ *  Description : This procedure will program the Xframe to receive
 *  frames with new Mac Address
- *  Return value: SUCCESS on success and an appropriate (-)ve integer 
+ *  Return value: SUCCESS on success and an appropriate (-)ve integer
 *  as defined in errno.h file on failure.
 */
@@ -3075,10 +3629,10 @@ int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
        register u64 val64, mac_addr = 0;
        int i;
-        /* 
+        /*
         * Set the new MAC address as the new unicast filter and reflect this
         * change on the device address registered with the OS. It will be
-         * at offset 0. 
+         * at offset 0.
         */
        for (i = 0; i < ETH_ALEN; i++) {
                mac_addr <<= 8;
@@ -3102,12 +3656,12 @@ int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
 }
 /**
- * s2io_ethtool_sset - Sets different link parameters. 
+ * s2io_ethtool_sset - Sets different link parameters.
 * @sp : private member of the device structure, which is a pointer to the  * s2io_nic structure.
 * @info: pointer to the structure with parameters given by ethtool to set
 * link information.
 * Description:
- * The function sets different link parameters provided by the user onto 
+ * The function sets different link parameters provided by the user onto
 * the NIC.
 * Return value:
 * 0 on success.
@@ -3129,7 +3683,7 @@ static int s2io_ethtool_sset(struct net_device *dev,
 }
 /**
- * s2io_ethtol_gset - Return link specific information. 
+ * s2io_ethtol_gset - Return link specific information.
 * @sp : private member of the device structure, pointer to the
 *      s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool
@@ -3161,8 +3715,8 @@ static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
 }
 /**
- * s2io_ethtool_gdrvinfo - Returns driver specific information. 
+ * s2io_ethtool_gdrvinfo - Returns driver specific information.
- * @sp : private member of the device structure, which is a pointer to the 
+ * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @info : pointer to the structure with parameters given by ethtool to
 * return driver information.
@@ -3190,9 +3744,9 @@ static void s2io_ethtool_gdrvinfo(struct net_device *dev,
 /**
 *  s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
- *  @sp: private member of the device structure, which is a pointer to the 
+ *  @sp: private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
- *  @regs : pointer to the structure with parameters given by ethtool for 
+ *  @regs : pointer to the structure with parameters given by ethtool for
 *  dumping the registers.
 *  @reg_space: The input argumnet into which all the registers are dumped.
 *  Description:
@@ -3221,11 +3775,11 @@ static void s2io_ethtool_gregs(struct net_device *dev,
 /**
 *  s2io_phy_id  - timer function that alternates adapter LED.
- *  @data : address of the private member of the device structure, which 
+ *  @data : address of the private member of the device structure, which
 *  is a pointer to the s2io_nic structure, provided as an u32.
- * Description: This is actually the timer function that alternates the 
+ * Description: This is actually the timer function that alternates the
- * adapter LED bit of the adapter control bit to set/reset every time on 
+ * adapter LED bit of the adapter control bit to set/reset every time on
- * invocation. The timer is set for 1/2 a second, hence tha NIC blinks 
+ * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
 *  once every second.
 */
 static void s2io_phy_id(unsigned long data)
@@ -3236,7 +3790,8 @@ static void s2io_phy_id(unsigned long data)
        u16 subid;
        subid = sp->pdev->subsystem_device;
-        if ((subid & 0xFF) >= 0x07) {
+        if ((sp->device_type == XFRAME_II_DEVICE) ||
+                   ((subid & 0xFF) >= 0x07)) {
                val64 = readq(&bar0->gpio_control);
                val64 ^= GPIO_CTRL_GPIO_0;
                writeq(val64, &bar0->gpio_control);
@@ -3253,12 +3808,12 @@ static void s2io_phy_id(unsigned long data)
 * s2io_ethtool_idnic - To physically identify the nic on the system.
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
- * @id : pointer to the structure with identification parameters given by 
+ * @id : pointer to the structure with identification parameters given by
 * ethtool.
 * Description: Used to physically identify the NIC on the system.
- * The Link LED will blink for a time specified by the user for 
+ * The Link LED will blink for a time specified by the user for
 * identification.
- * NOTE: The Link has to be Up to be able to blink the LED. Hence 
+ * NOTE: The Link has to be Up to be able to blink the LED. Hence
 * identification is possible only if it's link is up.
 * Return value:
 * int , returns 0 on success
@@ -3273,7 +3828,8 @@ static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
        subid = sp->pdev->subsystem_device;
        last_gpio_ctrl_val = readq(&bar0->gpio_control);
-        if ((subid & 0xFF) < 0x07) {
+        if ((sp->device_type == XFRAME_I_DEVICE) &&
+                ((subid & 0xFF) < 0x07)) {
                val64 = readq(&bar0->adapter_control);
                if (!(val64 & ADAPTER_CNTL_EN)) {
                        printk(KERN_ERR
@@ -3288,12 +3844,12 @@ static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
        }
        mod_timer(&sp->id_timer, jiffies);
        if (data)
-                msleep(data * 1000);
+                msleep_interruptible(data * HZ);
        else
-                msleep(0xFFFFFFFF);
+                msleep_interruptible(MAX_FLICKER_TIME);
        del_timer_sync(&sp->id_timer);
-        if (CARDS_WITH_FAULTY_LINK_INDICATORS(subid)) {
+        if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
                writeq(last_gpio_ctrl_val, &bar0->gpio_control);
                last_gpio_ctrl_val = readq(&bar0->gpio_control);
        }
@@ -3303,7 +3859,8 @@ static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
 /**
 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
- * @sp : private member of the device structure, which is a pointer to the  * s2io_nic structure.
+ * @sp : private member of the device structure, which is a pointer to the
+ *      s2io_nic structure.
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
 * Returns the Pause frame generation and reception capability of the NIC.
@@ -3327,7 +3884,7 @@ static void s2io_ethtool_getpause_data(struct net_device *dev,
 /**
 * s2io_ethtool_setpause_data -  set/reset pause frame generation.
- * @sp : private member of the device structure, which is a pointer to the 
+ * @sp : private member of the device structure, which is a pointer to the
 *      s2io_nic structure.
 * @ep : pointer to the structure with pause parameters given by ethtool.
 * Description:
@@ -3338,7 +3895,7 @@ static void s2io_ethtool_getpause_data(struct net_device *dev,
 */
 static int s2io_ethtool_setpause_data(struct net_device *dev,
-                                      struct ethtool_pauseparam *ep)
+                               struct ethtool_pauseparam *ep)
 {
        u64 val64;
        nic_t *sp = dev->priv;
@@ -3359,13 +3916,13 @@ static int s2io_ethtool_setpause_data(struct net_device *dev,
 /**
 * read_eeprom - reads 4 bytes of data from user given offset.
- * @sp : private member of the device structure, which is a pointer to the 
+ * @sp : private member of the device structure, which is a pointer to the
 *      s2io_nic structure.
 * @off : offset at which the data must be written
 * @data : Its an output parameter where the data read at the given
- *      offset is stored.
+ *      offset is stored.
 * Description:
- * Will read 4 bytes of data from the user given offset and return the 
+ * Will read 4 bytes of data from the user given offset and return the
 * read data.
 * NOTE: Will allow to read only part of the EEPROM visible through the
 *   I2C bus.
@@ -3406,7 +3963,7 @@ static int read_eeprom(nic_t * sp, int off, u32 * data)
 *       s2io_nic structure.
 *  @off : offset at which the data must be written
 *  @data : The data that is to be written
- *  @cnt : Number of bytes of the data that are actually to be written into 
+ *  @cnt : Number of bytes of the data that are actually to be written into
 *  the Eeprom. (max of 3)
 * Description:
 *  Actually writes the relevant part of the data value into the Eeprom
@@ -3443,7 +4000,7 @@ static int write_eeprom(nic_t * sp, int off, u32 data, int cnt)
 /**
 *  s2io_ethtool_geeprom  - reads the value stored in the Eeprom.
 *  @sp : private member of the device structure, which is a pointer to the *       s2io_nic structure.
- *  @eeprom : pointer to the user level structure provided by ethtool, 
+ *  @eeprom : pointer to the user level structure provided by ethtool,
 *  containing all relevant information.
 *  @data_buf : user defined value to be written into Eeprom.
 *  Description: Reads the values stored in the Eeprom at given offset
@@ -3454,7 +4011,7 @@ static int write_eeprom(nic_t * sp, int off, u32 data, int cnt)
 */
 static int s2io_ethtool_geeprom(struct net_device *dev,
-                                struct ethtool_eeprom *eeprom, u8 * data_buf)
+                         struct ethtool_eeprom *eeprom, u8 * data_buf)
 {
        u32 data, i, valid;
        nic_t *sp = dev->priv;
@@ -3479,7 +4036,7 @@ static int s2io_ethtool_geeprom(struct net_device *dev,
 *  s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
 *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
- *  @eeprom : pointer to the user level structure provided by ethtool, 
+ *  @eeprom : pointer to the user level structure provided by ethtool,
 *  containing all relevant information.
 *  @data_buf ; user defined value to be written into Eeprom.
 *  Description:
@@ -3527,8 +4084,8 @@ static int s2io_ethtool_seeprom(struct net_device *dev,
 }
 /**
- * s2io_register_test - reads and writes into all clock domains. 
+ * s2io_register_test - reads and writes into all clock domains.
- * @sp : private member of the device structure, which is a pointer to the 
+ * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data : variable that returns the result of each of the test conducted b
 * by the driver.
@@ -3545,8 +4102,8 @@ static int s2io_register_test(nic_t * sp, uint64_t * data)
        u64 val64 = 0;
        int fail = 0;
-        val64 = readq(&bar0->pcc_enable);
+        val64 = readq(&bar0->pif_rd_swapper_fb);
-        if (val64 != 0xff00000000000000ULL) {
+        if (val64 != 0x123456789abcdefULL) {
                fail = 1;
                DBG_PRINT(INFO_DBG, "Read Test level 1 fails\n");
        }
@@ -3590,13 +4147,13 @@ static int s2io_register_test(nic_t * sp, uint64_t * data)
 }
 /**
- * s2io_eeprom_test - to verify that EEprom in the xena can be programmed. 
+ * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
 * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data:variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
- * Verify that EEPROM in the xena can be programmed using I2C_CONTROL 
+ * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
 * register.
 * Return value:
 * 0 on success.
@@ -3661,14 +4218,14 @@ static int s2io_eeprom_test(nic_t * sp, uint64_t * data)
 /**
 * s2io_bist_test - invokes the MemBist test of the card .
- * @sp : private member of the device structure, which is a pointer to the 
+ * @sp : private member of the device structure, which is a pointer to the
 * s2io_nic structure.
- * @data:variable that returns the result of each of the test conducted by 
+ * @data:variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
 * This invokes the MemBist test of the card. We give around
 * 2 secs time for the Test to complete. If it's still not complete
- * within this peiod, we consider that the test failed. 
+ * within this peiod, we consider that the test failed.
 * Return value:
 * 0 on success and -1 on failure.
 */
@@ -3697,13 +4254,13 @@ static int s2io_bist_test(nic_t * sp, uint64_t * data)
 }
 /**
- * s2io-link_test - verifies the link state of the nic  
+ * s2io-link_test - verifies the link state of the nic
- * @sp ; private member of the device structure, which is a pointer to the 
+ * @sp ; private member of the device structure, which is a pointer to the
 * s2io_nic structure.
 * @data: variable that returns the result of each of the test conducted by
 * the driver.
 * Description:
- * The function verifies the link state of the NIC and updates the input 
+ * The function verifies the link state of the NIC and updates the input
 * argument 'data' appropriately.
 * Return value:
 * 0 on success.
@@ -3722,13 +4279,13 @@ static int s2io_link_test(nic_t * sp, uint64_t * data)
 }
 /**
- * s2io_rldram_test - offline test for access to the RldRam chip on the NIC 
+ * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
- * @sp - private member of the device structure, which is a pointer to the  
+ * @sp - private member of the device structure, which is a pointer to the
 * s2io_nic structure.
- * @data - variable that returns the result of each of the test 
+ * @data - variable that returns the result of each of the test
 * conducted by the driver.
 * Description:
- *  This is one of the offline test that tests the read and write 
+ *  This is one of the offline test that tests the read and write
 *  access to the RldRam chip on the NIC.
 * Return value:
 *  0 on success.
@@ -3833,7 +4390,7 @@ static int s2io_rldram_test(nic_t * sp, uint64_t * data)
 *  s2io_nic structure.
 *  @ethtest : pointer to a ethtool command specific structure that will be
 *  returned to the user.
- *  @data : variable that returns the result of each of the test 
+ *  @data : variable that returns the result of each of the test
 * conducted by the driver.
 * Description:
 *  This function conducts 6 tests ( 4 offline and 2 online) to determine
@@ -3851,23 +4408,18 @@ static void s2io_ethtool_test(struct net_device *dev,
        if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
                /* Offline Tests. */
-                if (orig_state) {
+                if (orig_state)
                        s2io_close(sp->dev);
-                        s2io_set_swapper(sp);
-                } else
-                        s2io_set_swapper(sp);
                if (s2io_register_test(sp, &data[0]))
                        ethtest->flags |= ETH_TEST_FL_FAILED;
                s2io_reset(sp);
-                s2io_set_swapper(sp);
                if (s2io_rldram_test(sp, &data[3]))
                        ethtest->flags |= ETH_TEST_FL_FAILED;
                s2io_reset(sp);
-                s2io_set_swapper(sp);
                if (s2io_eeprom_test(sp, &data[1]))
                        ethtest->flags |= ETH_TEST_FL_FAILED;
@@ -3910,61 +4462,111 @@ static void s2io_get_ethtool_stats(struct net_device *dev,
        nic_t *sp = dev->priv;
        StatInfo_t *stat_info = sp->mac_control.stats_info;
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_frms);
+        s2io_updt_stats(sp);
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_data_octets);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_frms_oflow) << 32  |
+                le32_to_cpu(stat_info->tmac_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_data_octets_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_data_octets);
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_drop_frms);
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_mcst_frms);
+        tmp_stats[i++] =
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_bcst_frms);
+                (u64)le32_to_cpu(stat_info->tmac_mcst_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_mcst_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_bcst_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms);
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_any_err_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_any_err_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets);
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_vld_ip);
+        tmp_stats[i++] =
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_drop_ip);
+                (u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 |
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_icmp);
+                le32_to_cpu(stat_info->tmac_vld_ip);
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_rst_tcp);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_drop_ip_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_drop_ip);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_icmp_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_icmp);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->tmac_rst_tcp_oflow) << 32 |
+                le32_to_cpu(stat_info->tmac_rst_tcp);
        tmp_stats[i++] = le64_to_cpu(stat_info->tmac_tcp);
-        tmp_stats[i++] = le32_to_cpu(stat_info->tmac_udp);
+        tmp_stats[i++] = (u64)le32_to_cpu(stat_info->tmac_udp_oflow) << 32 |
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_vld_frms);
+                le32_to_cpu(stat_info->tmac_udp);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_data_octets);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_vld_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_vld_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_data_octets_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_data_octets);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_fcs_err_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_drop_frms);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_vld_mcst_frms);
+        tmp_stats[i++] =
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_vld_bcst_frms);
+                (u64)le32_to_cpu(stat_info->rmac_vld_mcst_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_vld_mcst_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_vld_bcst_frms);
        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_discarded_frms);
+        tmp_stats[i++] =
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_usized_frms);
+                (u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 |
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_osized_frms);
+                le32_to_cpu(stat_info->rmac_discarded_frms);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_frag_frms);
+        tmp_stats[i++] =
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_jabber_frms);
+                (u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 |
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ip);
+                le32_to_cpu(stat_info->rmac_usized_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_osized_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_osized_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_frag_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_frag_frms);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_jabber_frms);
+        tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_ip);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets);
        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_drop_ip);
+        tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 |
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_icmp);
+                le32_to_cpu(stat_info->rmac_drop_ip);
+        tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_icmp);
        tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_udp);
+        tmp_stats[i++] = (u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 |
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_drp_udp);
+                le32_to_cpu(stat_info->rmac_udp);
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pause_cnt);
+        tmp_stats[i++] =
-        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_accepted_ip);
+                (u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_err_drp_udp);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_pause_cnt);
+        tmp_stats[i++] =
+                (u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 |
+                le32_to_cpu(stat_info->rmac_accepted_ip);
        tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp);
+        tmp_stats[i++] = 0;
+        tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs;
+        tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs;
 }
-static int s2io_ethtool_get_regs_len(struct net_device *dev)
+int s2io_ethtool_get_regs_len(struct net_device *dev)
 {
        return (XENA_REG_SPACE);
 }
-static u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
+u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
 {
        nic_t *sp = dev->priv;
        return (sp->rx_csum);
 }
+int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
-static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
 {
        nic_t *sp = dev->priv;
@@ -3975,19 +4577,17 @@ static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
        return 0;
 }
+int s2io_get_eeprom_len(struct net_device *dev)
-static int s2io_get_eeprom_len(struct net_device *dev)
 {
        return (XENA_EEPROM_SPACE);
 }
-static int s2io_ethtool_self_test_count(struct net_device *dev)
+int s2io_ethtool_self_test_count(struct net_device *dev)
 {
        return (S2IO_TEST_LEN);
 }
+void s2io_ethtool_get_strings(struct net_device *dev,
-static void s2io_ethtool_get_strings(struct net_device *dev,
+                              u32 stringset, u8 * data)
-                                     u32 stringset, u8 * data)
 {
        switch (stringset) {
        case ETH_SS_TEST:
@@ -3998,13 +4598,12 @@ static void s2io_ethtool_get_strings(struct net_device *dev,
                       sizeof(ethtool_stats_keys));
        }
 }
 static int s2io_ethtool_get_stats_count(struct net_device *dev)
 {
        return (S2IO_STAT_LEN);
 }
-static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
+int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
 {
        if (data)
                dev->features |= NETIF_F_IP_CSUM;
@@ -4046,21 +4645,18 @@ static struct ethtool_ops netdev_ethtool_ops = {
 };
 /**
- *  s2io_ioctl - Entry point for the Ioctl 
+ *  s2io_ioctl - Entry point for the Ioctl
 *  @dev :  Device pointer.
 *  @ifr :  An IOCTL specefic structure, that can contain a pointer to
 *  a proprietary structure used to pass information to the driver.
 *  @cmd :  This is used to distinguish between the different commands that
 *  can be passed to the IOCTL functions.
 *  Description:
- *  This function has support for ethtool, adding multiple MAC addresses on 
+ *  Currently there are no special functionality supported in IOCTL, hence
- *  the NIC and some DBG commands for the util tool.
+ *  function always return EOPNOTSUPPORTED
- *  Return value:
- *  Currently the IOCTL supports no operations, hence by default this
- *  function returns OP NOT SUPPORTED value.
 */
-static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
        return -EOPNOTSUPP;
 }
@@ -4076,17 +4672,9 @@ static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 *   file on failure.
 */
-static int s2io_change_mtu(struct net_device *dev, int new_mtu)
+int s2io_change_mtu(struct net_device *dev, int new_mtu)
 {
        nic_t *sp = dev->priv;
-        XENA_dev_config_t __iomem *bar0 = sp->bar0;
-        register u64 val64;
-        if (netif_running(dev)) {
-                DBG_PRINT(ERR_DBG, "%s: Must be stopped to ", dev->name);
-                DBG_PRINT(ERR_DBG, "change its MTU \n");
-                return -EBUSY;
-        }
        if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
                DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
@@ -4094,11 +4682,22 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu)
                return -EPERM;
        }
-        /* Set the new MTU into the PYLD register of the NIC */
-        val64 = new_mtu;
-        writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
        dev->mtu = new_mtu;
+        if (netif_running(dev)) {
+                s2io_card_down(sp);
+                netif_stop_queue(dev);
+                if (s2io_card_up(sp)) {
+                        DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
+                                  __FUNCTION__);
+                }
+                if (netif_queue_stopped(dev))
+                        netif_wake_queue(dev);
+        } else { /* Device is down */
+                XENA_dev_config_t __iomem *bar0 = sp->bar0;
+                u64 val64 = new_mtu;
+                writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
+        }
        return 0;
 }
@@ -4108,9 +4707,9 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu)
 *  @dev_adr : address of the device structure in dma_addr_t format.
 *  Description:
 *  This is the tasklet or the bottom half of the ISR. This is
- *  an extension of the ISR which is scheduled by the scheduler to be run 
+ *  an extension of the ISR which is scheduled by the scheduler to be run
 *  when the load on the CPU is low. All low priority tasks of the ISR can
- *  be pushed into the tasklet. For now the tasklet is used only to 
+ *  be pushed into the tasklet. For now the tasklet is used only to
 *  replenish the Rx buffers in the Rx buffer descriptors.
 *  Return value:
 *  void.
@@ -4166,19 +4765,22 @@ static void s2io_set_link(unsigned long data)
        }
        subid = nic->pdev->subsystem_device;
-        /* 
+        if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
-         * Allow a small delay for the NICs self initiated 
+                /*
-         * cleanup to complete.
+                 * Allow a small delay for the NICs self initiated
-         */
+                 * cleanup to complete.
-        msleep(100);
+                 */
+                msleep(100);
+        }
        val64 = readq(&bar0->adapter_status);
-        if (verify_xena_quiescence(val64, nic->device_enabled_once)) {
+        if (verify_xena_quiescence(nic, val64, nic->device_enabled_once)) {
                if (LINK_IS_UP(val64)) {
                        val64 = readq(&bar0->adapter_control);
                        val64 |= ADAPTER_CNTL_EN;
                        writeq(val64, &bar0->adapter_control);
-                        if (CARDS_WITH_FAULTY_LINK_INDICATORS(subid)) {
+                        if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
+                                                             subid)) {
                                val64 = readq(&bar0->gpio_control);
                                val64 |= GPIO_CTRL_GPIO_0;
                                writeq(val64, &bar0->gpio_control);
@@ -4187,20 +4789,24 @@ static void s2io_set_link(unsigned long data)
                                val64 |= ADAPTER_LED_ON;
                                writeq(val64, &bar0->adapter_control);
                        }
-                        val64 = readq(&bar0->adapter_status);
+                        if (s2io_link_fault_indication(nic) ==
-                        if (!LINK_IS_UP(val64)) {
+                                                MAC_RMAC_ERR_TIMER) {
-                                DBG_PRINT(ERR_DBG, "%s:", dev->name);
+                                val64 = readq(&bar0->adapter_status);
-                                DBG_PRINT(ERR_DBG, " Link down");
+                                if (!LINK_IS_UP(val64)) {
-                                DBG_PRINT(ERR_DBG, "after ");
+                                        DBG_PRINT(ERR_DBG, "%s:", dev->name);
-                                DBG_PRINT(ERR_DBG, "enabling ");
+                                        DBG_PRINT(ERR_DBG, " Link down");
-                                DBG_PRINT(ERR_DBG, "device \n");
+                                        DBG_PRINT(ERR_DBG, "after ");
+                                        DBG_PRINT(ERR_DBG, "enabling ");
+                                        DBG_PRINT(ERR_DBG, "device \n");
+                                }
                        }
                        if (nic->device_enabled_once == FALSE) {
                                nic->device_enabled_once = TRUE;
                        }
                        s2io_link(nic, LINK_UP);
                } else {
-                        if (CARDS_WITH_FAULTY_LINK_INDICATORS(subid)) {
+                        if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
+                                                              subid)) {
                                val64 = readq(&bar0->gpio_control);
                                val64 &= ~GPIO_CTRL_GPIO_0;
                                writeq(val64, &bar0->gpio_control);
@@ -4223,9 +4829,11 @@ static void s2io_card_down(nic_t * sp)
        unsigned long flags;
        register u64 val64 = 0;
+        del_timer_sync(&sp->alarm_timer);
        /* If s2io_set_link task is executing, wait till it completes. */
-        while (test_and_set_bit(0, &(sp->link_state)))
+        while (test_and_set_bit(0, &(sp->link_state))) {
                msleep(50);
+        }
        atomic_set(&sp->card_state, CARD_DOWN);
        /* disable Tx and Rx traffic on the NIC */
@@ -4237,7 +4845,7 @@ static void s2io_card_down(nic_t * sp)
        /* Check if the device is Quiescent and then Reset the NIC */
        do {
                val64 = readq(&bar0->adapter_status);
-                if (verify_xena_quiescence(val64, sp->device_enabled_once)) {
+                if (verify_xena_quiescence(sp, val64, sp->device_enabled_once)) {
                        break;
                }
@@ -4251,14 +4859,27 @@ static void s2io_card_down(nic_t * sp)
                        break;
                }
        } while (1);
-        spin_lock_irqsave(&sp->tx_lock, flags);
        s2io_reset(sp);
-        /* Free all unused Tx and Rx buffers */
+        /* Waiting till all Interrupt handlers are complete */
+        cnt = 0;
+        do {
+                msleep(10);
+                if (!atomic_read(&sp->isr_cnt))
+                        break;
+                cnt++;
+        } while(cnt < 5);
+        spin_lock_irqsave(&sp->tx_lock, flags);
+        /* Free all Tx buffers */
        free_tx_buffers(sp);
+        spin_unlock_irqrestore(&sp->tx_lock, flags);
+        /* Free all Rx buffers */
+        spin_lock_irqsave(&sp->rx_lock, flags);
        free_rx_buffers(sp);
+        spin_unlock_irqrestore(&sp->rx_lock, flags);
-        spin_unlock_irqrestore(&sp->tx_lock, flags);
        clear_bit(0, &(sp->link_state));
 }
@@ -4276,8 +4897,8 @@ static int s2io_card_up(nic_t * sp)
                return -ENODEV;
        }
-        /* 
+        /*
-         * Initializing the Rx buffers. For now we are considering only 1 
+         * Initializing the Rx buffers. For now we are considering only 1
         * Rx ring and initializing buffers into 30 Rx blocks
         */
        mac_control = &sp->mac_control;
@@ -4311,16 +4932,18 @@ static int s2io_card_up(nic_t * sp)
                return -ENODEV;
        }
+        S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));
        atomic_set(&sp->card_state, CARD_UP);
        return 0;
 }
-/** 
+/**
 * s2io_restart_nic - Resets the NIC.
 * @data : long pointer to the device private structure
 * Description:
 * This function is scheduled to be run by the s2io_tx_watchdog
- * function after 0.5 secs to reset the NIC. The idea is to reduce 
+ * function after 0.5 secs to reset the NIC. The idea is to reduce
 * the run time of the watch dog routine which is run holding a
 * spin lock.
 */
@@ -4338,10 +4961,11 @@ static void s2io_restart_nic(unsigned long data)
        netif_wake_queue(dev);
        DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n",
                  dev->name);
 }
-/** 
+/**
- *  s2io_tx_watchdog - Watchdog for transmit side. 
+ *  s2io_tx_watchdog - Watchdog for transmit side.
 *  @dev : Pointer to net device structure
 *  Description:
 *  This function is triggered if the Tx Queue is stopped
@@ -4369,7 +4993,7 @@ static void s2io_tx_watchdog(struct net_device *dev)
 *   @len : length of the packet
 *   @cksum : FCS checksum of the frame.
 *   @ring_no : the ring from which this RxD was extracted.
- *   Description: 
+ *   Description:
 *   This function is called by the Tx interrupt serivce routine to perform
 *   some OS related operations on the SKB before passing it to the upper
 *   layers. It mainly checks if the checksum is OK, if so adds it to the
@@ -4379,35 +5003,68 @@ static void s2io_tx_watchdog(struct net_device *dev)
 *   Return value:
 *   SUCCESS on success and -1 on failure.
 */
-#ifndef CONFIG_2BUFF_MODE
+static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp)
-static int rx_osm_handler(nic_t * sp, u16 len, RxD_t * rxdp, int ring_no)
-#else
-static int rx_osm_handler(nic_t * sp, RxD_t * rxdp, int ring_no,
-                          buffAdd_t * ba)
-#endif
 {
+        nic_t *sp = ring_data->nic;
        struct net_device *dev = (struct net_device *) sp->dev;
-        struct sk_buff *skb =
+        struct sk_buff *skb = (struct sk_buff *)
-            (struct sk_buff *) ((unsigned long) rxdp->Host_Control);
+                ((unsigned long) rxdp->Host_Control);
+        int ring_no = ring_data->ring_no;
        u16 l3_csum, l4_csum;
 #ifdef CONFIG_2BUFF_MODE
-        int buf0_len, buf2_len;
+        int buf0_len = RXD_GET_BUFFER0_SIZE(rxdp->Control_2);
+        int buf2_len = RXD_GET_BUFFER2_SIZE(rxdp->Control_2);
+        int get_block = ring_data->rx_curr_get_info.block_index;
+        int get_off = ring_data->rx_curr_get_info.offset;
+        buffAdd_t *ba = &ring_data->ba[get_block][get_off];
        unsigned char *buff;
+#else
+        u16 len = (u16) ((RXD_GET_BUFFER0_SIZE(rxdp->Control_2)) >> 48);;
 #endif
+        skb->dev = dev;
+        if (rxdp->Control_1 & RXD_T_CODE) {
+                unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
+                DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%llx\n",
+                          dev->name, err);
+                dev_kfree_skb(skb);
+                sp->stats.rx_crc_errors++;
+                atomic_dec(&sp->rx_bufs_left[ring_no]);
+                rxdp->Host_Control = 0;
+                return 0;
+        }
-        l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
+        /* Updating statistics */
-        if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && (sp->rx_csum)) {
+        rxdp->Host_Control = 0;
+        sp->rx_pkt_count++;
+        sp->stats.rx_packets++;
+#ifndef CONFIG_2BUFF_MODE
+        sp->stats.rx_bytes += len;
+#else
+        sp->stats.rx_bytes += buf0_len + buf2_len;
+#endif
+#ifndef CONFIG_2BUFF_MODE
+        skb_put(skb, len);
+#else
+        buff = skb_push(skb, buf0_len);
+        memcpy(buff, ba->ba_0, buf0_len);
+        skb_put(skb, buf2_len);
+#endif
+        if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) &&
+            (sp->rx_csum)) {
+                l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
                l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
                if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
-                        /* 
+                        /*
                         * NIC verifies if the Checksum of the received
                         * frame is Ok or not and accordingly returns
                         * a flag in the RxD.
                         */
                        skb->ip_summed = CHECKSUM_UNNECESSARY;
                } else {
-                        /* 
+                        /*
-                         * Packet with erroneous checksum, let the 
+                         * Packet with erroneous checksum, let the
                         * upper layers deal with it.
                         */
                        skb->ip_summed = CHECKSUM_NONE;
@@ -4416,44 +5073,26 @@ static int rx_osm_handler(nic_t * sp, RxD_t * rxdp, int ring_no,
                skb->ip_summed = CHECKSUM_NONE;
        }
-        if (rxdp->Control_1 & RXD_T_CODE) {
-                unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
-                DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%llx\n",
-                          dev->name, err);
-        }
-#ifdef CONFIG_2BUFF_MODE
-        buf0_len = RXD_GET_BUFFER0_SIZE(rxdp->Control_2);
-        buf2_len = RXD_GET_BUFFER2_SIZE(rxdp->Control_2);
-#endif
-        skb->dev = dev;
-#ifndef CONFIG_2BUFF_MODE
-        skb_put(skb, len);
        skb->protocol = eth_type_trans(skb, dev);
-#else
-        buff = skb_push(skb, buf0_len);
-        memcpy(buff, ba->ba_0, buf0_len);
-        skb_put(skb, buf2_len);
-        skb->protocol = eth_type_trans(skb, dev);
-#endif
 #ifdef CONFIG_S2IO_NAPI
-        netif_receive_skb(skb);
+        if (sp->vlgrp && RXD_GET_VLAN_TAG(rxdp->Control_2)) {
+                /* Queueing the vlan frame to the upper layer */
+                vlan_hwaccel_receive_skb(skb, sp->vlgrp,
+                        RXD_GET_VLAN_TAG(rxdp->Control_2));
+        } else {
+                netif_receive_skb(skb);
+        }
 #else
-        netif_rx(skb);
+        if (sp->vlgrp && RXD_GET_VLAN_TAG(rxdp->Control_2)) {
+                /* Queueing the vlan frame to the upper layer */
+                vlan_hwaccel_rx(skb, sp->vlgrp,
+                        RXD_GET_VLAN_TAG(rxdp->Control_2));
+        } else {
+                netif_rx(skb);
+        }
 #endif
        dev->last_rx = jiffies;
-        sp->rx_pkt_count++;
-        sp->stats.rx_packets++;
-#ifndef CONFIG_2BUFF_MODE
-        sp->stats.rx_bytes += len;
-#else
-        sp->stats.rx_bytes += buf0_len + buf2_len;
-#endif
        atomic_dec(&sp->rx_bufs_left[ring_no]);
-        rxdp->Host_Control = 0;
        return SUCCESS;
 }
@@ -4464,13 +5103,13 @@ static int rx_osm_handler(nic_t * sp, RxD_t * rxdp, int ring_no,
 *  @link : inidicates whether link is UP/DOWN.
 *  Description:
 *  This function stops/starts the Tx queue depending on whether the link
- *  status of the NIC is is down or up. This is called by the Alarm 
+ *  status of the NIC is is down or up. This is called by the Alarm
- *  interrupt handler whenever a link change interrupt comes up. 
+ *  interrupt handler whenever a link change interrupt comes up.
 *  Return value:
 *  void.
 */
-static void s2io_link(nic_t * sp, int link)
+void s2io_link(nic_t * sp, int link)
 {
        struct net_device *dev = (struct net_device *) sp->dev;
@@ -4487,8 +5126,25 @@ static void s2io_link(nic_t * sp, int link)
 }
 /**
- *  s2io_init_pci -Initialization of PCI and PCI-X configuration registers . 
+ *  get_xena_rev_id - to identify revision ID of xena.
- *  @sp : private member of the device structure, which is a pointer to the 
+ *  @pdev : PCI Dev structure
+ *  Description:
+ *  Function to identify the Revision ID of xena.
+ *  Return value:
+ *  returns the revision ID of the device.
+ */
+int get_xena_rev_id(struct pci_dev *pdev)
+{
+        u8 id = 0;
+        int ret;
+        ret = pci_read_config_byte(pdev, PCI_REVISION_ID, (u8 *) & id);
+        return id;
+}
+/**
+ *  s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
+ *  @sp : private member of the device structure, which is a pointer to the
 *  s2io_nic structure.
 *  Description:
 *  This function initializes a few of the PCI and PCI-X configuration registers
@@ -4499,15 +5155,15 @@ static void s2io_link(nic_t * sp, int link)
 static void s2io_init_pci(nic_t * sp)
 {
-        u16 pci_cmd = 0;
+        u16 pci_cmd = 0, pcix_cmd = 0;
        /* Enable Data Parity Error Recovery in PCI-X command register. */
        pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                             &(sp->pcix_cmd));
+                             &(pcix_cmd));
        pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                              (sp->pcix_cmd | 1));
+                              (pcix_cmd | 1));
        pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                             &(sp->pcix_cmd));
+                             &(pcix_cmd));
        /* Set the PErr Response bit in PCI command register. */
        pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
@@ -4515,53 +5171,43 @@ static void s2io_init_pci(nic_t * sp)
                              (pci_cmd | PCI_COMMAND_PARITY));
        pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
-        /* Set MMRB count to 1024 in PCI-X Command register. */
-        sp->pcix_cmd &= 0xFFF3;
-        pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, (sp->pcix_cmd | (0x1 << 2)));    /* MMRBC 1K */
-        pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                             &(sp->pcix_cmd));
-        /*  Setting Maximum outstanding splits based on system type. */
-        sp->pcix_cmd &= 0xFF8F;
-        sp->pcix_cmd |= XENA_MAX_OUTSTANDING_SPLITS(0x1);       /* 2 splits. */
-        pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                              sp->pcix_cmd);
-        pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                             &(sp->pcix_cmd));
        /* Forcibly disabling relaxed ordering capability of the card. */
-        sp->pcix_cmd &= 0xfffd;
+        pcix_cmd &= 0xfffd;
        pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                              sp->pcix_cmd);
+                              pcix_cmd);
        pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
-                             &(sp->pcix_cmd));
+                             &(pcix_cmd));
 }
 MODULE_AUTHOR("Raghavendra Koushik <raghavendra.koushik@neterion.com>");
 MODULE_LICENSE("GPL");
 module_param(tx_fifo_num, int, 0);
-module_param_array(tx_fifo_len, int, NULL, 0);
 module_param(rx_ring_num, int, 0);
-module_param_array(rx_ring_sz, int, NULL, 0);
+module_param_array(tx_fifo_len, uint, NULL, 0);
-module_param(Stats_refresh_time, int, 0);
+module_param_array(rx_ring_sz, uint, NULL, 0);
+module_param_array(rts_frm_len, uint, NULL, 0);
+module_param(use_continuous_tx_intrs, int, 1);
 module_param(rmac_pause_time, int, 0);
 module_param(mc_pause_threshold_q0q3, int, 0);
 module_param(mc_pause_threshold_q4q7, int, 0);
 module_param(shared_splits, int, 0);
 module_param(tmac_util_period, int, 0);
 module_param(rmac_util_period, int, 0);
+module_param(bimodal, bool, 0);
 #ifndef CONFIG_S2IO_NAPI
 module_param(indicate_max_pkts, int, 0);
 #endif
+module_param(rxsync_frequency, int, 0);
 /**
- *  s2io_init_nic - Initialization of the adapter . 
+ *  s2io_init_nic - Initialization of the adapter .
 *  @pdev : structure containing the PCI related information of the device.
 *  @pre: List of PCI devices supported by the driver listed in s2io_tbl.
 *  Description:
 *  The function initializes an adapter identified by the pci_dec structure.
- *  All OS related initialization including memory and device structure and 
+ *  All OS related initialization including memory and device structure and
- *  initlaization of the device private variable is done. Also the swapper 
+ *  initlaization of the device private variable is done. Also the swapper
- *  control register is initialized to enable read and write into the I/O 
+ *  control register is initialized to enable read and write into the I/O
 *  registers of the device.
 *  Return value:
 *  returns 0 on success and negative on failure.
@@ -4572,7 +5218,6 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
 {
        nic_t *sp;
        struct net_device *dev;
-        char *dev_name = "S2IO 10GE NIC";
        int i, j, ret;
        int dma_flag = FALSE;
        u32 mac_up, mac_down;
@@ -4581,10 +5226,11 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        u16 subid;
        mac_info_t *mac_control;
        struct config_param *config;
+        int mode;
+#ifdef CONFIG_S2IO_NAPI
-        DBG_PRINT(ERR_DBG, "Loading S2IO driver with %s\n",
+        DBG_PRINT(ERR_DBG, "NAPI support has been enabled\n");
-                s2io_driver_version);
+#endif
        if ((ret = pci_enable_device(pdev))) {
                DBG_PRINT(ERR_DBG,
@@ -4595,7 +5241,6 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
                DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
                dma_flag = TRUE;
                if (pci_set_consistent_dma_mask
                    (pdev, DMA_64BIT_MASK)) {
                        DBG_PRINT(ERR_DBG,
@@ -4635,34 +5280,41 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        memset(sp, 0, sizeof(nic_t));
        sp->dev = dev;
        sp->pdev = pdev;
-        sp->vendor_id = pdev->vendor;
-        sp->device_id = pdev->device;
        sp->high_dma_flag = dma_flag;
-        sp->irq = pdev->irq;
        sp->device_enabled_once = FALSE;
-        strcpy(sp->name, dev_name);
+        if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
+                (pdev->device == PCI_DEVICE_ID_HERC_UNI))
+                sp->device_type = XFRAME_II_DEVICE;
+        else
+                sp->device_type = XFRAME_I_DEVICE;
        /* Initialize some PCI/PCI-X fields of the NIC. */
        s2io_init_pci(sp);
-        /* 
+        /*
         * Setting the device configuration parameters.
-         * Most of these parameters can be specified by the user during 
+         * Most of these parameters can be specified by the user during
-         * module insertion as they are module loadable parameters. If 
+         * module insertion as they are module loadable parameters. If
-         * these parameters are not not specified during load time, they 
+         * these parameters are not not specified during load time, they
         * are initialized with default values.
         */
        mac_control = &sp->mac_control;
        config = &sp->config;
        /* Tx side parameters. */
-        tx_fifo_len[0] = DEFAULT_FIFO_LEN;      /* Default value. */
+        if (tx_fifo_len[0] == 0)
+                tx_fifo_len[0] = DEFAULT_FIFO_LEN; /* Default value. */
        config->tx_fifo_num = tx_fifo_num;
        for (i = 0; i < MAX_TX_FIFOS; i++) {
                config->tx_cfg[i].fifo_len = tx_fifo_len[i];
                config->tx_cfg[i].fifo_priority = i;
        }
+        /* mapping the QoS priority to the configured fifos */
+        for (i = 0; i < MAX_TX_FIFOS; i++)
+                config->fifo_mapping[i] = fifo_map[config->tx_fifo_num][i];
        config->tx_intr_type = TXD_INT_TYPE_UTILZ;
        for (i = 0; i < config->tx_fifo_num; i++) {
                config->tx_cfg[i].f_no_snoop =
@@ -4675,7 +5327,8 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        config->max_txds = MAX_SKB_FRAGS;
        /* Rx side parameters. */
-        rx_ring_sz[0] = SMALL_BLK_CNT;  /* Default value. */
+        if (rx_ring_sz[0] == 0)
+                rx_ring_sz[0] = SMALL_BLK_CNT; /* Default value. */
        config->rx_ring_num = rx_ring_num;
        for (i = 0; i < MAX_RX_RINGS; i++) {
                config->rx_cfg[i].num_rxd = rx_ring_sz[i] *
@@ -4699,10 +5352,13 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        for (i = 0; i < config->rx_ring_num; i++)
                atomic_set(&sp->rx_bufs_left[i], 0);
+        /* Initialize the number of ISRs currently running */
+        atomic_set(&sp->isr_cnt, 0);
        /*  initialize the shared memory used by the NIC and the host */
        if (init_shared_mem(sp)) {
                DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n",
-                          dev->name);
+                          __FUNCTION__);
                ret = -ENOMEM;
                goto mem_alloc_failed;
        }
@@ -4743,13 +5399,17 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        dev->do_ioctl = &s2io_ioctl;
        dev->change_mtu = &s2io_change_mtu;
        SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
+        dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
+        dev->vlan_rx_register = s2io_vlan_rx_register;
+        dev->vlan_rx_kill_vid = (void *)s2io_vlan_rx_kill_vid;
        /*
         * will use eth_mac_addr() for  dev->set_mac_address
         * mac address will be set every time dev->open() is called
         */
-#ifdef CONFIG_S2IO_NAPI
+#if defined(CONFIG_S2IO_NAPI)
        dev->poll = s2io_poll;
-        dev->weight = 90;
+        dev->weight = 32;
 #endif
        dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
@@ -4766,7 +5426,9 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        INIT_WORK(&sp->set_link_task,
                  (void (*)(void *)) s2io_set_link, sp);
-        pci_save_state(sp->pdev);
+        if (!(sp->device_type & XFRAME_II_DEVICE)) {
+                pci_save_state(sp->pdev);
+        }
        /* Setting swapper control on the NIC, for proper reset operation */
        if (s2io_set_swapper(sp)) {
@@ -4776,22 +5438,28 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
                goto set_swap_failed;
        }
-        /* Fix for all "FFs" MAC address problems observed on Alpha platforms */
+        /* Verify if the Herc works on the slot its placed into */
-        fix_mac_address(sp);
+        if (sp->device_type & XFRAME_II_DEVICE) {
-        s2io_reset(sp);
+                mode = s2io_verify_pci_mode(sp);
+                if (mode < 0) {
+                        DBG_PRINT(ERR_DBG, "%s: ", __FUNCTION__);
+                        DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
+                        ret = -EBADSLT;
+                        goto set_swap_failed;
+                }
+        }
-        /*
+        /* Not needed for Herc */
-         * Setting swapper control on the NIC, so the MAC address can be read.
+        if (sp->device_type & XFRAME_I_DEVICE) {
-         */
+                /*
-        if (s2io_set_swapper(sp)) {
+                 * Fix for all "FFs" MAC address problems observed on
-                DBG_PRINT(ERR_DBG,
+                 * Alpha platforms
-                          "%s: S2IO: swapper settings are wrong\n",
+                 */
-                          dev->name);
+                fix_mac_address(sp);
-                ret = -EAGAIN;
+                s2io_reset(sp);
-                goto set_swap_failed;
        }
-        /*  
+        /*
         * MAC address initialization.
         * For now only one mac address will be read and used.
         */
@@ -4814,37 +5482,28 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
        sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
        sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);
-        DBG_PRINT(INIT_DBG,
-                  "DEFAULT MAC ADDR:0x%02x-%02x-%02x-%02x-%02x-%02x\n",
-                  sp->def_mac_addr[0].mac_addr[0],
-                  sp->def_mac_addr[0].mac_addr[1],
-                  sp->def_mac_addr[0].mac_addr[2],
-                  sp->def_mac_addr[0].mac_addr[3],
-                  sp->def_mac_addr[0].mac_addr[4],
-                  sp->def_mac_addr[0].mac_addr[5]);
        /*  Set the factory defined MAC address initially   */
        dev->addr_len = ETH_ALEN;
        memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);
        /*
-         * Initialize the tasklet status and link state flags 
+         * Initialize the tasklet status and link state flags
-         * and the card statte parameter
+         * and the card state parameter
         */
        atomic_set(&(sp->card_state), 0);
        sp->tasklet_status = 0;
        sp->link_state = 0;
        /* Initialize spinlocks */
        spin_lock_init(&sp->tx_lock);
 #ifndef CONFIG_S2IO_NAPI
        spin_lock_init(&sp->put_lock);
 #endif
+        spin_lock_init(&sp->rx_lock);
-        /* 
+        /*
-         * SXE-002: Configure link and activity LED to init state 
+         * SXE-002: Configure link and activity LED to init state
-         * on driver load. 
+         * on driver load.
         */
        subid = sp->pdev->subsystem_device;
        if ((subid & 0xFF) >= 0x07) {
@@ -4864,13 +5523,61 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
                goto register_failed;
        }
-        /* 
+        if (sp->device_type & XFRAME_II_DEVICE) {
-         * Make Link state as off at this point, when the Link change 
+                DBG_PRINT(ERR_DBG, "%s: Neterion Xframe II 10GbE adapter ",
-         * interrupt comes the state will be automatically changed to 
+                          dev->name);
+                DBG_PRINT(ERR_DBG, "(rev %d), Driver %s\n",
+                                get_xena_rev_id(sp->pdev),
+                                s2io_driver_version);
+                DBG_PRINT(ERR_DBG, "MAC ADDR: %02x:%02x:%02x:%02x:%02x:%02x\n",
+                          sp->def_mac_addr[0].mac_addr[0],
+                          sp->def_mac_addr[0].mac_addr[1],
+                          sp->def_mac_addr[0].mac_addr[2],
+                          sp->def_mac_addr[0].mac_addr[3],
+                          sp->def_mac_addr[0].mac_addr[4],
+                          sp->def_mac_addr[0].mac_addr[5]);
+                mode = s2io_print_pci_mode(sp);
+                if (mode < 0) {
+                        DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode ");
+                        ret = -EBADSLT;
+                        goto set_swap_failed;
+                }
+        } else {
+                DBG_PRINT(ERR_DBG, "%s: Neterion Xframe I 10GbE adapter ",
+                          dev->name);
+                DBG_PRINT(ERR_DBG, "(rev %d), Driver %s\n",
+                                        get_xena_rev_id(sp->pdev),
+                                        s2io_driver_version);
+                DBG_PRINT(ERR_DBG, "MAC ADDR: %02x:%02x:%02x:%02x:%02x:%02x\n",
+                          sp->def_mac_addr[0].mac_addr[0],
+                          sp->def_mac_addr[0].mac_addr[1],
+                          sp->def_mac_addr[0].mac_addr[2],
+                          sp->def_mac_addr[0].mac_addr[3],
+                          sp->def_mac_addr[0].mac_addr[4],
+                          sp->def_mac_addr[0].mac_addr[5]);
+        }
+        /* Initialize device name */
+        strcpy(sp->name, dev->name);
+        if (sp->device_type & XFRAME_II_DEVICE)
+                strcat(sp->name, ": Neterion Xframe II 10GbE adapter");
+        else
+                strcat(sp->name, ": Neterion Xframe I 10GbE adapter");
+        /* Initialize bimodal Interrupts */
+        sp->config.bimodal = bimodal;
+        if (!(sp->device_type & XFRAME_II_DEVICE) && bimodal) {
+                sp->config.bimodal = 0;
+                DBG_PRINT(ERR_DBG,"%s:Bimodal intr not supported by Xframe I\n",
+                        dev->name);
+        }
+        /*
+         * Make Link state as off at this point, when the Link change
+         * interrupt comes the state will be automatically changed to
         * the right state.
         */
        netif_carrier_off(dev);
-        sp->last_link_state = LINK_DOWN;
        return 0;
@@ -4891,11 +5598,11 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
 }
 /**
- * s2io_rem_nic - Free the PCI device 
+ * s2io_rem_nic - Free the PCI device
 * @pdev: structure containing the PCI related information of the device.
- * Description: This function is called by the Pci subsystem to release a 
+ * Description: This function is called by the Pci subsystem to release a
 * PCI device and free up all resource held up by the device. This could
- * be in response to a Hot plug event or when the driver is to be removed 
+ * be in response to a Hot plug event or when the driver is to be removed
 * from memory.
 */
@@ -4919,7 +5626,6 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev)
        pci_disable_device(pdev);
        pci_release_regions(pdev);
        pci_set_drvdata(pdev, NULL);
        free_netdev(dev);
 }
@@ -4935,11 +5641,11 @@ int __init s2io_starter(void)
 }
 /**
- * s2io_closer - Cleanup routine for the driver 
+ * s2io_closer - Cleanup routine for the driver
 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
 */
-static void s2io_closer(void)
+void s2io_closer(void)
 {
        pci_unregister_driver(&s2io_driver);
        DBG_PRINT(INIT_DBG, "cleanup done\n");
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h
index 1711c8c3dc99..5d9270730ca2 100644
--- a/drivers/net/s2io.h
+++ b/drivers/net/s2io.h
@@ -31,6 +31,9 @@
 #define SUCCESS 0
 #define FAILURE -1
+/* Maximum time to flicker LED when asked to identify NIC using ethtool */
+#define MAX_FLICKER_TIME        60000 /* 60 Secs */
 /* Maximum outstanding splits to be configured into xena. */
 typedef enum xena_max_outstanding_splits {
        XENA_ONE_SPLIT_TRANSACTION = 0,
@@ -45,10 +48,10 @@ typedef enum xena_max_outstanding_splits {
 #define XENA_MAX_OUTSTANDING_SPLITS(n) (n << 4)
 /*  OS concerned variables and constants */
-#define WATCH_DOG_TIMEOUT       5*HZ
+#define WATCH_DOG_TIMEOUT               15*HZ
-#define EFILL                           0x1234
+#define EFILL                           0x1234
-#define ALIGN_SIZE                      127
+#define ALIGN_SIZE                      127
-#define PCIX_COMMAND_REGISTER   0x62
+#define PCIX_COMMAND_REGISTER           0x62
 /*
 * Debug related variables.
@@ -61,7 +64,7 @@ typedef enum xena_max_outstanding_splits {
 #define INTR_DBG        4
 /* Global variable that defines the present debug level of the driver. */
-static int debug_level = ERR_DBG;       /* Default level. */
+int debug_level = ERR_DBG;      /* Default level. */
 /* DEBUG message print. */
 #define DBG_PRINT(dbg_level, args...)  if(!(debug_level<dbg_level)) printk(args)
@@ -71,6 +74,12 @@ static int debug_level = ERR_DBG;	/* Default level. */
 #define L4_CKSUM_OK 0xFFFF
 #define S2IO_JUMBO_SIZE 9600
+/* Driver statistics maintained by driver */
+typedef struct {
+        unsigned long long single_ecc_errs;
+        unsigned long long double_ecc_errs;
+} swStat_t;
 /* The statistics block of Xena */
 typedef struct stat_block {
 /* Tx MAC statistics counters. */
@@ -186,12 +195,90 @@ typedef struct stat_block {
        u32 rxd_rd_cnt;
        u32 rxf_wr_cnt;
        u32 txf_rd_cnt;
+/* Tx MAC statistics overflow counters. */
+        u32 tmac_data_octets_oflow;
+        u32 tmac_frms_oflow;
+        u32 tmac_bcst_frms_oflow;
+        u32 tmac_mcst_frms_oflow;
+        u32 tmac_ucst_frms_oflow;
+        u32 tmac_ttl_octets_oflow;
+        u32 tmac_any_err_frms_oflow;
+        u32 tmac_nucst_frms_oflow;
+        u64 tmac_vlan_frms;
+        u32 tmac_drop_ip_oflow;
+        u32 tmac_vld_ip_oflow;
+        u32 tmac_rst_tcp_oflow;
+        u32 tmac_icmp_oflow;
+        u32 tpa_unknown_protocol;
+        u32 tmac_udp_oflow;
+        u32 reserved_10;
+        u32 tpa_parse_failure;
+/* Rx MAC Statistics overflow counters. */
+        u32 rmac_data_octets_oflow;
+        u32 rmac_vld_frms_oflow;
+        u32 rmac_vld_bcst_frms_oflow;
+        u32 rmac_vld_mcst_frms_oflow;
+        u32 rmac_accepted_ucst_frms_oflow;
+        u32 rmac_ttl_octets_oflow;
+        u32 rmac_discarded_frms_oflow;
+        u32 rmac_accepted_nucst_frms_oflow;
+        u32 rmac_usized_frms_oflow;
+        u32 rmac_drop_events_oflow;
+        u32 rmac_frag_frms_oflow;
+        u32 rmac_osized_frms_oflow;
+        u32 rmac_ip_oflow;
+        u32 rmac_jabber_frms_oflow;
+        u32 rmac_icmp_oflow;
+        u32 rmac_drop_ip_oflow;
+        u32 rmac_err_drp_udp_oflow;
+        u32 rmac_udp_oflow;
+        u32 reserved_11;
+        u32 rmac_pause_cnt_oflow;
+        u64 rmac_ttl_1519_4095_frms;
+        u64 rmac_ttl_4096_8191_frms;
+        u64 rmac_ttl_8192_max_frms;
+        u64 rmac_ttl_gt_max_frms;
+        u64 rmac_osized_alt_frms;
+        u64 rmac_jabber_alt_frms;
+        u64 rmac_gt_max_alt_frms;
+        u64 rmac_vlan_frms;
+        u32 rmac_len_discard;
+        u32 rmac_fcs_discard;
+        u32 rmac_pf_discard;
+        u32 rmac_da_discard;
+        u32 rmac_red_discard;
+        u32 rmac_rts_discard;
+        u32 reserved_12;
+        u32 rmac_ingm_full_discard;
+        u32 reserved_13;
+        u32 rmac_accepted_ip_oflow;
+        u32 reserved_14;
+        u32 link_fault_cnt;
+        swStat_t sw_stat;
 } StatInfo_t;
-/* Structures representing different init time configuration
+/*
+ * Structures representing different init time configuration
 * parameters of the NIC.
 */
+#define MAX_TX_FIFOS 8
+#define MAX_RX_RINGS 8
+/* FIFO mappings for all possible number of fifos configured */
+int fifo_map[][MAX_TX_FIFOS] = {
+        {0, 0, 0, 0, 0, 0, 0, 0},
+        {0, 0, 0, 0, 1, 1, 1, 1},
+        {0, 0, 0, 1, 1, 1, 2, 2},
+        {0, 0, 1, 1, 2, 2, 3, 3},
+        {0, 0, 1, 1, 2, 2, 3, 4},
+        {0, 0, 1, 1, 2, 3, 4, 5},
+        {0, 0, 1, 2, 3, 4, 5, 6},
+        {0, 1, 2, 3, 4, 5, 6, 7},
+};
 /* Maintains Per FIFO related information. */
 typedef struct tx_fifo_config {
 #define MAX_AVAILABLE_TXDS      8192
@@ -237,14 +324,14 @@ typedef struct rx_ring_config {
 #define NO_SNOOP_RXD_BUFFER         0x02
 } rx_ring_config_t;
-/* This structure provides contains values of the tunable parameters 
+/* This structure provides contains values of the tunable parameters
- * of the H/W 
+ * of the H/W
 */
 struct config_param {
 /* Tx Side */
        u32 tx_fifo_num;        /*Number of Tx FIFOs */
-#define MAX_TX_FIFOS 8
+        u8 fifo_mapping[MAX_TX_FIFOS];
        tx_fifo_config_t tx_cfg[MAX_TX_FIFOS];  /*Per-Tx FIFO config */
        u32 max_txds;           /*Max no. of Tx buffer descriptor per TxDL */
        u64 tx_intr_type;
@@ -252,10 +339,10 @@ struct config_param {
 /* Rx Side */
        u32 rx_ring_num;        /*Number of receive rings */
-#define MAX_RX_RINGS 8
 #define MAX_RX_BLOCKS_PER_RING  150
        rx_ring_config_t rx_cfg[MAX_RX_RINGS];  /*Per-Rx Ring config */
+        u8 bimodal;             /*Flag for setting bimodal interrupts*/
 #define HEADER_ETHERNET_II_802_3_SIZE 14
 #define HEADER_802_2_SIZE              3
@@ -269,6 +356,7 @@ struct config_param {
 #define MAX_PYLD_JUMBO              9600
 #define MAX_MTU_JUMBO               (MAX_PYLD_JUMBO+18)
 #define MAX_MTU_JUMBO_VLAN          (MAX_PYLD_JUMBO+22)
+        u16 bus_speed;
 };
 /* Structure representing MAC Addrs */
@@ -277,7 +365,7 @@ typedef struct mac_addr {
 } macaddr_t;
 /* Structure that represent every FIFO element in the BAR1
- * Address location. 
+ * Address location.
 */
 typedef struct _TxFIFO_element {
        u64 TxDL_Pointer;
@@ -339,6 +427,7 @@ typedef struct _RxD_t {
 #define RXD_FRAME_PROTO         vBIT(0xFFFF,24,8)
 #define RXD_FRAME_PROTO_IPV4    BIT(27)
 #define RXD_FRAME_PROTO_IPV6    BIT(28)
+#define RXD_FRAME_IP_FRAG       BIT(29)
 #define RXD_FRAME_PROTO_TCP     BIT(30)
 #define RXD_FRAME_PROTO_UDP     BIT(31)
 #define TCP_OR_UDP_FRAME        (RXD_FRAME_PROTO_TCP | RXD_FRAME_PROTO_UDP)
@@ -346,11 +435,15 @@ typedef struct _RxD_t {
 #define RXD_GET_L4_CKSUM(val)   ((u16)(val) & 0xFFFF)
        u64 Control_2;
+#define THE_RXD_MARK            0x3
+#define SET_RXD_MARKER          vBIT(THE_RXD_MARK, 0, 2)
+#define GET_RXD_MARKER(ctrl)    ((ctrl & SET_RXD_MARKER) >> 62)
 #ifndef CONFIG_2BUFF_MODE
-#define MASK_BUFFER0_SIZE       vBIT(0xFFFF,0,16)
+#define MASK_BUFFER0_SIZE       vBIT(0x3FFF,2,14)
-#define SET_BUFFER0_SIZE(val)   vBIT(val,0,16)
+#define SET_BUFFER0_SIZE(val)   vBIT(val,2,14)
 #else
-#define MASK_BUFFER0_SIZE       vBIT(0xFF,0,16)
+#define MASK_BUFFER0_SIZE       vBIT(0xFF,2,14)
 #define MASK_BUFFER1_SIZE       vBIT(0xFFFF,16,16)
 #define MASK_BUFFER2_SIZE       vBIT(0xFFFF,32,16)
 #define SET_BUFFER0_SIZE(val)   vBIT(val,8,8)
@@ -363,7 +456,7 @@ typedef struct _RxD_t {
 #define SET_NUM_TAG(val)       vBIT(val,16,32)
 #ifndef CONFIG_2BUFF_MODE
-#define RXD_GET_BUFFER0_SIZE(Control_2) (u64)((Control_2 & vBIT(0xFFFF,0,16)))
+#define RXD_GET_BUFFER0_SIZE(Control_2) (u64)((Control_2 & vBIT(0x3FFF,2,14)))
 #else
 #define RXD_GET_BUFFER0_SIZE(Control_2) (u8)((Control_2 & MASK_BUFFER0_SIZE) \
                                                        >> 48)
@@ -382,7 +475,7 @@ typedef struct _RxD_t {
 #endif
 } RxD_t;
-/* Structure that represents the Rx descriptor block which contains 
+/* Structure that represents the Rx descriptor block which contains
 * 128 Rx descriptors.
 */
 #ifndef CONFIG_2BUFF_MODE
@@ -392,11 +485,11 @@ typedef struct _RxD_block {
        u64 reserved_0;
 #define END_OF_BLOCK    0xFEFFFFFFFFFFFFFFULL
-        u64 reserved_1;         /* 0xFEFFFFFFFFFFFFFF to mark last 
+        u64 reserved_1;         /* 0xFEFFFFFFFFFFFFFF to mark last
                                 * Rxd in this blk */
        u64 reserved_2_pNext_RxD_block; /* Logical ptr to next */
        u64 pNext_RxD_Blk_physical;     /* Buff0_ptr.In a 32 bit arch
-                                         * the upper 32 bits should 
+                                         * the upper 32 bits should
                                         * be 0 */
 } RxD_block_t;
 #else
@@ -405,13 +498,13 @@ typedef struct _RxD_block {
        RxD_t rxd[MAX_RXDS_PER_BLOCK];
 #define END_OF_BLOCK    0xFEFFFFFFFFFFFFFFULL
-        u64 reserved_1;         /* 0xFEFFFFFFFFFFFFFF to mark last Rxd 
+        u64 reserved_1;         /* 0xFEFFFFFFFFFFFFFF to mark last Rxd
                                 * in this blk */
        u64 pNext_RxD_Blk_physical;     /* Phy ponter to next blk. */
 } RxD_block_t;
 #define SIZE_OF_BLOCK   4096
-/* Structure to hold virtual addresses of Buf0 and Buf1 in 
+/* Structure to hold virtual addresses of Buf0 and Buf1 in
 * 2buf mode. */
 typedef struct bufAdd {
        void *ba_0_org;
@@ -423,8 +516,8 @@ typedef struct bufAdd {
 /* Structure which stores all the MAC control parameters */
-/* This structure stores the offset of the RxD in the ring 
+/* This structure stores the offset of the RxD in the ring
- * from which the Rx Interrupt processor can start picking 
+ * from which the Rx Interrupt processor can start picking
 * up the RxDs for processing.
 */
 typedef struct _rx_curr_get_info_t {
@@ -436,7 +529,7 @@ typedef struct _rx_curr_get_info_t {
 typedef rx_curr_get_info_t rx_curr_put_info_t;
 /* This structure stores the offset of the TxDl in the FIFO
- * from which the Tx Interrupt processor can start picking 
+ * from which the Tx Interrupt processor can start picking
 * up the TxDLs for send complete interrupt processing.
 */
 typedef struct {
@@ -446,32 +539,96 @@ typedef struct {
 typedef tx_curr_get_info_t tx_curr_put_info_t;
-/* Infomation related to the Tx and Rx FIFOs and Rings of Xena
+/* Structure that holds the Phy and virt addresses of the Blocks */
- * is maintained in this structure.
+typedef struct rx_block_info {
- */
+        RxD_t *block_virt_addr;
-typedef struct mac_info {
+        dma_addr_t block_dma_addr;
-/* rx side stuff */
+} rx_block_info_t;
-        /* Put pointer info which indictes which RxD has to be replenished 
+/* pre declaration of the nic structure */
+typedef struct s2io_nic nic_t;
+/* Ring specific structure */
+typedef struct ring_info {
+        /* The ring number */
+        int ring_no;
+        /*
+         *  Place holders for the virtual and physical addresses of
+         *  all the Rx Blocks
+         */
+        rx_block_info_t rx_blocks[MAX_RX_BLOCKS_PER_RING];
+        int block_count;
+        int pkt_cnt;
+        /*
+         * Put pointer info which indictes which RxD has to be replenished
         * with a new buffer.
         */
-        rx_curr_put_info_t rx_curr_put_info[MAX_RX_RINGS];
+        rx_curr_put_info_t rx_curr_put_info;
-        /* Get pointer info which indictes which is the last RxD that was 
+        /*
+         * Get pointer info which indictes which is the last RxD that was
         * processed by the driver.
         */
-        rx_curr_get_info_t rx_curr_get_info[MAX_RX_RINGS];
+        rx_curr_get_info_t rx_curr_get_info;
-        u16 rmac_pause_time;
+#ifndef CONFIG_S2IO_NAPI
-        u16 mc_pause_threshold_q0q3;
+        /* Index to the absolute position of the put pointer of Rx ring */
-        u16 mc_pause_threshold_q4q7;
+        int put_pos;
+#endif
+#ifdef CONFIG_2BUFF_MODE
+        /* Buffer Address store. */
+        buffAdd_t **ba;
+#endif
+        nic_t *nic;
+} ring_info_t;
+/* Fifo specific structure */
+typedef struct fifo_info {
+        /* FIFO number */
+        int fifo_no;
+        /* Maximum TxDs per TxDL */
+        int max_txds;
+        /* Place holder of all the TX List's Phy and Virt addresses. */
+        list_info_hold_t *list_info;
+        /*
+         * Current offset within the tx FIFO where driver would write
+         * new Tx frame
+         */
+        tx_curr_put_info_t tx_curr_put_info;
+        /*
+         * Current offset within tx FIFO from where the driver would start freeing
+         * the buffers
+         */
+        tx_curr_get_info_t tx_curr_get_info;
+        nic_t *nic;
+}fifo_info_t;
+/* Infomation related to the Tx and Rx FIFOs and Rings of Xena
+ * is maintained in this structure.
+ */
+typedef struct mac_info {
 /* tx side stuff */
        /* logical pointer of start of each Tx FIFO */
        TxFIFO_element_t __iomem *tx_FIFO_start[MAX_TX_FIFOS];
-/* Current offset within tx_FIFO_start, where driver would write new Tx frame*/
+        /* Fifo specific structure */
-        tx_curr_put_info_t tx_curr_put_info[MAX_TX_FIFOS];
+        fifo_info_t fifos[MAX_TX_FIFOS];
-        tx_curr_get_info_t tx_curr_get_info[MAX_TX_FIFOS];
+/* rx side stuff */
+        /* Ring specific structure */
+        ring_info_t rings[MAX_RX_RINGS];
+        u16 rmac_pause_time;
+        u16 mc_pause_threshold_q0q3;
+        u16 mc_pause_threshold_q4q7;
        void *stats_mem;        /* orignal pointer to allocated mem */
        dma_addr_t stats_mem_phy;       /* Physical address of the stat block */
@@ -485,12 +642,6 @@ typedef struct {
        int usage_cnt;
 } usr_addr_t;
-/* Structure that holds the Phy and virt addresses of the Blocks */
-typedef struct rx_block_info {
-        RxD_t *block_virt_addr;
-        dma_addr_t block_dma_addr;
-} rx_block_info_t;
 /* Default Tunable parameters of the NIC. */
 #define DEFAULT_FIFO_LEN 4096
 #define SMALL_RXD_CNT   30 * (MAX_RXDS_PER_BLOCK+1)
@@ -499,7 +650,20 @@ typedef struct rx_block_info {
 #define LARGE_BLK_CNT   100
 /* Structure representing one instance of the NIC */
-typedef struct s2io_nic {
+struct s2io_nic {
+#ifdef CONFIG_S2IO_NAPI
+        /*
+         * Count of packets to be processed in a given iteration, it will be indicated
+         * by the quota field of the device structure when NAPI is enabled.
+         */
+        int pkts_to_process;
+#endif
+        struct net_device *dev;
+        mac_info_t mac_control;
+        struct config_param config;
+        struct pci_dev *pdev;
+        void __iomem *bar0;
+        void __iomem *bar1;
 #define MAX_MAC_SUPPORTED   16
 #define MAX_SUPPORTED_MULTICASTS MAX_MAC_SUPPORTED
@@ -507,33 +671,20 @@ typedef struct s2io_nic {
        macaddr_t pre_mac_addr[MAX_MAC_SUPPORTED];
        struct net_device_stats stats;
-        void __iomem *bar0;
-        void __iomem *bar1;
-        struct config_param config;
-        mac_info_t mac_control;
        int high_dma_flag;
        int device_close_flag;
        int device_enabled_once;
-        char name[32];
+        char name[50];
        struct tasklet_struct task;
        volatile unsigned long tasklet_status;
-        struct timer_list timer;
-        struct net_device *dev;
-        struct pci_dev *pdev;
-        u16 vendor_id;
+        /* Timer that handles I/O errors/exceptions */
-        u16 device_id;
+        struct timer_list alarm_timer;
-        u16 ccmd;
-        u32 cbar0_1;
+        /* Space to back up the PCI config space */
-        u32 cbar0_2;
+        u32 config_space[256 / sizeof(u32)];
-        u32 cbar1_1;
-        u32 cbar1_2;
-        u32 cirq;
-        u8 cache_line;
-        u32 rom_expansion;
-        u16 pcix_cmd;
-        u32 irq;
        atomic_t rx_bufs_left[MAX_RX_RINGS];
        spinlock_t tx_lock;
@@ -558,27 +709,11 @@ typedef struct s2io_nic {
        u16 tx_err_count;
        u16 rx_err_count;
-#ifndef CONFIG_S2IO_NAPI
-        /* Index to the absolute position of the put pointer of Rx ring. */
-        int put_pos[MAX_RX_RINGS];
-#endif
-        /*
-         *  Place holders for the virtual and physical addresses of 
-         *  all the Rx Blocks
-         */
-        rx_block_info_t rx_blocks[MAX_RX_RINGS][MAX_RX_BLOCKS_PER_RING];
-        int block_count[MAX_RX_RINGS];
-        int pkt_cnt[MAX_RX_RINGS];
-        /* Place holder of all the TX List's Phy and Virt addresses. */
-        list_info_hold_t *list_info[MAX_TX_FIFOS];
        /*  Id timer, used to blink NIC to physically identify NIC. */
        struct timer_list id_timer;
        /*  Restart timer, used to restart NIC if the device is stuck and
-         *  a schedule task that will set the correct Link state once the 
+         *  a schedule task that will set the correct Link state once the
         *  NIC's PHY has stabilized after a state change.
         */
 #ifdef INIT_TQUEUE
@@ -589,12 +724,12 @@ typedef struct s2io_nic {
        struct work_struct set_link_task;
 #endif
-        /* Flag that can be used to turn on or turn off the Rx checksum 
+        /* Flag that can be used to turn on or turn off the Rx checksum
         * offload feature.
         */
        int rx_csum;
-        /*  after blink, the adapter must be restored with original 
+        /*  after blink, the adapter must be restored with original
         *  values.
         */
        u64 adapt_ctrl_org;
@@ -604,16 +739,19 @@ typedef struct s2io_nic {
 #define LINK_DOWN       1
 #define LINK_UP         2
-#ifdef CONFIG_2BUFF_MODE
-        /* Buffer Address store. */
-        buffAdd_t **ba[MAX_RX_RINGS];
-#endif
        int task_flag;
 #define CARD_DOWN 1
 #define CARD_UP 2
        atomic_t card_state;
        volatile unsigned long link_state;
-} nic_t;
+        struct vlan_group *vlgrp;
+#define XFRAME_I_DEVICE         1
+#define XFRAME_II_DEVICE        2
+        u8 device_type;
+        spinlock_t      rx_lock;
+        atomic_t        isr_cnt;
+};
 #define RESET_ERROR 1;
 #define CMD_ERROR   2;
@@ -622,9 +760,10 @@ typedef struct s2io_nic {
 #ifndef readq
 static inline u64 readq(void __iomem *addr)
 {
-        u64 ret = readl(addr + 4);
+        u64 ret = 0;
-        ret <<= 32;
+        ret = readl(addr + 4);
-        ret |= readl(addr);
+        (u64) ret <<= 32;
+        (u64) ret |= readl(addr);
        return ret;
 }
@@ -637,10 +776,10 @@ static inline void writeq(u64 val, void __iomem *addr)
        writel((u32) (val >> 32), (addr + 4));
 }
-/* In 32 bit modes, some registers have to be written in a 
+/* In 32 bit modes, some registers have to be written in a
 * particular order to expect correct hardware operation. The
- * macro SPECIAL_REG_WRITE is used to perform such ordered 
+ * macro SPECIAL_REG_WRITE is used to perform such ordered
- * writes. Defines UF (Upper First) and LF (Lower First) will 
+ * writes. Defines UF (Upper First) and LF (Lower First) will
 * be used to specify the required write order.
 */
 #define UF      1
@@ -716,6 +855,7 @@ static inline void SPECIAL_REG_WRITE(u64 val, void __iomem *addr, int order)
 #define PCC_FB_ECC_ERR     vBIT(0xff, 16, 8)    /* Interrupt to indicate
                                                   PCC_FB_ECC Error. */
+#define RXD_GET_VLAN_TAG(Control_2) (u16)(Control_2 & MASK_VLAN_TAG)
 /*
 * Prototype declaration.
 */
@@ -725,36 +865,30 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev);
 static int init_shared_mem(struct s2io_nic *sp);
 static void free_shared_mem(struct s2io_nic *sp);
 static int init_nic(struct s2io_nic *nic);
-#ifndef CONFIG_S2IO_NAPI
+static void rx_intr_handler(ring_info_t *ring_data);
-static void rx_intr_handler(struct s2io_nic *sp);
+static void tx_intr_handler(fifo_info_t *fifo_data);
-#endif
-static void tx_intr_handler(struct s2io_nic *sp);
 static void alarm_intr_handler(struct s2io_nic *sp);
 static int s2io_starter(void);
-static void s2io_closer(void);
+void s2io_closer(void);
 static void s2io_tx_watchdog(struct net_device *dev);
 static void s2io_tasklet(unsigned long dev_addr);
 static void s2io_set_multicast(struct net_device *dev);
-#ifndef CONFIG_2BUFF_MODE
+static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp);
-static int rx_osm_handler(nic_t * sp, u16 len, RxD_t * rxdp, int ring_no);
+void s2io_link(nic_t * sp, int link);
-#else
+void s2io_reset(nic_t * sp);
-static int rx_osm_handler(nic_t * sp, RxD_t * rxdp, int ring_no,
+#if defined(CONFIG_S2IO_NAPI)
-                          buffAdd_t * ba);
-#endif
-static void s2io_link(nic_t * sp, int link);
-static void s2io_reset(nic_t * sp);
-#ifdef CONFIG_S2IO_NAPI
 static int s2io_poll(struct net_device *dev, int *budget);
 #endif
 static void s2io_init_pci(nic_t * sp);
-static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
+int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
+static void s2io_alarm_handle(unsigned long data);
 static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs);
-static int verify_xena_quiescence(u64 val64, int flag);
+static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag);
 static struct ethtool_ops netdev_ethtool_ops;
 static void s2io_set_link(unsigned long data);
-static int s2io_set_swapper(nic_t * sp);
+int s2io_set_swapper(nic_t * sp);
-static void s2io_card_down(nic_t * nic);
+static void s2io_card_down(nic_t *nic);
-static int s2io_card_up(nic_t * nic);
+static int s2io_card_up(nic_t *nic);
+int get_xena_rev_id(struct pci_dev *pdev);
 #endif                          /* _S2IO_H */
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index f15739481d62..48a43b84ea5f 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -42,7 +42,7 @@
 #include "skge.h"
 #define DRV_NAME                "skge"
-#define DRV_VERSION             "0.8"
+#define DRV_VERSION             "0.9"
 #define PFX                     DRV_NAME " "
 #define DEFAULT_TX_RING_SIZE    128
@@ -189,7 +189,7 @@ static u32 skge_supported_modes(const struct skge_hw *hw)
 {
        u32 supported;
-        if (iscopper(hw)) {
+        if (hw->copper) {
                supported = SUPPORTED_10baseT_Half
                        | SUPPORTED_10baseT_Full
                        | SUPPORTED_100baseT_Half
@@ -222,7 +222,7 @@ static int skge_get_settings(struct net_device *dev,
        ecmd->transceiver = XCVR_INTERNAL;
        ecmd->supported = skge_supported_modes(hw);
-        if (iscopper(hw)) {
+        if (hw->copper) {
                ecmd->port = PORT_TP;
                ecmd->phy_address = hw->phy_addr;
        } else
@@ -876,6 +876,9 @@ static int skge_rx_fill(struct skge_port *skge)
 static void skge_link_up(struct skge_port *skge)
 {
+        skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), 
+                    LED_BLK_OFF|LED_SYNC_OFF|LED_ON);
        netif_carrier_on(skge->netdev);
        if (skge->tx_avail > MAX_SKB_FRAGS + 1)
                netif_wake_queue(skge->netdev);
@@ -894,6 +897,7 @@ static void skge_link_up(struct skge_port *skge)
 static void skge_link_down(struct skge_port *skge)
 {
+        skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF);
        netif_carrier_off(skge->netdev);
        netif_stop_queue(skge->netdev);
@@ -1599,7 +1603,7 @@ static void yukon_init(struct skge_hw *hw, int port)
        adv = PHY_AN_CSMA;
        if (skge->autoneg == AUTONEG_ENABLE) {
-                if (iscopper(hw)) {
+                if (hw->copper) {
                        if (skge->advertising & ADVERTISED_1000baseT_Full)
                                ct1000 |= PHY_M_1000C_AFD;
                        if (skge->advertising & ADVERTISED_1000baseT_Half)
@@ -1691,7 +1695,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port)
        /* Set hardware config mode */
        reg = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP |
                GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE;
-        reg |= iscopper(hw) ? GPC_HWCFG_GMII_COP : GPC_HWCFG_GMII_FIB;
+        reg |= hw->copper ? GPC_HWCFG_GMII_COP : GPC_HWCFG_GMII_FIB;
        /* Clear GMC reset */
        skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET);
@@ -1780,7 +1784,12 @@ static void yukon_mac_init(struct skge_hw *hw, int port)
                reg &= ~GMF_RX_F_FL_ON;
        skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
        skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg);
-        skge_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF);
+        /*
+         * because Pause Packet Truncation in GMAC is not working
+         * we have to increase the Flush Threshold to 64 bytes
+         * in order to flush pause packets in Rx FIFO on Yukon-1
+         */
+        skge_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF+1);
        /* Configure Tx MAC FIFO */
        skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
@@ -2670,18 +2679,6 @@ static void skge_error_irq(struct skge_hw *hw)
                /* Timestamp (unused) overflow */
                if (hwstatus & IS_IRQ_TIST_OV)
                        skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
-                if (hwstatus & IS_IRQ_SENSOR) {
-                        /* no sensors on 32-bit Yukon */
-                        if (!(skge_read16(hw, B0_CTST) & CS_BUS_SLOT_SZ)) {
-                                printk(KERN_ERR PFX "ignoring bogus sensor interrups\n");
-                                skge_write32(hw, B0_HWE_IMSK,
-                                             IS_ERR_MSK & ~IS_IRQ_SENSOR);
-                        } else
-                                printk(KERN_WARNING PFX "sensor interrupt\n");
-                }
        }
        if (hwstatus & IS_RAM_RD_PAR) {
@@ -2712,9 +2709,10 @@ static void skge_error_irq(struct skge_hw *hw)
                skge_pci_clear(hw);
+                /* if error still set then just ignore it */
                hwstatus = skge_read32(hw, B0_HWE_ISRC);
                if (hwstatus & IS_IRQ_STAT) {
-                        printk(KERN_WARNING PFX "IRQ status %x: still set ignoring hardware errors\n",
+                        pr_debug("IRQ status %x: still set ignoring hardware errors\n",
                               hwstatus);
                        hw->intr_mask &= ~IS_HW_ERR;
                }
@@ -2876,7 +2874,7 @@ static const char *skge_board_name(const struct skge_hw *hw)
 static int skge_reset(struct skge_hw *hw)
 {
        u16 ctst;
-        u8 t8, mac_cfg;
+        u8 t8, mac_cfg, pmd_type, phy_type;
        int i;
        ctst = skge_read16(hw, B0_CTST);
@@ -2895,18 +2893,19 @@ static int skge_reset(struct skge_hw *hw)
                     ctst & (CS_CLK_RUN_HOT|CS_CLK_RUN_RST|CS_CLK_RUN_ENA));
        hw->chip_id = skge_read8(hw, B2_CHIP_ID);
-        hw->phy_type = skge_read8(hw, B2_E_1) & 0xf;
+        phy_type = skge_read8(hw, B2_E_1) & 0xf;
-        hw->pmd_type = skge_read8(hw, B2_PMD_TYP);
+        pmd_type = skge_read8(hw, B2_PMD_TYP);
+        hw->copper = (pmd_type == 'T' || pmd_type == '1');
        switch (hw->chip_id) {
        case CHIP_ID_GENESIS:
-                switch (hw->phy_type) {
+                switch (phy_type) {
                case SK_PHY_BCOM:
                        hw->phy_addr = PHY_ADDR_BCOM;
                        break;
                default:
                        printk(KERN_ERR PFX "%s: unsupported phy type 0x%x\n",
-                               pci_name(hw->pdev), hw->phy_type);
+                               pci_name(hw->pdev), phy_type);
                        return -EOPNOTSUPP;
                }
                break;
@@ -2914,13 +2913,10 @@ static int skge_reset(struct skge_hw *hw)
        case CHIP_ID_YUKON:
        case CHIP_ID_YUKON_LITE:
        case CHIP_ID_YUKON_LP:
-                if (hw->phy_type < SK_PHY_MARV_COPPER && hw->pmd_type != 'S')
+                if (phy_type < SK_PHY_MARV_COPPER && pmd_type != 'S')
-                        hw->phy_type = SK_PHY_MARV_COPPER;
+                        hw->copper = 1;
                hw->phy_addr = PHY_ADDR_MARV;
-                if (!iscopper(hw))
-                        hw->phy_type = SK_PHY_MARV_FIBER;
                break;
        default:
@@ -2948,12 +2944,20 @@ static int skge_reset(struct skge_hw *hw)
        else
                hw->ram_size = t8 * 4096;
+        hw->intr_mask = IS_HW_ERR | IS_EXT_REG;
        if (hw->chip_id == CHIP_ID_GENESIS)
                genesis_init(hw);
        else {
                /* switch power to VCC (WA for VAUX problem) */
                skge_write8(hw, B0_POWER_CTRL,
                            PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
+                /* avoid boards with stuck Hardware error bits */
+                if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) &&
+                    (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) {
+                        printk(KERN_WARNING PFX "stuck hardware sensor bit\n");
+                        hw->intr_mask &= ~IS_HW_ERR;
+                }
                for (i = 0; i < hw->ports; i++) {
                        skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
                        skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
@@ -2994,7 +2998,6 @@ static int skge_reset(struct skge_hw *hw)
        skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));
        skge_write32(hw, B2_IRQM_CTRL, TIM_START);
-        hw->intr_mask = IS_HW_ERR | IS_EXT_REG;
        skge_write32(hw, B0_IMSK, hw->intr_mask);
        if (hw->chip_id != CHIP_ID_GENESIS)
diff --git a/drivers/net/skge.h b/drivers/net/skge.h
index b432f1bb8168..f1680beb8e68 100644
--- a/drivers/net/skge.h
+++ b/drivers/net/skge.h
@@ -214,8 +214,6 @@ enum {
 /*      B2_IRQM_HWE_MSK 32 bit  IRQ Moderation HW Error Mask */
 enum {
-        IS_ERR_MSK      = 0x00003fff,/*                 All Error bits */
        IS_IRQ_TIST_OV  = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */
        IS_IRQ_SENSOR   = 1<<12, /* IRQ from Sensor (YUKON only) */
        IS_IRQ_MST_ERR  = 1<<11, /* IRQ master error detected */
@@ -230,6 +228,12 @@ enum {
        IS_M2_PAR_ERR   = 1<<2, /* MAC 2 Parity Error */
        IS_R1_PAR_ERR   = 1<<1, /* Queue R1 Parity Error */
        IS_R2_PAR_ERR   = 1<<0, /* Queue R2 Parity Error */
+        IS_ERR_MSK      = IS_IRQ_MST_ERR | IS_IRQ_STAT
+                        | IS_NO_STAT_M1 | IS_NO_STAT_M2
+                        | IS_RAM_RD_PAR | IS_RAM_WR_PAR
+                        | IS_M1_PAR_ERR | IS_M2_PAR_ERR
+                        | IS_R1_PAR_ERR | IS_R2_PAR_ERR,
 };
 /*      B2_TST_CTRL1     8 bit  Test Control Register 1 */
@@ -2456,24 +2460,17 @@ struct skge_hw {
        u8                   chip_id;
        u8                   chip_rev;
-        u8                   phy_type;
+        u8                   copper;
-        u8                   pmd_type;
-        u16                  phy_addr;
        u8                   ports;
        u32                  ram_size;
        u32                  ram_offset;
+        u16                  phy_addr;
        struct tasklet_struct ext_tasklet;
        spinlock_t           phy_lock;
 };
-static inline int iscopper(const struct skge_hw *hw)
-{
-        return (hw->pmd_type == 'T');
-}
 enum {
        FLOW_MODE_NONE          = 0, /* No Flow-Control */
        FLOW_MODE_LOC_SEND      = 1, /* Local station sends PAUSE */
diff --git a/drivers/net/tokenring/abyss.c b/drivers/net/tokenring/abyss.c
index 87103c400999..f1e4ef1188e4 100644
--- a/drivers/net/tokenring/abyss.c
+++ b/drivers/net/tokenring/abyss.c
@@ -139,7 +139,7 @@ static int __devinit abyss_attach(struct pci_dev *pdev, const struct pci_device_
         */
        dev->base_addr += 0x10;
                
-        ret = tmsdev_init(dev, PCI_MAX_ADDRESS, pdev);
+        ret = tmsdev_init(dev, PCI_MAX_ADDRESS, &pdev->dev);
        if (ret) {
                printk("%s: unable to get memory for dev->priv.\n", 
                       dev->name);
diff --git a/drivers/net/tokenring/proteon.c b/drivers/net/tokenring/proteon.c
index 40ad0fde28af..0a9597738d6c 100644
--- a/drivers/net/tokenring/proteon.c
+++ b/drivers/net/tokenring/proteon.c
@@ -62,8 +62,7 @@ static int dmalist[] __initdata = {
 };
 static char cardname[] = "Proteon 1392\0";
+static u64 dma_mask = ISA_MAX_ADDRESS;
-struct net_device *proteon_probe(int unit);
 static int proteon_open(struct net_device *dev);
 static void proteon_read_eeprom(struct net_device *dev);
 static unsigned short proteon_setnselout_pins(struct net_device *dev);
@@ -116,7 +115,7 @@ nodev:
        return -ENODEV;
 }
-static int __init setup_card(struct net_device *dev)
+static int __init setup_card(struct net_device *dev, struct device *pdev)
 {
        struct net_local *tp;
        static int versionprinted;
@@ -137,7 +136,7 @@ static int __init setup_card(struct net_device *dev)
                }
        }
        if (err)
-                goto out4;
+                goto out5;
        /* At this point we have found a valid card. */
@@ -145,14 +144,15 @@ static int __init setup_card(struct net_device *dev)
                printk(KERN_DEBUG "%s", version);
        err = -EIO;
-        if (tmsdev_init(dev, ISA_MAX_ADDRESS, NULL))
+        pdev->dma_mask = &dma_mask;
+        if (tmsdev_init(dev, ISA_MAX_ADDRESS, pdev))
                goto out4;
        dev->base_addr &= ~3; 
                
        proteon_read_eeprom(dev);
-        printk(KERN_DEBUG "%s:    Ring Station Address: ", dev->name);
+        printk(KERN_DEBUG "proteon.c:    Ring Station Address: ");
        printk("%2.2x", dev->dev_addr[0]);
        for (j = 1; j < 6; j++)
                printk(":%2.2x", dev->dev_addr[j]);
@@ -185,7 +185,7 @@ static int __init setup_card(struct net_device *dev)
                
                if(irqlist[j] == 0)
                {
-                        printk(KERN_INFO "%s: AutoSelect no IRQ available\n", dev->name);
+                        printk(KERN_INFO "proteon.c: AutoSelect no IRQ available\n");
                        goto out3;
                }
        }
@@ -196,15 +196,15 @@ static int __init setup_card(struct net_device *dev)
                                break;
                if (irqlist[j] == 0)
                {
-                        printk(KERN_INFO "%s: Illegal IRQ %d specified\n",
+                        printk(KERN_INFO "proteon.c: Illegal IRQ %d specified\n",
-                                dev->name, dev->irq);
+                                dev->irq);
                        goto out3;
                }
                if (request_irq(dev->irq, tms380tr_interrupt, 0, 
                        cardname, dev))
                {
-                        printk(KERN_INFO "%s: Selected IRQ %d not available\n", 
+                        printk(KERN_INFO "proteon.c: Selected IRQ %d not available\n",
-                                dev->name, dev->irq);
+                                dev->irq);
                        goto out3;
                }
        }
@@ -220,7 +220,7 @@ static int __init setup_card(struct net_device *dev)
                if(dmalist[j] == 0)
                {
-                        printk(KERN_INFO "%s: AutoSelect no DMA available\n", dev->name);
+                        printk(KERN_INFO "proteon.c: AutoSelect no DMA available\n");
                        goto out2;
                }
        }
@@ -231,25 +231,25 @@ static int __init setup_card(struct net_device *dev)
                                break;
                if (dmalist[j] == 0)
                {
-                        printk(KERN_INFO "%s: Illegal DMA %d specified\n", 
+                        printk(KERN_INFO "proteon.c: Illegal DMA %d specified\n",
-                                dev->name, dev->dma);
+                                dev->dma);
                        goto out2;
                }
                if (request_dma(dev->dma, cardname))
                {
-                        printk(KERN_INFO "%s: Selected DMA %d not available\n", 
+                        printk(KERN_INFO "proteon.c: Selected DMA %d not available\n",
-                                dev->name, dev->dma);
+                                dev->dma);
                        goto out2;
                }
        }
-        printk(KERN_DEBUG "%s:    IO: %#4lx  IRQ: %d  DMA: %d\n",
-               dev->name, dev->base_addr, dev->irq, dev->dma);
-                
        err = register_netdev(dev);
        if (err)
                goto out;
+        printk(KERN_DEBUG "%s:    IO: %#4lx  IRQ: %d  DMA: %d\n",
+               dev->name, dev->base_addr, dev->irq, dev->dma);
        return 0;
 out:
        free_dma(dev->dma);
@@ -258,34 +258,11 @@ out2:
 out3:
        tmsdev_term(dev);
 out4:
-        release_region(dev->base_addr, PROTEON_IO_EXTENT); 
+        release_region(dev->base_addr, PROTEON_IO_EXTENT);
+out5:
        return err;
 }
-struct net_device * __init proteon_probe(int unit)
-{
-        struct net_device *dev = alloc_trdev(sizeof(struct net_local));
-        int err = 0;
-        if (!dev)
-                return ERR_PTR(-ENOMEM);
-        if (unit >= 0) {
-                sprintf(dev->name, "tr%d", unit);
-                netdev_boot_setup_check(dev);
-        }
-        err = setup_card(dev);
-        if (err)
-                goto out;
-        return dev;
-out:
-        free_netdev(dev);
-        return ERR_PTR(err);
-}
 /*
 * Reads MAC address from adapter RAM, which should've read it from
 * the onboard ROM.  
@@ -352,8 +329,6 @@ static int proteon_open(struct net_device *dev)
        return tms380tr_open(dev);
 }
-#ifdef MODULE
 #define ISATR_MAX_ADAPTERS 3
 static int io[ISATR_MAX_ADAPTERS];
@@ -366,13 +341,23 @@ module_param_array(io, int, NULL, 0);
 module_param_array(irq, int, NULL, 0);
 module_param_array(dma, int, NULL, 0);
-static struct net_device *proteon_dev[ISATR_MAX_ADAPTERS];
+static struct platform_device *proteon_dev[ISATR_MAX_ADAPTERS];
+static struct device_driver proteon_driver = {
+        .name           = "proteon",
+        .bus            = &platform_bus_type,
+};
-int init_module(void)
+static int __init proteon_init(void)
 {
        struct net_device *dev;
+        struct platform_device *pdev;
        int i, num = 0, err = 0;
+        err = driver_register(&proteon_driver);
+        if (err)
+                return err;
        for (i = 0; i < ISATR_MAX_ADAPTERS ; i++) {
                dev = alloc_trdev(sizeof(struct net_local));
                if (!dev)
@@ -381,11 +366,15 @@ int init_module(void)
                dev->base_addr = io[i];
                dev->irq = irq[i];
                dev->dma = dma[i];
-                err = setup_card(dev);
+                pdev = platform_device_register_simple("proteon",
+                        i, NULL, 0);
+                err = setup_card(dev, &pdev->dev);
                if (!err) {
-                        proteon_dev[i] = dev;
+                        proteon_dev[i] = pdev;
+                        dev_set_drvdata(&pdev->dev, dev);
                        ++num;
                } else {
+                        platform_device_unregister(pdev);
                        free_netdev(dev);
                }
        }
@@ -399,23 +388,28 @@ int init_module(void)
        return (0);
 }
-void cleanup_module(void)
+static void __exit proteon_cleanup(void)
 {
+        struct net_device *dev;
        int i;
        for (i = 0; i < ISATR_MAX_ADAPTERS ; i++) {
-                struct net_device *dev = proteon_dev[i];
+                struct platform_device *pdev = proteon_dev[i];
                
-                if (!dev) 
+                if (!pdev)
                        continue;
-                
+                dev = dev_get_drvdata(&pdev->dev);
                unregister_netdev(dev);
                release_region(dev->base_addr, PROTEON_IO_EXTENT);
                free_irq(dev->irq, dev);
                free_dma(dev->dma);
                tmsdev_term(dev);
                free_netdev(dev);
+                dev_set_drvdata(&pdev->dev, NULL);
+                platform_device_unregister(pdev);
        }
+        driver_unregister(&proteon_driver);
 }
-#endif /* MODULE */
+module_init(proteon_init);
+module_exit(proteon_cleanup);
diff --git a/drivers/net/tokenring/skisa.c b/drivers/net/tokenring/skisa.c
index f26796e2d0e5..03f061941d77 100644
--- a/drivers/net/tokenring/skisa.c
+++ b/drivers/net/tokenring/skisa.c
@@ -68,8 +68,7 @@ static int dmalist[] __initdata = {
 };
 static char isa_cardname[] = "SK NET TR 4/16 ISA\0";
+static u64 dma_mask = ISA_MAX_ADDRESS;
-struct net_device *sk_isa_probe(int unit);
 static int sk_isa_open(struct net_device *dev);
 static void sk_isa_read_eeprom(struct net_device *dev);
 static unsigned short sk_isa_setnselout_pins(struct net_device *dev);
@@ -133,7 +132,7 @@ static int __init sk_isa_probe1(struct net_device *dev, int ioaddr)
        return 0;
 }
-static int __init setup_card(struct net_device *dev)
+static int __init setup_card(struct net_device *dev, struct device *pdev)
 {
        struct net_local *tp;
        static int versionprinted;
@@ -154,7 +153,7 @@ static int __init setup_card(struct net_device *dev)
                }
        }
        if (err)
-                goto out4;
+                goto out5;
        /* At this point we have found a valid card. */
@@ -162,14 +161,15 @@ static int __init setup_card(struct net_device *dev)
                printk(KERN_DEBUG "%s", version);
        err = -EIO;
-        if (tmsdev_init(dev, ISA_MAX_ADDRESS, NULL))
+        pdev->dma_mask = &dma_mask;
+        if (tmsdev_init(dev, ISA_MAX_ADDRESS, pdev))
                goto out4;
        dev->base_addr &= ~3; 
                
        sk_isa_read_eeprom(dev);
-        printk(KERN_DEBUG "%s:    Ring Station Address: ", dev->name);
+        printk(KERN_DEBUG "skisa.c:    Ring Station Address: ");
        printk("%2.2x", dev->dev_addr[0]);
        for (j = 1; j < 6; j++)
                printk(":%2.2x", dev->dev_addr[j]);
@@ -202,7 +202,7 @@ static int __init setup_card(struct net_device *dev)
                
                if(irqlist[j] == 0)
                {
-                        printk(KERN_INFO "%s: AutoSelect no IRQ available\n", dev->name);
+                        printk(KERN_INFO "skisa.c: AutoSelect no IRQ available\n");
                        goto out3;
                }
        }
@@ -213,15 +213,15 @@ static int __init setup_card(struct net_device *dev)
                                break;
                if (irqlist[j] == 0)
                {
-                        printk(KERN_INFO "%s: Illegal IRQ %d specified\n",
+                        printk(KERN_INFO "skisa.c: Illegal IRQ %d specified\n",
-                                dev->name, dev->irq);
+                                dev->irq);
                        goto out3;
                }
                if (request_irq(dev->irq, tms380tr_interrupt, 0, 
                        isa_cardname, dev))
                {
-                        printk(KERN_INFO "%s: Selected IRQ %d not available\n", 
+                        printk(KERN_INFO "skisa.c: Selected IRQ %d not available\n",
-                                dev->name, dev->irq);
+                                dev->irq);
                        goto out3;
                }
        }
@@ -237,7 +237,7 @@ static int __init setup_card(struct net_device *dev)
                if(dmalist[j] == 0)
                {
-                        printk(KERN_INFO "%s: AutoSelect no DMA available\n", dev->name);
+                        printk(KERN_INFO "skisa.c: AutoSelect no DMA available\n");
                        goto out2;
                }
        }
@@ -248,25 +248,25 @@ static int __init setup_card(struct net_device *dev)
                                break;
                if (dmalist[j] == 0)
                {
-                        printk(KERN_INFO "%s: Illegal DMA %d specified\n", 
+                        printk(KERN_INFO "skisa.c: Illegal DMA %d specified\n",
-                                dev->name, dev->dma);
+                                dev->dma);
                        goto out2;
                }
                if (request_dma(dev->dma, isa_cardname))
                {
-                        printk(KERN_INFO "%s: Selected DMA %d not available\n", 
+                        printk(KERN_INFO "skisa.c: Selected DMA %d not available\n",
-                                dev->name, dev->dma);
+                                dev->dma);
                        goto out2;
                }
        }
-        printk(KERN_DEBUG "%s:    IO: %#4lx  IRQ: %d  DMA: %d\n",
-               dev->name, dev->base_addr, dev->irq, dev->dma);
-                
        err = register_netdev(dev);
        if (err)
                goto out;
+        printk(KERN_DEBUG "%s:    IO: %#4lx  IRQ: %d  DMA: %d\n",
+               dev->name, dev->base_addr, dev->irq, dev->dma);
        return 0;
 out:
        free_dma(dev->dma);
@@ -275,33 +275,11 @@ out2:
 out3:
        tmsdev_term(dev);
 out4:
-        release_region(dev->base_addr, SK_ISA_IO_EXTENT); 
+        release_region(dev->base_addr, SK_ISA_IO_EXTENT);
+out5:
        return err;
 }
-struct net_device * __init sk_isa_probe(int unit)
-{
-        struct net_device *dev = alloc_trdev(sizeof(struct net_local));
-        int err = 0;
-        if (!dev)
-                return ERR_PTR(-ENOMEM);
-        if (unit >= 0) {
-                sprintf(dev->name, "tr%d", unit);
-                netdev_boot_setup_check(dev);
-        }
-        err = setup_card(dev);
-        if (err)
-                goto out;
-        return dev;
-out:
-        free_netdev(dev);
-        return ERR_PTR(err);
-}
 /*
 * Reads MAC address from adapter RAM, which should've read it from
 * the onboard ROM.  
@@ -361,8 +339,6 @@ static int sk_isa_open(struct net_device *dev)
        return tms380tr_open(dev);
 }
-#ifdef MODULE
 #define ISATR_MAX_ADAPTERS 3
 static int io[ISATR_MAX_ADAPTERS];
@@ -375,13 +351,23 @@ module_param_array(io, int, NULL, 0);
 module_param_array(irq, int, NULL, 0);
 module_param_array(dma, int, NULL, 0);
-static struct net_device *sk_isa_dev[ISATR_MAX_ADAPTERS];
+static struct platform_device *sk_isa_dev[ISATR_MAX_ADAPTERS];
-int init_module(void)
+static struct device_driver sk_isa_driver = {
+        .name           = "skisa",
+        .bus            = &platform_bus_type,
+};
+static int __init sk_isa_init(void)
 {
        struct net_device *dev;
+        struct platform_device *pdev;
        int i, num = 0, err = 0;
+        err = driver_register(&sk_isa_driver);
+        if (err)
+                return err;
        for (i = 0; i < ISATR_MAX_ADAPTERS ; i++) {
                dev = alloc_trdev(sizeof(struct net_local));
                if (!dev)
@@ -390,12 +376,15 @@ int init_module(void)
                dev->base_addr = io[i];
                dev->irq = irq[i];
                dev->dma = dma[i];
-                err = setup_card(dev);
+                pdev = platform_device_register_simple("skisa",
+                        i, NULL, 0);
+                err = setup_card(dev, &pdev->dev);
                if (!err) {
-                        sk_isa_dev[i] = dev;
+                        sk_isa_dev[i] = pdev;
+                        dev_set_drvdata(&sk_isa_dev[i]->dev, dev);
                        ++num;
                } else {
+                        platform_device_unregister(pdev);
                        free_netdev(dev);
                }
        }
@@ -409,23 +398,28 @@ int init_module(void)
        return (0);
 }
-void cleanup_module(void)
+static void __exit sk_isa_cleanup(void)
 {
+        struct net_device *dev;
        int i;
        for (i = 0; i < ISATR_MAX_ADAPTERS ; i++) {
-                struct net_device *dev = sk_isa_dev[i];
+                struct platform_device *pdev = sk_isa_dev[i];
-                if (!dev) 
+                if (!pdev)
                        continue;
-                
+                dev = dev_get_drvdata(&pdev->dev);
                unregister_netdev(dev);
                release_region(dev->base_addr, SK_ISA_IO_EXTENT);
                free_irq(dev->irq, dev);
                free_dma(dev->dma);
                tmsdev_term(dev);
                free_netdev(dev);
+                dev_set_drvdata(&pdev->dev, NULL);
+                platform_device_unregister(pdev);
        }
+        driver_unregister(&sk_isa_driver);
 }
-#endif /* MODULE */
+module_init(sk_isa_init);
+module_exit(sk_isa_cleanup);
diff --git a/drivers/net/tokenring/tms380tr.c b/drivers/net/tokenring/tms380tr.c
index 5e0b0ce98ed7..9a543fe2d0e6 100644
--- a/drivers/net/tokenring/tms380tr.c
+++ b/drivers/net/tokenring/tms380tr.c
@@ -62,6 +62,7 @@
 *                              normal operation.
 *      30-Dec-02       JF      Removed incorrect __init from 
 *                              tms380tr_init_card.
+ *      22-Jul-05       JF      Converted to dma-mapping.
 *                              
 *  To do:
 *    1. Multi/Broadcast packet handling (this may have fixed itself)
@@ -89,7 +90,7 @@ static const char version[] = "tms380tr.c: v1.10 30/12/2002 by Christoph Goos, A
 #include <linux/time.h>
 #include <linux/errno.h>
 #include <linux/init.h>
-#include <linux/pci.h>
+#include <linux/dma-mapping.h>
 #include <linux/delay.h>
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
@@ -114,8 +115,6 @@ static const char version[] = "tms380tr.c: v1.10 30/12/2002 by Christoph Goos, A
 #endif
 static unsigned int tms380tr_debug = TMS380TR_DEBUG;
-static struct device tms_device;
 /* Index to functions, as function prototypes.
 * Alphabetical by function name.
 */
@@ -434,7 +433,7 @@ static void tms380tr_init_net_local(struct net_device *dev)
                        skb_put(tp->Rpl[i].Skb, tp->MaxPacketSize);
                        /* data unreachable for DMA ? then use local buffer */
-                        dmabuf = pci_map_single(tp->pdev, tp->Rpl[i].Skb->data, tp->MaxPacketSize, PCI_DMA_FROMDEVICE);
+                        dmabuf = dma_map_single(tp->pdev, tp->Rpl[i].Skb->data, tp->MaxPacketSize, DMA_FROM_DEVICE);
                        if(tp->dmalimit && (dmabuf + tp->MaxPacketSize > tp->dmalimit))
                        {
                                tp->Rpl[i].SkbStat = SKB_DATA_COPY;
@@ -638,10 +637,10 @@ static int tms380tr_hardware_send_packet(struct sk_buff *skb, struct net_device
        /* Is buffer reachable for Busmaster-DMA? */
        length  = skb->len;
-        dmabuf = pci_map_single(tp->pdev, skb->data, length, PCI_DMA_TODEVICE);
+        dmabuf = dma_map_single(tp->pdev, skb->data, length, DMA_TO_DEVICE);
        if(tp->dmalimit && (dmabuf + length > tp->dmalimit)) {
                /* Copy frame to local buffer */
-                pci_unmap_single(tp->pdev, dmabuf, length, PCI_DMA_TODEVICE);
+                dma_unmap_single(tp->pdev, dmabuf, length, DMA_TO_DEVICE);
                dmabuf  = 0;
                i       = tp->TplFree->TPLIndex;
                buf     = tp->LocalTxBuffers[i];
@@ -1284,9 +1283,7 @@ static int tms380tr_reset_adapter(struct net_device *dev)
        unsigned short count, c, count2;
        const struct firmware *fw_entry = NULL;
-        strncpy(tms_device.bus_id,dev->name, BUS_ID_SIZE);
+        if (request_firmware(&fw_entry, "tms380tr.bin", tp->pdev) != 0) {
-        if (request_firmware(&fw_entry, "tms380tr.bin", &tms_device) != 0) {
                printk(KERN_ALERT "%s: firmware %s is missing, cannot start.\n",
                        dev->name, "tms380tr.bin");
                return (-1);
@@ -2021,7 +2018,7 @@ static void tms380tr_cancel_tx_queue(struct net_local* tp)
                printk(KERN_INFO "Cancel tx (%08lXh).\n", (unsigned long)tpl);
                if (tpl->DMABuff)
-                        pci_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, PCI_DMA_TODEVICE);
+                        dma_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, DMA_TO_DEVICE);
                dev_kfree_skb_any(tpl->Skb);
        }
@@ -2090,7 +2087,7 @@ static void tms380tr_tx_status_irq(struct net_device *dev)
                tp->MacStat.tx_packets++;
                if (tpl->DMABuff)
-                        pci_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, PCI_DMA_TODEVICE);
+                        dma_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, DMA_TO_DEVICE);
                dev_kfree_skb_irq(tpl->Skb);
                tpl->BusyFlag = 0;      /* "free" TPL */
        }
@@ -2209,7 +2206,7 @@ static void tms380tr_rcv_status_irq(struct net_device *dev)
                                tp->MacStat.rx_errors++;
                }
                if (rpl->DMABuff)
-                        pci_unmap_single(tp->pdev, rpl->DMABuff, tp->MaxPacketSize, PCI_DMA_TODEVICE);
+                        dma_unmap_single(tp->pdev, rpl->DMABuff, tp->MaxPacketSize, DMA_TO_DEVICE);
                rpl->DMABuff = 0;
                /* Allocate new skb for rpl */
@@ -2227,7 +2224,7 @@ static void tms380tr_rcv_status_irq(struct net_device *dev)
                        skb_put(rpl->Skb, tp->MaxPacketSize);
                        /* Data unreachable for DMA ? then use local buffer */
-                        dmabuf = pci_map_single(tp->pdev, rpl->Skb->data, tp->MaxPacketSize, PCI_DMA_FROMDEVICE);
+                        dmabuf = dma_map_single(tp->pdev, rpl->Skb->data, tp->MaxPacketSize, DMA_FROM_DEVICE);
                        if(tp->dmalimit && (dmabuf + tp->MaxPacketSize > tp->dmalimit))
                        {
                                rpl->SkbStat = SKB_DATA_COPY;
@@ -2332,12 +2329,12 @@ void tmsdev_term(struct net_device *dev)
        struct net_local *tp;
        tp = netdev_priv(dev);
-        pci_unmap_single(tp->pdev, tp->dmabuffer, sizeof(struct net_local),
+        dma_unmap_single(tp->pdev, tp->dmabuffer, sizeof(struct net_local),
-                PCI_DMA_BIDIRECTIONAL);
+                DMA_BIDIRECTIONAL);
 }
 int tmsdev_init(struct net_device *dev, unsigned long dmalimit, 
-                struct pci_dev *pdev)
+                struct device *pdev)
 {
        struct net_local *tms_local;
@@ -2346,8 +2343,8 @@ int tmsdev_init(struct net_device *dev, unsigned long dmalimit,
        init_waitqueue_head(&tms_local->wait_for_tok_int);
        tms_local->dmalimit = dmalimit;
        tms_local->pdev = pdev;
-        tms_local->dmabuffer = pci_map_single(pdev, (void *)tms_local,
+        tms_local->dmabuffer = dma_map_single(pdev, (void *)tms_local,
-            sizeof(struct net_local), PCI_DMA_BIDIRECTIONAL);
+            sizeof(struct net_local), DMA_BIDIRECTIONAL);
        if (tms_local->dmabuffer + sizeof(struct net_local) > dmalimit)
        {
                printk(KERN_INFO "%s: Memory not accessible for DMA\n",
@@ -2370,8 +2367,6 @@ int tmsdev_init(struct net_device *dev, unsigned long dmalimit,
        return 0;
 }
-#ifdef MODULE
 EXPORT_SYMBOL(tms380tr_open);
 EXPORT_SYMBOL(tms380tr_close);
 EXPORT_SYMBOL(tms380tr_interrupt);
@@ -2379,6 +2374,8 @@ EXPORT_SYMBOL(tmsdev_init);
 EXPORT_SYMBOL(tmsdev_term);
 EXPORT_SYMBOL(tms380tr_wait);
+#ifdef MODULE
 static struct module *TMS380_module = NULL;
 int init_module(void)
diff --git a/drivers/net/tokenring/tms380tr.h b/drivers/net/tokenring/tms380tr.h
index f2c5ba0f37a5..077f568d89d1 100644
--- a/drivers/net/tokenring/tms380tr.h
+++ b/drivers/net/tokenring/tms380tr.h
@@ -18,7 +18,7 @@ int tms380tr_open(struct net_device *dev);
 int tms380tr_close(struct net_device *dev);
 irqreturn_t tms380tr_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 int tmsdev_init(struct net_device *dev, unsigned long dmalimit,
-                struct pci_dev *pdev);
+                struct device *pdev);
 void tmsdev_term(struct net_device *dev);
 void tms380tr_wait(unsigned long time);
@@ -719,7 +719,7 @@ struct s_TPL {	/* Transmit Parameter List (align on even word boundaries) */
        struct sk_buff *Skb;
        unsigned char TPLIndex;
        volatile unsigned char BusyFlag;/* Flag: TPL busy? */
-        dma_addr_t DMABuff;             /* DMA IO bus address from pci_map */
+        dma_addr_t DMABuff;             /* DMA IO bus address from dma_map */
 };
 /* ---------------------Receive Functions-------------------------------*
@@ -1060,7 +1060,7 @@ struct s_RPL {	/* Receive Parameter List */
        struct sk_buff *Skb;
        SKB_STAT SkbStat;
        int RPLIndex;
-        dma_addr_t DMABuff;             /* DMA IO bus address from pci_map */
+        dma_addr_t DMABuff;             /* DMA IO bus address from dma_map */
 };
 /* Information that need to be kept for each board. */
@@ -1091,7 +1091,7 @@ typedef struct net_local {
        RPL *RplTail;
        unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE];
-        struct pci_dev *pdev;
+        struct device *pdev;
        int DataRate;
        unsigned char ScbInUse;
        unsigned short CMDqueue;
diff --git a/drivers/net/tokenring/tmspci.c b/drivers/net/tokenring/tmspci.c
index 2e18c0a46482..0014aef5c744 100644
--- a/drivers/net/tokenring/tmspci.c
+++ b/drivers/net/tokenring/tmspci.c
@@ -100,7 +100,7 @@ static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_devic
        unsigned int pci_irq_line;
        unsigned long pci_ioaddr;
        struct card_info *cardinfo = &card_info_table[ent->driver_data];
-                
        if (versionprinted++ == 0)
                printk("%s", version);
@@ -143,7 +143,7 @@ static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_devic
                printk(":%2.2x", dev->dev_addr[i]);
        printk("\n");
                
-        ret = tmsdev_init(dev, PCI_MAX_ADDRESS, pdev);
+        ret = tmsdev_init(dev, PCI_MAX_ADDRESS, &pdev->dev);
        if (ret) {
                printk("%s: unable to get memory for dev->priv.\n", dev->name);
                goto err_out_irq;
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c
index aabcdc2be05e..9c2d07cde010 100644
--- a/drivers/net/wireless/orinoco.c
+++ b/drivers/net/wireless/orinoco.c
@@ -4322,36 +4322,36 @@ static const struct iw_priv_args orinoco_privtab[] = {
 */
 static const iw_handler orinoco_handler[] = {
-        [SIOCSIWCOMMIT-SIOCIWFIRST] (iw_handler) orinoco_ioctl_commit,
+        [SIOCSIWCOMMIT-SIOCIWFIRST] = (iw_handler) orinoco_ioctl_commit,
-        [SIOCGIWNAME  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getname,
+        [SIOCGIWNAME  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getname,
-        [SIOCSIWFREQ  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setfreq,
+        [SIOCSIWFREQ  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setfreq,
-        [SIOCGIWFREQ  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getfreq,
+        [SIOCGIWFREQ  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getfreq,
-        [SIOCSIWMODE  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setmode,
+        [SIOCSIWMODE  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setmode,
-        [SIOCGIWMODE  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getmode,
+        [SIOCGIWMODE  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getmode,
-        [SIOCSIWSENS  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setsens,
+        [SIOCSIWSENS  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setsens,
-        [SIOCGIWSENS  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getsens,
+        [SIOCGIWSENS  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getsens,
-        [SIOCGIWRANGE -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getiwrange,
+        [SIOCGIWRANGE -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getiwrange,
-        [SIOCSIWSPY   -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setspy,
+        [SIOCSIWSPY   -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setspy,
-        [SIOCGIWSPY   -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getspy,
+        [SIOCGIWSPY   -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getspy,
-        [SIOCSIWAP    -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setwap,
+        [SIOCSIWAP    -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setwap,
-        [SIOCGIWAP    -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getwap,
+        [SIOCGIWAP    -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getwap,
-        [SIOCSIWSCAN  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setscan,
+        [SIOCSIWSCAN  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setscan,
-        [SIOCGIWSCAN  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getscan,
+        [SIOCGIWSCAN  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getscan,
-        [SIOCSIWESSID -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setessid,
+        [SIOCSIWESSID -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setessid,
-        [SIOCGIWESSID -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getessid,
+        [SIOCGIWESSID -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getessid,
-        [SIOCSIWNICKN -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setnick,
+        [SIOCSIWNICKN -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setnick,
-        [SIOCGIWNICKN -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getnick,
+        [SIOCGIWNICKN -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getnick,
-        [SIOCSIWRATE  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setrate,
+        [SIOCSIWRATE  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setrate,
-        [SIOCGIWRATE  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getrate,
+        [SIOCGIWRATE  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getrate,
-        [SIOCSIWRTS   -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setrts,
+        [SIOCSIWRTS   -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setrts,
-        [SIOCGIWRTS   -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getrts,
+        [SIOCGIWRTS   -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getrts,
-        [SIOCSIWFRAG  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setfrag,
+        [SIOCSIWFRAG  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setfrag,
-        [SIOCGIWFRAG  -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getfrag,
+        [SIOCGIWFRAG  -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getfrag,
-        [SIOCGIWRETRY -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getretry,
+        [SIOCGIWRETRY -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getretry,
-        [SIOCSIWENCODE-SIOCIWFIRST] (iw_handler) orinoco_ioctl_setiwencode,
+        [SIOCSIWENCODE-SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setiwencode,
-        [SIOCGIWENCODE-SIOCIWFIRST] (iw_handler) orinoco_ioctl_getiwencode,
+        [SIOCGIWENCODE-SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getiwencode,
-        [SIOCSIWPOWER -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setpower,
+        [SIOCSIWPOWER -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_setpower,
-        [SIOCGIWPOWER -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getpower,
+        [SIOCGIWPOWER -SIOCIWFIRST] = (iw_handler) orinoco_ioctl_getpower,
 };
@@ -4359,15 +4359,15 @@ static const iw_handler	orinoco_handler[] = {
  Added typecasting since we no longer use iwreq_data -- Moustafa
 */
 static const iw_handler orinoco_private_handler[] = {
-        [0] (iw_handler) orinoco_ioctl_reset,
+        [0] = (iw_handler) orinoco_ioctl_reset,
-        [1] (iw_handler) orinoco_ioctl_reset,
+        [1] = (iw_handler) orinoco_ioctl_reset,
-        [2] (iw_handler) orinoco_ioctl_setport3,
+        [2] = (iw_handler) orinoco_ioctl_setport3,
-        [3] (iw_handler) orinoco_ioctl_getport3,
+        [3] = (iw_handler) orinoco_ioctl_getport3,
-        [4] (iw_handler) orinoco_ioctl_setpreamble,
+        [4] = (iw_handler) orinoco_ioctl_setpreamble,
-        [5] (iw_handler) orinoco_ioctl_getpreamble,
+        [5] = (iw_handler) orinoco_ioctl_getpreamble,
-        [6] (iw_handler) orinoco_ioctl_setibssport,
+        [6] = (iw_handler) orinoco_ioctl_setibssport,
-        [7] (iw_handler) orinoco_ioctl_getibssport,
+        [7] = (iw_handler) orinoco_ioctl_getibssport,
-        [9] (iw_handler) orinoco_ioctl_getrid,
+        [9] = (iw_handler) orinoco_ioctl_getrid,
 };
 static const struct iw_handler_def orinoco_handler_def = {
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index a0ab26aab450..d7021c391b2b 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -408,6 +408,8 @@ struct ethtool_ops {
 #define SUPPORTED_FIBRE                 (1 << 10)
 #define SUPPORTED_BNC                   (1 << 11)
 #define SUPPORTED_10000baseT_Full       (1 << 12)
+#define SUPPORTED_Pause                 (1 << 13)
+#define SUPPORTED_Asym_Pause            (1 << 14)
 /* Indicates what features are advertised by the interface. */
 #define ADVERTISED_10baseT_Half         (1 << 0)
@@ -423,6 +425,8 @@ struct ethtool_ops {
 #define ADVERTISED_FIBRE                (1 << 10)
 #define ADVERTISED_BNC                  (1 << 11)
 #define ADVERTISED_10000baseT_Full      (1 << 12)
+#define ADVERTISED_Pause                (1 << 13)
+#define ADVERTISED_Asym_Pause           (1 << 14)
 /* The following are all involved in forcing a particular link
 * mode for the device for setting things.  When getting the
diff --git a/include/linux/mii.h b/include/linux/mii.h
index 374b615ea9ea..9b8d0476988a 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -22,6 +22,7 @@
 #define MII_EXPANSION       0x06        /* Expansion register          */
 #define MII_CTRL1000        0x09        /* 1000BASE-T control          */
 #define MII_STAT1000        0x0a        /* 1000BASE-T status           */
+#define MII_ESTATUS         0x0f        /* Extended Status */
 #define MII_DCOUNTER        0x12        /* Disconnect counter          */
 #define MII_FCSCOUNTER      0x13        /* False carrier counter       */
 #define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
@@ -54,7 +55,10 @@
 #define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
 #define BMSR_RFAULT             0x0010  /* Remote fault detected       */
 #define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x07c0  /* Unused...                   */
+#define BMSR_RESV               0x00c0  /* Unused...                   */
+#define BMSR_ESTATEN            0x0100  /* Extended Status in R15 */
+#define BMSR_100FULL2           0x0200  /* Can do 100BASE-T2 HDX */
+#define BMSR_100HALF2           0x0400  /* Can do 100BASE-T2 FDX */
 #define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
 #define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
 #define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
@@ -114,6 +118,9 @@
 #define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
 #define EXPANSION_RESV          0xffe0  /* Unused...                   */
+#define ESTATUS_1000_TFULL      0x2000  /* Can do 1000BT Full */
+#define ESTATUS_1000_THALF      0x1000  /* Can do 1000BT Half */
 /* N-way test register. */
 #define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
 #define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
diff --git a/include/linux/phy.h b/include/linux/phy.h
new file mode 100644
index 000000000000..4f2b5effc16b
--- /dev/null
+++ b/include/linux/phy.h
@@ -0,0 +1,360 @@
+/*
+ * include/linux/phy.h
+ *
+ * Framework and drivers for configuring and reading different PHYs
+ * Based on code in sungem_phy.c and gianfar_phy.c
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#ifndef __PHY_H
+#define __PHY_H
+#include <linux/spinlock.h>
+#include <linux/device.h>
+#define PHY_BASIC_FEATURES      (SUPPORTED_10baseT_Half | \
+                                 SUPPORTED_10baseT_Full | \
+                                 SUPPORTED_100baseT_Half | \
+                                 SUPPORTED_100baseT_Full | \
+                                 SUPPORTED_Autoneg | \
+                                 SUPPORTED_TP | \
+                                 SUPPORTED_MII)
+#define PHY_GBIT_FEATURES       (PHY_BASIC_FEATURES | \
+                                 SUPPORTED_1000baseT_Half | \
+                                 SUPPORTED_1000baseT_Full)
+/* Set phydev->irq to PHY_POLL if interrupts are not supported,
+ * or not desired for this PHY.  Set to PHY_IGNORE_INTERRUPT if
+ * the attached driver handles the interrupt
+ */
+#define PHY_POLL                -1
+#define PHY_IGNORE_INTERRUPT    -2
+#define PHY_HAS_INTERRUPT       0x00000001
+#define PHY_HAS_MAGICANEG       0x00000002
+#define MII_BUS_MAX 4
+#define PHY_INIT_TIMEOUT 100000
+#define PHY_STATE_TIME          1
+#define PHY_FORCE_TIMEOUT       10
+#define PHY_AN_TIMEOUT          10
+#define PHY_MAX_ADDR 32
+/* The Bus class for PHYs.  Devices which provide access to
+ * PHYs should register using this structure */
+struct mii_bus {
+        const char *name;
+        int id;
+        void *priv;
+        int (*read)(struct mii_bus *bus, int phy_id, int regnum);
+        int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val);
+        int (*reset)(struct mii_bus *bus);
+        /* A lock to ensure that only one thing can read/write
+         * the MDIO bus at a time */
+        spinlock_t mdio_lock;
+        struct device *dev;
+        /* list of all PHYs on bus */
+        struct phy_device *phy_map[PHY_MAX_ADDR];
+        /* Pointer to an array of interrupts, each PHY's
+         * interrupt at the index matching its address */
+        int *irq;
+};
+#define PHY_INTERRUPT_DISABLED 0x0
+#define PHY_INTERRUPT_ENABLED 0x80000000
+/* PHY state machine states:
+ *
+ * DOWN: PHY device and driver are not ready for anything.  probe
+ * should be called if and only if the PHY is in this state,
+ * given that the PHY device exists.
+ * - PHY driver probe function will, depending on the PHY, set
+ * the state to STARTING or READY
+ *
+ * STARTING:  PHY device is coming up, and the ethernet driver is
+ * not ready.  PHY drivers may set this in the probe function.
+ * If they do, they are responsible for making sure the state is
+ * eventually set to indicate whether the PHY is UP or READY,
+ * depending on the state when the PHY is done starting up.
+ * - PHY driver will set the state to READY
+ * - start will set the state to PENDING
+ *
+ * READY: PHY is ready to send and receive packets, but the
+ * controller is not.  By default, PHYs which do not implement
+ * probe will be set to this state by phy_probe().  If the PHY
+ * driver knows the PHY is ready, and the PHY state is STARTING,
+ * then it sets this STATE.
+ * - start will set the state to UP
+ *
+ * PENDING: PHY device is coming up, but the ethernet driver is
+ * ready.  phy_start will set this state if the PHY state is
+ * STARTING.
+ * - PHY driver will set the state to UP when the PHY is ready
+ *
+ * UP: The PHY and attached device are ready to do work.
+ * Interrupts should be started here.
+ * - timer moves to AN
+ *
+ * AN: The PHY is currently negotiating the link state.  Link is
+ * therefore down for now.  phy_timer will set this state when it
+ * detects the state is UP.  config_aneg will set this state
+ * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
+ * - If autonegotiation finishes, but there's no link, it sets
+ *   the state to NOLINK.
+ * - If aneg finishes with link, it sets the state to RUNNING,
+ *   and calls adjust_link
+ * - If autonegotiation did not finish after an arbitrary amount
+ *   of time, autonegotiation should be tried again if the PHY
+ *   supports "magic" autonegotiation (back to AN)
+ * - If it didn't finish, and no magic_aneg, move to FORCING.
+ *
+ * NOLINK: PHY is up, but not currently plugged in.
+ * - If the timer notes that the link comes back, we move to RUNNING
+ * - config_aneg moves to AN
+ * - phy_stop moves to HALTED
+ *
+ * FORCING: PHY is being configured with forced settings
+ * - if link is up, move to RUNNING
+ * - If link is down, we drop to the next highest setting, and
+ *   retry (FORCING) after a timeout
+ * - phy_stop moves to HALTED
+ *
+ * RUNNING: PHY is currently up, running, and possibly sending
+ * and/or receiving packets
+ * - timer will set CHANGELINK if we're polling (this ensures the
+ *   link state is polled every other cycle of this state machine,
+ *   which makes it every other second)
+ * - irq will set CHANGELINK
+ * - config_aneg will set AN
+ * - phy_stop moves to HALTED
+ *
+ * CHANGELINK: PHY experienced a change in link state
+ * - timer moves to RUNNING if link
+ * - timer moves to NOLINK if the link is down
+ * - phy_stop moves to HALTED
+ *
+ * HALTED: PHY is up, but no polling or interrupts are done. Or
+ * PHY is in an error state.
+ *
+ * - phy_start moves to RESUMING
+ *
+ * RESUMING: PHY was halted, but now wants to run again.
+ * - If we are forcing, or aneg is done, timer moves to RUNNING
+ * - If aneg is not done, timer moves to AN
+ * - phy_stop moves to HALTED
+ */
+enum phy_state {
+        PHY_DOWN=0,
+        PHY_STARTING,
+        PHY_READY,
+        PHY_PENDING,
+        PHY_UP,
+        PHY_AN,
+        PHY_RUNNING,
+        PHY_NOLINK,
+        PHY_FORCING,
+        PHY_CHANGELINK,
+        PHY_HALTED,
+        PHY_RESUMING
+};
+/* phy_device: An instance of a PHY
+ *
+ * drv: Pointer to the driver for this PHY instance
+ * bus: Pointer to the bus this PHY is on
+ * dev: driver model device structure for this PHY
+ * phy_id: UID for this device found during discovery
+ * state: state of the PHY for management purposes
+ * dev_flags: Device-specific flags used by the PHY driver.
+ * addr: Bus address of PHY
+ * link_timeout: The number of timer firings to wait before the
+ * giving up on the current attempt at acquiring a link
+ * irq: IRQ number of the PHY's interrupt (-1 if none)
+ * phy_timer: The timer for handling the state machine
+ * phy_queue: A work_queue for the interrupt
+ * attached_dev: The attached enet driver's device instance ptr
+ * adjust_link: Callback for the enet controller to respond to
+ * changes in the link state.
+ * adjust_state: Callback for the enet driver to respond to
+ * changes in the state machine.
+ *
+ * speed, duplex, pause, supported, advertising, and
+ * autoneg are used like in mii_if_info
+ *
+ * interrupts currently only supports enabled or disabled,
+ * but could be changed in the future to support enabling
+ * and disabling specific interrupts
+ *
+ * Contains some infrastructure for polling and interrupt
+ * handling, as well as handling shifts in PHY hardware state
+ */
+struct phy_device {
+        /* Information about the PHY type */
+        /* And management functions */
+        struct phy_driver *drv;
+        struct mii_bus *bus;
+        struct device dev;
+        u32 phy_id;
+        enum phy_state state;
+        u32 dev_flags;
+        /* Bus address of the PHY (0-32) */
+        int addr;
+        /* forced speed & duplex (no autoneg)
+         * partner speed & duplex & pause (autoneg)
+         */
+        int speed;
+        int duplex;
+        int pause;
+        int asym_pause;
+        /* The most recently read link state */
+        int link;
+        /* Enabled Interrupts */
+        u32 interrupts;
+        /* Union of PHY and Attached devices' supported modes */
+        /* See mii.h for more info */
+        u32 supported;
+        u32 advertising;
+        int autoneg;
+        int link_timeout;
+        /* Interrupt number for this PHY
+         * -1 means no interrupt */
+        int irq;
+        /* private data pointer */
+        /* For use by PHYs to maintain extra state */
+        void *priv;
+        /* Interrupt and Polling infrastructure */
+        struct work_struct phy_queue;
+        struct timer_list phy_timer;
+        spinlock_t lock;
+        struct net_device *attached_dev;
+        void (*adjust_link)(struct net_device *dev);
+        void (*adjust_state)(struct net_device *dev);
+};
+#define to_phy_device(d) container_of(d, struct phy_device, dev)
+/* struct phy_driver: Driver structure for a particular PHY type
+ *
+ * phy_id: The result of reading the UID registers of this PHY
+ *   type, and ANDing them with the phy_id_mask.  This driver
+ *   only works for PHYs with IDs which match this field
+ * name: The friendly name of this PHY type
+ * phy_id_mask: Defines the important bits of the phy_id
+ * features: A list of features (speed, duplex, etc) supported
+ *   by this PHY
+ * flags: A bitfield defining certain other features this PHY
+ *   supports (like interrupts)
+ *
+ * The drivers must implement config_aneg and read_status.  All
+ * other functions are optional. Note that none of these
+ * functions should be called from interrupt time.  The goal is
+ * for the bus read/write functions to be able to block when the
+ * bus transaction is happening, and be freed up by an interrupt
+ * (The MPC85xx has this ability, though it is not currently
+ * supported in the driver).
+ */
+struct phy_driver {
+        u32 phy_id;
+        char *name;
+        unsigned int phy_id_mask;
+        u32 features;
+        u32 flags;
+        /* Called to initialize the PHY,
+         * including after a reset */
+        int (*config_init)(struct phy_device *phydev);
+        /* Called during discovery.  Used to set
+         * up device-specific structures, if any */
+        int (*probe)(struct phy_device *phydev);
+        /* PHY Power Management */
+        int (*suspend)(struct phy_device *phydev);
+        int (*resume)(struct phy_device *phydev);
+        /* Configures the advertisement and resets
+         * autonegotiation if phydev->autoneg is on,
+         * forces the speed to the current settings in phydev
+         * if phydev->autoneg is off */
+        int (*config_aneg)(struct phy_device *phydev);
+        /* Determines the negotiated speed and duplex */
+        int (*read_status)(struct phy_device *phydev);
+        /* Clears any pending interrupts */
+        int (*ack_interrupt)(struct phy_device *phydev);
+        /* Enables or disables interrupts */
+        int (*config_intr)(struct phy_device *phydev);
+        /* Clears up any memory if needed */
+        void (*remove)(struct phy_device *phydev);
+        struct device_driver driver;
+};
+#define to_phy_driver(d) container_of(d, struct phy_driver, driver)
+int phy_read(struct phy_device *phydev, u16 regnum);
+int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
+struct phy_device* get_phy_device(struct mii_bus *bus, int addr);
+int phy_clear_interrupt(struct phy_device *phydev);
+int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);
+static inline int phy_read_status(struct phy_device *phydev) {
+        return phydev->drv->read_status(phydev);
+}
+int genphy_setup_forced(struct phy_device *phydev);
+int genphy_restart_aneg(struct phy_device *phydev);
+int genphy_config_aneg(struct phy_device *phydev);
+int genphy_update_link(struct phy_device *phydev);
+int genphy_read_status(struct phy_device *phydev);
+void phy_driver_unregister(struct phy_driver *drv);
+int phy_driver_register(struct phy_driver *new_driver);
+void phy_prepare_link(struct phy_device *phydev,
+                void (*adjust_link)(struct net_device *));
+void phy_start_machine(struct phy_device *phydev,
+                void (*handler)(struct net_device *));
+void phy_stop_machine(struct phy_device *phydev);
+int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
+int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
+int phy_mii_ioctl(struct phy_device *phydev,
+                struct mii_ioctl_data *mii_data, int cmd);
+extern struct bus_type mdio_bus_type;
+#endif /* __PHY_H */