diff options
-rw-r--r-- | Documentation/cachetlb.txt | 5 | ||||
-rw-r--r-- | Documentation/x86_64/boot-options.txt | 4 | ||||
-rw-r--r-- | MAINTAINERS | 22 | ||||
-rw-r--r-- | arch/arm/kernel/entry-armv.S | 12 | ||||
-rw-r--r-- | arch/arm/kernel/time.c | 13 | ||||
-rw-r--r-- | arch/arm/kernel/traps.c | 1 | ||||
-rw-r--r-- | arch/arm/mm/flush.c | 39 | ||||
-rw-r--r-- | arch/x86_64/kernel/early-quirks.c | 5 | ||||
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 124 | ||||
-rw-r--r-- | drivers/mmc/mmci.c | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/iop32x.h | 2 | ||||
-rw-r--r-- | include/asm-arm/cacheflush.h | 10 | ||||
-rw-r--r-- | include/asm-arm/hardware/iop3xx.h | 6 | ||||
-rw-r--r-- | include/asm-parisc/cacheflush.h | 2 | ||||
-rw-r--r-- | include/linux/highmem.h | 2 | ||||
-rw-r--r-- | mm/memory.c | 2 |
16 files changed, 185 insertions, 68 deletions
diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt index 73e794f0ff09..debf6813934a 100644 --- a/Documentation/cachetlb.txt +++ b/Documentation/cachetlb.txt | |||
@@ -373,14 +373,15 @@ maps this page at its virtual address. | |||
373 | likely that you will need to flush the instruction cache | 373 | likely that you will need to flush the instruction cache |
374 | for copy_to_user_page(). | 374 | for copy_to_user_page(). |
375 | 375 | ||
376 | void flush_anon_page(struct page *page, unsigned long vmaddr) | 376 | void flush_anon_page(struct vm_area_struct *vma, struct page *page, |
377 | unsigned long vmaddr) | ||
377 | When the kernel needs to access the contents of an anonymous | 378 | When the kernel needs to access the contents of an anonymous |
378 | page, it calls this function (currently only | 379 | page, it calls this function (currently only |
379 | get_user_pages()). Note: flush_dcache_page() deliberately | 380 | get_user_pages()). Note: flush_dcache_page() deliberately |
380 | doesn't work for an anonymous page. The default | 381 | doesn't work for an anonymous page. The default |
381 | implementation is a nop (and should remain so for all coherent | 382 | implementation is a nop (and should remain so for all coherent |
382 | architectures). For incoherent architectures, it should flush | 383 | architectures). For incoherent architectures, it should flush |
383 | the cache of the page at vmaddr in the current user process. | 384 | the cache of the page at vmaddr. |
384 | 385 | ||
385 | void flush_kernel_dcache_page(struct page *page) | 386 | void flush_kernel_dcache_page(struct page *page) |
386 | When the kernel needs to modify a user page is has obtained | 387 | When the kernel needs to modify a user page is has obtained |
diff --git a/Documentation/x86_64/boot-options.txt b/Documentation/x86_64/boot-options.txt index dbdcaf68e3ea..5c86ed6f0448 100644 --- a/Documentation/x86_64/boot-options.txt +++ b/Documentation/x86_64/boot-options.txt | |||
@@ -52,6 +52,10 @@ APICs | |||
52 | apicmaintimer. Useful when your PIT timer is totally | 52 | apicmaintimer. Useful when your PIT timer is totally |
53 | broken. | 53 | broken. |
54 | 54 | ||
55 | disable_8254_timer / enable_8254_timer | ||
56 | Enable interrupt 0 timer routing over the 8254 in addition to over | ||
57 | the IO-APIC. The kernel tries to set a sensible default. | ||
58 | |||
55 | Early Console | 59 | Early Console |
56 | 60 | ||
57 | syntax: earlyprintk=vga | 61 | syntax: earlyprintk=vga |
diff --git a/MAINTAINERS b/MAINTAINERS index 2bd34ef58ffa..4ccc5fa06d09 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -412,20 +412,32 @@ S: Maintained | |||
412 | ARM/INTEL IOP32X ARM ARCHITECTURE | 412 | ARM/INTEL IOP32X ARM ARCHITECTURE |
413 | P: Lennert Buytenhek | 413 | P: Lennert Buytenhek |
414 | M: kernel@wantstofly.org | 414 | M: kernel@wantstofly.org |
415 | P: Dan Williams | ||
416 | M: dan.j.williams@intel.com | ||
415 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) | 417 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) |
416 | S: Maintained | 418 | S: Supported |
419 | |||
420 | ARM/INTEL IOP33X ARM ARCHITECTURE | ||
421 | P: Dan Williams | ||
422 | M: dan.j.williams@intel.com | ||
423 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) | ||
424 | S: Supported | ||
417 | 425 | ||
418 | ARM/INTEL IOP13XX ARM ARCHITECTURE | 426 | ARM/INTEL IOP13XX ARM ARCHITECTURE |
419 | P: Lennert Buytenhek | 427 | P: Lennert Buytenhek |
420 | M: kernel@wantstofly.org | 428 | M: kernel@wantstofly.org |
429 | P: Dan Williams | ||
430 | M: dan.j.williams@intel.com | ||
421 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) | 431 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) |
422 | S: Maintained | 432 | S: Supported |
423 | 433 | ||
424 | ARM/INTEL IQ81342EX MACHINE SUPPORT | 434 | ARM/INTEL IQ81342EX MACHINE SUPPORT |
425 | P: Lennert Buytenhek | 435 | P: Lennert Buytenhek |
426 | M: kernel@wantstofly.org | 436 | M: kernel@wantstofly.org |
437 | P: Dan Williams | ||
438 | M: dan.j.williams@intel.com | ||
427 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) | 439 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) |
428 | S: Maintained | 440 | S: Supported |
429 | 441 | ||
430 | ARM/INTEL IXP2000 ARM ARCHITECTURE | 442 | ARM/INTEL IXP2000 ARM ARCHITECTURE |
431 | P: Lennert Buytenhek | 443 | P: Lennert Buytenhek |
@@ -448,8 +460,10 @@ S: Maintained | |||
448 | ARM/INTEL XSC3 (MANZANO) ARM CORE | 460 | ARM/INTEL XSC3 (MANZANO) ARM CORE |
449 | P: Lennert Buytenhek | 461 | P: Lennert Buytenhek |
450 | M: kernel@wantstofly.org | 462 | M: kernel@wantstofly.org |
463 | P: Dan Williams | ||
464 | M: dan.j.williams@intel.com | ||
451 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) | 465 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) |
452 | S: Maintained | 466 | S: Supported |
453 | 467 | ||
454 | ARM/IP FABRICS DOUBLE ESPRESSO MACHINE SUPPORT | 468 | ARM/IP FABRICS DOUBLE ESPRESSO MACHINE SUPPORT |
455 | P: Lennert Buytenhek | 469 | P: Lennert Buytenhek |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 2db42b18f53f..8517c3c3eb33 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -436,7 +436,7 @@ __und_usr: | |||
436 | usr_entry | 436 | usr_entry |
437 | 437 | ||
438 | tst r3, #PSR_T_BIT @ Thumb mode? | 438 | tst r3, #PSR_T_BIT @ Thumb mode? |
439 | bne fpundefinstr @ ignore FP | 439 | bne __und_usr_unknown @ ignore FP |
440 | sub r4, r2, #4 | 440 | sub r4, r2, #4 |
441 | 441 | ||
442 | @ | 442 | @ |
@@ -448,7 +448,7 @@ __und_usr: | |||
448 | @ | 448 | @ |
449 | 1: ldrt r0, [r4] | 449 | 1: ldrt r0, [r4] |
450 | adr r9, ret_from_exception | 450 | adr r9, ret_from_exception |
451 | adr lr, fpundefinstr | 451 | adr lr, __und_usr_unknown |
452 | @ | 452 | @ |
453 | @ fallthrough to call_fpe | 453 | @ fallthrough to call_fpe |
454 | @ | 454 | @ |
@@ -476,7 +476,9 @@ __und_usr: | |||
476 | * Emulators may wish to make use of the following registers: | 476 | * Emulators may wish to make use of the following registers: |
477 | * r0 = instruction opcode. | 477 | * r0 = instruction opcode. |
478 | * r2 = PC+4 | 478 | * r2 = PC+4 |
479 | * r9 = normal "successful" return address | ||
479 | * r10 = this threads thread_info structure. | 480 | * r10 = this threads thread_info structure. |
481 | * lr = unrecognised instruction return address | ||
480 | */ | 482 | */ |
481 | call_fpe: | 483 | call_fpe: |
482 | tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 | 484 | tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 |
@@ -545,10 +547,12 @@ do_fpe: | |||
545 | 547 | ||
546 | .data | 548 | .data |
547 | ENTRY(fp_enter) | 549 | ENTRY(fp_enter) |
548 | .word fpundefinstr | 550 | .word no_fp |
549 | .text | 551 | .text |
550 | 552 | ||
551 | fpundefinstr: | 553 | no_fp: mov pc, lr |
554 | |||
555 | __und_usr_unknown: | ||
552 | mov r0, sp | 556 | mov r0, sp |
553 | adr lr, ret_from_exception | 557 | adr lr, ret_from_exception |
554 | b do_undefinstr | 558 | b do_undefinstr |
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index 6ff5e3ff6cb5..3c8cdcfe8d4a 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -29,6 +29,8 @@ | |||
29 | #include <linux/timer.h> | 29 | #include <linux/timer.h> |
30 | #include <linux/irq.h> | 30 | #include <linux/irq.h> |
31 | 31 | ||
32 | #include <linux/mc146818rtc.h> | ||
33 | |||
32 | #include <asm/leds.h> | 34 | #include <asm/leds.h> |
33 | #include <asm/thread_info.h> | 35 | #include <asm/thread_info.h> |
34 | #include <asm/mach/time.h> | 36 | #include <asm/mach/time.h> |
@@ -85,6 +87,17 @@ unsigned long long __attribute__((weak)) sched_clock(void) | |||
85 | return (unsigned long long)jiffies * (1000000000 / HZ); | 87 | return (unsigned long long)jiffies * (1000000000 / HZ); |
86 | } | 88 | } |
87 | 89 | ||
90 | /* | ||
91 | * An implementation of printk_clock() independent from | ||
92 | * sched_clock(). This avoids non-bootable kernels when | ||
93 | * printk_clock is enabled. | ||
94 | */ | ||
95 | unsigned long long printk_clock(void) | ||
96 | { | ||
97 | return (unsigned long long)(jiffies - INITIAL_JIFFIES) * | ||
98 | (1000000000 / HZ); | ||
99 | } | ||
100 | |||
88 | static unsigned long next_rtc_update; | 101 | static unsigned long next_rtc_update; |
89 | 102 | ||
90 | /* | 103 | /* |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 042a12982e98..908915675edc 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <asm/uaccess.h> | 27 | #include <asm/uaccess.h> |
28 | #include <asm/unistd.h> | 28 | #include <asm/unistd.h> |
29 | #include <asm/traps.h> | 29 | #include <asm/traps.h> |
30 | #include <asm/io.h> | ||
30 | 31 | ||
31 | #include "ptrace.h" | 32 | #include "ptrace.h" |
32 | #include "signal.h" | 33 | #include "signal.h" |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 628348c9f6c5..9df507d36e0b 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
@@ -202,3 +202,42 @@ void flush_dcache_page(struct page *page) | |||
202 | } | 202 | } |
203 | } | 203 | } |
204 | EXPORT_SYMBOL(flush_dcache_page); | 204 | EXPORT_SYMBOL(flush_dcache_page); |
205 | |||
206 | /* | ||
207 | * Flush an anonymous page so that users of get_user_pages() | ||
208 | * can safely access the data. The expected sequence is: | ||
209 | * | ||
210 | * get_user_pages() | ||
211 | * -> flush_anon_page | ||
212 | * memcpy() to/from page | ||
213 | * if written to page, flush_dcache_page() | ||
214 | */ | ||
215 | void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) | ||
216 | { | ||
217 | unsigned long pfn; | ||
218 | |||
219 | /* VIPT non-aliasing caches need do nothing */ | ||
220 | if (cache_is_vipt_nonaliasing()) | ||
221 | return; | ||
222 | |||
223 | /* | ||
224 | * Write back and invalidate userspace mapping. | ||
225 | */ | ||
226 | pfn = page_to_pfn(page); | ||
227 | if (cache_is_vivt()) { | ||
228 | flush_cache_page(vma, vmaddr, pfn); | ||
229 | } else { | ||
230 | /* | ||
231 | * For aliasing VIPT, we can flush an alias of the | ||
232 | * userspace address only. | ||
233 | */ | ||
234 | flush_pfn_alias(pfn, vmaddr); | ||
235 | } | ||
236 | |||
237 | /* | ||
238 | * Invalidate kernel mapping. No data should be contained | ||
239 | * in this mapping of the page. FIXME: this is overkill | ||
240 | * since we actually ask for a write-back and invalidate. | ||
241 | */ | ||
242 | __cpuc_flush_dcache_page(page_address(page)); | ||
243 | } | ||
diff --git a/arch/x86_64/kernel/early-quirks.c b/arch/x86_64/kernel/early-quirks.c index 829698f6d049..49802f1bee94 100644 --- a/arch/x86_64/kernel/early-quirks.c +++ b/arch/x86_64/kernel/early-quirks.c | |||
@@ -69,6 +69,11 @@ static void nvidia_bugs(void) | |||
69 | 69 | ||
70 | static void ati_bugs(void) | 70 | static void ati_bugs(void) |
71 | { | 71 | { |
72 | if (timer_over_8254 == 1) { | ||
73 | timer_over_8254 = 0; | ||
74 | printk(KERN_INFO | ||
75 | "ATI board detected. Disabling timer routing over 8254.\n"); | ||
76 | } | ||
72 | } | 77 | } |
73 | 78 | ||
74 | static void intel_bugs(void) | 79 | static void intel_bugs(void) |
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index 2a1dcd5f69c2..d7bad90a5ad8 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -55,6 +55,10 @@ int sis_apic_bug; /* not actually supported, dummy for compile */ | |||
55 | 55 | ||
56 | static int no_timer_check; | 56 | static int no_timer_check; |
57 | 57 | ||
58 | static int disable_timer_pin_1 __initdata; | ||
59 | |||
60 | int timer_over_8254 __initdata = 1; | ||
61 | |||
58 | /* Where if anywhere is the i8259 connect in external int mode */ | 62 | /* Where if anywhere is the i8259 connect in external int mode */ |
59 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; | 63 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; |
60 | 64 | ||
@@ -350,6 +354,29 @@ static int __init disable_ioapic_setup(char *str) | |||
350 | } | 354 | } |
351 | early_param("noapic", disable_ioapic_setup); | 355 | early_param("noapic", disable_ioapic_setup); |
352 | 356 | ||
357 | /* Actually the next is obsolete, but keep it for paranoid reasons -AK */ | ||
358 | static int __init disable_timer_pin_setup(char *arg) | ||
359 | { | ||
360 | disable_timer_pin_1 = 1; | ||
361 | return 1; | ||
362 | } | ||
363 | __setup("disable_timer_pin_1", disable_timer_pin_setup); | ||
364 | |||
365 | static int __init setup_disable_8254_timer(char *s) | ||
366 | { | ||
367 | timer_over_8254 = -1; | ||
368 | return 1; | ||
369 | } | ||
370 | static int __init setup_enable_8254_timer(char *s) | ||
371 | { | ||
372 | timer_over_8254 = 2; | ||
373 | return 1; | ||
374 | } | ||
375 | |||
376 | __setup("disable_8254_timer", setup_disable_8254_timer); | ||
377 | __setup("enable_8254_timer", setup_enable_8254_timer); | ||
378 | |||
379 | |||
353 | /* | 380 | /* |
354 | * Find the IRQ entry number of a certain pin. | 381 | * Find the IRQ entry number of a certain pin. |
355 | */ | 382 | */ |
@@ -1568,33 +1595,10 @@ static inline void unlock_ExtINT_logic(void) | |||
1568 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ | 1595 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
1569 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast | 1596 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast |
1570 | * fanatically on his truly buggy board. | 1597 | * fanatically on his truly buggy board. |
1598 | * | ||
1599 | * FIXME: really need to revamp this for modern platforms only. | ||
1571 | */ | 1600 | */ |
1572 | 1601 | static inline void check_timer(void) | |
1573 | static int try_apic_pin(int apic, int pin, char *msg) | ||
1574 | { | ||
1575 | apic_printk(APIC_VERBOSE, KERN_INFO | ||
1576 | "..TIMER: trying IO-APIC=%d PIN=%d %s", | ||
1577 | apic, pin, msg); | ||
1578 | |||
1579 | /* | ||
1580 | * Ok, does IRQ0 through the IOAPIC work? | ||
1581 | */ | ||
1582 | if (!no_timer_check && timer_irq_works()) { | ||
1583 | nmi_watchdog_default(); | ||
1584 | if (nmi_watchdog == NMI_IO_APIC) { | ||
1585 | disable_8259A_irq(0); | ||
1586 | setup_nmi(); | ||
1587 | enable_8259A_irq(0); | ||
1588 | } | ||
1589 | return 1; | ||
1590 | } | ||
1591 | clear_IO_APIC_pin(apic, pin); | ||
1592 | apic_printk(APIC_QUIET, KERN_ERR " .. failed\n"); | ||
1593 | return 0; | ||
1594 | } | ||
1595 | |||
1596 | /* The function from hell */ | ||
1597 | static void check_timer(void) | ||
1598 | { | 1602 | { |
1599 | int apic1, pin1, apic2, pin2; | 1603 | int apic1, pin1, apic2, pin2; |
1600 | int vector; | 1604 | int vector; |
@@ -1615,43 +1619,61 @@ static void check_timer(void) | |||
1615 | */ | 1619 | */ |
1616 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); | 1620 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
1617 | init_8259A(1); | 1621 | init_8259A(1); |
1622 | if (timer_over_8254 > 0) | ||
1623 | enable_8259A_irq(0); | ||
1618 | 1624 | ||
1619 | pin1 = find_isa_irq_pin(0, mp_INT); | 1625 | pin1 = find_isa_irq_pin(0, mp_INT); |
1620 | apic1 = find_isa_irq_apic(0, mp_INT); | 1626 | apic1 = find_isa_irq_apic(0, mp_INT); |
1621 | pin2 = ioapic_i8259.pin; | 1627 | pin2 = ioapic_i8259.pin; |
1622 | apic2 = ioapic_i8259.apic; | 1628 | apic2 = ioapic_i8259.apic; |
1623 | 1629 | ||
1624 | /* Do this first, otherwise we get double interrupts on ATI boards */ | 1630 | apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", |
1625 | if ((pin1 != -1) && try_apic_pin(apic1, pin1,"with 8259 IRQ0 disabled")) | 1631 | vector, apic1, pin1, apic2, pin2); |
1626 | return; | ||
1627 | 1632 | ||
1628 | /* Now try again with IRQ0 8259A enabled. | 1633 | if (pin1 != -1) { |
1629 | Assumes timer is on IO-APIC 0 ?!? */ | 1634 | /* |
1630 | enable_8259A_irq(0); | 1635 | * Ok, does IRQ0 through the IOAPIC work? |
1631 | unmask_IO_APIC_irq(0); | 1636 | */ |
1632 | if (try_apic_pin(apic1, pin1, "with 8259 IRQ0 enabled")) | 1637 | unmask_IO_APIC_irq(0); |
1633 | return; | 1638 | if (!no_timer_check && timer_irq_works()) { |
1634 | disable_8259A_irq(0); | 1639 | nmi_watchdog_default(); |
1635 | 1640 | if (nmi_watchdog == NMI_IO_APIC) { | |
1636 | /* Always try pin0 and pin2 on APIC 0 to handle buggy timer overrides | 1641 | disable_8259A_irq(0); |
1637 | on Nvidia boards */ | 1642 | setup_nmi(); |
1638 | if (!(apic1 == 0 && pin1 == 0) && | 1643 | enable_8259A_irq(0); |
1639 | try_apic_pin(0, 0, "fallback with 8259 IRQ0 disabled")) | 1644 | } |
1640 | return; | 1645 | if (disable_timer_pin_1 > 0) |
1641 | if (!(apic1 == 0 && pin1 == 2) && | 1646 | clear_IO_APIC_pin(0, pin1); |
1642 | try_apic_pin(0, 2, "fallback with 8259 IRQ0 disabled")) | 1647 | return; |
1643 | return; | 1648 | } |
1649 | clear_IO_APIC_pin(apic1, pin1); | ||
1650 | apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not " | ||
1651 | "connected to IO-APIC\n"); | ||
1652 | } | ||
1644 | 1653 | ||
1645 | /* Then try pure 8259A routing on the 8259 as reported by BIOS*/ | 1654 | apic_printk(APIC_VERBOSE,KERN_INFO "...trying to set up timer (IRQ0) " |
1646 | enable_8259A_irq(0); | 1655 | "through the 8259A ... "); |
1647 | if (pin2 != -1) { | 1656 | if (pin2 != -1) { |
1657 | apic_printk(APIC_VERBOSE,"\n..... (found apic %d pin %d) ...", | ||
1658 | apic2, pin2); | ||
1659 | /* | ||
1660 | * legacy devices should be connected to IO APIC #0 | ||
1661 | */ | ||
1648 | setup_ExtINT_IRQ0_pin(apic2, pin2, vector); | 1662 | setup_ExtINT_IRQ0_pin(apic2, pin2, vector); |
1649 | if (try_apic_pin(apic2,pin2,"8259A broadcast ExtINT from BIOS")) | 1663 | if (timer_irq_works()) { |
1664 | apic_printk(APIC_VERBOSE," works.\n"); | ||
1665 | nmi_watchdog_default(); | ||
1666 | if (nmi_watchdog == NMI_IO_APIC) { | ||
1667 | setup_nmi(); | ||
1668 | } | ||
1650 | return; | 1669 | return; |
1670 | } | ||
1671 | /* | ||
1672 | * Cleanup, just in case ... | ||
1673 | */ | ||
1674 | clear_IO_APIC_pin(apic2, pin2); | ||
1651 | } | 1675 | } |
1652 | 1676 | apic_printk(APIC_VERBOSE," failed.\n"); | |
1653 | /* Tried all possibilities to go through the IO-APIC. Now come the | ||
1654 | really cheesy fallbacks. */ | ||
1655 | 1677 | ||
1656 | if (nmi_watchdog == NMI_IO_APIC) { | 1678 | if (nmi_watchdog == NMI_IO_APIC) { |
1657 | printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); | 1679 | printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); |
diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c index e9b80e920266..ccfe6561be24 100644 --- a/drivers/mmc/mmci.c +++ b/drivers/mmc/mmci.c | |||
@@ -42,6 +42,8 @@ mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) | |||
42 | { | 42 | { |
43 | writel(0, host->base + MMCICOMMAND); | 43 | writel(0, host->base + MMCICOMMAND); |
44 | 44 | ||
45 | BUG_ON(host->data); | ||
46 | |||
45 | host->mrq = NULL; | 47 | host->mrq = NULL; |
46 | host->cmd = NULL; | 48 | host->cmd = NULL; |
47 | 49 | ||
@@ -198,6 +200,8 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, | |||
198 | } | 200 | } |
199 | 201 | ||
200 | if (!cmd->data || cmd->error != MMC_ERR_NONE) { | 202 | if (!cmd->data || cmd->error != MMC_ERR_NONE) { |
203 | if (host->data) | ||
204 | mmci_stop_data(host); | ||
201 | mmci_request_end(host, cmd->mrq); | 205 | mmci_request_end(host, cmd->mrq); |
202 | } else if (!(cmd->data->flags & MMC_DATA_READ)) { | 206 | } else if (!(cmd->data->flags & MMC_DATA_READ)) { |
203 | mmci_start_data(host, cmd->data); | 207 | mmci_start_data(host, cmd->data); |
diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h index 4bbd85f3ed2a..2e9469047eb1 100644 --- a/include/asm-arm/arch-iop32x/iop32x.h +++ b/include/asm-arm/arch-iop32x/iop32x.h | |||
@@ -19,7 +19,7 @@ | |||
19 | * Peripherals that are shared between the iop32x and iop33x but | 19 | * Peripherals that are shared between the iop32x and iop33x but |
20 | * located at different addresses. | 20 | * located at different addresses. |
21 | */ | 21 | */ |
22 | #define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg)) | 22 | #define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) |
23 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) | 23 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) |
24 | 24 | ||
25 | #include <asm/hardware/iop3xx.h> | 25 | #include <asm/hardware/iop3xx.h> |
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index d51049522cd0..5f531ea03059 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h | |||
@@ -357,6 +357,16 @@ extern void flush_dcache_page(struct page *); | |||
357 | 357 | ||
358 | extern void __flush_dcache_page(struct address_space *mapping, struct page *page); | 358 | extern void __flush_dcache_page(struct address_space *mapping, struct page *page); |
359 | 359 | ||
360 | #define ARCH_HAS_FLUSH_ANON_PAGE | ||
361 | static inline void flush_anon_page(struct vm_area_struct *vma, | ||
362 | struct page *page, unsigned long vmaddr) | ||
363 | { | ||
364 | extern void __flush_anon_page(struct vm_area_struct *vma, | ||
365 | struct page *, unsigned long); | ||
366 | if (PageAnon(page)) | ||
367 | __flush_anon_page(vma, page, vmaddr); | ||
368 | } | ||
369 | |||
360 | #define flush_dcache_mmap_lock(mapping) \ | 370 | #define flush_dcache_mmap_lock(mapping) \ |
361 | write_lock_irq(&(mapping)->tree_lock) | 371 | write_lock_irq(&(mapping)->tree_lock) |
362 | #define flush_dcache_mmap_unlock(mapping) \ | 372 | #define flush_dcache_mmap_unlock(mapping) \ |
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index 1018a7486ab7..13ac8a4cd01f 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h | |||
@@ -168,9 +168,9 @@ extern void gpio_line_set(int line, int value); | |||
168 | #define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) | 168 | #define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) |
169 | 169 | ||
170 | /* General Purpose I/O */ | 170 | /* General Purpose I/O */ |
171 | #define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0004) | 171 | #define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000) |
172 | #define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0008) | 172 | #define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004) |
173 | #define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x000c) | 173 | #define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008) |
174 | 174 | ||
175 | /* Timers */ | 175 | /* Timers */ |
176 | #define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) | 176 | #define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) |
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h index aedb0512cb04..a799dd8ef395 100644 --- a/include/asm-parisc/cacheflush.h +++ b/include/asm-parisc/cacheflush.h | |||
@@ -186,7 +186,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long | |||
186 | } | 186 | } |
187 | 187 | ||
188 | static inline void | 188 | static inline void |
189 | flush_anon_page(struct page *page, unsigned long vmaddr) | 189 | flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) |
190 | { | 190 | { |
191 | if (PageAnon(page)) | 191 | if (PageAnon(page)) |
192 | flush_user_dcache_page(vmaddr); | 192 | flush_user_dcache_page(vmaddr); |
diff --git a/include/linux/highmem.h b/include/linux/highmem.h index ca9a602cffd7..645d440807c2 100644 --- a/include/linux/highmem.h +++ b/include/linux/highmem.h | |||
@@ -8,7 +8,7 @@ | |||
8 | #include <asm/cacheflush.h> | 8 | #include <asm/cacheflush.h> |
9 | 9 | ||
10 | #ifndef ARCH_HAS_FLUSH_ANON_PAGE | 10 | #ifndef ARCH_HAS_FLUSH_ANON_PAGE |
11 | static inline void flush_anon_page(struct page *page, unsigned long vmaddr) | 11 | static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) |
12 | { | 12 | { |
13 | } | 13 | } |
14 | #endif | 14 | #endif |
diff --git a/mm/memory.c b/mm/memory.c index 563792f4f687..af227d26e104 100644 --- a/mm/memory.c +++ b/mm/memory.c | |||
@@ -1091,7 +1091,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, | |||
1091 | if (pages) { | 1091 | if (pages) { |
1092 | pages[i] = page; | 1092 | pages[i] = page; |
1093 | 1093 | ||
1094 | flush_anon_page(page, start); | 1094 | flush_anon_page(vma, page, start); |
1095 | flush_dcache_page(page); | 1095 | flush_dcache_page(page); |
1096 | } | 1096 | } |
1097 | if (vmas) | 1097 | if (vmas) |