diff options
-rw-r--r-- | arch/x86/xen/mmu.h | 12 | ||||
-rw-r--r-- | include/asm-x86/xen/interface.h | 139 | ||||
-rw-r--r-- | include/asm-x86/xen/interface_32.h | 97 | ||||
-rw-r--r-- | include/asm-x86/xen/interface_64.h | 159 | ||||
-rw-r--r-- | include/xen/interface/callback.h | 6 |
5 files changed, 308 insertions, 105 deletions
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h index 297bf9f5b8bc..7856e37f6044 100644 --- a/arch/x86/xen/mmu.h +++ b/arch/x86/xen/mmu.h | |||
@@ -10,18 +10,6 @@ enum pt_level { | |||
10 | PT_PTE | 10 | PT_PTE |
11 | }; | 11 | }; |
12 | 12 | ||
13 | /* | ||
14 | * Page-directory addresses above 4GB do not fit into architectural %cr3. | ||
15 | * When accessing %cr3, or equivalent field in vcpu_guest_context, guests | ||
16 | * must use the following accessor macros to pack/unpack valid MFNs. | ||
17 | * | ||
18 | * Note that Xen is using the fact that the pagetable base is always | ||
19 | * page-aligned, and putting the 12 MSB of the address into the 12 LSB | ||
20 | * of cr3. | ||
21 | */ | ||
22 | #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20)) | ||
23 | #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20)) | ||
24 | |||
25 | 13 | ||
26 | void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); | 14 | void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); |
27 | 15 | ||
diff --git a/include/asm-x86/xen/interface.h b/include/asm-x86/xen/interface.h index 6227000a1e84..9d810f2538a2 100644 --- a/include/asm-x86/xen/interface.h +++ b/include/asm-x86/xen/interface.h | |||
@@ -1,13 +1,13 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * arch-x86_32.h | 2 | * arch-x86_32.h |
3 | * | 3 | * |
4 | * Guest OS interface to x86 32-bit Xen. | 4 | * Guest OS interface to x86 Xen. |
5 | * | 5 | * |
6 | * Copyright (c) 2004, K A Fraser | 6 | * Copyright (c) 2004, K A Fraser |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef __XEN_PUBLIC_ARCH_X86_32_H__ | 9 | #ifndef __ASM_X86_XEN_INTERFACE_H |
10 | #define __XEN_PUBLIC_ARCH_X86_32_H__ | 10 | #define __ASM_X86_XEN_INTERFACE_H |
11 | 11 | ||
12 | #ifdef __XEN__ | 12 | #ifdef __XEN__ |
13 | #define __DEFINE_GUEST_HANDLE(name, type) \ | 13 | #define __DEFINE_GUEST_HANDLE(name, type) \ |
@@ -57,6 +57,17 @@ DEFINE_GUEST_HANDLE(long); | |||
57 | DEFINE_GUEST_HANDLE(void); | 57 | DEFINE_GUEST_HANDLE(void); |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | #ifndef HYPERVISOR_VIRT_START | ||
61 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
62 | #endif | ||
63 | |||
64 | #ifndef machine_to_phys_mapping | ||
65 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
66 | #endif | ||
67 | |||
68 | /* Maximum number of virtual CPUs in multi-processor guests. */ | ||
69 | #define MAX_VIRT_CPUS 32 | ||
70 | |||
60 | /* | 71 | /* |
61 | * SEGMENT DESCRIPTOR TABLES | 72 | * SEGMENT DESCRIPTOR TABLES |
62 | */ | 73 | */ |
@@ -71,58 +82,21 @@ DEFINE_GUEST_HANDLE(void); | |||
71 | #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) | 82 | #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) |
72 | 83 | ||
73 | /* | 84 | /* |
74 | * These flat segments are in the Xen-private section of every GDT. Since these | ||
75 | * are also present in the initial GDT, many OSes will be able to avoid | ||
76 | * installing their own GDT. | ||
77 | */ | ||
78 | #define FLAT_RING1_CS 0xe019 /* GDT index 259 */ | ||
79 | #define FLAT_RING1_DS 0xe021 /* GDT index 260 */ | ||
80 | #define FLAT_RING1_SS 0xe021 /* GDT index 260 */ | ||
81 | #define FLAT_RING3_CS 0xe02b /* GDT index 261 */ | ||
82 | #define FLAT_RING3_DS 0xe033 /* GDT index 262 */ | ||
83 | #define FLAT_RING3_SS 0xe033 /* GDT index 262 */ | ||
84 | |||
85 | #define FLAT_KERNEL_CS FLAT_RING1_CS | ||
86 | #define FLAT_KERNEL_DS FLAT_RING1_DS | ||
87 | #define FLAT_KERNEL_SS FLAT_RING1_SS | ||
88 | #define FLAT_USER_CS FLAT_RING3_CS | ||
89 | #define FLAT_USER_DS FLAT_RING3_DS | ||
90 | #define FLAT_USER_SS FLAT_RING3_SS | ||
91 | |||
92 | /* And the trap vector is... */ | ||
93 | #define TRAP_INSTR "int $0x82" | ||
94 | |||
95 | /* | ||
96 | * Virtual addresses beyond this are not modifiable by guest OSes. The | ||
97 | * machine->physical mapping table starts at this address, read-only. | ||
98 | */ | ||
99 | #ifdef CONFIG_X86_PAE | ||
100 | #define __HYPERVISOR_VIRT_START 0xF5800000 | ||
101 | #else | ||
102 | #define __HYPERVISOR_VIRT_START 0xFC000000 | ||
103 | #endif | ||
104 | |||
105 | #ifndef HYPERVISOR_VIRT_START | ||
106 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
107 | #endif | ||
108 | |||
109 | #ifndef machine_to_phys_mapping | ||
110 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
111 | #endif | ||
112 | |||
113 | /* Maximum number of virtual CPUs in multi-processor guests. */ | ||
114 | #define MAX_VIRT_CPUS 32 | ||
115 | |||
116 | #ifndef __ASSEMBLY__ | ||
117 | |||
118 | /* | ||
119 | * Send an array of these to HYPERVISOR_set_trap_table() | 85 | * Send an array of these to HYPERVISOR_set_trap_table() |
86 | * The privilege level specifies which modes may enter a trap via a software | ||
87 | * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate | ||
88 | * privilege levels as follows: | ||
89 | * Level == 0: Noone may enter | ||
90 | * Level == 1: Kernel may enter | ||
91 | * Level == 2: Kernel may enter | ||
92 | * Level == 3: Everyone may enter | ||
120 | */ | 93 | */ |
121 | #define TI_GET_DPL(_ti) ((_ti)->flags & 3) | 94 | #define TI_GET_DPL(_ti) ((_ti)->flags & 3) |
122 | #define TI_GET_IF(_ti) ((_ti)->flags & 4) | 95 | #define TI_GET_IF(_ti) ((_ti)->flags & 4) |
123 | #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) | 96 | #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) |
124 | #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) | 97 | #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) |
125 | 98 | ||
99 | #ifndef __ASSEMBLY__ | ||
126 | struct trap_info { | 100 | struct trap_info { |
127 | uint8_t vector; /* exception vector */ | 101 | uint8_t vector; /* exception vector */ |
128 | uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ | 102 | uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ |
@@ -131,32 +105,21 @@ struct trap_info { | |||
131 | }; | 105 | }; |
132 | DEFINE_GUEST_HANDLE_STRUCT(trap_info); | 106 | DEFINE_GUEST_HANDLE_STRUCT(trap_info); |
133 | 107 | ||
134 | struct cpu_user_regs { | 108 | struct arch_shared_info { |
135 | uint32_t ebx; | 109 | unsigned long max_pfn; /* max pfn that appears in table */ |
136 | uint32_t ecx; | 110 | /* Frame containing list of mfns containing list of mfns containing p2m. */ |
137 | uint32_t edx; | 111 | unsigned long pfn_to_mfn_frame_list_list; |
138 | uint32_t esi; | 112 | unsigned long nmi_reason; |
139 | uint32_t edi; | ||
140 | uint32_t ebp; | ||
141 | uint32_t eax; | ||
142 | uint16_t error_code; /* private */ | ||
143 | uint16_t entry_vector; /* private */ | ||
144 | uint32_t eip; | ||
145 | uint16_t cs; | ||
146 | uint8_t saved_upcall_mask; | ||
147 | uint8_t _pad0; | ||
148 | uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ | ||
149 | uint32_t esp; | ||
150 | uint16_t ss, _pad1; | ||
151 | uint16_t es, _pad2; | ||
152 | uint16_t ds, _pad3; | ||
153 | uint16_t fs, _pad4; | ||
154 | uint16_t gs, _pad5; | ||
155 | }; | 113 | }; |
156 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | 114 | #endif /* !__ASSEMBLY__ */ |
157 | 115 | ||
158 | typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ | 116 | #ifdef CONFIG_X86_32 |
117 | #include "interface_32.h" | ||
118 | #else | ||
119 | #include "interface_64.h" | ||
120 | #endif | ||
159 | 121 | ||
122 | #ifndef __ASSEMBLY__ | ||
160 | /* | 123 | /* |
161 | * The following is all CPU context. Note that the fpu_ctxt block is filled | 124 | * The following is all CPU context. Note that the fpu_ctxt block is filled |
162 | * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. | 125 | * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. |
@@ -173,33 +136,29 @@ struct vcpu_guest_context { | |||
173 | unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ | 136 | unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ |
174 | unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ | 137 | unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ |
175 | unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ | 138 | unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ |
139 | /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */ | ||
176 | unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ | 140 | unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ |
177 | unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ | 141 | unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ |
142 | #ifdef __i386__ | ||
178 | unsigned long event_callback_cs; /* CS:EIP of event callback */ | 143 | unsigned long event_callback_cs; /* CS:EIP of event callback */ |
179 | unsigned long event_callback_eip; | 144 | unsigned long event_callback_eip; |
180 | unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ | 145 | unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ |
181 | unsigned long failsafe_callback_eip; | 146 | unsigned long failsafe_callback_eip; |
147 | #else | ||
148 | unsigned long event_callback_eip; | ||
149 | unsigned long failsafe_callback_eip; | ||
150 | unsigned long syscall_callback_eip; | ||
151 | #endif | ||
182 | unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ | 152 | unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ |
153 | #ifdef __x86_64__ | ||
154 | /* Segment base addresses. */ | ||
155 | uint64_t fs_base; | ||
156 | uint64_t gs_base_kernel; | ||
157 | uint64_t gs_base_user; | ||
158 | #endif | ||
183 | }; | 159 | }; |
184 | DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); | 160 | DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); |
185 | 161 | #endif /* !__ASSEMBLY__ */ | |
186 | struct arch_shared_info { | ||
187 | unsigned long max_pfn; /* max pfn that appears in table */ | ||
188 | /* Frame containing list of mfns containing list of mfns containing p2m. */ | ||
189 | unsigned long pfn_to_mfn_frame_list_list; | ||
190 | unsigned long nmi_reason; | ||
191 | }; | ||
192 | |||
193 | struct arch_vcpu_info { | ||
194 | unsigned long cr2; | ||
195 | unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */ | ||
196 | }; | ||
197 | |||
198 | struct xen_callback { | ||
199 | unsigned long cs; | ||
200 | unsigned long eip; | ||
201 | }; | ||
202 | #endif /* !__ASSEMBLY__ */ | ||
203 | 162 | ||
204 | /* | 163 | /* |
205 | * Prefix forces emulation of some non-trapping instructions. | 164 | * Prefix forces emulation of some non-trapping instructions. |
@@ -213,4 +172,4 @@ struct xen_callback { | |||
213 | #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" | 172 | #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" |
214 | #endif | 173 | #endif |
215 | 174 | ||
216 | #endif | 175 | #endif /* __ASM_X86_XEN_INTERFACE_H */ |
diff --git a/include/asm-x86/xen/interface_32.h b/include/asm-x86/xen/interface_32.h new file mode 100644 index 000000000000..d8ac41d5db86 --- /dev/null +++ b/include/asm-x86/xen/interface_32.h | |||
@@ -0,0 +1,97 @@ | |||
1 | /****************************************************************************** | ||
2 | * arch-x86_32.h | ||
3 | * | ||
4 | * Guest OS interface to x86 32-bit Xen. | ||
5 | * | ||
6 | * Copyright (c) 2004, K A Fraser | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_X86_XEN_INTERFACE_32_H | ||
10 | #define __ASM_X86_XEN_INTERFACE_32_H | ||
11 | |||
12 | |||
13 | /* | ||
14 | * These flat segments are in the Xen-private section of every GDT. Since these | ||
15 | * are also present in the initial GDT, many OSes will be able to avoid | ||
16 | * installing their own GDT. | ||
17 | */ | ||
18 | #define FLAT_RING1_CS 0xe019 /* GDT index 259 */ | ||
19 | #define FLAT_RING1_DS 0xe021 /* GDT index 260 */ | ||
20 | #define FLAT_RING1_SS 0xe021 /* GDT index 260 */ | ||
21 | #define FLAT_RING3_CS 0xe02b /* GDT index 261 */ | ||
22 | #define FLAT_RING3_DS 0xe033 /* GDT index 262 */ | ||
23 | #define FLAT_RING3_SS 0xe033 /* GDT index 262 */ | ||
24 | |||
25 | #define FLAT_KERNEL_CS FLAT_RING1_CS | ||
26 | #define FLAT_KERNEL_DS FLAT_RING1_DS | ||
27 | #define FLAT_KERNEL_SS FLAT_RING1_SS | ||
28 | #define FLAT_USER_CS FLAT_RING3_CS | ||
29 | #define FLAT_USER_DS FLAT_RING3_DS | ||
30 | #define FLAT_USER_SS FLAT_RING3_SS | ||
31 | |||
32 | /* And the trap vector is... */ | ||
33 | #define TRAP_INSTR "int $0x82" | ||
34 | |||
35 | /* | ||
36 | * Virtual addresses beyond this are not modifiable by guest OSes. The | ||
37 | * machine->physical mapping table starts at this address, read-only. | ||
38 | */ | ||
39 | #define __HYPERVISOR_VIRT_START 0xF5800000 | ||
40 | |||
41 | #ifndef __ASSEMBLY__ | ||
42 | |||
43 | struct cpu_user_regs { | ||
44 | uint32_t ebx; | ||
45 | uint32_t ecx; | ||
46 | uint32_t edx; | ||
47 | uint32_t esi; | ||
48 | uint32_t edi; | ||
49 | uint32_t ebp; | ||
50 | uint32_t eax; | ||
51 | uint16_t error_code; /* private */ | ||
52 | uint16_t entry_vector; /* private */ | ||
53 | uint32_t eip; | ||
54 | uint16_t cs; | ||
55 | uint8_t saved_upcall_mask; | ||
56 | uint8_t _pad0; | ||
57 | uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ | ||
58 | uint32_t esp; | ||
59 | uint16_t ss, _pad1; | ||
60 | uint16_t es, _pad2; | ||
61 | uint16_t ds, _pad3; | ||
62 | uint16_t fs, _pad4; | ||
63 | uint16_t gs, _pad5; | ||
64 | }; | ||
65 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | ||
66 | |||
67 | typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ | ||
68 | |||
69 | struct arch_vcpu_info { | ||
70 | unsigned long cr2; | ||
71 | unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */ | ||
72 | }; | ||
73 | |||
74 | struct xen_callback { | ||
75 | unsigned long cs; | ||
76 | unsigned long eip; | ||
77 | }; | ||
78 | typedef struct xen_callback xen_callback_t; | ||
79 | |||
80 | #define XEN_CALLBACK(__cs, __eip) \ | ||
81 | ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) }) | ||
82 | #endif /* !__ASSEMBLY__ */ | ||
83 | |||
84 | |||
85 | /* | ||
86 | * Page-directory addresses above 4GB do not fit into architectural %cr3. | ||
87 | * When accessing %cr3, or equivalent field in vcpu_guest_context, guests | ||
88 | * must use the following accessor macros to pack/unpack valid MFNs. | ||
89 | * | ||
90 | * Note that Xen is using the fact that the pagetable base is always | ||
91 | * page-aligned, and putting the 12 MSB of the address into the 12 LSB | ||
92 | * of cr3. | ||
93 | */ | ||
94 | #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20)) | ||
95 | #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20)) | ||
96 | |||
97 | #endif /* __ASM_X86_XEN_INTERFACE_32_H */ | ||
diff --git a/include/asm-x86/xen/interface_64.h b/include/asm-x86/xen/interface_64.h new file mode 100644 index 000000000000..842266ce96e6 --- /dev/null +++ b/include/asm-x86/xen/interface_64.h | |||
@@ -0,0 +1,159 @@ | |||
1 | #ifndef __ASM_X86_XEN_INTERFACE_64_H | ||
2 | #define __ASM_X86_XEN_INTERFACE_64_H | ||
3 | |||
4 | /* | ||
5 | * 64-bit segment selectors | ||
6 | * These flat segments are in the Xen-private section of every GDT. Since these | ||
7 | * are also present in the initial GDT, many OSes will be able to avoid | ||
8 | * installing their own GDT. | ||
9 | */ | ||
10 | |||
11 | #define FLAT_RING3_CS32 0xe023 /* GDT index 260 */ | ||
12 | #define FLAT_RING3_CS64 0xe033 /* GDT index 261 */ | ||
13 | #define FLAT_RING3_DS32 0xe02b /* GDT index 262 */ | ||
14 | #define FLAT_RING3_DS64 0x0000 /* NULL selector */ | ||
15 | #define FLAT_RING3_SS32 0xe02b /* GDT index 262 */ | ||
16 | #define FLAT_RING3_SS64 0xe02b /* GDT index 262 */ | ||
17 | |||
18 | #define FLAT_KERNEL_DS64 FLAT_RING3_DS64 | ||
19 | #define FLAT_KERNEL_DS32 FLAT_RING3_DS32 | ||
20 | #define FLAT_KERNEL_DS FLAT_KERNEL_DS64 | ||
21 | #define FLAT_KERNEL_CS64 FLAT_RING3_CS64 | ||
22 | #define FLAT_KERNEL_CS32 FLAT_RING3_CS32 | ||
23 | #define FLAT_KERNEL_CS FLAT_KERNEL_CS64 | ||
24 | #define FLAT_KERNEL_SS64 FLAT_RING3_SS64 | ||
25 | #define FLAT_KERNEL_SS32 FLAT_RING3_SS32 | ||
26 | #define FLAT_KERNEL_SS FLAT_KERNEL_SS64 | ||
27 | |||
28 | #define FLAT_USER_DS64 FLAT_RING3_DS64 | ||
29 | #define FLAT_USER_DS32 FLAT_RING3_DS32 | ||
30 | #define FLAT_USER_DS FLAT_USER_DS64 | ||
31 | #define FLAT_USER_CS64 FLAT_RING3_CS64 | ||
32 | #define FLAT_USER_CS32 FLAT_RING3_CS32 | ||
33 | #define FLAT_USER_CS FLAT_USER_CS64 | ||
34 | #define FLAT_USER_SS64 FLAT_RING3_SS64 | ||
35 | #define FLAT_USER_SS32 FLAT_RING3_SS32 | ||
36 | #define FLAT_USER_SS FLAT_USER_SS64 | ||
37 | |||
38 | #define __HYPERVISOR_VIRT_START 0xFFFF800000000000 | ||
39 | #define __HYPERVISOR_VIRT_END 0xFFFF880000000000 | ||
40 | #define __MACH2PHYS_VIRT_START 0xFFFF800000000000 | ||
41 | #define __MACH2PHYS_VIRT_END 0xFFFF804000000000 | ||
42 | |||
43 | #ifndef HYPERVISOR_VIRT_START | ||
44 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
45 | #define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END) | ||
46 | #endif | ||
47 | |||
48 | #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) | ||
49 | #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) | ||
50 | #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3) | ||
51 | #ifndef machine_to_phys_mapping | ||
52 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
53 | #endif | ||
54 | |||
55 | /* | ||
56 | * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) | ||
57 | * @which == SEGBASE_* ; @base == 64-bit base address | ||
58 | * Returns 0 on success. | ||
59 | */ | ||
60 | #define SEGBASE_FS 0 | ||
61 | #define SEGBASE_GS_USER 1 | ||
62 | #define SEGBASE_GS_KERNEL 2 | ||
63 | #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */ | ||
64 | |||
65 | /* | ||
66 | * int HYPERVISOR_iret(void) | ||
67 | * All arguments are on the kernel stack, in the following format. | ||
68 | * Never returns if successful. Current kernel context is lost. | ||
69 | * The saved CS is mapped as follows: | ||
70 | * RING0 -> RING3 kernel mode. | ||
71 | * RING1 -> RING3 kernel mode. | ||
72 | * RING2 -> RING3 kernel mode. | ||
73 | * RING3 -> RING3 user mode. | ||
74 | * However RING0 indicates that the guest kernel should return to iteself | ||
75 | * directly with | ||
76 | * orb $3,1*8(%rsp) | ||
77 | * iretq | ||
78 | * If flags contains VGCF_in_syscall: | ||
79 | * Restore RAX, RIP, RFLAGS, RSP. | ||
80 | * Discard R11, RCX, CS, SS. | ||
81 | * Otherwise: | ||
82 | * Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP. | ||
83 | * All other registers are saved on hypercall entry and restored to user. | ||
84 | */ | ||
85 | /* Guest exited in SYSCALL context? Return to guest with SYSRET? */ | ||
86 | #define _VGCF_in_syscall 8 | ||
87 | #define VGCF_in_syscall (1<<_VGCF_in_syscall) | ||
88 | #define VGCF_IN_SYSCALL VGCF_in_syscall | ||
89 | |||
90 | #ifndef __ASSEMBLY__ | ||
91 | |||
92 | struct iret_context { | ||
93 | /* Top of stack (%rsp at point of hypercall). */ | ||
94 | uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss; | ||
95 | /* Bottom of iret stack frame. */ | ||
96 | }; | ||
97 | |||
98 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) | ||
99 | /* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */ | ||
100 | #define __DECL_REG(name) union { \ | ||
101 | uint64_t r ## name, e ## name; \ | ||
102 | uint32_t _e ## name; \ | ||
103 | } | ||
104 | #else | ||
105 | /* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */ | ||
106 | #define __DECL_REG(name) uint64_t r ## name | ||
107 | #endif | ||
108 | |||
109 | struct cpu_user_regs { | ||
110 | uint64_t r15; | ||
111 | uint64_t r14; | ||
112 | uint64_t r13; | ||
113 | uint64_t r12; | ||
114 | __DECL_REG(bp); | ||
115 | __DECL_REG(bx); | ||
116 | uint64_t r11; | ||
117 | uint64_t r10; | ||
118 | uint64_t r9; | ||
119 | uint64_t r8; | ||
120 | __DECL_REG(ax); | ||
121 | __DECL_REG(cx); | ||
122 | __DECL_REG(dx); | ||
123 | __DECL_REG(si); | ||
124 | __DECL_REG(di); | ||
125 | uint32_t error_code; /* private */ | ||
126 | uint32_t entry_vector; /* private */ | ||
127 | __DECL_REG(ip); | ||
128 | uint16_t cs, _pad0[1]; | ||
129 | uint8_t saved_upcall_mask; | ||
130 | uint8_t _pad1[3]; | ||
131 | __DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */ | ||
132 | __DECL_REG(sp); | ||
133 | uint16_t ss, _pad2[3]; | ||
134 | uint16_t es, _pad3[3]; | ||
135 | uint16_t ds, _pad4[3]; | ||
136 | uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */ | ||
137 | uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */ | ||
138 | }; | ||
139 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | ||
140 | |||
141 | #undef __DECL_REG | ||
142 | |||
143 | #define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12) | ||
144 | #define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12) | ||
145 | |||
146 | struct arch_vcpu_info { | ||
147 | unsigned long cr2; | ||
148 | unsigned long pad; /* sizeof(vcpu_info_t) == 64 */ | ||
149 | }; | ||
150 | |||
151 | typedef unsigned long xen_callback_t; | ||
152 | |||
153 | #define XEN_CALLBACK(__cs, __rip) \ | ||
154 | ((unsigned long)(__rip)) | ||
155 | |||
156 | #endif /* !__ASSEMBLY__ */ | ||
157 | |||
158 | |||
159 | #endif /* __ASM_X86_XEN_INTERFACE_64_H */ | ||
diff --git a/include/xen/interface/callback.h b/include/xen/interface/callback.h index 4aadcba31af9..2ae3cd243264 100644 --- a/include/xen/interface/callback.h +++ b/include/xen/interface/callback.h | |||
@@ -82,9 +82,9 @@ | |||
82 | */ | 82 | */ |
83 | #define CALLBACKOP_register 0 | 83 | #define CALLBACKOP_register 0 |
84 | struct callback_register { | 84 | struct callback_register { |
85 | uint16_t type; | 85 | uint16_t type; |
86 | uint16_t flags; | 86 | uint16_t flags; |
87 | struct xen_callback address; | 87 | xen_callback_t address; |
88 | }; | 88 | }; |
89 | 89 | ||
90 | /* | 90 | /* |