diff options
-rw-r--r-- | drivers/net/tg3.c | 30 | ||||
-rw-r--r-- | drivers/net/tg3.h | 3 |
2 files changed, 21 insertions, 12 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 72db78b1ec3b..8e76092a171e 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -1106,8 +1106,7 @@ static int tg3_phy_reset(struct tg3 *tp) | |||
1106 | if (err) | 1106 | if (err) |
1107 | return err; | 1107 | return err; |
1108 | 1108 | ||
1109 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || | 1109 | if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) { |
1110 | tp->pci_chip_rev_id == CHIPREV_ID_5761_A0) { | ||
1111 | u32 val; | 1110 | u32 val; |
1112 | 1111 | ||
1113 | val = tr32(TG3_CPMU_LSPD_1000MB_CLK); | 1112 | val = tr32(TG3_CPMU_LSPD_1000MB_CLK); |
@@ -1352,8 +1351,7 @@ static void tg3_power_down_phy(struct tg3 *tp) | |||
1352 | (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) | 1351 | (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) |
1353 | return; | 1352 | return; |
1354 | 1353 | ||
1355 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || | 1354 | if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) { |
1356 | tp->pci_chip_rev_id == CHIPREV_ID_5761_A0) { | ||
1357 | val = tr32(TG3_CPMU_LSPD_1000MB_CLK); | 1355 | val = tr32(TG3_CPMU_LSPD_1000MB_CLK); |
1358 | val &= ~CPMU_LSPD_1000MB_MACCLK_MASK; | 1356 | val &= ~CPMU_LSPD_1000MB_MACCLK_MASK; |
1359 | val |= CPMU_LSPD_1000MB_MACCLK_12_5; | 1357 | val |= CPMU_LSPD_1000MB_MACCLK_12_5; |
@@ -3154,7 +3152,8 @@ static int tg3_setup_phy(struct tg3 *tp, int force_reset) | |||
3154 | err = tg3_setup_copper_phy(tp, force_reset); | 3152 | err = tg3_setup_copper_phy(tp, force_reset); |
3155 | } | 3153 | } |
3156 | 3154 | ||
3157 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0) { | 3155 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || |
3156 | tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) { | ||
3158 | u32 val, scale; | 3157 | u32 val, scale; |
3159 | 3158 | ||
3160 | val = tr32(TG3_CPMU_CLCK_STAT) & CPMU_CLCK_STAT_MAC_CLCK_MASK; | 3159 | val = tr32(TG3_CPMU_CLCK_STAT) & CPMU_CLCK_STAT_MAC_CLCK_MASK; |
@@ -6390,7 +6389,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6390 | 6389 | ||
6391 | tg3_write_sig_legacy(tp, RESET_KIND_INIT); | 6390 | tg3_write_sig_legacy(tp, RESET_KIND_INIT); |
6392 | 6391 | ||
6393 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0) { | 6392 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || |
6393 | tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) { | ||
6394 | val = tr32(TG3_CPMU_CTRL); | 6394 | val = tr32(TG3_CPMU_CTRL); |
6395 | val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE); | 6395 | val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE); |
6396 | tw32(TG3_CPMU_CTRL, val); | 6396 | tw32(TG3_CPMU_CTRL, val); |
@@ -9379,8 +9379,7 @@ static int tg3_test_loopback(struct tg3 *tp) | |||
9379 | if (err) | 9379 | if (err) |
9380 | return TG3_LOOPBACK_FAILED; | 9380 | return TG3_LOOPBACK_FAILED; |
9381 | 9381 | ||
9382 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || | 9382 | if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) { |
9383 | tp->pci_chip_rev_id == CHIPREV_ID_5761_A0) { | ||
9384 | int i; | 9383 | int i; |
9385 | u32 status; | 9384 | u32 status; |
9386 | 9385 | ||
@@ -9407,8 +9406,7 @@ static int tg3_test_loopback(struct tg3 *tp) | |||
9407 | if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK)) | 9406 | if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK)) |
9408 | err |= TG3_MAC_LOOPBACK_FAILED; | 9407 | err |= TG3_MAC_LOOPBACK_FAILED; |
9409 | 9408 | ||
9410 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || | 9409 | if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) { |
9411 | tp->pci_chip_rev_id == CHIPREV_ID_5761_A0) { | ||
9412 | tw32(TG3_CPMU_CTRL, cpmuctrl); | 9410 | tw32(TG3_CPMU_CTRL, cpmuctrl); |
9413 | 9411 | ||
9414 | /* Release the mutex */ | 9412 | /* Release the mutex */ |
@@ -10629,7 +10627,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
10629 | tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL) | 10627 | tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL) |
10630 | tp->led_ctrl = LED_CTRL_MODE_PHY_2; | 10628 | tp->led_ctrl = LED_CTRL_MODE_PHY_2; |
10631 | 10629 | ||
10632 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0) | 10630 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || |
10631 | tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) | ||
10633 | tp->led_ctrl = LED_CTRL_MODE_MAC; | 10632 | tp->led_ctrl = LED_CTRL_MODE_MAC; |
10634 | 10633 | ||
10635 | if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) { | 10634 | if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) { |
@@ -11401,9 +11400,16 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
11401 | } | 11400 | } |
11402 | 11401 | ||
11403 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || | 11402 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || |
11404 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) | 11403 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) { |
11405 | tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; | 11404 | tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; |
11406 | 11405 | ||
11406 | if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || | ||
11407 | tp->pci_chip_rev_id == CHIPREV_ID_5784_A1 || | ||
11408 | tp->pci_chip_rev_id == CHIPREV_ID_5761_A0 || | ||
11409 | tp->pci_chip_rev_id == CHIPREV_ID_5761_A1) | ||
11410 | tp->tg3_flags3 |= TG3_FLG3_5761_5784_AX_FIXES; | ||
11411 | } | ||
11412 | |||
11407 | /* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). | 11413 | /* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). |
11408 | * GPIO1 driven high will bring 5700's external PHY out of reset. | 11414 | * GPIO1 driven high will bring 5700's external PHY out of reset. |
11409 | * It is also used as eeprom write protect on LOMs. | 11415 | * It is also used as eeprom write protect on LOMs. |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index d325ab59b391..da18fb220712 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -109,7 +109,9 @@ | |||
109 | #define CHIPREV_ID_5714_A2 0x9002 | 109 | #define CHIPREV_ID_5714_A2 0x9002 |
110 | #define CHIPREV_ID_5906_A1 0xc001 | 110 | #define CHIPREV_ID_5906_A1 0xc001 |
111 | #define CHIPREV_ID_5784_A0 0x5784000 | 111 | #define CHIPREV_ID_5784_A0 0x5784000 |
112 | #define CHIPREV_ID_5784_A1 0x5784001 | ||
112 | #define CHIPREV_ID_5761_A0 0x5761000 | 113 | #define CHIPREV_ID_5761_A0 0x5761000 |
114 | #define CHIPREV_ID_5761_A1 0x5761001 | ||
113 | #define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) | 115 | #define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) |
114 | #define ASIC_REV_5700 0x07 | 116 | #define ASIC_REV_5700 0x07 |
115 | #define ASIC_REV_5701 0x00 | 117 | #define ASIC_REV_5701 0x00 |
@@ -2391,6 +2393,7 @@ struct tg3 { | |||
2391 | u32 tg3_flags3; | 2393 | u32 tg3_flags3; |
2392 | #define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001 | 2394 | #define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001 |
2393 | #define TG3_FLG3_ENABLE_APE 0x00000002 | 2395 | #define TG3_FLG3_ENABLE_APE 0x00000002 |
2396 | #define TG3_FLG3_5761_5784_AX_FIXES 0x00000004 | ||
2394 | 2397 | ||
2395 | struct timer_list timer; | 2398 | struct timer_list timer; |
2396 | u16 timer_counter; | 2399 | u16 timer_counter; |