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-rw-r--r--arch/powerpc/mm/hash_utils_64.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 2ce9491b48d4..bc7b0cedae5e 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -609,7 +609,7 @@ static void demote_segment_4k(struct mm_struct *mm, unsigned long addr)
609 mm->context.sllp = SLB_VSID_USER | mmu_psize_defs[MMU_PAGE_4K].sllp; 609 mm->context.sllp = SLB_VSID_USER | mmu_psize_defs[MMU_PAGE_4K].sllp;
610#endif /* CONFIG_PPC_MM_SLICES */ 610#endif /* CONFIG_PPC_MM_SLICES */
611 611
612#ifdef CONFIG_SPE_BASE 612#ifdef CONFIG_SPU_BASE
613 spu_flush_all_slbs(mm); 613 spu_flush_all_slbs(mm);
614#endif 614#endif
615} 615}
@@ -744,7 +744,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
744 "to 4kB pages because of " 744 "to 4kB pages because of "
745 "non-cacheable mapping\n"); 745 "non-cacheable mapping\n");
746 psize = mmu_vmalloc_psize = MMU_PAGE_4K; 746 psize = mmu_vmalloc_psize = MMU_PAGE_4K;
747#ifdef CONFIG_SPE_BASE 747#ifdef CONFIG_SPU_BASE
748 spu_flush_all_slbs(mm); 748 spu_flush_all_slbs(mm);
749#endif 749#endif
750 } 750 }