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-rw-r--r--arch/sh/Kconfig3
-rw-r--r--arch/sh/boards/Kconfig4
-rw-r--r--arch/sh/boards/board-ap325rxa.c100
-rw-r--r--arch/sh/boards/board-magicpanelr2.c11
-rw-r--r--arch/sh/boards/board-rsk7203.c11
-rw-r--r--arch/sh/boards/mach-migor/lcd_qvga.c6
-rw-r--r--arch/sh/boards/mach-migor/setup.c187
-rw-r--r--arch/sh/include/asm/gpio.h92
-rw-r--r--arch/sh/include/asm/sh7203.h143
-rw-r--r--arch/sh/include/asm/sh7720.h174
-rw-r--r--arch/sh/include/asm/sh7722.h210
-rw-r--r--arch/sh/include/asm/sh7723.h254
-rw-r--r--arch/sh/kernel/Makefile_322
-rw-r--r--arch/sh/kernel/Makefile_642
-rw-r--r--arch/sh/kernel/cpu/sh2a/Makefile5
-rw-r--r--arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c1599
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile4
-rw-r--r--arch/sh/kernel/cpu/sh3/pinmux-sh7720.c1242
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile5
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c1783
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c1909
-rw-r--r--arch/sh/kernel/gpio.c498
22 files changed, 8144 insertions, 100 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index dca54ccdf291..b4aa2a03e19b 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -59,6 +59,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
59config GENERIC_IRQ_PROBE 59config GENERIC_IRQ_PROBE
60 def_bool y 60 def_bool y
61 61
62config GENERIC_GPIO
63 def_bool n
64
62config GENERIC_CALIBRATE_DELAY 65config GENERIC_CALIBRATE_DELAY
63 bool 66 bool
64 67
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index c6b21e82755e..50467f9d0d0b 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -128,6 +128,7 @@ config SH_RTS7751R2D
128 128
129config SH_RSK7203 129config SH_RSK7203
130 bool "RSK7203" 130 bool "RSK7203"
131 select GENERIC_GPIO
131 depends on CPU_SUBTYPE_SH7203 132 depends on CPU_SUBTYPE_SH7203
132 133
133config SH_SDK7780 134config SH_SDK7780
@@ -162,6 +163,7 @@ config SH_SH7785LCR_29BIT_PHYSMAPS
162config SH_MIGOR 163config SH_MIGOR
163 bool "Migo-R" 164 bool "Migo-R"
164 depends on CPU_SUBTYPE_SH7722 165 depends on CPU_SUBTYPE_SH7722
166 select GENERIC_GPIO
165 help 167 help
166 Select Migo-R if configuring for the SH7722 Migo-R platform 168 Select Migo-R if configuring for the SH7722 Migo-R platform
167 by Renesas System Solutions Asia Pte. Ltd. 169 by Renesas System Solutions Asia Pte. Ltd.
@@ -169,6 +171,7 @@ config SH_MIGOR
169config SH_AP325RXA 171config SH_AP325RXA
170 bool "AP-325RXA" 172 bool "AP-325RXA"
171 depends on CPU_SUBTYPE_SH7723 173 depends on CPU_SUBTYPE_SH7723
174 select GENERIC_GPIO
172 help 175 help
173 Renesas "AP-325RXA" support. 176 Renesas "AP-325RXA" support.
174 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" 177 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
@@ -235,6 +238,7 @@ config SH_X3PROTO
235config SH_MAGIC_PANEL_R2 238config SH_MAGIC_PANEL_R2
236 bool "Magic Panel R2" 239 bool "Magic Panel R2"
237 depends on CPU_SUBTYPE_SH7720 240 depends on CPU_SUBTYPE_SH7720
241 select GENERIC_GPIO
238 help 242 help
239 Select Magic Panel R2 if configuring for Magic Panel R2. 243 Select Magic Panel R2 if configuring for Magic Panel R2.
240 244
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 6abaf46a9835..84fa8a04eac4 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -18,11 +18,13 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/smc911x.h> 20#include <linux/smc911x.h>
21#include <linux/gpio.h>
21#include <media/soc_camera_platform.h> 22#include <media/soc_camera_platform.h>
22#include <media/sh_mobile_ceu.h> 23#include <media/sh_mobile_ceu.h>
23#include <video/sh_mobile_lcdc.h> 24#include <video/sh_mobile_lcdc.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/clock.h> 26#include <asm/clock.h>
27#include <asm/sh7723.h>
26 28
27static struct smc911x_platdata smc911x_info = { 29static struct smc911x_platdata smc911x_info = {
28 .flags = SMC911X_USE_32BIT, 30 .flags = SMC911X_USE_32BIT,
@@ -109,17 +111,7 @@ static struct platform_device ap325rxa_nor_flash_device = {
109#define FPGA_LCDREG 0xB4100180 111#define FPGA_LCDREG 0xB4100180
110#define FPGA_BKLREG 0xB4100212 112#define FPGA_BKLREG 0xB4100212
111#define FPGA_LCDREG_VAL 0x0018 113#define FPGA_LCDREG_VAL 0x0018
112#define PORT_PHCR 0xA405010E
113#define PORT_PLCR 0xA4050114
114#define PORT_PMCR 0xA4050116
115#define PORT_PRCR 0xA405011C
116#define PORT_PSCR 0xA405011E
117#define PORT_PZCR 0xA405014C
118#define PORT_HIZCRA 0xA4050158
119#define PORT_MSELCRB 0xA4050182 114#define PORT_MSELCRB 0xA4050182
120#define PORT_PSDR 0xA405013E
121#define PORT_PZDR 0xA405016C
122#define PORT_PSELD 0xA4050154
123 115
124static void ap320_wvga_power_on(void *board_data) 116static void ap320_wvga_power_on(void *board_data)
125{ 117{
@@ -129,8 +121,7 @@ static void ap320_wvga_power_on(void *board_data)
129 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 121 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
130 122
131 /* backlight */ 123 /* backlight */
132 ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR); 124 gpio_set_value(GPIO_PTS3, 0);
133 ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
134 ctrl_outw(0x100, FPGA_BKLREG); 125 ctrl_outw(0x100, FPGA_BKLREG);
135} 126}
136 127
@@ -301,8 +292,77 @@ static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
301 292
302static int __init ap325rxa_devices_setup(void) 293static int __init ap325rxa_devices_setup(void)
303{ 294{
304 clk_always_enable("mstp200"); /* LCDC */ 295 /* LD3 and LD4 LEDs */
305 clk_always_enable("mstp203"); /* CEU */ 296 gpio_request(GPIO_PTX5, NULL); /* RUN */
297 gpio_direction_output(GPIO_PTX5, 1);
298 gpio_export(GPIO_PTX5, 0);
299
300 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
301 gpio_direction_output(GPIO_PTX4, 0);
302 gpio_export(GPIO_PTX4, 0);
303
304 /* SW1 input */
305 gpio_request(GPIO_PTF7, NULL); /* MODE */
306 gpio_direction_input(GPIO_PTF7);
307 gpio_export(GPIO_PTF7, 0);
308
309 /* LCDC */
310 clk_always_enable("mstp200");
311 gpio_request(GPIO_FN_LCDD15, NULL);
312 gpio_request(GPIO_FN_LCDD14, NULL);
313 gpio_request(GPIO_FN_LCDD13, NULL);
314 gpio_request(GPIO_FN_LCDD12, NULL);
315 gpio_request(GPIO_FN_LCDD11, NULL);
316 gpio_request(GPIO_FN_LCDD10, NULL);
317 gpio_request(GPIO_FN_LCDD9, NULL);
318 gpio_request(GPIO_FN_LCDD8, NULL);
319 gpio_request(GPIO_FN_LCDD7, NULL);
320 gpio_request(GPIO_FN_LCDD6, NULL);
321 gpio_request(GPIO_FN_LCDD5, NULL);
322 gpio_request(GPIO_FN_LCDD4, NULL);
323 gpio_request(GPIO_FN_LCDD3, NULL);
324 gpio_request(GPIO_FN_LCDD2, NULL);
325 gpio_request(GPIO_FN_LCDD1, NULL);
326 gpio_request(GPIO_FN_LCDD0, NULL);
327 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
328 gpio_request(GPIO_FN_LCDDCK, NULL);
329 gpio_request(GPIO_FN_LCDVEPWC, NULL);
330 gpio_request(GPIO_FN_LCDVCPWC, NULL);
331 gpio_request(GPIO_FN_LCDVSYN, NULL);
332 gpio_request(GPIO_FN_LCDHSYN, NULL);
333 gpio_request(GPIO_FN_LCDDISP, NULL);
334 gpio_request(GPIO_FN_LCDDON, NULL);
335
336 /* LCD backlight */
337 gpio_request(GPIO_PTS3, NULL);
338 gpio_direction_output(GPIO_PTS3, 1);
339
340 /* CEU */
341 clk_always_enable("mstp203");
342 gpio_request(GPIO_FN_VIO_CLK2, NULL);
343 gpio_request(GPIO_FN_VIO_VD2, NULL);
344 gpio_request(GPIO_FN_VIO_HD2, NULL);
345 gpio_request(GPIO_FN_VIO_FLD, NULL);
346 gpio_request(GPIO_FN_VIO_CKO, NULL);
347 gpio_request(GPIO_FN_VIO_D15, NULL);
348 gpio_request(GPIO_FN_VIO_D14, NULL);
349 gpio_request(GPIO_FN_VIO_D13, NULL);
350 gpio_request(GPIO_FN_VIO_D12, NULL);
351 gpio_request(GPIO_FN_VIO_D11, NULL);
352 gpio_request(GPIO_FN_VIO_D10, NULL);
353 gpio_request(GPIO_FN_VIO_D9, NULL);
354 gpio_request(GPIO_FN_VIO_D8, NULL);
355
356 gpio_request(GPIO_PTZ7, NULL);
357 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
358 gpio_request(GPIO_PTZ6, NULL);
359 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
360 gpio_request(GPIO_PTZ5, NULL);
361 gpio_direction_output(GPIO_PTZ5, 1); /* RST_CAM */
362 gpio_request(GPIO_PTZ4, NULL);
363 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
364
365 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
306 366
307 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 367 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
308 368
@@ -316,18 +376,6 @@ device_initcall(ap325rxa_devices_setup);
316 376
317static void __init ap325rxa_setup(char **cmdline_p) 377static void __init ap325rxa_setup(char **cmdline_p)
318{ 378{
319 /* LCDC configuration */
320 ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
321 ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
322 ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
323 ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
324 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
325
326 /* CEU */
327 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
328 ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
329 ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
330 ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
331} 379}
332 380
333static struct sh_machine_vector mv_ap325rxa __initmv = { 381static struct sh_machine_vector mv_ap325rxa __initmv = {
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index f3b8b07ea5d6..eb0e8e992c29 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -13,12 +13,14 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/gpio.h>
16#include <linux/mtd/mtd.h> 17#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h> 18#include <linux/mtd/partitions.h>
18#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
19#include <linux/mtd/map.h> 20#include <linux/mtd/map.h>
20#include <asm/magicpanelr2.h> 21#include <asm/magicpanelr2.h>
21#include <asm/heartbeat.h> 22#include <asm/heartbeat.h>
23#include <asm/sh7720.h>
22 24
23#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) 25#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL)
24 26
@@ -170,7 +172,14 @@ static void __init setup_port_multiplexing(void)
170 /* R7 A25; R6 A24; R5 A23; R4 A22; 172 /* R7 A25; R6 A24; R5 A23; R4 A22;
171 * R3 A21; R2 A20; R1 A19; R0 A0; 173 * R3 A21; R2 A20; R1 A19; R0 A0;
172 */ 174 */
173 ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */ 175 gpio_request(GPIO_FN_A25, NULL);
176 gpio_request(GPIO_FN_A24, NULL);
177 gpio_request(GPIO_FN_A23, NULL);
178 gpio_request(GPIO_FN_A22, NULL);
179 gpio_request(GPIO_FN_A21, NULL);
180 gpio_request(GPIO_FN_A20, NULL);
181 gpio_request(GPIO_FN_A19, NULL);
182 gpio_request(GPIO_FN_A0, NULL);
174 183
175 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); 184 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
176 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; 185 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
diff --git a/arch/sh/boards/board-rsk7203.c b/arch/sh/boards/board-rsk7203.c
index ffbedc59a973..ded799cf3eae 100644
--- a/arch/sh/boards/board-rsk7203.c
+++ b/arch/sh/boards/board-rsk7203.c
@@ -16,8 +16,10 @@
16#include <linux/mtd/physmap.h> 16#include <linux/mtd/physmap.h>
17#include <linux/mtd/map.h> 17#include <linux/mtd/map.h>
18#include <linux/smc911x.h> 18#include <linux/smc911x.h>
19#include <linux/gpio.h>
19#include <asm/machvec.h> 20#include <asm/machvec.h>
20#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sh7203.h>
21 23
22static struct smc911x_platdata smc911x_info = { 24static struct smc911x_platdata smc911x_info = {
23 .flags = SMC911X_USE_16BIT, 25 .flags = SMC911X_USE_16BIT,
@@ -122,6 +124,15 @@ static struct platform_device *rsk7203_devices[] __initdata = {
122 124
123static int __init rsk7203_devices_setup(void) 125static int __init rsk7203_devices_setup(void)
124{ 126{
127 /* Select pins for SCIF0 */
128 gpio_request(GPIO_FN_TXD0, NULL);
129 gpio_request(GPIO_FN_RXD0, NULL);
130
131 /* Lit LED0 */
132 gpio_request(GPIO_PE10, NULL);
133 gpio_direction_output(GPIO_PE10, 0);
134 gpio_export(GPIO_PE10, 0);
135
125 set_mtd_partitions(); 136 set_mtd_partitions();
126 return platform_add_devices(rsk7203_devices, 137 return platform_add_devices(rsk7203_devices,
127 ARRAY_SIZE(rsk7203_devices)); 138 ARRAY_SIZE(rsk7203_devices));
diff --git a/arch/sh/boards/mach-migor/lcd_qvga.c b/arch/sh/boards/mach-migor/lcd_qvga.c
index 735326c04497..c283cfc2a5c3 100644
--- a/arch/sh/boards/mach-migor/lcd_qvga.c
+++ b/arch/sh/boards/mach-migor/lcd_qvga.c
@@ -17,7 +17,9 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/gpio.h>
20#include <video/sh_mobile_lcdc.h> 21#include <video/sh_mobile_lcdc.h>
22#include <asm/sh7722.h>
21#include <asm/migor.h> 23#include <asm/migor.h>
22 24
23/* LCD Module is a PH240320T according to board schematics. This module 25/* LCD Module is a PH240320T according to board schematics. This module
@@ -30,9 +32,9 @@
30 32
31static void reset_lcd_module(void) 33static void reset_lcd_module(void)
32{ 34{
33 ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR); 35 gpio_set_value(GPIO_PTH2, 0);
34 mdelay(2); 36 mdelay(2);
35 ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR); 37 gpio_set_value(GPIO_PTH2, 1);
36 mdelay(1); 38 mdelay(1);
37} 39}
38 40
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index f27475d2fa0c..003ce837734d 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -17,6 +17,7 @@
17#include <linux/smc91x.h> 17#include <linux/smc91x.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/gpio.h>
20#include <media/soc_camera_platform.h> 21#include <media/soc_camera_platform.h>
21#include <media/sh_mobile_ceu.h> 22#include <media/sh_mobile_ceu.h>
22#include <video/sh_mobile_lcdc.h> 23#include <video/sh_mobile_lcdc.h>
@@ -25,6 +26,7 @@
25#include <asm/io.h> 26#include <asm/io.h>
26#include <asm/sh_keysc.h> 27#include <asm/sh_keysc.h>
27#include <asm/migor.h> 28#include <asm/migor.h>
29#include <asm/sh7722.h>
28 30
29/* Address IRQ Size Bus Description 31/* Address IRQ Size Bus Description
30 * 0x00000000 64MB 16 NOR Flash (SP29PL256N) 32 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
@@ -169,7 +171,7 @@ static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
169 171
170static int migor_nand_flash_ready(struct mtd_info *mtd) 172static int migor_nand_flash_ready(struct mtd_info *mtd)
171{ 173{
172 return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */ 174 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
173} 175}
174 176
175struct platform_nand_data migor_nand_flash_data = { 177struct platform_nand_data migor_nand_flash_data = {
@@ -286,22 +288,15 @@ static struct clk *camera_clk;
286 288
287static void camera_power_on(void) 289static void camera_power_on(void)
288{ 290{
289 unsigned char value;
290
291 camera_clk = clk_get(NULL, "video_clk"); 291 camera_clk = clk_get(NULL, "video_clk");
292 clk_set_rate(camera_clk, 24000000); 292 clk_set_rate(camera_clk, 24000000);
293 clk_enable(camera_clk); /* start VIO_CKO */ 293 clk_enable(camera_clk); /* start VIO_CKO */
294 294
295 /* use VIO_RST to take camera out of reset */
295 mdelay(10); 296 mdelay(10);
296 value = ctrl_inb(PORT_PTDR); 297 gpio_set_value(GPIO_PTT3, 0);
297 value &= ~0x09;
298#ifndef CONFIG_SH_MIGOR_RTA_WVGA
299 value |= 0x01;
300#endif
301 ctrl_outb(value, PORT_PTDR);
302 mdelay(10); 298 mdelay(10);
303 299 gpio_set_value(GPIO_PTT3, 1);
304 ctrl_outb(value | 8, PORT_PTDR);
305} 300}
306 301
307static void camera_power_off(void) 302static void camera_power_off(void)
@@ -309,7 +304,7 @@ static void camera_power_off(void)
309 clk_disable(camera_clk); /* stop VIO_CKO */ 304 clk_disable(camera_clk); /* stop VIO_CKO */
310 clk_put(camera_clk); 305 clk_put(camera_clk);
311 306
312 ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR); 307 gpio_set_value(GPIO_PTT3, 0);
313} 308}
314 309
315#ifdef CONFIG_I2C 310#ifdef CONFIG_I2C
@@ -458,75 +453,133 @@ static struct i2c_board_info migor_i2c_devices[] = {
458 453
459static int __init migor_devices_setup(void) 454static int __init migor_devices_setup(void)
460{ 455{
456 /* Lit D11 LED */
457 gpio_request(GPIO_PTJ7, NULL);
458 gpio_direction_output(GPIO_PTJ7, 1);
459 gpio_export(GPIO_PTJ7, 0);
460
461 /* Lit D12 LED */
462 gpio_request(GPIO_PTJ5, NULL);
463 gpio_direction_output(GPIO_PTJ5, 1);
464 gpio_export(GPIO_PTJ5, 0);
465
466 /* SMC91C111 */
467 gpio_request(GPIO_FN_IRQ0, NULL);
468
469 /* KEYSC */
461 clk_always_enable("mstp214"); /* KEYSC */ 470 clk_always_enable("mstp214"); /* KEYSC */
471 gpio_request(GPIO_FN_KEYOUT0, NULL);
472 gpio_request(GPIO_FN_KEYOUT1, NULL);
473 gpio_request(GPIO_FN_KEYOUT2, NULL);
474 gpio_request(GPIO_FN_KEYOUT3, NULL);
475 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
476 gpio_request(GPIO_FN_KEYIN1, NULL);
477 gpio_request(GPIO_FN_KEYIN2, NULL);
478 gpio_request(GPIO_FN_KEYIN3, NULL);
479 gpio_request(GPIO_FN_KEYIN4, NULL);
480 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
481
482 /* NAND Flash */
483 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
484 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
485 gpio_request(GPIO_PTA1, NULL);
486 gpio_direction_input(GPIO_PTA1);
487
488 /* Touch Panel */
489 gpio_request(GPIO_FN_IRQ6, NULL);
490
491 /* LCD Panel */
462 clk_always_enable("mstp200"); /* LCDC */ 492 clk_always_enable("mstp200"); /* LCDC */
493#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
494 gpio_request(GPIO_FN_LCDD17, NULL);
495 gpio_request(GPIO_FN_LCDD16, NULL);
496 gpio_request(GPIO_FN_LCDD15, NULL);
497 gpio_request(GPIO_FN_LCDD14, NULL);
498 gpio_request(GPIO_FN_LCDD13, NULL);
499 gpio_request(GPIO_FN_LCDD12, NULL);
500 gpio_request(GPIO_FN_LCDD11, NULL);
501 gpio_request(GPIO_FN_LCDD10, NULL);
502 gpio_request(GPIO_FN_LCDD8, NULL);
503 gpio_request(GPIO_FN_LCDD7, NULL);
504 gpio_request(GPIO_FN_LCDD6, NULL);
505 gpio_request(GPIO_FN_LCDD5, NULL);
506 gpio_request(GPIO_FN_LCDD4, NULL);
507 gpio_request(GPIO_FN_LCDD3, NULL);
508 gpio_request(GPIO_FN_LCDD2, NULL);
509 gpio_request(GPIO_FN_LCDD1, NULL);
510 gpio_request(GPIO_FN_LCDRS, NULL);
511 gpio_request(GPIO_FN_LCDCS, NULL);
512 gpio_request(GPIO_FN_LCDRD, NULL);
513 gpio_request(GPIO_FN_LCDWR, NULL);
514 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
515 gpio_direction_output(GPIO_PTH2, 1);
516#endif
517#ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
518 gpio_request(GPIO_FN_LCDD15, NULL);
519 gpio_request(GPIO_FN_LCDD14, NULL);
520 gpio_request(GPIO_FN_LCDD13, NULL);
521 gpio_request(GPIO_FN_LCDD12, NULL);
522 gpio_request(GPIO_FN_LCDD11, NULL);
523 gpio_request(GPIO_FN_LCDD10, NULL);
524 gpio_request(GPIO_FN_LCDD9, NULL);
525 gpio_request(GPIO_FN_LCDD8, NULL);
526 gpio_request(GPIO_FN_LCDD7, NULL);
527 gpio_request(GPIO_FN_LCDD6, NULL);
528 gpio_request(GPIO_FN_LCDD5, NULL);
529 gpio_request(GPIO_FN_LCDD4, NULL);
530 gpio_request(GPIO_FN_LCDD3, NULL);
531 gpio_request(GPIO_FN_LCDD2, NULL);
532 gpio_request(GPIO_FN_LCDD1, NULL);
533 gpio_request(GPIO_FN_LCDD0, NULL);
534 gpio_request(GPIO_FN_LCDLCLK, NULL);
535 gpio_request(GPIO_FN_LCDDCK, NULL);
536 gpio_request(GPIO_FN_LCDVEPWC, NULL);
537 gpio_request(GPIO_FN_LCDVCPWC, NULL);
538 gpio_request(GPIO_FN_LCDVSYN, NULL);
539 gpio_request(GPIO_FN_LCDHSYN, NULL);
540 gpio_request(GPIO_FN_LCDDISP, NULL);
541 gpio_request(GPIO_FN_LCDDON, NULL);
542#endif
543
544 /* CEU */
463 clk_always_enable("mstp203"); /* CEU */ 545 clk_always_enable("mstp203"); /* CEU */
546 gpio_request(GPIO_FN_VIO_CLK2, NULL);
547 gpio_request(GPIO_FN_VIO_VD2, NULL);
548 gpio_request(GPIO_FN_VIO_HD2, NULL);
549 gpio_request(GPIO_FN_VIO_FLD, NULL);
550 gpio_request(GPIO_FN_VIO_CKO, NULL);
551 gpio_request(GPIO_FN_VIO_D15, NULL);
552 gpio_request(GPIO_FN_VIO_D14, NULL);
553 gpio_request(GPIO_FN_VIO_D13, NULL);
554 gpio_request(GPIO_FN_VIO_D12, NULL);
555 gpio_request(GPIO_FN_VIO_D11, NULL);
556 gpio_request(GPIO_FN_VIO_D10, NULL);
557 gpio_request(GPIO_FN_VIO_D9, NULL);
558 gpio_request(GPIO_FN_VIO_D8, NULL);
559
560 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
561 gpio_direction_output(GPIO_PTT3, 0);
562 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
563 gpio_direction_output(GPIO_PTT2, 1);
564 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
565#ifdef CONFIG_SH_MIGOR_RTA_WVGA
566 gpio_direction_output(GPIO_PTT0, 0);
567#else
568 gpio_direction_output(GPIO_PTT0, 1);
569#endif
570 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
464 571
465 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 572 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
466 573
467 i2c_register_board_info(0, migor_i2c_devices, 574 i2c_register_board_info(0, migor_i2c_devices,
468 ARRAY_SIZE(migor_i2c_devices)); 575 ARRAY_SIZE(migor_i2c_devices));
469 576
470 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 577 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
471} 578}
472__initcall(migor_devices_setup); 579__initcall(migor_devices_setup);
473 580
474static void __init migor_setup(char **cmdline_p) 581static void __init migor_setup(char **cmdline_p)
475{ 582{
476 /* SMC91C111 - Enable IRQ0 */
477 ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);
478
479 /* KEYSC */
480 ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
481 ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
482 ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
483 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
484 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
485
486 /* NAND Flash */
487 ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
488 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
489 BSC_CS6ABCR);
490
491 /* Touch Panel - Enable IRQ6 */
492 ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
493 ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
494 ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
495
496#ifdef CONFIG_SH_MIGOR_RTA_WVGA
497 /* LCDC - WVGA - Enable RGB Interface signals */
498 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
499 ctrl_outw(0x0000, PORT_PHCR);
500 ctrl_outw(0x0000, PORT_PLCR);
501 ctrl_outw(0x0000, PORT_PMCR);
502 ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
503 ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD);
504 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
505 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
506#endif
507#ifdef CONFIG_SH_MIGOR_QVGA
508 /* LCDC - QVGA - Enable SYS Interface signals */
509 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
510 ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR);
511 ctrl_outw(0x0000, PORT_PLCR);
512 ctrl_outw(0x0000, PORT_PMCR);
513 ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
514 ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD);
515 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
516 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
517#endif
518
519 /* CEU */
520 ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR);
521 ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR);
522 ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR);
523 ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR);
524 ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC);
525 ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD);
526 ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE);
527 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB);
528 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA);
529 ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB);
530} 583}
531 584
532static struct sh_machine_vector mv_migor __initmv = { 585static struct sh_machine_vector mv_migor __initmv = {
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index cf32bd2df881..9650e7c9c39e 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -1,9 +1,9 @@
1/* 1/*
2 * include/asm-sh/gpio.h 2 * include/asm-sh/gpio.h
3 * 3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas 4 * Generic GPIO API and pinmux table support for SuperH.
5 * 5 *
6 * Addresses for the Pin Function Controller 6 * Copyright (c) 2008 Magnus Damm
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -16,4 +16,92 @@
16#include <cpu/gpio.h> 16#include <cpu/gpio.h>
17#endif 17#endif
18 18
19typedef unsigned short pinmux_enum_t;
20typedef unsigned char pinmux_flag_t;
21
22#define PINMUX_TYPE_NONE 0
23#define PINMUX_TYPE_FUNCTION 1
24#define PINMUX_TYPE_GPIO 2
25#define PINMUX_TYPE_OUTPUT 3
26#define PINMUX_TYPE_INPUT 4
27#define PINMUX_TYPE_INPUT_PULLUP 5
28#define PINMUX_TYPE_INPUT_PULLDOWN 6
29
30#define PINMUX_FLAG_TYPE (0x7)
31#define PINMUX_FLAG_WANT_PULLUP (1 << 3)
32#define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
33
34struct pinmux_gpio {
35 pinmux_enum_t enum_id;
36 pinmux_flag_t flags;
37};
38
39#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
40#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
41
42struct pinmux_cfg_reg {
43 unsigned long reg, reg_width, field_width;
44 unsigned long *cnt;
45 pinmux_enum_t *enum_ids;
46};
47
48#define PINMUX_CFG_REG(name, r, r_width, f_width) \
49 .reg = r, .reg_width = r_width, .field_width = f_width, \
50 .cnt = (unsigned long [r_width / f_width]) {}, \
51 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
52
53struct pinmux_data_reg {
54 unsigned long reg, reg_width;
55 pinmux_enum_t *enum_ids;
56};
57
58#define PINMUX_DATA_REG(name, r, r_width) \
59 .reg = r, .reg_width = r_width, \
60 .enum_ids = (pinmux_enum_t [r_width]) \
61
62struct pinmux_range {
63 pinmux_enum_t begin;
64 pinmux_enum_t end;
65};
66
67struct pinmux_info {
68 char *name;
69 pinmux_enum_t reserved_id;
70 struct pinmux_range data;
71 struct pinmux_range input;
72 struct pinmux_range input_pd;
73 struct pinmux_range input_pu;
74 struct pinmux_range output;
75 struct pinmux_range mark;
76 struct pinmux_range function;
77
78 unsigned first_gpio, last_gpio;
79
80 struct pinmux_gpio *gpios;
81 struct pinmux_cfg_reg *cfg_regs;
82 struct pinmux_data_reg *data_regs;
83
84 pinmux_enum_t *gpio_data;
85 unsigned int gpio_data_size;
86
87 unsigned long *gpio_in_use;
88};
89
90int register_pinmux(struct pinmux_info *pip);
91
92int __gpio_request(unsigned gpio);
93static inline int gpio_request(unsigned gpio, const char *label)
94{
95 return __gpio_request(gpio);
96}
97void gpio_free(unsigned gpio);
98int gpio_direction_input(unsigned gpio);
99int gpio_direction_output(unsigned gpio, int value);
100int gpio_get_value(unsigned gpio);
101void gpio_set_value(unsigned gpio, int value);
102static inline int gpio_export(unsigned gpio, bool direction_may_change)
103{
104 return 0;
105}
106
19#endif /* __ASM_SH_GPIO_H */ 107#endif /* __ASM_SH_GPIO_H */
diff --git a/arch/sh/include/asm/sh7203.h b/arch/sh/include/asm/sh7203.h
new file mode 100644
index 000000000000..79f93159018d
--- /dev/null
+++ b/arch/sh/include/asm/sh7203.h
@@ -0,0 +1,143 @@
1#ifndef __ASM_SH7203_H__
2#define __ASM_SH7203_H__
3
4enum {
5 /* PA */
6 GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,
7 GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0,
8
9 /* PB */
10 GPIO_PB12,
11 GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8,
12 GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,
13 GPIO_PB3, GPIO_PB2, GPIO_PB1, GPIO_PB0,
14
15 /* PC */
16 GPIO_PC14, GPIO_PC13, GPIO_PC12,
17 GPIO_PC11, GPIO_PC10, GPIO_PC9, GPIO_PC8,
18 GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,
19 GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,
20
21 /* PD */
22 GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12,
23 GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8,
24 GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,
25 GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
26
27 /* PE */
28 GPIO_PE15, GPIO_PE14, GPIO_PE13, GPIO_PE12,
29 GPIO_PE11, GPIO_PE10, GPIO_PE9, GPIO_PE8,
30 GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4,
31 GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0,
32
33 /* PF */
34 GPIO_PF30, GPIO_PF29, GPIO_PF28,
35 GPIO_PF27, GPIO_PF26, GPIO_PF25, GPIO_PF24,
36 GPIO_PF23, GPIO_PF22, GPIO_PF21, GPIO_PF20,
37 GPIO_PF19, GPIO_PF18, GPIO_PF17, GPIO_PF16,
38 GPIO_PF15, GPIO_PF14, GPIO_PF13, GPIO_PF12,
39 GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8,
40 GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
41 GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
42
43 /* INTC: IRQ and PINT on PB/PD/PE */
44 GPIO_FN_PINT7_PB, GPIO_FN_PINT6_PB, GPIO_FN_PINT5_PB, GPIO_FN_PINT4_PB,
45 GPIO_FN_PINT3_PB, GPIO_FN_PINT2_PB, GPIO_FN_PINT1_PB, GPIO_FN_PINT0_PB,
46 GPIO_FN_PINT7_PD, GPIO_FN_PINT6_PD, GPIO_FN_PINT5_PD, GPIO_FN_PINT4_PD,
47 GPIO_FN_PINT3_PD, GPIO_FN_PINT2_PD, GPIO_FN_PINT1_PD, GPIO_FN_PINT0_PD,
48 GPIO_FN_IRQ7_PB, GPIO_FN_IRQ6_PB, GPIO_FN_IRQ5_PB, GPIO_FN_IRQ4_PB,
49 GPIO_FN_IRQ3_PB, GPIO_FN_IRQ2_PB, GPIO_FN_IRQ1_PB, GPIO_FN_IRQ0_PB,
50 GPIO_FN_IRQ7_PD, GPIO_FN_IRQ6_PD, GPIO_FN_IRQ5_PD, GPIO_FN_IRQ4_PD,
51 GPIO_FN_IRQ3_PD, GPIO_FN_IRQ2_PD, GPIO_FN_IRQ1_PD, GPIO_FN_IRQ0_PD,
52 GPIO_FN_IRQ7_PE, GPIO_FN_IRQ6_PE, GPIO_FN_IRQ5_PE, GPIO_FN_IRQ4_PE,
53 GPIO_FN_IRQ3_PE, GPIO_FN_IRQ2_PE, GPIO_FN_IRQ1_PE, GPIO_FN_IRQ0_PE,
54
55 GPIO_FN_WDTOVF, GPIO_FN_IRQOUT, GPIO_FN_REFOUT, GPIO_FN_IRQOUT_REFOUT,
56 GPIO_FN_UBCTRG,
57
58 /* CAN */
59 GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,
60 GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1,
61
62 /* IIC3 */
63 GPIO_FN_SDA3, GPIO_FN_SCL3,
64 GPIO_FN_SDA2, GPIO_FN_SCL2,
65 GPIO_FN_SDA1, GPIO_FN_SCL1,
66 GPIO_FN_SDA0, GPIO_FN_SCL0,
67
68 /* DMAC */
69 GPIO_FN_TEND0_PD, GPIO_FN_TEND0_PE, GPIO_FN_DACK0_PD,
70 GPIO_FN_DACK0_PE, GPIO_FN_DREQ0_PD, GPIO_FN_DREQ0_PE,
71 GPIO_FN_TEND1_PD, GPIO_FN_TEND1_PE, GPIO_FN_DACK1_PD,
72 GPIO_FN_DACK1_PE, GPIO_FN_DREQ1_PD, GPIO_FN_DREQ1_PE,
73 GPIO_FN_DACK2, GPIO_FN_DREQ2,
74 GPIO_FN_DACK3, GPIO_FN_DREQ3,
75
76 /* ADC */
77 GPIO_FN_ADTRG_PD, GPIO_FN_ADTRG_PE,
78
79 /* BSC */
80 GPIO_FN_D31, GPIO_FN_D30, GPIO_FN_D29, GPIO_FN_D28,
81 GPIO_FN_D27, GPIO_FN_D26, GPIO_FN_D25, GPIO_FN_D24,
82 GPIO_FN_D23, GPIO_FN_D22, GPIO_FN_D21, GPIO_FN_D20,
83 GPIO_FN_D19, GPIO_FN_D18, GPIO_FN_D17, GPIO_FN_D16,
84 GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_A23, GPIO_FN_A22,
85 GPIO_FN_A21, GPIO_FN_CS4, GPIO_FN_MRES, GPIO_FN_BS,
86 GPIO_FN_IOIS16, GPIO_FN_CS1, GPIO_FN_CS6_CE1B,
87 GPIO_FN_CE2B, GPIO_FN_CS5_CE1A, GPIO_FN_CE2A,
88 GPIO_FN_FRAME, GPIO_FN_WAIT, GPIO_FN_RDWR,
89 GPIO_FN_CKE, GPIO_FN_CASU, GPIO_FN_BREQ, GPIO_FN_RASU,
90 GPIO_FN_BACK, GPIO_FN_CASL, GPIO_FN_RASL,
91 GPIO_FN_WE3_DQMUU_AH_ICIO_WR, GPIO_FN_WE2_DQMUL_ICIORD,
92 GPIO_FN_WE1_DQMLU_WE, GPIO_FN_WE0_DQMLL,
93 GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_A1, GPIO_FN_A0, GPIO_FN_CS7,
94
95 /* TMU */
96 GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A,
97 GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A,
98 GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A,
99 GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
100 GPIO_FN_TCLKD_PD, GPIO_FN_TCLKC_PD, GPIO_FN_TCLKB_PD, GPIO_FN_TCLKA_PD,
101 GPIO_FN_TCLKD_PF, GPIO_FN_TCLKC_PF, GPIO_FN_TCLKB_PF, GPIO_FN_TCLKA_PF,
102
103 /* SSU */
104 GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
105 GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
106 GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
107 GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,
108
109 /* SCIF */
110 GPIO_FN_TXD0, GPIO_FN_RXD0, GPIO_FN_SCK0,
111 GPIO_FN_TXD1, GPIO_FN_RXD1, GPIO_FN_SCK1,
112 GPIO_FN_TXD2, GPIO_FN_RXD2, GPIO_FN_SCK2,
113 GPIO_FN_RTS3, GPIO_FN_CTS3, GPIO_FN_TXD3, GPIO_FN_RXD3, GPIO_FN_SCK3,
114
115 /* SSI */
116 GPIO_FN_AUDIO_CLK,
117 GPIO_FN_SSIDATA3, GPIO_FN_SSIWS3, GPIO_FN_SSISCK3,
118 GPIO_FN_SSIDATA2, GPIO_FN_SSIWS2, GPIO_FN_SSISCK2,
119 GPIO_FN_SSIDATA1, GPIO_FN_SSIWS1, GPIO_FN_SSISCK1,
120 GPIO_FN_SSIDATA0, GPIO_FN_SSIWS0, GPIO_FN_SSISCK0,
121
122 /* FLCTL */
123 GPIO_FN_FCE, GPIO_FN_FRB,
124 GPIO_FN_NAF7, GPIO_FN_NAF6, GPIO_FN_NAF5, GPIO_FN_NAF4,
125 GPIO_FN_NAF3, GPIO_FN_NAF2, GPIO_FN_NAF1, GPIO_FN_NAF0,
126 GPIO_FN_FSC, GPIO_FN_FOE, GPIO_FN_FCDE, GPIO_FN_FWE,
127
128 /* LCDC */
129 GPIO_FN_LCD_VEPWC, GPIO_FN_LCD_VCPWC,
130 GPIO_FN_LCD_CLK, GPIO_FN_LCD_FLM,
131 GPIO_FN_LCD_M_DISP, GPIO_FN_LCD_CL2,
132 GPIO_FN_LCD_CL1, GPIO_FN_LCD_DON,
133 GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,
134 GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,
135 GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,
136 GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,
137 GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,
138 GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,
139 GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,
140 GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,
141};
142
143#endif /* __ASM_SH7203_H__ */
diff --git a/arch/sh/include/asm/sh7720.h b/arch/sh/include/asm/sh7720.h
new file mode 100644
index 000000000000..41c1406d6da2
--- /dev/null
+++ b/arch/sh/include/asm/sh7720.h
@@ -0,0 +1,174 @@
1#ifndef __ASM_SH7720_H__
2#define __ASM_SH7720_H__
3
4enum {
5 /* PTA */
6 GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
7 GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0,
8
9 /* PTB */
10 GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4,
11 GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0,
12
13 /* PTC */
14 GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4,
15 GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0,
16
17 /* PTD */
18 GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4,
19 GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0,
20
21 /* PTE */
22 GPIO_PTE6, GPIO_PTE5, GPIO_PTE4, GPIO_PTE3,
23 GPIO_PTE2, GPIO_PTE1, GPIO_PTE0,
24
25 /* PTF */
26 GPIO_PTF6, GPIO_PTF5, GPIO_PTF4, GPIO_PTF3,
27 GPIO_PTF2, GPIO_PTF1, GPIO_PTF0, GPIO_PTG6,
28
29 /* PTG */
30 GPIO_PTG5, GPIO_PTG4, GPIO_PTG3, GPIO_PTG2,
31 GPIO_PTG1, GPIO_PTG0,
32
33 /* PTH */
34 GPIO_PTH6, GPIO_PTH5, GPIO_PTH4, GPIO_PTH3,
35 GPIO_PTH2, GPIO_PTH1, GPIO_PTH0,
36
37 /* PTJ */
38 GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ4, GPIO_PTJ3,
39 GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0,
40
41 /* PTK */
42 GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0,
43
44 /* PTL */
45 GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4, GPIO_PTL3,
46
47 /* PTM */
48 GPIO_PTM7, GPIO_PTM6, GPIO_PTM5, GPIO_PTM4,
49 GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0,
50
51 /* PTP */
52 GPIO_PTP4, GPIO_PTP3, GPIO_PTP2, GPIO_PTP1, GPIO_PTP0,
53
54 /* PTR */
55 GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4,
56 GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0,
57
58 /* PTS */
59 GPIO_PTS4, GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0,
60
61 /* PTT */
62 GPIO_PTT4, GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0,
63
64 /* PTU */
65 GPIO_PTU4, GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0,
66
67 /* PTV */
68 GPIO_PTV4, GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0,
69
70 /* BSC */
71 GPIO_FN_D31, GPIO_FN_D30, GPIO_FN_D29, GPIO_FN_D28,
72 GPIO_FN_D27, GPIO_FN_D26, GPIO_FN_D25, GPIO_FN_D24,
73 GPIO_FN_D23, GPIO_FN_D22, GPIO_FN_D21, GPIO_FN_D20,
74 GPIO_FN_D19, GPIO_FN_D18, GPIO_FN_D17, GPIO_FN_D16,
75 GPIO_FN_IOIS16, GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE,
76 GPIO_FN_CS5B_CE1A, GPIO_FN_CS6B_CE1B,
77 GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_A23, GPIO_FN_A22,
78 GPIO_FN_A21, GPIO_FN_A20, GPIO_FN_A19, GPIO_FN_A0,
79 GPIO_FN_REFOUT, GPIO_FN_IRQOUT,
80
81 /* LCDC */
82 GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,
83 GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,
84 GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,
85 GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,
86 GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,
87 GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,
88 GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,
89 GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,
90 GPIO_FN_LCD_M_DISP,
91 GPIO_FN_LCD_CL1, GPIO_FN_LCD_CL2,
92 GPIO_FN_LCD_DON, GPIO_FN_LCD_FLM,
93 GPIO_FN_LCD_VEPWC, GPIO_FN_LCD_VCPWC,
94
95 /* AFEIF */
96 GPIO_FN_AFE_RXIN, GPIO_FN_AFE_RDET,
97 GPIO_FN_AFE_FS, GPIO_FN_AFE_TXOUT,
98 GPIO_FN_AFE_SCLK, GPIO_FN_AFE_RLYCNT,
99 GPIO_FN_AFE_HC1,
100
101 /* IIC */
102 GPIO_FN_IIC_SCL, GPIO_FN_IIC_SDA,
103
104 /* DAC */
105 GPIO_FN_DA1, GPIO_FN_DA0,
106
107 /* ADC */
108 GPIO_FN_AN3, GPIO_FN_AN2, GPIO_FN_AN1, GPIO_FN_AN0, GPIO_FN_ADTRG,
109
110 /* USB */
111 GPIO_FN_USB1D_RCV, GPIO_FN_USB1D_TXSE0,
112 GPIO_FN_USB1D_TXDPLS, GPIO_FN_USB1D_DMNS,
113 GPIO_FN_USB1D_DPLS, GPIO_FN_USB1D_SPEED,
114 GPIO_FN_USB1D_TXENL, GPIO_FN_USB2_PWR_EN,
115 GPIO_FN_USB1_PWR_EN_USBF_UPLUP, GPIO_FN_USB1D_SUSPEND,
116
117 /* INTC */
118 GPIO_FN_IRQ5, GPIO_FN_IRQ4,
119 GPIO_FN_IRQ3_IRL3, GPIO_FN_IRQ2_IRL2,
120 GPIO_FN_IRQ1_IRL1, GPIO_FN_IRQ0_IRL0,
121
122 /* PCC */
123 GPIO_FN_PCC_REG, GPIO_FN_PCC_DRV,
124 GPIO_FN_PCC_BVD2, GPIO_FN_PCC_BVD1,
125 GPIO_FN_PCC_CD2, GPIO_FN_PCC_CD1,
126 GPIO_FN_PCC_RESET, GPIO_FN_PCC_RDY,
127 GPIO_FN_PCC_VS2, GPIO_FN_PCC_VS1,
128
129 /* HUDI */
130 GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, GPIO_FN_AUDATA1, GPIO_FN_AUDATA0,
131 GPIO_FN_AUDCK, GPIO_FN_AUDSYNC, GPIO_FN_ASEBRKAK, GPIO_FN_TRST,
132 GPIO_FN_TMS, GPIO_FN_TDO, GPIO_FN_TDI, GPIO_FN_TCK,
133
134 /* DMAC */
135 GPIO_FN_DACK1, GPIO_FN_DREQ1, GPIO_FN_DACK0, GPIO_FN_DREQ0,
136 GPIO_FN_TEND1, GPIO_FN_TEND0,
137
138 /* SIOF0 */
139 GPIO_FN_SIOF0_SYNC, GPIO_FN_SIOF0_MCLK,
140 GPIO_FN_SIOF0_TXD, GPIO_FN_SIOF0_RXD,
141 GPIO_FN_SIOF0_SCK,
142
143 /* SIOF1 */
144 GPIO_FN_SIOF1_SYNC, GPIO_FN_SIOF1_MCLK,
145 GPIO_FN_SIOF1_TXD, GPIO_FN_SIOF1_RXD,
146 GPIO_FN_SIOF1_SCK,
147
148 /* SCIF0 */
149 GPIO_FN_SCIF0_TXD, GPIO_FN_SCIF0_RXD,
150 GPIO_FN_SCIF0_RTS, GPIO_FN_SCIF0_CTS, GPIO_FN_SCIF0_SCK,
151
152 /* SCIF1 */
153 GPIO_FN_SCIF1_TXD, GPIO_FN_SCIF1_RXD,
154 GPIO_FN_SCIF1_RTS, GPIO_FN_SCIF1_CTS, GPIO_FN_SCIF1_SCK,
155
156 /* TPU */
157 GPIO_FN_TPU_TO1, GPIO_FN_TPU_TO0,
158 GPIO_FN_TPU_TI3B, GPIO_FN_TPU_TI3A,
159 GPIO_FN_TPU_TI2B, GPIO_FN_TPU_TI2A,
160 GPIO_FN_TPU_TO3, GPIO_FN_TPU_TO2,
161
162 /* SIM */
163 GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST,
164
165 /* MMC */
166 GPIO_FN_MMC_DAT, GPIO_FN_MMC_CMD,
167 GPIO_FN_MMC_CLK, GPIO_FN_MMC_VDDON,
168 GPIO_FN_MMC_ODMOD,
169
170 /* SYSC */
171 GPIO_FN_STATUS0, GPIO_FN_STATUS1,
172};
173
174#endif /* __ASM_SH7720_H__ */
diff --git a/arch/sh/include/asm/sh7722.h b/arch/sh/include/asm/sh7722.h
new file mode 100644
index 000000000000..4b3096f5307b
--- /dev/null
+++ b/arch/sh/include/asm/sh7722.h
@@ -0,0 +1,210 @@
1#ifndef __ASM_SH7722_H__
2#define __ASM_SH7722_H__
3
4enum {
5 /* PTA */
6 GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
7 GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0,
8
9 /* PTB */
10 GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4,
11 GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0,
12
13 /* PTC */
14 GPIO_PTC7, GPIO_PTC5, GPIO_PTC4, GPIO_PTC3,
15 GPIO_PTC2, GPIO_PTC0,
16
17 /* PTD */
18 GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4,
19 GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0,
20
21 /* PTE */
22 GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4,
23 GPIO_PTE1, GPIO_PTE0,
24
25 /* PTF */
26 GPIO_PTF6, GPIO_PTF5, GPIO_PTF4, GPIO_PTF3,
27 GPIO_PTF2, GPIO_PTF1, GPIO_PTF0,
28
29 /* PTG */
30 GPIO_PTG4, GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0,
31
32 /* PTH */
33 GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4,
34 GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0,
35
36 /* PTJ */
37 GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ1, GPIO_PTJ0,
38
39 /* PTK */
40 GPIO_PTK6, GPIO_PTK5, GPIO_PTK4, GPIO_PTK3,
41 GPIO_PTK2, GPIO_PTK1, GPIO_PTK0,
42
43 /* PTL */
44 GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4,
45 GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0,
46
47 /* PTM */
48 GPIO_PTM7, GPIO_PTM6, GPIO_PTM5, GPIO_PTM4,
49 GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0,
50
51 /* PTN */
52 GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4,
53 GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0,
54
55 /* PTQ */
56 GPIO_PTQ7, GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4,
57 GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0,
58
59 /* PTR */
60 GPIO_PTR4, GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0,
61
62 /* PTS */
63 GPIO_PTS4, GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0,
64
65 /* PTT */
66 GPIO_PTT4, GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0,
67
68 /* PTU */
69 GPIO_PTU4, GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0,
70
71 /* PTV */
72 GPIO_PTV4, GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0,
73
74 /* PTW */
75 GPIO_PTW6, GPIO_PTW5, GPIO_PTW4, GPIO_PTW3,
76 GPIO_PTW2, GPIO_PTW1, GPIO_PTW0,
77
78 /* PTX */
79 GPIO_PTX6, GPIO_PTX5, GPIO_PTX4, GPIO_PTX3,
80 GPIO_PTX2, GPIO_PTX1, GPIO_PTX0,
81
82 /* PTY */
83 GPIO_PTY5, GPIO_PTY4, GPIO_PTY3, GPIO_PTY2,
84 GPIO_PTY1, GPIO_PTY0,
85
86 /* PTZ */
87 GPIO_PTZ5, GPIO_PTZ4, GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1,
88
89 /* SCIF0 */
90 GPIO_FN_SCIF0_TXD, GPIO_FN_SCIF0_RXD,
91 GPIO_FN_SCIF0_RTS, GPIO_FN_SCIF0_CTS, GPIO_FN_SCIF0_SCK,
92
93 /* SCIF1 */
94 GPIO_FN_SCIF1_TXD, GPIO_FN_SCIF1_RXD,
95 GPIO_FN_SCIF1_RTS, GPIO_FN_SCIF1_CTS, GPIO_FN_SCIF1_SCK,
96
97 /* SCIF2 */
98 GPIO_FN_SCIF2_TXD, GPIO_FN_SCIF2_RXD,
99 GPIO_FN_SCIF2_RTS, GPIO_FN_SCIF2_CTS, GPIO_FN_SCIF2_SCK,
100
101 /* SIO */
102 GPIO_FN_SIOTXD, GPIO_FN_SIORXD,
103 GPIO_FN_SIOD, GPIO_FN_SIOSTRB0, GPIO_FN_SIOSTRB1,
104 GPIO_FN_SIOSCK, GPIO_FN_SIOMCK,
105
106 /* CEU */
107 GPIO_FN_VIO_D15, GPIO_FN_VIO_D14, GPIO_FN_VIO_D13, GPIO_FN_VIO_D12,
108 GPIO_FN_VIO_D11, GPIO_FN_VIO_D10, GPIO_FN_VIO_D9, GPIO_FN_VIO_D8,
109 GPIO_FN_VIO_D7, GPIO_FN_VIO_D6, GPIO_FN_VIO_D5, GPIO_FN_VIO_D4,
110 GPIO_FN_VIO_D3, GPIO_FN_VIO_D2, GPIO_FN_VIO_D1, GPIO_FN_VIO_D0,
111 GPIO_FN_VIO_FLD, GPIO_FN_VIO_CKO, GPIO_FN_VIO_STEX, GPIO_FN_VIO_STEM,
112 GPIO_FN_VIO_VD, GPIO_FN_VIO_HD, GPIO_FN_VIO_CLK,
113 GPIO_FN_VIO_VD2, GPIO_FN_VIO_HD2, GPIO_FN_VIO_CLK2,
114
115 /* LCDC */
116 GPIO_FN_LCDD23, GPIO_FN_LCDD22, GPIO_FN_LCDD21, GPIO_FN_LCDD20,
117 GPIO_FN_LCDD19, GPIO_FN_LCDD18, GPIO_FN_LCDD17, GPIO_FN_LCDD16,
118 GPIO_FN_LCDD15, GPIO_FN_LCDD14, GPIO_FN_LCDD13, GPIO_FN_LCDD12,
119 GPIO_FN_LCDD11, GPIO_FN_LCDD10, GPIO_FN_LCDD9, GPIO_FN_LCDD8,
120 GPIO_FN_LCDD7, GPIO_FN_LCDD6, GPIO_FN_LCDD5, GPIO_FN_LCDD4,
121 GPIO_FN_LCDD3, GPIO_FN_LCDD2, GPIO_FN_LCDD1, GPIO_FN_LCDD0,
122 GPIO_FN_LCDLCLK,
123 /* Main LCD */
124 GPIO_FN_LCDDON, GPIO_FN_LCDVCPWC, GPIO_FN_LCDVEPWC, GPIO_FN_LCDVSYN,
125 /* Main LCD - RGB Mode */
126 GPIO_FN_LCDDCK, GPIO_FN_LCDHSYN, GPIO_FN_LCDDISP,
127 /* Main LCD - SYS Mode */
128 GPIO_FN_LCDRS, GPIO_FN_LCDCS, GPIO_FN_LCDWR, GPIO_FN_LCDRD,
129 /* Sub LCD - SYS Mode */
130 GPIO_FN_LCDDON2, GPIO_FN_LCDVCPWC2, GPIO_FN_LCDVEPWC2,
131 GPIO_FN_LCDVSYN2, GPIO_FN_LCDCS2,
132
133 /* BSC */
134 GPIO_FN_IOIS16, GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_A23, GPIO_FN_A22,
135 GPIO_FN_BS, GPIO_FN_CS6B_CE1B, GPIO_FN_WAIT, GPIO_FN_CS6A_CE2B,
136
137 /* SBSC */
138 GPIO_FN_HPD63, GPIO_FN_HPD62, GPIO_FN_HPD61, GPIO_FN_HPD60,
139 GPIO_FN_HPD59, GPIO_FN_HPD58, GPIO_FN_HPD57, GPIO_FN_HPD56,
140 GPIO_FN_HPD55, GPIO_FN_HPD54, GPIO_FN_HPD53, GPIO_FN_HPD52,
141 GPIO_FN_HPD51, GPIO_FN_HPD50, GPIO_FN_HPD49, GPIO_FN_HPD48,
142 GPIO_FN_HPDQM7, GPIO_FN_HPDQM6, GPIO_FN_HPDQM5, GPIO_FN_HPDQM4,
143
144 /* IRQ */
145 GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3,
146 GPIO_FN_IRQ4, GPIO_FN_IRQ5, GPIO_FN_IRQ6, GPIO_FN_IRQ7,
147
148 /* SDHI */
149 GPIO_FN_SDHICD, GPIO_FN_SDHIWP, GPIO_FN_SDHID3, GPIO_FN_SDHID2,
150 GPIO_FN_SDHID1, GPIO_FN_SDHID0, GPIO_FN_SDHICMD, GPIO_FN_SDHICLK,
151
152 /* SIU - Port A */
153 GPIO_FN_SIUAOLR, GPIO_FN_SIUAOBT, GPIO_FN_SIUAISLD, GPIO_FN_SIUAILR,
154 GPIO_FN_SIUAIBT, GPIO_FN_SIUAOSLD, GPIO_FN_SIUMCKA, GPIO_FN_SIUFCKA,
155
156 /* SIU - Port B */
157 GPIO_FN_SIUBOLR, GPIO_FN_SIUBOBT, GPIO_FN_SIUBISLD, GPIO_FN_SIUBILR,
158 GPIO_FN_SIUBIBT, GPIO_FN_SIUBOSLD, GPIO_FN_SIUMCKB, GPIO_FN_SIUFCKB,
159
160 /* AUD */
161 GPIO_FN_AUDSYNC, GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, GPIO_FN_AUDATA1,
162 GPIO_FN_AUDATA0,
163
164 /* DMAC */
165 GPIO_FN_DACK, GPIO_FN_DREQ0,
166
167 /* VOU */
168 GPIO_FN_DV_CLKI, GPIO_FN_DV_CLK, GPIO_FN_DV_HSYNC, GPIO_FN_DV_VSYNC,
169 GPIO_FN_DV_D15, GPIO_FN_DV_D14, GPIO_FN_DV_D13, GPIO_FN_DV_D12,
170 GPIO_FN_DV_D11, GPIO_FN_DV_D10, GPIO_FN_DV_D9, GPIO_FN_DV_D8,
171 GPIO_FN_DV_D7, GPIO_FN_DV_D6, GPIO_FN_DV_D5, GPIO_FN_DV_D4,
172 GPIO_FN_DV_D3, GPIO_FN_DV_D2, GPIO_FN_DV_D1, GPIO_FN_DV_D0,
173
174 /* CPG */
175 GPIO_FN_STATUS0, GPIO_FN_PDSTATUS,
176
177 /* SIOF0 */
178 GPIO_FN_SIOF0_MCK, GPIO_FN_SIOF0_SCK,
179 GPIO_FN_SIOF0_SYNC, GPIO_FN_SIOF0_SS1, GPIO_FN_SIOF0_SS2,
180 GPIO_FN_SIOF0_TXD, GPIO_FN_SIOF0_RXD,
181
182 /* SIOF1 */
183 GPIO_FN_SIOF1_MCK, GPIO_FN_SIOF1_SCK,
184 GPIO_FN_SIOF1_SYNC, GPIO_FN_SIOF1_SS1, GPIO_FN_SIOF1_SS2,
185 GPIO_FN_SIOF1_TXD, GPIO_FN_SIOF1_RXD,
186
187 /* SIM */
188 GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST,
189
190 /* TSIF */
191 GPIO_FN_TS_SDAT, GPIO_FN_TS_SCK, GPIO_FN_TS_SDEN, GPIO_FN_TS_SPSYNC,
192
193 /* IRDA */
194 GPIO_FN_IRDA_IN, GPIO_FN_IRDA_OUT,
195
196 /* TPU */
197 GPIO_FN_TPUTO,
198
199 /* FLCTL */
200 GPIO_FN_FCE, GPIO_FN_NAF7, GPIO_FN_NAF6, GPIO_FN_NAF5, GPIO_FN_NAF4,
201 GPIO_FN_NAF3, GPIO_FN_NAF2, GPIO_FN_NAF1, GPIO_FN_NAF0, GPIO_FN_FCDE,
202 GPIO_FN_FOE, GPIO_FN_FSC, GPIO_FN_FWE, GPIO_FN_FRB,
203
204 /* KEYSC */
205 GPIO_FN_KEYIN0, GPIO_FN_KEYIN1, GPIO_FN_KEYIN2, GPIO_FN_KEYIN3,
206 GPIO_FN_KEYIN4, GPIO_FN_KEYOUT0, GPIO_FN_KEYOUT1, GPIO_FN_KEYOUT2,
207 GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5,
208};
209
210#endif /* __ASM_SH7722_H__ */
diff --git a/arch/sh/include/asm/sh7723.h b/arch/sh/include/asm/sh7723.h
new file mode 100644
index 000000000000..9d2f6d7aa938
--- /dev/null
+++ b/arch/sh/include/asm/sh7723.h
@@ -0,0 +1,254 @@
1#ifndef __ASM_SH7723_H__
2#define __ASM_SH7723_H__
3
4enum {
5 /* PTA */
6 GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
7 GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0,
8
9 /* PTB */
10 GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4,
11 GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0,
12
13 /* PTC */
14 GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4,
15 GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0,
16
17 /* PTD */
18 GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4,
19 GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0,
20
21 /* PTE */
22 GPIO_PTE5, GPIO_PTE4, GPIO_PTE3, GPIO_PTE2,
23 GPIO_PTE1, GPIO_PTE0,
24
25 /* PTF */
26 GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4,
27 GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0,
28
29 /* PTG */
30 GPIO_PTG5, GPIO_PTG4, GPIO_PTG3, GPIO_PTG2,
31 GPIO_PTG1, GPIO_PTG0,
32
33 /* PTH */
34 GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4,
35 GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0,
36
37 /* PTJ */
38 GPIO_PTJ7, GPIO_PTJ5, GPIO_PTJ3, GPIO_PTJ2,
39 GPIO_PTJ1, GPIO_PTJ0,
40
41 /* PTK */
42 GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4,
43 GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0,
44
45 /* PTL */
46 GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4,
47 GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0,
48
49 /* PTM */
50 GPIO_PTM7, GPIO_PTM6, GPIO_PTM5, GPIO_PTM4,
51 GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0,
52
53 /* PTN */
54 GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4,
55 GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0,
56
57 /* PTQ */
58 GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0,
59
60 /* PTR */
61 GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4,
62 GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0,
63
64 /* PTS */
65 GPIO_PTS7, GPIO_PTS6, GPIO_PTS5, GPIO_PTS4,
66 GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0,
67
68 /* PTT */
69 GPIO_PTT5, GPIO_PTT4, GPIO_PTT3, GPIO_PTT2,
70 GPIO_PTT1, GPIO_PTT0,
71
72 /* PTU */
73 GPIO_PTU5, GPIO_PTU4, GPIO_PTU3, GPIO_PTU2,
74 GPIO_PTU1, GPIO_PTU0,
75
76 /* PTV */
77 GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4,
78 GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0,
79
80 /* PTW */
81 GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4,
82 GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0,
83
84 /* PTX */
85 GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4,
86 GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0,
87
88 /* PTY */
89 GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4,
90 GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0,
91
92 /* PTZ */
93 GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4,
94 GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0,
95
96 /* SCIF0 (SCIF: 3 pin PTT/PTU) */
97 GPIO_FN_SCIF0_PTT_TXD, GPIO_FN_SCIF0_PTT_RXD, GPIO_FN_SCIF0_PTT_SCK,
98 GPIO_FN_SCIF0_PTU_TXD, GPIO_FN_SCIF0_PTU_RXD, GPIO_FN_SCIF0_PTU_SCK,
99
100 /* SCIF1 (SCIF: 3 pin PTS/PTV) */
101 GPIO_FN_SCIF1_PTS_TXD, GPIO_FN_SCIF1_PTS_RXD, GPIO_FN_SCIF1_PTS_SCK,
102 GPIO_FN_SCIF1_PTV_TXD, GPIO_FN_SCIF1_PTV_RXD, GPIO_FN_SCIF1_PTV_SCK,
103
104 /* SCIF2 (SCIF: 3 pin PTT/PTU) */
105 GPIO_FN_SCIF2_PTT_TXD, GPIO_FN_SCIF2_PTT_RXD, GPIO_FN_SCIF2_PTT_SCK,
106 GPIO_FN_SCIF2_PTU_TXD, GPIO_FN_SCIF2_PTU_RXD, GPIO_FN_SCIF2_PTU_SCK,
107
108 /* SCIF3 (SCIFA: 5 pin PTS/PTV) */
109 GPIO_FN_SCIF3_PTS_TXD, GPIO_FN_SCIF3_PTS_RXD, GPIO_FN_SCIF3_PTS_SCK,
110 GPIO_FN_SCIF3_PTS_RTS, GPIO_FN_SCIF3_PTS_CTS,
111 GPIO_FN_SCIF3_PTV_TXD, GPIO_FN_SCIF3_PTV_RXD, GPIO_FN_SCIF3_PTV_SCK,
112 GPIO_FN_SCIF3_PTV_RTS, GPIO_FN_SCIF3_PTV_CTS,
113
114 /* SCIF4 (SCIFA: 3 pin PTE/PTN) */
115 GPIO_FN_SCIF4_PTE_TXD, GPIO_FN_SCIF4_PTE_RXD, GPIO_FN_SCIF4_PTE_SCK,
116 GPIO_FN_SCIF4_PTN_TXD, GPIO_FN_SCIF4_PTN_RXD, GPIO_FN_SCIF4_PTN_SCK,
117
118 /* SCIF5 (SCIFA: 3 pin PTE/PTN) */
119 GPIO_FN_SCIF5_PTE_TXD, GPIO_FN_SCIF5_PTE_RXD, GPIO_FN_SCIF5_PTE_SCK,
120 GPIO_FN_SCIF5_PTN_TXD, GPIO_FN_SCIF5_PTN_RXD, GPIO_FN_SCIF5_PTN_SCK,
121
122 /* CEU */
123 GPIO_FN_VIO_D15, GPIO_FN_VIO_D14, GPIO_FN_VIO_D13, GPIO_FN_VIO_D12,
124 GPIO_FN_VIO_D11, GPIO_FN_VIO_D10, GPIO_FN_VIO_D9, GPIO_FN_VIO_D8,
125 GPIO_FN_VIO_D7, GPIO_FN_VIO_D6, GPIO_FN_VIO_D5, GPIO_FN_VIO_D4,
126 GPIO_FN_VIO_D3, GPIO_FN_VIO_D2, GPIO_FN_VIO_D1, GPIO_FN_VIO_D0,
127 GPIO_FN_VIO_FLD, GPIO_FN_VIO_CKO,
128 GPIO_FN_VIO_VD1, GPIO_FN_VIO_HD1, GPIO_FN_VIO_CLK1,
129 GPIO_FN_VIO_VD2, GPIO_FN_VIO_HD2, GPIO_FN_VIO_CLK2,
130
131 /* LCDC */
132 GPIO_FN_LCDD23, GPIO_FN_LCDD22, GPIO_FN_LCDD21, GPIO_FN_LCDD20,
133 GPIO_FN_LCDD19, GPIO_FN_LCDD18, GPIO_FN_LCDD17, GPIO_FN_LCDD16,
134 GPIO_FN_LCDD15, GPIO_FN_LCDD14, GPIO_FN_LCDD13, GPIO_FN_LCDD12,
135 GPIO_FN_LCDD11, GPIO_FN_LCDD10, GPIO_FN_LCDD9, GPIO_FN_LCDD8,
136 GPIO_FN_LCDD7, GPIO_FN_LCDD6, GPIO_FN_LCDD5, GPIO_FN_LCDD4,
137 GPIO_FN_LCDD3, GPIO_FN_LCDD2, GPIO_FN_LCDD1, GPIO_FN_LCDD0,
138 GPIO_FN_LCDLCLK_PTR, GPIO_FN_LCDLCLK_PTW,
139 /* Main LCD */
140 GPIO_FN_LCDDON, GPIO_FN_LCDVCPWC, GPIO_FN_LCDVEPWC, GPIO_FN_LCDVSYN,
141 /* Main LCD - RGB Mode */
142 GPIO_FN_LCDDCK, GPIO_FN_LCDHSYN, GPIO_FN_LCDDISP,
143 /* Main LCD - SYS Mode */
144 GPIO_FN_LCDRS, GPIO_FN_LCDCS, GPIO_FN_LCDWR, GPIO_FN_LCDRD,
145
146 /* IRQ */
147 GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3,
148 GPIO_FN_IRQ4, GPIO_FN_IRQ5, GPIO_FN_IRQ6, GPIO_FN_IRQ7,
149
150 /* AUD */
151 GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, GPIO_FN_AUDATA1, GPIO_FN_AUDATA0,
152 GPIO_FN_AUDCK, GPIO_FN_AUDSYNC,
153
154 /* SDHI0 (PTD) */
155 GPIO_FN_SDHI0CD_PTD, GPIO_FN_SDHI0WP_PTD,
156 GPIO_FN_SDHI0D3_PTD, GPIO_FN_SDHI0D2_PTD,
157 GPIO_FN_SDHI0D1_PTD, GPIO_FN_SDHI0D0_PTD,
158 GPIO_FN_SDHI0CMD_PTD, GPIO_FN_SDHI0CLK_PTD,
159
160 /* SDHI0 (PTS) */
161 GPIO_FN_SDHI0CD_PTS, GPIO_FN_SDHI0WP_PTS,
162 GPIO_FN_SDHI0D3_PTS, GPIO_FN_SDHI0D2_PTS,
163 GPIO_FN_SDHI0D1_PTS, GPIO_FN_SDHI0D0_PTS,
164 GPIO_FN_SDHI0CMD_PTS, GPIO_FN_SDHI0CLK_PTS,
165
166 /* SDHI1 */
167 GPIO_FN_SDHI1CD, GPIO_FN_SDHI1WP, GPIO_FN_SDHI1D3, GPIO_FN_SDHI1D2,
168 GPIO_FN_SDHI1D1, GPIO_FN_SDHI1D0, GPIO_FN_SDHI1CMD, GPIO_FN_SDHI1CLK,
169
170 /* SIUA */
171 GPIO_FN_SIUAFCK, GPIO_FN_SIUAILR, GPIO_FN_SIUAIBT, GPIO_FN_SIUAISLD,
172 GPIO_FN_SIUAOLR, GPIO_FN_SIUAOBT, GPIO_FN_SIUAOSLD, GPIO_FN_SIUAMCK,
173 GPIO_FN_SIUAISPD, GPIO_FN_SIUOSPD,
174
175 /* SIUB */
176 GPIO_FN_SIUBFCK, GPIO_FN_SIUBILR, GPIO_FN_SIUBIBT, GPIO_FN_SIUBISLD,
177 GPIO_FN_SIUBOLR, GPIO_FN_SIUBOBT, GPIO_FN_SIUBOSLD, GPIO_FN_SIUBMCK,
178
179 /* IRDA */
180 GPIO_FN_IRDA_IN, GPIO_FN_IRDA_OUT,
181
182 /* VOU */
183 GPIO_FN_DV_CLKI, GPIO_FN_DV_CLK, GPIO_FN_DV_HSYNC, GPIO_FN_DV_VSYNC,
184 GPIO_FN_DV_D15, GPIO_FN_DV_D14, GPIO_FN_DV_D13, GPIO_FN_DV_D12,
185 GPIO_FN_DV_D11, GPIO_FN_DV_D10, GPIO_FN_DV_D9, GPIO_FN_DV_D8,
186 GPIO_FN_DV_D7, GPIO_FN_DV_D6, GPIO_FN_DV_D5, GPIO_FN_DV_D4,
187 GPIO_FN_DV_D3, GPIO_FN_DV_D2, GPIO_FN_DV_D1, GPIO_FN_DV_D0,
188
189 /* KEYSC */
190 GPIO_FN_KEYIN0, GPIO_FN_KEYIN1, GPIO_FN_KEYIN2, GPIO_FN_KEYIN3,
191 GPIO_FN_KEYIN4, GPIO_FN_KEYOUT0, GPIO_FN_KEYOUT1, GPIO_FN_KEYOUT2,
192 GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5,
193
194 /* MSIOF0 (PTF) */
195 GPIO_FN_MSIOF0_PTF_TXD, GPIO_FN_MSIOF0_PTF_RXD, GPIO_FN_MSIOF0_PTF_MCK,
196 GPIO_FN_MSIOF0_PTF_TSYNC, GPIO_FN_MSIOF0_PTF_TSCK,
197 GPIO_FN_MSIOF0_PTF_RSYNC, GPIO_FN_MSIOF0_PTF_RSCK,
198 GPIO_FN_MSIOF0_PTF_SS1, GPIO_FN_MSIOF0_PTF_SS2,
199
200 /* MSIOF0 (PTT+PTX) */
201 GPIO_FN_MSIOF0_PTT_TXD, GPIO_FN_MSIOF0_PTT_RXD, GPIO_FN_MSIOF0_PTX_MCK,
202 GPIO_FN_MSIOF0_PTT_TSYNC, GPIO_FN_MSIOF0_PTT_TSCK,
203 GPIO_FN_MSIOF0_PTT_RSYNC, GPIO_FN_MSIOF0_PTT_RSCK,
204 GPIO_FN_MSIOF0_PTT_SS1, GPIO_FN_MSIOF0_PTT_SS2,
205
206 /* MSIOF1 */
207 GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_RXD, GPIO_FN_MSIOF1_MCK,
208 GPIO_FN_MSIOF1_TSYNC, GPIO_FN_MSIOF1_TSCK,
209 GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MSIOF1_RSCK,
210 GPIO_FN_MSIOF1_SS1, GPIO_FN_MSIOF1_SS2,
211
212 /* TSIF */
213 GPIO_FN_TS0_SDAT, GPIO_FN_TS0_SCK, GPIO_FN_TS0_SDEN, GPIO_FN_TS0_SPSYNC,
214
215 /* FLCTL */
216 GPIO_FN_FCE, GPIO_FN_NAF7, GPIO_FN_NAF6, GPIO_FN_NAF5, GPIO_FN_NAF4,
217 GPIO_FN_NAF3, GPIO_FN_NAF2, GPIO_FN_NAF1, GPIO_FN_NAF0, GPIO_FN_FCDE,
218 GPIO_FN_FOE, GPIO_FN_FSC, GPIO_FN_FWE, GPIO_FN_FRB,
219
220 /* DMAC */
221 GPIO_FN_DACK1, GPIO_FN_DREQ1, GPIO_FN_DACK0, GPIO_FN_DREQ0,
222
223 /* ADC */
224 GPIO_FN_AN3, GPIO_FN_AN2, GPIO_FN_AN1, GPIO_FN_AN0, GPIO_FN_ADTRG,
225
226 /* CPG */
227 GPIO_FN_STATUS0, GPIO_FN_PDSTATUS,
228
229 /* TPU */
230 GPIO_FN_TPUTO3, GPIO_FN_TPUTO2, GPIO_FN_TPUTO1, GPIO_FN_TPUTO0,
231
232 /* BSC */
233 GPIO_FN_D31, GPIO_FN_D30, GPIO_FN_D29, GPIO_FN_D28,
234 GPIO_FN_D27, GPIO_FN_D26, GPIO_FN_D25, GPIO_FN_D24,
235 GPIO_FN_D23, GPIO_FN_D22, GPIO_FN_D21, GPIO_FN_D20,
236 GPIO_FN_D19, GPIO_FN_D18, GPIO_FN_D17, GPIO_FN_D16,
237 GPIO_FN_IOIS16, GPIO_FN_WAIT, GPIO_FN_BS,
238 GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_A23, GPIO_FN_A22,
239 GPIO_FN_CS6B_CE1B, GPIO_FN_CS6A_CE2B,
240 GPIO_FN_CS5B_CE1A, GPIO_FN_CS5A_CE2A,
241 GPIO_FN_WE3_ICIOWR, GPIO_FN_WE2_ICIORD,
242
243 /* ATAPI */
244 GPIO_FN_IDED15, GPIO_FN_IDED14, GPIO_FN_IDED13, GPIO_FN_IDED12,
245 GPIO_FN_IDED11, GPIO_FN_IDED10, GPIO_FN_IDED9, GPIO_FN_IDED8,
246 GPIO_FN_IDED7, GPIO_FN_IDED6, GPIO_FN_IDED5, GPIO_FN_IDED4,
247 GPIO_FN_IDED3, GPIO_FN_IDED2, GPIO_FN_IDED1, GPIO_FN_IDED0,
248 GPIO_FN_DIRECTION, GPIO_FN_EXBUF_ENB, GPIO_FN_IDERST, GPIO_FN_IODACK,
249 GPIO_FN_IODREQ, GPIO_FN_IDEIORDY, GPIO_FN_IDEINT, GPIO_FN_IDEIOWR,
250 GPIO_FN_IDEIORD, GPIO_FN_IDECS1, GPIO_FN_IDECS0, GPIO_FN_IDEA2,
251 GPIO_FN_IDEA1, GPIO_FN_IDEA0,
252};
253
254#endif /* __ASM_SH7723_H__ */
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 8497de8afbff..7c41ac7c298c 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -5,7 +5,7 @@
5extra-y := head_32.o init_task.o vmlinux.lds 5extra-y := head_32.o init_task.o vmlinux.lds
6 6
7obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \ 7obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
8 ptrace_32.o setup.o signal_32.o sys_sh.o sys_sh32.o \ 8 ptrace_32.o setup.o signal_32.o sys_sh.o sys_sh32.o gpio.o \
9 syscalls_32.o time_32.o topology.o traps.o traps_32.o 9 syscalls_32.o time_32.o topology.o traps.o traps_32.o
10 10
11obj-y += cpu/ timers/ 11obj-y += cpu/ timers/
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
index e987eb2e9bb5..2a7a5e694a1f 100644
--- a/arch/sh/kernel/Makefile_64
+++ b/arch/sh/kernel/Makefile_64
@@ -1,7 +1,7 @@
1extra-y := head_64.o init_task.o vmlinux.lds 1extra-y := head_64.o init_task.o vmlinux.lds
2 2
3obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \ 3obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \
4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ 4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o gpio.o \
5 syscalls_64.o time_64.o topology.o traps.o traps_64.o 5 syscalls_64.o time_64.o topology.o traps.o traps_64.o
6 6
7obj-y += cpu/ timers/ 7obj-y += cpu/ timers/
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 1ab1ecf4c768..428450cc0809 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -12,3 +12,8 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o 14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o
15
16# Pinmux setup
17pinmux-$(CONFIG_CPU_SUBTYPE_SH7203) := pinmux-sh7203.o
18
19obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
new file mode 100644
index 000000000000..39a5b880418f
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
@@ -0,0 +1,1599 @@
1/*
2 * SH7203 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/gpio.h>
14#include <asm/sh7203.h>
15
16enum {
17 PINMUX_RESERVED = 0,
18
19 PINMUX_DATA_BEGIN,
20 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
21 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
22 PB12_DATA,
23 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
24 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
25 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
26 PC14_DATA, PC13_DATA, PC12_DATA,
27 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
28 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
29 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
30 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
31 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
32 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
33 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
34 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
35 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
36 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
37 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
38 PF30_DATA, PF29_DATA, PF28_DATA,
39 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
40 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
41 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
42 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
43 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
44 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
45 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
46 PINMUX_DATA_END,
47
48 PINMUX_INPUT_BEGIN,
49 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
50 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
51 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
52 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
53 PB3_IN, PB2_IN, PB1_IN, PB0_IN,
54 PC14_IN, PC13_IN, PC12_IN,
55 PC11_IN, PC10_IN, PC9_IN, PC8_IN,
56 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
57 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
58 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
59 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
60 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
61 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
62 PE15_IN, PE14_IN, PE13_IN, PE12_IN,
63 PE11_IN, PE10_IN, PE9_IN, PE8_IN,
64 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
65 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
66 PF30_IN, PF29_IN, PF28_IN,
67 PF27_IN, PF26_IN, PF25_IN, PF24_IN,
68 PF23_IN, PF22_IN, PF21_IN, PF20_IN,
69 PF19_IN, PF18_IN, PF17_IN, PF16_IN,
70 PF15_IN, PF14_IN, PF13_IN, PF12_IN,
71 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
72 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
73 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
74 PINMUX_INPUT_END,
75
76 PINMUX_OUTPUT_BEGIN,
77 PB12_OUT,
78 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
79 PC14_OUT, PC13_OUT, PC12_OUT,
80 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
81 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
82 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
83 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
84 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
85 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
86 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
87 PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
88 PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
89 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
90 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
91 PF30_OUT, PF29_OUT, PF28_OUT,
92 PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
93 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
94 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
95 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
96 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
97 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
98 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
99 PINMUX_OUTPUT_END,
100
101 PINMUX_FUNCTION_BEGIN,
102 PB11_IOR_IN, PB11_IOR_OUT,
103 PB10_IOR_IN, PB10_IOR_OUT,
104 PB9_IOR_IN, PB9_IOR_OUT,
105 PB8_IOR_IN, PB8_IOR_OUT,
106 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
107 PB11MD_0, PB11MD_1,
108 PB10MD_0, PB10MD_1,
109 PB9MD_00, PB9MD_01, PB9MD_10,
110 PB8MD_00, PB8MD_01, PB8MD_10,
111 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
112 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
113 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
114 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
115 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
116 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
117 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
118 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
119
120 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
121
122 PC14MD_0, PC14MD_1,
123 PC13MD_0, PC13MD_1,
124 PC12MD_0, PC12MD_1,
125 PC11MD_00, PC11MD_01, PC11MD_10,
126 PC10MD_00, PC10MD_01, PC10MD_10,
127 PC9MD_0, PC9MD_1,
128 PC8MD_0, PC8MD_1,
129 PC7MD_0, PC7MD_1,
130 PC6MD_0, PC6MD_1,
131 PC5MD_0, PC5MD_1,
132 PC4MD_0, PC4MD_1,
133 PC3MD_0, PC3MD_1,
134 PC2MD_0, PC2MD_1,
135 PC1MD_0, PC1MD_1,
136 PC0MD_00, PC0MD_01, PC0MD_10,
137
138 PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
139 PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
140 PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
141 PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
142 PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
143 PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
144 PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
145 PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
146 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
147 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
148 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
149 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
150 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
151 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
152 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
153 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
154
155 PE15MD_00, PE15MD_01, PE15MD_11,
156 PE14MD_00, PE14MD_01, PE14MD_11,
157 PE13MD_00, PE13MD_11,
158 PE12MD_00, PE12MD_11,
159 PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
160 PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
161 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
162 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
163 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
164 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
165 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
166 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
167 PE3MD_00, PE3MD_01, PE3MD_11,
168 PE2MD_00, PE2MD_01, PE2MD_11,
169 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
170 PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
171
172 PF30MD_0, PF30MD_1,
173 PF29MD_0, PF29MD_1,
174 PF28MD_0, PF28MD_1,
175 PF27MD_0, PF27MD_1,
176 PF26MD_0, PF26MD_1,
177 PF25MD_0, PF25MD_1,
178 PF24MD_0, PF24MD_1,
179 PF23MD_00, PF23MD_01, PF23MD_10,
180 PF22MD_00, PF22MD_01, PF22MD_10,
181 PF21MD_00, PF21MD_01, PF21MD_10,
182 PF20MD_00, PF20MD_01, PF20MD_10,
183 PF19MD_00, PF19MD_01, PF19MD_10,
184 PF18MD_00, PF18MD_01, PF18MD_10,
185 PF17MD_00, PF17MD_01, PF17MD_10,
186 PF16MD_00, PF16MD_01, PF16MD_10,
187 PF15MD_00, PF15MD_01, PF15MD_10,
188 PF14MD_00, PF14MD_01, PF14MD_10,
189 PF13MD_00, PF13MD_01, PF13MD_10,
190 PF12MD_00, PF12MD_01, PF12MD_10,
191 PF11MD_00, PF11MD_01, PF11MD_10,
192 PF10MD_00, PF10MD_01, PF10MD_10,
193 PF9MD_00, PF9MD_01, PF9MD_10,
194 PF8MD_00, PF8MD_01, PF8MD_10,
195 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
196 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
197 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
198 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
199 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
200 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
201 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
202 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
203 PINMUX_FUNCTION_END,
204
205 PINMUX_MARK_BEGIN,
206 PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
207 PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
208 PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
209 PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
210 IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
211 IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
212 IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
213 IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
214 IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
215 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
216 WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
217 UBCTRG_MARK,
218 CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
219 CRX0_MARK, CRX0_CRX1_MARK,
220 SDA3_MARK, SCL3_MARK,
221 SDA2_MARK, SCL2_MARK,
222 SDA1_MARK, SCL1_MARK,
223 SDA0_MARK, SCL0_MARK,
224 TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
225 DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
226 DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
227 DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
228 ADTRG_PD_MARK, ADTRG_PE_MARK,
229 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
230 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
231 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
232 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
233 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
234 A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
235 IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
236 CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
237 RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
238 RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
239 WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
240 WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
241 CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
242 TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
243 TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
244 TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
245 TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
246 TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
247 TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
248 SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
249 SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
250 SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
251 SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
252 TXD0_MARK, RXD0_MARK, SCK0_MARK,
253 TXD1_MARK, RXD1_MARK, SCK1_MARK,
254 TXD2_MARK, RXD2_MARK, SCK2_MARK,
255 RTS3_MARK, CTS3_MARK, TXD3_MARK,
256 RXD3_MARK, SCK3_MARK,
257 AUDIO_CLK_MARK,
258 SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
259 SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
260 SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
261 SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
262 FCE_MARK, FRB_MARK,
263 NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
264 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
265 FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
266 LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
267 LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
268 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
269 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
270 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
271 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
272 PINMUX_MARK_END,
273};
274
275static pinmux_enum_t pinmux_data[] = {
276
277 /* PA */
278 PINMUX_DATA(PA7_DATA, PA7_IN),
279 PINMUX_DATA(PA6_DATA, PA6_IN),
280 PINMUX_DATA(PA5_DATA, PA5_IN),
281 PINMUX_DATA(PA4_DATA, PA4_IN),
282 PINMUX_DATA(PA3_DATA, PA3_IN),
283 PINMUX_DATA(PA2_DATA, PA2_IN),
284 PINMUX_DATA(PA1_DATA, PA1_IN),
285 PINMUX_DATA(PA0_DATA, PA0_IN),
286
287 /* PB */
288 PINMUX_DATA(PB12_DATA, PB12MD_00, PB12_OUT),
289 PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
290 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
291 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
292 PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
293 PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
294
295 PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
296 PINMUX_DATA(CTX1_MARK, PB11MD_1),
297
298 PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
299 PINMUX_DATA(CRX1_MARK, PB10MD_1),
300
301 PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
302 PINMUX_DATA(CTX0_MARK, PB9MD_01),
303 PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
304
305 PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
306 PINMUX_DATA(CRX0_MARK, PB8MD_01),
307 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
308
309 PINMUX_DATA(PB7_DATA, PB7MD_00, PB7_IN),
310 PINMUX_DATA(SDA3_MARK, PB7MD_01),
311 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
312 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
313
314 PINMUX_DATA(PB6_DATA, PB6MD_00, PB6_IN),
315 PINMUX_DATA(SCL3_MARK, PB6MD_01),
316 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
317 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
318
319 PINMUX_DATA(PB5_DATA, PB5MD_00, PB5_IN),
320 PINMUX_DATA(SDA2_MARK, PB6MD_01),
321 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
322 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
323
324 PINMUX_DATA(PB4_DATA, PB4MD_00, PB4_IN),
325 PINMUX_DATA(SCL2_MARK, PB4MD_01),
326 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
327 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
328
329 PINMUX_DATA(PB3_DATA, PB3MD_00, PB3_IN),
330 PINMUX_DATA(SDA1_MARK, PB3MD_01),
331 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
332 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
333
334 PINMUX_DATA(PB2_DATA, PB2MD_00, PB2_IN),
335 PINMUX_DATA(SCL1_MARK, PB2MD_01),
336 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
337 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
338
339 PINMUX_DATA(PB1_DATA, PB1MD_00, PB1_IN),
340 PINMUX_DATA(SDA0_MARK, PB1MD_01),
341 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
342 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
343
344 PINMUX_DATA(PB0_DATA, PB0MD_00, PB0_IN),
345 PINMUX_DATA(SCL0_MARK, PB0MD_01),
346 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
347 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
348
349 /* PC */
350 PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
351 PINMUX_DATA(WAIT_MARK, PC14MD_1),
352
353 PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
354 PINMUX_DATA(RDWR_MARK, PC13MD_1),
355
356 PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
357 PINMUX_DATA(CKE_MARK, PC12MD_1),
358
359 PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
360 PINMUX_DATA(CASU_MARK, PC11MD_01),
361 PINMUX_DATA(BREQ_MARK, PC11MD_10),
362
363 PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
364 PINMUX_DATA(RASU_MARK, PC10MD_01),
365 PINMUX_DATA(BACK_MARK, PC10MD_10),
366
367 PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
368 PINMUX_DATA(CASL_MARK, PC9MD_1),
369
370 PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
371 PINMUX_DATA(RASL_MARK, PC8MD_1),
372
373 PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
374 PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
375
376 PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
377 PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
378
379 PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
380 PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
381
382 PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
383 PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
384
385 PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
386 PINMUX_DATA(CS3_MARK, PC3MD_1),
387
388 PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
389 PINMUX_DATA(CS2_MARK, PC2MD_1),
390
391 PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
392 PINMUX_DATA(A1_MARK, PC1MD_1),
393
394 PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
395 PINMUX_DATA(A0_MARK, PC0MD_01),
396 PINMUX_DATA(CS7_MARK, PC0MD_10),
397
398 /* PD */
399 PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
400 PINMUX_DATA(D31_MARK, PD15MD_001),
401 PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
402 PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
403 PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
404
405 PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
406 PINMUX_DATA(D30_MARK, PD14MD_001),
407 PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
408 PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
409
410 PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
411 PINMUX_DATA(D29_MARK, PD13MD_001),
412 PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
413 PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
414 PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
415
416 PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
417 PINMUX_DATA(D28_MARK, PD12MD_001),
418 PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
419 PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
420 PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
421
422 PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
423 PINMUX_DATA(D27_MARK, PD11MD_001),
424 PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
425 PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
426 PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
427
428 PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
429 PINMUX_DATA(D26_MARK, PD10MD_001),
430 PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
431 PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
432 PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
433
434 PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
435 PINMUX_DATA(D25_MARK, PD9MD_001),
436 PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
437 PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
438 PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
439
440 PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
441 PINMUX_DATA(D24_MARK, PD8MD_001),
442 PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
443 PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
444 PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
445
446 PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
447 PINMUX_DATA(D23_MARK, PD7MD_001),
448 PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
449 PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
450 PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
451 PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
452
453 PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
454 PINMUX_DATA(D22_MARK, PD6MD_001),
455 PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
456 PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
457 PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
458 PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
459
460 PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
461 PINMUX_DATA(D21_MARK, PD5MD_001),
462 PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
463 PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
464 PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
465 PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
466
467 PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
468 PINMUX_DATA(D20_MARK, PD4MD_001),
469 PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
470 PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
471 PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
472 PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
473
474 PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
475 PINMUX_DATA(D19_MARK, PD3MD_001),
476 PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
477 PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
478 PINMUX_DATA(DACK3_MARK, PD3MD_100),
479 PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
480
481 PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
482 PINMUX_DATA(D18_MARK, PD2MD_001),
483 PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
484 PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
485 PINMUX_DATA(DREQ3_MARK, PD2MD_100),
486 PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
487
488 PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
489 PINMUX_DATA(D17_MARK, PD1MD_001),
490 PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
491 PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
492 PINMUX_DATA(DACK2_MARK, PD1MD_100),
493 PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
494
495 PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
496 PINMUX_DATA(D16_MARK, PD0MD_001),
497 PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
498 PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
499 PINMUX_DATA(DREQ2_MARK, PD0MD_100),
500 PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
501
502 /* PE */
503 PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
504 PINMUX_DATA(IOIS16_MARK, PE15MD_01),
505 PINMUX_DATA(RTS3_MARK, PE15MD_11),
506
507 PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
508 PINMUX_DATA(CS1_MARK, PE14MD_01),
509 PINMUX_DATA(CTS3_MARK, PE14MD_11),
510
511 PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
512 PINMUX_DATA(TXD3_MARK, PE13MD_11),
513
514 PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
515 PINMUX_DATA(RXD3_MARK, PE12MD_11),
516
517 PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
518 PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
519 PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
520 PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
521
522 PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
523 PINMUX_DATA(CE2B_MARK, PE10MD_001),
524 PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
525 PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
526
527 PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
528 PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
529 PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
530 PINMUX_DATA(SCK3_MARK, PE9MD_11),
531
532 PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
533 PINMUX_DATA(CE2A_MARK, PE8MD_01),
534 PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
535 PINMUX_DATA(SCK2_MARK, PE8MD_11),
536
537 PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
538 PINMUX_DATA(FRAME_MARK, PE7MD_001),
539 PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
540 PINMUX_DATA(TXD2_MARK, PE7MD_011),
541 PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
542
543 PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
544 PINMUX_DATA(A25_MARK, PE6MD_001),
545 PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
546 PINMUX_DATA(RXD2_MARK, PE6MD_011),
547 PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
548
549 PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
550 PINMUX_DATA(A24_MARK, PE5MD_001),
551 PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
552 PINMUX_DATA(TXD1_MARK, PE5MD_011),
553 PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
554
555 PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
556 PINMUX_DATA(A23_MARK, PE4MD_001),
557 PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
558 PINMUX_DATA(RXD1_MARK, PE4MD_011),
559 PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
560
561 PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
562 PINMUX_DATA(A22_MARK, PE3MD_01),
563 PINMUX_DATA(SCK1_MARK, PE3MD_11),
564
565 PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
566 PINMUX_DATA(A21_MARK, PE2MD_01),
567 PINMUX_DATA(SCK0_MARK, PE2MD_11),
568
569 PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
570 PINMUX_DATA(CS4_MARK, PE1MD_01),
571 PINMUX_DATA(MRES_MARK, PE1MD_10),
572 PINMUX_DATA(TXD0_MARK, PE1MD_11),
573
574 PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
575 PINMUX_DATA(BS_MARK, PE0MD_001),
576 PINMUX_DATA(RXD0_MARK, PE0MD_011),
577 PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
578
579 /* PF */
580 PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
581 PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
582
583 PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
584 PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
585
586 PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
587 PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
588
589 PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
590 PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
591
592 PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
593 PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
594
595 PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
596 PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
597
598 PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
599 PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
600
601 PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
602 PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
603 PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
604
605 PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
606 PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
607 PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
608
609 PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
610 PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
611 PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
612
613 PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
614 PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
615 PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
616
617 PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
618 PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
619 PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
620
621 PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
622 PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
623 PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
624
625 PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
626 PINMUX_DATA(FCE_MARK, PF17MD_01),
627 PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
628
629 PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
630 PINMUX_DATA(FRB_MARK, PF16MD_01),
631 PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
632
633 PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
634 PINMUX_DATA(NAF7_MARK, PF15MD_01),
635 PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
636
637 PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
638 PINMUX_DATA(NAF6_MARK, PF14MD_01),
639 PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
640
641 PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
642 PINMUX_DATA(NAF5_MARK, PF13MD_01),
643 PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
644
645 PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
646 PINMUX_DATA(NAF4_MARK, PF12MD_01),
647 PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
648
649 PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
650 PINMUX_DATA(NAF3_MARK, PF11MD_01),
651 PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
652
653 PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
654 PINMUX_DATA(NAF2_MARK, PF10MD_01),
655 PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
656
657 PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
658 PINMUX_DATA(NAF1_MARK, PF9MD_01),
659 PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
660
661 PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
662 PINMUX_DATA(NAF0_MARK, PF8MD_01),
663 PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
664
665 PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
666 PINMUX_DATA(FSC_MARK, PF7MD_01),
667 PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
668 PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
669
670 PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
671 PINMUX_DATA(FOE_MARK, PF6MD_01),
672 PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
673 PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
674
675 PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
676 PINMUX_DATA(FCDE_MARK, PF5MD_01),
677 PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
678 PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
679
680 PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
681 PINMUX_DATA(FWE_MARK, PF4MD_01),
682 PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
683 PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
684
685 PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
686 PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
687 PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
688 PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
689
690 PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
691 PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
692 PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
693 PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
694
695 PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
696 PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
697 PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
698 PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
699
700 PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
701 PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
702 PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
703 PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
704};
705
706static struct pinmux_gpio pinmux_gpios[] = {
707
708 /* PA */
709 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
710 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
711 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
712 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
713 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
714 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
715 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
716 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
717
718 /* PB */
719 PINMUX_GPIO(GPIO_PB12, PB12_DATA),
720 PINMUX_GPIO(GPIO_PB11, PB11_DATA),
721 PINMUX_GPIO(GPIO_PB10, PB10_DATA),
722 PINMUX_GPIO(GPIO_PB9, PB9_DATA),
723 PINMUX_GPIO(GPIO_PB8, PB8_DATA),
724 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
725 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
726 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
727 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
728 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
729 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
730 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
731 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
732
733 /* PC */
734 PINMUX_GPIO(GPIO_PC14, PC14_DATA),
735 PINMUX_GPIO(GPIO_PC13, PC13_DATA),
736 PINMUX_GPIO(GPIO_PC12, PC12_DATA),
737 PINMUX_GPIO(GPIO_PC11, PC11_DATA),
738 PINMUX_GPIO(GPIO_PC10, PC10_DATA),
739 PINMUX_GPIO(GPIO_PC9, PC9_DATA),
740 PINMUX_GPIO(GPIO_PC8, PC8_DATA),
741 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
742 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
743 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
744 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
745 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
746 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
747 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
748 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
749
750 /* PD */
751 PINMUX_GPIO(GPIO_PD15, PD15_DATA),
752 PINMUX_GPIO(GPIO_PD14, PD14_DATA),
753 PINMUX_GPIO(GPIO_PD13, PD13_DATA),
754 PINMUX_GPIO(GPIO_PD12, PD12_DATA),
755 PINMUX_GPIO(GPIO_PD11, PD11_DATA),
756 PINMUX_GPIO(GPIO_PD10, PD10_DATA),
757 PINMUX_GPIO(GPIO_PD9, PD9_DATA),
758 PINMUX_GPIO(GPIO_PD8, PD8_DATA),
759 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
760 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
761 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
762 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
763 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
764 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
765 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
766 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
767
768 /* PE */
769 PINMUX_GPIO(GPIO_PE15, PE15_DATA),
770 PINMUX_GPIO(GPIO_PE14, PE14_DATA),
771 PINMUX_GPIO(GPIO_PE13, PE13_DATA),
772 PINMUX_GPIO(GPIO_PE12, PE12_DATA),
773 PINMUX_GPIO(GPIO_PE11, PE11_DATA),
774 PINMUX_GPIO(GPIO_PE10, PE10_DATA),
775 PINMUX_GPIO(GPIO_PE9, PE9_DATA),
776 PINMUX_GPIO(GPIO_PE8, PE8_DATA),
777 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
778 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
779 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
780 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
781 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
782 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
783 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
784 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
785
786 /* PF */
787 PINMUX_GPIO(GPIO_PF30, PF30_DATA),
788 PINMUX_GPIO(GPIO_PF29, PF29_DATA),
789 PINMUX_GPIO(GPIO_PF28, PF28_DATA),
790 PINMUX_GPIO(GPIO_PF27, PF27_DATA),
791 PINMUX_GPIO(GPIO_PF26, PF26_DATA),
792 PINMUX_GPIO(GPIO_PF25, PF25_DATA),
793 PINMUX_GPIO(GPIO_PF24, PF24_DATA),
794 PINMUX_GPIO(GPIO_PF23, PF23_DATA),
795 PINMUX_GPIO(GPIO_PF22, PF22_DATA),
796 PINMUX_GPIO(GPIO_PF21, PF21_DATA),
797 PINMUX_GPIO(GPIO_PF20, PF20_DATA),
798 PINMUX_GPIO(GPIO_PF19, PF19_DATA),
799 PINMUX_GPIO(GPIO_PF18, PF18_DATA),
800 PINMUX_GPIO(GPIO_PF17, PF17_DATA),
801 PINMUX_GPIO(GPIO_PF16, PF16_DATA),
802 PINMUX_GPIO(GPIO_PF15, PF15_DATA),
803 PINMUX_GPIO(GPIO_PF14, PF14_DATA),
804 PINMUX_GPIO(GPIO_PF13, PF13_DATA),
805 PINMUX_GPIO(GPIO_PF12, PF12_DATA),
806 PINMUX_GPIO(GPIO_PF11, PF11_DATA),
807 PINMUX_GPIO(GPIO_PF10, PF10_DATA),
808 PINMUX_GPIO(GPIO_PF9, PF9_DATA),
809 PINMUX_GPIO(GPIO_PF8, PF8_DATA),
810 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
811 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
812 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
813 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
814 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
815 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
816 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
817 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
818
819 /* INTC */
820 PINMUX_GPIO(GPIO_FN_PINT7_PB, PINT7_PB_MARK),
821 PINMUX_GPIO(GPIO_FN_PINT6_PB, PINT6_PB_MARK),
822 PINMUX_GPIO(GPIO_FN_PINT5_PB, PINT5_PB_MARK),
823 PINMUX_GPIO(GPIO_FN_PINT4_PB, PINT4_PB_MARK),
824 PINMUX_GPIO(GPIO_FN_PINT3_PB, PINT3_PB_MARK),
825 PINMUX_GPIO(GPIO_FN_PINT2_PB, PINT2_PB_MARK),
826 PINMUX_GPIO(GPIO_FN_PINT1_PB, PINT1_PB_MARK),
827 PINMUX_GPIO(GPIO_FN_PINT0_PB, PINT0_PB_MARK),
828 PINMUX_GPIO(GPIO_FN_PINT7_PD, PINT7_PD_MARK),
829 PINMUX_GPIO(GPIO_FN_PINT6_PD, PINT6_PD_MARK),
830 PINMUX_GPIO(GPIO_FN_PINT5_PD, PINT5_PD_MARK),
831 PINMUX_GPIO(GPIO_FN_PINT4_PD, PINT4_PD_MARK),
832 PINMUX_GPIO(GPIO_FN_PINT3_PD, PINT3_PD_MARK),
833 PINMUX_GPIO(GPIO_FN_PINT2_PD, PINT2_PD_MARK),
834 PINMUX_GPIO(GPIO_FN_PINT1_PD, PINT1_PD_MARK),
835 PINMUX_GPIO(GPIO_FN_PINT0_PD, PINT0_PD_MARK),
836 PINMUX_GPIO(GPIO_FN_IRQ7_PB, IRQ7_PB_MARK),
837 PINMUX_GPIO(GPIO_FN_IRQ6_PB, IRQ6_PB_MARK),
838 PINMUX_GPIO(GPIO_FN_IRQ5_PB, IRQ5_PB_MARK),
839 PINMUX_GPIO(GPIO_FN_IRQ4_PB, IRQ4_PB_MARK),
840 PINMUX_GPIO(GPIO_FN_IRQ3_PB, IRQ3_PB_MARK),
841 PINMUX_GPIO(GPIO_FN_IRQ2_PB, IRQ2_PB_MARK),
842 PINMUX_GPIO(GPIO_FN_IRQ1_PB, IRQ1_PB_MARK),
843 PINMUX_GPIO(GPIO_FN_IRQ0_PB, IRQ0_PB_MARK),
844 PINMUX_GPIO(GPIO_FN_IRQ7_PD, IRQ7_PD_MARK),
845 PINMUX_GPIO(GPIO_FN_IRQ6_PD, IRQ6_PD_MARK),
846 PINMUX_GPIO(GPIO_FN_IRQ5_PD, IRQ5_PD_MARK),
847 PINMUX_GPIO(GPIO_FN_IRQ4_PD, IRQ4_PD_MARK),
848 PINMUX_GPIO(GPIO_FN_IRQ3_PD, IRQ3_PD_MARK),
849 PINMUX_GPIO(GPIO_FN_IRQ2_PD, IRQ2_PD_MARK),
850 PINMUX_GPIO(GPIO_FN_IRQ1_PD, IRQ1_PD_MARK),
851 PINMUX_GPIO(GPIO_FN_IRQ0_PD, IRQ0_PD_MARK),
852 PINMUX_GPIO(GPIO_FN_IRQ7_PE, IRQ7_PE_MARK),
853 PINMUX_GPIO(GPIO_FN_IRQ6_PE, IRQ6_PE_MARK),
854 PINMUX_GPIO(GPIO_FN_IRQ5_PE, IRQ5_PE_MARK),
855 PINMUX_GPIO(GPIO_FN_IRQ4_PE, IRQ4_PE_MARK),
856 PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),
857 PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),
858 PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),
859 PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),
860
861 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
862 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
863 PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
864 PINMUX_GPIO(GPIO_FN_IRQOUT_REFOUT, IRQOUT_REFOUT_MARK),
865 PINMUX_GPIO(GPIO_FN_UBCTRG, UBCTRG_MARK),
866
867 /* CAN */
868 PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
869 PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
870 PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
871 PINMUX_GPIO(GPIO_FN_CTX0_CTX1, CTX0_CTX1_MARK),
872 PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
873 PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
874
875 /* IIC3 */
876 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
877 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
878 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
879 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
880 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
881 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
882 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
883 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
884
885 /* DMAC */
886 PINMUX_GPIO(GPIO_FN_TEND0_PD, TEND0_PD_MARK),
887 PINMUX_GPIO(GPIO_FN_TEND0_PE, TEND0_PE_MARK),
888 PINMUX_GPIO(GPIO_FN_DACK0_PD, DACK0_PD_MARK),
889 PINMUX_GPIO(GPIO_FN_DACK0_PE, DACK0_PE_MARK),
890 PINMUX_GPIO(GPIO_FN_DREQ0_PD, DREQ0_PD_MARK),
891 PINMUX_GPIO(GPIO_FN_DREQ0_PE, DREQ0_PE_MARK),
892 PINMUX_GPIO(GPIO_FN_TEND1_PD, TEND1_PD_MARK),
893 PINMUX_GPIO(GPIO_FN_TEND1_PE, TEND1_PE_MARK),
894 PINMUX_GPIO(GPIO_FN_DACK1_PD, DACK1_PD_MARK),
895 PINMUX_GPIO(GPIO_FN_DACK1_PE, DACK1_PE_MARK),
896 PINMUX_GPIO(GPIO_FN_DREQ1_PD, DREQ1_PD_MARK),
897 PINMUX_GPIO(GPIO_FN_DREQ1_PE, DREQ1_PE_MARK),
898 PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
899 PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
900 PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
901 PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
902
903 /* ADC */
904 PINMUX_GPIO(GPIO_FN_ADTRG_PD, ADTRG_PD_MARK),
905 PINMUX_GPIO(GPIO_FN_ADTRG_PE, ADTRG_PE_MARK),
906
907 /* BSC */
908 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
909 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
910 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
911 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
912 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
913 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
914 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
915 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
916 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
917 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
918 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
919 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
920 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
921 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
922 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
923 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
924 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
925 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
926 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
927 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
928 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
929 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
930 PINMUX_GPIO(GPIO_FN_MRES, MRES_MARK),
931 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
932 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
933 PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
934 PINMUX_GPIO(GPIO_FN_CS6_CE1B, CS6_CE1B_MARK),
935 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
936 PINMUX_GPIO(GPIO_FN_CS5_CE1A, CS5_CE1A_MARK),
937 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
938 PINMUX_GPIO(GPIO_FN_FRAME, FRAME_MARK),
939 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
940 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
941 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
942 PINMUX_GPIO(GPIO_FN_CASU, CASU_MARK),
943 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
944 PINMUX_GPIO(GPIO_FN_RASU, RASU_MARK),
945 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
946 PINMUX_GPIO(GPIO_FN_CASL, CASL_MARK),
947 PINMUX_GPIO(GPIO_FN_RASL, RASL_MARK),
948 PINMUX_GPIO(GPIO_FN_WE3_DQMUU_AH_ICIO_WR, WE3_DQMUU_AH_ICIO_WR_MARK),
949 PINMUX_GPIO(GPIO_FN_WE2_DQMUL_ICIORD, WE2_DQMUL_ICIORD_MARK),
950 PINMUX_GPIO(GPIO_FN_WE1_DQMLU_WE, WE1_DQMLU_WE_MARK),
951 PINMUX_GPIO(GPIO_FN_WE0_DQMLL, WE0_DQMLL_MARK),
952 PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
953 PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
954 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
955 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
956 PINMUX_GPIO(GPIO_FN_CS7, CS7_MARK),
957
958 /* TMU */
959 PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
960 PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
961 PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
962 PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
963 PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
964 PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
965 PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
966 PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
967 PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
968 PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
969 PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
970 PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
971 PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
972 PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
973 PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
974 PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
975 PINMUX_GPIO(GPIO_FN_TCLKD_PD, TCLKD_PD_MARK),
976 PINMUX_GPIO(GPIO_FN_TCLKC_PD, TCLKC_PD_MARK),
977 PINMUX_GPIO(GPIO_FN_TCLKB_PD, TCLKB_PD_MARK),
978 PINMUX_GPIO(GPIO_FN_TCLKA_PD, TCLKA_PD_MARK),
979 PINMUX_GPIO(GPIO_FN_TCLKD_PF, TCLKD_PF_MARK),
980 PINMUX_GPIO(GPIO_FN_TCLKC_PF, TCLKC_PF_MARK),
981 PINMUX_GPIO(GPIO_FN_TCLKB_PF, TCLKB_PF_MARK),
982 PINMUX_GPIO(GPIO_FN_TCLKA_PF, TCLKA_PF_MARK),
983
984 /* SSU */
985 PINMUX_GPIO(GPIO_FN_SCS0_PD, SCS0_PD_MARK),
986 PINMUX_GPIO(GPIO_FN_SSO0_PD, SSO0_PD_MARK),
987 PINMUX_GPIO(GPIO_FN_SSI0_PD, SSI0_PD_MARK),
988 PINMUX_GPIO(GPIO_FN_SSCK0_PD, SSCK0_PD_MARK),
989 PINMUX_GPIO(GPIO_FN_SCS0_PF, SCS0_PF_MARK),
990 PINMUX_GPIO(GPIO_FN_SSO0_PF, SSO0_PF_MARK),
991 PINMUX_GPIO(GPIO_FN_SSI0_PF, SSI0_PF_MARK),
992 PINMUX_GPIO(GPIO_FN_SSCK0_PF, SSCK0_PF_MARK),
993 PINMUX_GPIO(GPIO_FN_SCS1_PD, SCS1_PD_MARK),
994 PINMUX_GPIO(GPIO_FN_SSO1_PD, SSO1_PD_MARK),
995 PINMUX_GPIO(GPIO_FN_SSI1_PD, SSI1_PD_MARK),
996 PINMUX_GPIO(GPIO_FN_SSCK1_PD, SSCK1_PD_MARK),
997 PINMUX_GPIO(GPIO_FN_SCS1_PF, SCS1_PF_MARK),
998 PINMUX_GPIO(GPIO_FN_SSO1_PF, SSO1_PF_MARK),
999 PINMUX_GPIO(GPIO_FN_SSI1_PF, SSI1_PF_MARK),
1000 PINMUX_GPIO(GPIO_FN_SSCK1_PF, SSCK1_PF_MARK),
1001
1002 /* SCIF */
1003 PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
1004 PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
1005 PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
1006 PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
1007 PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
1008 PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
1009 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1010 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1011 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1012 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1013 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1014 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1015 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1016 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1017
1018 /* SSI */
1019 PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
1020 PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
1021 PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
1022 PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
1023 PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
1024 PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
1025 PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
1026 PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
1027 PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
1028 PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
1029 PINMUX_GPIO(GPIO_FN_SSIDATA0, SSIDATA0_MARK),
1030 PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
1031 PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
1032
1033 /* FLCTL */
1034 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1035 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1036 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1037 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1038 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1039 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1040 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1041 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1042 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1043 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1044 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1045 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1046 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1047 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1048
1049 /* LCDC */
1050 PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
1051 PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
1052 PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
1053 PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
1054 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
1055 PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
1056 PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
1057 PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
1058 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
1059 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
1060 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
1061 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
1062 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
1063 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
1064 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
1065 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
1066 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
1067 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
1068 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
1069 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
1070 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
1071 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
1072 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
1073 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
1074};
1075
1076static struct pinmux_cfg_reg pinmux_config_regs[] = {
1077 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
1078 0, 0,
1079 0, 0,
1080 0, 0,
1081 0, 0,
1082 PB11_IN, PB11_OUT,
1083 PB10_IN, PB10_OUT,
1084 PB9_IN, PB9_OUT,
1085 PB8_IN, PB8_OUT,
1086 0, 0,
1087 0, 0,
1088 0, 0,
1089 0, 0,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0 }
1094 },
1095 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) {
1096 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1097
1098 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1099
1100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101
1102 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
1103 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1104 },
1105 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4) {
1106 PB11MD_0, PB11MD_1,
1107 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1108
1109 PB10MD_0, PB10MD_1,
1110 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1111
1112 PB9MD_00, PB9MD_01, PB9MD_10, 0,
1113 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1114
1115 PB8MD_00, PB8MD_01, PB8MD_10, 0,
1116 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1117 },
1118 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4) {
1119 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
1120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1121
1122 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
1123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1124
1125 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
1126 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1127
1128 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
1129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1130 },
1131 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4) {
1132 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
1133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1134
1135 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
1136 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1137
1138 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
1139 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1140
1141 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
1142 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1143 },
1144 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4) {
1145 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1146
1147 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1148
1149 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150
1151 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
1152 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1153 },
1154 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1) {
1155 0, 0,
1156 PC14_IN, PC14_OUT,
1157 PC13_IN, PC13_OUT,
1158 PC12_IN, PC12_OUT,
1159 PC11_IN, PC11_OUT,
1160 PC10_IN, PC10_OUT,
1161 PC9_IN, PC9_OUT,
1162 PC8_IN, PC8_OUT,
1163 PC7_IN, PC7_OUT,
1164 PC6_IN, PC6_OUT,
1165 PC5_IN, PC5_OUT,
1166 PC4_IN, PC4_OUT,
1167 PC3_IN, PC3_OUT,
1168 PC2_IN, PC2_OUT,
1169 PC1_IN, PC1_OUT,
1170 PC0_IN, PC0_OUT }
1171 },
1172 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4) {
1173 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1174
1175 PC14MD_0, PC14MD_1,
1176 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1177
1178 PC13MD_0, PC13MD_1,
1179 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1180
1181 PC12MD_0, PC12MD_1,
1182 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1183 },
1184 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4) {
1185 PC11MD_00, PC11MD_01, PC11MD_10, 0,
1186 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1187
1188 PC10MD_00, PC10MD_01, PC10MD_10, 0,
1189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1190
1191 PC9MD_0, PC9MD_1,
1192 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1193
1194 PC8MD_0, PC8MD_1,
1195 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1196 },
1197 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4) {
1198 PC7MD_0, PC7MD_1,
1199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1200
1201 PC6MD_0, PC6MD_1,
1202 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1203
1204 PC5MD_0, PC5MD_1,
1205 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1206
1207 PC4MD_0, PC4MD_1,
1208 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1209 },
1210 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4) {
1211 PC3MD_0, PC3MD_1,
1212 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1213
1214 PC2MD_0, PC2MD_1,
1215 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1216
1217 PC1MD_0, PC1MD_1,
1218 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1219
1220 PC0MD_00, PC0MD_01, PC0MD_10, 0,
1221 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1222 },
1223 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1) {
1224 PD15_IN, PD15_OUT,
1225 PD14_IN, PD14_OUT,
1226 PD13_IN, PD13_OUT,
1227 PD12_IN, PD12_OUT,
1228 PD11_IN, PD11_OUT,
1229 PD10_IN, PD10_OUT,
1230 PD9_IN, PD9_OUT,
1231 PD8_IN, PD8_OUT,
1232 PD7_IN, PD7_OUT,
1233 PD6_IN, PD6_OUT,
1234 PD5_IN, PD5_OUT,
1235 PD4_IN, PD4_OUT,
1236 PD3_IN, PD3_OUT,
1237 PD2_IN, PD2_OUT,
1238 PD1_IN, PD1_OUT,
1239 PD0_IN, PD0_OUT }
1240 },
1241 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4) {
1242 PD15MD_000, PD15MD_001, PD15MD_010, 0,
1243 PD15MD_100, PD15MD_101, 0, 0,
1244 0, 0, 0, 0, 0, 0, 0, 0,
1245
1246 PD14MD_000, PD14MD_001, PD14MD_010, 0,
1247 0, PD14MD_101, 0, 0,
1248 0, 0, 0, 0, 0, 0, 0, 0,
1249
1250 PD13MD_000, PD13MD_001, PD13MD_010, 0,
1251 PD13MD_100, PD13MD_101, 0, 0,
1252 0, 0, 0, 0, 0, 0, 0, 0,
1253
1254 PD12MD_000, PD12MD_001, PD12MD_010, 0,
1255 PD12MD_100, PD12MD_101, 0, 0,
1256 0, 0, 0, 0, 0, 0, 0, 0 }
1257 },
1258 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4) {
1259 PD11MD_000, PD11MD_001, PD11MD_010, 0,
1260 PD11MD_100, PD11MD_101, 0, 0,
1261 0, 0, 0, 0, 0, 0, 0, 0,
1262
1263 PD10MD_000, PD10MD_001, PD10MD_010, 0,
1264 PD10MD_100, PD10MD_101, 0, 0,
1265 0, 0, 0, 0, 0, 0, 0, 0,
1266
1267 PD9MD_000, PD9MD_001, PD9MD_010, 0,
1268 PD9MD_100, PD9MD_101, 0, 0,
1269 0, 0, 0, 0, 0, 0, 0, 0,
1270
1271 PD8MD_000, PD8MD_001, PD8MD_010, 0,
1272 PD8MD_100, PD8MD_101, 0, 0,
1273 0, 0, 0, 0, 0, 0, 0, 0 }
1274 },
1275 { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4) {
1276 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
1277 PD7MD_100, PD7MD_101, 0, 0,
1278 0, 0, 0, 0, 0, 0, 0, 0,
1279
1280 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
1281 PD6MD_100, PD6MD_101, 0, 0,
1282 0, 0, 0, 0, 0, 0, 0, 0,
1283
1284 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
1285 PD5MD_100, PD5MD_101, 0, 0,
1286 0, 0, 0, 0, 0, 0, 0, 0,
1287
1288 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
1289 PD4MD_100, PD4MD_101, 0, 0,
1290 0, 0, 0, 0, 0, 0, 0, 0 }
1291 },
1292 { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4) {
1293 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
1294 PD3MD_100, PD3MD_101, 0, 0,
1295 0, 0, 0, 0, 0, 0, 0, 0,
1296
1297 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
1298 PD2MD_100, PD2MD_101, 0, 0,
1299 0, 0, 0, 0, 0, 0, 0, 0,
1300
1301 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
1302 PD1MD_100, PD1MD_101, 0, 0,
1303 0, 0, 0, 0, 0, 0, 0, 0,
1304
1305 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
1306 PD0MD_100, PD0MD_101, 0, 0,
1307 0, 0, 0, 0, 0, 0, 0, 0 }
1308 },
1309 { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1) {
1310 PE15_IN, PE15_OUT,
1311 PE14_IN, PE14_OUT,
1312 PE13_IN, PE13_OUT,
1313 PE12_IN, PE12_OUT,
1314 PE11_IN, PE11_OUT,
1315 PE10_IN, PE10_OUT,
1316 PE9_IN, PE9_OUT,
1317 PE8_IN, PE8_OUT,
1318 PE7_IN, PE7_OUT,
1319 PE6_IN, PE6_OUT,
1320 PE5_IN, PE5_OUT,
1321 PE4_IN, PE4_OUT,
1322 PE3_IN, PE3_OUT,
1323 PE2_IN, PE2_OUT,
1324 PE1_IN, PE1_OUT,
1325 PE0_IN, PE0_OUT }
1326 },
1327 { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4) {
1328 PE15MD_00, PE15MD_01, 0, PE15MD_11,
1329 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1330
1331 PE14MD_00, PE14MD_01, 0, PE14MD_11,
1332 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1333
1334 PE13MD_00, 0, 0, PE13MD_11,
1335 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1336
1337 PE12MD_00, 0, 0, PE12MD_11,
1338 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1339 },
1340 { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4) {
1341 PE11MD_000, PE11MD_001, PE11MD_010, 0,
1342 PE11MD_100, 0, 0, 0,
1343 0, 0, 0, 0, 0, 0, 0, 0,
1344
1345 PE10MD_000, PE10MD_001, PE10MD_010, 0,
1346 PE10MD_100, 0, 0, 0,
1347 0, 0, 0, 0, 0, 0, 0, 0,
1348
1349 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
1350 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1351
1352 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
1353 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1354 },
1355 { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4) {
1356 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
1357 PE7MD_100, 0, 0, 0,
1358 0, 0, 0, 0, 0, 0, 0, 0,
1359
1360 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
1361 PE6MD_100, 0, 0, 0,
1362 0, 0, 0, 0, 0, 0, 0, 0,
1363
1364 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
1365 PE5MD_100, 0, 0, 0,
1366 0, 0, 0, 0, 0, 0, 0, 0,
1367
1368 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
1369 PE4MD_100, 0, 0, 0,
1370 0, 0, 0, 0, 0, 0, 0, 0 }
1371 },
1372 { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4) {
1373 PE3MD_00, PE3MD_01, 0, PE3MD_11,
1374 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1375
1376 PE2MD_00, PE2MD_01, 0, PE2MD_11,
1377 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1378
1379 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
1380 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1381
1382 PE0MD_000, PE0MD_001, 0, PE0MD_011,
1383 PE0MD_100, 0, 0, 0,
1384 0, 0, 0, 0, 0, 0, 0, 0 }
1385 },
1386 { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1) {
1387 0, 0,
1388 PF30_IN, PF30_OUT,
1389 PF29_IN, PF29_OUT,
1390 PF28_IN, PF28_OUT,
1391 PF27_IN, PF27_OUT,
1392 PF26_IN, PF26_OUT,
1393 PF25_IN, PF25_OUT,
1394 PF24_IN, PF24_OUT,
1395 PF23_IN, PF23_OUT,
1396 PF22_IN, PF22_OUT,
1397 PF21_IN, PF21_OUT,
1398 PF20_IN, PF20_OUT,
1399 PF19_IN, PF19_OUT,
1400 PF18_IN, PF18_OUT,
1401 PF17_IN, PF17_OUT,
1402 PF16_IN, PF16_OUT }
1403 },
1404 { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1) {
1405 PF15_IN, PF15_OUT,
1406 PF14_IN, PF14_OUT,
1407 PF13_IN, PF13_OUT,
1408 PF12_IN, PF12_OUT,
1409 PF11_IN, PF11_OUT,
1410 PF10_IN, PF10_OUT,
1411 PF9_IN, PF9_OUT,
1412 PF8_IN, PF8_OUT,
1413 PF7_IN, PF7_OUT,
1414 PF6_IN, PF6_OUT,
1415 PF5_IN, PF5_OUT,
1416 PF4_IN, PF4_OUT,
1417 PF3_IN, PF3_OUT,
1418 PF2_IN, PF2_OUT,
1419 PF1_IN, PF1_OUT,
1420 PF0_IN, PF0_OUT }
1421 },
1422 { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4) {
1423 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1424
1425 PF30MD_0, PF30MD_1,
1426 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1427
1428 PF29MD_0, PF29MD_1,
1429 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1430
1431 PF28MD_0, PF28MD_1,
1432 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1433 },
1434 { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4) {
1435 PF27MD_0, PF27MD_1,
1436 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1437
1438 PF26MD_0, PF26MD_1,
1439 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1440
1441 PF25MD_0, PF25MD_1,
1442 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1443
1444 PF24MD_0, PF24MD_1,
1445 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1446 },
1447 { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4) {
1448 PF23MD_00, PF23MD_01, PF23MD_10, 0,
1449 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1450
1451 PF22MD_00, PF22MD_01, PF22MD_10, 0,
1452 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1453
1454 PF21MD_00, PF21MD_01, PF21MD_10, 0,
1455 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1456
1457 PF20MD_00, PF20MD_01, PF20MD_10, 0,
1458 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1459 },
1460 { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4) {
1461 PF19MD_00, PF19MD_01, PF19MD_10, 0,
1462 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1463
1464 PF18MD_00, PF18MD_01, PF18MD_10, 0,
1465 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1466
1467 PF17MD_00, PF17MD_01, PF17MD_10, 0,
1468 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1469
1470 PF16MD_00, PF16MD_01, PF16MD_10, 0,
1471 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1472 },
1473 { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4) {
1474 PF15MD_00, PF15MD_01, PF15MD_10, 0,
1475 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1476
1477 PF14MD_00, PF14MD_01, PF14MD_10, 0,
1478 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1479
1480 PF13MD_00, PF13MD_01, PF13MD_10, 0,
1481 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1482
1483 PF12MD_00, PF12MD_01, PF12MD_10, 0,
1484 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1485 },
1486 { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4) {
1487 PF11MD_00, PF11MD_01, PF11MD_10, 0,
1488 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489
1490 PF10MD_00, PF10MD_01, PF10MD_10, 0,
1491 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1492
1493 PF9MD_00, PF9MD_01, PF9MD_10, 0,
1494 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1495
1496 PF8MD_00, PF8MD_01, PF8MD_10, 0,
1497 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1498 },
1499 { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4) {
1500 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
1501 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1502
1503 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
1504 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1505
1506 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
1507 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1508
1509 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
1510 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1511 },
1512 { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4) {
1513 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
1514 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1515
1516 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
1517 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1518
1519 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
1520 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1521
1522 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
1523 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1524 },
1525 {}
1526};
1527
1528static struct pinmux_data_reg pinmux_data_regs[] = {
1529 { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
1530 0, 0, 0, 0,
1531 0, 0, 0, 0,
1532 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1533 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1534 },
1535 { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16) {
1536 0, 0, 0, PB12_DATA,
1537 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
1538 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1539 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1540 },
1541 { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16) {
1542 0, PC14_DATA, PC13_DATA, PC12_DATA,
1543 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
1544 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1545 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1546 },
1547 { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16) {
1548 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
1549 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
1550 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1551 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1552 },
1553 { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16) {
1554 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
1555 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
1556 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
1557 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1558 },
1559 { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16) {
1560 0, PF30_DATA, PF29_DATA, PF28_DATA,
1561 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
1562 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
1563 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
1564 },
1565 { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16) {
1566 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
1567 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
1568 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1569 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1570 },
1571 { },
1572};
1573
1574static struct pinmux_info sh7203_pinmux_info = {
1575 .name = "sh7203_pfc",
1576 .reserved_id = PINMUX_RESERVED,
1577 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1578 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1579 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1580 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1581 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1582
1583 .first_gpio = GPIO_PA7,
1584 .last_gpio = GPIO_FN_LCD_DATA0,
1585
1586 .gpios = pinmux_gpios,
1587 .cfg_regs = pinmux_config_regs,
1588 .data_regs = pinmux_data_regs,
1589
1590 .gpio_data = pinmux_data,
1591 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1592};
1593
1594static int __init plat_pinmux_setup(void)
1595{
1596 return register_pinmux(&sh7203_pinmux_info);
1597}
1598
1599arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 511de55af832..e07c69e16d9b 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -24,4 +24,8 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
24clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o 24clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o
25clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o 25clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o
26 26
27# Pinmux setup
28pinmux-$(CONFIG_CPU_SUBTYPE_SH7720) := pinmux-sh7720.o
29
27obj-y += $(clock-y) 30obj-y += $(clock-y)
31obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
diff --git a/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c b/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c
new file mode 100644
index 000000000000..b66c239509a2
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c
@@ -0,0 +1,1242 @@
1/*
2 * SH7720 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/gpio.h>
14#include <asm/sh7720.h>
15
16enum {
17 PINMUX_RESERVED = 0,
18
19 PINMUX_DATA_BEGIN,
20 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
21 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
22 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
23 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
24 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
25 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
26 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
27 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
28 PTE6_DATA, PTE5_DATA, PTE4_DATA,
29 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
30 PTF6_DATA, PTF5_DATA, PTF4_DATA,
31 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
32 PTG6_DATA, PTG5_DATA, PTG4_DATA,
33 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
34 PTH6_DATA, PTH5_DATA, PTH4_DATA,
35 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
36 PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
37 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
38 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
39 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, PTL3_DATA,
40 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
41 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
42 PTP4_DATA, PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
43 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
44 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
45 PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
46 PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
47 PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
48 PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
49 PINMUX_DATA_END,
50
51 PINMUX_INPUT_BEGIN,
52 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
53 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
54 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
55 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
56 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
57 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
58 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
59 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
60 PTE6_IN, PTE5_IN, PTE4_IN,
61 PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
62 PTF6_IN, PTF5_IN, PTF4_IN,
63 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
64 PTG6_IN, PTG5_IN, PTG4_IN,
65 PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
66 PTH6_IN, PTH5_IN, PTH4_IN,
67 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
68 PTJ6_IN, PTJ5_IN, PTJ4_IN,
69 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
70 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
71 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, PTL3_IN,
72 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
73 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
74 PTP4_IN, PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
75 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
76 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
77 PTS4_IN, PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
78 PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
79 PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
80 PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
81 PINMUX_INPUT_END,
82
83 PINMUX_INPUT_PULLUP_BEGIN,
84 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
85 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
86 PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
87 PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
88 PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
89 PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
90 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
91 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
92 PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
93 PTF0_IN_PU,
94 PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU,
95 PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU,
96 PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
97 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
98 PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
99 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
100 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
101 PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU,
102 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
103 PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
104 PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU,
105 PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
106 PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
107 PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
108 PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
109 PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
110 PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
111 PINMUX_INPUT_PULLUP_END,
112
113 PINMUX_OUTPUT_BEGIN,
114 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
115 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
116 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
117 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
118 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
119 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
120 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
121 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
122 PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
123 PTF0_OUT,
124 PTG6_OUT, PTG5_OUT, PTG4_OUT,
125 PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
126 PTH6_OUT, PTH5_OUT, PTH4_OUT,
127 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
128 PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
129 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
130 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
131 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, PTL3_OUT,
132 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
133 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
134 PTP4_OUT, PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
135 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
136 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
137 PTS4_OUT, PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
138 PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
139 PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
140 PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
141 PINMUX_OUTPUT_END,
142
143 PINMUX_FUNCTION_BEGIN,
144 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
145 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
146 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
147 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
148 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
149 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
150 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
151 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
152 PTE6_FN, PTE5_FN, PTE4_FN,
153 PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
154 PTF6_FN, PTF5_FN, PTF4_FN,
155 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
156 PTG6_FN, PTG5_FN, PTG4_FN,
157 PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
158 PTH6_FN, PTH5_FN, PTH4_FN,
159 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
160 PTJ6_FN, PTJ5_FN, PTJ4_FN,
161 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
162 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
163 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, PTL3_FN,
164 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
165 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
166 PTP4_FN, PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
167 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
168 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
169 PTS4_FN, PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
170 PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
171 PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
172 PTV4_FN, PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
173
174 PSELA_1_0_00, PSELA_1_0_01, PSELA_1_0_10,
175 PSELA_3_2_00, PSELA_3_2_01, PSELA_3_2_10, PSELA_3_2_11,
176 PSELA_5_4_00, PSELA_5_4_01, PSELA_5_4_10, PSELA_5_4_11,
177 PSELA_7_6_00, PSELA_7_6_01, PSELA_7_6_10,
178 PSELA_9_8_00, PSELA_9_8_01, PSELA_9_8_10,
179 PSELA_11_10_00, PSELA_11_10_01, PSELA_11_10_10,
180 PSELA_13_12_00, PSELA_13_12_10,
181 PSELA_15_14_00, PSELA_15_14_10,
182 PSELB_9_8_00, PSELB_9_8_11,
183 PSELB_11_10_00, PSELB_11_10_01, PSELB_11_10_10, PSELB_11_10_11,
184 PSELB_13_12_00, PSELB_13_12_01, PSELB_13_12_10, PSELB_13_12_11,
185 PSELB_15_14_00, PSELB_15_14_11,
186 PSELC_9_8_00, PSELC_9_8_10,
187 PSELC_11_10_00, PSELC_11_10_10,
188 PSELC_13_12_00, PSELC_13_12_01, PSELC_13_12_10,
189 PSELC_15_14_00, PSELC_15_14_01, PSELC_15_14_10,
190 PSELD_1_0_00, PSELD_1_0_10,
191 PSELD_11_10_00, PSELD_11_10_01,
192 PSELD_15_14_00, PSELD_15_14_01, PSELD_15_14_10,
193 PINMUX_FUNCTION_END,
194
195 PINMUX_MARK_BEGIN,
196 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
197 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
198 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
199 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
200 IOIS16_MARK, RAS_MARK, CAS_MARK, CKE_MARK,
201 CS5B_CE1A_MARK, CS6B_CE1B_MARK,
202 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
203 A21_MARK, A20_MARK, A19_MARK, A0_MARK,
204 REFOUT_MARK, IRQOUT_MARK,
205 LCD_DATA15_MARK, LCD_DATA14_MARK,
206 LCD_DATA13_MARK, LCD_DATA12_MARK,
207 LCD_DATA11_MARK, LCD_DATA10_MARK,
208 LCD_DATA9_MARK, LCD_DATA8_MARK,
209 LCD_DATA7_MARK, LCD_DATA6_MARK,
210 LCD_DATA5_MARK, LCD_DATA4_MARK,
211 LCD_DATA3_MARK, LCD_DATA2_MARK,
212 LCD_DATA1_MARK, LCD_DATA0_MARK,
213 LCD_M_DISP_MARK,
214 LCD_CL1_MARK, LCD_CL2_MARK,
215 LCD_DON_MARK, LCD_FLM_MARK,
216 LCD_VEPWC_MARK, LCD_VCPWC_MARK,
217 AFE_RXIN_MARK, AFE_RDET_MARK,
218 AFE_FS_MARK, AFE_TXOUT_MARK,
219 AFE_SCLK_MARK, AFE_RLYCNT_MARK,
220 AFE_HC1_MARK,
221 IIC_SCL_MARK, IIC_SDA_MARK,
222 DA1_MARK, DA0_MARK,
223 AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK,
224 USB1D_RCV_MARK, USB1D_TXSE0_MARK,
225 USB1D_TXDPLS_MARK, USB1D_DMNS_MARK,
226 USB1D_DPLS_MARK, USB1D_SPEED_MARK,
227 USB1D_TXENL_MARK,
228 USB2_PWR_EN_MARK, USB1_PWR_EN_USBF_UPLUP_MARK, USB1D_SUSPEND_MARK,
229 IRQ5_MARK, IRQ4_MARK,
230 IRQ3_IRL3_MARK, IRQ2_IRL2_MARK,
231 IRQ1_IRL1_MARK, IRQ0_IRL0_MARK,
232 PCC_REG_MARK, PCC_DRV_MARK,
233 PCC_BVD2_MARK, PCC_BVD1_MARK,
234 PCC_CD2_MARK, PCC_CD1_MARK,
235 PCC_RESET_MARK, PCC_RDY_MARK,
236 PCC_VS2_MARK, PCC_VS1_MARK,
237 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
238 AUDCK_MARK, AUDSYNC_MARK, ASEBRKAK_MARK, TRST_MARK,
239 TMS_MARK, TDO_MARK, TDI_MARK, TCK_MARK,
240 DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK,
241 TEND1_MARK, TEND0_MARK,
242 SIOF0_SYNC_MARK, SIOF0_MCLK_MARK,
243 SIOF0_TXD_MARK, SIOF0_RXD_MARK,
244 SIOF0_SCK_MARK,
245 SIOF1_SYNC_MARK, SIOF1_MCLK_MARK,
246 SIOF1_TXD_MARK, SIOF1_RXD_MARK,
247 SIOF1_SCK_MARK,
248 SCIF0_TXD_MARK, SCIF0_RXD_MARK,
249 SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
250 SCIF1_TXD_MARK, SCIF1_RXD_MARK,
251 SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
252 TPU_TO1_MARK, TPU_TO0_MARK,
253 TPU_TI3B_MARK, TPU_TI3A_MARK,
254 TPU_TI2B_MARK, TPU_TI2A_MARK,
255 TPU_TO3_MARK, TPU_TO2_MARK,
256 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
257 MMC_DAT_MARK, MMC_CMD_MARK,
258 MMC_CLK_MARK, MMC_VDDON_MARK,
259 MMC_ODMOD_MARK,
260 STATUS0_MARK, STATUS1_MARK,
261 PINMUX_MARK_END,
262};
263
264static pinmux_enum_t pinmux_data[] = {
265 /* PTA GPIO */
266 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
267 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
268 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
269 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
270 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
271 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
272 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
273 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
274
275 /* PTB GPIO */
276 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
277 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
278 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
279 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
280 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
281 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
282 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
283 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
284
285 /* PTC GPIO */
286 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
287 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
288 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
289 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
290 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
291 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
292 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
293 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
294
295 /* PTD GPIO */
296 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
297 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
298 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
299 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
300 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
301 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
302 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
303 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
304
305 /* PTE GPIO */
306 PINMUX_DATA(PTE6_DATA, PTE6_IN),
307 PINMUX_DATA(PTE5_DATA, PTE5_IN),
308 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
309 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
310 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
311 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
312 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
313
314 /* PTF GPIO */
315 PINMUX_DATA(PTF6_DATA, PTF6_IN),
316 PINMUX_DATA(PTF5_DATA, PTF5_IN),
317 PINMUX_DATA(PTF4_DATA, PTF4_IN),
318 PINMUX_DATA(PTF3_DATA, PTF3_IN),
319 PINMUX_DATA(PTF2_DATA, PTF2_IN),
320 PINMUX_DATA(PTF1_DATA, PTF1_IN),
321 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
322
323 /* PTG GPIO */
324 PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU),
325 PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU),
326 PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU),
327 PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU),
328 PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU),
329 PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU),
330 PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU),
331
332 /* PTH GPIO */
333 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
334 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
335 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
336 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
337 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
338 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
339 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
340
341 /* PTJ GPIO */
342 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU),
343 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU),
344 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU),
345 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
346 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
347 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
348 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
349
350 /* PTK GPIO */
351 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
352 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
353 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
354 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
355
356 /* PTL GPIO */
357 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
358 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
359 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
360 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
361 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
362
363 /* PTM GPIO */
364 PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
365 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
366 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
367 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
368 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
369 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
370 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
371 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
372
373 /* PTP GPIO */
374 PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU),
375 PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU),
376 PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU),
377 PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU),
378 PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU),
379
380 /* PTR GPIO */
381 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
382 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
383 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
384 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
385 PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU),
386 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU),
387 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
388 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
389
390 /* PTS GPIO */
391 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
392 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
393 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
394 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
395 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
396
397 /* PTT GPIO */
398 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
399 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
400 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
401 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
402 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
403
404 /* PTU GPIO */
405 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
406 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
407 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
408 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
409 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
410
411 /* PTV GPIO */
412 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
413 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
414 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
415 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
416 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
417
418 /* PTA FN */
419 PINMUX_DATA(D23_MARK, PTA7_FN),
420 PINMUX_DATA(D22_MARK, PTA6_FN),
421 PINMUX_DATA(D21_MARK, PTA5_FN),
422 PINMUX_DATA(D20_MARK, PTA4_FN),
423 PINMUX_DATA(D19_MARK, PTA3_FN),
424 PINMUX_DATA(D18_MARK, PTA2_FN),
425 PINMUX_DATA(D17_MARK, PTA1_FN),
426 PINMUX_DATA(D16_MARK, PTA0_FN),
427
428 /* PTB FN */
429 PINMUX_DATA(D31_MARK, PTB7_FN),
430 PINMUX_DATA(D30_MARK, PTB6_FN),
431 PINMUX_DATA(D29_MARK, PTB5_FN),
432 PINMUX_DATA(D28_MARK, PTB4_FN),
433 PINMUX_DATA(D27_MARK, PTB3_FN),
434 PINMUX_DATA(D26_MARK, PTB2_FN),
435 PINMUX_DATA(D25_MARK, PTB1_FN),
436 PINMUX_DATA(D24_MARK, PTB0_FN),
437
438 /* PTC FN */
439 PINMUX_DATA(LCD_DATA7_MARK, PTC7_FN),
440 PINMUX_DATA(LCD_DATA6_MARK, PTC6_FN),
441 PINMUX_DATA(LCD_DATA5_MARK, PTC5_FN),
442 PINMUX_DATA(LCD_DATA4_MARK, PTC4_FN),
443 PINMUX_DATA(LCD_DATA3_MARK, PTC3_FN),
444 PINMUX_DATA(LCD_DATA2_MARK, PTC2_FN),
445 PINMUX_DATA(LCD_DATA1_MARK, PTC1_FN),
446 PINMUX_DATA(LCD_DATA0_MARK, PTC0_FN),
447
448 /* PTD FN */
449 PINMUX_DATA(LCD_DATA15_MARK, PTD7_FN),
450 PINMUX_DATA(LCD_DATA14_MARK, PTD6_FN),
451 PINMUX_DATA(LCD_DATA13_MARK, PTD5_FN),
452 PINMUX_DATA(LCD_DATA12_MARK, PTD4_FN),
453 PINMUX_DATA(LCD_DATA11_MARK, PTD3_FN),
454 PINMUX_DATA(LCD_DATA10_MARK, PTD2_FN),
455 PINMUX_DATA(LCD_DATA9_MARK, PTD1_FN),
456 PINMUX_DATA(LCD_DATA8_MARK, PTD0_FN),
457
458 /* PTE FN */
459 PINMUX_DATA(IIC_SCL_MARK, PSELB_9_8_00, PTE6_FN),
460 PINMUX_DATA(AFE_RXIN_MARK, PSELB_9_8_11, PTE6_FN),
461 PINMUX_DATA(IIC_SDA_MARK, PSELB_9_8_00, PTE5_FN),
462 PINMUX_DATA(AFE_RDET_MARK, PSELB_9_8_11, PTE5_FN),
463 PINMUX_DATA(LCD_M_DISP_MARK, PTE4_FN),
464 PINMUX_DATA(LCD_CL1_MARK, PTE3_FN),
465 PINMUX_DATA(LCD_CL2_MARK, PTE2_FN),
466 PINMUX_DATA(LCD_DON_MARK, PTE1_FN),
467 PINMUX_DATA(LCD_FLM_MARK, PTE0_FN),
468
469 /* PTF FN */
470 PINMUX_DATA(DA1_MARK, PTF6_FN),
471 PINMUX_DATA(DA0_MARK, PTF5_FN),
472 PINMUX_DATA(AN3_MARK, PTF4_FN),
473 PINMUX_DATA(AN2_MARK, PTF3_FN),
474 PINMUX_DATA(AN1_MARK, PTF2_FN),
475 PINMUX_DATA(AN0_MARK, PTF1_FN),
476 PINMUX_DATA(ADTRG_MARK, PTF0_FN),
477
478 /* PTG FN */
479 PINMUX_DATA(USB1D_RCV_MARK, PSELA_3_2_00, PTG6_FN),
480 PINMUX_DATA(AFE_FS_MARK, PSELA_3_2_01, PTG6_FN),
481 PINMUX_DATA(PCC_REG_MARK, PSELA_3_2_10, PTG6_FN),
482 PINMUX_DATA(IRQ5_MARK, PSELA_3_2_11, PTG6_FN),
483 PINMUX_DATA(USB1D_TXSE0_MARK, PSELA_5_4_00, PTG5_FN),
484 PINMUX_DATA(AFE_TXOUT_MARK, PSELA_5_4_01, PTG5_FN),
485 PINMUX_DATA(PCC_DRV_MARK, PSELA_5_4_10, PTG5_FN),
486 PINMUX_DATA(IRQ4_MARK, PSELA_5_4_11, PTG5_FN),
487 PINMUX_DATA(USB1D_TXDPLS_MARK, PSELA_7_6_00, PTG4_FN),
488 PINMUX_DATA(AFE_SCLK_MARK, PSELA_7_6_01, PTG4_FN),
489 PINMUX_DATA(IOIS16_MARK, PSELA_7_6_10, PTG4_FN),
490 PINMUX_DATA(USB1D_DMNS_MARK, PSELA_9_8_00, PTG3_FN),
491 PINMUX_DATA(AFE_RLYCNT_MARK, PSELA_9_8_01, PTG3_FN),
492 PINMUX_DATA(PCC_BVD2_MARK, PSELA_9_8_10, PTG3_FN),
493 PINMUX_DATA(USB1D_DPLS_MARK, PSELA_11_10_00, PTG2_FN),
494 PINMUX_DATA(AFE_HC1_MARK, PSELA_11_10_01, PTG2_FN),
495 PINMUX_DATA(PCC_BVD1_MARK, PSELA_11_10_10, PTG2_FN),
496 PINMUX_DATA(USB1D_SPEED_MARK, PSELA_13_12_00, PTG1_FN),
497 PINMUX_DATA(PCC_CD2_MARK, PSELA_13_12_10, PTG1_FN),
498 PINMUX_DATA(USB1D_TXENL_MARK, PSELA_15_14_00, PTG0_FN),
499 PINMUX_DATA(PCC_CD1_MARK, PSELA_15_14_10, PTG0_FN),
500
501 /* PTH FN */
502 PINMUX_DATA(RAS_MARK, PTH6_FN),
503 PINMUX_DATA(CAS_MARK, PTH5_FN),
504 PINMUX_DATA(CKE_MARK, PTH4_FN),
505 PINMUX_DATA(STATUS1_MARK, PTH3_FN),
506 PINMUX_DATA(STATUS0_MARK, PTH2_FN),
507 PINMUX_DATA(USB2_PWR_EN_MARK, PTH1_FN),
508 PINMUX_DATA(USB1_PWR_EN_USBF_UPLUP_MARK, PTH0_FN),
509
510 /* PTJ FN */
511 PINMUX_DATA(AUDCK_MARK, PTJ6_FN),
512 PINMUX_DATA(ASEBRKAK_MARK, PTJ5_FN),
513 PINMUX_DATA(AUDATA3_MARK, PTJ4_FN),
514 PINMUX_DATA(AUDATA2_MARK, PTJ3_FN),
515 PINMUX_DATA(AUDATA1_MARK, PTJ2_FN),
516 PINMUX_DATA(AUDATA0_MARK, PTJ1_FN),
517 PINMUX_DATA(AUDSYNC_MARK, PTJ0_FN),
518
519 /* PTK FN */
520 PINMUX_DATA(PCC_RESET_MARK, PTK3_FN),
521 PINMUX_DATA(PCC_RDY_MARK, PTK2_FN),
522 PINMUX_DATA(PCC_VS2_MARK, PTK1_FN),
523 PINMUX_DATA(PCC_VS1_MARK, PTK0_FN),
524
525 /* PTL FN */
526 PINMUX_DATA(TRST_MARK, PTL7_FN),
527 PINMUX_DATA(TMS_MARK, PTL6_FN),
528 PINMUX_DATA(TDO_MARK, PTL5_FN),
529 PINMUX_DATA(TDI_MARK, PTL4_FN),
530 PINMUX_DATA(TCK_MARK, PTL3_FN),
531
532 /* PTM FN */
533 PINMUX_DATA(DREQ1_MARK, PTM7_FN),
534 PINMUX_DATA(DREQ0_MARK, PTM6_FN),
535 PINMUX_DATA(DACK1_MARK, PTM5_FN),
536 PINMUX_DATA(DACK0_MARK, PTM4_FN),
537 PINMUX_DATA(TEND1_MARK, PTM3_FN),
538 PINMUX_DATA(TEND0_MARK, PTM2_FN),
539 PINMUX_DATA(CS5B_CE1A_MARK, PTM1_FN),
540 PINMUX_DATA(CS6B_CE1B_MARK, PTM0_FN),
541
542 /* PTP FN */
543 PINMUX_DATA(USB1D_SUSPEND_MARK, PSELA_1_0_00, PTP4_FN),
544 PINMUX_DATA(REFOUT_MARK, PSELA_1_0_01, PTP4_FN),
545 PINMUX_DATA(IRQOUT_MARK, PSELA_1_0_10, PTP4_FN),
546 PINMUX_DATA(IRQ3_IRL3_MARK, PTP3_FN),
547 PINMUX_DATA(IRQ2_IRL2_MARK, PTP2_FN),
548 PINMUX_DATA(IRQ1_IRL1_MARK, PTP1_FN),
549 PINMUX_DATA(IRQ0_IRL0_MARK, PTP0_FN),
550
551 /* PTR FN */
552 PINMUX_DATA(A25_MARK, PTR7_FN),
553 PINMUX_DATA(A24_MARK, PTR6_FN),
554 PINMUX_DATA(A23_MARK, PTR5_FN),
555 PINMUX_DATA(A22_MARK, PTR4_FN),
556 PINMUX_DATA(A21_MARK, PTR3_FN),
557 PINMUX_DATA(A20_MARK, PTR2_FN),
558 PINMUX_DATA(A19_MARK, PTR1_FN),
559 PINMUX_DATA(A0_MARK, PTR0_FN),
560
561 /* PTS FN */
562 PINMUX_DATA(SIOF0_SYNC_MARK, PTS4_FN),
563 PINMUX_DATA(SIOF0_MCLK_MARK, PTS3_FN),
564 PINMUX_DATA(SIOF0_TXD_MARK, PTS2_FN),
565 PINMUX_DATA(SIOF0_RXD_MARK, PTS1_FN),
566 PINMUX_DATA(SIOF0_SCK_MARK, PTS0_FN),
567
568 /* PTT FN */
569 PINMUX_DATA(SCIF0_CTS_MARK, PSELB_15_14_00, PTT4_FN),
570 PINMUX_DATA(TPU_TO1_MARK, PSELB_15_14_11, PTT4_FN),
571 PINMUX_DATA(SCIF0_RTS_MARK, PSELB_15_14_00, PTT3_FN),
572 PINMUX_DATA(TPU_TO0_MARK, PSELB_15_14_11, PTT3_FN),
573 PINMUX_DATA(SCIF0_TXD_MARK, PTT2_FN),
574 PINMUX_DATA(SCIF0_RXD_MARK, PTT1_FN),
575 PINMUX_DATA(SCIF0_SCK_MARK, PTT0_FN),
576
577 /* PTU FN */
578 PINMUX_DATA(SIOF1_SYNC_MARK, PTU4_FN),
579 PINMUX_DATA(SIOF1_MCLK_MARK, PSELD_11_10_00, PTU3_FN),
580 PINMUX_DATA(TPU_TI3B_MARK, PSELD_11_10_01, PTU3_FN),
581 PINMUX_DATA(SIOF1_TXD_MARK, PSELD_15_14_00, PTU2_FN),
582 PINMUX_DATA(TPU_TI3A_MARK, PSELD_15_14_01, PTU2_FN),
583 PINMUX_DATA(MMC_DAT_MARK, PSELD_15_14_10, PTU2_FN),
584 PINMUX_DATA(SIOF1_RXD_MARK, PSELC_13_12_00, PTU1_FN),
585 PINMUX_DATA(TPU_TI2B_MARK, PSELC_13_12_01, PTU1_FN),
586 PINMUX_DATA(MMC_CMD_MARK, PSELC_13_12_10, PTU1_FN),
587 PINMUX_DATA(SIOF1_SCK_MARK, PSELC_15_14_00, PTU0_FN),
588 PINMUX_DATA(TPU_TI2A_MARK, PSELC_15_14_01, PTU0_FN),
589 PINMUX_DATA(MMC_CLK_MARK, PSELC_15_14_10, PTU0_FN),
590
591 /* PTV FN */
592 PINMUX_DATA(SCIF1_CTS_MARK, PSELB_11_10_00, PTV4_FN),
593 PINMUX_DATA(TPU_TO3_MARK, PSELB_11_10_01, PTV4_FN),
594 PINMUX_DATA(MMC_VDDON_MARK, PSELB_11_10_10, PTV4_FN),
595 PINMUX_DATA(LCD_VEPWC_MARK, PSELB_11_10_11, PTV4_FN),
596 PINMUX_DATA(SCIF1_RTS_MARK, PSELB_13_12_00, PTV3_FN),
597 PINMUX_DATA(TPU_TO2_MARK, PSELB_13_12_01, PTV3_FN),
598 PINMUX_DATA(MMC_ODMOD_MARK, PSELB_13_12_10, PTV3_FN),
599 PINMUX_DATA(LCD_VCPWC_MARK, PSELB_13_12_11, PTV3_FN),
600 PINMUX_DATA(SCIF1_TXD_MARK, PSELC_9_8_00, PTV2_FN),
601 PINMUX_DATA(SIM_D_MARK, PSELC_9_8_10, PTV2_FN),
602 PINMUX_DATA(SCIF1_RXD_MARK, PSELC_11_10_00, PTV1_FN),
603 PINMUX_DATA(SIM_RST_MARK, PSELC_11_10_10, PTV1_FN),
604 PINMUX_DATA(SCIF1_SCK_MARK, PSELD_1_0_00, PTV0_FN),
605 PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN),
606};
607
608static struct pinmux_gpio pinmux_gpios[] = {
609 /* PTA */
610 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
611 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
612 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
613 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
614 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
615 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
616 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
617 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
618
619 /* PTB */
620 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
621 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
622 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
623 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
624 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
625 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
626 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
627 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
628
629 /* PTC */
630 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
631 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
632 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
633 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
634 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
635 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
636 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
637 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
638
639 /* PTD */
640 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
641 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
642 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
643 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
644 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
645 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
646 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
647 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
648
649 /* PTE */
650 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
651 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
652 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
653 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
654 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
655 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
656 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
657
658 /* PTF */
659 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
660 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
661 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
662 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
663 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
664 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
665 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
666
667 /* PTG */
668 PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
669 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
670 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
671 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
672 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
673 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
674 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
675
676 /* PTH */
677 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
678 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
679 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
680 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
681 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
682 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
683 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
684
685 /* PTJ */
686 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
687 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
688 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
689 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
690 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
691 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
692 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
693
694 /* PTK */
695 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
696 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
697 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
698 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
699
700 /* PTL */
701 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
702 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
703 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
704 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
705 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
706
707 /* PTM */
708 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
709 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
710 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
711 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
712 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
713 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
714 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
715 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
716
717 /* PTP */
718 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
719 PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
720 PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
721 PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
722 PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
723
724 /* PTR */
725 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
726 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
727 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
728 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
729 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
730 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
731 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
732 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
733
734 /* PTS */
735 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
736 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
737 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
738 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
739 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
740
741 /* PTT */
742 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
743 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
744 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
745 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
746 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
747
748 /* PTU */
749 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
750 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
751 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
752 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
753 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
754
755 /* PTV */
756 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
757 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
758 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
759 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
760 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
761
762 /* BSC */
763 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
764 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
765 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
766 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
767 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
768 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
769 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
770 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
771 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
772 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
773 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
774 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
775 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
776 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
777 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
778 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
779 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
780 PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
781 PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
782 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
783 PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
784 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
785 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
786 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
787 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
788 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
789 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
790 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
791 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
792 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
793 PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
794 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
795
796 /* LCDC */
797 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
798 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
799 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
800 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
801 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
802 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
803 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
804 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
805 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
806 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
807 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
808 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
809 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
810 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
811 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
812 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
813 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
814 PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
815 PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
816 PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
817 PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
818 PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
819 PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
820
821 /* AFEIF */
822 PINMUX_GPIO(GPIO_FN_AFE_RXIN, AFE_RXIN_MARK),
823 PINMUX_GPIO(GPIO_FN_AFE_RDET, AFE_RDET_MARK),
824 PINMUX_GPIO(GPIO_FN_AFE_FS, AFE_FS_MARK),
825 PINMUX_GPIO(GPIO_FN_AFE_TXOUT, AFE_TXOUT_MARK),
826 PINMUX_GPIO(GPIO_FN_AFE_SCLK, AFE_SCLK_MARK),
827 PINMUX_GPIO(GPIO_FN_AFE_RLYCNT, AFE_RLYCNT_MARK),
828 PINMUX_GPIO(GPIO_FN_AFE_HC1, AFE_HC1_MARK),
829
830 /* IIC */
831 PINMUX_GPIO(GPIO_FN_IIC_SCL, IIC_SCL_MARK),
832 PINMUX_GPIO(GPIO_FN_IIC_SDA, IIC_SDA_MARK),
833
834 /* DAC */
835 PINMUX_GPIO(GPIO_FN_DA1, DA1_MARK),
836 PINMUX_GPIO(GPIO_FN_DA0, DA0_MARK),
837
838 /* ADC */
839 PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK),
840 PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK),
841 PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK),
842 PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK),
843 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
844
845 /* USB */
846 PINMUX_GPIO(GPIO_FN_USB1D_RCV, USB1D_RCV_MARK),
847 PINMUX_GPIO(GPIO_FN_USB1D_TXSE0, USB1D_TXSE0_MARK),
848 PINMUX_GPIO(GPIO_FN_USB1D_TXDPLS, USB1D_TXDPLS_MARK),
849 PINMUX_GPIO(GPIO_FN_USB1D_DMNS, USB1D_DMNS_MARK),
850 PINMUX_GPIO(GPIO_FN_USB1D_DPLS, USB1D_DPLS_MARK),
851 PINMUX_GPIO(GPIO_FN_USB1D_SPEED, USB1D_SPEED_MARK),
852 PINMUX_GPIO(GPIO_FN_USB1D_TXENL, USB1D_TXENL_MARK),
853
854 PINMUX_GPIO(GPIO_FN_USB2_PWR_EN, USB2_PWR_EN_MARK),
855 PINMUX_GPIO(GPIO_FN_USB1_PWR_EN_USBF_UPLUP,
856 USB1_PWR_EN_USBF_UPLUP_MARK),
857 PINMUX_GPIO(GPIO_FN_USB1D_SUSPEND, USB1D_SUSPEND_MARK),
858
859 /* INTC */
860 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
861 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
862 PINMUX_GPIO(GPIO_FN_IRQ3_IRL3, IRQ3_IRL3_MARK),
863 PINMUX_GPIO(GPIO_FN_IRQ2_IRL2, IRQ2_IRL2_MARK),
864 PINMUX_GPIO(GPIO_FN_IRQ1_IRL1, IRQ1_IRL1_MARK),
865 PINMUX_GPIO(GPIO_FN_IRQ0_IRL0, IRQ0_IRL0_MARK),
866
867 /* PCC */
868 PINMUX_GPIO(GPIO_FN_PCC_REG, PCC_REG_MARK),
869 PINMUX_GPIO(GPIO_FN_PCC_DRV, PCC_DRV_MARK),
870 PINMUX_GPIO(GPIO_FN_PCC_BVD2, PCC_BVD2_MARK),
871 PINMUX_GPIO(GPIO_FN_PCC_BVD1, PCC_BVD1_MARK),
872 PINMUX_GPIO(GPIO_FN_PCC_CD2, PCC_CD2_MARK),
873 PINMUX_GPIO(GPIO_FN_PCC_CD1, PCC_CD1_MARK),
874 PINMUX_GPIO(GPIO_FN_PCC_RESET, PCC_RESET_MARK),
875 PINMUX_GPIO(GPIO_FN_PCC_RDY, PCC_RDY_MARK),
876 PINMUX_GPIO(GPIO_FN_PCC_VS2, PCC_VS2_MARK),
877 PINMUX_GPIO(GPIO_FN_PCC_VS1, PCC_VS1_MARK),
878
879 /* HUDI */
880 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
881 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
882 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
883 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
884 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
885 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
886 PINMUX_GPIO(GPIO_FN_ASEBRKAK, ASEBRKAK_MARK),
887 PINMUX_GPIO(GPIO_FN_TRST, TRST_MARK),
888 PINMUX_GPIO(GPIO_FN_TMS, TMS_MARK),
889 PINMUX_GPIO(GPIO_FN_TDO, TDO_MARK),
890 PINMUX_GPIO(GPIO_FN_TDI, TDI_MARK),
891 PINMUX_GPIO(GPIO_FN_TCK, TCK_MARK),
892
893 /* DMAC */
894 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
895 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
896 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
897 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
898 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
899 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
900
901 /* SIOF0 */
902 PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
903 PINMUX_GPIO(GPIO_FN_SIOF0_MCLK, SIOF0_MCLK_MARK),
904 PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
905 PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
906 PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
907
908 /* SIOF1 */
909 PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
910 PINMUX_GPIO(GPIO_FN_SIOF1_MCLK, SIOF1_MCLK_MARK),
911 PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
912 PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
913 PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
914
915 /* SCIF0 */
916 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
917 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
918 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
919 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
920 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
921
922 /* SCIF1 */
923 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
924 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
925 PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
926 PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
927 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
928
929 /* TPU */
930 PINMUX_GPIO(GPIO_FN_TPU_TO1, TPU_TO1_MARK),
931 PINMUX_GPIO(GPIO_FN_TPU_TO0, TPU_TO0_MARK),
932 PINMUX_GPIO(GPIO_FN_TPU_TI3B, TPU_TI3B_MARK),
933 PINMUX_GPIO(GPIO_FN_TPU_TI3A, TPU_TI3A_MARK),
934 PINMUX_GPIO(GPIO_FN_TPU_TI2B, TPU_TI2B_MARK),
935 PINMUX_GPIO(GPIO_FN_TPU_TI2A, TPU_TI2A_MARK),
936 PINMUX_GPIO(GPIO_FN_TPU_TO3, TPU_TO3_MARK),
937 PINMUX_GPIO(GPIO_FN_TPU_TO2, TPU_TO2_MARK),
938
939 /* SIM */
940 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
941 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
942 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
943
944 /* MMC */
945 PINMUX_GPIO(GPIO_FN_MMC_DAT, MMC_DAT_MARK),
946 PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK),
947 PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK),
948 PINMUX_GPIO(GPIO_FN_MMC_VDDON, MMC_VDDON_MARK),
949 PINMUX_GPIO(GPIO_FN_MMC_ODMOD, MMC_ODMOD_MARK),
950
951 /* SYSC */
952 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
953 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
954};
955
956static struct pinmux_cfg_reg pinmux_config_regs[] = {
957 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
958 PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
959 PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
960 PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
961 PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
962 PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
963 PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
964 PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
965 PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
966 },
967 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
968 PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
969 PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
970 PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
971 PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
972 PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
973 PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
974 PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
975 PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
976 },
977 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
978 PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
979 PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
980 PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
981 PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
982 PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
983 PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
984 PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
985 PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
986 },
987 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
988 PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
989 PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
990 PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
991 PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
992 PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
993 PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
994 PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
995 PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
996 },
997 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
998 0, 0, 0, 0,
999 PTE6_FN, 0, 0, PTE6_IN,
1000 PTE5_FN, 0, 0, PTE5_IN,
1001 PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
1002 PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
1003 PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
1004 PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
1005 PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
1006 },
1007 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1008 0, 0, 0, 0,
1009 PTF6_FN, 0, 0, PTF6_IN,
1010 PTF5_FN, 0, 0, PTF5_IN,
1011 PTF4_FN, 0, 0, PTF4_IN,
1012 PTF3_FN, 0, 0, PTF3_IN,
1013 PTF2_FN, 0, 0, PTF2_IN,
1014 PTF1_FN, 0, 0, PTF1_IN,
1015 PTF0_FN, 0, 0, PTF0_IN }
1016 },
1017 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1018 0, 0, 0, 0,
1019 PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN,
1020 PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN,
1021 PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN,
1022 PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN,
1023 PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN,
1024 PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN,
1025 PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN }
1026 },
1027 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1028 0, 0, 0, 0,
1029 PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
1030 PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
1031 PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
1032 PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
1033 PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
1034 PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
1035 PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
1036 },
1037 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1038 0, 0, 0, 0,
1039 PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN,
1040 PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN,
1041 PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN,
1042 PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
1043 PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
1044 PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1045 PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1046 },
1047 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1048 0, 0, 0, 0,
1049 0, 0, 0, 0,
1050 0, 0, 0, 0,
1051 0, 0, 0, 0,
1052 PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
1053 PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
1054 PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
1055 PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
1056 },
1057 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1058 PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
1059 PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
1060 PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
1061 PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
1062 PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
1063 0, 0, 0, 0,
1064 0, 0, 0, 0,
1065 0, 0, 0, 0 }
1066 },
1067 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1068 PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
1069 PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
1070 PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
1071 PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
1072 PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
1073 PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
1074 PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
1075 PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
1076 },
1077 { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) {
1078 0, 0, 0, 0,
1079 0, 0, 0, 0,
1080 0, 0, 0, 0,
1081 PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN,
1082 PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN,
1083 PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN,
1084 PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN,
1085 PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN }
1086 },
1087 { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) {
1088 PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
1089 PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
1090 PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
1091 PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
1092 PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN,
1093 PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN,
1094 PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
1095 PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
1096 },
1097 { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) {
1098 0, 0, 0, 0,
1099 0, 0, 0, 0,
1100 0, 0, 0, 0,
1101 PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
1102 PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
1103 PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
1104 PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
1105 PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
1106 },
1107 { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) {
1108 0, 0, 0, 0,
1109 0, 0, 0, 0,
1110 0, 0, 0, 0,
1111 PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
1112 PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
1113 PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
1114 PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
1115 PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
1116 },
1117 { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) {
1118 0, 0, 0, 0,
1119 0, 0, 0, 0,
1120 0, 0, 0, 0,
1121 PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
1122 PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
1123 PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
1124 PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
1125 PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
1126 },
1127 { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) {
1128 0, 0, 0, 0,
1129 0, 0, 0, 0,
1130 0, 0, 0, 0,
1131 PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
1132 PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
1133 PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
1134 PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
1135 PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
1136 },
1137 {}
1138};
1139
1140static struct pinmux_data_reg pinmux_data_regs[] = {
1141 { PINMUX_DATA_REG("PADR", 0xa4050140, 8) {
1142 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1143 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1144 },
1145 { PINMUX_DATA_REG("PBDR", 0xa4050142, 8) {
1146 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1147 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1148 },
1149 { PINMUX_DATA_REG("PCDR", 0xa4050144, 8) {
1150 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
1151 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
1152 },
1153 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1154 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1155 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1156 },
1157 { PINMUX_DATA_REG("PEDR", 0xa4050148, 8) {
1158 0, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1159 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
1160 },
1161 { PINMUX_DATA_REG("PFDR", 0xa405014a, 8) {
1162 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1163 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1164 },
1165 { PINMUX_DATA_REG("PGDR", 0xa405014c, 8) {
1166 0, PTG6_DATA, PTG5_DATA, PTG4_DATA,
1167 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1168 },
1169 { PINMUX_DATA_REG("PHDR", 0xa405014e, 8) {
1170 0, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1171 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1172 },
1173 { PINMUX_DATA_REG("PJDR", 0xa4050150, 8) {
1174 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
1175 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1176 },
1177 { PINMUX_DATA_REG("PKDR", 0xa4050152, 8) {
1178 0, 0, 0, 0,
1179 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1180 },
1181 { PINMUX_DATA_REG("PLDR", 0xa4050154, 8) {
1182 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1183 PTL3_DATA, 0, 0, 0 }
1184 },
1185 { PINMUX_DATA_REG("PMDR", 0xa4050156, 8) {
1186 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1187 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1188 },
1189 { PINMUX_DATA_REG("PPDR", 0xa4050158, 8) {
1190 0, 0, 0, PTP4_DATA,
1191 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
1192 },
1193 { PINMUX_DATA_REG("PRDR", 0xa405015a, 8) {
1194 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
1195 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1196 },
1197 { PINMUX_DATA_REG("PSDR", 0xa405015c, 8) {
1198 0, 0, 0, PTS4_DATA,
1199 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1200 },
1201 { PINMUX_DATA_REG("PTDR", 0xa405015e, 8) {
1202 0, 0, 0, PTT4_DATA,
1203 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1204 },
1205 { PINMUX_DATA_REG("PUDR", 0xa4050160, 8) {
1206 0, 0, 0, PTU4_DATA,
1207 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1208 },
1209 { PINMUX_DATA_REG("PVDR", 0xa4050162, 8) {
1210 0, 0, 0, PTV4_DATA,
1211 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1212 },
1213 { },
1214};
1215
1216static struct pinmux_info sh7720_pinmux_info = {
1217 .name = "sh7720_pfc",
1218 .reserved_id = PINMUX_RESERVED,
1219 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1220 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1221 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1222 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1223 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1224 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1225
1226 .first_gpio = GPIO_PTA7,
1227 .last_gpio = GPIO_FN_STATUS1,
1228
1229 .gpios = pinmux_gpios,
1230 .cfg_regs = pinmux_config_regs,
1231 .data_regs = pinmux_data_regs,
1232
1233 .gpio_data = pinmux_data,
1234 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1235};
1236
1237static int __init plat_pinmux_setup(void)
1238{
1239 return register_pinmux(&sh7720_pinmux_info);
1240}
1241
1242arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 9381ad8da263..be9a0c185958 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -27,5 +27,10 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o
27clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o 27clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o
28clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o 28clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
29 29
30# Pinmux setup
31pinmux-$(CONFIG_CPU_SUBTYPE_SH7722) := pinmux-sh7722.o
32pinmux-$(CONFIG_CPU_SUBTYPE_SH7723) := pinmux-sh7723.o
33
30obj-y += $(clock-y) 34obj-y += $(clock-y)
31obj-$(CONFIG_SMP) += $(smp-y) 35obj-$(CONFIG_SMP) += $(smp-y)
36obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
new file mode 100644
index 000000000000..51b12ab58c9e
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
@@ -0,0 +1,1783 @@
1#include <linux/init.h>
2#include <linux/kernel.h>
3#include <linux/gpio.h>
4#include <asm/sh7722.h>
5
6enum {
7 PINMUX_RESERVED = 0,
8
9 PINMUX_DATA_BEGIN,
10 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
11 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
12 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
13 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
14 PTC7_DATA, PTC5_DATA, PTC4_DATA, PTC3_DATA, PTC2_DATA, PTC0_DATA,
15 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
16 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
17 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, PTE1_DATA, PTE0_DATA,
18 PTF6_DATA, PTF5_DATA, PTF4_DATA,
19 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
20 PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
21 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
22 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
23 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ1_DATA, PTJ0_DATA,
24 PTK6_DATA, PTK5_DATA, PTK4_DATA,
25 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
26 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
27 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
28 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
29 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
30 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
31 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
32 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
33 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
34 PTR4_DATA, PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
35 PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
36 PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
37 PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
38 PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
39 PTW6_DATA, PTW5_DATA, PTW4_DATA,
40 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
41 PTX6_DATA, PTX5_DATA, PTX4_DATA,
42 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
43 PTY6_DATA, PTY5_DATA, PTY4_DATA,
44 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
45 PTZ5_DATA, PTZ4_DATA, PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
46 PINMUX_DATA_END,
47
48 PINMUX_INPUT_BEGIN,
49 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
50 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
51 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
52 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
53 PTC7_IN, PTC5_IN, PTC4_IN, PTC3_IN, PTC2_IN, PTC0_IN,
54 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, PTD3_IN, PTD2_IN, PTD1_IN,
55 PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, PTE1_IN, PTE0_IN,
56 PTF6_IN, PTF5_IN, PTF4_IN, PTF3_IN, PTF2_IN, PTF1_IN,
57 PTH6_IN, PTH5_IN, PTH1_IN, PTH0_IN,
58 PTJ1_IN, PTJ0_IN,
59 PTK6_IN, PTK5_IN, PTK4_IN, PTK3_IN, PTK2_IN, PTK0_IN,
60 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
61 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
62 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
63 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
64 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
65 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
66 PTQ5_IN, PTQ4_IN, PTQ3_IN, PTQ2_IN, PTQ0_IN,
67 PTR2_IN,
68 PTS4_IN, PTS2_IN, PTS1_IN,
69 PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN,
70 PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
71 PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
72 PTW6_IN, PTW4_IN, PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
73 PTX6_IN, PTX5_IN, PTX4_IN, PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
74 PTY5_IN, PTY4_IN, PTY3_IN, PTY2_IN, PTY0_IN,
75 PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
76 PINMUX_INPUT_END,
77
78 PINMUX_INPUT_PULLDOWN_BEGIN,
79 PTA7_IN_PD, PTA6_IN_PD, PTA5_IN_PD, PTA4_IN_PD,
80 PTA3_IN_PD, PTA2_IN_PD, PTA1_IN_PD, PTA0_IN_PD,
81 PTE7_IN_PD, PTE6_IN_PD, PTE5_IN_PD, PTE4_IN_PD, PTE1_IN_PD, PTE0_IN_PD,
82 PTF6_IN_PD, PTF5_IN_PD, PTF4_IN_PD, PTF3_IN_PD, PTF2_IN_PD, PTF1_IN_PD,
83 PTH6_IN_PD, PTH5_IN_PD, PTH1_IN_PD, PTH0_IN_PD,
84 PTK6_IN_PD, PTK5_IN_PD, PTK4_IN_PD, PTK3_IN_PD, PTK2_IN_PD, PTK0_IN_PD,
85 PTL7_IN_PD, PTL6_IN_PD, PTL5_IN_PD, PTL4_IN_PD,
86 PTL3_IN_PD, PTL2_IN_PD, PTL1_IN_PD, PTL0_IN_PD,
87 PTM7_IN_PD, PTM6_IN_PD, PTM5_IN_PD, PTM4_IN_PD,
88 PTM3_IN_PD, PTM2_IN_PD, PTM1_IN_PD, PTM0_IN_PD,
89 PTQ5_IN_PD, PTQ4_IN_PD, PTQ3_IN_PD, PTQ2_IN_PD,
90 PTS4_IN_PD, PTS2_IN_PD, PTS1_IN_PD,
91 PTT4_IN_PD, PTT3_IN_PD, PTT2_IN_PD, PTT1_IN_PD,
92 PTU4_IN_PD, PTU3_IN_PD, PTU2_IN_PD, PTU1_IN_PD, PTU0_IN_PD,
93 PTV4_IN_PD, PTV3_IN_PD, PTV2_IN_PD, PTV1_IN_PD, PTV0_IN_PD,
94 PTW6_IN_PD, PTW4_IN_PD, PTW3_IN_PD, PTW2_IN_PD, PTW1_IN_PD, PTW0_IN_PD,
95 PTX6_IN_PD, PTX5_IN_PD, PTX4_IN_PD,
96 PTX3_IN_PD, PTX2_IN_PD, PTX1_IN_PD, PTX0_IN_PD,
97 PINMUX_INPUT_PULLDOWN_END,
98
99 PINMUX_INPUT_PULLUP_BEGIN,
100 PTC7_IN_PU, PTC5_IN_PU,
101 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
102 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU,
103 PTJ1_IN_PU, PTJ0_IN_PU,
104 PTQ0_IN_PU,
105 PTR2_IN_PU,
106 PTX6_IN_PU,
107 PTY5_IN_PU, PTY4_IN_PU, PTY3_IN_PU, PTY2_IN_PU, PTY0_IN_PU,
108 PTZ5_IN_PU, PTZ4_IN_PU, PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU,
109 PINMUX_INPUT_PULLUP_END,
110
111 PINMUX_OUTPUT_BEGIN,
112 PTA7_OUT, PTA5_OUT,
113 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
114 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
115 PTC4_OUT, PTC3_OUT, PTC2_OUT, PTC0_OUT,
116 PTD6_OUT, PTD5_OUT, PTD4_OUT,
117 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
118 PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, PTE1_OUT, PTE0_OUT,
119 PTF6_OUT, PTF5_OUT, PTF4_OUT, PTF3_OUT, PTF2_OUT, PTF0_OUT,
120 PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
121 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
122 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
123 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ1_OUT, PTJ0_OUT,
124 PTK6_OUT, PTK5_OUT, PTK4_OUT, PTK3_OUT, PTK1_OUT, PTK0_OUT,
125 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
126 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
127 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
128 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
129 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
130 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
131 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
132 PTR4_OUT, PTR3_OUT, PTR1_OUT, PTR0_OUT,
133 PTS3_OUT, PTS2_OUT, PTS0_OUT,
134 PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT0_OUT,
135 PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU0_OUT,
136 PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
137 PTW5_OUT, PTW4_OUT, PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
138 PTX6_OUT, PTX5_OUT, PTX4_OUT, PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
139 PTY5_OUT, PTY4_OUT, PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
140 PINMUX_OUTPUT_END,
141
142 PINMUX_MARK_BEGIN,
143 SCIF0_TXD_MARK, SCIF0_RXD_MARK,
144 SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
145 SCIF1_TXD_MARK, SCIF1_RXD_MARK,
146 SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
147 SCIF2_TXD_MARK, SCIF2_RXD_MARK,
148 SCIF2_RTS_MARK, SCIF2_CTS_MARK, SCIF2_SCK_MARK,
149 SIOTXD_MARK, SIORXD_MARK,
150 SIOD_MARK, SIOSTRB0_MARK, SIOSTRB1_MARK,
151 SIOSCK_MARK, SIOMCK_MARK,
152 VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
153 VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
154 VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
155 VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
156 VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK, VIO_FLD_MARK,
157 VIO_CKO_MARK, VIO_STEX_MARK, VIO_STEM_MARK, VIO_VD2_MARK,
158 VIO_HD2_MARK, VIO_CLK2_MARK,
159 LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
160 LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
161 LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
162 LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
163 LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
164 LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
165 LCDLCLK_MARK, LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
166 LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
167 LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
168 LCDDON2_MARK, LCDVCPWC2_MARK, LCDVEPWC2_MARK, LCDVSYN2_MARK,
169 LCDCS2_MARK,
170 IOIS16_MARK, A25_MARK, A24_MARK, A23_MARK, A22_MARK,
171 BS_MARK, CS6B_CE1B_MARK, WAIT_MARK, CS6A_CE2B_MARK,
172 HPD63_MARK, HPD62_MARK, HPD61_MARK, HPD60_MARK,
173 HPD59_MARK, HPD58_MARK, HPD57_MARK, HPD56_MARK,
174 HPD55_MARK, HPD54_MARK, HPD53_MARK, HPD52_MARK,
175 HPD51_MARK, HPD50_MARK, HPD49_MARK, HPD48_MARK,
176 HPDQM7_MARK, HPDQM6_MARK, HPDQM5_MARK, HPDQM4_MARK,
177 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
178 IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
179 SDHICD_MARK, SDHIWP_MARK, SDHID3_MARK, SDHID2_MARK,
180 SDHID1_MARK, SDHID0_MARK, SDHICMD_MARK, SDHICLK_MARK,
181 SIUAOLR_MARK, SIUAOBT_MARK, SIUAISLD_MARK, SIUAILR_MARK,
182 SIUAIBT_MARK, SIUAOSLD_MARK, SIUMCKA_MARK, SIUFCKA_MARK,
183 SIUBOLR_MARK, SIUBOBT_MARK, SIUBISLD_MARK, SIUBILR_MARK,
184 SIUBIBT_MARK, SIUBOSLD_MARK, SIUMCKB_MARK, SIUFCKB_MARK,
185 AUDSYNC_MARK, AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
186 DACK_MARK, DREQ0_MARK,
187 DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
188 DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
189 DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
190 DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
191 DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
192 STATUS0_MARK, PDSTATUS_MARK,
193 SIOF0_MCK_MARK, SIOF0_SCK_MARK,
194 SIOF0_SYNC_MARK, SIOF0_SS1_MARK, SIOF0_SS2_MARK,
195 SIOF0_TXD_MARK, SIOF0_RXD_MARK,
196 SIOF1_MCK_MARK, SIOF1_SCK_MARK,
197 SIOF1_SYNC_MARK, SIOF1_SS1_MARK, SIOF1_SS2_MARK,
198 SIOF1_TXD_MARK, SIOF1_RXD_MARK,
199 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
200 TS_SDAT_MARK, TS_SCK_MARK, TS_SDEN_MARK, TS_SPSYNC_MARK,
201 IRDA_IN_MARK, IRDA_OUT_MARK,
202 TPUTO_MARK,
203 FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
204 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
205 FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
206 KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
207 KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
208 KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
209 PINMUX_MARK_END,
210
211 PINMUX_FUNCTION_BEGIN,
212 VIO_D7_SCIF1_SCK, VIO_D6_SCIF1_RXD, VIO_D5_SCIF1_TXD, VIO_D4,
213 VIO_D3, VIO_D2, VIO_D1, VIO_D0_LCDLCLK,
214 HPD55, HPD54, HPD53, HPD52, HPD51, HPD50, HPD49, HPD48,
215 IOIS16, HPDQM7, HPDQM6, HPDQM5, HPDQM4,
216 SDHICD, SDHIWP, SDHID3, IRQ2_SDHID2, SDHID1, SDHID0, SDHICMD, SDHICLK,
217 A25, A24, A23, A22, IRQ5, IRQ4_BS,
218 PTF6, SIOSCK_SIUBOBT, SIOSTRB1_SIUBOLR,
219 SIOSTRB0_SIUBIBT, SIOD_SIUBILR, SIORXD_SIUBISLD, SIOTXD_SIUBOSLD,
220 AUDSYNC, AUDATA3, AUDATA2, AUDATA1, AUDATA0,
221 LCDVCPWC_LCDVCPWC2, LCDVSYN2_DACK, LCDVSYN, LCDDISP_LCDRS,
222 LCDHSYN_LCDCS, LCDDON_LCDDON2, LCDD17_DV_HSYNC, LCDD16_DV_VSYNC,
223 STATUS0, PDSTATUS, IRQ1, IRQ0,
224 SIUAILR_SIOF1_SS2, SIUAIBT_SIOF1_SS1, SIUAOLR_SIOF1_SYNC,
225 SIUAOBT_SIOF1_SCK, SIUAISLD_SIOF1_RXD, SIUAOSLD_SIOF1_TXD, PTK0,
226 LCDD15_DV_D15, LCDD14_DV_D14, LCDD13_DV_D13, LCDD12_DV_D12,
227 LCDD11_DV_D11, LCDD10_DV_D10, LCDD9_DV_D9, LCDD8_DV_D8,
228 LCDD7_DV_D7, LCDD6_DV_D6, LCDD5_DV_D5, LCDD4_DV_D4,
229 LCDD3_DV_D3, LCDD2_DV_D2, LCDD1_DV_D1, LCDD0_DV_D0,
230 HPD63, HPD62, HPD61, HPD60, HPD59, HPD58, HPD57, HPD56,
231 SIOF0_SS2_SIM_RST, SIOF0_SS1_TS_SPSYNC, SIOF0_SYNC_TS_SDEN,
232 SIOF0_SCK_TS_SCK, PTQ2, PTQ1, PTQ0,
233 LCDRD, CS6B_CE1B_LCDCS2, WAIT, LCDDCK_LCDWR, LCDVEPWC_LCDVEPWC2,
234 SCIF0_CTS_SIUAISPD, SCIF0_RTS_SIUAOSPD,
235 SCIF0_SCK_TPUTO, SCIF0_RXD, SCIF0_TXD,
236 FOE_VIO_VD2, FWE, FSC, DREQ0, FCDE,
237 NAF2_VIO_D10, NAF1_VIO_D9, NAF0_VIO_D8,
238 FRB_VIO_CLK2, FCE_VIO_HD2,
239 NAF7_VIO_D15, NAF6_VIO_D14, NAF5_VIO_D13, NAF4_VIO_D12, NAF3_VIO_D11,
240 VIO_FLD_SCIF2_CTS, VIO_CKO_SCIF2_RTS, VIO_STEX_SCIF2_SCK,
241 VIO_STEM_SCIF2_TXD, VIO_HD_SCIF2_RXD,
242 VIO_VD_SCIF1_CTS, VIO_CLK_SCIF1_RTS,
243 CS6A_CE2B, LCDD23, LCDD22, LCDD21, LCDD20,
244 LCDD19_DV_CLKI, LCDD18_DV_CLK,
245 KEYOUT5_IN5, KEYOUT4_IN6, KEYOUT3, KEYOUT2, KEYOUT1, KEYOUT0,
246 KEYIN4_IRQ7, KEYIN3, KEYIN2, KEYIN1, KEYIN0_IRQ6,
247
248 PSA15_KEYIN0, PSA15_IRQ6, PSA14_KEYIN4, PSA14_IRQ7,
249 PSA9_IRQ4, PSA9_BS, PSA4_IRQ2, PSA4_SDHID2,
250 PSB15_SIOTXD, PSB15_SIUBOSLD, PSB14_SIORXD, PSB14_SIUBISLD,
251 PSB13_SIOD, PSB13_SIUBILR, PSB12_SIOSTRB0, PSB12_SIUBIBT,
252 PSB11_SIOSTRB1, PSB11_SIUBOLR, PSB10_SIOSCK, PSB10_SIUBOBT,
253 PSB9_SIOMCK, PSB9_SIUMCKB, PSB8_SIOF0_MCK, PSB8_IRQ3,
254 PSB7_SIOF0_TXD, PSB7_IRDA_OUT, PSB6_SIOF0_RXD, PSB6_IRDA_IN,
255 PSB5_SIOF0_SCK, PSB5_TS_SCK, PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
256 PSB3_SIOF0_SS1, PSB3_TS_SPSYNC, PSB2_SIOF0_SS2, PSB2_SIM_RST,
257 PSB1_SIUMCKA, PSB1_SIOF1_MCK, PSB0_SIUAOSLD, PSB0_SIOF1_TXD,
258 PSC15_SIUAISLD, PSC15_SIOF1_RXD, PSC14_SIUAOBT, PSC14_SIOF1_SCK,
259 PSC13_SIUAOLR, PSC13_SIOF1_SYNC, PSC12_SIUAIBT, PSC12_SIOF1_SS1,
260 PSC11_SIUAILR, PSC11_SIOF1_SS2, PSC0_NAF, PSC0_VIO,
261 PSD13_VIO, PSD13_SCIF2, PSD12_VIO, PSD12_SCIF1,
262 PSD11_VIO, PSD11_SCIF1, PSD10_VIO_D0, PSD10_LCDLCLK,
263 PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB, PSD8_SCIF0_SCK, PSD8_TPUTO,
264 PSD7_SCIF0_RTS, PSD7_SIUAOSPD, PSD6_SCIF0_CTS, PSD6_SIUAISPD,
265 PSD5_CS6B_CE1B, PSD5_LCDCS2,
266 PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
267 PSD2_LCDDON, PSD2_LCDDON2, PSD0_LCDD19_LCDD0, PSD0_DV,
268 PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
269 PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
270 PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT, PSE12_LCDVSYN2, PSE12_DACK,
271 PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
272 PSE3_FLCTL, PSE3_VIO, PSE2_NAF2, PSE2_VIO_D10,
273 PSE1_NAF1, PSE1_VIO_D9, PSE0_NAF0, PSE0_VIO_D8,
274
275 HIZA14_KEYSC, HIZA14_HIZ,
276 HIZA10_NAF, HIZA10_HIZ,
277 HIZA9_VIO, HIZA9_HIZ,
278 HIZA8_LCDC, HIZA8_HIZ,
279 HIZA7_LCDC, HIZA7_HIZ,
280 HIZA6_LCDC, HIZA6_HIZ,
281 HIZB1_VIO, HIZB1_HIZ,
282 HIZB0_VIO, HIZB0_HIZ,
283 HIZC15_IRQ7, HIZC15_HIZ,
284 HIZC14_IRQ6, HIZC14_HIZ,
285 HIZC13_IRQ5, HIZC13_HIZ,
286 HIZC12_IRQ4, HIZC12_HIZ,
287 HIZC11_IRQ3, HIZC11_HIZ,
288 HIZC10_IRQ2, HIZC10_HIZ,
289 HIZC9_IRQ1, HIZC9_HIZ,
290 HIZC8_IRQ0, HIZC8_HIZ,
291 MSELB9_VIO, MSELB9_VIO2,
292 MSELB8_RGB, MSELB8_SYS,
293 PINMUX_FUNCTION_END,
294};
295
296static pinmux_enum_t pinmux_data[] = {
297 /* PTA */
298 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT),
299 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD),
300 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_IN_PD, PTA5_OUT),
301 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_IN_PD),
302 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_IN_PD),
303 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_IN_PD),
304 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_IN_PD),
305 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_IN_PD),
306
307 /* PTB */
308 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
309 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
310 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
311 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
312 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
313 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
314 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
315 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
316
317 /* PTC */
318 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_IN_PU),
319 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_IN_PU),
320 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
321 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
322 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
323 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
324
325 /* PTD */
326 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_IN_PU),
327 PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN, PTD6_IN_PU),
328 PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN, PTD5_IN_PU),
329 PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN, PTD4_IN_PU),
330 PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN, PTD3_IN_PU),
331 PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN, PTD2_IN_PU),
332 PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN, PTD1_IN_PU),
333 PINMUX_DATA(PTD0_DATA, PTD0_OUT),
334
335 /* PTE */
336 PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN, PTE7_IN_PD),
337 PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN, PTE6_IN_PD),
338 PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN, PTE5_IN_PD),
339 PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN, PTE4_IN_PD),
340 PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN, PTE1_IN_PD),
341 PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN, PTE0_IN_PD),
342
343 /* PTF */
344 PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN, PTF6_IN_PD),
345 PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN, PTF5_IN_PD),
346 PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN, PTF4_IN_PD),
347 PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN, PTF3_IN_PD),
348 PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN, PTF2_IN_PD),
349 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_IN_PD),
350 PINMUX_DATA(PTF0_DATA, PTF0_OUT),
351
352 /* PTG */
353 PINMUX_DATA(PTG4_DATA, PTG4_OUT),
354 PINMUX_DATA(PTG3_DATA, PTG3_OUT),
355 PINMUX_DATA(PTG2_DATA, PTG2_OUT),
356 PINMUX_DATA(PTG1_DATA, PTG1_OUT),
357 PINMUX_DATA(PTG0_DATA, PTG0_OUT),
358
359 /* PTH */
360 PINMUX_DATA(PTH7_DATA, PTH7_OUT),
361 PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN, PTH6_IN_PD),
362 PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN, PTH5_IN_PD),
363 PINMUX_DATA(PTH4_DATA, PTH4_OUT),
364 PINMUX_DATA(PTH3_DATA, PTH3_OUT),
365 PINMUX_DATA(PTH2_DATA, PTH2_OUT),
366 PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN, PTH1_IN_PD),
367 PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN, PTH0_IN_PD),
368
369 /* PTJ */
370 PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
371 PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
372 PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
373 PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU),
374 PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU),
375
376 /* PTK */
377 PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN, PTK6_IN_PD),
378 PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN, PTK5_IN_PD),
379 PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN, PTK4_IN_PD),
380 PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN, PTK3_IN_PD),
381 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_IN_PD),
382 PINMUX_DATA(PTK1_DATA, PTK1_OUT),
383 PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN, PTK0_IN_PD),
384
385 /* PTL */
386 PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN, PTL7_IN_PD),
387 PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN, PTL6_IN_PD),
388 PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN, PTL5_IN_PD),
389 PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN, PTL4_IN_PD),
390 PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN, PTL3_IN_PD),
391 PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN, PTL2_IN_PD),
392 PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN, PTL1_IN_PD),
393 PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN, PTL0_IN_PD),
394
395 /* PTM */
396 PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN, PTM7_IN_PD),
397 PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN, PTM6_IN_PD),
398 PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN, PTM5_IN_PD),
399 PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN, PTM4_IN_PD),
400 PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN, PTM3_IN_PD),
401 PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN, PTM2_IN_PD),
402 PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN, PTM1_IN_PD),
403 PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN, PTM0_IN_PD),
404
405 /* PTN */
406 PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
407 PINMUX_DATA(PTN6_DATA, PTN6_OUT, PTN6_IN),
408 PINMUX_DATA(PTN5_DATA, PTN5_OUT, PTN5_IN),
409 PINMUX_DATA(PTN4_DATA, PTN4_OUT, PTN4_IN),
410 PINMUX_DATA(PTN3_DATA, PTN3_OUT, PTN3_IN),
411 PINMUX_DATA(PTN2_DATA, PTN2_OUT, PTN2_IN),
412 PINMUX_DATA(PTN1_DATA, PTN1_OUT, PTN1_IN),
413 PINMUX_DATA(PTN0_DATA, PTN0_OUT, PTN0_IN),
414
415 /* PTQ */
416 PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
417 PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN, PTQ5_IN_PD),
418 PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN, PTQ4_IN_PD),
419 PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN, PTQ3_IN_PD),
420 PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_IN_PD),
421 PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
422 PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN, PTQ0_IN_PU),
423
424 /* PTR */
425 PINMUX_DATA(PTR4_DATA, PTR4_OUT),
426 PINMUX_DATA(PTR3_DATA, PTR3_OUT),
427 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
428 PINMUX_DATA(PTR1_DATA, PTR1_OUT),
429 PINMUX_DATA(PTR0_DATA, PTR0_OUT),
430
431 /* PTS */
432 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_IN_PD),
433 PINMUX_DATA(PTS3_DATA, PTS3_OUT),
434 PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN, PTS2_IN_PD),
435 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_IN_PD),
436 PINMUX_DATA(PTS0_DATA, PTS0_OUT),
437
438 /* PTT */
439 PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN, PTT4_IN_PD),
440 PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN, PTT3_IN_PD),
441 PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN, PTT2_IN_PD),
442 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_IN_PD),
443 PINMUX_DATA(PTT0_DATA, PTT0_OUT),
444
445 /* PTU */
446 PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN, PTU4_IN_PD),
447 PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN, PTU3_IN_PD),
448 PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN, PTU2_IN_PD),
449 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_IN_PD),
450 PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN, PTU0_IN_PD),
451
452 /* PTV */
453 PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN, PTV4_IN_PD),
454 PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN, PTV3_IN_PD),
455 PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN, PTV2_IN_PD),
456 PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN, PTV1_IN_PD),
457 PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN, PTV0_IN_PD),
458
459 /* PTW */
460 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_IN_PD),
461 PINMUX_DATA(PTW5_DATA, PTW5_OUT),
462 PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN, PTW4_IN_PD),
463 PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN, PTW3_IN_PD),
464 PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN, PTW2_IN_PD),
465 PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN, PTW1_IN_PD),
466 PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN, PTW0_IN_PD),
467
468 /* PTX */
469 PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN, PTX6_IN_PD),
470 PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN, PTX5_IN_PD),
471 PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN, PTX4_IN_PD),
472 PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN, PTX3_IN_PD),
473 PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN, PTX2_IN_PD),
474 PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN, PTX1_IN_PD),
475 PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN, PTX0_IN_PD),
476
477 /* PTY */
478 PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN, PTY5_IN_PU),
479 PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN, PTY4_IN_PU),
480 PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN, PTY3_IN_PU),
481 PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN, PTY2_IN_PU),
482 PINMUX_DATA(PTY1_DATA, PTY1_OUT),
483 PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN, PTY0_IN_PU),
484
485 /* PTZ */
486 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_IN_PU),
487 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_IN_PU),
488 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_IN_PU),
489 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_IN_PU),
490 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_IN_PU),
491
492 /* SCIF0 */
493 PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
494 PINMUX_DATA(SCIF0_RXD_MARK, SCIF0_RXD),
495 PINMUX_DATA(SCIF0_RTS_MARK, PSD7_SCIF0_RTS, SCIF0_RTS_SIUAOSPD),
496 PINMUX_DATA(SCIF0_CTS_MARK, PSD6_SCIF0_CTS, SCIF0_CTS_SIUAISPD),
497 PINMUX_DATA(SCIF0_SCK_MARK, PSD8_SCIF0_SCK, SCIF0_SCK_TPUTO),
498
499 /* SCIF1 */
500 PINMUX_DATA(SCIF1_TXD_MARK, PSD11_SCIF1, VIO_D5_SCIF1_TXD),
501 PINMUX_DATA(SCIF1_RXD_MARK, PSD11_SCIF1, VIO_D6_SCIF1_RXD),
502 PINMUX_DATA(SCIF1_RTS_MARK, PSD12_SCIF1, VIO_CLK_SCIF1_RTS),
503 PINMUX_DATA(SCIF1_CTS_MARK, PSD12_SCIF1, VIO_VD_SCIF1_CTS),
504 PINMUX_DATA(SCIF1_SCK_MARK, PSD11_SCIF1, VIO_D7_SCIF1_SCK),
505
506 /* SCIF2 */
507 PINMUX_DATA(SCIF2_TXD_MARK, PSD13_SCIF2, VIO_STEM_SCIF2_TXD),
508 PINMUX_DATA(SCIF2_RXD_MARK, PSD13_SCIF2, VIO_HD_SCIF2_RXD),
509 PINMUX_DATA(SCIF2_RTS_MARK, PSD13_SCIF2, VIO_CKO_SCIF2_RTS),
510 PINMUX_DATA(SCIF2_CTS_MARK, PSD13_SCIF2, VIO_FLD_SCIF2_CTS),
511 PINMUX_DATA(SCIF2_SCK_MARK, PSD13_SCIF2, VIO_STEX_SCIF2_SCK),
512
513 /* SIO */
514 PINMUX_DATA(SIOTXD_MARK, PSB15_SIOTXD, SIOTXD_SIUBOSLD),
515 PINMUX_DATA(SIORXD_MARK, PSB14_SIORXD, SIORXD_SIUBISLD),
516 PINMUX_DATA(SIOD_MARK, PSB13_SIOD, SIOD_SIUBILR),
517 PINMUX_DATA(SIOSTRB0_MARK, PSB12_SIOSTRB0, SIOSTRB0_SIUBIBT),
518 PINMUX_DATA(SIOSTRB1_MARK, PSB11_SIOSTRB1, SIOSTRB1_SIUBOLR),
519 PINMUX_DATA(SIOSCK_MARK, PSB10_SIOSCK, SIOSCK_SIUBOBT),
520 PINMUX_DATA(SIOMCK_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIOMCK, PTF6),
521
522 /* CEU */
523 PINMUX_DATA(VIO_D15_MARK, PSC0_VIO, HIZA10_NAF, NAF7_VIO_D15),
524 PINMUX_DATA(VIO_D14_MARK, PSC0_VIO, HIZA10_NAF, NAF6_VIO_D14),
525 PINMUX_DATA(VIO_D13_MARK, PSC0_VIO, HIZA10_NAF, NAF5_VIO_D13),
526 PINMUX_DATA(VIO_D12_MARK, PSC0_VIO, HIZA10_NAF, NAF4_VIO_D12),
527 PINMUX_DATA(VIO_D11_MARK, PSC0_VIO, HIZA10_NAF, NAF3_VIO_D11),
528 PINMUX_DATA(VIO_D10_MARK, PSE2_VIO_D10, HIZB0_VIO, NAF2_VIO_D10),
529 PINMUX_DATA(VIO_D9_MARK, PSE1_VIO_D9, HIZB0_VIO, NAF1_VIO_D9),
530 PINMUX_DATA(VIO_D8_MARK, PSE0_VIO_D8, HIZB0_VIO, NAF0_VIO_D8),
531 PINMUX_DATA(VIO_D7_MARK, PSD11_VIO, VIO_D7_SCIF1_SCK),
532 PINMUX_DATA(VIO_D6_MARK, PSD11_VIO, VIO_D6_SCIF1_RXD),
533 PINMUX_DATA(VIO_D5_MARK, PSD11_VIO, VIO_D5_SCIF1_TXD),
534 PINMUX_DATA(VIO_D4_MARK, VIO_D4),
535 PINMUX_DATA(VIO_D3_MARK, VIO_D3),
536 PINMUX_DATA(VIO_D2_MARK, VIO_D2),
537 PINMUX_DATA(VIO_D1_MARK, VIO_D1),
538 PINMUX_DATA(VIO_D0_MARK, PSD10_VIO_D0, VIO_D0_LCDLCLK),
539 PINMUX_DATA(VIO_CLK_MARK, PSD12_VIO, MSELB9_VIO, VIO_CLK_SCIF1_RTS),
540 PINMUX_DATA(VIO_VD_MARK, PSD12_VIO, MSELB9_VIO, VIO_VD_SCIF1_CTS),
541 PINMUX_DATA(VIO_HD_MARK, PSD13_VIO, MSELB9_VIO, VIO_HD_SCIF2_RXD),
542 PINMUX_DATA(VIO_FLD_MARK, PSD13_VIO, HIZA9_VIO, VIO_FLD_SCIF2_CTS),
543 PINMUX_DATA(VIO_CKO_MARK, PSD13_VIO, HIZA9_VIO, VIO_CKO_SCIF2_RTS),
544 PINMUX_DATA(VIO_STEX_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEX_SCIF2_SCK),
545 PINMUX_DATA(VIO_STEM_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEM_SCIF2_TXD),
546 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
547 HIZB0_VIO, FOE_VIO_VD2),
548 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
549 HIZB1_VIO, HIZB1_VIO, FCE_VIO_HD2),
550 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
551 HIZB1_VIO, FRB_VIO_CLK2),
552
553 /* LCDC */
554 PINMUX_DATA(LCDD23_MARK, HIZA8_LCDC, LCDD23),
555 PINMUX_DATA(LCDD22_MARK, HIZA8_LCDC, LCDD22),
556 PINMUX_DATA(LCDD21_MARK, HIZA8_LCDC, LCDD21),
557 PINMUX_DATA(LCDD20_MARK, HIZA8_LCDC, LCDD20),
558 PINMUX_DATA(LCDD19_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD19_DV_CLKI),
559 PINMUX_DATA(LCDD18_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD18_DV_CLK),
560 PINMUX_DATA(LCDD17_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
561 LCDD17_DV_HSYNC),
562 PINMUX_DATA(LCDD16_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
563 LCDD16_DV_VSYNC),
564 PINMUX_DATA(LCDD15_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD15_DV_D15),
565 PINMUX_DATA(LCDD14_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD14_DV_D14),
566 PINMUX_DATA(LCDD13_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD13_DV_D13),
567 PINMUX_DATA(LCDD12_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD12_DV_D12),
568 PINMUX_DATA(LCDD11_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD11_DV_D11),
569 PINMUX_DATA(LCDD10_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD10_DV_D10),
570 PINMUX_DATA(LCDD9_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD9_DV_D9),
571 PINMUX_DATA(LCDD8_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD8_DV_D8),
572 PINMUX_DATA(LCDD7_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD7_DV_D7),
573 PINMUX_DATA(LCDD6_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD6_DV_D6),
574 PINMUX_DATA(LCDD5_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD5_DV_D5),
575 PINMUX_DATA(LCDD4_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD4_DV_D4),
576 PINMUX_DATA(LCDD3_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD3_DV_D3),
577 PINMUX_DATA(LCDD2_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD2_DV_D2),
578 PINMUX_DATA(LCDD1_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD1_DV_D1),
579 PINMUX_DATA(LCDD0_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD0_DV_D0),
580 PINMUX_DATA(LCDLCLK_MARK, PSD10_LCDLCLK, VIO_D0_LCDLCLK),
581 /* Main LCD */
582 PINMUX_DATA(LCDDON_MARK, PSD2_LCDDON, HIZA7_LCDC, LCDDON_LCDDON2),
583 PINMUX_DATA(LCDVCPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
584 HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
585 PINMUX_DATA(LCDVEPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
586 HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
587 PINMUX_DATA(LCDVSYN_MARK, HIZA7_LCDC, LCDVSYN),
588 /* Main LCD - RGB Mode */
589 PINMUX_DATA(LCDDCK_MARK, MSELB8_RGB, HIZA8_LCDC, LCDDCK_LCDWR),
590 PINMUX_DATA(LCDHSYN_MARK, MSELB8_RGB, HIZA7_LCDC, LCDHSYN_LCDCS),
591 PINMUX_DATA(LCDDISP_MARK, MSELB8_RGB, HIZA7_LCDC, LCDDISP_LCDRS),
592 /* Main LCD - SYS Mode */
593 PINMUX_DATA(LCDRS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDDISP_LCDRS),
594 PINMUX_DATA(LCDCS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDHSYN_LCDCS),
595 PINMUX_DATA(LCDWR_MARK, MSELB8_SYS, HIZA8_LCDC, LCDDCK_LCDWR),
596 PINMUX_DATA(LCDRD_MARK, HIZA7_LCDC, LCDRD),
597 /* Sub LCD - SYS Mode */
598 PINMUX_DATA(LCDDON2_MARK, PSD2_LCDDON2, HIZA7_LCDC, LCDDON_LCDDON2),
599 PINMUX_DATA(LCDVCPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
600 HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
601 PINMUX_DATA(LCDVEPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
602 HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
603 PINMUX_DATA(LCDVSYN2_MARK, PSE12_LCDVSYN2, HIZA8_LCDC, LCDVSYN2_DACK),
604 PINMUX_DATA(LCDCS2_MARK, PSD5_LCDCS2, CS6B_CE1B_LCDCS2),
605
606 /* BSC */
607 PINMUX_DATA(IOIS16_MARK, IOIS16),
608 PINMUX_DATA(A25_MARK, A25),
609 PINMUX_DATA(A24_MARK, A24),
610 PINMUX_DATA(A23_MARK, A23),
611 PINMUX_DATA(A22_MARK, A22),
612 PINMUX_DATA(BS_MARK, PSA9_BS, IRQ4_BS),
613 PINMUX_DATA(CS6B_CE1B_MARK, PSD5_CS6B_CE1B, CS6B_CE1B_LCDCS2),
614 PINMUX_DATA(WAIT_MARK, WAIT),
615 PINMUX_DATA(CS6A_CE2B_MARK, CS6A_CE2B),
616
617 /* SBSC */
618 PINMUX_DATA(HPD63_MARK, HPD63),
619 PINMUX_DATA(HPD62_MARK, HPD62),
620 PINMUX_DATA(HPD61_MARK, HPD61),
621 PINMUX_DATA(HPD60_MARK, HPD60),
622 PINMUX_DATA(HPD59_MARK, HPD59),
623 PINMUX_DATA(HPD58_MARK, HPD58),
624 PINMUX_DATA(HPD57_MARK, HPD57),
625 PINMUX_DATA(HPD56_MARK, HPD56),
626 PINMUX_DATA(HPD55_MARK, HPD55),
627 PINMUX_DATA(HPD54_MARK, HPD54),
628 PINMUX_DATA(HPD53_MARK, HPD53),
629 PINMUX_DATA(HPD52_MARK, HPD52),
630 PINMUX_DATA(HPD51_MARK, HPD51),
631 PINMUX_DATA(HPD50_MARK, HPD50),
632 PINMUX_DATA(HPD49_MARK, HPD49),
633 PINMUX_DATA(HPD48_MARK, HPD48),
634 PINMUX_DATA(HPDQM7_MARK, HPDQM7),
635 PINMUX_DATA(HPDQM6_MARK, HPDQM6),
636 PINMUX_DATA(HPDQM5_MARK, HPDQM5),
637 PINMUX_DATA(HPDQM4_MARK, HPDQM4),
638
639 /* IRQ */
640 PINMUX_DATA(IRQ0_MARK, HIZC8_IRQ0, IRQ0),
641 PINMUX_DATA(IRQ1_MARK, HIZC9_IRQ1, IRQ1),
642 PINMUX_DATA(IRQ2_MARK, PSA4_IRQ2, HIZC10_IRQ2, IRQ2_SDHID2),
643 PINMUX_DATA(IRQ3_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_IRQ3,
644 HIZC11_IRQ3, PTQ0),
645 PINMUX_DATA(IRQ4_MARK, PSA9_IRQ4, HIZC12_IRQ4, IRQ4_BS),
646 PINMUX_DATA(IRQ5_MARK, HIZC13_IRQ5, IRQ5),
647 PINMUX_DATA(IRQ6_MARK, PSA15_IRQ6, HIZC14_IRQ6, KEYIN0_IRQ6),
648 PINMUX_DATA(IRQ7_MARK, PSA14_IRQ7, HIZC15_IRQ7, KEYIN4_IRQ7),
649
650 /* SDHI */
651 PINMUX_DATA(SDHICD_MARK, SDHICD),
652 PINMUX_DATA(SDHIWP_MARK, SDHIWP),
653 PINMUX_DATA(SDHID3_MARK, SDHID3),
654 PINMUX_DATA(SDHID2_MARK, PSA4_SDHID2, IRQ2_SDHID2),
655 PINMUX_DATA(SDHID1_MARK, SDHID1),
656 PINMUX_DATA(SDHID0_MARK, SDHID0),
657 PINMUX_DATA(SDHICMD_MARK, SDHICMD),
658 PINMUX_DATA(SDHICLK_MARK, SDHICLK),
659
660 /* SIU - Port A */
661 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, SIUAOLR_SIOF1_SYNC),
662 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, SIUAOBT_SIOF1_SCK),
663 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, SIUAISLD_SIOF1_RXD),
664 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, SIUAILR_SIOF1_SS2),
665 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, SIUAIBT_SIOF1_SS1),
666 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, SIUAOSLD_SIOF1_TXD),
667 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, PSB1_SIUMCKA, PTK0),
668 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, PTK0),
669
670 /* SIU - Port B */
671 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
672 PINMUX_DATA(SIUBOBT_MARK, PSB10_SIUBOBT, SIOSCK_SIUBOBT),
673 PINMUX_DATA(SIUBISLD_MARK, PSB14_SIUBISLD, SIORXD_SIUBISLD),
674 PINMUX_DATA(SIUBILR_MARK, PSB13_SIUBILR, SIOD_SIUBILR),
675 PINMUX_DATA(SIUBIBT_MARK, PSB12_SIUBIBT, SIOSTRB0_SIUBIBT),
676 PINMUX_DATA(SIUBOSLD_MARK, PSB15_SIUBOSLD, SIOTXD_SIUBOSLD),
677 PINMUX_DATA(SIUMCKB_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIUMCKB, PTF6),
678 PINMUX_DATA(SIUFCKB_MARK, PSD9_SIUFCKB, PTF6),
679
680 /* AUD */
681 PINMUX_DATA(AUDSYNC_MARK, AUDSYNC),
682 PINMUX_DATA(AUDATA3_MARK, AUDATA3),
683 PINMUX_DATA(AUDATA2_MARK, AUDATA2),
684 PINMUX_DATA(AUDATA1_MARK, AUDATA1),
685 PINMUX_DATA(AUDATA0_MARK, AUDATA0),
686
687 /* DMAC */
688 PINMUX_DATA(DACK_MARK, PSE12_DACK, LCDVSYN2_DACK),
689 PINMUX_DATA(DREQ0_MARK, DREQ0),
690
691 /* VOU */
692 PINMUX_DATA(DV_CLKI_MARK, PSD0_DV, LCDD19_DV_CLKI),
693 PINMUX_DATA(DV_CLK_MARK, PSD0_DV, LCDD18_DV_CLK),
694 PINMUX_DATA(DV_HSYNC_MARK, PSD0_DV, LCDD17_DV_HSYNC),
695 PINMUX_DATA(DV_VSYNC_MARK, PSD0_DV, LCDD16_DV_VSYNC),
696 PINMUX_DATA(DV_D15_MARK, PSD0_DV, LCDD15_DV_D15),
697 PINMUX_DATA(DV_D14_MARK, PSD0_DV, LCDD14_DV_D14),
698 PINMUX_DATA(DV_D13_MARK, PSD0_DV, LCDD13_DV_D13),
699 PINMUX_DATA(DV_D12_MARK, PSD0_DV, LCDD12_DV_D12),
700 PINMUX_DATA(DV_D11_MARK, PSD0_DV, LCDD11_DV_D11),
701 PINMUX_DATA(DV_D10_MARK, PSD0_DV, LCDD10_DV_D10),
702 PINMUX_DATA(DV_D9_MARK, PSD0_DV, LCDD9_DV_D9),
703 PINMUX_DATA(DV_D8_MARK, PSD0_DV, LCDD8_DV_D8),
704 PINMUX_DATA(DV_D7_MARK, PSD0_DV, LCDD7_DV_D7),
705 PINMUX_DATA(DV_D6_MARK, PSD0_DV, LCDD6_DV_D6),
706 PINMUX_DATA(DV_D5_MARK, PSD0_DV, LCDD5_DV_D5),
707 PINMUX_DATA(DV_D4_MARK, PSD0_DV, LCDD4_DV_D4),
708 PINMUX_DATA(DV_D3_MARK, PSD0_DV, LCDD3_DV_D3),
709 PINMUX_DATA(DV_D2_MARK, PSD0_DV, LCDD2_DV_D2),
710 PINMUX_DATA(DV_D1_MARK, PSD0_DV, LCDD1_DV_D1),
711 PINMUX_DATA(DV_D0_MARK, PSD0_DV, LCDD0_DV_D0),
712
713 /* CPG */
714 PINMUX_DATA(STATUS0_MARK, STATUS0),
715 PINMUX_DATA(PDSTATUS_MARK, PDSTATUS),
716
717 /* SIOF0 */
718 PINMUX_DATA(SIOF0_MCK_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_SIOF0_MCK, PTQ0),
719 PINMUX_DATA(SIOF0_SCK_MARK, PSB5_SIOF0_SCK, SIOF0_SCK_TS_SCK),
720 PINMUX_DATA(SIOF0_SYNC_MARK, PSB4_SIOF0_SYNC, SIOF0_SYNC_TS_SDEN),
721 PINMUX_DATA(SIOF0_SS1_MARK, PSB3_SIOF0_SS1, SIOF0_SS1_TS_SPSYNC),
722 PINMUX_DATA(SIOF0_SS2_MARK, PSB2_SIOF0_SS2, SIOF0_SS2_SIM_RST),
723 PINMUX_DATA(SIOF0_TXD_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
724 PSB7_SIOF0_TXD, PTQ1),
725 PINMUX_DATA(SIOF0_RXD_MARK, PSE13_SIOF0_RXD_IRDA_IN,
726 PSB6_SIOF0_RXD, PTQ2),
727
728 /* SIOF1 */
729 PINMUX_DATA(SIOF1_MCK_MARK, PSE11_SIUMCKA_SIOF1_MCK,
730 PSB1_SIOF1_MCK, PTK0),
731 PINMUX_DATA(SIOF1_SCK_MARK, PSC14_SIOF1_SCK, SIUAOBT_SIOF1_SCK),
732 PINMUX_DATA(SIOF1_SYNC_MARK, PSC13_SIOF1_SYNC, SIUAOLR_SIOF1_SYNC),
733 PINMUX_DATA(SIOF1_SS1_MARK, PSC12_SIOF1_SS1, SIUAIBT_SIOF1_SS1),
734 PINMUX_DATA(SIOF1_SS2_MARK, PSC11_SIOF1_SS2, SIUAILR_SIOF1_SS2),
735 PINMUX_DATA(SIOF1_TXD_MARK, PSB0_SIOF1_TXD, SIUAOSLD_SIOF1_TXD),
736 PINMUX_DATA(SIOF1_RXD_MARK, PSC15_SIOF1_RXD, SIUAISLD_SIOF1_RXD),
737
738 /* SIM */
739 PINMUX_DATA(SIM_D_MARK, PSE15_SIM_D, PTQ0),
740 PINMUX_DATA(SIM_CLK_MARK, PSE14_SIM_CLK, PTQ1),
741 PINMUX_DATA(SIM_RST_MARK, PSB2_SIM_RST, SIOF0_SS2_SIM_RST),
742
743 /* TSIF */
744 PINMUX_DATA(TS_SDAT_MARK, PSE13_TS_SDAT, PTQ2),
745 PINMUX_DATA(TS_SCK_MARK, PSB5_TS_SCK, SIOF0_SCK_TS_SCK),
746 PINMUX_DATA(TS_SDEN_MARK, PSB4_TS_SDEN, SIOF0_SYNC_TS_SDEN),
747 PINMUX_DATA(TS_SPSYNC_MARK, PSB3_TS_SPSYNC, SIOF0_SS1_TS_SPSYNC),
748
749 /* IRDA */
750 PINMUX_DATA(IRDA_IN_MARK, PSE13_SIOF0_RXD_IRDA_IN, PSB6_IRDA_IN, PTQ2),
751 PINMUX_DATA(IRDA_OUT_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
752 PSB7_IRDA_OUT, PTQ1),
753
754 /* TPU */
755 PINMUX_DATA(TPUTO_MARK, PSD8_TPUTO, SCIF0_SCK_TPUTO),
756
757 /* FLCTL */
758 PINMUX_DATA(FCE_MARK, PSE3_FLCTL, FCE_VIO_HD2),
759 PINMUX_DATA(NAF7_MARK, PSC0_NAF, HIZA10_NAF, NAF7_VIO_D15),
760 PINMUX_DATA(NAF6_MARK, PSC0_NAF, HIZA10_NAF, NAF6_VIO_D14),
761 PINMUX_DATA(NAF5_MARK, PSC0_NAF, HIZA10_NAF, NAF5_VIO_D13),
762 PINMUX_DATA(NAF4_MARK, PSC0_NAF, HIZA10_NAF, NAF4_VIO_D12),
763 PINMUX_DATA(NAF3_MARK, PSC0_NAF, HIZA10_NAF, NAF3_VIO_D11),
764 PINMUX_DATA(NAF2_MARK, PSE2_NAF2, HIZB0_VIO, NAF2_VIO_D10),
765 PINMUX_DATA(NAF1_MARK, PSE1_NAF1, HIZB0_VIO, NAF1_VIO_D9),
766 PINMUX_DATA(NAF0_MARK, PSE0_NAF0, HIZB0_VIO, NAF0_VIO_D8),
767 PINMUX_DATA(FCDE_MARK, FCDE),
768 PINMUX_DATA(FOE_MARK, PSE3_FLCTL, HIZB0_VIO, FOE_VIO_VD2),
769 PINMUX_DATA(FSC_MARK, FSC),
770 PINMUX_DATA(FWE_MARK, FWE),
771 PINMUX_DATA(FRB_MARK, PSE3_FLCTL, FRB_VIO_CLK2),
772
773 /* KEYSC */
774 PINMUX_DATA(KEYIN0_MARK, PSA15_KEYIN0, HIZC14_IRQ6, KEYIN0_IRQ6),
775 PINMUX_DATA(KEYIN1_MARK, HIZA14_KEYSC, KEYIN1),
776 PINMUX_DATA(KEYIN2_MARK, HIZA14_KEYSC, KEYIN2),
777 PINMUX_DATA(KEYIN3_MARK, HIZA14_KEYSC, KEYIN3),
778 PINMUX_DATA(KEYIN4_MARK, PSA14_KEYIN4, HIZC15_IRQ7, KEYIN4_IRQ7),
779 PINMUX_DATA(KEYOUT0_MARK, HIZA14_KEYSC, KEYOUT0),
780 PINMUX_DATA(KEYOUT1_MARK, HIZA14_KEYSC, KEYOUT1),
781 PINMUX_DATA(KEYOUT2_MARK, HIZA14_KEYSC, KEYOUT2),
782 PINMUX_DATA(KEYOUT3_MARK, HIZA14_KEYSC, KEYOUT3),
783 PINMUX_DATA(KEYOUT4_IN6_MARK, HIZA14_KEYSC, KEYOUT4_IN6),
784 PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
785};
786
787static struct pinmux_gpio pinmux_gpios[] = {
788 /* PTA */
789 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
790 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
791 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
792 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
793 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
794 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
795 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
796 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
797
798 /* PTB */
799 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
800 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
801 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
802 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
803 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
804 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
805 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
806 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
807
808 /* PTC */
809 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
810 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
811 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
812 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
813 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
814 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
815
816 /* PTD */
817 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
818 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
819 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
820 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
821 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
822 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
823 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
824 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
825
826 /* PTE */
827 PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
828 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
829 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
830 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
831 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
832 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
833
834 /* PTF */
835 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
836 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
837 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
838 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
839 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
840 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
841 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
842
843 /* PTG */
844 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
845 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
846 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
847 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
848 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
849
850 /* PTH */
851 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
852 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
853 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
854 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
855 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
856 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
857 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
858 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
859
860 /* PTJ */
861 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
862 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
863 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
864 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
865 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
866
867 /* PTK */
868 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
869 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
870 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
871 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
872 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
873 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
874 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
875
876 /* PTL */
877 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
878 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
879 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
880 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
881 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
882 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
883 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
884 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
885
886 /* PTM */
887 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
888 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
889 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
890 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
891 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
892 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
893 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
894 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
895
896 /* PTN */
897 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
898 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
899 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
900 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
901 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
902 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
903 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
904 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
905
906 /* PTQ */
907 PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
908 PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
909 PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
910 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
911 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
912 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
913 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
914
915 /* PTR */
916 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
917 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
918 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
919 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
920 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
921
922 /* PTS */
923 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
924 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
925 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
926 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
927 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
928
929 /* PTT */
930 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
931 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
932 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
933 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
934 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
935
936 /* PTU */
937 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
938 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
939 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
940 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
941 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
942
943 /* PTV */
944 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
945 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
946 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
947 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
948 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
949
950 /* PTW */
951 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
952 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
953 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
954 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
955 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
956 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
957 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
958
959 /* PTX */
960 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
961 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
962 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
963 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
964 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
965 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
966 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
967
968 /* PTY */
969 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
970 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
971 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
972 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
973 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
974 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
975
976 /* PTZ */
977 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
978 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
979 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
980 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
981 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
982
983 /* SCIF0 */
984 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
985 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
986 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
987 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
988 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
989
990 /* SCIF1 */
991 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
992 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
993 PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
994 PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
995 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
996
997 /* SCIF2 */
998 PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK),
999 PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK),
1000 PINMUX_GPIO(GPIO_FN_SCIF2_RTS, SCIF2_RTS_MARK),
1001 PINMUX_GPIO(GPIO_FN_SCIF2_CTS, SCIF2_CTS_MARK),
1002 PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK),
1003
1004 /* SIO */
1005 PINMUX_GPIO(GPIO_FN_SIOTXD, SIOTXD_MARK),
1006 PINMUX_GPIO(GPIO_FN_SIORXD, SIORXD_MARK),
1007 PINMUX_GPIO(GPIO_FN_SIOD, SIOD_MARK),
1008 PINMUX_GPIO(GPIO_FN_SIOSTRB0, SIOSTRB0_MARK),
1009 PINMUX_GPIO(GPIO_FN_SIOSTRB1, SIOSTRB1_MARK),
1010 PINMUX_GPIO(GPIO_FN_SIOSCK, SIOSCK_MARK),
1011 PINMUX_GPIO(GPIO_FN_SIOMCK, SIOMCK_MARK),
1012
1013 /* CEU */
1014 PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK),
1015 PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK),
1016 PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK),
1017 PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK),
1018 PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK),
1019 PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK),
1020 PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK),
1021 PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK),
1022 PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK),
1023 PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK),
1024 PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK),
1025 PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK),
1026 PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK),
1027 PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK),
1028 PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK),
1029 PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK),
1030 PINMUX_GPIO(GPIO_FN_VIO_CLK, VIO_CLK_MARK),
1031 PINMUX_GPIO(GPIO_FN_VIO_VD, VIO_VD_MARK),
1032 PINMUX_GPIO(GPIO_FN_VIO_HD, VIO_HD_MARK),
1033 PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK),
1034 PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK),
1035 PINMUX_GPIO(GPIO_FN_VIO_STEX, VIO_STEX_MARK),
1036 PINMUX_GPIO(GPIO_FN_VIO_STEM, VIO_STEM_MARK),
1037 PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK),
1038 PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK),
1039 PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK),
1040
1041 /* LCDC */
1042 PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK),
1043 PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK),
1044 PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK),
1045 PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK),
1046 PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK),
1047 PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK),
1048 PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK),
1049 PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK),
1050 PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK),
1051 PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK),
1052 PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK),
1053 PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK),
1054 PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK),
1055 PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK),
1056 PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK),
1057 PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK),
1058 PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK),
1059 PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK),
1060 PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK),
1061 PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK),
1062 PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK),
1063 PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK),
1064 PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK),
1065 PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK),
1066 PINMUX_GPIO(GPIO_FN_LCDLCLK, LCDLCLK_MARK),
1067 /* Main LCD */
1068 PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK),
1069 PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK),
1070 PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK),
1071 PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK),
1072 /* Main LCD - RGB Mode */
1073 PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK),
1074 PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK),
1075 PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK),
1076 /* Main LCD - SYS Mode */
1077 PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK),
1078 PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK),
1079 PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK),
1080 PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK),
1081 /* Sub LCD - SYS Mode */
1082 PINMUX_GPIO(GPIO_FN_LCDDON2, LCDDON2_MARK),
1083 PINMUX_GPIO(GPIO_FN_LCDVCPWC2, LCDVCPWC2_MARK),
1084 PINMUX_GPIO(GPIO_FN_LCDVEPWC2, LCDVEPWC2_MARK),
1085 PINMUX_GPIO(GPIO_FN_LCDVSYN2, LCDVSYN2_MARK),
1086 PINMUX_GPIO(GPIO_FN_LCDCS2, LCDCS2_MARK),
1087
1088 /* BSC */
1089 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1090 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1091 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1092 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1093 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1094 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1095 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
1096 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1097 PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK),
1098
1099 /* SBSC */
1100 PINMUX_GPIO(GPIO_FN_HPD63, HPD63_MARK),
1101 PINMUX_GPIO(GPIO_FN_HPD62, HPD62_MARK),
1102 PINMUX_GPIO(GPIO_FN_HPD61, HPD61_MARK),
1103 PINMUX_GPIO(GPIO_FN_HPD60, HPD60_MARK),
1104 PINMUX_GPIO(GPIO_FN_HPD59, HPD59_MARK),
1105 PINMUX_GPIO(GPIO_FN_HPD58, HPD58_MARK),
1106 PINMUX_GPIO(GPIO_FN_HPD57, HPD57_MARK),
1107 PINMUX_GPIO(GPIO_FN_HPD56, HPD56_MARK),
1108 PINMUX_GPIO(GPIO_FN_HPD55, HPD55_MARK),
1109 PINMUX_GPIO(GPIO_FN_HPD54, HPD54_MARK),
1110 PINMUX_GPIO(GPIO_FN_HPD53, HPD53_MARK),
1111 PINMUX_GPIO(GPIO_FN_HPD52, HPD52_MARK),
1112 PINMUX_GPIO(GPIO_FN_HPD51, HPD51_MARK),
1113 PINMUX_GPIO(GPIO_FN_HPD50, HPD50_MARK),
1114 PINMUX_GPIO(GPIO_FN_HPD49, HPD49_MARK),
1115 PINMUX_GPIO(GPIO_FN_HPD48, HPD48_MARK),
1116 PINMUX_GPIO(GPIO_FN_HPDQM7, HPDQM7_MARK),
1117 PINMUX_GPIO(GPIO_FN_HPDQM6, HPDQM6_MARK),
1118 PINMUX_GPIO(GPIO_FN_HPDQM5, HPDQM5_MARK),
1119 PINMUX_GPIO(GPIO_FN_HPDQM4, HPDQM4_MARK),
1120
1121 /* IRQ */
1122 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1123 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1124 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1125 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1126 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1127 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1128 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1129 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1130
1131 /* SDHI */
1132 PINMUX_GPIO(GPIO_FN_SDHICD, SDHICD_MARK),
1133 PINMUX_GPIO(GPIO_FN_SDHIWP, SDHIWP_MARK),
1134 PINMUX_GPIO(GPIO_FN_SDHID3, SDHID3_MARK),
1135 PINMUX_GPIO(GPIO_FN_SDHID2, SDHID2_MARK),
1136 PINMUX_GPIO(GPIO_FN_SDHID1, SDHID1_MARK),
1137 PINMUX_GPIO(GPIO_FN_SDHID0, SDHID0_MARK),
1138 PINMUX_GPIO(GPIO_FN_SDHICMD, SDHICMD_MARK),
1139 PINMUX_GPIO(GPIO_FN_SDHICLK, SDHICLK_MARK),
1140
1141 /* SIU - Port A */
1142 PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK),
1143 PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK),
1144 PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK),
1145 PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK),
1146 PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK),
1147 PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK),
1148 PINMUX_GPIO(GPIO_FN_SIUMCKA, SIUMCKA_MARK),
1149 PINMUX_GPIO(GPIO_FN_SIUFCKA, SIUFCKA_MARK),
1150
1151 /* SIU - Port B */
1152 PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK),
1153 PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK),
1154 PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK),
1155 PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK),
1156 PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK),
1157 PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK),
1158 PINMUX_GPIO(GPIO_FN_SIUMCKB, SIUMCKB_MARK),
1159 PINMUX_GPIO(GPIO_FN_SIUFCKB, SIUFCKB_MARK),
1160
1161 /* AUD */
1162 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1163 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1164 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1165 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1166 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1167
1168 /* DMAC */
1169 PINMUX_GPIO(GPIO_FN_DACK, DACK_MARK),
1170 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1171
1172 /* VOU */
1173 PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK),
1174 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1175 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1176 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1177 PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK),
1178 PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK),
1179 PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK),
1180 PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK),
1181 PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK),
1182 PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK),
1183 PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK),
1184 PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK),
1185 PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK),
1186 PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK),
1187 PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK),
1188 PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK),
1189 PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK),
1190 PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK),
1191 PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK),
1192 PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK),
1193
1194 /* CPG */
1195 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1196 PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK),
1197
1198 /* SIOF0 */
1199 PINMUX_GPIO(GPIO_FN_SIOF0_MCK, SIOF0_MCK_MARK),
1200 PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
1201 PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
1202 PINMUX_GPIO(GPIO_FN_SIOF0_SS1, SIOF0_SS1_MARK),
1203 PINMUX_GPIO(GPIO_FN_SIOF0_SS2, SIOF0_SS2_MARK),
1204 PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
1205 PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
1206
1207 /* SIOF1 */
1208 PINMUX_GPIO(GPIO_FN_SIOF1_MCK, SIOF1_MCK_MARK),
1209 PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
1210 PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
1211 PINMUX_GPIO(GPIO_FN_SIOF1_SS1, SIOF1_SS1_MARK),
1212 PINMUX_GPIO(GPIO_FN_SIOF1_SS2, SIOF1_SS2_MARK),
1213 PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
1214 PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
1215
1216 /* SIM */
1217 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
1218 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
1219 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
1220
1221 /* TSIF */
1222 PINMUX_GPIO(GPIO_FN_TS_SDAT, TS_SDAT_MARK),
1223 PINMUX_GPIO(GPIO_FN_TS_SCK, TS_SCK_MARK),
1224 PINMUX_GPIO(GPIO_FN_TS_SDEN, TS_SDEN_MARK),
1225 PINMUX_GPIO(GPIO_FN_TS_SPSYNC, TS_SPSYNC_MARK),
1226
1227 /* IRDA */
1228 PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK),
1229 PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK),
1230
1231 /* TPU */
1232 PINMUX_GPIO(GPIO_FN_TPUTO, TPUTO_MARK),
1233
1234 /* FLCTL */
1235 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1236 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1237 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1238 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1239 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1240 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1241 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1242 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1243 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1244 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1245 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1246 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1247 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1248 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1249
1250 /* KEYSC */
1251 PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK),
1252 PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK),
1253 PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK),
1254 PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK),
1255 PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK),
1256 PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK),
1257 PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK),
1258 PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK),
1259 PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK),
1260 PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK),
1261 PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK),
1262};
1263
1264static struct pinmux_cfg_reg pinmux_config_regs[] = {
1265 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
1266 VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN,
1267 VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN,
1268 VIO_D5_SCIF1_TXD, PTA5_OUT, PTA5_IN_PD, PTA5_IN,
1269 VIO_D4, 0, PTA4_IN_PD, PTA4_IN,
1270 VIO_D3, 0, PTA3_IN_PD, PTA3_IN,
1271 VIO_D2, 0, PTA2_IN_PD, PTA2_IN,
1272 VIO_D1, 0, PTA1_IN_PD, PTA1_IN,
1273 VIO_D0_LCDLCLK, 0, PTA0_IN_PD, PTA0_IN }
1274 },
1275 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
1276 HPD55, PTB7_OUT, 0, PTB7_IN,
1277 HPD54, PTB6_OUT, 0, PTB6_IN,
1278 HPD53, PTB5_OUT, 0, PTB5_IN,
1279 HPD52, PTB4_OUT, 0, PTB4_IN,
1280 HPD51, PTB3_OUT, 0, PTB3_IN,
1281 HPD50, PTB2_OUT, 0, PTB2_IN,
1282 HPD49, PTB1_OUT, 0, PTB1_IN,
1283 HPD48, PTB0_OUT, 0, PTB0_IN }
1284 },
1285 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
1286 0, 0, PTC7_IN_PU, PTC7_IN,
1287 0, 0, 0, 0,
1288 IOIS16, 0, PTC5_IN_PU, PTC5_IN,
1289 HPDQM7, PTC4_OUT, 0, PTC4_IN,
1290 HPDQM6, PTC3_OUT, 0, PTC3_IN,
1291 HPDQM5, PTC2_OUT, 0, PTC2_IN,
1292 0, 0, 0, 0,
1293 HPDQM4, PTC0_OUT, 0, PTC0_IN }
1294 },
1295 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
1296 SDHICD, 0, PTD7_IN_PU, PTD7_IN,
1297 SDHIWP, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
1298 SDHID3, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
1299 IRQ2_SDHID2, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
1300 SDHID1, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
1301 SDHID0, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
1302 SDHICMD, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
1303 SDHICLK, PTD0_OUT, 0, 0 }
1304 },
1305 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
1306 A25, PTE7_OUT, PTE7_IN_PD, PTE7_IN,
1307 A24, PTE6_OUT, PTE6_IN_PD, PTE6_IN,
1308 A23, PTE5_OUT, PTE5_IN_PD, PTE5_IN,
1309 A22, PTE4_OUT, PTE4_IN_PD, PTE4_IN,
1310 0, 0, 0, 0,
1311 0, 0, 0, 0,
1312 IRQ5, PTE1_OUT, PTE1_IN_PD, PTE1_IN,
1313 IRQ4_BS, PTE0_OUT, PTE0_IN_PD, PTE0_IN }
1314 },
1315 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1316 0, 0, 0, 0,
1317 PTF6, PTF6_OUT, PTF6_IN_PD, PTF6_IN,
1318 SIOSCK_SIUBOBT, PTF5_OUT, PTF5_IN_PD, PTF5_IN,
1319 SIOSTRB1_SIUBOLR, PTF4_OUT, PTF4_IN_PD, PTF4_IN,
1320 SIOSTRB0_SIUBIBT, PTF3_OUT, PTF3_IN_PD, PTF3_IN,
1321 SIOD_SIUBILR, PTF2_OUT, PTF2_IN_PD, PTF2_IN,
1322 SIORXD_SIUBISLD, 0, PTF1_IN_PD, PTF1_IN,
1323 SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 }
1324 },
1325 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1326 0, 0, 0, 0,
1327 0, 0, 0, 0,
1328 0, 0, 0, 0,
1329 AUDSYNC, PTG4_OUT, 0, 0,
1330 AUDATA3, PTG3_OUT, 0, 0,
1331 AUDATA2, PTG2_OUT, 0, 0,
1332 AUDATA1, PTG1_OUT, 0, 0,
1333 AUDATA0, PTG0_OUT, 0, 0 }
1334 },
1335 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1336 LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
1337 LCDVSYN2_DACK, PTH6_OUT, PTH6_IN_PD, PTH6_IN,
1338 LCDVSYN, PTH5_OUT, PTH5_IN_PD, PTH5_IN,
1339 LCDDISP_LCDRS, PTH4_OUT, 0, 0,
1340 LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
1341 LCDDON_LCDDON2, PTH2_OUT, 0, 0,
1342 LCDD17_DV_HSYNC, PTH1_OUT, PTH1_IN_PD, PTH1_IN,
1343 LCDD16_DV_VSYNC, PTH0_OUT, PTH0_IN_PD, PTH0_IN }
1344 },
1345 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1346 STATUS0, PTJ7_OUT, 0, 0,
1347 0, PTJ6_OUT, 0, 0,
1348 PDSTATUS, PTJ5_OUT, 0, 0,
1349 0, 0, 0, 0,
1350 0, 0, 0, 0,
1351 0, 0, 0, 0,
1352 IRQ1, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1353 IRQ0, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1354 },
1355 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1356 0, 0, 0, 0,
1357 SIUAILR_SIOF1_SS2, PTK6_OUT, PTK6_IN_PD, PTK6_IN,
1358 SIUAIBT_SIOF1_SS1, PTK5_OUT, PTK5_IN_PD, PTK5_IN,
1359 SIUAOLR_SIOF1_SYNC, PTK4_OUT, PTK4_IN_PD, PTK4_IN,
1360 SIUAOBT_SIOF1_SCK, PTK3_OUT, PTK3_IN_PD, PTK3_IN,
1361 SIUAISLD_SIOF1_RXD, 0, PTK2_IN_PD, PTK2_IN,
1362 SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
1363 PTK0, PTK0_OUT, PTK0_IN_PD, PTK0_IN }
1364 },
1365 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1366 LCDD15_DV_D15, PTL7_OUT, PTL7_IN_PD, PTL7_IN,
1367 LCDD14_DV_D14, PTL6_OUT, PTL6_IN_PD, PTL6_IN,
1368 LCDD13_DV_D13, PTL5_OUT, PTL5_IN_PD, PTL5_IN,
1369 LCDD12_DV_D12, PTL4_OUT, PTL4_IN_PD, PTL4_IN,
1370 LCDD11_DV_D11, PTL3_OUT, PTL3_IN_PD, PTL3_IN,
1371 LCDD10_DV_D10, PTL2_OUT, PTL2_IN_PD, PTL2_IN,
1372 LCDD9_DV_D9, PTL1_OUT, PTL1_IN_PD, PTL1_IN,
1373 LCDD8_DV_D8, PTL0_OUT, PTL0_IN_PD, PTL0_IN }
1374 },
1375 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1376 LCDD7_DV_D7, PTM7_OUT, PTM7_IN_PD, PTM7_IN,
1377 LCDD6_DV_D6, PTM6_OUT, PTM6_IN_PD, PTM6_IN,
1378 LCDD5_DV_D5, PTM5_OUT, PTM5_IN_PD, PTM5_IN,
1379 LCDD4_DV_D4, PTM4_OUT, PTM4_IN_PD, PTM4_IN,
1380 LCDD3_DV_D3, PTM3_OUT, PTM3_IN_PD, PTM3_IN,
1381 LCDD2_DV_D2, PTM2_OUT, PTM2_IN_PD, PTM2_IN,
1382 LCDD1_DV_D1, PTM1_OUT, PTM1_IN_PD, PTM1_IN,
1383 LCDD0_DV_D0, PTM0_OUT, PTM0_IN_PD, PTM0_IN }
1384 },
1385 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
1386 HPD63, PTN7_OUT, 0, PTN7_IN,
1387 HPD62, PTN6_OUT, 0, PTN6_IN,
1388 HPD61, PTN5_OUT, 0, PTN5_IN,
1389 HPD60, PTN4_OUT, 0, PTN4_IN,
1390 HPD59, PTN3_OUT, 0, PTN3_IN,
1391 HPD58, PTN2_OUT, 0, PTN2_IN,
1392 HPD57, PTN1_OUT, 0, PTN1_IN,
1393 HPD56, PTN0_OUT, 0, PTN0_IN }
1394 },
1395 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
1396 0, 0, 0, 0,
1397 SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
1398 SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, PTQ5_IN_PD, PTQ5_IN,
1399 SIOF0_SYNC_TS_SDEN, PTQ4_OUT, PTQ4_IN_PD, PTQ4_IN,
1400 SIOF0_SCK_TS_SCK, PTQ3_OUT, PTQ3_IN_PD, PTQ3_IN,
1401 PTQ2, 0, PTQ2_IN_PD, PTQ2_IN,
1402 PTQ1, PTQ1_OUT, 0, 0,
1403 PTQ0, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
1404 },
1405 { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
1406 0, 0, 0, 0,
1407 0, 0, 0, 0,
1408 0, 0, 0, 0,
1409 LCDRD, PTR4_OUT, 0, 0,
1410 CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
1411 WAIT, 0, PTR2_IN_PU, PTR2_IN,
1412 LCDDCK_LCDWR, PTR1_OUT, 0, 0,
1413 LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 }
1414 },
1415 { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
1416 0, 0, 0, 0,
1417 0, 0, 0, 0,
1418 0, 0, 0, 0,
1419 SCIF0_CTS_SIUAISPD, 0, PTS4_IN_PD, PTS4_IN,
1420 SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
1421 SCIF0_SCK_TPUTO, PTS2_OUT, PTS2_IN_PD, PTS2_IN,
1422 SCIF0_RXD, 0, PTS1_IN_PD, PTS1_IN,
1423 SCIF0_TXD, PTS0_OUT, 0, 0 }
1424 },
1425 { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
1426 0, 0, 0, 0,
1427 0, 0, 0, 0,
1428 0, 0, 0, 0,
1429 FOE_VIO_VD2, PTT4_OUT, PTT4_IN_PD, PTT4_IN,
1430 FWE, PTT3_OUT, PTT3_IN_PD, PTT3_IN,
1431 FSC, PTT2_OUT, PTT2_IN_PD, PTT2_IN,
1432 DREQ0, 0, PTT1_IN_PD, PTT1_IN,
1433 FCDE, PTT0_OUT, 0, 0 }
1434 },
1435 { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
1436 0, 0, 0, 0,
1437 0, 0, 0, 0,
1438 0, 0, 0, 0,
1439 NAF2_VIO_D10, PTU4_OUT, PTU4_IN_PD, PTU4_IN,
1440 NAF1_VIO_D9, PTU3_OUT, PTU3_IN_PD, PTU3_IN,
1441 NAF0_VIO_D8, PTU2_OUT, PTU2_IN_PD, PTU2_IN,
1442 FRB_VIO_CLK2, 0, PTU1_IN_PD, PTU1_IN,
1443 FCE_VIO_HD2, PTU0_OUT, PTU0_IN_PD, PTU0_IN }
1444 },
1445 { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
1446 0, 0, 0, 0,
1447 0, 0, 0, 0,
1448 0, 0, 0, 0,
1449 NAF7_VIO_D15, PTV4_OUT, PTV4_IN_PD, PTV4_IN,
1450 NAF6_VIO_D14, PTV3_OUT, PTV3_IN_PD, PTV3_IN,
1451 NAF5_VIO_D13, PTV2_OUT, PTV2_IN_PD, PTV2_IN,
1452 NAF4_VIO_D12, PTV1_OUT, PTV1_IN_PD, PTV1_IN,
1453 NAF3_VIO_D11, PTV0_OUT, PTV0_IN_PD, PTV0_IN }
1454 },
1455 { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
1456 0, 0, 0, 0,
1457 VIO_FLD_SCIF2_CTS, 0, PTW6_IN_PD, PTW6_IN,
1458 VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
1459 VIO_STEX_SCIF2_SCK, PTW4_OUT, PTW4_IN_PD, PTW4_IN,
1460 VIO_STEM_SCIF2_TXD, PTW3_OUT, PTW3_IN_PD, PTW3_IN,
1461 VIO_HD_SCIF2_RXD, PTW2_OUT, PTW2_IN_PD, PTW2_IN,
1462 VIO_VD_SCIF1_CTS, PTW1_OUT, PTW1_IN_PD, PTW1_IN,
1463 VIO_CLK_SCIF1_RTS, PTW0_OUT, PTW0_IN_PD, PTW0_IN }
1464 },
1465 { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
1466 0, 0, 0, 0,
1467 CS6A_CE2B, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
1468 LCDD23, PTX5_OUT, PTX5_IN_PD, PTX5_IN,
1469 LCDD22, PTX4_OUT, PTX4_IN_PD, PTX4_IN,
1470 LCDD21, PTX3_OUT, PTX3_IN_PD, PTX3_IN,
1471 LCDD20, PTX2_OUT, PTX2_IN_PD, PTX2_IN,
1472 LCDD19_DV_CLKI, PTX1_OUT, PTX1_IN_PD, PTX1_IN,
1473 LCDD18_DV_CLK, PTX0_OUT, PTX0_IN_PD, PTX0_IN }
1474 },
1475 { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
1476 0, 0, 0, 0,
1477 0, 0, 0, 0,
1478 KEYOUT5_IN5, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
1479 KEYOUT4_IN6, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
1480 KEYOUT3, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
1481 KEYOUT2, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
1482 KEYOUT1, PTY1_OUT, 0, 0,
1483 KEYOUT0, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
1484 },
1485 { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
1486 0, 0, 0, 0,
1487 0, 0, 0, 0,
1488 KEYIN4_IRQ7, 0, PTZ5_IN_PU, PTZ5_IN,
1489 KEYIN3, 0, PTZ4_IN_PU, PTZ4_IN,
1490 KEYIN2, 0, PTZ3_IN_PU, PTZ3_IN,
1491 KEYIN1, 0, PTZ2_IN_PU, PTZ2_IN,
1492 KEYIN0_IRQ6, 0, PTZ1_IN_PU, PTZ1_IN,
1493 0, 0, 0, 0 }
1494 },
1495 { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
1496 PSA15_KEYIN0, PSA15_IRQ6,
1497 PSA14_KEYIN4, PSA14_IRQ7,
1498 0, 0,
1499 0, 0,
1500 0, 0,
1501 0, 0,
1502 PSA9_IRQ4, PSA9_BS,
1503 0, 0,
1504 0, 0,
1505 0, 0,
1506 0, 0,
1507 PSA4_IRQ2, PSA4_SDHID2,
1508 0, 0,
1509 0, 0,
1510 0, 0,
1511 0, 0 }
1512 },
1513 { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) {
1514 PSB15_SIOTXD, PSB15_SIUBOSLD,
1515 PSB14_SIORXD, PSB14_SIUBISLD,
1516 PSB13_SIOD, PSB13_SIUBILR,
1517 PSB12_SIOSTRB0, PSB12_SIUBIBT,
1518 PSB11_SIOSTRB1, PSB11_SIUBOLR,
1519 PSB10_SIOSCK, PSB10_SIUBOBT,
1520 PSB9_SIOMCK, PSB9_SIUMCKB,
1521 PSB8_SIOF0_MCK, PSB8_IRQ3,
1522 PSB7_SIOF0_TXD, PSB7_IRDA_OUT,
1523 PSB6_SIOF0_RXD, PSB6_IRDA_IN,
1524 PSB5_SIOF0_SCK, PSB5_TS_SCK,
1525 PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
1526 PSB3_SIOF0_SS1, PSB3_TS_SPSYNC,
1527 PSB2_SIOF0_SS2, PSB2_SIM_RST,
1528 PSB1_SIUMCKA, PSB1_SIOF1_MCK,
1529 PSB0_SIUAOSLD, PSB0_SIOF1_TXD }
1530 },
1531 { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) {
1532 PSC15_SIUAISLD, PSC15_SIOF1_RXD,
1533 PSC14_SIUAOBT, PSC14_SIOF1_SCK,
1534 PSC13_SIUAOLR, PSC13_SIOF1_SYNC,
1535 PSC12_SIUAIBT, PSC12_SIOF1_SS1,
1536 PSC11_SIUAILR, PSC11_SIOF1_SS2,
1537 0, 0,
1538 0, 0,
1539 0, 0,
1540 0, 0,
1541 0, 0,
1542 0, 0,
1543 0, 0,
1544 0, 0,
1545 0, 0,
1546 0, 0,
1547 PSC0_NAF, PSC0_VIO }
1548 },
1549 { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) {
1550 0, 0,
1551 0, 0,
1552 PSD13_VIO, PSD13_SCIF2,
1553 PSD12_VIO, PSD12_SCIF1,
1554 PSD11_VIO, PSD11_SCIF1,
1555 PSD10_VIO_D0, PSD10_LCDLCLK,
1556 PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB,
1557 PSD8_SCIF0_SCK, PSD8_TPUTO,
1558 PSD7_SCIF0_RTS, PSD7_SIUAOSPD,
1559 PSD6_SCIF0_CTS, PSD6_SIUAISPD,
1560 PSD5_CS6B_CE1B, PSD5_LCDCS2,
1561 0, 0,
1562 PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
1563 PSD2_LCDDON, PSD2_LCDDON2,
1564 0, 0,
1565 PSD0_LCDD19_LCDD0, PSD0_DV }
1566 },
1567 { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) {
1568 PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
1569 PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
1570 PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT,
1571 PSE12_LCDVSYN2, PSE12_DACK,
1572 PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
1573 0, 0,
1574 0, 0,
1575 0, 0,
1576 0, 0,
1577 0, 0,
1578 0, 0,
1579 0, 0,
1580 PSE3_FLCTL, PSE3_VIO,
1581 PSE2_NAF2, PSE2_VIO_D10,
1582 PSE1_NAF1, PSE1_VIO_D9,
1583 PSE0_NAF0, PSE0_VIO_D8 }
1584 },
1585 { PINMUX_CFG_REG("HIZCRA", 0xa4050158, 16, 1) {
1586 0, 0,
1587 HIZA14_KEYSC, HIZA14_HIZ,
1588 0, 0,
1589 0, 0,
1590 0, 0,
1591 HIZA10_NAF, HIZA10_HIZ,
1592 HIZA9_VIO, HIZA9_HIZ,
1593 HIZA8_LCDC, HIZA8_HIZ,
1594 HIZA7_LCDC, HIZA7_HIZ,
1595 HIZA6_LCDC, HIZA6_HIZ,
1596 0, 0,
1597 0, 0,
1598 0, 0,
1599 0, 0,
1600 0, 0,
1601 0, 0 }
1602 },
1603 { PINMUX_CFG_REG("HIZCRB", 0xa405015a, 16, 1) {
1604 0, 0,
1605 0, 0,
1606 0, 0,
1607 0, 0,
1608 0, 0,
1609 0, 0,
1610 0, 0,
1611 0, 0,
1612 0, 0,
1613 0, 0,
1614 0, 0,
1615 0, 0,
1616 0, 0,
1617 0, 0,
1618 HIZB1_VIO, HIZB1_HIZ,
1619 HIZB0_VIO, HIZB0_HIZ }
1620 },
1621 { PINMUX_CFG_REG("HIZCRC", 0xa405015c, 16, 1) {
1622 HIZC15_IRQ7, HIZC15_HIZ,
1623 HIZC14_IRQ6, HIZC14_HIZ,
1624 HIZC13_IRQ5, HIZC13_HIZ,
1625 HIZC12_IRQ4, HIZC12_HIZ,
1626 HIZC11_IRQ3, HIZC11_HIZ,
1627 HIZC10_IRQ2, HIZC10_HIZ,
1628 HIZC9_IRQ1, HIZC9_HIZ,
1629 HIZC8_IRQ0, HIZC8_HIZ,
1630 0, 0,
1631 0, 0,
1632 0, 0,
1633 0, 0,
1634 0, 0,
1635 0, 0,
1636 0, 0,
1637 0, 0 }
1638 },
1639 { PINMUX_CFG_REG("MSELCRB", 0xa4050182, 16, 1) {
1640 0, 0,
1641 0, 0,
1642 0, 0,
1643 0, 0,
1644 0, 0,
1645 0, 0,
1646 MSELB9_VIO, MSELB9_VIO2,
1647 MSELB8_RGB, MSELB8_SYS,
1648 0, 0,
1649 0, 0,
1650 0, 0,
1651 0, 0,
1652 0, 0,
1653 0, 0,
1654 0, 0,
1655 0, 0 }
1656 },
1657 {}
1658};
1659
1660static struct pinmux_data_reg pinmux_data_regs[] = {
1661 { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
1662 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1663 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1664 },
1665 { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
1666 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1667 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1668 },
1669 { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
1670 PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
1671 PTC3_DATA, PTC2_DATA, 0, PTC0_DATA }
1672 },
1673 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1674 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1675 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1676 },
1677 { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
1678 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1679 0, 0, PTE1_DATA, PTE0_DATA }
1680 },
1681 { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
1682 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1683 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1684 },
1685 { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
1686 0, 0, 0, PTG4_DATA,
1687 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1688 },
1689 { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
1690 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1691 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1692 },
1693 { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
1694 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
1695 0, 0, PTJ1_DATA, PTJ0_DATA }
1696 },
1697 { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
1698 0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1699 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1700 },
1701 { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
1702 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1703 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1704 },
1705 { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
1706 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1707 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1708 },
1709 { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
1710 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1711 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1712 },
1713 { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
1714 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
1715 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
1716 },
1717 { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
1718 0, 0, 0, PTR4_DATA,
1719 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1720 },
1721 { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
1722 0, 0, 0, PTS4_DATA,
1723 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1724 },
1725 { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
1726 0, 0, 0, PTT4_DATA,
1727 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1728 },
1729 { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
1730 0, 0, 0, PTU4_DATA,
1731 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1732 },
1733 { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
1734 0, 0, 0, PTV4_DATA,
1735 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1736 },
1737 { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
1738 0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1739 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
1740 },
1741 { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
1742 0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1743 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
1744 },
1745 { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
1746 0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1747 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
1748 },
1749 { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
1750 0, 0, PTZ5_DATA, PTZ4_DATA,
1751 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
1752 },
1753 { },
1754};
1755
1756static struct pinmux_info sh7722_pinmux_info = {
1757 .name = "sh7722_pfc",
1758 .reserved_id = PINMUX_RESERVED,
1759 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1760 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1761 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1762 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1763 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1764 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1765 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1766
1767 .first_gpio = GPIO_PTA7,
1768 .last_gpio = GPIO_FN_KEYOUT5_IN5,
1769
1770 .gpios = pinmux_gpios,
1771 .cfg_regs = pinmux_config_regs,
1772 .data_regs = pinmux_data_regs,
1773
1774 .gpio_data = pinmux_data,
1775 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1776};
1777
1778static int __init plat_pinmux_setup(void)
1779{
1780 return register_pinmux(&sh7722_pinmux_info);
1781}
1782
1783arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c
new file mode 100644
index 000000000000..92a9bc91015f
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c
@@ -0,0 +1,1909 @@
1/*
2 * SH7723 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/gpio.h>
14#include <asm/sh7723.h>
15
16enum {
17 PINMUX_RESERVED = 0,
18
19 PINMUX_DATA_BEGIN,
20 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
21 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
22 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
23 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
24 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
25 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
26 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
27 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
28 PTE5_DATA, PTE4_DATA, PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
29 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
30 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
31 PTG5_DATA, PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
32 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
33 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
34 PTJ7_DATA, PTJ5_DATA, PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
35 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
36 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
37 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
38 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
39 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
40 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
41 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
42 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
43 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
44 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
45 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
46 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
47 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
48 PTT5_DATA, PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
49 PTU5_DATA, PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
50 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
51 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
52 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
53 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
54 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
55 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
56 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
57 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
58 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
59 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
60 PINMUX_DATA_END,
61
62 PINMUX_INPUT_BEGIN,
63 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
64 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
65 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
66 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
67 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
68 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
69 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
70 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
71 PTE5_IN, PTE4_IN, PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
72 PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
73 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
74 PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
75 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
76 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
77 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
78 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
79 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
80 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
81 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
82 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
83 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
84 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
85 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
86 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
87 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
88 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
89 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
90 PTT5_IN, PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
91 PTU5_IN, PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
92 PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
93 PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
94 PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
95 PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
96 PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
97 PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
98 PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
99 PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
100 PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
101 PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
102 PINMUX_INPUT_END,
103
104 PINMUX_INPUT_PULLUP_BEGIN,
105 PTA4_IN_PU, PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
106 PTB2_IN_PU, PTB1_IN_PU,
107 PTR2_IN_PU,
108 PINMUX_INPUT_PULLUP_END,
109
110 PINMUX_OUTPUT_BEGIN,
111 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
112 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
113 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
114 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
115 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
116 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
117 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
118 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
119 PTE5_OUT, PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
120 PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
121 PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
122 PTG5_OUT, PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
123 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
124 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
125 PTJ7_OUT, PTJ5_OUT, PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
126 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
127 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
128 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
129 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
130 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
131 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
132 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
133 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
134 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
135 PTR1_OUT, PTR0_OUT,
136 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
137 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
138 PTT5_OUT, PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
139 PTU5_OUT, PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
140 PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
141 PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
142 PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
143 PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
144 PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
145 PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
146 PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
147 PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
148 PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
149 PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
150 PINMUX_OUTPUT_END,
151
152 PINMUX_FUNCTION_BEGIN,
153 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
154 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
155 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
156 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
157 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
158 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
159 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
160 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
161 PTE5_FN, PTE4_FN, PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
162 PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
163 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
164 PTG5_FN, PTG4_FN, PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
165 PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
166 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
167 PTJ7_FN, PTJ5_FN, PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
168 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
169 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
170 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN,
171 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
172 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
173 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
174 PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN,
175 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
176 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
177 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
178 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
179 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
180 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
181 PTT5_FN, PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
182 PTU5_FN, PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
183 PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
184 PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
185 PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
186 PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
187 PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
188 PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
189 PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
190 PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
191 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
192 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
193
194
195 PSA15_PSA14_FN1, PSA15_PSA14_FN2,
196 PSA13_PSA12_FN1, PSA13_PSA12_FN2,
197 PSA11_PSA10_FN1, PSA11_PSA10_FN2,
198 PSA5_PSA4_FN1, PSA5_PSA4_FN2, PSA5_PSA4_FN3,
199 PSA3_PSA2_FN1, PSA3_PSA2_FN2,
200 PSB15_PSB14_FN1, PSB15_PSB14_FN2,
201 PSB13_PSB12_LCDC_RGB, PSB13_PSB12_LCDC_SYS,
202 PSB9_PSB8_FN1, PSB9_PSB8_FN2, PSB9_PSB8_FN3,
203 PSB7_PSB6_FN1, PSB7_PSB6_FN2,
204 PSB5_PSB4_FN1, PSB5_PSB4_FN2,
205 PSB3_PSB2_FN1, PSB3_PSB2_FN2,
206 PSC15_PSC14_FN1, PSC15_PSC14_FN2,
207 PSC13_PSC12_FN1, PSC13_PSC12_FN2,
208 PSC11_PSC10_FN1, PSC11_PSC10_FN2, PSC11_PSC10_FN3,
209 PSC9_PSC8_FN1, PSC9_PSC8_FN2,
210 PSC7_PSC6_FN1, PSC7_PSC6_FN2, PSC7_PSC6_FN3,
211 PSD15_PSD14_FN1, PSD15_PSD14_FN2,
212 PSD13_PSD12_FN1, PSD13_PSD12_FN2,
213 PSD11_PSD10_FN1, PSD11_PSD10_FN2, PSD11_PSD10_FN3,
214 PSD9_PSD8_FN1, PSD9_PSD8_FN2,
215 PSD7_PSD6_FN1, PSD7_PSD6_FN2,
216 PSD5_PSD4_FN1, PSD5_PSD4_FN2,
217 PSD3_PSD2_FN1, PSD3_PSD2_FN2,
218 PSD1_PSD0_FN1, PSD1_PSD0_FN2,
219 PINMUX_FUNCTION_END,
220
221 PINMUX_MARK_BEGIN,
222 SCIF0_PTT_TXD_MARK, SCIF0_PTT_RXD_MARK,
223 SCIF0_PTT_SCK_MARK, SCIF0_PTU_TXD_MARK,
224 SCIF0_PTU_RXD_MARK, SCIF0_PTU_SCK_MARK,
225
226 SCIF1_PTS_TXD_MARK, SCIF1_PTS_RXD_MARK,
227 SCIF1_PTS_SCK_MARK, SCIF1_PTV_TXD_MARK,
228 SCIF1_PTV_RXD_MARK, SCIF1_PTV_SCK_MARK,
229
230 SCIF2_PTT_TXD_MARK, SCIF2_PTT_RXD_MARK,
231 SCIF2_PTT_SCK_MARK, SCIF2_PTU_TXD_MARK,
232 SCIF2_PTU_RXD_MARK, SCIF2_PTU_SCK_MARK,
233
234 SCIF3_PTS_TXD_MARK, SCIF3_PTS_RXD_MARK,
235 SCIF3_PTS_SCK_MARK, SCIF3_PTS_RTS_MARK,
236 SCIF3_PTS_CTS_MARK, SCIF3_PTV_TXD_MARK,
237 SCIF3_PTV_RXD_MARK, SCIF3_PTV_SCK_MARK,
238 SCIF3_PTV_RTS_MARK, SCIF3_PTV_CTS_MARK,
239
240 SCIF4_PTE_TXD_MARK, SCIF4_PTE_RXD_MARK,
241 SCIF4_PTE_SCK_MARK, SCIF4_PTN_TXD_MARK,
242 SCIF4_PTN_RXD_MARK, SCIF4_PTN_SCK_MARK,
243
244 SCIF5_PTE_TXD_MARK, SCIF5_PTE_RXD_MARK,
245 SCIF5_PTE_SCK_MARK, SCIF5_PTN_TXD_MARK,
246 SCIF5_PTN_RXD_MARK, SCIF5_PTN_SCK_MARK,
247
248 VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
249 VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
250 VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
251 VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
252 VIO_FLD_MARK, VIO_CKO_MARK,
253 VIO_VD1_MARK, VIO_HD1_MARK, VIO_CLK1_MARK,
254 VIO_HD2_MARK, VIO_VD2_MARK, VIO_CLK2_MARK,
255
256 LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
257 LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
258 LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
259 LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
260 LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
261 LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
262 LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
263 LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
264 LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
265 LCDLCLK_PTR_MARK, LCDLCLK_PTW_MARK,
266
267 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
268 IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
269
270 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
271 AUDCK_MARK, AUDSYNC_MARK,
272
273 SDHI0CD_PTD_MARK, SDHI0WP_PTD_MARK,
274 SDHI0D3_PTD_MARK, SDHI0D2_PTD_MARK,
275 SDHI0D1_PTD_MARK, SDHI0D0_PTD_MARK,
276 SDHI0CMD_PTD_MARK, SDHI0CLK_PTD_MARK,
277
278 SDHI0CD_PTS_MARK, SDHI0WP_PTS_MARK,
279 SDHI0D3_PTS_MARK, SDHI0D2_PTS_MARK,
280 SDHI0D1_PTS_MARK, SDHI0D0_PTS_MARK,
281 SDHI0CMD_PTS_MARK, SDHI0CLK_PTS_MARK,
282
283 SDHI1CD_MARK, SDHI1WP_MARK, SDHI1D3_MARK, SDHI1D2_MARK,
284 SDHI1D1_MARK, SDHI1D0_MARK, SDHI1CMD_MARK, SDHI1CLK_MARK,
285
286 SIUAFCK_MARK, SIUAILR_MARK, SIUAIBT_MARK, SIUAISLD_MARK,
287 SIUAOLR_MARK, SIUAOBT_MARK, SIUAOSLD_MARK, SIUAMCK_MARK,
288 SIUAISPD_MARK, SIUAOSPD_MARK,
289
290 SIUBFCK_MARK, SIUBILR_MARK, SIUBIBT_MARK, SIUBISLD_MARK,
291 SIUBOLR_MARK, SIUBOBT_MARK, SIUBOSLD_MARK, SIUBMCK_MARK,
292
293 IRDA_IN_MARK, IRDA_OUT_MARK,
294
295 DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
296 DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
297 DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
298 DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
299 DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
300
301 KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
302 KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
303 KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
304
305 MSIOF0_PTF_TXD_MARK, MSIOF0_PTF_RXD_MARK, MSIOF0_PTF_MCK_MARK,
306 MSIOF0_PTF_TSYNC_MARK, MSIOF0_PTF_TSCK_MARK, MSIOF0_PTF_RSYNC_MARK,
307 MSIOF0_PTF_RSCK_MARK, MSIOF0_PTF_SS1_MARK, MSIOF0_PTF_SS2_MARK,
308
309 MSIOF0_PTT_TXD_MARK, MSIOF0_PTT_RXD_MARK, MSIOF0_PTX_MCK_MARK,
310 MSIOF0_PTT_TSYNC_MARK, MSIOF0_PTT_TSCK_MARK, MSIOF0_PTT_RSYNC_MARK,
311 MSIOF0_PTT_RSCK_MARK, MSIOF0_PTT_SS1_MARK, MSIOF0_PTT_SS2_MARK,
312
313 MSIOF1_TXD_MARK, MSIOF1_RXD_MARK, MSIOF1_MCK_MARK,
314 MSIOF1_TSYNC_MARK, MSIOF1_TSCK_MARK, MSIOF1_RSYNC_MARK,
315 MSIOF1_RSCK_MARK, MSIOF1_SS1_MARK, MSIOF1_SS2_MARK,
316
317 TS0_SDAT_MARK, TS0_SCK_MARK, TS0_SDEN_MARK, TS0_SPSYNC_MARK,
318
319 FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
320 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
321 FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
322
323 DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK,
324
325 AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK,
326
327 STATUS0_MARK, PDSTATUS_MARK,
328
329 TPUTO3_MARK, TPUTO2_MARK, TPUTO1_MARK, TPUTO0_MARK,
330
331 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
332 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
333 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
334 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
335 IOIS16_MARK, WAIT_MARK, BS_MARK,
336 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
337 CS6B_CE1B_MARK, CS6A_CE2B_MARK,
338 CS5B_CE1A_MARK, CS5A_CE2A_MARK,
339 WE3_ICIOWR_MARK, WE2_ICIORD_MARK,
340
341 IDED15_MARK, IDED14_MARK, IDED13_MARK, IDED12_MARK,
342 IDED11_MARK, IDED10_MARK, IDED9_MARK, IDED8_MARK,
343 IDED7_MARK, IDED6_MARK, IDED5_MARK, IDED4_MARK,
344 IDED3_MARK, IDED2_MARK, IDED1_MARK, IDED0_MARK,
345 DIRECTION_MARK, EXBUF_ENB_MARK, IDERST_MARK, IODACK_MARK,
346 IODREQ_MARK, IDEIORDY_MARK, IDEINT_MARK, IDEIOWR_MARK,
347 IDEIORD_MARK, IDECS1_MARK, IDECS0_MARK, IDEA2_MARK,
348 IDEA1_MARK, IDEA0_MARK,
349 PINMUX_MARK_END,
350};
351
352static pinmux_enum_t pinmux_data[] = {
353 /* PTA GPIO */
354 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
355 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
356 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
357 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
358 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
359 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
360 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
361 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
362
363 /* PTB GPIO */
364 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
365 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
366 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
367 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
368 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
369 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
370 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
371 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
372
373 /* PTC GPIO */
374 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
375 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
376 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
377 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
378 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
379 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
380 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
381 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
382
383 /* PTD GPIO */
384 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
385 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
386 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
387 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
388 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
389 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
390 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
391 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
392
393 /* PTE GPIO */
394 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
395 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
396 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
397 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
398 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
399 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
400
401 /* PTF GPIO */
402 PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
403 PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
404 PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
405 PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
406 PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
407 PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
408 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
409 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
410
411 /* PTG GPIO */
412 PINMUX_DATA(PTG5_DATA, PTG5_OUT),
413 PINMUX_DATA(PTG4_DATA, PTG4_OUT),
414 PINMUX_DATA(PTG3_DATA, PTG3_OUT),
415 PINMUX_DATA(PTG2_DATA, PTG2_OUT),
416 PINMUX_DATA(PTG1_DATA, PTG1_OUT),
417 PINMUX_DATA(PTG0_DATA, PTG0_OUT),
418
419 /* PTH GPIO */
420 PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
421 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
422 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
423 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
424 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
425 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
426 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
427 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
428
429 /* PTJ GPIO */
430 PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
431 PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
432 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
433 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
434 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
435 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
436
437 /* PTK GPIO */
438 PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
439 PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
440 PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
441 PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
442 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
443 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
444 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
445 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
446
447 /* PTL GPIO */
448 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
449 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
450 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
451 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
452 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
453 PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
454 PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
455 PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
456
457 /* PTM GPIO */
458 PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT),
459 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
460 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
461 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
462 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
463 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
464 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
465 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
466
467 /* PTN GPIO */
468 PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
469 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
470 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
471 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
472 PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
473 PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
474 PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
475 PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
476
477 /* PTQ GPIO */
478 PINMUX_DATA(PTQ3_DATA, PTQ3_IN),
479 PINMUX_DATA(PTQ2_DATA, PTQ2_IN),
480 PINMUX_DATA(PTQ1_DATA, PTQ1_IN),
481 PINMUX_DATA(PTQ0_DATA, PTQ0_IN),
482
483 /* PTR GPIO */
484 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
485 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
486 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
487 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
488 PINMUX_DATA(PTR3_DATA, PTR3_IN),
489 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
490 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
491 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
492
493 /* PTS GPIO */
494 PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT),
495 PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
496 PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
497 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
498 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
499 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
500 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
501 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
502
503 /* PTT GPIO */
504 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
505 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
506 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
507 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
508 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
509 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
510
511 /* PTU GPIO */
512 PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
513 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
514 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
515 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
516 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
517 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
518
519 /* PTV GPIO */
520 PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
521 PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
522 PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
523 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
524 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
525 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
526 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
527 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
528
529 /* PTW GPIO */
530 PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
531 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
532 PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
533 PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
534 PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
535 PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
536 PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
537 PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
538
539 /* PTX GPIO */
540 PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
541 PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
542 PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
543 PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
544 PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
545 PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
546 PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
547 PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
548
549 /* PTY GPIO */
550 PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
551 PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
552 PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
553 PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
554 PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
555 PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
556 PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
557 PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
558
559 /* PTZ GPIO */
560 PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
561 PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
562 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
563 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
564 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
565 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
566 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
567 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
568
569 /* PTA FN */
570 PINMUX_DATA(D23_MARK, PSA15_PSA14_FN1, PTA7_FN),
571 PINMUX_DATA(KEYOUT2_MARK, PSA15_PSA14_FN2, PTA7_FN),
572 PINMUX_DATA(D22_MARK, PSA15_PSA14_FN1, PTA6_FN),
573 PINMUX_DATA(KEYOUT1_MARK, PSA15_PSA14_FN2, PTA6_FN),
574 PINMUX_DATA(D21_MARK, PSA15_PSA14_FN1, PTA5_FN),
575 PINMUX_DATA(KEYOUT0_MARK, PSA15_PSA14_FN2, PTA5_FN),
576 PINMUX_DATA(D20_MARK, PSA15_PSA14_FN1, PTA4_FN),
577 PINMUX_DATA(KEYIN4_MARK, PSA15_PSA14_FN2, PTA4_FN),
578 PINMUX_DATA(D19_MARK, PSA15_PSA14_FN1, PTA3_FN),
579 PINMUX_DATA(KEYIN3_MARK, PSA15_PSA14_FN2, PTA3_FN),
580 PINMUX_DATA(D18_MARK, PSA15_PSA14_FN1, PTA2_FN),
581 PINMUX_DATA(KEYIN2_MARK, PSA15_PSA14_FN2, PTA2_FN),
582 PINMUX_DATA(D17_MARK, PSA15_PSA14_FN1, PTA1_FN),
583 PINMUX_DATA(KEYIN1_MARK, PSA15_PSA14_FN2, PTA1_FN),
584 PINMUX_DATA(D16_MARK, PSA15_PSA14_FN1, PTA0_FN),
585 PINMUX_DATA(KEYIN0_MARK, PSA15_PSA14_FN2, PTA0_FN),
586
587 /* PTB FN */
588 PINMUX_DATA(D31_MARK, PTB7_FN),
589 PINMUX_DATA(D30_MARK, PTB6_FN),
590 PINMUX_DATA(D29_MARK, PTB5_FN),
591 PINMUX_DATA(D28_MARK, PTB4_FN),
592 PINMUX_DATA(D27_MARK, PTB3_FN),
593 PINMUX_DATA(D26_MARK, PSA15_PSA14_FN1, PTB2_FN),
594 PINMUX_DATA(KEYOUT5_IN5_MARK, PSA15_PSA14_FN2, PTB2_FN),
595 PINMUX_DATA(D25_MARK, PSA15_PSA14_FN1, PTB1_FN),
596 PINMUX_DATA(KEYOUT4_IN6_MARK, PSA15_PSA14_FN2, PTB1_FN),
597 PINMUX_DATA(D24_MARK, PSA15_PSA14_FN1, PTB0_FN),
598 PINMUX_DATA(KEYOUT3_MARK, PSA15_PSA14_FN2, PTB0_FN),
599
600 /* PTC FN */
601 PINMUX_DATA(IDED15_MARK, PSA11_PSA10_FN1, PTC7_FN),
602 PINMUX_DATA(SDHI1CD_MARK, PSA11_PSA10_FN2, PTC7_FN),
603 PINMUX_DATA(IDED14_MARK, PSA11_PSA10_FN1, PTC6_FN),
604 PINMUX_DATA(SDHI1WP_MARK, PSA11_PSA10_FN2, PTC6_FN),
605 PINMUX_DATA(IDED13_MARK, PSA11_PSA10_FN1, PTC5_FN),
606 PINMUX_DATA(SDHI1D3_MARK, PSA11_PSA10_FN2, PTC5_FN),
607 PINMUX_DATA(IDED12_MARK, PSA11_PSA10_FN1, PTC4_FN),
608 PINMUX_DATA(SDHI1D2_MARK, PSA11_PSA10_FN2, PTC4_FN),
609 PINMUX_DATA(IDED11_MARK, PSA11_PSA10_FN1, PTC3_FN),
610 PINMUX_DATA(SDHI1D1_MARK, PSA11_PSA10_FN2, PTC3_FN),
611 PINMUX_DATA(IDED10_MARK, PSA11_PSA10_FN1, PTC2_FN),
612 PINMUX_DATA(SDHI1D0_MARK, PSA11_PSA10_FN2, PTC2_FN),
613 PINMUX_DATA(IDED9_MARK, PSA11_PSA10_FN1, PTC1_FN),
614 PINMUX_DATA(SDHI1CMD_MARK, PSA11_PSA10_FN2, PTC1_FN),
615 PINMUX_DATA(IDED8_MARK, PSA11_PSA10_FN1, PTC0_FN),
616 PINMUX_DATA(SDHI1CLK_MARK, PSA11_PSA10_FN2, PTC0_FN),
617
618 /* PTD FN */
619 PINMUX_DATA(IDED7_MARK, PSA11_PSA10_FN1, PTD7_FN),
620 PINMUX_DATA(SDHI0CD_PTD_MARK, PSA11_PSA10_FN2, PTD7_FN),
621 PINMUX_DATA(IDED6_MARK, PSA11_PSA10_FN1, PTD6_FN),
622 PINMUX_DATA(SDHI0WP_PTD_MARK, PSA11_PSA10_FN2, PTD6_FN),
623 PINMUX_DATA(IDED5_MARK, PSA11_PSA10_FN1, PTD5_FN),
624 PINMUX_DATA(SDHI0D3_PTD_MARK, PSA11_PSA10_FN2, PTD5_FN),
625 PINMUX_DATA(IDED4_MARK, PSA11_PSA10_FN1, PTD4_FN),
626 PINMUX_DATA(SDHI0D2_PTD_MARK, PSA11_PSA10_FN2, PTD4_FN),
627 PINMUX_DATA(IDED3_MARK, PSA11_PSA10_FN1, PTD3_FN),
628 PINMUX_DATA(SDHI0D1_PTD_MARK, PSA11_PSA10_FN2, PTD3_FN),
629 PINMUX_DATA(IDED2_MARK, PSA11_PSA10_FN1, PTD2_FN),
630 PINMUX_DATA(SDHI0D0_PTD_MARK, PSA11_PSA10_FN2, PTD2_FN),
631 PINMUX_DATA(IDED1_MARK, PSA11_PSA10_FN1, PTD1_FN),
632 PINMUX_DATA(SDHI0CMD_PTD_MARK, PSA11_PSA10_FN2, PTD1_FN),
633 PINMUX_DATA(IDED0_MARK, PSA11_PSA10_FN1, PTD0_FN),
634 PINMUX_DATA(SDHI0CLK_PTD_MARK, PSA11_PSA10_FN2, PTD0_FN),
635
636 /* PTE FN */
637 PINMUX_DATA(DIRECTION_MARK, PSA11_PSA10_FN1, PTE5_FN),
638 PINMUX_DATA(SCIF5_PTE_SCK_MARK, PSA11_PSA10_FN2, PTE5_FN),
639 PINMUX_DATA(EXBUF_ENB_MARK, PSA11_PSA10_FN1, PTE4_FN),
640 PINMUX_DATA(SCIF5_PTE_RXD_MARK, PSA11_PSA10_FN2, PTE4_FN),
641 PINMUX_DATA(IDERST_MARK, PSA11_PSA10_FN1, PTE3_FN),
642 PINMUX_DATA(SCIF5_PTE_TXD_MARK, PSA11_PSA10_FN2, PTE3_FN),
643 PINMUX_DATA(IODACK_MARK, PSA11_PSA10_FN1, PTE2_FN),
644 PINMUX_DATA(SCIF4_PTE_SCK_MARK, PSA11_PSA10_FN2, PTE2_FN),
645 PINMUX_DATA(IODREQ_MARK, PSA11_PSA10_FN1, PTE1_FN),
646 PINMUX_DATA(SCIF4_PTE_RXD_MARK, PSA11_PSA10_FN2, PTE1_FN),
647 PINMUX_DATA(IDEIORDY_MARK, PSA11_PSA10_FN1, PTE0_FN),
648 PINMUX_DATA(SCIF4_PTE_TXD_MARK, PSA11_PSA10_FN2, PTE0_FN),
649
650 /* PTF FN */
651 PINMUX_DATA(IDEINT_MARK, PTF7_FN),
652 PINMUX_DATA(IDEIOWR_MARK, PSA5_PSA4_FN1, PTF6_FN),
653 PINMUX_DATA(MSIOF0_PTF_SS2_MARK, PSA5_PSA4_FN2, PTF6_FN),
654 PINMUX_DATA(MSIOF0_PTF_RSYNC_MARK, PSA5_PSA4_FN3, PTF6_FN),
655 PINMUX_DATA(IDEIORD_MARK, PSA5_PSA4_FN1, PTF5_FN),
656 PINMUX_DATA(MSIOF0_PTF_SS1_MARK, PSA5_PSA4_FN2, PTF5_FN),
657 PINMUX_DATA(MSIOF0_PTF_RSCK_MARK, PSA5_PSA4_FN3, PTF5_FN),
658 PINMUX_DATA(IDECS1_MARK, PSA11_PSA10_FN1, PTF4_FN),
659 PINMUX_DATA(MSIOF0_PTF_TSYNC_MARK, PSA11_PSA10_FN2, PTF4_FN),
660 PINMUX_DATA(IDECS0_MARK, PSA11_PSA10_FN1, PTF3_FN),
661 PINMUX_DATA(MSIOF0_PTF_TSCK_MARK, PSA11_PSA10_FN2, PTF3_FN),
662 PINMUX_DATA(IDEA2_MARK, PSA11_PSA10_FN1, PTF2_FN),
663 PINMUX_DATA(MSIOF0_PTF_RXD_MARK, PSA11_PSA10_FN2, PTF2_FN),
664 PINMUX_DATA(IDEA1_MARK, PSA11_PSA10_FN1, PTF1_FN),
665 PINMUX_DATA(MSIOF0_PTF_TXD_MARK, PSA11_PSA10_FN2, PTF1_FN),
666 PINMUX_DATA(IDEA0_MARK, PSA11_PSA10_FN1, PTF0_FN),
667 PINMUX_DATA(MSIOF0_PTF_MCK_MARK, PSA11_PSA10_FN2, PTF0_FN),
668
669 /* PTG FN */
670 PINMUX_DATA(AUDCK_MARK, PTG5_FN),
671 PINMUX_DATA(AUDSYNC_MARK, PTG4_FN),
672 PINMUX_DATA(AUDATA3_MARK, PSA3_PSA2_FN1, PTG3_FN),
673 PINMUX_DATA(TPUTO3_MARK, PSA3_PSA2_FN2, PTG3_FN),
674 PINMUX_DATA(AUDATA2_MARK, PSA3_PSA2_FN1, PTG2_FN),
675 PINMUX_DATA(TPUTO2_MARK, PSA3_PSA2_FN2, PTG2_FN),
676 PINMUX_DATA(AUDATA1_MARK, PSA3_PSA2_FN1, PTG1_FN),
677 PINMUX_DATA(TPUTO1_MARK, PSA3_PSA2_FN2, PTG1_FN),
678 PINMUX_DATA(AUDATA0_MARK, PSA3_PSA2_FN1, PTG0_FN),
679 PINMUX_DATA(TPUTO0_MARK, PSA3_PSA2_FN2, PTG0_FN),
680
681 /* PTG FN */
682 PINMUX_DATA(LCDVCPWC_MARK, PTH7_FN),
683 PINMUX_DATA(LCDRD_MARK, PSB15_PSB14_FN1, PTH6_FN),
684 PINMUX_DATA(DV_CLKI_MARK, PSB15_PSB14_FN2, PTH6_FN),
685 PINMUX_DATA(LCDVSYN_MARK, PSB15_PSB14_FN1, PTH5_FN),
686 PINMUX_DATA(DV_CLK_MARK, PSB15_PSB14_FN2, PTH5_FN),
687 PINMUX_DATA(LCDDISP_MARK, PSB13_PSB12_LCDC_RGB, PTH4_FN),
688 PINMUX_DATA(LCDRS_MARK, PSB13_PSB12_LCDC_SYS, PTH4_FN),
689 PINMUX_DATA(LCDHSYN_MARK, PSB13_PSB12_LCDC_RGB, PTH3_FN),
690 PINMUX_DATA(LCDCS_MARK, PSB13_PSB12_LCDC_SYS, PTH3_FN),
691 PINMUX_DATA(LCDDON_MARK, PTH2_FN),
692 PINMUX_DATA(LCDDCK_MARK, PSB13_PSB12_LCDC_RGB, PTH1_FN),
693 PINMUX_DATA(LCDWR_MARK, PSB13_PSB12_LCDC_SYS, PTH1_FN),
694 PINMUX_DATA(LCDVEPWC_MARK, PTH0_FN),
695
696 /* PTJ FN */
697 PINMUX_DATA(STATUS0_MARK, PTJ7_FN),
698 PINMUX_DATA(PDSTATUS_MARK, PTJ5_FN),
699 PINMUX_DATA(A25_MARK, PTJ3_FN),
700 PINMUX_DATA(A24_MARK, PTJ2_FN),
701 PINMUX_DATA(A23_MARK, PTJ1_FN),
702 PINMUX_DATA(A22_MARK, PTJ0_FN),
703
704 /* PTK FN */
705 PINMUX_DATA(SIUAFCK_MARK, PTK7_FN),
706 PINMUX_DATA(SIUAILR_MARK, PSB9_PSB8_FN1, PTK6_FN),
707 PINMUX_DATA(MSIOF1_SS2_MARK, PSB9_PSB8_FN2, PTK6_FN),
708 PINMUX_DATA(MSIOF1_RSYNC_MARK, PSB9_PSB8_FN3, PTK6_FN),
709 PINMUX_DATA(SIUAIBT_MARK, PSB9_PSB8_FN1, PTK5_FN),
710 PINMUX_DATA(MSIOF1_SS1_MARK, PSB9_PSB8_FN2, PTK5_FN),
711 PINMUX_DATA(MSIOF1_RSCK_MARK, PSB9_PSB8_FN3, PTK5_FN),
712 PINMUX_DATA(SIUAISLD_MARK, PSB7_PSB6_FN1, PTK4_FN),
713 PINMUX_DATA(MSIOF1_RXD_MARK, PSB7_PSB6_FN2, PTK4_FN),
714 PINMUX_DATA(SIUAOLR_MARK, PSB7_PSB6_FN1, PTK3_FN),
715 PINMUX_DATA(MSIOF1_TSYNC_MARK, PSB7_PSB6_FN2, PTK3_FN),
716 PINMUX_DATA(SIUAOBT_MARK, PSB7_PSB6_FN1, PTK2_FN),
717 PINMUX_DATA(MSIOF1_TSCK_MARK, PSB7_PSB6_FN2, PTK2_FN),
718 PINMUX_DATA(SIUAOSLD_MARK, PSB7_PSB6_FN1, PTK1_FN),
719 PINMUX_DATA(MSIOF1_RXD_MARK, PSB7_PSB6_FN2, PTK1_FN),
720 PINMUX_DATA(SIUAMCK_MARK, PSB7_PSB6_FN1, PTK0_FN),
721 PINMUX_DATA(MSIOF1_MCK_MARK, PSB7_PSB6_FN2, PTK0_FN),
722
723 /* PTL FN */
724 PINMUX_DATA(LCDD15_MARK, PSB5_PSB4_FN1, PTL7_FN),
725 PINMUX_DATA(DV_D15_MARK, PSB5_PSB4_FN2, PTL7_FN),
726 PINMUX_DATA(LCDD14_MARK, PSB5_PSB4_FN1, PTL6_FN),
727 PINMUX_DATA(DV_D14_MARK, PSB5_PSB4_FN2, PTL6_FN),
728 PINMUX_DATA(LCDD13_MARK, PSB5_PSB4_FN1, PTL5_FN),
729 PINMUX_DATA(DV_D13_MARK, PSB5_PSB4_FN2, PTL5_FN),
730 PINMUX_DATA(LCDD12_MARK, PSB5_PSB4_FN1, PTL4_FN),
731 PINMUX_DATA(DV_D12_MARK, PSB5_PSB4_FN2, PTL4_FN),
732 PINMUX_DATA(LCDD11_MARK, PSB5_PSB4_FN1, PTL3_FN),
733 PINMUX_DATA(DV_D11_MARK, PSB5_PSB4_FN2, PTL3_FN),
734 PINMUX_DATA(LCDD10_MARK, PSB5_PSB4_FN1, PTL2_FN),
735 PINMUX_DATA(DV_D10_MARK, PSB5_PSB4_FN2, PTL2_FN),
736 PINMUX_DATA(LCDD9_MARK, PSB5_PSB4_FN1, PTL1_FN),
737 PINMUX_DATA(DV_D9_MARK, PSB5_PSB4_FN2, PTL1_FN),
738 PINMUX_DATA(LCDD8_MARK, PSB5_PSB4_FN1, PTL0_FN),
739 PINMUX_DATA(DV_D8_MARK, PSB5_PSB4_FN2, PTL0_FN),
740
741 /* PTM FN */
742 PINMUX_DATA(LCDD7_MARK, PSB5_PSB4_FN1, PTM7_FN),
743 PINMUX_DATA(DV_D7_MARK, PSB5_PSB4_FN2, PTM7_FN),
744 PINMUX_DATA(LCDD6_MARK, PSB5_PSB4_FN1, PTM6_FN),
745 PINMUX_DATA(DV_D6_MARK, PSB5_PSB4_FN2, PTM6_FN),
746 PINMUX_DATA(LCDD5_MARK, PSB5_PSB4_FN1, PTM5_FN),
747 PINMUX_DATA(DV_D5_MARK, PSB5_PSB4_FN2, PTM5_FN),
748 PINMUX_DATA(LCDD4_MARK, PSB5_PSB4_FN1, PTM4_FN),
749 PINMUX_DATA(DV_D4_MARK, PSB5_PSB4_FN2, PTM4_FN),
750 PINMUX_DATA(LCDD3_MARK, PSB5_PSB4_FN1, PTM3_FN),
751 PINMUX_DATA(DV_D3_MARK, PSB5_PSB4_FN2, PTM3_FN),
752 PINMUX_DATA(LCDD2_MARK, PSB5_PSB4_FN1, PTM2_FN),
753 PINMUX_DATA(DV_D2_MARK, PSB5_PSB4_FN2, PTM2_FN),
754 PINMUX_DATA(LCDD1_MARK, PSB5_PSB4_FN1, PTM1_FN),
755 PINMUX_DATA(DV_D1_MARK, PSB5_PSB4_FN2, PTM1_FN),
756 PINMUX_DATA(LCDD0_MARK, PSB5_PSB4_FN1, PTM0_FN),
757 PINMUX_DATA(DV_D0_MARK, PSB5_PSB4_FN2, PTM0_FN),
758
759 /* PTN FN */
760 PINMUX_DATA(LCDD23_MARK, PSB3_PSB2_FN1, PTN7_FN),
761 PINMUX_DATA(SCIF5_PTN_SCK_MARK, PSB3_PSB2_FN2, PTN7_FN),
762 PINMUX_DATA(LCDD22_MARK, PSB3_PSB2_FN1, PTN6_FN),
763 PINMUX_DATA(SCIF5_PTN_RXD_MARK, PSB3_PSB2_FN2, PTN6_FN),
764 PINMUX_DATA(LCDD21_MARK, PSB3_PSB2_FN1, PTN5_FN),
765 PINMUX_DATA(SCIF5_PTN_TXD_MARK, PSB3_PSB2_FN2, PTN5_FN),
766 PINMUX_DATA(LCDD20_MARK, PSB3_PSB2_FN1, PTN4_FN),
767 PINMUX_DATA(SCIF4_PTN_SCK_MARK, PSB3_PSB2_FN2, PTN4_FN),
768 PINMUX_DATA(LCDD19_MARK, PSB3_PSB2_FN1, PTN3_FN),
769 PINMUX_DATA(SCIF4_PTN_RXD_MARK, PSB3_PSB2_FN2, PTN3_FN),
770 PINMUX_DATA(LCDD18_MARK, PSB3_PSB2_FN1, PTN2_FN),
771 PINMUX_DATA(SCIF4_PTN_TXD_MARK, PSB3_PSB2_FN2, PTN2_FN),
772 PINMUX_DATA(LCDD17_MARK, PSB5_PSB4_FN1, PTN1_FN),
773 PINMUX_DATA(DV_VSYNC_MARK, PSB5_PSB4_FN2, PTN1_FN),
774 PINMUX_DATA(LCDD16_MARK, PSB5_PSB4_FN1, PTN0_FN),
775 PINMUX_DATA(DV_HSYNC_MARK, PSB5_PSB4_FN2, PTN0_FN),
776
777 /* PTQ FN */
778 PINMUX_DATA(AN3_MARK, PTQ3_FN),
779 PINMUX_DATA(AN2_MARK, PTQ2_FN),
780 PINMUX_DATA(AN1_MARK, PTQ1_FN),
781 PINMUX_DATA(AN0_MARK, PTQ0_FN),
782
783 /* PTR FN */
784 PINMUX_DATA(CS6B_CE1B_MARK, PTR7_FN),
785 PINMUX_DATA(CS6A_CE2B_MARK, PTR6_FN),
786 PINMUX_DATA(CS5B_CE1A_MARK, PTR5_FN),
787 PINMUX_DATA(CS5A_CE2A_MARK, PTR4_FN),
788 PINMUX_DATA(IOIS16_MARK, PSA13_PSA12_FN1, PTR3_FN),
789 PINMUX_DATA(LCDLCLK_PTR_MARK, PSA13_PSA12_FN2, PTR3_FN),
790 PINMUX_DATA(WAIT_MARK, PTR2_FN),
791 PINMUX_DATA(WE3_ICIOWR_MARK, PTR1_FN),
792 PINMUX_DATA(WE2_ICIORD_MARK, PTR0_FN),
793
794 /* PTS FN */
795 PINMUX_DATA(SCIF1_PTS_SCK_MARK, PSC15_PSC14_FN1, PTS7_FN),
796 PINMUX_DATA(SDHI0CD_PTS_MARK, PSC15_PSC14_FN2, PTS7_FN),
797 PINMUX_DATA(SCIF1_PTS_RXD_MARK, PSC15_PSC14_FN1, PTS6_FN),
798 PINMUX_DATA(SDHI0WP_PTS_MARK, PSC15_PSC14_FN2, PTS6_FN),
799 PINMUX_DATA(SCIF1_PTS_TXD_MARK, PSC15_PSC14_FN1, PTS5_FN),
800 PINMUX_DATA(SDHI0D3_PTS_MARK, PSC15_PSC14_FN2, PTS5_FN),
801 PINMUX_DATA(SCIF3_PTS_CTS_MARK, PSC15_PSC14_FN1, PTS4_FN),
802 PINMUX_DATA(SDHI0D2_PTS_MARK, PSC15_PSC14_FN2, PTS4_FN),
803 PINMUX_DATA(SCIF3_PTS_RTS_MARK, PSC15_PSC14_FN1, PTS3_FN),
804 PINMUX_DATA(SDHI0D1_PTS_MARK, PSC15_PSC14_FN2, PTS3_FN),
805 PINMUX_DATA(SCIF3_PTS_SCK_MARK, PSC15_PSC14_FN1, PTS2_FN),
806 PINMUX_DATA(SDHI0D0_PTS_MARK, PSC15_PSC14_FN2, PTS2_FN),
807 PINMUX_DATA(SCIF3_PTS_RXD_MARK, PSC15_PSC14_FN1, PTS1_FN),
808 PINMUX_DATA(SDHI0CMD_PTS_MARK, PSC15_PSC14_FN2, PTS1_FN),
809 PINMUX_DATA(SCIF3_PTS_TXD_MARK, PSC15_PSC14_FN1, PTS0_FN),
810 PINMUX_DATA(SDHI0CLK_PTS_MARK, PSC15_PSC14_FN2, PTS0_FN),
811
812 /* PTT FN */
813 PINMUX_DATA(SCIF0_PTT_SCK_MARK, PSC13_PSC12_FN1, PTT5_FN),
814 PINMUX_DATA(MSIOF0_PTT_TSCK_MARK, PSC13_PSC12_FN2, PTT5_FN),
815 PINMUX_DATA(SCIF0_PTT_RXD_MARK, PSC13_PSC12_FN1, PTT4_FN),
816 PINMUX_DATA(MSIOF0_PTT_RXD_MARK, PSC13_PSC12_FN2, PTT4_FN),
817 PINMUX_DATA(SCIF0_PTT_TXD_MARK, PSC13_PSC12_FN1, PTT3_FN),
818 PINMUX_DATA(MSIOF0_PTT_TXD_MARK, PSC13_PSC12_FN2, PTT3_FN),
819 PINMUX_DATA(SCIF2_PTT_SCK_MARK, PSC11_PSC10_FN1, PTT2_FN),
820 PINMUX_DATA(MSIOF0_PTT_TSYNC_MARK, PSC11_PSC10_FN2, PTT2_FN),
821 PINMUX_DATA(SCIF2_PTT_RXD_MARK, PSC11_PSC10_FN1, PTT1_FN),
822 PINMUX_DATA(MSIOF0_PTT_SS1_MARK, PSC11_PSC10_FN2, PTT1_FN),
823 PINMUX_DATA(MSIOF0_PTT_RSCK_MARK, PSC11_PSC10_FN3, PTT1_FN),
824 PINMUX_DATA(SCIF2_PTT_TXD_MARK, PSC11_PSC10_FN1, PTT0_FN),
825 PINMUX_DATA(MSIOF0_PTT_SS2_MARK, PSC11_PSC10_FN2, PTT0_FN),
826 PINMUX_DATA(MSIOF0_PTT_RSYNC_MARK, PSC11_PSC10_FN3, PTT0_FN),
827
828 /* PTU FN */
829 PINMUX_DATA(FCDE_MARK, PSC9_PSC8_FN1, PTU5_FN),
830 PINMUX_DATA(SCIF0_PTU_SCK_MARK, PSC9_PSC8_FN2, PTU5_FN),
831 PINMUX_DATA(FSC_MARK, PSC9_PSC8_FN1, PTU4_FN),
832 PINMUX_DATA(SCIF0_PTU_RXD_MARK, PSC9_PSC8_FN2, PTU4_FN),
833 PINMUX_DATA(FWE_MARK, PSC9_PSC8_FN1, PTU3_FN),
834 PINMUX_DATA(SCIF0_PTU_TXD_MARK, PSC9_PSC8_FN2, PTU3_FN),
835 PINMUX_DATA(FOE_MARK, PSC7_PSC6_FN1, PTU2_FN),
836 PINMUX_DATA(SCIF2_PTU_SCK_MARK, PSC7_PSC6_FN2, PTU2_FN),
837 PINMUX_DATA(VIO_VD2_MARK, PSC7_PSC6_FN3, PTU2_FN),
838 PINMUX_DATA(FRB_MARK, PSC7_PSC6_FN1, PTU1_FN),
839 PINMUX_DATA(SCIF2_PTU_RXD_MARK, PSC7_PSC6_FN2, PTU1_FN),
840 PINMUX_DATA(VIO_CLK2_MARK, PSC7_PSC6_FN3, PTU1_FN),
841 PINMUX_DATA(FCE_MARK, PSC7_PSC6_FN1, PTU0_FN),
842 PINMUX_DATA(SCIF2_PTU_TXD_MARK, PSC7_PSC6_FN2, PTU0_FN),
843 PINMUX_DATA(VIO_HD2_MARK, PSC7_PSC6_FN3, PTU0_FN),
844
845 /* PTV FN */
846 PINMUX_DATA(NAF7_MARK, PSC7_PSC6_FN1, PTV7_FN),
847 PINMUX_DATA(SCIF1_PTV_SCK_MARK, PSC7_PSC6_FN2, PTV7_FN),
848 PINMUX_DATA(VIO_D15_MARK, PSC7_PSC6_FN3, PTV7_FN),
849 PINMUX_DATA(NAF6_MARK, PSC7_PSC6_FN1, PTV6_FN),
850 PINMUX_DATA(SCIF1_PTV_RXD_MARK, PSC7_PSC6_FN2, PTV6_FN),
851 PINMUX_DATA(VIO_D14_MARK, PSC7_PSC6_FN3, PTV6_FN),
852 PINMUX_DATA(NAF5_MARK, PSC7_PSC6_FN1, PTV5_FN),
853 PINMUX_DATA(SCIF1_PTV_TXD_MARK, PSC7_PSC6_FN2, PTV5_FN),
854 PINMUX_DATA(VIO_D13_MARK, PSC7_PSC6_FN3, PTV5_FN),
855 PINMUX_DATA(NAF4_MARK, PSC7_PSC6_FN1, PTV4_FN),
856 PINMUX_DATA(SCIF3_PTV_CTS_MARK, PSC7_PSC6_FN2, PTV4_FN),
857 PINMUX_DATA(VIO_D12_MARK, PSC7_PSC6_FN3, PTV4_FN),
858 PINMUX_DATA(NAF3_MARK, PSC7_PSC6_FN1, PTV3_FN),
859 PINMUX_DATA(SCIF3_PTV_RTS_MARK, PSC7_PSC6_FN2, PTV3_FN),
860 PINMUX_DATA(VIO_D11_MARK, PSC7_PSC6_FN3, PTV3_FN),
861 PINMUX_DATA(NAF2_MARK, PSC7_PSC6_FN1, PTV2_FN),
862 PINMUX_DATA(SCIF3_PTV_SCK_MARK, PSC7_PSC6_FN2, PTV2_FN),
863 PINMUX_DATA(VIO_D10_MARK, PSC7_PSC6_FN3, PTV2_FN),
864 PINMUX_DATA(NAF1_MARK, PSC7_PSC6_FN1, PTV1_FN),
865 PINMUX_DATA(SCIF3_PTV_RXD_MARK, PSC7_PSC6_FN2, PTV1_FN),
866 PINMUX_DATA(VIO_D9_MARK, PSC7_PSC6_FN3, PTV1_FN),
867 PINMUX_DATA(NAF0_MARK, PSC7_PSC6_FN1, PTV0_FN),
868 PINMUX_DATA(SCIF3_PTV_TXD_MARK, PSC7_PSC6_FN2, PTV0_FN),
869 PINMUX_DATA(VIO_D8_MARK, PSC7_PSC6_FN3, PTV0_FN),
870
871 /* PTW FN */
872 PINMUX_DATA(IRQ7_MARK, PTW7_FN),
873 PINMUX_DATA(IRQ6_MARK, PTW6_FN),
874 PINMUX_DATA(IRQ5_MARK, PTW5_FN),
875 PINMUX_DATA(IRQ4_MARK, PSD15_PSD14_FN1, PTW4_FN),
876 PINMUX_DATA(LCDLCLK_PTW_MARK, PSD15_PSD14_FN2, PTW4_FN),
877 PINMUX_DATA(IRQ3_MARK, PSD13_PSD12_FN1, PTW3_FN),
878 PINMUX_DATA(ADTRG_MARK, PSD13_PSD12_FN2, PTW3_FN),
879 PINMUX_DATA(IRQ2_MARK, PSD11_PSD10_FN1, PTW2_FN),
880 PINMUX_DATA(BS_MARK, PSD11_PSD10_FN2, PTW2_FN),
881 PINMUX_DATA(VIO_CKO_MARK, PSD11_PSD10_FN3, PTW2_FN),
882 PINMUX_DATA(IRQ1_MARK, PSD9_PSD8_FN1, PTW1_FN),
883 PINMUX_DATA(SIUAISPD_MARK, PSD9_PSD8_FN2, PTW1_FN),
884 PINMUX_DATA(IRQ0_MARK, PSD7_PSD6_FN1, PTW0_FN),
885 PINMUX_DATA(SIUAOSPD_MARK, PSD7_PSD6_FN2, PTW0_FN),
886
887 /* PTX FN */
888 PINMUX_DATA(DACK1_MARK, PTX7_FN),
889 PINMUX_DATA(DREQ1_MARK, PSD3_PSD2_FN1, PTX6_FN),
890 PINMUX_DATA(MSIOF0_PTX_MCK_MARK, PSD3_PSD2_FN2, PTX6_FN),
891 PINMUX_DATA(DACK1_MARK, PTX5_FN),
892 PINMUX_DATA(IRDA_OUT_MARK, PSD5_PSD4_FN2, PTX5_FN),
893 PINMUX_DATA(DREQ1_MARK, PTX4_FN),
894 PINMUX_DATA(IRDA_IN_MARK, PSD5_PSD4_FN2, PTX4_FN),
895 PINMUX_DATA(TS0_SDAT_MARK, PTX3_FN),
896 PINMUX_DATA(TS0_SCK_MARK, PTX2_FN),
897 PINMUX_DATA(TS0_SDEN_MARK, PTX1_FN),
898 PINMUX_DATA(TS0_SPSYNC_MARK, PTX0_FN),
899
900 /* PTY FN */
901 PINMUX_DATA(VIO_D7_MARK, PTY7_FN),
902 PINMUX_DATA(VIO_D6_MARK, PTY6_FN),
903 PINMUX_DATA(VIO_D5_MARK, PTY5_FN),
904 PINMUX_DATA(VIO_D4_MARK, PTY4_FN),
905 PINMUX_DATA(VIO_D3_MARK, PTY3_FN),
906 PINMUX_DATA(VIO_D2_MARK, PTY2_FN),
907 PINMUX_DATA(VIO_D1_MARK, PTY1_FN),
908 PINMUX_DATA(VIO_D0_MARK, PTY0_FN),
909
910 /* PTZ FN */
911 PINMUX_DATA(SIUBOBT_MARK, PTZ7_FN),
912 PINMUX_DATA(SIUBOLR_MARK, PTZ6_FN),
913 PINMUX_DATA(SIUBOSLD_MARK, PTZ5_FN),
914 PINMUX_DATA(SIUBMCK_MARK, PTZ4_FN),
915 PINMUX_DATA(VIO_FLD_MARK, PSD1_PSD0_FN1, PTZ3_FN),
916 PINMUX_DATA(SIUBFCK_MARK, PSD1_PSD0_FN2, PTZ3_FN),
917 PINMUX_DATA(VIO_HD1_MARK, PSD1_PSD0_FN1, PTZ2_FN),
918 PINMUX_DATA(SIUBILR_MARK, PSD1_PSD0_FN2, PTZ2_FN),
919 PINMUX_DATA(VIO_VD1_MARK, PSD1_PSD0_FN1, PTZ1_FN),
920 PINMUX_DATA(SIUBIBT_MARK, PSD1_PSD0_FN2, PTZ1_FN),
921 PINMUX_DATA(VIO_CLK1_MARK, PSD1_PSD0_FN1, PTZ0_FN),
922 PINMUX_DATA(SIUBISLD_MARK, PSD1_PSD0_FN2, PTZ0_FN),
923};
924
925static struct pinmux_gpio pinmux_gpios[] = {
926 /* PTA */
927 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
928 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
929 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
930 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
931 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
932 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
933 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
934 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
935
936 /* PTB */
937 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
938 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
939 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
940 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
941 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
942 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
943 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
944 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
945
946 /* PTC */
947 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
948 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
949 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
950 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
951 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
952 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
953 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
954 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
955
956 /* PTD */
957 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
958 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
959 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
960 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
961 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
962 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
963 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
964 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
965
966 /* PTE */
967 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
968 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
969 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
970 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
971 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
972 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
973
974 /* PTF */
975 PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
976 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
977 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
978 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
979 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
980 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
981 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
982 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
983
984 /* PTG */
985 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
986 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
987 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
988 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
989 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
990 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
991
992 /* PTH */
993 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
994 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
995 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
996 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
997 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
998 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
999 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
1000 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
1001
1002 /* PTJ */
1003 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
1004 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1005 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
1006 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
1007 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
1008 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
1009
1010 /* PTK */
1011 PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
1012 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
1013 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
1014 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
1015 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
1016 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
1017 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
1018 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1019
1020 /* PTL */
1021 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
1022 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1023 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1024 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
1025 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
1026 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
1027 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
1028 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1029
1030 /* PTM */
1031 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
1032 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1033 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1034 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
1035 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
1036 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
1037 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
1038 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1039
1040 /* PTN */
1041 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
1042 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1043 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1044 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
1045 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
1046 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
1047 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
1048 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
1049
1050 /* PTQ */
1051 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
1052 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
1053 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
1054 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
1055
1056 /* PTR */
1057 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
1058 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
1059 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
1060 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
1061 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
1062 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
1063 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
1064 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
1065
1066 /* PTS */
1067 PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
1068 PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
1069 PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
1070 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
1071 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
1072 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
1073 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
1074 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1075
1076 /* PTT */
1077 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1078 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1079 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
1080 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
1081 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
1082 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
1083
1084 /* PTU */
1085 PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
1086 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
1087 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
1088 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
1089 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
1090 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
1091
1092 /* PTV */
1093 PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
1094 PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
1095 PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
1096 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
1097 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
1098 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
1099 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
1100 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
1101
1102 /* PTW */
1103 PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
1104 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
1105 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
1106 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
1107 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
1108 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
1109 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
1110 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
1111
1112 /* PTX */
1113 PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
1114 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
1115 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
1116 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
1117 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
1118 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
1119 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
1120 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
1121
1122 /* PTY */
1123 PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
1124 PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
1125 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
1126 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
1127 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
1128 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
1129 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
1130 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
1131
1132 /* PTZ */
1133 PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
1134 PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
1135 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
1136 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
1137 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
1138 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
1139 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1140 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1141
1142 /* SCIF0 */
1143 PINMUX_GPIO(GPIO_FN_SCIF0_PTT_TXD, SCIF0_PTT_TXD_MARK),
1144 PINMUX_GPIO(GPIO_FN_SCIF0_PTT_RXD, SCIF0_PTT_RXD_MARK),
1145 PINMUX_GPIO(GPIO_FN_SCIF0_PTT_SCK, SCIF0_PTT_SCK_MARK),
1146 PINMUX_GPIO(GPIO_FN_SCIF0_PTU_TXD, SCIF0_PTU_TXD_MARK),
1147 PINMUX_GPIO(GPIO_FN_SCIF0_PTU_RXD, SCIF0_PTU_RXD_MARK),
1148 PINMUX_GPIO(GPIO_FN_SCIF0_PTU_SCK, SCIF0_PTU_SCK_MARK),
1149
1150 /* SCIF1 */
1151 PINMUX_GPIO(GPIO_FN_SCIF1_PTS_TXD, SCIF1_PTS_TXD_MARK),
1152 PINMUX_GPIO(GPIO_FN_SCIF1_PTS_RXD, SCIF1_PTS_RXD_MARK),
1153 PINMUX_GPIO(GPIO_FN_SCIF1_PTS_SCK, SCIF1_PTS_SCK_MARK),
1154 PINMUX_GPIO(GPIO_FN_SCIF1_PTV_TXD, SCIF1_PTV_TXD_MARK),
1155 PINMUX_GPIO(GPIO_FN_SCIF1_PTV_RXD, SCIF1_PTV_RXD_MARK),
1156 PINMUX_GPIO(GPIO_FN_SCIF1_PTV_SCK, SCIF1_PTV_SCK_MARK),
1157
1158 /* SCIF2 */
1159 PINMUX_GPIO(GPIO_FN_SCIF2_PTT_TXD, SCIF2_PTT_TXD_MARK),
1160 PINMUX_GPIO(GPIO_FN_SCIF2_PTT_RXD, SCIF2_PTT_RXD_MARK),
1161 PINMUX_GPIO(GPIO_FN_SCIF2_PTT_SCK, SCIF2_PTT_SCK_MARK),
1162 PINMUX_GPIO(GPIO_FN_SCIF2_PTU_TXD, SCIF2_PTU_TXD_MARK),
1163 PINMUX_GPIO(GPIO_FN_SCIF2_PTU_RXD, SCIF2_PTU_RXD_MARK),
1164 PINMUX_GPIO(GPIO_FN_SCIF2_PTU_SCK, SCIF2_PTU_SCK_MARK),
1165
1166 /* SCIF3 */
1167 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_TXD, SCIF3_PTS_TXD_MARK),
1168 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_RXD, SCIF3_PTS_RXD_MARK),
1169 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_SCK, SCIF3_PTS_SCK_MARK),
1170 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_RTS, SCIF3_PTS_RTS_MARK),
1171 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_CTS, SCIF3_PTS_CTS_MARK),
1172 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_TXD, SCIF3_PTV_TXD_MARK),
1173 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_RXD, SCIF3_PTV_RXD_MARK),
1174 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_SCK, SCIF3_PTV_SCK_MARK),
1175 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_RTS, SCIF3_PTV_RTS_MARK),
1176 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_CTS, SCIF3_PTV_CTS_MARK),
1177
1178 /* SCIF4 */
1179 PINMUX_GPIO(GPIO_FN_SCIF4_PTE_TXD, SCIF4_PTE_TXD_MARK),
1180 PINMUX_GPIO(GPIO_FN_SCIF4_PTE_RXD, SCIF4_PTE_RXD_MARK),
1181 PINMUX_GPIO(GPIO_FN_SCIF4_PTE_SCK, SCIF4_PTE_SCK_MARK),
1182 PINMUX_GPIO(GPIO_FN_SCIF4_PTN_TXD, SCIF4_PTN_TXD_MARK),
1183 PINMUX_GPIO(GPIO_FN_SCIF4_PTN_RXD, SCIF4_PTN_RXD_MARK),
1184 PINMUX_GPIO(GPIO_FN_SCIF4_PTN_SCK, SCIF4_PTN_SCK_MARK),
1185
1186 /* SCIF5 */
1187 PINMUX_GPIO(GPIO_FN_SCIF5_PTE_TXD, SCIF5_PTE_TXD_MARK),
1188 PINMUX_GPIO(GPIO_FN_SCIF5_PTE_RXD, SCIF5_PTE_RXD_MARK),
1189 PINMUX_GPIO(GPIO_FN_SCIF5_PTE_SCK, SCIF5_PTE_SCK_MARK),
1190 PINMUX_GPIO(GPIO_FN_SCIF5_PTN_TXD, SCIF5_PTN_TXD_MARK),
1191 PINMUX_GPIO(GPIO_FN_SCIF5_PTN_RXD, SCIF5_PTN_RXD_MARK),
1192 PINMUX_GPIO(GPIO_FN_SCIF5_PTN_SCK, SCIF5_PTN_SCK_MARK),
1193
1194 /* CEU */
1195 PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK),
1196 PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK),
1197 PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK),
1198 PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK),
1199 PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK),
1200 PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK),
1201 PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK),
1202 PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK),
1203 PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK),
1204 PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK),
1205 PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK),
1206 PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK),
1207 PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK),
1208 PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK),
1209 PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK),
1210 PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK),
1211 PINMUX_GPIO(GPIO_FN_VIO_CLK1, VIO_CLK1_MARK),
1212 PINMUX_GPIO(GPIO_FN_VIO_VD1, VIO_VD1_MARK),
1213 PINMUX_GPIO(GPIO_FN_VIO_HD1, VIO_HD1_MARK),
1214 PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK),
1215 PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK),
1216 PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK),
1217 PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK),
1218 PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK),
1219
1220 /* LCDC */
1221 PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK),
1222 PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK),
1223 PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK),
1224 PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK),
1225 PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK),
1226 PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK),
1227 PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK),
1228 PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK),
1229 PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK),
1230 PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK),
1231 PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK),
1232 PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK),
1233 PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK),
1234 PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK),
1235 PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK),
1236 PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK),
1237 PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK),
1238 PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK),
1239 PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK),
1240 PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK),
1241 PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK),
1242 PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK),
1243 PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK),
1244 PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK),
1245 PINMUX_GPIO(GPIO_FN_LCDLCLK_PTR, LCDLCLK_PTR_MARK),
1246 PINMUX_GPIO(GPIO_FN_LCDLCLK_PTW, LCDLCLK_PTW_MARK),
1247 /* Main LCD */
1248 PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK),
1249 PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK),
1250 PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK),
1251 PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK),
1252 /* Main LCD - RGB Mode */
1253 PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK),
1254 PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK),
1255 PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK),
1256 /* Main LCD - SYS Mode */
1257 PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK),
1258 PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK),
1259 PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK),
1260 PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK),
1261
1262 /* IRQ */
1263 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1264 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1265 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1266 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1267 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1268 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1269 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1270 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1271
1272 /* AUD */
1273 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1274 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1275 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1276 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1277 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1278 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1279
1280 /* SDHI0 (PTD) */
1281 PINMUX_GPIO(GPIO_FN_SDHI0CD_PTD, SDHI0CD_PTD_MARK),
1282 PINMUX_GPIO(GPIO_FN_SDHI0WP_PTD, SDHI0WP_PTD_MARK),
1283 PINMUX_GPIO(GPIO_FN_SDHI0D3_PTD, SDHI0D3_PTD_MARK),
1284 PINMUX_GPIO(GPIO_FN_SDHI0D2_PTD, SDHI0D2_PTD_MARK),
1285 PINMUX_GPIO(GPIO_FN_SDHI0D1_PTD, SDHI0D1_PTD_MARK),
1286 PINMUX_GPIO(GPIO_FN_SDHI0D0_PTD, SDHI0D0_PTD_MARK),
1287 PINMUX_GPIO(GPIO_FN_SDHI0CMD_PTD, SDHI0CMD_PTD_MARK),
1288 PINMUX_GPIO(GPIO_FN_SDHI0CLK_PTD, SDHI0CLK_PTD_MARK),
1289
1290 /* SDHI0 (PTS) */
1291 PINMUX_GPIO(GPIO_FN_SDHI0CD_PTS, SDHI0CD_PTS_MARK),
1292 PINMUX_GPIO(GPIO_FN_SDHI0WP_PTS, SDHI0WP_PTS_MARK),
1293 PINMUX_GPIO(GPIO_FN_SDHI0D3_PTS, SDHI0D3_PTS_MARK),
1294 PINMUX_GPIO(GPIO_FN_SDHI0D2_PTS, SDHI0D2_PTS_MARK),
1295 PINMUX_GPIO(GPIO_FN_SDHI0D1_PTS, SDHI0D1_PTS_MARK),
1296 PINMUX_GPIO(GPIO_FN_SDHI0D0_PTS, SDHI0D0_PTS_MARK),
1297 PINMUX_GPIO(GPIO_FN_SDHI0CMD_PTS, SDHI0CMD_PTS_MARK),
1298 PINMUX_GPIO(GPIO_FN_SDHI0CLK_PTS, SDHI0CLK_PTS_MARK),
1299
1300 /* SDHI1 */
1301 PINMUX_GPIO(GPIO_FN_SDHI1CD, SDHI1CD_MARK),
1302 PINMUX_GPIO(GPIO_FN_SDHI1WP, SDHI1WP_MARK),
1303 PINMUX_GPIO(GPIO_FN_SDHI1D3, SDHI1D3_MARK),
1304 PINMUX_GPIO(GPIO_FN_SDHI1D2, SDHI1D2_MARK),
1305 PINMUX_GPIO(GPIO_FN_SDHI1D1, SDHI1D1_MARK),
1306 PINMUX_GPIO(GPIO_FN_SDHI1D0, SDHI1D0_MARK),
1307 PINMUX_GPIO(GPIO_FN_SDHI1CMD, SDHI1CMD_MARK),
1308 PINMUX_GPIO(GPIO_FN_SDHI1CLK, SDHI1CLK_MARK),
1309
1310 /* SIUA */
1311 PINMUX_GPIO(GPIO_FN_SIUAFCK, SIUAFCK_MARK),
1312 PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK),
1313 PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK),
1314 PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK),
1315 PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK),
1316 PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK),
1317 PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK),
1318 PINMUX_GPIO(GPIO_FN_SIUAMCK, SIUAMCK_MARK),
1319 PINMUX_GPIO(GPIO_FN_SIUAISPD, SIUAISPD_MARK),
1320 PINMUX_GPIO(GPIO_FN_SIUOSPD, SIUAOSPD_MARK),
1321
1322 /* SIUB */
1323 PINMUX_GPIO(GPIO_FN_SIUBFCK, SIUBFCK_MARK),
1324 PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK),
1325 PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK),
1326 PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK),
1327 PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK),
1328 PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK),
1329 PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK),
1330 PINMUX_GPIO(GPIO_FN_SIUBMCK, SIUBMCK_MARK),
1331
1332 /* IRDA */
1333 PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK),
1334 PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK),
1335
1336 /* VOU */
1337 PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK),
1338 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1339 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1340 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1341 PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK),
1342 PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK),
1343 PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK),
1344 PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK),
1345 PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK),
1346 PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK),
1347 PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK),
1348 PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK),
1349 PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK),
1350 PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK),
1351 PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK),
1352 PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK),
1353 PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK),
1354 PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK),
1355 PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK),
1356 PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK),
1357
1358 /* KEYSC */
1359 PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK),
1360 PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK),
1361 PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK),
1362 PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK),
1363 PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK),
1364 PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK),
1365 PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK),
1366 PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK),
1367 PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK),
1368 PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK),
1369 PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK),
1370
1371 /* MSIOF0 (PTF) */
1372 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TXD, MSIOF0_PTF_TXD_MARK),
1373 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RXD, MSIOF0_PTF_RXD_MARK),
1374 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_MCK, MSIOF0_PTF_MCK_MARK),
1375 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TSYNC, MSIOF0_PTF_TSYNC_MARK),
1376 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TSCK, MSIOF0_PTF_TSCK_MARK),
1377 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RSYNC, MSIOF0_PTF_RSYNC_MARK),
1378 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RSCK, MSIOF0_PTF_RSCK_MARK),
1379 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_SS1, MSIOF0_PTF_SS1_MARK),
1380 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_SS2, MSIOF0_PTF_SS2_MARK),
1381
1382 /* MSIOF0 (PTT+PTX) */
1383 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TXD, MSIOF0_PTT_TXD_MARK),
1384 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RXD, MSIOF0_PTT_RXD_MARK),
1385 PINMUX_GPIO(GPIO_FN_MSIOF0_PTX_MCK, MSIOF0_PTX_MCK_MARK),
1386 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TSYNC, MSIOF0_PTT_TSYNC_MARK),
1387 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TSCK, MSIOF0_PTT_TSCK_MARK),
1388 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RSYNC, MSIOF0_PTT_RSYNC_MARK),
1389 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RSCK, MSIOF0_PTT_RSCK_MARK),
1390 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_SS1, MSIOF0_PTT_SS1_MARK),
1391 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_SS2, MSIOF0_PTT_SS2_MARK),
1392
1393 /* MSIOF1 */
1394 PINMUX_GPIO(GPIO_FN_MSIOF1_TXD, MSIOF1_TXD_MARK),
1395 PINMUX_GPIO(GPIO_FN_MSIOF1_RXD, MSIOF1_RXD_MARK),
1396 PINMUX_GPIO(GPIO_FN_MSIOF1_MCK, MSIOF1_MCK_MARK),
1397 PINMUX_GPIO(GPIO_FN_MSIOF1_TSYNC, MSIOF1_TSYNC_MARK),
1398 PINMUX_GPIO(GPIO_FN_MSIOF1_TSCK, MSIOF1_TSCK_MARK),
1399 PINMUX_GPIO(GPIO_FN_MSIOF1_RSYNC, MSIOF1_RSYNC_MARK),
1400 PINMUX_GPIO(GPIO_FN_MSIOF1_RSCK, MSIOF1_RSCK_MARK),
1401 PINMUX_GPIO(GPIO_FN_MSIOF1_SS1, MSIOF1_SS1_MARK),
1402 PINMUX_GPIO(GPIO_FN_MSIOF1_SS2, MSIOF1_SS2_MARK),
1403
1404 /* TSIF */
1405 PINMUX_GPIO(GPIO_FN_TS0_SDAT, TS0_SDAT_MARK),
1406 PINMUX_GPIO(GPIO_FN_TS0_SCK, TS0_SCK_MARK),
1407 PINMUX_GPIO(GPIO_FN_TS0_SDEN, TS0_SDEN_MARK),
1408 PINMUX_GPIO(GPIO_FN_TS0_SPSYNC, TS0_SPSYNC_MARK),
1409
1410 /* FLCTL */
1411 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1412 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1413 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1414 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1415 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1416 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1417 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1418 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1419 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1420 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1421 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1422 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1423 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1424 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1425
1426 /* DMAC */
1427 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1428 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1429 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1430 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1431
1432 /* ADC */
1433 PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK),
1434 PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK),
1435 PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK),
1436 PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK),
1437 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
1438
1439 /* CPG */
1440 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1441 PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK),
1442
1443 /* TPU */
1444 PINMUX_GPIO(GPIO_FN_TPUTO0, TPUTO0_MARK),
1445 PINMUX_GPIO(GPIO_FN_TPUTO1, TPUTO1_MARK),
1446 PINMUX_GPIO(GPIO_FN_TPUTO2, TPUTO2_MARK),
1447 PINMUX_GPIO(GPIO_FN_TPUTO3, TPUTO3_MARK),
1448
1449 /* BSC */
1450 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
1451 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
1452 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
1453 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
1454 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
1455 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
1456 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
1457 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
1458 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
1459 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
1460 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
1461 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
1462 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
1463 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
1464 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
1465 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
1466 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1467 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1468 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1469 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1470 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1471 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1472 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1473 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
1474 PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK),
1475 PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
1476 PINMUX_GPIO(GPIO_FN_CS5A_CE2A, CS5A_CE2A_MARK),
1477 PINMUX_GPIO(GPIO_FN_WE3_ICIOWR, WE3_ICIOWR_MARK),
1478 PINMUX_GPIO(GPIO_FN_WE2_ICIORD, WE2_ICIORD_MARK),
1479
1480 /* ATAPI */
1481 PINMUX_GPIO(GPIO_FN_IDED15, IDED15_MARK),
1482 PINMUX_GPIO(GPIO_FN_IDED14, IDED14_MARK),
1483 PINMUX_GPIO(GPIO_FN_IDED13, IDED13_MARK),
1484 PINMUX_GPIO(GPIO_FN_IDED12, IDED12_MARK),
1485 PINMUX_GPIO(GPIO_FN_IDED11, IDED11_MARK),
1486 PINMUX_GPIO(GPIO_FN_IDED10, IDED10_MARK),
1487 PINMUX_GPIO(GPIO_FN_IDED9, IDED9_MARK),
1488 PINMUX_GPIO(GPIO_FN_IDED8, IDED8_MARK),
1489 PINMUX_GPIO(GPIO_FN_IDED7, IDED7_MARK),
1490 PINMUX_GPIO(GPIO_FN_IDED6, IDED6_MARK),
1491 PINMUX_GPIO(GPIO_FN_IDED5, IDED5_MARK),
1492 PINMUX_GPIO(GPIO_FN_IDED4, IDED4_MARK),
1493 PINMUX_GPIO(GPIO_FN_IDED3, IDED3_MARK),
1494 PINMUX_GPIO(GPIO_FN_IDED2, IDED2_MARK),
1495 PINMUX_GPIO(GPIO_FN_IDED1, IDED1_MARK),
1496 PINMUX_GPIO(GPIO_FN_IDED0, IDED0_MARK),
1497 PINMUX_GPIO(GPIO_FN_DIRECTION, DIRECTION_MARK),
1498 PINMUX_GPIO(GPIO_FN_EXBUF_ENB, EXBUF_ENB_MARK),
1499 PINMUX_GPIO(GPIO_FN_IDERST, IDERST_MARK),
1500 PINMUX_GPIO(GPIO_FN_IODACK, IODACK_MARK),
1501 PINMUX_GPIO(GPIO_FN_IODREQ, IODREQ_MARK),
1502 PINMUX_GPIO(GPIO_FN_IDEIORDY, IDEIORDY_MARK),
1503 PINMUX_GPIO(GPIO_FN_IDEINT, IDEINT_MARK),
1504 PINMUX_GPIO(GPIO_FN_IDEIOWR, IDEIOWR_MARK),
1505 PINMUX_GPIO(GPIO_FN_IDEIORD, IDEIORD_MARK),
1506 PINMUX_GPIO(GPIO_FN_IDECS1, IDECS1_MARK),
1507 PINMUX_GPIO(GPIO_FN_IDECS0, IDECS0_MARK),
1508 PINMUX_GPIO(GPIO_FN_IDEA2, IDEA2_MARK),
1509 PINMUX_GPIO(GPIO_FN_IDEA1, IDEA1_MARK),
1510 PINMUX_GPIO(GPIO_FN_IDEA0, IDEA0_MARK),
1511 };
1512
1513static struct pinmux_cfg_reg pinmux_config_regs[] = {
1514 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
1515 PTA7_FN, PTA7_OUT, 0, PTA7_IN,
1516 PTA6_FN, PTA6_OUT, 0, PTA6_IN,
1517 PTA5_FN, PTA5_OUT, 0, PTA5_IN,
1518 PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
1519 PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
1520 PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
1521 PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
1522 PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
1523 },
1524 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
1525 PTB7_FN, PTB7_OUT, 0, PTB7_IN,
1526 PTB6_FN, PTB6_OUT, 0, PTB6_IN,
1527 PTB5_FN, PTB5_OUT, 0, PTB5_IN,
1528 PTB4_FN, PTB4_OUT, 0, PTB4_IN,
1529 PTB3_FN, PTB3_OUT, 0, PTB3_IN,
1530 PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
1531 PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
1532 PTB0_FN, PTB0_OUT, 0, PTB0_IN }
1533 },
1534 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
1535 PTC7_FN, PTC7_OUT, 0, PTC7_IN,
1536 PTC6_FN, PTC6_OUT, 0, PTC6_IN,
1537 PTC5_FN, PTC5_OUT, 0, PTC5_IN,
1538 PTC4_FN, PTC4_OUT, 0, PTC4_IN,
1539 PTC3_FN, PTC3_OUT, 0, PTC3_IN,
1540 PTC2_FN, PTC2_OUT, 0, PTC2_IN,
1541 PTC1_FN, PTC1_OUT, 0, PTC1_IN,
1542 PTC0_FN, PTC0_OUT, 0, PTC0_IN }
1543 },
1544 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
1545 PTD7_FN, PTD7_OUT, 0, PTD7_IN,
1546 PTD6_FN, PTD6_OUT, 0, PTD6_IN,
1547 PTD5_FN, PTD5_OUT, 0, PTD5_IN,
1548 PTD4_FN, PTD4_OUT, 0, PTD4_IN,
1549 PTD3_FN, PTD3_OUT, 0, PTD3_IN,
1550 PTD2_FN, PTD2_OUT, 0, PTD2_IN,
1551 PTD1_FN, PTD1_OUT, 0, PTD1_IN,
1552 PTD0_FN, PTD0_OUT, 0, PTD0_IN }
1553 },
1554 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
1555 0, 0, 0, 0,
1556 0, 0, 0, 0,
1557 PTE5_FN, PTE5_OUT, 0, PTE5_IN,
1558 PTE4_FN, PTE4_OUT, 0, PTE4_IN,
1559 PTE3_FN, PTE3_OUT, 0, PTE3_IN,
1560 PTE2_FN, PTE2_OUT, 0, PTE2_IN,
1561 PTE1_FN, PTE1_OUT, 0, PTE1_IN,
1562 PTE0_FN, PTE0_OUT, 0, PTE0_IN }
1563 },
1564 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1565 PTF7_FN, PTF7_OUT, 0, PTF7_IN,
1566 PTF6_FN, PTF6_OUT, 0, PTF6_IN,
1567 PTF5_FN, PTF5_OUT, 0, PTF5_IN,
1568 PTF4_FN, PTF4_OUT, 0, PTF4_IN,
1569 PTF3_FN, PTF3_OUT, 0, PTF3_IN,
1570 PTF2_FN, PTF2_OUT, 0, PTF2_IN,
1571 PTF1_FN, PTF1_OUT, 0, PTF1_IN,
1572 PTF0_FN, PTF0_OUT, 0, PTF0_IN }
1573 },
1574 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1575 0, 0, 0, 0,
1576 0, 0, 0, 0,
1577 PTG5_FN, PTG5_OUT, 0, 0,
1578 PTG4_FN, PTG4_OUT, 0, 0,
1579 PTG3_FN, PTG3_OUT, 0, 0,
1580 PTG2_FN, PTG2_OUT, 0, 0,
1581 PTG1_FN, PTG1_OUT, 0, 0,
1582 PTG0_FN, PTG0_OUT, 0, 0 }
1583 },
1584 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1585 PTH7_FN, PTH7_OUT, 0, PTH7_IN,
1586 PTH6_FN, PTH6_OUT, 0, PTH6_IN,
1587 PTH5_FN, PTH5_OUT, 0, PTH5_IN,
1588 PTH4_FN, PTH4_OUT, 0, PTH4_IN,
1589 PTH3_FN, PTH3_OUT, 0, PTH3_IN,
1590 PTH2_FN, PTH2_OUT, 0, PTH2_IN,
1591 PTH1_FN, PTH1_OUT, 0, PTH1_IN,
1592 PTH0_FN, PTH0_OUT, 0, PTH0_IN }
1593 },
1594 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1595 PTJ7_FN, PTJ7_OUT, 0, 0,
1596 0, 0, 0, 0,
1597 PTJ5_FN, PTJ5_OUT, 0, 0,
1598 0, 0, 0, 0,
1599 PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN,
1600 PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN,
1601 PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN,
1602 PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN }
1603 },
1604 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1605 PTK7_FN, PTK7_OUT, 0, PTK7_IN,
1606 PTK6_FN, PTK6_OUT, 0, PTK6_IN,
1607 PTK5_FN, PTK5_OUT, 0, PTK5_IN,
1608 PTK4_FN, PTK4_OUT, 0, PTK4_IN,
1609 PTK3_FN, PTK3_OUT, 0, PTK3_IN,
1610 PTK2_FN, PTK2_OUT, 0, PTK2_IN,
1611 PTK1_FN, PTK1_OUT, 0, PTK1_IN,
1612 PTK0_FN, PTK0_OUT, 0, PTK0_IN }
1613 },
1614 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1615 PTL7_FN, PTL7_OUT, 0, PTL7_IN,
1616 PTL6_FN, PTL6_OUT, 0, PTL6_IN,
1617 PTL5_FN, PTL5_OUT, 0, PTL5_IN,
1618 PTL4_FN, PTL4_OUT, 0, PTL4_IN,
1619 PTL3_FN, PTL3_OUT, 0, PTL3_IN,
1620 PTL2_FN, PTL2_OUT, 0, PTL2_IN,
1621 PTL1_FN, PTL1_OUT, 0, PTL1_IN,
1622 PTL0_FN, PTL0_OUT, 0, PTL0_IN }
1623 },
1624 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1625 PTM7_FN, PTM7_OUT, 0, PTM7_IN,
1626 PTM6_FN, PTM6_OUT, 0, PTM6_IN,
1627 PTM5_FN, PTM5_OUT, 0, PTM5_IN,
1628 PTM4_FN, PTM4_OUT, 0, PTM4_IN,
1629 PTM3_FN, PTM3_OUT, 0, PTM3_IN,
1630 PTM2_FN, PTM2_OUT, 0, PTM2_IN,
1631 PTM1_FN, PTM1_OUT, 0, PTM1_IN,
1632 PTM0_FN, PTM0_OUT, 0, PTM0_IN }
1633 },
1634 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
1635 PTN7_FN, PTN7_OUT, 0, PTN7_IN,
1636 PTN6_FN, PTN6_OUT, 0, PTN6_IN,
1637 PTN5_FN, PTN5_OUT, 0, PTN5_IN,
1638 PTN4_FN, PTN4_OUT, 0, PTN4_IN,
1639 PTN3_FN, PTN3_OUT, 0, PTN3_IN,
1640 PTN2_FN, PTN2_OUT, 0, PTN2_IN,
1641 PTN1_FN, PTN1_OUT, 0, PTN1_IN,
1642 PTN0_FN, PTN0_OUT, 0, PTN0_IN }
1643 },
1644 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
1645 0, 0, 0, 0,
1646 0, 0, 0, 0,
1647 0, 0, 0, 0,
1648 0, 0, 0, 0,
1649 PTQ3_FN, 0, 0, PTQ3_IN,
1650 PTQ2_FN, 0, 0, PTQ2_IN,
1651 PTQ1_FN, 0, 0, PTQ1_IN,
1652 PTQ0_FN, 0, 0, PTQ0_IN }
1653 },
1654 { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
1655 PTR7_FN, PTR7_OUT, 0, PTR7_IN,
1656 PTR6_FN, PTR6_OUT, 0, PTR6_IN,
1657 PTR5_FN, PTR5_OUT, 0, PTR5_IN,
1658 PTR4_FN, PTR4_OUT, 0, PTR4_IN,
1659 PTR3_FN, 0, 0, PTR3_IN,
1660 PTR2_FN, 0, PTR2_IN_PU, PTR2_IN,
1661 PTR1_FN, PTR1_OUT, 0, PTR1_IN,
1662 PTR0_FN, PTR0_OUT, 0, PTR0_IN }
1663 },
1664 { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
1665 PTS7_FN, PTS7_OUT, 0, PTS7_IN,
1666 PTS6_FN, PTS6_OUT, 0, PTS6_IN,
1667 PTS5_FN, PTS5_OUT, 0, PTS5_IN,
1668 PTS4_FN, PTS4_OUT, 0, PTS4_IN,
1669 PTS3_FN, PTS3_OUT, 0, PTS3_IN,
1670 PTS2_FN, PTS2_OUT, 0, PTS2_IN,
1671 PTS1_FN, PTS1_OUT, 0, PTS1_IN,
1672 PTS0_FN, PTS0_OUT, 0, PTS0_IN }
1673 },
1674 { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
1675 0, 0, 0, 0,
1676 0, 0, 0, 0,
1677 PTT5_FN, PTT5_OUT, 0, PTT5_IN,
1678 PTT4_FN, PTT4_OUT, 0, PTT4_IN,
1679 PTT3_FN, PTT3_OUT, 0, PTT3_IN,
1680 PTT2_FN, PTT2_OUT, 0, PTT2_IN,
1681 PTT1_FN, PTT1_OUT, 0, PTT1_IN,
1682 PTT0_FN, PTT0_OUT, 0, PTT0_IN }
1683 },
1684 { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
1685 0, 0, 0, 0,
1686 0, 0, 0, 0,
1687 PTU5_FN, PTU5_OUT, 0, PTU5_IN,
1688 PTU4_FN, PTU4_OUT, 0, PTU4_IN,
1689 PTU3_FN, PTU3_OUT, 0, PTU3_IN,
1690 PTU2_FN, PTU2_OUT, 0, PTU2_IN,
1691 PTU1_FN, PTU1_OUT, 0, PTU1_IN,
1692 PTU0_FN, PTU0_OUT, 0, PTU0_IN }
1693 },
1694 { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
1695 PTV7_FN, PTV7_OUT, 0, PTV7_IN,
1696 PTV6_FN, PTV6_OUT, 0, PTV6_IN,
1697 PTV5_FN, PTV5_OUT, 0, PTV5_IN,
1698 PTV4_FN, PTV4_OUT, 0, PTV4_IN,
1699 PTV3_FN, PTV3_OUT, 0, PTV3_IN,
1700 PTV2_FN, PTV2_OUT, 0, PTV2_IN,
1701 PTV1_FN, PTV1_OUT, 0, PTV1_IN,
1702 PTV0_FN, PTV0_OUT, 0, PTV0_IN }
1703 },
1704 { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
1705 PTW7_FN, PTW7_OUT, 0, PTW7_IN,
1706 PTW6_FN, PTW6_OUT, 0, PTW6_IN,
1707 PTW5_FN, PTW5_OUT, 0, PTW5_IN,
1708 PTW4_FN, PTW4_OUT, 0, PTW4_IN,
1709 PTW3_FN, PTW3_OUT, 0, PTW3_IN,
1710 PTW2_FN, PTW2_OUT, 0, PTW2_IN,
1711 PTW1_FN, PTW1_OUT, 0, PTW1_IN,
1712 PTW0_FN, PTW0_OUT, 0, PTW0_IN }
1713 },
1714 { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
1715 PTX7_FN, PTX7_OUT, 0, PTX7_IN,
1716 PTX6_FN, PTX6_OUT, 0, PTX6_IN,
1717 PTX5_FN, PTX5_OUT, 0, PTX5_IN,
1718 PTX4_FN, PTX4_OUT, 0, PTX4_IN,
1719 PTX3_FN, PTX3_OUT, 0, PTX3_IN,
1720 PTX2_FN, PTX2_OUT, 0, PTX2_IN,
1721 PTX1_FN, PTX1_OUT, 0, PTX1_IN,
1722 PTX0_FN, PTX0_OUT, 0, PTX0_IN }
1723 },
1724 { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
1725 PTY7_FN, PTY7_OUT, 0, PTY7_IN,
1726 PTY6_FN, PTY6_OUT, 0, PTY6_IN,
1727 PTY5_FN, PTY5_OUT, 0, PTY5_IN,
1728 PTY4_FN, PTY4_OUT, 0, PTY4_IN,
1729 PTY3_FN, PTY3_OUT, 0, PTY3_IN,
1730 PTY2_FN, PTY2_OUT, 0, PTY2_IN,
1731 PTY1_FN, PTY1_OUT, 0, PTY1_IN,
1732 PTY0_FN, PTY0_OUT, 0, PTY0_IN }
1733 },
1734 { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
1735 PTZ7_FN, PTZ7_OUT, 0, PTZ7_IN,
1736 PTZ6_FN, PTZ6_OUT, 0, PTZ6_IN,
1737 PTZ5_FN, PTZ5_OUT, 0, PTZ5_IN,
1738 PTZ4_FN, PTZ4_OUT, 0, PTZ4_IN,
1739 PTZ3_FN, PTZ3_OUT, 0, PTZ3_IN,
1740 PTZ2_FN, PTZ2_OUT, 0, PTZ2_IN,
1741 PTZ1_FN, PTZ1_OUT, 0, PTZ1_IN,
1742 PTZ0_FN, PTZ0_OUT, 0, PTZ0_IN }
1743 },
1744 { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 2) {
1745 PSA15_PSA14_FN1, PSA15_PSA14_FN2, 0, 0,
1746 PSA13_PSA12_FN1, PSA13_PSA12_FN2, 0, 0,
1747 PSA11_PSA10_FN1, PSA11_PSA10_FN2, 0, 0,
1748 0, 0, 0, 0,
1749 0, 0, 0, 0,
1750 PSA5_PSA4_FN1, PSA5_PSA4_FN2, PSA5_PSA4_FN3, 0,
1751 PSA3_PSA2_FN1, PSA3_PSA2_FN2, 0, 0,
1752 0, 0, 0, 0 }
1753 },
1754 { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 2) {
1755 PSB15_PSB14_FN1, PSB15_PSB14_FN2, 0, 0,
1756 PSB13_PSB12_LCDC_RGB, PSB13_PSB12_LCDC_SYS, 0, 0,
1757 0, 0, 0, 0,
1758 PSB9_PSB8_FN1, PSB9_PSB8_FN2, PSB9_PSB8_FN3, 0,
1759 PSB7_PSB6_FN1, PSB7_PSB6_FN2, 0, 0,
1760 PSB5_PSB4_FN1, PSB5_PSB4_FN2, 0, 0,
1761 PSB3_PSB2_FN1, PSB3_PSB2_FN2, 0, 0,
1762 0, 0, 0, 0 }
1763 },
1764 { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 2) {
1765 PSC15_PSC14_FN1, PSC15_PSC14_FN2, 0, 0,
1766 PSC13_PSC12_FN1, PSC13_PSC12_FN2, 0, 0,
1767 PSC11_PSC10_FN1, PSC11_PSC10_FN2, PSC11_PSC10_FN3, 0,
1768 PSC9_PSC8_FN1, PSC9_PSC8_FN2, 0, 0,
1769 PSC7_PSC6_FN1, PSC7_PSC6_FN2, PSC7_PSC6_FN3, 0,
1770 0, 0, 0, 0,
1771 0, 0, 0, 0,
1772 0, 0, 0, 0 }
1773 },
1774 { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 2) {
1775 PSD15_PSD14_FN1, PSD15_PSD14_FN2, 0, 0,
1776 PSD13_PSD12_FN1, PSD13_PSD12_FN2, 0, 0,
1777 PSD11_PSD10_FN1, PSD11_PSD10_FN2, PSD11_PSD10_FN3, 0,
1778 PSD9_PSD8_FN1, PSD9_PSD8_FN2, 0, 0,
1779 PSD7_PSD6_FN1, PSD7_PSD6_FN2, 0, 0,
1780 PSD5_PSD4_FN1, PSD5_PSD4_FN2, 0, 0,
1781 PSD3_PSD2_FN1, PSD3_PSD2_FN2, 0, 0,
1782 PSD1_PSD0_FN1, PSD1_PSD0_FN2, 0, 0 }
1783 },
1784 {}
1785};
1786
1787static struct pinmux_data_reg pinmux_data_regs[] = {
1788 { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
1789 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1790 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1791 },
1792 { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
1793 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1794 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1795 },
1796 { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
1797 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
1798 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
1799 },
1800 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1801 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1802 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1803 },
1804 { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
1805 0, 0, PTE5_DATA, PTE4_DATA,
1806 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
1807 },
1808 { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
1809 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1810 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1811 },
1812 { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
1813 0, 0, PTG5_DATA, PTG4_DATA,
1814 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1815 },
1816 { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
1817 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1818 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1819 },
1820 { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
1821 PTJ7_DATA, 0, PTJ5_DATA, 0,
1822 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1823 },
1824 { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
1825 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1826 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1827 },
1828 { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
1829 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1830 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1831 },
1832 { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
1833 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1834 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1835 },
1836 { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
1837 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1838 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1839 },
1840 { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
1841 0, 0, 0, 0,
1842 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
1843 },
1844 { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
1845 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
1846 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1847 },
1848 { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
1849 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
1850 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1851 },
1852 { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
1853 0, 0, PTT5_DATA, PTT4_DATA,
1854 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1855 },
1856 { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
1857 0, 0, PTU5_DATA, PTU4_DATA,
1858 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1859 },
1860 { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
1861 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
1862 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1863 },
1864 { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
1865 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1866 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
1867 },
1868 { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
1869 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1870 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
1871 },
1872 { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
1873 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1874 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
1875 },
1876 { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
1877 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
1878 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
1879 },
1880 { },
1881};
1882
1883static struct pinmux_info sh7723_pinmux_info = {
1884 .name = "sh7723_pfc",
1885 .reserved_id = PINMUX_RESERVED,
1886 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1887 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1888 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1889 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1890 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1891 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1892
1893 .first_gpio = GPIO_PTA7,
1894 .last_gpio = GPIO_FN_IDEA0,
1895
1896 .gpios = pinmux_gpios,
1897 .cfg_regs = pinmux_config_regs,
1898 .data_regs = pinmux_data_regs,
1899
1900 .gpio_data = pinmux_data,
1901 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1902};
1903
1904static int __init plat_pinmux_setup(void)
1905{
1906 return register_pinmux(&sh7723_pinmux_info);
1907}
1908
1909arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
new file mode 100644
index 000000000000..bb8b812c6895
--- /dev/null
+++ b/arch/sh/kernel/gpio.c
@@ -0,0 +1,498 @@
1/*
2 * Pinmuxed GPIO support for SuperH.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/module.h>
15#include <linux/clk.h>
16#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/irq.h>
19#include <linux/bitops.h>
20#include <linux/gpio.h>
21
22static struct pinmux_info *registered_gpio;
23
24static struct pinmux_info *gpio_controller(unsigned gpio)
25{
26 if (!registered_gpio)
27 return NULL;
28
29 if (gpio < registered_gpio->first_gpio)
30 return NULL;
31
32 if (gpio > registered_gpio->last_gpio)
33 return NULL;
34
35 return registered_gpio;
36}
37
38static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
39{
40 if (enum_id < r->begin)
41 return 0;
42
43 if (enum_id > r->end)
44 return 0;
45
46 return 1;
47}
48
49static int read_write_reg(unsigned long reg, unsigned long reg_width,
50 unsigned long field_width, unsigned long in_pos,
51 unsigned long value, int do_write)
52{
53 unsigned long data, mask, pos;
54
55 data = 0;
56 mask = (1 << field_width) - 1;
57 pos = reg_width - ((in_pos + 1) * field_width);
58
59#ifdef DEBUG
60 pr_info("%s, addr = %lx, value = %ld, pos = %ld, "
61 "r_width = %ld, f_width = %ld\n",
62 do_write ? "write" : "read", reg, value, pos,
63 reg_width, field_width);
64#endif
65
66 switch (reg_width) {
67 case 8:
68 data = ctrl_inb(reg);
69 break;
70 case 16:
71 data = ctrl_inw(reg);
72 break;
73 case 32:
74 data = ctrl_inl(reg);
75 break;
76 }
77
78 if (!do_write)
79 return (data >> pos) & mask;
80
81 data &= ~(mask << pos);
82 data |= value << pos;
83
84 switch (reg_width) {
85 case 8:
86 ctrl_outb(data, reg);
87 break;
88 case 16:
89 ctrl_outw(data, reg);
90 break;
91 case 32:
92 ctrl_outl(data, reg);
93 break;
94 }
95 return 0;
96}
97
98static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
99 struct pinmux_data_reg **drp, int *bitp)
100{
101 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
102 struct pinmux_data_reg *data_reg;
103 int k, n;
104
105 if (!enum_in_range(enum_id, &gpioc->data))
106 return -1;
107
108 k = 0;
109 while (1) {
110 data_reg = gpioc->data_regs + k;
111
112 if (!data_reg->reg_width)
113 break;
114
115 for (n = 0; n < data_reg->reg_width; n++) {
116 if (data_reg->enum_ids[n] == enum_id) {
117 *drp = data_reg;
118 *bitp = n;
119 return 0;
120
121 }
122 }
123 k++;
124 }
125
126 return -1;
127}
128
129static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
130 struct pinmux_cfg_reg **crp, int *indexp,
131 unsigned long **cntp)
132{
133 struct pinmux_cfg_reg *config_reg;
134 unsigned long r_width, f_width;
135 int k, n;
136
137 k = 0;
138 while (1) {
139 config_reg = gpioc->cfg_regs + k;
140
141 r_width = config_reg->reg_width;
142 f_width = config_reg->field_width;
143
144 if (!r_width)
145 break;
146 for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
147 if (config_reg->enum_ids[n] == enum_id) {
148 *crp = config_reg;
149 *indexp = n;
150 *cntp = &config_reg->cnt[n / (1 << f_width)];
151 return 0;
152 }
153 }
154 k++;
155 }
156
157 return -1;
158}
159
160static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
161 int pos, pinmux_enum_t *enum_idp)
162{
163 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
164 pinmux_enum_t *data = gpioc->gpio_data;
165 int k;
166
167 if (!enum_in_range(enum_id, &gpioc->data)) {
168 if (!enum_in_range(enum_id, &gpioc->mark)) {
169 pr_err("non data/mark enum_id for gpio %d\n", gpio);
170 return -1;
171 }
172 }
173
174 if (pos) {
175 *enum_idp = data[pos + 1];
176 return pos + 1;
177 }
178
179 for (k = 0; k < gpioc->gpio_data_size; k++) {
180 if (data[k] == enum_id) {
181 *enum_idp = data[k + 1];
182 return k + 1;
183 }
184 }
185
186 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
187 return -1;
188}
189
190static int write_config_reg(struct pinmux_info *gpioc,
191 struct pinmux_cfg_reg *crp,
192 int index)
193{
194 unsigned long ncomb, pos, value;
195
196 ncomb = 1 << crp->field_width;
197 pos = index / ncomb;
198 value = index % ncomb;
199
200 return read_write_reg(crp->reg, crp->reg_width,
201 crp->field_width, pos, value, 1);
202}
203
204static int check_config_reg(struct pinmux_info *gpioc,
205 struct pinmux_cfg_reg *crp,
206 int index)
207{
208 unsigned long ncomb, pos, value;
209
210 ncomb = 1 << crp->field_width;
211 pos = index / ncomb;
212 value = index % ncomb;
213
214 if (read_write_reg(crp->reg, crp->reg_width,
215 crp->field_width, pos, 0, 0) == value)
216 return 0;
217
218 return -1;
219}
220
221enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
222
223int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
224 int pinmux_type, int cfg_mode)
225{
226 struct pinmux_cfg_reg *cr = NULL;
227 pinmux_enum_t enum_id;
228 struct pinmux_range *range;
229 int in_range, pos, index;
230 unsigned long *cntp;
231
232 switch (pinmux_type) {
233
234 case PINMUX_TYPE_FUNCTION:
235 range = NULL;
236 break;
237
238 case PINMUX_TYPE_OUTPUT:
239 range = &gpioc->output;
240 break;
241
242 case PINMUX_TYPE_INPUT:
243 range = &gpioc->input;
244 break;
245
246 case PINMUX_TYPE_INPUT_PULLUP:
247 range = &gpioc->input_pu;
248 break;
249
250 case PINMUX_TYPE_INPUT_PULLDOWN:
251 range = &gpioc->input_pd;
252 break;
253
254 default:
255 goto out_err;
256 }
257
258 pos = 0;
259 enum_id = 0;
260 index = 0;
261 while (1) {
262 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
263 if (pos <= 0)
264 goto out_err;
265
266 if (!enum_id)
267 break;
268
269 in_range = enum_in_range(enum_id, &gpioc->function);
270 if (!in_range && range)
271 in_range = enum_in_range(enum_id, range);
272
273 if (!in_range)
274 continue;
275
276 if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
277 goto out_err;
278
279 switch (cfg_mode) {
280 case GPIO_CFG_DRYRUN:
281 if (!*cntp || !check_config_reg(gpioc, cr, index))
282 continue;
283 break;
284
285 case GPIO_CFG_REQ:
286 if (write_config_reg(gpioc, cr, index) != 0)
287 goto out_err;
288 *cntp = *cntp + 1;
289 break;
290
291 case GPIO_CFG_FREE:
292 *cntp = *cntp - 1;
293 break;
294 }
295 }
296
297 return 0;
298 out_err:
299 return -1;
300}
301
302static DEFINE_SPINLOCK(gpio_lock);
303
304int __gpio_request(unsigned gpio)
305{
306 struct pinmux_info *gpioc = gpio_controller(gpio);
307 struct pinmux_data_reg *dummy;
308 unsigned long flags;
309 int i, ret, pinmux_type;
310
311 ret = -EINVAL;
312
313 if (!gpioc)
314 goto err_out;
315
316 spin_lock_irqsave(&gpio_lock, flags);
317
318 if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
319 goto err_unlock;
320
321 /* setup pin function here if no data is associated with pin */
322
323 if (get_data_reg(gpioc, gpio, &dummy, &i) != 0)
324 pinmux_type = PINMUX_TYPE_FUNCTION;
325 else
326 pinmux_type = PINMUX_TYPE_GPIO;
327
328 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
329 if (pinmux_config_gpio(gpioc, gpio,
330 pinmux_type,
331 GPIO_CFG_DRYRUN) != 0)
332 goto err_unlock;
333
334 if (pinmux_config_gpio(gpioc, gpio,
335 pinmux_type,
336 GPIO_CFG_REQ) != 0)
337 BUG();
338 }
339
340 gpioc->gpios[gpio].flags = pinmux_type;
341
342 ret = 0;
343 err_unlock:
344 spin_unlock_irqrestore(&gpio_lock, flags);
345 err_out:
346 return ret;
347}
348EXPORT_SYMBOL(__gpio_request);
349
350void gpio_free(unsigned gpio)
351{
352 struct pinmux_info *gpioc = gpio_controller(gpio);
353 unsigned long flags;
354 int pinmux_type;
355
356 if (!gpioc)
357 return;
358
359 spin_lock_irqsave(&gpio_lock, flags);
360
361 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
362 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
363 gpioc->gpios[gpio].flags = PINMUX_TYPE_NONE;
364
365 spin_unlock_irqrestore(&gpio_lock, flags);
366}
367EXPORT_SYMBOL(gpio_free);
368
369static int pinmux_direction(struct pinmux_info *gpioc,
370 unsigned gpio, int new_pinmux_type)
371{
372 int ret, pinmux_type;
373
374 ret = -EINVAL;
375 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
376
377 switch (pinmux_type) {
378 case PINMUX_TYPE_GPIO:
379 break;
380 case PINMUX_TYPE_OUTPUT:
381 case PINMUX_TYPE_INPUT:
382 case PINMUX_TYPE_INPUT_PULLUP:
383 case PINMUX_TYPE_INPUT_PULLDOWN:
384 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
385 break;
386 default:
387 goto err_out;
388 }
389
390 if (pinmux_config_gpio(gpioc, gpio,
391 new_pinmux_type,
392 GPIO_CFG_DRYRUN) != 0)
393 goto err_out;
394
395 if (pinmux_config_gpio(gpioc, gpio,
396 new_pinmux_type,
397 GPIO_CFG_REQ) != 0)
398 BUG();
399
400 gpioc->gpios[gpio].flags = new_pinmux_type;
401
402 ret = 0;
403 err_out:
404 return ret;
405}
406
407int gpio_direction_input(unsigned gpio)
408{
409 struct pinmux_info *gpioc = gpio_controller(gpio);
410 unsigned long flags;
411 int ret = -EINVAL;
412
413 if (!gpioc)
414 goto err_out;
415
416 spin_lock_irqsave(&gpio_lock, flags);
417 ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT);
418 spin_unlock_irqrestore(&gpio_lock, flags);
419 err_out:
420 return ret;
421}
422EXPORT_SYMBOL(gpio_direction_input);
423
424static int __gpio_get_set_value(struct pinmux_info *gpioc,
425 unsigned gpio, int value,
426 int do_write)
427{
428 struct pinmux_data_reg *dr = NULL;
429 int bit = 0;
430
431 if (get_data_reg(gpioc, gpio, &dr, &bit) != 0)
432 BUG();
433 else
434 value = read_write_reg(dr->reg, dr->reg_width,
435 1, bit, value, do_write);
436
437 return value;
438}
439
440int gpio_direction_output(unsigned gpio, int value)
441{
442 struct pinmux_info *gpioc = gpio_controller(gpio);
443 unsigned long flags;
444 int ret = -EINVAL;
445
446 if (!gpioc)
447 goto err_out;
448
449 spin_lock_irqsave(&gpio_lock, flags);
450 __gpio_get_set_value(gpioc, gpio, value, 1);
451 ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT);
452 spin_unlock_irqrestore(&gpio_lock, flags);
453 err_out:
454 return ret;
455}
456EXPORT_SYMBOL(gpio_direction_output);
457
458int gpio_get_value(unsigned gpio)
459{
460 struct pinmux_info *gpioc = gpio_controller(gpio);
461 unsigned long flags;
462 int value = 0;
463
464 if (!gpioc)
465 BUG();
466 else {
467 spin_lock_irqsave(&gpio_lock, flags);
468 value = __gpio_get_set_value(gpioc, gpio, 0, 0);
469 spin_unlock_irqrestore(&gpio_lock, flags);
470 }
471
472 return value;
473}
474EXPORT_SYMBOL(gpio_get_value);
475
476void gpio_set_value(unsigned gpio, int value)
477{
478 struct pinmux_info *gpioc = gpio_controller(gpio);
479 unsigned long flags;
480
481 if (!gpioc)
482 BUG();
483 else {
484 spin_lock_irqsave(&gpio_lock, flags);
485 __gpio_get_set_value(gpioc, gpio, value, 1);
486 spin_unlock_irqrestore(&gpio_lock, flags);
487 }
488}
489EXPORT_SYMBOL(gpio_set_value);
490
491int register_pinmux(struct pinmux_info *pip)
492{
493 registered_gpio = pip;
494 pr_info("pinmux: %s handling gpio %d -> %d\n",
495 pip->name, pip->first_gpio, pip->last_gpio);
496
497 return 0;
498}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-14 20:51:23 -0500