diff options
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-34xx.h | 8 |
2 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 2c84717f9528..6b39ad476336 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -1293,7 +1293,7 @@ static struct clk sgx_fck = { | |||
1293 | .ops = &clkops_omap2_dflt_wait, | 1293 | .ops = &clkops_omap2_dflt_wait, |
1294 | .init = &omap2_init_clksel_parent, | 1294 | .init = &omap2_init_clksel_parent, |
1295 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN), | 1295 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN), |
1296 | .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, | 1296 | .enable_bit = OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT, |
1297 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL), | 1297 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL), |
1298 | .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK, | 1298 | .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK, |
1299 | .clksel = sgx_clksel, | 1299 | .clksel = sgx_clksel, |
@@ -1307,7 +1307,7 @@ static struct clk sgx_ick = { | |||
1307 | .parent = &l3_ick, | 1307 | .parent = &l3_ick, |
1308 | .init = &omap2_init_clk_clkdm, | 1308 | .init = &omap2_init_clk_clkdm, |
1309 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), | 1309 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), |
1310 | .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, | 1310 | .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT, |
1311 | .clkdm_name = "sgx_clkdm", | 1311 | .clkdm_name = "sgx_clkdm", |
1312 | .recalc = &followparent_recalc, | 1312 | .recalc = &followparent_recalc, |
1313 | }; | 1313 | }; |
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index a46f93c399da..f3c327bac1cb 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h | |||
@@ -332,8 +332,12 @@ | |||
332 | #define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0) | 332 | #define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0) |
333 | 333 | ||
334 | /* CM_FCLKEN_SGX */ | 334 | /* CM_FCLKEN_SGX */ |
335 | #define OMAP3430ES2_EN_SGX_SHIFT 1 | 335 | #define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT 1 |
336 | #define OMAP3430ES2_EN_SGX_MASK (1 << 1) | 336 | #define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_MASK (1 << 1) |
337 | |||
338 | /* CM_ICLKEN_SGX */ | ||
339 | #define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT 0 | ||
340 | #define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_MASK (1 << 0) | ||
337 | 341 | ||
338 | /* CM_CLKSEL_SGX */ | 342 | /* CM_CLKSEL_SGX */ |
339 | #define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 | 343 | #define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 |