106 files changed, 9507 insertions, 672 deletions

diff --git a/Documentation/powerpc/00-INDEX b/Documentation/powerpc/00-INDEX
index 94a3c577b083..3be84aa38dfe 100644
--- a/Documentation/powerpc/00-INDEX
+++ b/Documentation/powerpc/00-INDEX
@@ -28,3 +28,6 @@ sound.txt
         - info on sound support under Linux/PPC
 zImage_layout.txt
         - info on the kernel images for Linux/PPC
+qe_firmware.txt
+        - describes the layout of firmware binaries for the Freescale QUICC
+          Engine and the code that parses and uploads the microcode therein.
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 6d1d0856063e..da98154328a0 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -52,7 +52,11 @@ Table of Contents
       i) Freescale QUICC Engine module (QE)
       j) CFI or JEDEC memory-mapped NOR flash
       k) Global Utilities Block
-      l) Xilinx IP cores
+      l) Freescale Communications Processor Module
+      m) Chipselect/Local Bus
+      n) 4xx/Axon EMAC ethernet nodes
+      o) Xilinx IP cores
+      p) Freescale Synchronous Serial Interface
 
   VII - Specifying interrupt information for devices
     1) interrupts property
@@ -1257,6 +1261,10 @@ platforms are moved over to use the flattened-device-tree model.
       services interrupts for this device.
     - phy-handle : The phandle for the PHY connected to this ethernet
       controller.
+    - fixed-link : <a b c d e> where a is emulated phy id - choose any,
+      but unique to the all specified fixed-links, b is duplex - 0 half,
+      1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
+      pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
 
   Recommended properties:
 
@@ -1411,7 +1419,6 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example multi port host USB controller device node :
         usb@22000 {
-                device_type = "usb";
                 compatible = "fsl-usb2-mph";
                 reg = <22000 1000>;
                 #address-cells = <1>;
@@ -1425,7 +1432,6 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example dual role USB controller device node :
         usb@23000 {
-                device_type = "usb";
                 compatible = "fsl-usb2-dr";
                 reg = <23000 1000>;
                 #address-cells = <1>;
@@ -1589,7 +1595,6 @@ platforms are moved over to use the flattened-device-tree model.
    iii) USB (Universal Serial Bus Controller)
 
    Required properties:
-   - device_type : should be "usb".
    - compatible : could be "qe_udc" or "fhci-hcd".
    - mode : the could be "host" or "slave".
    - reg : Offset and length of the register set for the device
@@ -1603,7 +1608,6 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example(slave):
         usb@6c0 {
-                device_type = "usb";
                 compatible = "qe_udc";
                 reg = <6c0 40>;
                 interrupts = <8b 0>;
@@ -1616,7 +1620,7 @@ platforms are moved over to use the flattened-device-tree model.
 
    Required properties:
    - device_type : should be "network", "hldc", "uart", "transparent"
-    "bisync" or "atm".
+     "bisync", "atm", or "serial".
    - compatible : could be "ucc_geth" or "fsl_atm" and so on.
    - model : should be "UCC".
    - device-id : the ucc number(1-8), corresponding to UCCx in UM.
@@ -1629,6 +1633,13 @@ platforms are moved over to use the flattened-device-tree model.
    - interrupt-parent : the phandle for the interrupt controller that
      services interrupts for this device.
    - pio-handle : The phandle for the Parallel I/O port configuration.
+   - port-number : for UART drivers, the port number to use, between 0 and 3.
+     This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
+     The port number is added to the minor number of the device.  Unlike the
+     CPM UART driver, the port-number is required for the QE UART driver.
+   - soft-uart : for UART drivers, if specified this means the QE UART device
+     driver should use "Soft-UART" mode, which is needed on some SOCs that have
+     broken UART hardware.  Soft-UART is provided via a microcode upload.
    - rx-clock-name: the UCC receive clock source
      "none": clock source is disabled
      "brg1" through "brg16": clock source is BRG1-BRG16, respectively
@@ -1788,6 +1799,32 @@ platforms are moved over to use the flattened-device-tree model.
                 };
         };
 
+   viii) Uploaded QE firmware
+
+         If a new firwmare has been uploaded to the QE (usually by the
+         boot loader), then a 'firmware' child node should be added to the QE
+         node.  This node provides information on the uploaded firmware that
+         device drivers may need.
+
+         Required properties:
+         - id: The string name of the firmware.  This is taken from the 'id'
+               member of the qe_firmware structure of the uploaded firmware.
+               Device drivers can search this string to determine if the
+               firmware they want is already present.
+         - extended-modes: The Extended Modes bitfield, taken from the
+                           firmware binary.  It is a 64-bit number represented
+                           as an array of two 32-bit numbers.
+         - virtual-traps: The virtual traps, taken from the firmware binary.
+                          It is an array of 8 32-bit numbers.
+
+         Example:
+
+                firmware {
+                        id = "Soft-UART";
+                        extended-modes = <0 0>;
+                        virtual-traps = <0 0 0 0 0 0 0 0>;
+                }
+
    j) CFI or JEDEC memory-mapped NOR flash
 
     Flash chips (Memory Technology Devices) are often used for solid state
@@ -2269,7 +2306,7 @@ platforms are moved over to use the flattened-device-tree model.
                            available.
                            For Axon: 0x0000012a
 
-   l) Xilinx IP cores
+   o) Xilinx IP cores
 
    The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
    in Xilinx Spartan and Virtex FPGAs.  The devices cover the whole range
@@ -2539,6 +2576,46 @@ platforms are moved over to use the flattened-device-tree model.
       Requred properties:
        - current-speed : Baud rate of uartlite
 
+    p) Freescale Synchronous Serial Interface
+
+       The SSI is a serial device that communicates with audio codecs.  It can
+       be programmed in AC97, I2S, left-justified, or right-justified modes.
+
+       Required properties:
+       - compatible       : compatible list, containing "fsl,ssi"
+       - cell-index       : the SSI, <0> = SSI1, <1> = SSI2, and so on
+       - reg              : offset and length of the register set for the device
+       - interrupts       : <a b> where a is the interrupt number and b is a
+                            field that represents an encoding of the sense and
+                            level information for the interrupt.  This should be
+                            encoded based on the information in section 2)
+                            depending on the type of interrupt controller you
+                            have.
+       - interrupt-parent : the phandle for the interrupt controller that
+                            services interrupts for this device.
+       - fsl,mode         : the operating mode for the SSI interface
+                            "i2s-slave" - I2S mode, SSI is clock slave
+                            "i2s-master" - I2S mode, SSI is clock master
+                            "lj-slave" - left-justified mode, SSI is clock slave
+                            "lj-master" - l.j. mode, SSI is clock master
+                            "rj-slave" - right-justified mode, SSI is clock slave
+                            "rj-master" - r.j., SSI is clock master
+                            "ac97-slave" - AC97 mode, SSI is clock slave
+                            "ac97-master" - AC97 mode, SSI is clock master
+
+       Optional properties:
+       - codec-handle     : phandle to a 'codec' node that defines an audio
+                            codec connected to this SSI.  This node is typically
+                            a child of an I2C or other control node.
+
+       Child 'codec' node required properties:
+       - compatible       : compatible list, contains the name of the codec
+
+       Child 'codec' node optional properties:
+       - clock-frequency  : The frequency of the input clock, which typically
+                            comes from an on-board dedicated oscillator.
+
+
    More devices will be defined as this spec matures.
 
 VII - Specifying interrupt information for devices
diff --git a/Documentation/powerpc/qe_firmware.txt b/Documentation/powerpc/qe_firmware.txt
new file mode 100644
index 000000000000..896266432d33
--- /dev/null
+++ b/Documentation/powerpc/qe_firmware.txt
@@ -0,0 +1,295 @@
+           Freescale QUICC Engine Firmware Uploading
+           -----------------------------------------
+
+(c) 2007 Timur Tabi <timur at freescale.com>,
+    Freescale Semiconductor
+
+Table of Contents
+=================
+
+  I - Software License for Firmware
+
+  II - Microcode Availability
+
+  III - Description and Terminology
+
+  IV - Microcode Programming Details
+
+  V - Firmware Structure Layout
+
+  VI - Sample Code for Creating Firmware Files
+
+Revision Information
+====================
+
+November 30, 2007: Rev 1.0 - Initial version
+
+I - Software License for Firmware
+=================================
+
+Each firmware file comes with its own software license.  For information on
+the particular license, please see the license text that is distributed with
+the firmware.
+
+II - Microcode Availability
+===========================
+
+Firmware files are distributed through various channels.  Some are available on
+http://opensource.freescale.com.  For other firmware files, please contact
+your Freescale representative or your operating system vendor.
+
+III - Description and Terminology
+================================
+
+In this document, the term 'microcode' refers to the sequence of 32-bit
+integers that compose the actual QE microcode.
+
+The term 'firmware' refers to a binary blob that contains the microcode as
+well as other data that
+
+        1) describes the microcode's purpose
+        2) describes how and where to upload the microcode
+        3) specifies the values of various registers
+        4) includes additional data for use by specific device drivers
+
+Firmware files are binary files that contain only a firmware.
+
+IV - Microcode Programming Details
+===================================
+
+The QE architecture allows for only one microcode present in I-RAM for each
+RISC processor.  To replace any current microcode, a full QE reset (which
+disables the microcode) must be performed first.
+
+QE microcode is uploaded using the following procedure:
+
+1) The microcode is placed into I-RAM at a specific location, using the
+   IRAM.IADD and IRAM.IDATA registers.
+
+2) The CERCR.CIR bit is set to 0 or 1, depending on whether the firmware
+   needs split I-RAM.  Split I-RAM is only meaningful for SOCs that have
+   QEs with multiple RISC processors, such as the 8360.  Splitting the I-RAM
+   allows each processor to run a different microcode, effectively creating an
+   asymmetric multiprocessing (AMP) system.
+
+3) The TIBCR trap registers are loaded with the addresses of the trap handlers
+   in the microcode.
+
+4) The RSP.ECCR register is programmed with the value provided.
+
+5) If necessary, device drivers that need the virtual traps and extended mode
+   data will use them.
+
+Virtual Microcode Traps
+
+These virtual traps are conditional branches in the microcode.  These are
+"soft" provisional introduced in the ROMcode in order to enable higher
+flexibility and save h/w traps If new features are activated or an issue is
+being fixed in the RAM package utilizing they should be activated.  This data
+structure signals the microcode which of these virtual traps is active.
+
+This structure contains 6 words that the application should copy to some
+specific been defined.  This table describes the structure.
+
+        ---------------------------------------------------------------
+        | Offset in |                  | Destination Offset | Size of |
+        |   array   |     Protocol     |   within PRAM      | Operand |
+        --------------------------------------------------------------|
+        |     0     | Ethernet         |      0xF8          | 4 bytes |
+        |           | interworking     |                    |         |
+        ---------------------------------------------------------------
+        |     4     | ATM              |      0xF8          | 4 bytes |
+        |           | interworking     |                    |         |
+        ---------------------------------------------------------------
+        |     8     | PPP              |      0xF8          | 4 bytes |
+        |           | interworking     |                    |         |
+        ---------------------------------------------------------------
+        |     12    | Ethernet RX      |      0x22          | 1 byte  |
+        |           | Distributor Page |                    |         |
+        ---------------------------------------------------------------
+        |     16    | ATM Globtal      |      0x28          | 1 byte  |
+        |           | Params Table     |                    |         |
+        ---------------------------------------------------------------
+        |     20    | Insert Frame     |      0xF8          | 4 bytes |
+        ---------------------------------------------------------------
+
+
+Extended Modes
+
+This is a double word bit array (64 bits) that defines special functionality
+which has an impact on the softwarew drivers.  Each bit has its own impact
+and has special instructions for the s/w associated with it.  This structure is
+described in this table:
+
+        -----------------------------------------------------------------------
+        | Bit #  |     Name     |   Description                               |
+        -----------------------------------------------------------------------
+        |   0    | General      | Indicates that prior to each host command   |
+        |        | push command | given by the application, the software must |
+        |        |              | assert a special host command (push command)|
+        |        |              | CECDR = 0x00800000.                         |
+        |        |              | CECR = 0x01c1000f.                          |
+        -----------------------------------------------------------------------
+        |   1    | UCC ATM      | Indicates that after issuing ATM RX INIT    |
+        |        | RX INIT      | command, the host must issue another special|
+        |        | push command | command (push command) and immediately      |
+        |        |              | following that re-issue the ATM RX INIT     |
+        |        |              | command. (This makes the sequence of        |
+        |        |              | initializing the ATM receiver a sequence of |
+        |        |              | three host commands)                        |
+        |        |              | CECDR = 0x00800000.                         |
+        |        |              | CECR = 0x01c1000f.                          |
+        -----------------------------------------------------------------------
+        |   2    | Add/remove   | Indicates that following the specific host  |
+        |        | command      | command: "Add/Remove entry in Hash Lookup   |
+        |        | validation   | Table" used in Interworking setup, the user |
+        |        |              | must issue another command.                 |
+        |        |              | CECDR = 0xce000003.                         |
+        |        |              | CECR = 0x01c10f58.                          |
+        -----------------------------------------------------------------------
+        |   3    | General push | Indicates that the s/w has to initialize    |
+        |        | command      | some pointers in the Ethernet thread pages  |
+        |        |              | which are used when Header Compression is   |
+        |        |              | activated.  The full details of these       |
+        |        |              | pointers is located in the software drivers.|
+        -----------------------------------------------------------------------
+        |   4    | General push | Indicates that after issuing Ethernet TX    |
+        |        | command      | INIT command, user must issue this command  |
+        |        |              | for each SNUM of Ethernet TX thread.        |
+        |        |              | CECDR = 0x00800003.                         |
+        |        |              | CECR = 0x7'b{0}, 8'b{Enet TX thread SNUM},  |
+        |        |              |        1'b{1}, 12'b{0}, 4'b{1}              |
+        -----------------------------------------------------------------------
+        | 5 - 31 |     N/A      | Reserved, set to zero.                      |
+        -----------------------------------------------------------------------
+
+V - Firmware Structure Layout
+==============================
+
+QE microcode from Freescale is typically provided as a header file.  This
+header file contains macros that define the microcode binary itself as well as
+some other data used in uploading that microcode.  The format of these files
+do not lend themselves to simple inclusion into other code.  Hence,
+the need for a more portable format.  This section defines that format.
+
+Instead of distributing a header file, the microcode and related data are
+embedded into a binary blob.  This blob is passed to the qe_upload_firmware()
+function, which parses the blob and performs everything necessary to upload
+the microcode.
+
+All integers are big-endian.  See the comments for function
+qe_upload_firmware() for up-to-date implementation information.
+
+This structure supports versioning, where the version of the structure is
+embedded into the structure itself.  To ensure forward and backwards
+compatibility, all versions of the structure must use the same 'qe_header'
+structure at the beginning.
+
+'header' (type: struct qe_header):
+        The 'length' field is the size, in bytes, of the entire structure,
+        including all the microcode embedded in it, as well as the CRC (if
+        present).
+
+        The 'magic' field is an array of three bytes that contains the letters
+        'Q', 'E', and 'F'.  This is an identifier that indicates that this
+        structure is a QE Firmware structure.
+
+        The 'version' field is a single byte that indicates the version of this
+        structure.  If the layout of the structure should ever need to be
+        changed to add support for additional types of microcode, then the
+        version number should also be changed.
+
+The 'id' field is a null-terminated string(suitable for printing) that
+identifies the firmware.
+
+The 'count' field indicates the number of 'microcode' structures.  There
+must be one and only one 'microcode' structure for each RISC processor.
+Therefore, this field also represents the number of RISC processors for this
+SOC.
+
+The 'soc' structure contains the SOC numbers and revisions used to match
+the microcode to the SOC itself.  Normally, the microcode loader should
+check the data in this structure with the SOC number and revisions, and
+only upload the microcode if there's a match.  However, this check is not
+made on all platforms.
+
+Although it is not recommended, you can specify '0' in the soc.model
+field to skip matching SOCs altogether.
+
+The 'model' field is a 16-bit number that matches the actual SOC. The
+'major' and 'minor' fields are the major and minor revision numbrs,
+respectively, of the SOC.
+
+For example, to match the 8323, revision 1.0:
+     soc.model = 8323
+     soc.major = 1
+     soc.minor = 0
+
+'padding' is neccessary for structure alignment.  This field ensures that the
+'extended_modes' field is aligned on a 64-bit boundary.
+
+'extended_modes' is a bitfield that defines special functionality which has an
+impact on the device drivers.  Each bit has its own impact and has special
+instructions for the driver associated with it.  This field is stored in
+the QE library and available to any driver that calles qe_get_firmware_info().
+
+'vtraps' is an array of 8 words that contain virtual trap values for each
+virtual traps.  As with 'extended_modes', this field is stored in the QE
+library and available to any driver that calles qe_get_firmware_info().
+
+'microcode' (type: struct qe_microcode):
+        For each RISC processor there is one 'microcode' structure.  The first
+        'microcode' structure is for the first RISC, and so on.
+
+        The 'id' field is a null-terminated string suitable for printing that
+        identifies this particular microcode.
+
+        'traps' is an array of 16 words that contain hardware trap values
+        for each of the 16 traps.  If trap[i] is 0, then this particular
+        trap is to be ignored (i.e. not written to TIBCR[i]).  The entire value
+        is written as-is to the TIBCR[i] register, so be sure to set the EN
+        and T_IBP bits if necessary.
+
+        'eccr' is the value to program into the ECCR register.
+
+        'iram_offset' is the offset into IRAM to start writing the
+        microcode.
+
+        'count' is the number of 32-bit words in the microcode.
+
+        'code_offset' is the offset, in bytes, from the beginning of this
+        structure where the microcode itself can be found.  The first
+        microcode binary should be located immediately after the 'microcode'
+        array.
+
+        'major', 'minor', and 'revision' are the major, minor, and revision
+        version numbers, respectively, of the microcode.  If all values are 0,
+        then these fields are ignored.
+
+        'reserved' is necessary for structure alignment.  Since 'microcode'
+        is an array, the 64-bit 'extended_modes' field needs to be aligned
+        on a 64-bit boundary, and this can only happen if the size of
+        'microcode' is a multiple of 8 bytes.  To ensure that, we add
+        'reserved'.
+
+After the last microcode is a 32-bit CRC.  It can be calculated using
+this algorithm:
+
+u32 crc32(const u8 *p, unsigned int len)
+{
+        unsigned int i;
+        u32 crc = 0;
+
+        while (len--) {
+           crc ^= *p++;
+           for (i = 0; i < 8; i++)
+                   crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
+        }
+        return crc;
+}
+
+VI - Sample Code for Creating Firmware Files
+============================================
+
+A Python program that creates firmware binaries from the header files normally
+distributed by Freescale can be found on http://opensource.freescale.com.
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 53d0955abf11..9ae800d81f89 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -140,6 +140,9 @@ config DEFAULT_UIMAGE
           Used to allow a board to specify it wants a uImage built by default
         default n
 
+config REDBOOT
+        bool
+
 config PPC64_SWSUSP
         bool
         depends on PPC64 && (BROKEN || (PPC_PMAC64 && EXPERIMENTAL))
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index b160322a87ad..5ef2bdf8d189 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -31,6 +31,7 @@ zImage.*lds
 zImage.miboot
 zImage.pmac
 zImage.pseries
+zImage.redboot*
 zImage.sandpoint
 zImage.vmode
 zconf.h
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index d1e625c073bb..1e20aca48f45 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -57,12 +57,12 @@ src-wlib := string.S crt0.S stdio.c main.c \
                 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
                 cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
                 fsl-soc.c mpc8xx.c pq2.c
-src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
+src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
                 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
                 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
                 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
                 fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
-                cuboot-katmai.c cuboot-rainier.c
+                cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -195,7 +195,9 @@ image-$(CONFIG_PPC_8xx)			+= cuImage.8xx
 image-$(CONFIG_PPC_EP88XC)              += zImage.ep88xc
 image-$(CONFIG_EP405)                   += zImage.ep405
 image-$(CONFIG_8260)                    += cuImage.pq2
+image-$(CONFIG_EP8248E)                 += zImage.ep8248e
 image-$(CONFIG_PPC_MPC52xx)             += cuImage.52xx
+image-$(CONFIG_STORCENTER)              += cuImage.824x
 image-$(CONFIG_PPC_83xx)                += cuImage.83xx
 image-$(CONFIG_PPC_85xx)                += cuImage.85xx
 image-$(CONFIG_MPC7448HPC2)             += cuImage.hpc2
@@ -208,6 +210,10 @@ image-$(CONFIG_TAISHAN)			+= cuImage.taishan
 image-$(CONFIG_KATMAI)                  += cuImage.katmai
 endif
 
+ifneq ($(CONFIG_REDBOOT),"")
+image-$(CONFIG_PPC_8xx)                 += zImage.redboot-8xx
+endif
+
 # For 32-bit powermacs, build the COFF and miboot images
 # as well as the ELF images.
 ifeq ($(CONFIG_PPC32),y)
diff --git a/arch/powerpc/boot/cuboot-824x.c b/arch/powerpc/boot/cuboot-824x.c
new file mode 100644
index 000000000000..ced90c53de48
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-824x.c
@@ -0,0 +1,53 @@
+/*
+ * Old U-boot compatibility for 824x
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#define TARGET_824x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+
+static void platform_fixups(void)
+{
+        void *soc;
+
+        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+        dt_fixup_mac_addresses(bd.bi_enetaddr);
+        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+        soc = find_node_by_devtype(NULL, "soc");
+        if (soc) {
+                void *serial = NULL;
+
+                setprop(soc, "bus-frequency", &bd.bi_busfreq,
+                        sizeof(bd.bi_busfreq));
+
+                while ((serial = find_node_by_devtype(serial, "serial"))) {
+                        if (get_parent(serial) != soc)
+                                continue;
+
+                        setprop(serial, "clock-frequency", &bd.bi_busfreq,
+                                sizeof(bd.bi_busfreq));
+                }
+        }
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        fdt_init(_dtb_start);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/boot/cuboot-83xx.c b/arch/powerpc/boot/cuboot-83xx.c
index acd860ed7393..61af1c1e8255 100644
--- a/arch/powerpc/boot/cuboot-83xx.c
+++ b/arch/powerpc/boot/cuboot-83xx.c
@@ -24,7 +24,8 @@ static void platform_fixups(void)
         void *soc;
 
         dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
-        dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+        dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+        dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
         dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
 
         /* Unfortunately, the specific model number is encoded in the
diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c
index 943779ed19be..6776a1a29f13 100644
--- a/arch/powerpc/boot/cuboot-85xx.c
+++ b/arch/powerpc/boot/cuboot-85xx.c
@@ -24,8 +24,9 @@ static void platform_fixups(void)
         void *soc;
 
         dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
-        dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr,
-                               bd.bi_enet2addr);
+        dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+        dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
+        dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
         dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
 
         /* Unfortunately, the specific model number is encoded in the
diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index e5dfe4497313..60f561e307a9 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -88,6 +88,20 @@ void dt_fixup_clock(const char *path, u32 freq)
         }
 }
 
+void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr)
+{
+        void *devp = find_node_by_alias(alias);
+
+        if (devp) {
+                printf("%s: local-mac-address <-"
+                       " %02x:%02x:%02x:%02x:%02x:%02x\n\r", alias,
+                       addr[0], addr[1], addr[2],
+                       addr[3], addr[4], addr[5]);
+
+                setprop(devp, "local-mac-address", addr, 6);
+        }
+}
+
 void dt_fixup_mac_address(u32 index, const u8 *addr)
 {
         void *devp = find_node_by_prop_value(NULL, "linux,network-index",
diff --git a/arch/powerpc/boot/dts/adder875-redboot.dts b/arch/powerpc/boot/dts/adder875-redboot.dts
new file mode 100644
index 000000000000..930bfb3894eb
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875-redboot.dts
@@ -0,0 +1,184 @@
+/*
+ * Device Tree Source for MPC885 ADS running RedBoot
+ *
+ * Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+        model = "Analogue & Micro Adder MPC875";
+        compatible = "analogue-and-micro,adder875";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                console = &console;
+                ethernet0 = &eth0;
+                ethernet1 = &eth1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,875@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <16>;
+                        i-cache-line-size = <16>;
+                        d-cache-size = <8192>;
+                        i-cache-size = <8192>;
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        interrupts = <15 2>;    // decrementer interrupt
+                        interrupt-parent = <&PIC>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x01000000>;
+        };
+
+        localbus@fa200100 {
+                compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xfa200100 0x40>;
+
+                ranges = <
+                        0 0 0xfe000000 0x00800000
+                        2 0 0xfa100000 0x00008000
+                >;
+
+                flash@0,0 {
+                        compatible = "cfi-flash";
+                        reg = <0 0 0x800000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                };
+        };
+
+        soc@fa200000 {
+                compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges = <0 0xfa200000 0x00004000>;
+
+                // Temporary until code stops depending on it.
+                device_type = "soc";
+
+                // Temporary until get_immrbase() is fixed.
+                reg = <0xfa200000 0x4000>;
+
+                mdio@e00 {
+                        compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
+                        reg = <0xe00 0x188>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        PHY0: ethernet-phy@0 {
+                                reg = <0>;
+                                device_type = "ethernet-phy";
+                        };
+
+                        PHY1: ethernet-phy@1 {
+                                reg = <1>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                eth0: ethernet@e00 {
+                        device_type = "network";
+                        compatible = "fsl,mpc875-fec-enet",
+                                     "fsl,pq1-fec-enet";
+                        reg = <0xe00 0x188>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <3 1>;
+                        interrupt-parent = <&PIC>;
+                        phy-handle = <&PHY0>;
+                        linux,network-index = <0>;
+                };
+
+                eth1: ethernet@1e00 {
+                        device_type = "network";
+                        compatible = "fsl,mpc875-fec-enet",
+                                     "fsl,pq1-fec-enet";
+                        reg = <0x1e00 0x188>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <7 1>;
+                        interrupt-parent = <&PIC>;
+                        phy-handle = <&PHY1>;
+                        linux,network-index = <1>;
+                };
+
+                PIC: interrupt-controller@0 {
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        reg = <0 0x24>;
+                        compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
+                };
+
+                cpm@9c0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
+                        interrupts = <0>;       // cpm error interrupt
+                        interrupt-parent = <&CPM_PIC>;
+                        reg = <0x9c0 0x40>;
+                        ranges;
+
+                        muram {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                ranges = <0 0x2000 0x2000>;
+
+                                data@0 {
+                                        compatible = "fsl,cpm-muram-data";
+                                        reg = <0 0x1c00>;
+                                };
+                        };
+
+                        brg@9f0 {
+                                compatible = "fsl,mpc875-brg",
+                                             "fsl,cpm1-brg",
+                                             "fsl,cpm-brg";
+                                reg = <0x9f0 0x10>;
+                        };
+
+                        CPM_PIC: interrupt-controller@930 {
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupts = <5 2 0 2>;
+                                interrupt-parent = <&PIC>;
+                                reg = <0x930 0x20>;
+                                compatible = "fsl,mpc875-cpm-pic",
+                                             "fsl,cpm1-pic";
+                        };
+
+                        console: serial@a80 {
+                                device_type = "serial";
+                                compatible = "fsl,mpc875-smc-uart",
+                                             "fsl,cpm1-smc-uart";
+                                reg = <0xa80 0x10 0x3e80 0x40>;
+                                interrupts = <4>;
+                                interrupt-parent = <&CPM_PIC>;
+                                fsl,cpm-brg = <1>;
+                                fsl,cpm-command = <0x0090>;
+                                current-speed = <115200>;
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = &console;
+        };
+};
diff --git a/arch/powerpc/boot/dts/adder875-uboot.dts b/arch/powerpc/boot/dts/adder875-uboot.dts
new file mode 100644
index 000000000000..0197242dacfb
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875-uboot.dts
@@ -0,0 +1,183 @@
+/*
+ * Device Tree Source for MPC885 ADS running U-Boot
+ *
+ * Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+        model = "Analogue & Micro Adder MPC875";
+        compatible = "analogue-and-micro,adder875";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                console = &console;
+                ethernet0 = &eth0;
+                ethernet1 = &eth1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,875@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <16>;
+                        i-cache-line-size = <16>;
+                        d-cache-size = <8192>;
+                        i-cache-size = <8192>;
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        interrupts = <15 2>;    // decrementer interrupt
+                        interrupt-parent = <&PIC>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x01000000>;
+        };
+
+        localbus@ff000100 {
+                compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xff000100 0x40>;
+
+                ranges = <
+                        0 0 0xfe000000 0x01000000
+                >;
+
+                flash@0,0 {
+                        compatible = "cfi-flash";
+                        reg = <0 0 0x800000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                };
+        };
+
+        soc@ff000000 {
+                compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges = <0 0xff000000 0x00004000>;
+
+                // Temporary until code stops depending on it.
+                device_type = "soc";
+
+                // Temporary until get_immrbase() is fixed.
+                reg = <0xff000000 0x4000>;
+
+                mdio@e00 {
+                        compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
+                        reg = <0xe00 0x188>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        PHY0: ethernet-phy@0 {
+                                reg = <0>;
+                                device_type = "ethernet-phy";
+                        };
+
+                        PHY1: ethernet-phy@1 {
+                                reg = <1>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                eth0: ethernet@e00 {
+                        device_type = "network";
+                        compatible = "fsl,mpc875-fec-enet",
+                                     "fsl,pq1-fec-enet";
+                        reg = <0xe00 0x188>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <3 1>;
+                        interrupt-parent = <&PIC>;
+                        phy-handle = <&PHY0>;
+                        linux,network-index = <0>;
+                };
+
+                eth1: ethernet@1e00 {
+                        device_type = "network";
+                        compatible = "fsl,mpc875-fec-enet",
+                                     "fsl,pq1-fec-enet";
+                        reg = <0x1e00 0x188>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <7 1>;
+                        interrupt-parent = <&PIC>;
+                        phy-handle = <&PHY1>;
+                        linux,network-index = <1>;
+                };
+
+                PIC: interrupt-controller@0 {
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                        reg = <0 0x24>;
+                        compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
+                };
+
+                cpm@9c0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
+                        interrupts = <0>;       // cpm error interrupt
+                        interrupt-parent = <&CPM_PIC>;
+                        reg = <0x9c0 0x40>;
+                        ranges;
+
+                        muram {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                ranges = <0 0x2000 0x2000>;
+
+                                data@0 {
+                                        compatible = "fsl,cpm-muram-data";
+                                        reg = <0 0x1c00>;
+                                };
+                        };
+
+                        brg@9f0 {
+                                compatible = "fsl,mpc875-brg",
+                                             "fsl,cpm1-brg",
+                                             "fsl,cpm-brg";
+                                reg = <0x9f0 0x10>;
+                        };
+
+                        CPM_PIC: interrupt-controller@930 {
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupts = <5 2 0 2>;
+                                interrupt-parent = <&PIC>;
+                                reg = <0x930 0x20>;
+                                compatible = "fsl,mpc875-cpm-pic",
+                                             "fsl,cpm1-pic";
+                        };
+
+                        console: serial@a80 {
+                                device_type = "serial";
+                                compatible = "fsl,mpc875-smc-uart",
+                                             "fsl,cpm1-smc-uart";
+                                reg = <0xa80 0x10 0x3e80 0x40>;
+                                interrupts = <4>;
+                                interrupt-parent = <&CPM_PIC>;
+                                fsl,cpm-brg = <1>;
+                                fsl,cpm-command = <0x0090>;
+                                current-speed = <115200>;
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = &console;
+        };
+};
diff --git a/arch/powerpc/boot/dts/ep8248e.dts b/arch/powerpc/boot/dts/ep8248e.dts
new file mode 100644
index 000000000000..5d2fb76a72c1
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep8248e.dts
@@ -0,0 +1,207 @@
+/*
+ * Device Tree for the Embedded Planet EP8248E board running PlanetCore.
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+        model = "EP8248E";
+        compatible = "fsl,ep8248e";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                planetcore-SMC1 = &smc1;
+                planetcore-SCC1 = &scc1;
+                ethernet0 = &eth0;
+                ethernet1 = &eth1;
+                serial0 = &smc1;
+                serial1 = &scc1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8248@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <16384>;
+                        i-cache-size = <16384>;
+                        timebase-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        localbus@f0010100 {
+                compatible = "fsl,mpc8248-localbus",
+                             "fsl,pq2-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xf0010100 0x40>;
+
+                ranges = <0 0 0xfc000000 0x04000000
+                          1 0 0xfa000000 0x00008000>;
+
+                flash@0,3800000 {
+                        compatible = "cfi-flash";
+                        reg = <0 0x3800000 0x800000>;
+                        bank-width = <4>;
+                        device-width = <2>;
+                };
+
+                bcsr@1,0 {
+                        #address-cells = <2>;
+                        #size-cells = <1>;
+                        reg = <1 0 0x10>;
+                        compatible = "fsl,ep8248e-bcsr";
+                        ranges;
+
+                        mdio {
+                                device_type = "mdio";
+                                compatible = "fsl,ep8248e-mdio-bitbang";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <1 8 1>;
+
+                                PHY0: ethernet-phy@0 {
+                                        interrupt-parent = <&PIC>;
+                                        reg = <0>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                PHY1: ethernet-phy@1 {
+                                        interrupt-parent = <&PIC>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                        };
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0>;
+        };
+
+        soc@f0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus";
+                ranges = <0x00000000 0xf0000000 0x00053000>;
+
+                // Temporary until code stops depending on it.
+                device_type = "soc";
+
+                // Temporary -- will go away once kernel uses ranges for get_immrbase().
+                reg = <0xf0000000 0x00053000>;
+
+                cpm@119c0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        #interrupt-cells = <2>;
+                        compatible = "fsl,mpc8248-cpm", "fsl,cpm2",
+                                     "simple-bus";
+                        reg = <0x119c0 0x30>;
+                        ranges;
+
+                        muram {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                ranges = <0 0 0x10000>;
+
+                                data@0 {
+                                        compatible = "fsl,cpm-muram-data";
+                                        reg = <0 0x1100 0x1140
+                                               0xec0 0x9800 0x800>;
+                                };
+                        };
+
+                        brg@119f0 {
+                                compatible = "fsl,mpc8248-brg",
+                                             "fsl,cpm2-brg",
+                                             "fsl,cpm-brg";
+                                reg = <0x119f0 0x10 0x115f0 0x10>;
+                        };
+
+                        /* Monitor port/SMC1 */
+                        smc1: serial@11a80 {
+                                device_type = "serial";
+                                compatible = "fsl,mpc8248-smc-uart",
+                                             "fsl,cpm2-smc-uart";
+                                reg = <0x11a80 0x20 0x1100 0x40>;
+                                interrupts = <4 8>;
+                                interrupt-parent = <&PIC>;
+                                fsl,cpm-brg = <7>;
+                                fsl,cpm-command = <0x1d000000>;
+                                linux,planetcore-label = "SMC1";
+                        };
+
+                        /* "Serial" port/SCC1 */
+                        scc1: serial@11a00 {
+                                device_type = "serial";
+                                compatible = "fsl,mpc8248-scc-uart",
+                                             "fsl,cpm2-scc-uart";
+                                reg = <0x11a00 0x20 0x8000 0x100>;
+                                interrupts = <40 8>;
+                                interrupt-parent = <&PIC>;
+                                fsl,cpm-brg = <1>;
+                                fsl,cpm-command = <0x00800000>;
+                                linux,planetcore-label = "SCC1";
+                        };
+
+                        eth0: ethernet@11300 {
+                                device_type = "network";
+                                compatible = "fsl,mpc8248-fcc-enet",
+                                             "fsl,cpm2-fcc-enet";
+                                reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                interrupts = <32 8>;
+                                interrupt-parent = <&PIC>;
+                                phy-handle = <&PHY0>;
+                                linux,network-index = <0>;
+                                fsl,cpm-command = <0x12000300>;
+                        };
+
+                        eth1: ethernet@11320 {
+                                device_type = "network";
+                                compatible = "fsl,mpc8248-fcc-enet",
+                                             "fsl,cpm2-fcc-enet";
+                                reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>;
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                                interrupts = <33 8>;
+                                interrupt-parent = <&PIC>;
+                                phy-handle = <&PHY1>;
+                                linux,network-index = <1>;
+                                fsl,cpm-command = <0x16200300>;
+                        };
+
+                        usb@11b60 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,mpc8248-usb",
+                                             "fsl,cpm2-usb";
+                                reg = <0x11b60 0x18 0x8b00 0x100>;
+                                interrupt-parent = <&PIC>;
+                                interrupts = <11 8>;
+                                fsl,cpm-command = <0x2e600000>;
+                        };
+                };
+
+                PIC: interrupt-controller@10c00 {
+                        #interrupt-cells = <2>;
+                        interrupt-controller;
+                        reg = <0x10c00 0x80>;
+                        compatible = "fsl,mpc8248-pic", "fsl,pq2-pic";
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index c5b6665a8209..9bcf2c92541f 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -45,10 +45,58 @@
                 reg = <00000000 08000000>;      // 128MB at 0
         };
 
+        localbus@e0005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
+                reg = <e0005000 1000>;
+                interrupts = <d#77 8>;
+                interrupt-parent = <&ipic>;
+
+                // CS0 and CS1 are swapped when
+                // booting from nand, but the
+                // addresses are the same.
+                ranges = <0 0 fe000000 00800000
+                          1 0 e2800000 00008000
+                          2 0 f0000000 00020000
+                          3 0 fa000000 00008000>;
+
+                flash@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0 0 800000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+                };
+
+                nand@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8313-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <1 0 2000>;
+
+                        u-boot@0 {
+                                reg = <0 100000>;
+                                read-only;
+                        };
+
+                        kernel@100000 {
+                                reg = <100000 300000>;
+                        };
+
+                        fs@400000 {
+                                reg = <400000 1c00000>;
+                        };
+                };
+        };
+
         soc8313@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "soc";
+                compatible = "simple-bus";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 00000200>;
                 bus-frequency = <0>;
@@ -92,7 +140,6 @@
 
                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                 usb@23000 {
-                        device_type = "usb";
                         compatible = "fsl-usb2-dr";
                         reg = <23000 1000>;
                         #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 26ac467b10ea..690252456d3d 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -7,6 +7,18 @@
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
+
+ * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do
+ * this:
+ *
+ * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board.
+ * 2) Solder a wire from U61-21 to P19A-23.  P19 is a grid of pins on the board
+ *    next to the serial ports.
+ * 3) Solder a wire from U61-22 to P19K-22.
+ *
+ * Note that there's a typo in the schematic.  The board labels the last column
+ * of pins "P19K", but in the schematic, that column is called "P19J".  So if
+ * you're going by the schematic, the pin is called "P19J-K22".
  */
 
 / {
@@ -169,6 +181,23 @@
                                         1 1e  1  0  1  0        /* TX_EN */
                                         1 1f  2  0  1  0>;/* CRS */
                         };
+                        pio5: ucc_pin@05 {
+                                pio-map = <
+                                /*
+                                 *                    open       has
+                                 *   port  pin  dir  drain  sel  irq
+                                 */
+                                        2    0    1      0    2    0  /* TxD5 */
+                                        2    8    2      0    2    0  /* RxD5 */
+
+                                        2   1d    2      0    0    0  /* CTS5 */
+                                        2   1f    1      0    2    0  /* RTS5 */
+
+                                        2   18    2      0    0    0  /* CD */
+
+                                >;
+                        };
+
                 };
         };
 
@@ -176,6 +205,7 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "qe";
+                compatible = "fsl,qe";
                 model = "QE";
                 ranges = <0 e0100000 00100000>;
                 reg = <e0100000 480>;
@@ -210,7 +240,6 @@
                 };
 
                 usb@6c0 {
-                        device_type = "usb";
                         compatible = "qe_udc";
                         reg = <6c0 40 8B00 100>;
                         interrupts = <b>;
@@ -250,6 +279,26 @@
                         pio-handle = < &pio4 >;
                 };
 
+                ucc@2400 {
+                        device_type = "serial";
+                        compatible = "ucc_uart";
+                        model = "UCC";
+                        device-id = <5>;        /* The UCC number, 1-7*/
+                        port-number = <0>;      /* Which ttyQEx device */
+                        soft-uart;              /* We need Soft-UART */
+                        reg = <2400 200>;
+                        interrupts = <28>;      /* From Table 18-12 */
+                        interrupt-parent = < &qeic >;
+                        /*
+                         * For Soft-UART, we need to set TX to 1X, which
+                         * means specifying separate clock sources.
+                         */
+                        rx-clock-name = "brg5";
+                        tx-clock-name = "brg6";
+                        pio-handle = < &pio5 >;
+                };
+
+
                 mdio@2320 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index e354f2634246..04b8da4deb60 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -91,7 +91,6 @@
                 };
 
                 usb@22000 {
-                        device_type = "usb";
                         compatible = "fsl-usb2-mph";
                         reg = <22000 1000>;
                         #address-cells = <1>;
@@ -103,7 +102,6 @@
                 };
 
                 usb@23000 {
-                        device_type = "usb";
                         compatible = "fsl-usb2-dr";
                         reg = <23000 1000>;
                         #address-cells = <1>;
@@ -127,14 +125,6 @@
                                 reg = <1c>;
                                 device_type = "ethernet-phy";
                         };
-
-                        /* Vitesse 7385 */
-                        phy1f: ethernet-phy@1f {
-                                interrupt-parent = < &ipic >;
-                                interrupts = <12 8>;
-                                reg = <1f>;
-                                device_type = "ethernet-phy";
-                        };
                 };
 
                 enet0: ethernet@24000 {
@@ -159,7 +149,8 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <23 8 24 8 25 8>;
                         interrupt-parent = < &ipic >;
-                        phy-handle = < &phy1f >;
+                        /* Vitesse 7385 isn't on the MDIO bus */
+                        fixed-link = <1 1 d#1000 0 0>;
                         linux,network-index = <1>;
                 };
 
@@ -253,6 +244,21 @@
                 device_type = "pci";
         };
 
+        localbus@e0005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8349e-localbus",
+                             "fsl,pq2pro-localbus";
+                reg = <e0005000 d8>;
+                ranges = <3 0 f0000000 210>;
 
-
+                pata@3,0 {
+                        compatible = "fsl,mpc8349emitx-pata", "ata-generic";
+                        reg = <3 0 10 3 20c 4>;
+                        reg-shift = <1>;
+                        pio-mode = <6>;
+                        interrupts = <17 8>;
+                        interrupt-parent = <&ipic>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index ebdf0b750086..a06ff92cf0b1 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -89,7 +89,6 @@
                 };
 
                 usb@23000 {
-                        device_type = "usb";
                         compatible = "fsl-usb2-dr";
                         reg = <23000 1000>;
                         #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 0ba13ebcea68..4120e92fcecf 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -104,7 +104,6 @@
                 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
                 /* port = 0 or 1 */
                 usb@22000 {
-                        device_type = "usb";
                         compatible = "fsl-usb2-mph";
                         reg = <22000 1000>;
                         #address-cells = <1>;
@@ -116,7 +115,6 @@
                 };
                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                 usb@23000 {
-                        device_type = "usb";
                         compatible = "fsl-usb2-dr";
                         reg = <23000 1000>;
                         #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index fd841b2fddd0..2181d2cdbff2 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -241,7 +241,6 @@
                 };
 
                 usb@6c0 {
-                        device_type = "usb";
                         compatible = "qe_udc";
                         reg = <6c0 40 8B00 100>;
                         interrupts = <b>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
new file mode 100644
index 000000000000..98b46065f45a
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -0,0 +1,279 @@
+/*
+ * MPC8377E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "fsl,mpc8377emds";
+        compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8377@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <0x20>;
+                        i-cache-line-size = <0x20>;
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>;  // 512MB at 0
+        };
+
+        soc@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xe0000000 0x00100000>;
+                reg = <0xe0000000 0x00000200>;
+                bus-frequency = <0>;
+
+                wdt@200 {
+                        compatible = "mpc83xx_wdt";
+                        reg = <0x200 0x100>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <0xe 0x8>;
+                        interrupt-parent = < &ipic >;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <0xf 0x8>;
+                        interrupt-parent = < &ipic >;
+                        dfsrr;
+                };
+
+                spi@7000 {
+                        compatible = "fsl_spi";
+                        reg = <0x7000 0x1000>;
+                        interrupts = <0x10 0x8>;
+                        interrupt-parent = < &ipic >;
+                        mode = "cpu";
+                };
+
+                /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+                usb@23000 {
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x23000 0x1000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupt-parent = < &ipic >;
+                        interrupts = <0x26 0x8>;
+                        phy_type = "utmi_wide";
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+                        phy2: ethernet-phy@2 {
+                                interrupt-parent = < &ipic >;
+                                interrupts = <0x11 0x8>;
+                                reg = <2>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = < &ipic >;
+                                interrupts = <0x12 0x8>;
+                                reg = <3>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+                        phy-connection-type = "mii";
+                        interrupt-parent = < &ipic >;
+                        phy-handle = < &phy2 >;
+                };
+
+                enet1: ethernet@25000 {
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+                        phy-connection-type = "mii";
+                        interrupt-parent = < &ipic >;
+                        phy-handle = < &phy3 >;
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x9 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0xa 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                crypto@30000 {
+                        model = "SEC3";
+                        compatible = "talitos";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <0xb 0x8>;
+                        interrupt-parent = < &ipic >;
+                        /* Rev. 3.0 geometry */
+                        num-channels = <4>;
+                        channel-fifo-len = <0x18>;
+                        exec-units-mask = <0x000001fe>;
+                        descriptor-types-mask = <0x03ab0ebf>;
+                };
+
+                sdhc@2e000 {
+                        model = "eSDHC";
+                        compatible = "fsl,esdhc";
+                        reg = <0x2e000 0x1000>;
+                        interrupts = <0x2a 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                sata@18000 {
+                        compatible = "fsl,mpc8379-sata";
+                        reg = <0x18000 0x1000>;
+                        interrupts = <0x2c 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                sata@19000 {
+                        compatible = "fsl,mpc8379-sata";
+                        reg = <0x19000 0x1000>;
+                        interrupts = <0x2d 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                /* IPIC
+                 * interrupts cell = <intr #, sense>
+                 * sense values match linux IORESOURCE_IRQ_* defines:
+                 * sense == 8: Level, low assertion
+                 * sense == 2: Edge, high-to-low change
+                 */
+                ipic: pic@700 {
+                        compatible = "fsl,ipic";
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x700 0x100>;
+                };
+        };
+
+        pci0: pci@e0008500 {
+                cell-index = <0>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x11 */
+                                 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+                                 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+                                 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+                                 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+                                /* IDSEL 0x12 */
+                                 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+                                 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+                                 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+                                 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+
+                                /* IDSEL 0x13 */
+                                 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+                                 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+                                 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+                                 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+
+                                /* IDSEL 0x15 */
+                                 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+                                 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+                                 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+                                 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+                                /* IDSEL 0x16 */
+                                 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+                                 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+                                 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+                                 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+
+                                /* IDSEL 0x17 */
+                                 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+                                 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+                                 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+                                 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+
+                                /* IDSEL 0x18 */
+                                 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+                                 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+                                 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+                                 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <0x42 0x8>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+                          0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+                clock-frequency = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xe0008500 0x100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
new file mode 100644
index 000000000000..c117a6a3a8e6
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -0,0 +1,265 @@
+/*
+ * MPC8378E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "fsl,mpc8378emds";
+        compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8378@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <0x20>;
+                        i-cache-line-size = <0x20>;
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>;  // 512MB at 0
+        };
+
+        soc@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xe0000000 0x00100000>;
+                reg = <0xe0000000 0x00000200>;
+                bus-frequency = <0>;
+
+                wdt@200 {
+                        compatible = "mpc83xx_wdt";
+                        reg = <0x200 0x100>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <0xe 0x8>;
+                        interrupt-parent = < &ipic >;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <0xf 0x8>;
+                        interrupt-parent = < &ipic >;
+                        dfsrr;
+                };
+
+                spi@7000 {
+                        compatible = "fsl_spi";
+                        reg = <0x7000 0x1000>;
+                        interrupts = <0x10 0x8>;
+                        interrupt-parent = < &ipic >;
+                        mode = "cpu";
+                };
+
+                /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+                usb@23000 {
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x23000 0x1000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupt-parent = < &ipic >;
+                        interrupts = <0x26 0x8>;
+                        phy_type = "utmi_wide";
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+                        phy2: ethernet-phy@2 {
+                                interrupt-parent = < &ipic >;
+                                interrupts = <0x11 0x8>;
+                                reg = <2>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = < &ipic >;
+                                interrupts = <0x12 0x8>;
+                                reg = <3>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+                        phy-connection-type = "mii";
+                        interrupt-parent = < &ipic >;
+                        phy-handle = < &phy2 >;
+                };
+
+                enet1: ethernet@25000 {
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+                        phy-connection-type = "mii";
+                        interrupt-parent = < &ipic >;
+                        phy-handle = < &phy3 >;
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x9 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0xa 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                crypto@30000 {
+                        model = "SEC3";
+                        compatible = "talitos";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <0xb 0x8>;
+                        interrupt-parent = < &ipic >;
+                        /* Rev. 3.0 geometry */
+                        num-channels = <4>;
+                        channel-fifo-len = <0x18>;
+                        exec-units-mask = <0x000001fe>;
+                        descriptor-types-mask = <0x03ab0ebf>;
+                };
+
+                sdhc@2e000 {
+                        model = "eSDHC";
+                        compatible = "fsl,esdhc";
+                        reg = <0x2e000 0x1000>;
+                        interrupts = <0x2a 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                /* IPIC
+                 * interrupts cell = <intr #, sense>
+                 * sense values match linux IORESOURCE_IRQ_* defines:
+                 * sense == 8: Level, low assertion
+                 * sense == 2: Edge, high-to-low change
+                 */
+                ipic: pic@700 {
+                        compatible = "fsl,ipic";
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x700 0x100>;
+                };
+        };
+
+        pci0: pci@e0008500 {
+                cell-index = <0>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x11 */
+                                 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+                                 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+                                 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+                                 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+                                /* IDSEL 0x12 */
+                                 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+                                 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+                                 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+                                 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+
+                                /* IDSEL 0x13 */
+                                 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+                                 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+                                 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+                                 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+
+                                /* IDSEL 0x15 */
+                                 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+                                 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+                                 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+                                 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+                                /* IDSEL 0x16 */
+                                 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+                                 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+                                 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+                                 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+
+                                /* IDSEL 0x17 */
+                                 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+                                 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+                                 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+                                 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+
+                                /* IDSEL 0x18 */
+                                 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+                                 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+                                 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+                                 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <0x42 0x8>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+                          0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+                clock-frequency = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xe0008500 0x100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
new file mode 100644
index 000000000000..fc3ba79fb684
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -0,0 +1,293 @@
+/*
+ * MPC8379E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "fsl,mpc8379emds";
+        compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8379@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <0x20>;
+                        i-cache-line-size = <0x20>;
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>;  // 512MB at 0
+        };
+
+        soc@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xe0000000 0x00100000>;
+                reg = <0xe0000000 0x00000200>;
+                bus-frequency = <0>;
+
+                wdt@200 {
+                        compatible = "mpc83xx_wdt";
+                        reg = <0x200 0x100>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <0xe 0x8>;
+                        interrupt-parent = < &ipic >;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <0xf 0x8>;
+                        interrupt-parent = < &ipic >;
+                        dfsrr;
+                };
+
+                spi@7000 {
+                        compatible = "fsl_spi";
+                        reg = <0x7000 0x1000>;
+                        interrupts = <0x10 0x8>;
+                        interrupt-parent = < &ipic >;
+                        mode = "cpu";
+                };
+
+                /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+                usb@23000 {
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x23000 0x1000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupt-parent = < &ipic >;
+                        interrupts = <0x26 0x8>;
+                        phy_type = "utmi_wide";
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+                        phy2: ethernet-phy@2 {
+                                interrupt-parent = < &ipic >;
+                                interrupts = <0x11 0x8>;
+                                reg = <2>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = < &ipic >;
+                                interrupts = <0x12 0x8>;
+                                reg = <3>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+                        phy-connection-type = "mii";
+                        interrupt-parent = < &ipic >;
+                        phy-handle = < &phy2 >;
+                };
+
+                enet1: ethernet@25000 {
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+                        phy-connection-type = "mii";
+                        interrupt-parent = < &ipic >;
+                        phy-handle = < &phy3 >;
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x9 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0xa 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                crypto@30000 {
+                        model = "SEC3";
+                        compatible = "talitos";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <0xb 0x8>;
+                        interrupt-parent = < &ipic >;
+                        /* Rev. 3.0 geometry */
+                        num-channels = <4>;
+                        channel-fifo-len = <0x18>;
+                        exec-units-mask = <0x000001fe>;
+                        descriptor-types-mask = <0x03ab0ebf>;
+                };
+
+                sdhc@2e000 {
+                        model = "eSDHC";
+                        compatible = "fsl,esdhc";
+                        reg = <0x2e000 0x1000>;
+                        interrupts = <0x2a 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                sata@18000 {
+                        compatible = "fsl,mpc8379-sata";
+                        reg = <0x18000 0x1000>;
+                        interrupts = <0x2c 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                sata@19000 {
+                        compatible = "fsl,mpc8379-sata";
+                        reg = <0x19000 0x1000>;
+                        interrupts = <0x2d 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                sata@1a000 {
+                        compatible = "fsl,mpc8379-sata";
+                        reg = <0x1a000 0x1000>;
+                        interrupts = <0x2e 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                sata@1b000 {
+                        compatible = "fsl,mpc8379-sata";
+                        reg = <0x1b000 0x1000>;
+                        interrupts = <0x2f 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+
+                /* IPIC
+                 * interrupts cell = <intr #, sense>
+                 * sense values match linux IORESOURCE_IRQ_* defines:
+                 * sense == 8: Level, low assertion
+                 * sense == 2: Edge, high-to-low change
+                 */
+                ipic: pic@700 {
+                        compatible = "fsl,ipic";
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x700 0x100>;
+                };
+        };
+
+        pci0: pci@e0008500 {
+                cell-index = <0>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x11 */
+                                 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+                                 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+                                 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+                                 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+                                /* IDSEL 0x12 */
+                                 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+                                 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+                                 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+                                 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+
+                                /* IDSEL 0x13 */
+                                 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+                                 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+                                 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+                                 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+
+                                /* IDSEL 0x15 */
+                                 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+                                 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+                                 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+                                 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+
+                                /* IDSEL 0x16 */
+                                 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+                                 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+                                 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+                                 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+
+                                /* IDSEL 0x17 */
+                                 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+                                 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+                                 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+                                 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+
+                                /* IDSEL 0x18 */
+                                 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+                                 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+                                 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+                                 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <0x42 0x8>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+                          0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+                clock-frequency = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xe0008500 0x100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 54b3bdf7fc97..688af9d06382 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -304,9 +304,9 @@
                 interrupt-map = <
                         // IDSEL 0x1c  USB
                         e000 0 0 1 &i8259 c 2
-                        e100 0 0 1 &i8259 9 2
-                        e200 0 0 1 &i8259 a 2
-                        e300 0 0 1 &i8259 b 2
+                        e100 0 0 2 &i8259 9 2
+                        e200 0 0 3 &i8259 a 2
+                        e300 0 0 4 &i8259 b 2
 
                         // IDSEL 0x1d  Audio
                         e800 0 0 1 &i8259 6 2
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 233e0d5a8b9d..813c259abbe5 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -334,9 +334,9 @@
 
                         // IDSEL 0x1c  USB
                         e000 0 0 1 &i8259 c 2
-                        e100 0 0 1 &i8259 9 2
-                        e200 0 0 1 &i8259 a 2
-                        e300 0 0 1 &i8259 b 2
+                        e100 0 0 2 &i8259 9 2
+                        e200 0 0 3 &i8259 a 2
+                        e300 0 0 4 &i8259 b 2
 
                         // IDSEL 0x1d  Audio
                         e800 0 0 1 &i8259 6 2
@@ -481,6 +481,7 @@
                 clock-frequency = <1fca055>;
                 interrupt-parent = <&mpic>;
                 interrupts = <1b 2>;
+                interrupt-map-mask = <f800 0 0 7>;
                 interrupt-map = <
                         /* IDSEL 0x0 */
                         0000 0 0 1 &mpic 0 1
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 01040a752c82..d98715cbda28 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -1,7 +1,7 @@
 /*
  * MPC8610 HPCD Device Tree Source
  *
- * Copyright 2007 Freescale Semiconductor Inc.
+ * Copyright 2007-2008 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under the terms of the GNU General Public License Version 2 as published
@@ -49,6 +49,7 @@
                 #size-cells = <1>;
                 #interrupt-cells = <2>;
                 device_type = "soc";
+                compatible = "fsl,mpc8610-immr", "simple-bus";
                 ranges = <0 e0000000 00100000>;
                 reg = <e0000000 1000>;
                 bus-frequency = <0>;
@@ -62,6 +63,13 @@
                         interrupts = <2b 2>;
                         interrupt-parent = <&mpic>;
                         dfsrr;
+
+                        cs4270:codec@4f {
+                                compatible = "cirrus,cs4270";
+                                reg = <4f>;
+                                /* MCLK source is a stand-alone oscillator */
+                                clock-frequency = <bb8000>;
+                        };
                 };
 
                 i2c@3100 {
@@ -111,6 +119,109 @@
                         reg = <e0000 1000>;
                         fsl,has-rstcr;
                 };
+
+                i2s@16000 {
+                        compatible = "fsl,mpc8610-ssi";
+                        cell-index = <0>;
+                        reg = <16000 100>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <3e 2>;
+                        fsl,mode = "i2s-slave";
+                        codec-handle = <&cs4270>;
+                };
+
+                ssi@16100 {
+                        compatible = "fsl,mpc8610-ssi";
+                        cell-index = <1>;
+                        reg = <16100 100>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <3f 2>;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
+                        cell-index = <0>;
+                        reg = <21300 4>; /* DMA general status register */
+                        ranges = <0 21100 200>;
+
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,eloplus-dma-channel";
+                                cell-index = <0>;
+                                reg = <0 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <14 2>;
+                        };
+                        dma-channel@1 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,eloplus-dma-channel";
+                                cell-index = <1>;
+                                reg = <80 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <15 2>;
+                        };
+                        dma-channel@2 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,eloplus-dma-channel";
+                                cell-index = <2>;
+                                reg = <100 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <16 2>;
+                        };
+                        dma-channel@3 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,eloplus-dma-channel";
+                                cell-index = <3>;
+                                reg = <180 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <17 2>;
+                        };
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
+                        cell-index = <1>;
+                        reg = <c300 4>; /* DMA general status register */
+                        ranges = <0 c100 200>;
+
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,mpc8540-dma-channel";
+                                cell-index = <0>;
+                                reg = <0 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <3c 2>;
+                        };
+                        dma-channel@1 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,mpc8540-dma-channel";
+                                cell-index = <1>;
+                                reg = <80 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <3d 2>;
+                        };
+                        dma-channel@2 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,mpc8540-dma-channel";
+                                cell-index = <2>;
+                                reg = <100 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <3e 2>;
+                        };
+                        dma-channel@3 {
+                                compatible = "fsl,mpc8610-dma-channel",
+                                        "fsl,mpc8540-dma-channel";
+                                cell-index = <3>;
+                                reg = <180 80>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <3f 2>;
+                        };
+                };
+
         };
 
         pci0: pci@e0008000 {
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 86fc2280c16d..556a9cac0793 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -60,10 +60,52 @@
                 reg = <00000000 40000000>;      // 1G at 0x0
         };
 
+        localbus@f8005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8641-localbus", "simple-bus";
+                reg = <f8005000 1000>;
+                interrupts = <13 2>;
+                interrupt-parent = <&mpic>;
+
+                ranges = <0 0 ff800000 00800000
+                          1 0 fe000000 01000000
+                          2 0 f8200000 00100000
+                          3 0 f8100000 00100000>;
+
+                flash@0,0 {
+                        compatible = "cfi-flash";
+                        reg = <0 0 00800000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "kernel";
+                                reg = <00000000 00300000>;
+                        };
+                        partition@300000 {
+                                label = "firmware b";
+                                reg = <00300000 00100000>;
+                                read-only;
+                        };
+                        partition@400000 {
+                                label = "fs";
+                                reg = <00400000 00300000>;
+                        };
+                        partition@700000 {
+                                label = "firmware a";
+                                reg = <00700000 00100000>;
+                                read-only;
+                        };
+                };
+        };
+
         soc8641@f8000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "soc";
+                compatible = "simple-bus";
                 ranges = <00000000 f8000000 00100000>;
                 reg = <f8000000 00001000>;      // CCSRBAR
                 bus-frequency = <0>;
@@ -326,9 +368,9 @@
 
                         // IDSEL 0x1c  USB
                         e000 0 0 1 &i8259 c 2
-                        e100 0 0 1 &i8259 9 2
-                        e200 0 0 1 &i8259 a 2
-                        e300 0 0 1 &i8259 b 2
+                        e100 0 0 2 &i8259 9 2
+                        e200 0 0 3 &i8259 a 2
+                        e300 0 0 4 &i8259 b 2
 
                         // IDSEL 0x1d  Audio
                         e800 0 0 1 &i8259 6 2
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
new file mode 100644
index 000000000000..6aa1d695e644
--- /dev/null
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -0,0 +1,138 @@
+/*
+ * Device Tree Source for IOMEGA StorCenter
+ *
+ * Copyright 2007 Oyvind Repvik
+ * Copyright 2007 Jon Loeliger
+ *
+ * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/ {
+        model = "StorCenter";
+        compatible = "storcenter";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8241@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        clock-frequency = <d# 200000000>;       /* Hz */
+                        timebase-frequency = <d# 25000000>;     /* Hz */
+                        bus-frequency = <0>;    /* from bootwrapper */
+                        i-cache-line-size = <d# 32>;    /* bytes */
+                        d-cache-line-size = <d# 32>;    /* bytes */
+                        i-cache-size = <4000>;
+                        d-cache-size = <4000>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <00000000 04000000>;      /* 64MB @ 0x0 */
+        };
+
+        soc@fc000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8241", "mpc10x";
+                store-gathering = <0>; /* 0 == off, !0 == on */
+                ranges = <0 fc000000 100000>;
+                reg = <fc000000 100000>;        /* EUMB */
+                bus-frequency = <0>;            /* fixed by loader */
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <3000 100>;
+                        interrupts = <5 2>;
+                        interrupt-parent = <&mpic>;
+
+                        rtc@68 {
+                                compatible = "dallas,ds1337";
+                                reg = <68>;
+                        };
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <4500 20>;
+                        clock-frequency = <d# 97553800>; /* Hz */
+                        current-speed = <d# 115200>;
+                        interrupts = <9 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <4600 20>;
+                        clock-frequency = <d# 97553800>; /* Hz */
+                        current-speed = <d# 9600>;
+                        interrupts = <a 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                mpic: interrupt-controller@40000 {
+                        #interrupt-cells = <2>;
+                        device_type = "open-pic";
+                        compatible = "chrp,open-pic";
+                        interrupt-controller;
+                        reg = <40000 40000>;
+                };
+
+        };
+
+        pci0: pci@fe800000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "mpc10x-pci";
+                reg = <fe800000 1000>;
+                ranges = <01000000 0        0 fe000000 0 00c00000
+                          02000000 0 80000000 80000000 0 70000000>;
+                bus-range = <0 ff>;
+                clock-frequency = <d# 97553800>; /* Hz */
+                interrupt-parent = <&mpic>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 13 - IDE */
+                        6800 0 0 1 &mpic 0 1
+                        6800 0 0 2 &mpic 0 1
+                        6800 0 0 3 &mpic 0 1
+                        /* IDSEL 14 - USB */
+                        7000 0 0 1 &mpic 0 1
+                        7000 0 0 2 &mpic 0 1
+                        7000 0 0 3 &mpic 0 1
+                        7000 0 0 4 &mpic 0 1
+                        /* IDSEL 15 - ETH */
+                        7800 0 0 1 &mpic 0 1
+                        7800 0 0 2 &mpic 0 1
+                        7800 0 0 3 &mpic 0 1
+                        7800 0 0 4 &mpic 0 1
+                >;
+        };
+
+        chosen {
+                linux,stdout-path = "/soc/serial@4500";
+        };
+};
diff --git a/arch/powerpc/boot/ep8248e.c b/arch/powerpc/boot/ep8248e.c
new file mode 100644
index 000000000000..f57d14d0272b
--- /dev/null
+++ b/arch/powerpc/boot/ep8248e.c
@@ -0,0 +1,55 @@
+/*
+ * Embedded Planet EP8248E with PlanetCore firmware
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "planetcore.h"
+#include "pq2.h"
+
+static char *table;
+static u64 mem_size;
+
+#include <io.h>
+
+static void platform_fixups(void)
+{
+        u64 val;
+
+        dt_fixup_memory(0, mem_size);
+        planetcore_set_mac_addrs(table);
+
+        if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
+                printf("No PlanetCore crystal frequency key.\r\n");
+                return;
+        }
+
+        pq2_fixup_clocks(val);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        table = (char *)r3;
+        planetcore_prepare_table(table);
+
+        if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size))
+                return;
+
+        mem_size *= 1024 * 1024;
+        simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
+
+        fdt_init(_dtb_start);
+
+        planetcore_set_stdout_path(table);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index 6036a98e646a..5872ef1779ae 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -159,9 +159,23 @@ static inline void *find_node_by_devtype(const void *prev,
         return find_node_by_prop_value_str(prev, "device_type", type);
 }
 
+static inline void *find_node_by_alias(const char *alias)
+{
+        void *devp = finddevice("/aliases");
+
+        if (devp) {
+                char path[MAX_PATH_LEN];
+                if (getprop(devp, alias, path, MAX_PATH_LEN) > 0)
+                        return finddevice(path);
+        }
+
+        return NULL;
+}
+
 void dt_fixup_memory(u64 start, u64 size);
 void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq);
 void dt_fixup_clock(const char *path, u32 freq);
+void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr);
 void dt_fixup_mac_address(u32 index, const u8 *addr);
 void __dt_fixup_mac_addresses(u32 startindex, ...);
 #define dt_fixup_mac_addresses(...) \
diff --git a/arch/powerpc/boot/redboot-8xx.c b/arch/powerpc/boot/redboot-8xx.c
new file mode 100644
index 000000000000..f7945adc8004
--- /dev/null
+++ b/arch/powerpc/boot/redboot-8xx.c
@@ -0,0 +1,58 @@
+/*
+ * RedBoot firmware support
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "redboot.h"
+#include "fsl-soc.h"
+#include "io.h"
+
+static bd_t bd;
+BSS_STACK(4096);
+
+#define MHZ(x)  ((x + 500000) / 1000000)
+
+static void platform_fixups(void)
+{
+        void *node;
+
+        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+        dt_fixup_mac_addresses(bd.bi_enetaddr);
+        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
+
+        node = finddevice("/soc/cpm/brg");
+        if (node) {
+                printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n",
+                       bd.bi_busfreq, MHZ(bd.bi_busfreq));
+                setprop(node, "clock-frequency",  &bd.bi_busfreq, 4);
+        }
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        memcpy(&bd, (char *)r3, sizeof(bd));
+
+        if (bd.bi_tag != 0x42444944)
+                return;
+
+        simple_alloc_init(_end,
+                          bd.bi_memstart + bd.bi_memsize - (unsigned long)_end,
+                          32, 64);
+
+        fdt_init(_dtb_start);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+
+        loader_info.cmdline = (char *)bd.bi_cmdline;
+        loader_info.cmdline_len = strlen((char *)bd.bi_cmdline);
+}
diff --git a/arch/powerpc/boot/redboot.h b/arch/powerpc/boot/redboot.h
new file mode 100644
index 000000000000..ace0b7fed8eb
--- /dev/null
+++ b/arch/powerpc/boot/redboot.h
@@ -0,0 +1,56 @@
+#ifndef _PPC_REDBOOT_H
+#define _PPC_REDBOOT_H
+
+//=========================================================================
+// include/asm-ppc/redboot.h
+//   Copyright (c) 2002, 2003 Gary Thomas (<gary@mlbassoc.com>
+//   Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
+
+//
+// Board specific details, as provided by RedBoot
+//
+
+/* A Board Information structure that is given to a program when
+ * RedBoot starts it up.  Note: not all fields make sense for all
+ * architectures and it's up to the platform specific code to fill
+ * in the details.
+ */
+typedef struct bd_info {
+    unsigned int   bi_tag;        /* Should be 0x42444944 "BDID" */
+    unsigned int   bi_size;       /* Size of this structure */
+    unsigned int   bi_revision;   /* revision of this structure */
+    unsigned int   bi_bdate;      /* bootstrap date, i.e. 0x19971106 */
+    unsigned int   bi_memstart;   /* Memory start address */
+    unsigned int   bi_memsize;    /* Memory (end) size in bytes */
+    unsigned int   bi_intfreq;    /* Internal Freq, in Hz */
+    unsigned int   bi_busfreq;    /* Bus Freq, in Hz */
+    unsigned int   bi_cpmfreq;    /* CPM Freq, in Hz */
+    unsigned int   bi_brgfreq;    /* BRG Freq, in Hz */
+    unsigned int   bi_vco;        /* VCO Out from PLL */
+    unsigned int   bi_pci_freq;   /* PCI Freq, in Hz */
+    unsigned int   bi_baudrate;   /* Default console baud rate */
+    unsigned int   bi_immr;       /* IMMR when called from boot rom */
+    unsigned char  bi_enetaddr[6];
+    unsigned int   bi_flashbase;  /* Physical address of FLASH memory */
+    unsigned int   bi_flashsize;  /* Length of FLASH memory */
+    int            bi_flashwidth; /* Width (8,16,32,64) */
+    unsigned char *bi_cmdline;    /* Pointer to command line */
+    unsigned char  bi_esa[3][6];  /* Ethernet station addresses */
+    unsigned int   bi_ramdisk_begin, bi_ramdisk_end;
+    struct {                      /* Information about [main] video screen */
+        short x_res;              /*   Horizontal resolution in pixels */
+        short y_res;              /*   Vertical resolution in pixels */
+        short bpp;                /*   Bits/pixel */
+        short mode;               /*   Type of pixels (packed, indexed) */
+        unsigned long fb;         /*   Pointer to frame buffer (pixel) memory */
+    } bi_video;
+    void         (*bi_cputc)(char);   /* Write a character to the RedBoot console */
+    char         (*bi_cgetc)(void);   /* Read a character from the RedBoot console */
+    int          (*bi_ctstc)(void);   /* Test for input on the RedBoot console */
+} bd_t;
+
+#define BI_REV 0x0102    /* Version 1.02 */
+
+#define bi_pci_busfreq bi_pci_freq
+#define bi_immr_base   bi_immr
+#endif
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 154df055aad2..763a0c46f441 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -168,7 +168,7 @@ ps3)
     ksection=.kernel:vmlinux.bin
     isection=.kernel:initrd
     ;;
-ep88xc|ep405)
+ep88xc|ep405|redboot*|ep8248e)
     platformo="$object/fixed-head.o $object/$platform.o"
     binary=y
     ;;
diff --git a/arch/powerpc/configs/adder875-redboot_defconfig b/arch/powerpc/configs/adder875-redboot_defconfig
new file mode 100644
index 000000000000..cab5f9b64567
--- /dev/null
+++ b/arch/powerpc/configs/adder875-redboot_defconfig
@@ -0,0 +1,798 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc6
+# Thu Jan 17 16:17:38 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+CONFIG_PPC_8xx=y
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_8xx=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_REDBOOT=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_FUTEX is not set
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+CONFIG_CPM1=y
+# CONFIG_MPC8XXFADS is not set
+# CONFIG_MPC86XADS is not set
+# CONFIG_MPC885ADS is not set
+# CONFIG_PPC_EP88XC is not set
+CONFIG_PPC_ADDER875=y
+
+#
+# MPC8xx CPM Options
+#
+
+#
+# Generic MPC8xx Options
+#
+CONFIG_8xx_COPYBACK=y
+# CONFIG_8xx_CPU6 is not set
+CONFIG_8xx_CPU15=y
+CONFIG_NO_UCODE_PATCH=y
+# CONFIG_USB_SOF_UCODE_PATCH is not set
+# CONFIG_I2C_SPI_UCODE_PATCH is not set
+# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+CONFIG_PPC_CPM_NEW_BINDING=y
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_CPM=y
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_8XX_MINIMAL_FPEMU is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+# CONFIG_SECCOMP is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="adder875-redboot.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_FSL_SOC=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_PCI_QSPAN is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xfd000000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_PARTITIONS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_CFI_FLAGADM is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+CONFIG_FS_ENET=y
+# CONFIG_FS_ENET_HAS_SCC is not set
+CONFIG_FS_ENET_HAS_FEC=y
+CONFIG_FS_ENET_MDIO_FEC=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_CPM_SCC1 is not set
+# CONFIG_SERIAL_CPM_SCC2 is not set
+# CONFIG_SERIAL_CPM_SCC3 is not set
+# CONFIG_SERIAL_CPM_SCC4 is not set
+CONFIG_SERIAL_CPM_SMC1=y
+CONFIG_SERIAL_CPM_SMC2=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_INSTRUMENTATION=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_LIB_RHEAP=y
diff --git a/arch/powerpc/configs/adder875-uboot_defconfig b/arch/powerpc/configs/adder875-uboot_defconfig
new file mode 100644
index 000000000000..1faf7ef59a23
--- /dev/null
+++ b/arch/powerpc/configs/adder875-uboot_defconfig
@@ -0,0 +1,798 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc6
+# Thu Jan 17 16:17:18 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+CONFIG_PPC_8xx=y
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_8xx=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_REDBOOT=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_FUTEX is not set
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+CONFIG_CPM1=y
+# CONFIG_MPC8XXFADS is not set
+# CONFIG_MPC86XADS is not set
+# CONFIG_MPC885ADS is not set
+# CONFIG_PPC_EP88XC is not set
+CONFIG_PPC_ADDER875=y
+
+#
+# MPC8xx CPM Options
+#
+
+#
+# Generic MPC8xx Options
+#
+CONFIG_8xx_COPYBACK=y
+# CONFIG_8xx_CPU6 is not set
+CONFIG_8xx_CPU15=y
+CONFIG_NO_UCODE_PATCH=y
+# CONFIG_USB_SOF_UCODE_PATCH is not set
+# CONFIG_I2C_SPI_UCODE_PATCH is not set
+# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+CONFIG_PPC_CPM_NEW_BINDING=y
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_CPM=y
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_8XX_MINIMAL_FPEMU is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+# CONFIG_SECCOMP is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="adder875-uboot.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_FSL_SOC=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_PCI_QSPAN is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xfd000000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_PARTITIONS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_CFI_FLAGADM is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+CONFIG_FS_ENET=y
+# CONFIG_FS_ENET_HAS_SCC is not set
+CONFIG_FS_ENET_HAS_FEC=y
+CONFIG_FS_ENET_MDIO_FEC=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_CPM_SCC1 is not set
+# CONFIG_SERIAL_CPM_SCC2 is not set
+# CONFIG_SERIAL_CPM_SCC3 is not set
+# CONFIG_SERIAL_CPM_SCC4 is not set
+CONFIG_SERIAL_CPM_SMC1=y
+CONFIG_SERIAL_CPM_SMC2=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_INSTRUMENTATION=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_LIB_RHEAP=y
diff --git a/arch/powerpc/configs/ep8248e_defconfig b/arch/powerpc/configs/ep8248e_defconfig
new file mode 100644
index 000000000000..01ad5951ade9
--- /dev/null
+++ b/arch/powerpc/configs/ep8248e_defconfig
@@ -0,0 +1,821 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc6
+# Fri Jan 11 14:02:06 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+CONFIG_PPC_82xx=y
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_MPC8272_ADS is not set
+# CONFIG_PQ2FADS is not set
+CONFIG_EP8248E=y
+# CONFIG_PQ2ADS is not set
+CONFIG_8260=y
+CONFIG_8272=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_CPM2=y
+CONFIG_PPC_CPM_NEW_BINDING=y
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_CPM=y
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+# CONFIG_SECCOMP is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="ep8248e.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_FSL_SOC=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+# CONFIG_NF_CONNTRACK_ENABLED is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_PARTITIONS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+# CONFIG_MTD_CFI_I1 is not set
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_MDIO_BITBANG=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+CONFIG_FS_ENET=y
+# CONFIG_FS_ENET_HAS_SCC is not set
+CONFIG_FS_ENET_HAS_FCC=y
+# CONFIG_FS_ENET_MDIO_FCC is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+CONFIG_SERIAL_CPM_SCC1=y
+# CONFIG_SERIAL_CPM_SCC2 is not set
+# CONFIG_SERIAL_CPM_SCC3 is not set
+CONFIG_SERIAL_CPM_SCC4=y
+# CONFIG_SERIAL_CPM_SMC1 is not set
+# CONFIG_SERIAL_CPM_SMC2 is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_JBD=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_INSTRUMENTATION=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_KGDB_CONSOLE is not set
+CONFIG_BDI_SWITCH=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_LIB_RHEAP=y
diff --git a/arch/powerpc/configs/mpc8313_rdb_defconfig b/arch/powerpc/configs/mpc8313_rdb_defconfig
index c9af905bbb1d..db08e736c0ac 100644
--- a/arch/powerpc/configs/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/mpc8313_rdb_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc4
-# Thu Dec  6 16:48:31 2007
+# Linux kernel version: 2.6.24-rc6
+# Thu Jan 17 16:35:55 2008
 #
 # CONFIG_PPC64 is not set
 
@@ -144,6 +144,7 @@ CONFIG_MPC8313_RDB=y
 # CONFIG_MPC834x_MDS is not set
 # CONFIG_MPC834x_ITX is not set
 # CONFIG_MPC836x_MDS is not set
+# CONFIG_MPC837x_MDS is not set
 CONFIG_PPC_MPC831x=y
 # CONFIG_MPIC is not set
 # CONFIG_MPIC_WEIRD is not set
@@ -336,15 +337,16 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
 # CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_PARTITIONS is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
 CONFIG_MTD_CHAR=y
-# CONFIG_MTD_BLKDEVS is not set
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_MTD_BLOCK_RO is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
@@ -381,11 +383,8 @@ CONFIG_MTD_CFI_UTIL=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0xfe000000
-CONFIG_MTD_PHYSMAP_LEN=0x1000000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-# CONFIG_MTD_PHYSMAP_OF is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
 # CONFIG_MTD_INTEL_VR_NOR is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -406,7 +405,16 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-# CONFIG_MTD_NAND is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
 # CONFIG_MTD_ONENAND is not set
 
 #
@@ -1178,7 +1186,17 @@ CONFIG_TMPFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_HPFS_FS is not set
@@ -1242,6 +1260,8 @@ CONFIG_BITREVERSE=y
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
 CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
diff --git a/arch/powerpc/configs/mpc834x_itx_defconfig b/arch/powerpc/configs/mpc834x_itx_defconfig
index 6feb86e2b786..2fbe4e5344f7 100644
--- a/arch/powerpc/configs/mpc834x_itx_defconfig
+++ b/arch/powerpc/configs/mpc834x_itx_defconfig
@@ -570,7 +570,8 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_SIS is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
-# CONFIG_PATA_PLATFORM is not set
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=y
diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig b/arch/powerpc/configs/mpc8610_hpcd_defconfig
index 9614d24f832a..2500ef42959d 100644
--- a/arch/powerpc/configs/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig
@@ -696,7 +696,7 @@ CONFIG_SERIAL_8250_RSA=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
-CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
@@ -708,7 +708,60 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
 
 #
 # SPI support
@@ -763,7 +816,119 @@ CONFIG_DUMMY_CONSOLE=y
 #
 # Sound
 #
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_PCM_OSS_PLUGINS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5530 is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+
+#
+# ALSA PowerMac devices
+#
+
+#
+# ALSA PowerPC devices
+#
+
+#
+# System on Chip audio support
+#
+CONFIG_SND_SOC=y
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+CONFIG_SND_SOC_MPC8610=y
+CONFIG_SND_SOC_MPC8610_HPCD=y
+CONFIG_SND_SOC_CS4270=y
+CONFIG_SND_SOC_CS4270_VD33_ERRATA=y
+
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig
new file mode 100644
index 000000000000..a034a5e452ef
--- /dev/null
+++ b/arch/powerpc/configs/storcenter_defconfig
@@ -0,0 +1,1174 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc6
+# Tue Jan  8 09:33:54 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_ALTIVEC is not set
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+# CONFIG_PPC_82xx is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_EFIKA is not set
+# CONFIG_PPC_LITE5200 is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_EMBEDDED6xx=y
+# CONFIG_LINKSTATION is not set
+CONFIG_STORCENTER=y
+# CONFIG_MPC7448HPC2 is not set
+# CONFIG_PPC_HOLLY is not set
+# CONFIG_PPC_PRPMC2800 is not set
+CONFIG_MPC10X_BRIDGE=y
+CONFIG_MPC10X_OPENPIC=y
+# CONFIG_MPC10X_STORE_GATHERING is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_TAU is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+# CONFIG_KEXEC is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttyS0,115200"
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+# CONFIG_SECCOMP is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="storcenter.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=m
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_FTL=y
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0xFF800000
+CONFIG_MTD_PHYSMAP_LEN=0x00800000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=1
+# CONFIG_MTD_PHYSMAP_OF is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+CONFIG_IDE=y
+CONFIG_IDE_MAX_HWIFS=4
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_PLATFORM is not set
+
+#
+# PCI IDE chipsets support
+#
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+CONFIG_IDEPCI_PCIBUS_ORDER=y
+# CONFIG_BLK_DEV_GENERIC is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+CONFIG_BLK_DEV_VIA82CXXX=y
+# CONFIG_BLK_DEV_TC86C001 is not set
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+CONFIG_IDE_ARCH_OBSOLETE_INIT=y
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=y
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_ATA is not set
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=y
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+# CONFIG_MD_RAID10 is not set
+CONFIG_MD_RAID456=y
+CONFIG_MD_RAID5_RESHAPE=y
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+# CONFIG_BLK_DEV_DM is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=m
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_IP1000 is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+CONFIG_R8169=y
+# CONFIG_R8169_NAPI is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_MV643XX_ETH is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+CONFIG_NVRAM=y
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_SECURITY is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_INSTRUMENTATION=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_XOR_BLOCKS=y
+CONFIG_ASYNC_CORE=y
+CONFIG_ASYNC_MEMCPY=y
+CONFIG_ASYNC_XOR=y
+# CONFIG_CRYPTO is not set
+# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index d9b377070caa..58dbfeff9b4d 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -70,6 +70,7 @@ pci64-$(CONFIG_PPC64)		+= pci_dn.o isa-bridge.o
 obj-$(CONFIG_PCI)               += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
                                    pci-common.o
 obj-$(CONFIG_PCI_MSI)           += msi.o
+obj-$(CONFIG_RAPIDIO)           += rio.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o crash.o \
                                    machine_kexec_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_AUDIT)             += audit.o
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 7aecb39a5a45..d9cc2c288d9e 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -73,8 +73,8 @@ _ENTRY(_start);
 /* We try to not make any assumptions about how the boot loader
  * setup or used the TLBs.  We invalidate all mappings from the
  * boot loader and load a single entry in TLB1[0] to map the
- * first 16M of kernel memory.  Any boot info passed from the
- * bootloader needs to live in this first 16M.
+ * first 64M of kernel memory.  Any boot info passed from the
+ * bootloader needs to live in this first 64M.
  *
  * Requirement on bootloader:
  *  - The page we're executing in needs to reside in TLB1 and
@@ -167,7 +167,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
         mtspr   SPRN_MAS0,r7
         tlbre
 
-        /* Just modify the entry ID and EPN for the temp mapping */
+        /* Just modify the entry ID, EPN and RPN for the temp mapping */
         lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
         rlwimi  r7,r5,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r5) */
         mtspr   SPRN_MAS0,r7
@@ -177,9 +177,12 @@ skpinv:	addi	r6,r6,1				/* Increment */
         ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
         mtspr   SPRN_MAS1,r6
         mfspr   r6,SPRN_MAS2
-        li      r7,0            /* temp EPN = 0 */
+        lis     r7,PHYSICAL_START@h
         rlwimi  r7,r6,0,20,31
         mtspr   SPRN_MAS2,r7
+        mfspr   r6,SPRN_MAS3
+        rlwimi  r7,r6,0,20,31
+        mtspr   SPRN_MAS3,r7
         tlbwe
 
         xori    r6,r4,1
@@ -222,11 +225,11 @@ skpinv:	addi	r6,r6,1				/* Increment */
         lis     r6,0x1000               /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
         mtspr   SPRN_MAS0,r6
         lis     r6,(MAS1_VALID|MAS1_IPROT)@h
-        ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l
+        ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
         mtspr   SPRN_MAS1,r6
         li      r7,0
-        lis     r6,KERNELBASE@h
-        ori     r6,r6,KERNELBASE@l
+        lis     r6,PAGE_OFFSET@h
+        ori     r6,r6,PAGE_OFFSET@l
         rlwimi  r6,r7,0,20,31
         mtspr   SPRN_MAS2,r6
         li      r7,(MAS3_SX|MAS3_SW|MAS3_SR)
@@ -234,6 +237,9 @@ skpinv:	addi	r6,r6,1				/* Increment */
         tlbwe
 
 /* 7. Jump to KERNELBASE mapping */
+        lis     r6,KERNELBASE@h
+        ori     r6,r6,KERNELBASE@l
+        rlwimi  r6,r7,0,20,31
         lis     r7,MSR_KERNEL@h
         ori     r7,r7,MSR_KERNEL@l
         bl      1f                      /* Find our address */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index d394d41b61d5..980fe32895c0 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -792,9 +792,10 @@ static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
                 for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
                         if ((res = bus->resource[i]) == NULL)
                                 continue;
-                        if (!res->flags || bus->self->transparent)
+                        if (!res->flags)
+                                continue;
+                        if (i >= 3 && bus->self->transparent)
                                 continue;
-
                         /* On PowerMac, Apple leaves bridge windows open over
                          * an inaccessible region of memory space (0...fffff)
                          * which is somewhat bogus, but that's what they think
@@ -806,7 +807,8 @@ static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
                          * equal to the pci_mem_offset of the host bridge and
                          * their size is smaller than 1M.
                          */
-                        if (res->start == hose->pci_mem_offset &&
+                        if (res->flags & IORESOURCE_MEM &&
+                            res->start == hose->pci_mem_offset &&
                             res->end < 0x100000) {
                                 printk(KERN_INFO
                                        "PCI: Closing bogus Apple Firmware"
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 14e300f85ce4..88db4ffaf11c 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -94,64 +94,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,     PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
 
-
-void __init
-update_bridge_resource(struct pci_dev *dev, struct resource *res)
-{
-        u8 io_base_lo, io_limit_lo;
-        u16 mem_base, mem_limit;
-        u16 cmd;
-        resource_size_t start, end, off;
-        struct pci_controller *hose = dev->sysdata;
-
-        if (!hose) {
-                printk("update_bridge_base: no hose?\n");
-                return;
-        }
-        pci_read_config_word(dev, PCI_COMMAND, &cmd);
-        pci_write_config_word(dev, PCI_COMMAND,
-                              cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
-        if (res->flags & IORESOURCE_IO) {
-                off = (unsigned long) hose->io_base_virt - isa_io_base;
-                start = res->start - off;
-                end = res->end - off;
-                io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
-                io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
-                if (end > 0xffff)
-                        io_base_lo |= PCI_IO_RANGE_TYPE_32;
-                else
-                        io_base_lo |= PCI_IO_RANGE_TYPE_16;
-                pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
-                                start >> 16);
-                pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
-                                end >> 16);
-                pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
-                pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);
-
-        } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
-                   == IORESOURCE_MEM) {
-                off = hose->pci_mem_offset;
-                mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK;
-                mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK;
-                pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base);
-                pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit);
-
-        } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
-                   == (IORESOURCE_MEM | IORESOURCE_PREFETCH)) {
-                off = hose->pci_mem_offset;
-                mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK;
-                mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK;
-                pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base);
-                pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit);
-
-        } else {
-                DBG(KERN_ERR "PCI: ugh, bridge %s res has flags=%lx\n",
-                    pci_name(dev), res->flags);
-        }
-        pci_write_config_word(dev, PCI_COMMAND, cmd);
-}
-
-
 #ifdef CONFIG_PPC_OF
 /*
  * Functions below are used on OpenFirmware machines.
diff --git a/arch/ppc/kernel/rio.c b/arch/powerpc/kernel/rio.c
index 29487fedfc76..29487fedfc76 100644
--- a/arch/ppc/kernel/rio.c
+++ b/arch/powerpc/kernel/rio.c
diff --git a/arch/powerpc/math-emu/op-4.h b/arch/powerpc/math-emu/op-4.h
index fcdd6d064c54..c9ae626070da 100644
--- a/arch/powerpc/math-emu/op-4.h
+++ b/arch/powerpc/math-emu/op-4.h
@@ -194,19 +194,39 @@
   (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
 
 #ifndef __FP_FRAC_ADD_4
-#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
-  (r0 = x0 + y0,                                                        \
-   r1 = x1 + y1 + (r0 < x0),                                            \
-   r2 = x2 + y2 + (r1 < x1),                                            \
-   r3 = x3 + y3 + (r2 < x2))
+#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)    \
+  do {                                                          \
+    int _c1, _c2, _c3;                                          \
+    r0 = x0 + y0;                                               \
+    _c1 = r0 < x0;                                              \
+    r1 = x1 + y1;                                               \
+    _c2 = r1 < x1;                                              \
+    r1 += _c1;                                                  \
+    _c2 |= r1 < _c1;                                            \
+    r2 = x2 + y2;                                               \
+    _c3 = r2 < x2;                                              \
+    r2 += _c2;                                                  \
+    _c3 |= r2 < _c2;                                            \
+    r3 = x3 + y3 + _c3;                                         \
+  } while (0)
 #endif
 
 #ifndef __FP_FRAC_SUB_4
-#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
-  (r0 = x0 - y0,                                                        \
-   r1 = x1 - y1 - (r0 > x0),                                            \
-   r2 = x2 - y2 - (r1 > x1),                                            \
-   r3 = x3 - y3 - (r2 > x2))
+#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)    \
+  do {                                                          \
+    int _c1, _c2, _c3;                                          \
+    r0 = x0 - y0;                                               \
+    _c1 = r0 > x0;                                              \
+    r1 = x1 - y1;                                               \
+    _c2 = r1 > x1;                                              \
+    r1 -= _c1;                                                  \
+    _c2 |= r1 > _c1;                                            \
+    r2 = x2 - y2;                                               \
+    _c3 = r2 > x2;                                              \
+    r2 -= _c2;                                                  \
+    _c3 |= r2 > _c2;                                            \
+    r3 = x3 - y3 - _c3;                                         \
+  } while (0)
 #endif
 
 #ifndef __FP_FRAC_ADDI_4
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 17139daeaff4..c93a966b7e4b 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -165,15 +165,15 @@ void invalidate_tlbcam_entry(int index)
 void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
                 unsigned long cam2)
 {
-        settlbcam(0, KERNELBASE, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
+        settlbcam(0, PAGE_OFFSET, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
         tlbcam_index++;
         if (cam1) {
                 tlbcam_index++;
-                settlbcam(1, KERNELBASE+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0);
+                settlbcam(1, PAGE_OFFSET+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0);
         }
         if (cam2) {
                 tlbcam_index++;
-                settlbcam(2, KERNELBASE+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0);
+                settlbcam(2, PAGE_OFFSET+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0);
         }
 }
 
diff --git a/arch/powerpc/mm/lmb.c b/arch/powerpc/mm/lmb.c
index 8f4d2dc4cafb..4ce23bcf8a57 100644
--- a/arch/powerpc/mm/lmb.c
+++ b/arch/powerpc/mm/lmb.c
@@ -342,3 +342,16 @@ void __init lmb_enforce_memory_limit(unsigned long memory_limit)
                 }
         }
 }
+
+int __init lmb_is_reserved(unsigned long addr)
+{
+        int i;
+
+        for (i = 0; i < lmb.reserved.cnt; i++) {
+                unsigned long upper = lmb.reserved.region[i].base +
+                                      lmb.reserved.region[i].size - 1;
+                if ((addr >= lmb.reserved.region[i].base) && (addr <= upper))
+                        return 1;
+        }
+        return 0;
+}
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 5402fb6b3aae..e8122447f019 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -213,15 +213,30 @@ void __init do_init_bootmem(void)
          */
 #ifdef CONFIG_HIGHMEM
         free_bootmem_with_active_regions(0, total_lowmem >> PAGE_SHIFT);
+
+        /* reserve the sections we're already using */
+        for (i = 0; i < lmb.reserved.cnt; i++) {
+                unsigned long addr = lmb.reserved.region[i].base +
+                                     lmb_size_bytes(&lmb.reserved, i) - 1;
+                if (addr < total_lowmem)
+                        reserve_bootmem(lmb.reserved.region[i].base,
+                                        lmb_size_bytes(&lmb.reserved, i));
+                else if (lmb.reserved.region[i].base < total_lowmem) {
+                        unsigned long adjusted_size = total_lowmem -
+                                      lmb.reserved.region[i].base;
+                        reserve_bootmem(lmb.reserved.region[i].base,
+                                        adjusted_size);
+                }
+        }
 #else
         free_bootmem_with_active_regions(0, max_pfn);
-#endif
 
         /* reserve the sections we're already using */
         for (i = 0; i < lmb.reserved.cnt; i++)
                 reserve_bootmem(lmb.reserved.region[i].base,
                                 lmb_size_bytes(&lmb.reserved, i));
 
+#endif
         /* XXX need to clip this if using highmem? */
         sparse_memory_present_with_active_regions(0);
 
@@ -334,11 +349,13 @@ void __init mem_init(void)
                 highmem_mapnr = total_lowmem >> PAGE_SHIFT;
                 for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
                         struct page *page = pfn_to_page(pfn);
-
+                        if (lmb_is_reserved(pfn << PAGE_SHIFT))
+                                continue;
                         ClearPageReserved(page);
                         init_page_count(page);
                         __free_page(page);
                         totalhigh_pages++;
+                        reservedpages--;
                 }
                 totalram_pages += totalhigh_pages;
                 printk(KERN_DEBUG "High memory: %luk\n",
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 541fbb815631..4fad6c7bf9f1 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -26,6 +26,19 @@ config PQ2FADS
         help
           This option enables support for the PQ2FADS board
 
+config EP8248E
+        bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)"
+        select 8272
+        select 8260
+        select FSL_SOC
+        select PPC_CPM_NEW_BINDING
+        select MDIO_BITBANG
+        help
+          This enables support for the Embedded Planet EP8248E board.
+
+          This board is also resold by Freescale as the QUICCStart
+          MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
+
 endchoice
 
 config PQ2ADS
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 68c8b0c9772b..6cd5cd59bf2a 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
 obj-$(CONFIG_CPM2) += pq2.o
 obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
 obj-$(CONFIG_PQ2FADS) += pq2fads.o
+obj-$(CONFIG_EP8248E) += ep8248e.o
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c
new file mode 100644
index 000000000000..ba93d8ae9b0c
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/ep8248e.c
@@ -0,0 +1,324 @@
+/*
+ * Embedded Planet EP8248E support
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/fsl_devices.h>
+#include <linux/mdio-bitbang.h>
+#include <linux/of_platform.h>
+
+#include <asm/io.h>
+#include <asm/cpm2.h>
+#include <asm/udbg.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/mpc8260.h>
+#include <asm/prom.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/cpm2_pic.h>
+
+#include "pq2.h"
+
+static u8 __iomem *ep8248e_bcsr;
+static struct device_node *ep8248e_bcsr_node;
+
+#define BCSR7_SCC2_ENABLE 0x10
+
+#define BCSR8_PHY1_ENABLE 0x80
+#define BCSR8_PHY1_POWER  0x40
+#define BCSR8_PHY2_ENABLE 0x20
+#define BCSR8_PHY2_POWER  0x10
+#define BCSR8_MDIO_READ   0x04
+#define BCSR8_MDIO_CLOCK  0x02
+#define BCSR8_MDIO_DATA   0x01
+
+#define BCSR9_USB_ENABLE  0x80
+#define BCSR9_USB_POWER   0x40
+#define BCSR9_USB_HOST    0x20
+#define BCSR9_USB_FULL_SPEED_TARGET 0x10
+
+static void __init ep8248e_pic_init(void)
+{
+        struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+        if (!np) {
+                printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
+                return;
+        }
+
+        cpm2_pic_init(np);
+        of_node_put(np);
+}
+
+static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
+{
+        if (level)
+                setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
+        else
+                clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
+
+        /* Read back to flush the write. */
+        in_8(&ep8248e_bcsr[8]);
+}
+
+static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
+{
+        if (output)
+                clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
+        else
+                setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
+
+        /* Read back to flush the write. */
+        in_8(&ep8248e_bcsr[8]);
+}
+
+static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data)
+{
+        if (data)
+                setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
+        else
+                clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
+
+        /* Read back to flush the write. */
+        in_8(&ep8248e_bcsr[8]);
+}
+
+static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl)
+{
+        return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
+}
+
+static const struct mdiobb_ops ep8248e_mdio_ops = {
+        .set_mdc = ep8248e_set_mdc,
+        .set_mdio_dir = ep8248e_set_mdio_dir,
+        .set_mdio_data = ep8248e_set_mdio_data,
+        .get_mdio_data = ep8248e_get_mdio_data,
+        .owner = THIS_MODULE,
+};
+
+static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
+        .ops = &ep8248e_mdio_ops,
+};
+
+static int __devinit ep8248e_mdio_probe(struct of_device *ofdev,
+                                        const struct of_device_id *match)
+{
+        struct mii_bus *bus;
+        struct resource res;
+        struct device_node *node;
+        int ret, i;
+
+        node = of_get_parent(ofdev->node);
+        of_node_put(node);
+        if (node != ep8248e_bcsr_node)
+                return -ENODEV;
+
+        ret = of_address_to_resource(ofdev->node, 0, &res);
+        if (ret)
+                return ret;
+
+        bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl);
+        if (!bus)
+                return -ENOMEM;
+
+        bus->phy_mask = 0;
+        bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+
+        for (i = 0; i < PHY_MAX_ADDR; i++)
+                bus->irq[i] = -1;
+
+        bus->name = "ep8248e-mdio-bitbang";
+        bus->dev = &ofdev->dev;
+        bus->id = res.start;
+
+        return mdiobus_register(bus);
+}
+
+static int ep8248e_mdio_remove(struct of_device *ofdev)
+{
+        BUG();
+        return 0;
+}
+
+static const struct of_device_id ep8248e_mdio_match[] = {
+        {
+                .compatible = "fsl,ep8248e-mdio-bitbang",
+        },
+        {},
+};
+
+static struct of_platform_driver ep8248e_mdio_driver = {
+        .driver = {
+                .name = "ep8248e-mdio-bitbang",
+        },
+        .match_table = ep8248e_mdio_match,
+        .probe = ep8248e_mdio_probe,
+        .remove = ep8248e_mdio_remove,
+};
+
+struct cpm_pin {
+        int port, pin, flags;
+};
+
+static __initdata struct cpm_pin ep8248e_pins[] = {
+        /* SMC1 */
+        {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+
+        /* SCC1 */
+        {2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+        /* FCC1 */
+        {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+        {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+        {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+        {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+        {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+        /* FCC2 */
+        {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+        /* I2C */
+        {4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+        {4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+
+        /* USB */
+        {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+};
+
+static void __init init_ioports(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) {
+                const struct cpm_pin *pin = &ep8248e_pins[i];
+                cpm2_set_pin(pin->port, pin->pin, pin->flags);
+        }
+
+        cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
+        cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
+        cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
+        cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); /* USB */
+        cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
+        cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
+        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
+        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
+}
+
+static void __init ep8248e_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("ep8248e_setup_arch()", 0);
+
+        cpm2_reset();
+
+        /* When this is set, snooping CPM DMA from RAM causes
+         * machine checks.  See erratum SIU18.
+         */
+        clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
+
+        ep8248e_bcsr_node =
+                of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr");
+        if (!ep8248e_bcsr_node) {
+                printk(KERN_ERR "No bcsr in device tree\n");
+                return;
+        }
+
+        ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0);
+        if (!ep8248e_bcsr) {
+                printk(KERN_ERR "Cannot map BCSR registers\n");
+                of_node_put(ep8248e_bcsr_node);
+                ep8248e_bcsr_node = NULL;
+                return;
+        }
+
+        setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE);
+        setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
+                                   BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
+
+        init_ioports();
+
+        if (ppc_md.progress)
+                ppc_md.progress("ep8248e_setup_arch(), finish", 0);
+}
+
+static  __initdata struct of_device_id of_bus_ids[] = {
+        { .compatible = "simple-bus", },
+        { .compatible = "fsl,ep8248e-bcsr", },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        of_register_platform_driver(&ep8248e_mdio_driver);
+
+        return 0;
+}
+machine_device_initcall(ep8248e, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init ep8248e_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_is_compatible(root, "fsl,ep8248e");
+}
+
+define_machine(ep8248e)
+{
+        .name = "Embedded Planet EP8248E",
+        .probe = ep8248e_probe,
+        .setup_arch = ep8248e_setup_arch,
+        .init_IRQ = ep8248e_pic_init,
+        .get_irq = cpm2_get_irq,
+        .calibrate_decr = generic_calibrate_decr,
+        .restart = pq2_restart,
+        .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
index 6fb82993967c..4996b7dfdf1d 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
@@ -14,6 +14,7 @@
  */
 
 #include <linux/pci.h>
+#include <linux/of_platform.h>
 
 #include <asm/time.h>
 #include <asm/ipic.h>
@@ -75,6 +76,18 @@ static int __init mpc8313_rdb_probe(void)
         return of_flat_dt_is_compatible(root, "MPC8313ERDB");
 }
 
+static struct of_device_id __initdata of_bus_ids[] = {
+        { .compatible = "simple-bus" },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        return 0;
+}
+machine_device_initcall(mpc8313_rdb, declare_of_platform_devices);
+
 define_machine(mpc8313_rdb) {
         .name                   = "MPC8313 RDB",
         .probe                  = mpc8313_rdb_probe,
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 1e570bb947fc..dbdd4adef645 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -110,15 +110,12 @@ static struct of_device_id mpc832x_ids[] = {
 
 static int __init mpc832x_declare_of_platform_devices(void)
 {
-        if (!machine_is(mpc832x_mds))
-                return 0;
-
         /* Publish the QE devices */
         of_platform_bus_probe(NULL, mpc832x_ids, NULL);
 
         return 0;
 }
-device_initcall(mpc832x_declare_of_platform_devices);
+machine_device_initcall(mpc832x_mds, mpc832x_declare_of_platform_devices);
 
 static void __init mpc832x_sys_init_IRQ(void)
 {
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index ffb2e9361ce3..5fddd2285abb 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -63,9 +63,6 @@ static struct spi_board_info mpc832x_spi_boardinfo = {
 
 static int __init mpc832x_spi_init(void)
 {
-        if (!machine_is(mpc832x_rdb))
-                return 0;
-
         par_io_config_pin(3,  0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
         par_io_config_pin(3,  1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
         par_io_config_pin(3,  2, 3, 0, 1, 0); /* SPI1 CLK,  I/O */
@@ -80,7 +77,7 @@ static int __init mpc832x_spi_init(void)
                             mpc83xx_spi_deactivate_cs);
 }
 
-device_initcall(mpc832x_spi_init);
+machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
 
 /* ************************************************************************
  *
@@ -123,15 +120,12 @@ static struct of_device_id mpc832x_ids[] = {
 
 static int __init mpc832x_declare_of_platform_devices(void)
 {
-        if (!machine_is(mpc832x_rdb))
-                return 0;
-
         /* Publish the QE devices */
         of_platform_bus_probe(NULL, mpc832x_ids, NULL);
 
         return 0;
 }
-device_initcall(mpc832x_declare_of_platform_devices);
+machine_device_initcall(mpc832x_rdb, mpc832x_declare_of_platform_devices);
 
 void __init mpc832x_rdb_init_IRQ(void)
 {
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index aa768199432d..50e8f632061c 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -23,6 +23,7 @@
 #include <linux/delay.h>
 #include <linux/seq_file.h>
 #include <linux/root_dev.h>
+#include <linux/of_platform.h>
 
 #include <asm/system.h>
 #include <asm/atomic.h>
@@ -37,6 +38,17 @@
 
 #include "mpc83xx.h"
 
+static struct of_device_id __initdata mpc834x_itx_ids[] = {
+        { .compatible = "fsl,pq2pro-localbus", },
+        {},
+};
+
+static int __init mpc834x_itx_declare_of_platform_devices(void)
+{
+        return of_platform_bus_probe(NULL, mpc834x_itx_ids, NULL);
+}
+machine_device_initcall(mpc834x_itx, mpc834x_itx_declare_of_platform_devices);
+
 /* ************************************************************************
  *
  * Setup the architecture
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index 459fb7227e76..2b8a0a3f8557 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -115,13 +115,10 @@ static struct of_device_id mpc834x_ids[] = {
 
 static int __init mpc834x_declare_of_platform_devices(void)
 {
-        if (!machine_is(mpc834x_mds))
-                return 0;
-
         of_platform_bus_probe(NULL, mpc834x_ids, NULL);
         return 0;
 }
-device_initcall(mpc834x_declare_of_platform_devices);
+machine_device_initcall(mpc834x_mds, mpc834x_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index 2ac9890b763c..db491ec006e0 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -141,15 +141,12 @@ static struct of_device_id mpc836x_ids[] = {
 
 static int __init mpc836x_declare_of_platform_devices(void)
 {
-        if (!machine_is(mpc836x_mds))
-                return 0;
-
         /* Publish the QE devices */
         of_platform_bus_probe(NULL, mpc836x_ids, NULL);
 
         return 0;
 }
-device_initcall(mpc836x_declare_of_platform_devices);
+machine_device_initcall(mpc836x_mds, mpc836x_declare_of_platform_devices);
 
 static void __init mpc836x_mds_init_IRQ(void)
 {
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 9cdc32b4fa18..8a9c26973605 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -22,6 +22,56 @@
 
 #include "mpc83xx.h"
 
+#define BCSR12_USB_SER_MASK     0x8a
+#define BCSR12_USB_SER_PIN      0x80
+#define BCSR12_USB_SER_DEVICE   0x02
+extern int mpc837x_usb_cfg(void);
+
+static int mpc837xmds_usb_cfg(void)
+{
+        struct device_node *np;
+        const void *phy_type, *mode;
+        void __iomem *bcsr_regs = NULL;
+        u8 bcsr12;
+        int ret;
+
+        ret = mpc837x_usb_cfg();
+        if (ret)
+                return ret;
+        /* Map BCSR area */
+        np = of_find_node_by_name(NULL, "bcsr");
+        if (np) {
+                struct resource res;
+
+                of_address_to_resource(np, 0, &res);
+                bcsr_regs = ioremap(res.start, res.end - res.start + 1);
+                of_node_put(np);
+        }
+        if (!bcsr_regs)
+                return -1;
+
+        np = of_find_node_by_name(NULL, "usb");
+        if (!np)
+                return -ENODEV;
+        phy_type = of_get_property(np, "phy_type", NULL);
+        if (phy_type && !strcmp(phy_type, "ulpi")) {
+                clrbits8(bcsr_regs + 12, BCSR12_USB_SER_PIN);
+        } else if (phy_type && !strcmp(phy_type, "serial")) {
+                mode = of_get_property(np, "dr_mode", NULL);
+                bcsr12 = in_8(bcsr_regs + 12) & ~BCSR12_USB_SER_MASK;
+                bcsr12 |= BCSR12_USB_SER_PIN;
+                if (mode && !strcmp(mode, "peripheral"))
+                        bcsr12 |= BCSR12_USB_SER_DEVICE;
+                out_8(bcsr_regs + 12, bcsr12);
+        } else {
+                printk(KERN_ERR "USB DR: unsupported PHY\n");
+        }
+
+        of_node_put(np);
+        iounmap(bcsr_regs);
+        return 0;
+}
+
 /* ************************************************************************
  *
  * Setup the architecture
@@ -40,6 +90,7 @@ static void __init mpc837x_mds_setup_arch(void)
         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
                 mpc83xx_add_bridge(np);
 #endif
+        mpc837xmds_usb_cfg();
 }
 
 static struct of_device_id mpc837x_ids[] = {
@@ -50,15 +101,12 @@ static struct of_device_id mpc837x_ids[] = {
 
 static int __init mpc837x_declare_of_platform_devices(void)
 {
-        if (!machine_is(mpc837x_mds))
-                return 0;
-
         /* Publish of_device */
         of_platform_bus_probe(NULL, mpc837x_ids, NULL);
 
         return 0;
 }
-device_initcall(mpc837x_declare_of_platform_devices);
+machine_device_initcall(mpc837x_mds, mpc837x_declare_of_platform_devices);
 
 static void __init mpc837x_mds_init_IRQ(void)
 {
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index b778cb4f3fb5..88bb748aff0d 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -14,6 +14,7 @@
 #define MPC83XX_SCCR_USB_DRCM_11   0x00300000
 #define MPC83XX_SCCR_USB_DRCM_01   0x00100000
 #define MPC83XX_SCCR_USB_DRCM_10   0x00200000
+#define MPC837X_SCCR_USB_DRCM_11   0x00c00000
 
 /* system i/o configuration register low */
 #define MPC83XX_SICRL_OFFS         0x114
@@ -22,6 +23,8 @@
 #define MPC834X_SICRL_USB1         0x20000000
 #define MPC831X_SICRL_USB_MASK     0x00000c00
 #define MPC831X_SICRL_USB_ULPI     0x00000800
+#define MPC837X_SICRL_USB_MASK     0xf0000000
+#define MPC837X_SICRL_USB_ULPI     0x50000000
 
 /* system i/o configuration register high */
 #define MPC83XX_SICRH_OFFS         0x118
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index b45160f8d084..6a454a4087c8 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -41,7 +41,7 @@ int mpc834x_usb_cfg(void)
         sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;
         sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;
 
-        np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr");
+        np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
         if (np) {
                 sccr |= MPC83XX_SCCR_USB_DRCM_11;  /* 1:3 */
 
@@ -67,7 +67,7 @@ int mpc834x_usb_cfg(void)
                 port0_is_dr = 1;
                 of_node_put(np);
         }
-        np = of_find_compatible_node(NULL, "usb", "fsl-usb2-mph");
+        np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");
         if (np) {
                 sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */
 
@@ -111,7 +111,7 @@ int mpc831x_usb_cfg(void)
         const void *dr_mode;
 #endif
 
-        np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr");
+        np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
         if (!np)
                 return -ENODEV;
         prop = of_get_property(np, "phy_type", NULL);
@@ -179,3 +179,43 @@ int mpc831x_usb_cfg(void)
         return ret;
 }
 #endif /* CONFIG_PPC_MPC831x */
+
+#ifdef CONFIG_PPC_MPC837x
+int mpc837x_usb_cfg(void)
+{
+        void __iomem *immap;
+        struct device_node *np = NULL;
+        const void *prop;
+        int ret = 0;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
+        if (!np)
+                return -ENODEV;
+        prop = of_get_property(np, "phy_type", NULL);
+
+        if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {
+                printk(KERN_WARNING "837x USB PHY type not supported\n");
+                of_node_put(np);
+                return -EINVAL;
+        }
+
+        /* Map IMMR space for pin and clock settings */
+        immap = ioremap(get_immrbase(), 0x1000);
+        if (!immap) {
+                of_node_put(np);
+                return -ENOMEM;
+        }
+
+        /* Configure clock */
+        clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,
+                        MPC837X_SCCR_USB_DRCM_11);
+
+        /* Configure pin mux for ULPI/serial */
+        clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,
+                        MPC837X_SICRL_USB_ULPI);
+
+        iounmap(immap);
+        of_node_put(np);
+        return ret;
+}
+#endif /* CONFIG_PPC_MPC837x */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index bccdc25f83a2..4e0305096114 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -52,9 +52,9 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 {
         int cascade_irq;
 
-        while ((cascade_irq = cpm2_get_irq()) >= 0) {
+        while ((cascade_irq = cpm2_get_irq()) >= 0)
                 generic_handle_irq(cascade_irq);
-        }
+
         desc->chip->eoi(irq);
 }
 
@@ -70,13 +70,12 @@ static void __init mpc85xx_ads_pic_init(void)
 #endif
 
         np = of_find_node_by_type(np, "open-pic");
-
-        if (np == NULL) {
+        if (!np) {
                 printk(KERN_ERR "Could not find open-pic node\n");
                 return;
         }
 
-        if(of_address_to_resource(np, 0, &r)) {
+        if (of_address_to_resource(np, 0, &r)) {
                 printk(KERN_ERR "Could not map mpic register space\n");
                 of_node_put(np);
                 return;
@@ -100,6 +99,7 @@ static void __init mpc85xx_ads_pic_init(void)
         irq = irq_of_parse_and_map(np, 0);
 
         cpm2_pic_init(np);
+        of_node_put(np);
         set_irq_chained_handler(irq, cpm2_cascade);
 #endif
 }
@@ -112,7 +112,7 @@ struct cpm_pin {
         int port, pin, flags;
 };
 
-static struct cpm_pin mpc8560_ads_pins[] = {
+static const struct cpm_pin mpc8560_ads_pins[] = {
         /* SCC1 */
         {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
@@ -233,13 +233,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
 
 static int __init declare_of_platform_devices(void)
 {
-        if (!machine_is(mpc85xx_ads))
-                return 0;
-
         of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
         return 0;
 }
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 4d063eec6210..8b1de7884be6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -222,9 +222,6 @@ static int mpc85xx_cds_8259_attach(void)
         struct device_node *cascade_node = NULL;
         int cascade_irq;
 
-        if (!machine_is(mpc85xx_cds))
-                return 0;
-
         /* Initialize the i8259 controller */
         for_each_node_by_type(np, "interrupt-controller")
                 if (of_device_is_compatible(np, "chrp,iic")) {
@@ -262,8 +259,7 @@ static int mpc85xx_cds_8259_attach(void)
 
         return 0;
 }
-
-device_initcall(mpc85xx_cds_8259_attach);
+machine_device_initcall(mpc85xx_cds, mpc85xx_cds_8259_attach);
 
 #endif /* CONFIG_PPC_I8259 */
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index e6c63a5b1efb..4fdf5abefffd 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -144,15 +144,12 @@ static struct of_device_id mpc85xx_ids[] = {
 
 static int __init mpc85xx_publish_devices(void)
 {
-        if (!machine_is(mpc85xx_mds))
-                return 0;
-
         /* Publish the QE devices */
-        of_platform_bus_probe(NULL,mpc85xx_ids,NULL);
+        of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
 
         return 0;
 }
-device_initcall(mpc85xx_publish_devices);
+machine_device_initcall(mpc85xx_mds, mpc85xx_publish_devices);
 
 static void __init mpc85xx_mds_pic_init(void)
 {
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index c6d2f48f8f3d..0b07485641fe 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -34,9 +34,24 @@
 
 #include <asm/mpic.h>
 
+#include <linux/of_platform.h>
 #include <sysdev/fsl_pci.h>
 #include <sysdev/fsl_soc.h>
 
+static struct of_device_id __initdata mpc8610_ids[] = {
+        { .compatible = "fsl,mpc8610-immr", },
+        {}
+};
+
+static int __init mpc8610_declare_of_platform_devices(void)
+{
+        /* Without this call, the SSI device driver won't get probed. */
+        of_platform_bus_probe(NULL, mpc8610_ids, NULL);
+
+        return 0;
+}
+machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
+
 void __init
 mpc86xx_hpcd_init_irq(void)
 {
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 14f4e527e7ac..cfbe8c52e263 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -18,6 +18,7 @@
 #include <linux/kdev_t.h>
 #include <linux/delay.h>
 #include <linux/seq_file.h>
+#include <linux/of_platform.h>
 
 #include <asm/system.h>
 #include <asm/time.h>
@@ -212,6 +213,19 @@ mpc86xx_time_init(void)
         return 0;
 }
 
+static __initdata struct of_device_id of_bus_ids[] = {
+        { .compatible = "simple-bus", },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+        return 0;
+}
+machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
+
 define_machine(mpc86xx_hpcn) {
         .name                   = "MPC86xx HPCN",
         .probe                  = mpc86xx_hpcn_probe,
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index 91fbe4241918..7fd224ca233d 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -44,6 +44,15 @@ config PPC_EP88XC
           This board is also resold by Freescale as the QUICCStart
           MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
 
+config PPC_ADDER875
+        bool "Analogue & Micro Adder 875"
+        select CPM1
+        select PPC_CPM_NEW_BINDING
+        select REDBOOT
+        help
+          This enables support for the Analogue & Micro Adder 875
+          board.
+
 endchoice
 
 menu "Freescale Ethernet driver platform-specific options"
diff --git a/arch/powerpc/platforms/8xx/Makefile b/arch/powerpc/platforms/8xx/Makefile
index 8b7098018b59..7b71d9c8fb45 100644
--- a/arch/powerpc/platforms/8xx/Makefile
+++ b/arch/powerpc/platforms/8xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_8xx)	  += m8xx_setup.o
 obj-$(CONFIG_MPC885ADS)   += mpc885ads_setup.o
 obj-$(CONFIG_MPC86XADS)   += mpc86xads_setup.o
 obj-$(CONFIG_PPC_EP88XC)  += ep88xc.o
+obj-$(CONFIG_PPC_ADDER875) += adder875.o
diff --git a/arch/powerpc/platforms/8xx/adder875.c b/arch/powerpc/platforms/8xx/adder875.c
new file mode 100644
index 000000000000..c6bc0783c3b0
--- /dev/null
+++ b/arch/powerpc/platforms/8xx/adder875.c
@@ -0,0 +1,118 @@
+/* Analogue & Micro Adder MPC875 board support
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/fs_enet_pd.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/commproc.h>
+#include <asm/fs_pd.h>
+#include <asm/udbg.h>
+#include <asm/prom.h>
+
+#include <sysdev/commproc.h>
+
+struct cpm_pin {
+        int port, pin, flags;
+};
+
+static __initdata struct cpm_pin adder875_pins[] = {
+        /* SMC1 */
+        {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
+        {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+
+        /* MII1 */
+        {CPM_PORTA, 0, CPM_PIN_INPUT},
+        {CPM_PORTA, 1, CPM_PIN_INPUT},
+        {CPM_PORTA, 2, CPM_PIN_INPUT},
+        {CPM_PORTA, 3, CPM_PIN_INPUT},
+        {CPM_PORTA, 4, CPM_PIN_OUTPUT},
+        {CPM_PORTA, 10, CPM_PIN_OUTPUT},
+        {CPM_PORTA, 11, CPM_PIN_OUTPUT},
+        {CPM_PORTB, 19, CPM_PIN_INPUT},
+        {CPM_PORTB, 31, CPM_PIN_INPUT},
+        {CPM_PORTC, 12, CPM_PIN_INPUT},
+        {CPM_PORTC, 13, CPM_PIN_INPUT},
+        {CPM_PORTE, 30, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 31, CPM_PIN_OUTPUT},
+
+        /* MII2 */
+        {CPM_PORTE, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {CPM_PORTE, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {CPM_PORTE, 16, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {CPM_PORTE, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {CPM_PORTE, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {CPM_PORTE, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+        {CPM_PORTE, 21, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 22, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 23, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 24, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 25, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 26, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 27, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 28, CPM_PIN_OUTPUT},
+        {CPM_PORTE, 29, CPM_PIN_OUTPUT},
+};
+
+static void __init init_ioports(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(adder875_pins); i++) {
+                const struct cpm_pin *pin = &adder875_pins[i];
+                cpm1_set_pin(pin->port, pin->pin, pin->flags);
+        }
+
+        cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
+
+        /* Set FEC1 and FEC2 to MII mode */
+        clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
+}
+
+static void __init adder875_setup(void)
+{
+        cpm_reset();
+        init_ioports();
+}
+
+static int __init adder875_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_is_compatible(root, "analogue-and-micro,adder875");
+}
+
+static __initdata struct of_device_id of_bus_ids[] = {
+        { .compatible = "simple-bus", },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        return 0;
+}
+machine_device_initcall(adder875, declare_of_platform_devices);
+
+define_machine(adder875) {
+        .name = "Adder MPC875",
+        .probe = adder875_probe,
+        .setup_arch = adder875_setup,
+        .init_IRQ = m8xx_pic_init,
+        .get_irq = mpc8xx_get_irq,
+        .restart = mpc8xx_restart,
+        .calibrate_decr = generic_calibrate_decr,
+        .set_rtc_time = mpc8xx_set_rtc_time,
+        .get_rtc_time = mpc8xx_get_rtc_time,
+        .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/8xx/ep88xc.c b/arch/powerpc/platforms/8xx/ep88xc.c
index c518b6cc5fab..88afa353f1d2 100644
--- a/arch/powerpc/platforms/8xx/ep88xc.c
+++ b/arch/powerpc/platforms/8xx/ep88xc.c
@@ -155,12 +155,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
 static int __init declare_of_platform_devices(void)
 {
         /* Publish the QE devices */
-        if (machine_is(ep88xc))
-                of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
 
         return 0;
 }
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(ep88xc, declare_of_platform_devices);
 
 define_machine(ep88xc) {
         .name = "Embedded Planet EP88xC",
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index d2927a434aef..d7965f885209 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -128,12 +128,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
 
 static int __init declare_of_platform_devices(void)
 {
-        if (machine_is(mpc86x_ads))
-                of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
 
         return 0;
 }
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc86x_ads, declare_of_platform_devices);
 
 define_machine(mpc86x_ads) {
         .name                   = "MPC86x ADS",
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 2cf1b6a75173..6ef8e9e6b8c3 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -264,12 +264,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
 static int __init declare_of_platform_devices(void)
 {
         /* Publish the QE devices */
-        if (machine_is(mpc885_ads))
-                of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
 
         return 0;
 }
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc885_ads, declare_of_platform_devices);
 
 define_machine(mpc885_ads) {
         .name                   = "Freescale MPC885 ADS",
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index ea22cad2cd0a..2cec34314d2e 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ config PPC_83xx
         depends on 6xx
         select FSL_SOC
         select 83xx
+        select IPIC
         select WANT_DEVICE_TREE
 
 config PPC_86xx
@@ -80,6 +81,10 @@ config XICS
         bool
         default y
 
+config IPIC
+        bool
+        default n
+
 config MPIC
         bool
         default n
@@ -265,6 +270,7 @@ config TAU_AVERAGE
 config QUICC_ENGINE
         bool
         select PPC_LIB_RHEAP
+        select CRC32
         help
           The QUICC Engine (QE) is a new generation of communications
           coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8924095a7928..6c8083757938 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -9,6 +9,8 @@ config LINKSTATION
         select FSL_SOC
         select PPC_UDBG_16550 if SERIAL_8250
         select DEFAULT_UIMAGE
+        select MPC10X_OPENPIC
+        select MPC10X_BRIDGE
         help
           Select LINKSTATION if configuring for one of PPC- (MPC8241)
           based NAS systems from Buffalo Technology. So far only
@@ -16,6 +18,19 @@ config LINKSTATION
           Linkstation-I HD-HLAN and HD-HGLAN versions, and PPC-based
           Terastation systems should be supported too.
 
+config STORCENTER
+        bool "IOMEGA StorCenter"
+        depends on EMBEDDED6xx
+        select MPIC
+        select FSL_SOC
+        select PPC_UDBG_16550 if SERIAL_8250
+        select WANT_DEVICE_TREE
+        select MPC10X_OPENPIC
+        select MPC10X_BRIDGE
+        help
+          Select STORCENTER if configuring for the iomega StorCenter
+          with an 8241 CPU in it.
+
 config MPC7448HPC2
         bool "Freescale MPC7448HPC2(Taiga)"
         depends on EMBEDDED6xx
@@ -23,6 +38,7 @@ config MPC7448HPC2
         select DEFAULT_UIMAGE
         select PPC_UDBG_16550
         select WANT_DEVICE_TREE
+        select TSI108_BRIDGE
         help
           Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga)
           platform
@@ -33,6 +49,7 @@ config PPC_HOLLY
         select TSI108_BRIDGE
         select PPC_UDBG_16550
         select WANT_DEVICE_TREE
+        select TSI108_BRIDGE
         help
           Select PPC_HOLLY if configuring for an IBM 750GX/CL Eval
           Board with TSI108/9 bridge (Hickory/Holly)
@@ -48,17 +65,13 @@ config PPC_PRPMC2800
 
 config TSI108_BRIDGE
         bool
-        depends on MPC7448HPC2 || PPC_HOLLY
         select PCI
         select MPIC
         select MPIC_WEIRD
-        default y
 
 config MPC10X_BRIDGE
         bool
-        depends on LINKSTATION
         select PPC_INDIRECT_PCI
-        default y
 
 config MV64X60
         bool
@@ -67,8 +80,6 @@ config MV64X60
 
 config MPC10X_OPENPIC
         bool
-        depends on LINKSTATION
-        default y
 
 config MPC10X_STORE_GATHERING
         bool "Enable MPC10x store gathering"
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index 844947cfc5db..06524d3ffd2e 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -3,5 +3,6 @@
 #
 obj-$(CONFIG_MPC7448HPC2)       += mpc7448_hpc2.o
 obj-$(CONFIG_LINKSTATION)       += linkstation.o ls_uart.o
+obj-$(CONFIG_STORCENTER)        += storcenter.o
 obj-$(CONFIG_PPC_HOLLY)         += holly.o
 obj-$(CONFIG_PPC_PRPMC2800)     += prpmc2800.o
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index a2c04b9d42b1..d4f8bf581e3a 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -53,8 +53,6 @@
 
 #define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000
 
-extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
-
 int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
                                 u_char bus, u_char devfn)
 {
diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c
new file mode 100644
index 000000000000..e12e9d298716
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/storcenter.c
@@ -0,0 +1,192 @@
+/*
+ * Board setup routines for the storcenter
+ *
+ * Copyright 2007 (C) Oyvind Repvik (nail@nslu2-linux.org)
+ * Copyright 2007 Andy Wilcox, Jon Loeliger
+ *
+ * Based on linkstation.c by G. Liakhovetski
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of
+ * any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/initrd.h>
+#include <linux/mtd/physmap.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/prom.h>
+#include <asm/mpic.h>
+#include <asm/pci-bridge.h>
+
+#include "mpc10x.h"
+
+
+#ifdef CONFIG_MTD_PHYSMAP
+static struct mtd_partition storcenter_physmap_partitions[] = {
+        {
+                .name   = "kernel",
+                .offset = 0x000000,
+                .size   = 0x170000,
+        },
+        {
+                .name   = "rootfs",
+                .offset = 0x170000,
+                .size   = 0x590000,
+        },
+        {
+                .name   = "uboot",
+                .offset = 0x700000,
+                .size   = 0x040000,
+        },
+        {
+                .name   = "config",
+                .offset = 0x740000,
+                .size   = 0x0c0000,
+        },
+};
+#endif
+
+
+static __initdata struct of_device_id storcenter_of_bus[] = {
+        { .name = "soc", },
+        {},
+};
+
+static int __init storcenter_device_probe(void)
+{
+        of_platform_bus_probe(NULL, storcenter_of_bus, NULL);
+        return 0;
+}
+machine_device_initcall(storcenter, storcenter_device_probe);
+
+
+static int __init storcenter_add_bridge(struct device_node *dev)
+{
+#ifdef CONFIG_PCI
+        int len;
+        struct pci_controller *hose;
+        const int *bus_range;
+
+        printk("Adding PCI host bridge %s\n", dev->full_name);
+
+        hose = pcibios_alloc_controller(dev);
+        if (hose == NULL)
+                return -ENOMEM;
+
+        bus_range = of_get_property(dev, "bus-range", &len);
+        hose->first_busno = bus_range ? bus_range[0] : 0;
+        hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+        setup_indirect_pci(hose, MPC10X_MAPB_CNFG_ADDR, MPC10X_MAPB_CNFG_DATA, 0);
+
+        /* Interpret the "ranges" property */
+        /* This also maps the I/O region and sets isa_io/mem_base */
+        pci_process_bridge_OF_ranges(hose, dev, 1);
+#endif
+
+        return 0;
+}
+
+static void __init storcenter_setup_arch(void)
+{
+        struct device_node *np;
+
+#ifdef CONFIG_MTD_PHYSMAP
+        physmap_set_partitions(storcenter_physmap_partitions,
+                               ARRAY_SIZE(storcenter_physmap_partitions));
+#endif
+
+        /* Lookup PCI host bridges */
+        for_each_compatible_node(np, "pci", "mpc10x-pci")
+                storcenter_add_bridge(np);
+
+        printk(KERN_INFO "IOMEGA StorCenter\n");
+}
+
+/*
+ * Interrupt setup and service.  Interrrupts on the turbostation come
+ * from the four PCI slots plus onboard 8241 devices: I2C, DUART.
+ */
+static void __init storcenter_init_IRQ(void)
+{
+        struct mpic *mpic;
+        struct device_node *dnp;
+        const void *prop;
+        int size;
+        phys_addr_t paddr;
+
+        dnp = of_find_node_by_type(NULL, "open-pic");
+        if (dnp == NULL)
+                return;
+
+        prop = of_get_property(dnp, "reg", &size);
+        if (prop == NULL) {
+                of_node_put(dnp);
+                return;
+        }
+
+        paddr = (phys_addr_t)of_translate_address(dnp, prop);
+        mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
+                        4, 32, " EPIC     ");
+
+        of_node_put(dnp);
+
+        BUG_ON(mpic == NULL);
+
+        /* PCI IRQs */
+        /*
+         * 2.6.12 patch:
+         *         openpic_set_sources(0, 5, OpenPIC_Addr + 0x10200);
+         *         openpic_set_sources(5, 2, OpenPIC_Addr + 0x11120);
+         *         first_irq, num_irqs, __iomem first_ISR
+         *         o_ss: i, src: 0, fdf50200
+         *         o_ss: i, src: 1, fdf50220
+         *         o_ss: i, src: 2, fdf50240
+         *         o_ss: i, src: 3, fdf50260
+         *         o_ss: i, src: 4, fdf50280
+         *         o_ss: i, src: 5, fdf51120
+         *         o_ss: i, src: 6, fdf51140
+         */
+        mpic_assign_isu(mpic, 0, paddr + 0x10200);
+        mpic_assign_isu(mpic, 1, paddr + 0x10220);
+        mpic_assign_isu(mpic, 2, paddr + 0x10240);
+        mpic_assign_isu(mpic, 3, paddr + 0x10260);
+        mpic_assign_isu(mpic, 4, paddr + 0x10280);
+        mpic_assign_isu(mpic, 5, paddr + 0x11120);
+        mpic_assign_isu(mpic, 6, paddr + 0x11140);
+
+        mpic_init(mpic);
+}
+
+static void storcenter_restart(char *cmd)
+{
+        local_irq_disable();
+
+        /* Set exception prefix high - to the firmware */
+        _nmask_and_or_msr(0, MSR_IP);
+
+        /* Wait for reset to happen */
+        for (;;) ;
+}
+
+static int __init storcenter_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "storcenter");
+}
+
+define_machine(storcenter){
+        .name                   = "IOMEGA StorCenter",
+        .probe                  = storcenter_probe,
+        .setup_arch             = storcenter_setup_arch,
+        .init_IRQ               = storcenter_init_IRQ,
+        .get_irq                = mpic_get_irq,
+        .restart                = storcenter_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 9a20ef4f0ea4..f17e7b885f60 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_U3_DART)		+= dart_iommu.o
 obj-$(CONFIG_MMIO_NVRAM)        += mmio_nvram.o
 obj-$(CONFIG_FSL_SOC)           += fsl_soc.o
 obj-$(CONFIG_FSL_PCI)           += fsl_pci.o
+obj-$(CONFIG_RAPIDIO)           += fsl_rio.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
 obj-$(CONFIG_QUICC_ENGINE)      += qe_lib/
 obj-$(CONFIG_PPC_BESTCOMM)      += bestcomm/
@@ -24,7 +25,7 @@ obj-$(CONFIG_AXON_RAM)		+= axonram.o
 ifeq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_PPC_INDIRECT_PCI)  += indirect_pci.o
 obj-$(CONFIG_PPC_I8259)         += i8259.o
-obj-$(CONFIG_PPC_83xx)          += ipic.o
+obj-$(CONFIG_IPIC)              += ipic.o
 obj-$(CONFIG_4xx)               += uic.o
 obj-$(CONFIG_XILINX_VIRTEX)     += xilinx_intc.o
 ifeq ($(CONFIG_PCI),y)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4b1d5120c122..bf13c2174a4e 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -33,8 +33,8 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
         struct ccsr_pci __iomem *pci;
         int i;
 
-        pr_debug("PCI memory map start 0x%x, size 0x%x\n", rsrc->start,
-                        rsrc->end - rsrc->start + 1);
+        pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
+                    (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1);
         pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1);
 
         /* Disable all windows (except powar0 since its ignored) */
@@ -46,17 +46,17 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
         /* Setup outbound MEM window */
         for(i = 0; i < 3; i++)
                 if (hose->mem_resources[i].flags & IORESOURCE_MEM){
-                        pr_debug("PCI MEM resource start 0x%08x, size 0x%08x.\n",
-                                hose->mem_resources[i].start,
-                                hose->mem_resources[i].end
-                                  - hose->mem_resources[i].start + 1);
-                        out_be32(&pci->pow[i+1].potar,
-                                (hose->mem_resources[i].start >> 12)
-                                & 0x000fffff);
+                        resource_size_t pci_addr_start =
+                                 hose->mem_resources[i].start -
+                                 hose->pci_mem_offset;
+                        pr_debug("PCI MEM resource start 0x%016llx, size 0x%016llx.\n",
+                                (u64)hose->mem_resources[i].start,
+                                (u64)hose->mem_resources[i].end
+                                  - (u64)hose->mem_resources[i].start + 1);
+                        out_be32(&pci->pow[i+1].potar, (pci_addr_start >> 12));
                         out_be32(&pci->pow[i+1].potear, 0);
                         out_be32(&pci->pow[i+1].powbar,
-                                (hose->mem_resources[i].start >> 12)
-                                & 0x000fffff);
+                                (hose->mem_resources[i].start >> 12));
                         /* Enable, Mem R/W */
                         out_be32(&pci->pow[i+1].powar, 0x80044000
                                 | (__ilog2(hose->mem_resources[i].end
@@ -65,15 +65,14 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
 
         /* Setup outbound IO window */
         if (hose->io_resource.flags & IORESOURCE_IO){
-                pr_debug("PCI IO resource start 0x%08x, size 0x%08x, phy base 0x%08x.\n",
-                        hose->io_resource.start,
-                        hose->io_resource.end - hose->io_resource.start + 1,
-                        hose->io_base_phys);
-                out_be32(&pci->pow[i+1].potar, (hose->io_resource.start >> 12)
-                                & 0x000fffff);
+                pr_debug("PCI IO resource start 0x%016llx, size 0x%016llx, "
+                         "phy base 0x%016llx.\n",
+                        (u64)hose->io_resource.start,
+                        (u64)hose->io_resource.end - (u64)hose->io_resource.start + 1,
+                        (u64)hose->io_base_phys);
+                out_be32(&pci->pow[i+1].potar, (hose->io_resource.start >> 12));
                 out_be32(&pci->pow[i+1].potear, 0);
-                out_be32(&pci->pow[i+1].powbar, (hose->io_base_phys >> 12)
-                                & 0x000fffff);
+                out_be32(&pci->pow[i+1].powbar, (hose->io_base_phys >> 12));
                 /* Enable, IO R/W */
                 out_be32(&pci->pow[i+1].powar, 0x80088000
                         | (__ilog2(hose->io_resource.end
@@ -107,55 +106,17 @@ void __init setup_pci_cmd(struct pci_controller *hose)
         }
 }
 
-static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
-{
-        struct resource *res;
-        int i, res_idx = PCI_BRIDGE_RESOURCES;
-        struct pci_controller *hose;
+static int fsl_pcie_bus_fixup;
 
+static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
+{
         /* if we aren't a PCIe don't bother */
         if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
                 return ;
 
-        /*
-         * Make the bridge be transparent.
-         */
-        dev->transparent = 1;
-
-        hose = pci_bus_to_host(dev->bus);
-        if (!hose) {
-                printk(KERN_ERR "Can't find hose for bus %d\n",
-                       dev->bus->number);
-                return;
-        }
-
-        /* Clear out any of the virtual P2P bridge registers */
-        pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
-        pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16, 0);
-        pci_write_config_byte(dev, PCI_IO_BASE, 0x10);
-        pci_write_config_byte(dev, PCI_IO_LIMIT, 0);
-        pci_write_config_word(dev, PCI_MEMORY_BASE, 0x10);
-        pci_write_config_word(dev, PCI_MEMORY_LIMIT, 0);
-        pci_write_config_word(dev, PCI_PREF_BASE_UPPER32, 0x0);
-        pci_write_config_word(dev, PCI_PREF_LIMIT_UPPER32, 0x0);
-        pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, 0x10);
-        pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, 0);
-
-        if (hose->io_resource.flags) {
-                res = &dev->resource[res_idx++];
-                res->start = hose->io_resource.start;
-                res->end = hose->io_resource.end;
-                res->flags = hose->io_resource.flags;
-                update_bridge_resource(dev, res);
-        }
-
-        for (i = 0; i < 3; i++) {
-                res = &dev->resource[res_idx + i];
-                res->start = hose->mem_resources[i].start;
-                res->end = hose->mem_resources[i].end;
-                res->flags = hose->mem_resources[i].flags;
-                update_bridge_resource(dev, res);
-        }
+        dev->class = PCI_CLASS_BRIDGE_PCI << 8;
+        fsl_pcie_bus_fixup = 1;
+        return ;
 }
 
 int __init fsl_pcie_check_link(struct pci_controller *hose)
@@ -172,11 +133,24 @@ void fsl_pcibios_fixup_bus(struct pci_bus *bus)
         struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
         int i;
 
-        /* deal with bogus pci_bus when we don't have anything connected on PCIe */
-        if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) {
-                if (bus->parent) {
-                        for (i = 0; i < 4; ++i)
-                                bus->resource[i] = bus->parent->resource[i];
+        if ((bus->parent == hose->bus) &&
+            ((fsl_pcie_bus_fixup &&
+              early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) ||
+             (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK)))
+        {
+                for (i = 0; i < 4; ++i) {
+                        struct resource *res = bus->resource[i];
+                        struct resource *par = bus->parent->resource[i];
+                        if (res) {
+                                res->start = 0;
+                                res->end   = 0;
+                                res->flags = 0;
+                        }
+                        if (res && par) {
+                                res->start = par->start;
+                                res->end   = par->end;
+                                res->flags = par->flags;
+                        }
                 }
         }
 }
@@ -240,23 +214,23 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
         return 0;
 }
 
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8548E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8548, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8543E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8543, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8547E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8545E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8545, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8568E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8568, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8567E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8567, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8533E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8533, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8544E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_transparent);
-DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8548, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8543E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8543, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8547E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8545E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8545, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8568E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8568, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8567E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8567, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8533E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8533, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
diff --git a/arch/ppc/syslib/ppc85xx_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index af2425e4655f..af2425e4655f 100644
--- a/arch/ppc/syslib/ppc85xx_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
diff --git a/arch/ppc/syslib/ppc85xx_rio.h b/arch/powerpc/sysdev/fsl_rio.h
index 6d3ff30b1579..6d3ff30b1579 100644
--- a/arch/ppc/syslib/ppc85xx_rio.h
+++ b/arch/powerpc/sysdev/fsl_rio.h
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 217bcc2e8f86..f2c0988a03b8 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -24,6 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
+#include <linux/phy_fixed.h>
 #include <linux/spi/spi.h>
 #include <linux/fsl_devices.h>
 #include <linux/fs_enet_pd.h>
@@ -54,10 +55,18 @@ phys_addr_t get_immrbase(void)
         soc = of_find_node_by_type(NULL, "soc");
         if (soc) {
                 int size;
-                const void *prop = of_get_property(soc, "reg", &size);
+                u32 naddr;
+                const u32 *prop = of_get_property(soc, "#address-cells", &size);
 
+                if (prop && size == 4)
+                        naddr = *prop;
+                else
+                        naddr = 2;
+
+                prop = of_get_property(soc, "ranges", &size);
                 if (prop)
-                        immrbase = of_translate_address(soc, prop);
+                        immrbase = of_translate_address(soc, prop + naddr);
+
                 of_node_put(soc);
         }
 
@@ -130,6 +139,37 @@ u32 get_baudrate(void)
 EXPORT_SYMBOL(get_baudrate);
 #endif /* CONFIG_CPM2 */
 
+#ifdef CONFIG_FIXED_PHY
+static int __init of_add_fixed_phys(void)
+{
+        int ret;
+        struct device_node *np;
+        u32 *fixed_link;
+        struct fixed_phy_status status = {};
+
+        for_each_node_by_name(np, "ethernet") {
+                fixed_link  = (u32 *)of_get_property(np, "fixed-link", NULL);
+                if (!fixed_link)
+                        continue;
+
+                status.link = 1;
+                status.duplex = fixed_link[1];
+                status.speed = fixed_link[2];
+                status.pause = fixed_link[3];
+                status.asym_pause = fixed_link[4];
+
+                ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
+                if (ret) {
+                        of_node_put(np);
+                        return ret;
+                }
+        }
+
+        return 0;
+}
+arch_initcall(of_add_fixed_phys);
+#endif /* CONFIG_FIXED_PHY */
+
 static int __init gfar_mdio_of_init(void)
 {
         struct device_node *np = NULL;
@@ -198,7 +238,6 @@ static const char *gfar_tx_intr = "tx";
 static const char *gfar_rx_intr = "rx";
 static const char *gfar_err_intr = "error";
 
-
 static int __init gfar_of_init(void)
 {
         struct device_node *np;
@@ -282,29 +321,43 @@ static int __init gfar_of_init(void)
                         gfar_data.interface = PHY_INTERFACE_MODE_MII;
 
                 ph = of_get_property(np, "phy-handle", NULL);
-                phy = of_find_node_by_phandle(*ph);
+                if (ph == NULL) {
+                        u32 *fixed_link;
 
-                if (phy == NULL) {
-                        ret = -ENODEV;
-                        goto unreg;
-                }
+                        fixed_link = (u32 *)of_get_property(np, "fixed-link",
+                                                           NULL);
+                        if (!fixed_link) {
+                                ret = -ENODEV;
+                                goto unreg;
+                        }
 
-                mdio = of_get_parent(phy);
+                        gfar_data.bus_id = 0;
+                        gfar_data.phy_id = fixed_link[0];
+                } else {
+                        phy = of_find_node_by_phandle(*ph);
+
+                        if (phy == NULL) {
+                                ret = -ENODEV;
+                                goto unreg;
+                        }
+
+                        mdio = of_get_parent(phy);
+
+                        id = of_get_property(phy, "reg", NULL);
+                        ret = of_address_to_resource(mdio, 0, &res);
+                        if (ret) {
+                                of_node_put(phy);
+                                of_node_put(mdio);
+                                goto unreg;
+                        }
+
+                        gfar_data.phy_id = *id;
+                        gfar_data.bus_id = res.start;
 
-                id = of_get_property(phy, "reg", NULL);
-                ret = of_address_to_resource(mdio, 0, &res);
-                if (ret) {
                         of_node_put(phy);
                         of_node_put(mdio);
-                        goto unreg;
                 }
 
-                gfar_data.phy_id = *id;
-                gfar_data.bus_id = res.start;
-
-                of_node_put(phy);
-                of_node_put(mdio);
-
                 ret =
                     platform_device_add_data(gfar_dev, &gfar_data,
                                              sizeof(struct
@@ -531,14 +584,12 @@ static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
 static int __init fsl_usb_of_init(void)
 {
         struct device_node *np;
-        unsigned int i;
+        unsigned int i = 0;
         struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
                 *usb_dev_dr_client = NULL;
         int ret;
 
-        for (np = NULL, i = 0;
-             (np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL;
-             i++) {
+        for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
                 struct resource r[2];
                 struct fsl_usb2_platform_data usb_data;
                 const unsigned char *prop = NULL;
@@ -581,11 +632,10 @@ static int __init fsl_usb_of_init(void)
                                                     fsl_usb2_platform_data));
                 if (ret)
                         goto unreg_mph;
+                i++;
         }
 
-        for (np = NULL;
-             (np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL;
-             i++) {
+        for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
                 struct resource r[2];
                 struct fsl_usb2_platform_data usb_data;
                 const unsigned char *prop = NULL;
@@ -657,6 +707,7 @@ static int __init fsl_usb_of_init(void)
                                                 fsl_usb2_platform_data))))
                                 goto unreg_dr;
                 }
+                i++;
         }
         return 0;
 
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 7274750fd9c6..4c016da68426 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -48,6 +48,13 @@ static struct ipic_info ipic_info[] = {
                 .bit    = 17,
                 .prio_mask = 1,
         },
+        [3] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_C,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 18,
+                .prio_mask = 2,
+        },
         [4] = {
                 .mask   = IPIC_SIMSR_H,
                 .prio   = IPIC_SIPRR_C,
@@ -55,6 +62,34 @@ static struct ipic_info ipic_info[] = {
                 .bit    = 19,
                 .prio_mask = 3,
         },
+        [5] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_C,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 20,
+                .prio_mask = 4,
+        },
+        [6] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_C,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 21,
+                .prio_mask = 5,
+        },
+        [7] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_C,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 22,
+                .prio_mask = 6,
+        },
+        [8] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_C,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 23,
+                .prio_mask = 7,
+        },
         [9] = {
                 .mask   = IPIC_SIMSR_H,
                 .prio   = IPIC_SIPRR_D,
@@ -223,6 +258,20 @@ static struct ipic_info ipic_info[] = {
                 .bit    = 7,
                 .prio_mask = 7,
         },
+        [40] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_B,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 8,
+                .prio_mask = 0,
+        },
+        [41] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_B,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 9,
+                .prio_mask = 1,
+        },
         [42] = {
                 .mask   = IPIC_SIMSR_H,
                 .prio   = IPIC_SIPRR_B,
@@ -230,6 +279,13 @@ static struct ipic_info ipic_info[] = {
                 .bit    = 10,
                 .prio_mask = 2,
         },
+        [43] = {
+                .mask   = IPIC_SIMSR_H,
+                .prio   = IPIC_SIPRR_B,
+                .force  = IPIC_SIFCR_H,
+                .bit    = 11,
+                .prio_mask = 3,
+        },
         [44] = {
                 .mask   = IPIC_SIMSR_H,
                 .prio   = IPIC_SIPRR_B,
@@ -387,6 +443,12 @@ static struct ipic_info ipic_info[] = {
                 .force  = IPIC_SIFCR_L,
                 .bit    = 18,
         },
+        [83] = {
+                .mask   = IPIC_SIMSR_L,
+                .prio   = 0,
+                .force  = IPIC_SIFCR_L,
+                .bit    = 19,
+        },
         [84] = {
                 .mask   = IPIC_SIMSR_L,
                 .prio   = 0,
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index f88ff09c4711..0da7069c7c62 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -267,7 +267,7 @@ static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
  */
 
 
-static void _mpic_map_mmio(struct mpic *mpic, unsigned long phys_addr,
+static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,
                            struct mpic_reg_bank *rb, unsigned int offset,
                            unsigned int size)
 {
@@ -287,7 +287,7 @@ static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
         BUG_ON(!DCR_MAP_OK(rb->dhost));
 }
 
-static inline void mpic_map(struct mpic *mpic, unsigned long phys_addr,
+static inline void mpic_map(struct mpic *mpic, phys_addr_t phys_addr,
                             struct mpic_reg_bank *rb, unsigned int offset,
                             unsigned int size)
 {
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig
index f611d344a126..adc66212a419 100644
--- a/arch/powerpc/sysdev/qe_lib/Kconfig
+++ b/arch/powerpc/sysdev/qe_lib/Kconfig
@@ -4,7 +4,7 @@
 
 config UCC_SLOW
         bool
-        default n
+        default y if SERIAL_QE
         help
           This option provides qe_lib support to UCC slow
           protocols: UART, BISYNC, QMC
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 21e01061aca9..3925eae9b0f5 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -25,6 +25,7 @@
 #include <linux/module.h>
 #include <linux/delay.h>
 #include <linux/ioport.h>
+#include <linux/crc32.h>
 #include <asm/irq.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
@@ -394,3 +395,249 @@ void *qe_muram_addr(unsigned long offset)
         return (void *)&qe_immr->muram[offset];
 }
 EXPORT_SYMBOL(qe_muram_addr);
+
+/* The maximum number of RISCs we support */
+#define MAX_QE_RISC     2
+
+/* Firmware information stored here for qe_get_firmware_info() */
+static struct qe_firmware_info qe_firmware_info;
+
+/*
+ * Set to 1 if QE firmware has been uploaded, and therefore
+ * qe_firmware_info contains valid data.
+ */
+static int qe_firmware_uploaded;
+
+/*
+ * Upload a QE microcode
+ *
+ * This function is a worker function for qe_upload_firmware().  It does
+ * the actual uploading of the microcode.
+ */
+static void qe_upload_microcode(const void *base,
+        const struct qe_microcode *ucode)
+{
+        const __be32 *code = base + be32_to_cpu(ucode->code_offset);
+        unsigned int i;
+
+        if (ucode->major || ucode->minor || ucode->revision)
+                printk(KERN_INFO "qe-firmware: "
+                        "uploading microcode '%s' version %u.%u.%u\n",
+                        ucode->id, ucode->major, ucode->minor, ucode->revision);
+        else
+                printk(KERN_INFO "qe-firmware: "
+                        "uploading microcode '%s'\n", ucode->id);
+
+        /* Use auto-increment */
+        out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) |
+                QE_IRAM_IADD_AIE | QE_IRAM_IADD_BADDR);
+
+        for (i = 0; i < be32_to_cpu(ucode->count); i++)
+                out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
+}
+
+/*
+ * Upload a microcode to the I-RAM at a specific address.
+ *
+ * See Documentation/powerpc/qe-firmware.txt for information on QE microcode
+ * uploading.
+ *
+ * Currently, only version 1 is supported, so the 'version' field must be
+ * set to 1.
+ *
+ * The SOC model and revision are not validated, they are only displayed for
+ * informational purposes.
+ *
+ * 'calc_size' is the calculated size, in bytes, of the firmware structure and
+ * all of the microcode structures, minus the CRC.
+ *
+ * 'length' is the size that the structure says it is, including the CRC.
+ */
+int qe_upload_firmware(const struct qe_firmware *firmware)
+{
+        unsigned int i;
+        unsigned int j;
+        u32 crc;
+        size_t calc_size = sizeof(struct qe_firmware);
+        size_t length;
+        const struct qe_header *hdr;
+
+        if (!firmware) {
+                printk(KERN_ERR "qe-firmware: invalid pointer\n");
+                return -EINVAL;
+        }
+
+        hdr = &firmware->header;
+        length = be32_to_cpu(hdr->length);
+
+        /* Check the magic */
+        if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
+            (hdr->magic[2] != 'F')) {
+                printk(KERN_ERR "qe-firmware: not a microcode\n");
+                return -EPERM;
+        }
+
+        /* Check the version */
+        if (hdr->version != 1) {
+                printk(KERN_ERR "qe-firmware: unsupported version\n");
+                return -EPERM;
+        }
+
+        /* Validate some of the fields */
+        if ((firmware->count < 1) || (firmware->count >= MAX_QE_RISC)) {
+                printk(KERN_ERR "qe-firmware: invalid data\n");
+                return -EINVAL;
+        }
+
+        /* Validate the length and check if there's a CRC */
+        calc_size += (firmware->count - 1) * sizeof(struct qe_microcode);
+
+        for (i = 0; i < firmware->count; i++)
+                /*
+                 * For situations where the second RISC uses the same microcode
+                 * as the first, the 'code_offset' and 'count' fields will be
+                 * zero, so it's okay to add those.
+                 */
+                calc_size += sizeof(__be32) *
+                        be32_to_cpu(firmware->microcode[i].count);
+
+        /* Validate the length */
+        if (length != calc_size + sizeof(__be32)) {
+                printk(KERN_ERR "qe-firmware: invalid length\n");
+                return -EPERM;
+        }
+
+        /* Validate the CRC */
+        crc = be32_to_cpu(*(__be32 *)((void *)firmware + calc_size));
+        if (crc != crc32(0, firmware, calc_size)) {
+                printk(KERN_ERR "qe-firmware: firmware CRC is invalid\n");
+                return -EIO;
+        }
+
+        /*
+         * If the microcode calls for it, split the I-RAM.
+         */
+        if (!firmware->split)
+                setbits16(&qe_immr->cp.cercr, QE_CP_CERCR_CIR);
+
+        if (firmware->soc.model)
+                printk(KERN_INFO
+                        "qe-firmware: firmware '%s' for %u V%u.%u\n",
+                        firmware->id, be16_to_cpu(firmware->soc.model),
+                        firmware->soc.major, firmware->soc.minor);
+        else
+                printk(KERN_INFO "qe-firmware: firmware '%s'\n",
+                        firmware->id);
+
+        /*
+         * The QE only supports one microcode per RISC, so clear out all the
+         * saved microcode information and put in the new.
+         */
+        memset(&qe_firmware_info, 0, sizeof(qe_firmware_info));
+        strcpy(qe_firmware_info.id, firmware->id);
+        qe_firmware_info.extended_modes = firmware->extended_modes;
+        memcpy(qe_firmware_info.vtraps, firmware->vtraps,
+                sizeof(firmware->vtraps));
+
+        /* Loop through each microcode. */
+        for (i = 0; i < firmware->count; i++) {
+                const struct qe_microcode *ucode = &firmware->microcode[i];
+
+                /* Upload a microcode if it's present */
+                if (ucode->code_offset)
+                        qe_upload_microcode(firmware, ucode);
+
+                /* Program the traps for this processor */
+                for (j = 0; j < 16; j++) {
+                        u32 trap = be32_to_cpu(ucode->traps[j]);
+
+                        if (trap)
+                                out_be32(&qe_immr->rsp[i].tibcr[j], trap);
+                }
+
+                /* Enable traps */
+                out_be32(&qe_immr->rsp[i].eccr, be32_to_cpu(ucode->eccr));
+        }
+
+        qe_firmware_uploaded = 1;
+
+        return 0;
+}
+EXPORT_SYMBOL(qe_upload_firmware);
+
+/*
+ * Get info on the currently-loaded firmware
+ *
+ * This function also checks the device tree to see if the boot loader has
+ * uploaded a firmware already.
+ */
+struct qe_firmware_info *qe_get_firmware_info(void)
+{
+        static int initialized;
+        struct property *prop;
+        struct device_node *qe;
+        struct device_node *fw = NULL;
+        const char *sprop;
+        unsigned int i;
+
+        /*
+         * If we haven't checked yet, and a driver hasn't uploaded a firmware
+         * yet, then check the device tree for information.
+         */
+        if (initialized || qe_firmware_uploaded)
+                return NULL;
+
+        initialized = 1;
+
+        /*
+         * Newer device trees have an "fsl,qe" compatible property for the QE
+         * node, but we still need to support older device trees.
+        */
+        qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
+        if (!qe) {
+                qe = of_find_node_by_type(NULL, "qe");
+                if (!qe)
+                        return NULL;
+        }
+
+        /* Find the 'firmware' child node */
+        for_each_child_of_node(qe, fw) {
+                if (strcmp(fw->name, "firmware") == 0)
+                        break;
+        }
+
+        of_node_put(qe);
+
+        /* Did we find the 'firmware' node? */
+        if (!fw)
+                return NULL;
+
+        qe_firmware_uploaded = 1;
+
+        /* Copy the data into qe_firmware_info*/
+        sprop = of_get_property(fw, "id", NULL);
+        if (sprop)
+                strncpy(qe_firmware_info.id, sprop,
+                        sizeof(qe_firmware_info.id) - 1);
+
+        prop = of_find_property(fw, "extended-modes", NULL);
+        if (prop && (prop->length == sizeof(u64))) {
+                const u64 *iprop = prop->value;
+
+                qe_firmware_info.extended_modes = *iprop;
+        }
+
+        prop = of_find_property(fw, "virtual-traps", NULL);
+        if (prop && (prop->length == 32)) {
+                const u32 *iprop = prop->value;
+
+                for (i = 0; i < ARRAY_SIZE(qe_firmware_info.vtraps); i++)
+                        qe_firmware_info.vtraps[i] = iprop[i];
+        }
+
+        of_node_put(fw);
+
+        return &qe_firmware_info;
+}
+EXPORT_SYMBOL(qe_get_firmware_info);
+
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
index 0174b3aeef8f..b2870b208ddb 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
@@ -19,6 +19,7 @@
 #include <linux/stddef.h>
 #include <linux/interrupt.h>
 #include <linux/err.h>
+#include <linux/module.h>
 
 #include <asm/io.h>
 #include <asm/immap_qe.h>
@@ -41,6 +42,7 @@ u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
         default: return QE_CR_SUBBLOCK_INVALID;
         }
 }
+EXPORT_SYMBOL(ucc_slow_get_qe_cr_subblock);
 
 void ucc_slow_poll_transmitter_now(struct ucc_slow_private * uccs)
 {
@@ -56,6 +58,7 @@ void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs)
         qe_issue_cmd(QE_GRACEFUL_STOP_TX, id,
                          QE_CR_PROTOCOL_UNSPECIFIED, 0);
 }
+EXPORT_SYMBOL(ucc_slow_graceful_stop_tx);
 
 void ucc_slow_stop_tx(struct ucc_slow_private * uccs)
 {
@@ -65,6 +68,7 @@ void ucc_slow_stop_tx(struct ucc_slow_private * uccs)
         id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num);
         qe_issue_cmd(QE_STOP_TX, id, QE_CR_PROTOCOL_UNSPECIFIED, 0);
 }
+EXPORT_SYMBOL(ucc_slow_stop_tx);
 
 void ucc_slow_restart_tx(struct ucc_slow_private * uccs)
 {
@@ -74,6 +78,7 @@ void ucc_slow_restart_tx(struct ucc_slow_private * uccs)
         id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num);
         qe_issue_cmd(QE_RESTART_TX, id, QE_CR_PROTOCOL_UNSPECIFIED, 0);
 }
+EXPORT_SYMBOL(ucc_slow_restart_tx);
 
 void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode)
 {
@@ -94,6 +99,7 @@ void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode)
         }
         out_be32(&us_regs->gumr_l, gumr_l);
 }
+EXPORT_SYMBOL(ucc_slow_enable);
 
 void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode)
 {
@@ -114,6 +120,7 @@ void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode)
         }
         out_be32(&us_regs->gumr_l, gumr_l);
 }
+EXPORT_SYMBOL(ucc_slow_disable);
 
 /* Initialize the UCC for Slow operations
  *
@@ -347,6 +354,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
         *uccs_ret = uccs;
         return 0;
 }
+EXPORT_SYMBOL(ucc_slow_init);
 
 void ucc_slow_free(struct ucc_slow_private * uccs)
 {
@@ -366,5 +374,5 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
 
         kfree(uccs);
 }
-
+EXPORT_SYMBOL(ucc_slow_free);
 
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index 6b4f022111e7..5da0ca7c302f 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -13,7 +13,6 @@ obj-y				:= entry.o traps.o time.o misc.o \
                                         ppc_htab.o
 obj-$(CONFIG_MODULES)           += ppc_ksyms.o
 obj-$(CONFIG_PCI)               += pci.o
-obj-$(CONFIG_RAPIDIO)           += rio.o
 obj-$(CONFIG_KGDB)              += ppc-stub.o
 obj-$(CONFIG_SMP)               += smp.o smp-tbsync.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
index 674806e001f6..0706dca5a8ea 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
@@ -42,8 +42,6 @@
 
 #include <mm/mmu_decl.h>
 
-#include <syslib/ppc85xx_rio.h>
-
 #include <platforms/85xx/mpc85xx_ads_common.h>
 
 #ifndef CONFIG_PCI
@@ -190,6 +188,7 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_RAPIDIO
+extern void mpc85xx_rio_setup(int law_start, int law_size);
 void platform_rio_init(void)
 {
         /* 512MB RIO LAW at 0xc0000000 */
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
index 731b40eacfdb..8748da3b3e0e 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ b/arch/ppc/platforms/85xx/stx_gp3.c
@@ -54,7 +54,6 @@
 
 #include <syslib/cpm2_pic.h>
 #include <syslib/ppc85xx_common.h>
-#include <syslib/ppc85xx_rio.h>
 
 
 unsigned char __res[sizeof(bd_t)];
@@ -270,6 +269,7 @@ int mpc85xx_exclude_device(u_char bus, u_char devfn)
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_RAPIDIO
+extern void mpc85xx_rio_setup(int law_start, int law_size);
 void
 platform_rio_init(void)
 {
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c
index 4ee2bd156dc5..2a863a83d4c8 100644
--- a/arch/ppc/platforms/85xx/tqm85xx.c
+++ b/arch/ppc/platforms/85xx/tqm85xx.c
@@ -54,7 +54,6 @@
 #include <syslib/ppc85xx_setup.h>
 #include <syslib/cpm2_pic.h>
 #include <syslib/ppc85xx_common.h>
-#include <syslib/ppc85xx_rio.h>
 
 #ifndef CONFIG_PCI
 unsigned long isa_io_base = 0;
@@ -309,6 +308,7 @@ int mpc85xx_exclude_device(u_char bus, u_char devfn)
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_RAPIDIO
+extern void mpc85xx_rio_setup(int law_start, int law_size);
 void platform_rio_init(void)
 {
         /* 512MB RIO LAW at 0xc0000000 */
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 543795be58c8..5e16228f7645 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -93,7 +93,6 @@ obj-$(CONFIG_85xx)		+= open_pic.o ppc85xx_common.o ppc85xx_setup.o \
 ifeq ($(CONFIG_85xx),y)
 obj-$(CONFIG_PCI)               += pci_auto.o
 endif
-obj-$(CONFIG_RAPIDIO)           += ppc85xx_rio.o
 obj-$(CONFIG_83xx)              += ppc83xx_setup.o ppc_sys.o \
                                         mpc83xx_sys.o mpc83xx_devices.o ipic.o
 ifeq ($(CONFIG_83xx),y)
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index c83bd6560088..42d94edeee26 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -1178,8 +1178,15 @@ static int __devinit find_phy(struct device_node *np,
         struct device_node *phynode, *mdionode;
         struct resource res;
         int ret = 0, len;
+        const u32 *data;
+
+        data  = of_get_property(np, "fixed-link", NULL);
+        if (data) {
+                snprintf(fpi->bus_id, 16, PHY_ID_FMT, 0, *data);
+                return 0;
+        }
 
-        const u32 *data = of_get_property(np, "phy-handle", &len);
+        data = of_get_property(np, "phy-handle", &len);
         if (!data || len != 4)
                 return -EINVAL;
 
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 54b2ba996640..7fe03ce774b1 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -61,34 +61,12 @@ config ICPLUS_PHY
           Currently supports the IP175C PHY.
 
 config FIXED_PHY
-        tristate "Drivers for PHY emulation on fixed speed/link"
+        bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
         ---help---
-          Adds the driver to PHY layer to cover the boards that do not have any PHY bound,
-          but with the ability to manipulate the speed/link in software. The relevant MII
-          speed/duplex parameters could be effectively handled in a user-specified function.
-          Currently tested with mpc866ads.
-
-config FIXED_MII_10_FDX
-        bool "Emulation for 10M Fdx fixed PHY behavior"
-        depends on FIXED_PHY
-
-config FIXED_MII_100_FDX
-        bool "Emulation for 100M Fdx fixed PHY behavior"
-        depends on FIXED_PHY
-
-config FIXED_MII_1000_FDX
-        bool "Emulation for 1000M Fdx fixed PHY behavior"
-        depends on FIXED_PHY
-
-config FIXED_MII_AMNT
-        int "Number of emulated PHYs to allocate "
-        depends on FIXED_PHY
-        default "1"
-        ---help---
-        Sometimes it is required to have several independent emulated
-        PHYs on the bus (in case of multi-eth but phy-less HW for instance).
-        This control will have specified number allocated for each fixed
-        PHY type enabled.
+          Adds the platform "fixed" MDIO Bus to cover the boards that use
+          PHYs that are not connected to the real MDIO bus.
+
+          Currently tested with mpc866ads and mpc8349e-mitx.
 
 config MDIO_BITBANG
         tristate "Support for bitbanged MDIO buses"
diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c
index 56191822fa26..73b6d39ef6b0 100644
--- a/drivers/net/phy/fixed.c
+++ b/drivers/net/phy/fixed.c
@@ -1,362 +1,253 @@
 /*
- * drivers/net/phy/fixed.c
+ * Fixed MDIO bus (MDIO bus emulation with fixed PHYs)
  *
- * Driver for fixed PHYs, when transceiver is able to operate in one fixed mode.
+ * Author: Vitaly Bordug <vbordug@ru.mvista.com>
+ *         Anton Vorontsov <avorontsov@ru.mvista.com>
  *
- * Author: Vitaly Bordug
- *
- * Copyright (c) 2006 MontaVista Software, Inc.
+ * Copyright (c) 2006-2007 MontaVista Software, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
- *
  */
+
 #include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mm.h>
 #include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/list.h>
 #include <linux/mii.h>
-#include <linux/ethtool.h>
 #include <linux/phy.h>
 #include <linux/phy_fixed.h>
 
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
+#define MII_REGS_NUM 29
 
-/* we need to track the allocated pointers in order to free them on exit */
-static struct fixed_info *fixed_phy_ptrs[CONFIG_FIXED_MII_AMNT*MAX_PHY_AMNT];
-
-/*-----------------------------------------------------------------------------
- *  If something weird is required to be done with link/speed,
- * network driver is able to assign a function to implement this.
- * May be useful for PHY's that need to be software-driven.
- *-----------------------------------------------------------------------------*/
-int fixed_mdio_set_link_update(struct phy_device *phydev,
-                               int (*link_update) (struct net_device *,
-                                                   struct fixed_phy_status *))
-{
-        struct fixed_info *fixed;
-
-        if (link_update == NULL)
-                return -EINVAL;
-
-        if (phydev) {
-                if (phydev->bus) {
-                        fixed = phydev->bus->priv;
-                        fixed->link_update = link_update;
-                        return 0;
-                }
-        }
-        return -EINVAL;
-}
-
-EXPORT_SYMBOL(fixed_mdio_set_link_update);
+struct fixed_mdio_bus {
+        int irqs[PHY_MAX_ADDR];
+        struct mii_bus mii_bus;
+        struct list_head phys;
+};
 
-struct fixed_info *fixed_mdio_get_phydev (int phydev_ind)
-{
-        if (phydev_ind >= MAX_PHY_AMNT)
-                return NULL;
-        return fixed_phy_ptrs[phydev_ind];
-}
+struct fixed_phy {
+        int id;
+        u16 regs[MII_REGS_NUM];
+        struct phy_device *phydev;
+        struct fixed_phy_status status;
+        int (*link_update)(struct net_device *, struct fixed_phy_status *);
+        struct list_head node;
+};
 
-EXPORT_SYMBOL(fixed_mdio_get_phydev);
+static struct platform_device *pdev;
+static struct fixed_mdio_bus platform_fmb = {
+        .phys = LIST_HEAD_INIT(platform_fmb.phys),
+};
 
-/*-----------------------------------------------------------------------------
- *  This is used for updating internal mii regs from the status
- *-----------------------------------------------------------------------------*/
-#if defined(CONFIG_FIXED_MII_100_FDX) || defined(CONFIG_FIXED_MII_10_FDX) || defined(CONFIG_FIXED_MII_1000_FDX)
-static int fixed_mdio_update_regs(struct fixed_info *fixed)
+static int fixed_phy_update_regs(struct fixed_phy *fp)
 {
-        u16 *regs = fixed->regs;
-        u16 bmsr = 0;
+        u16 bmsr = BMSR_ANEGCAPABLE;
         u16 bmcr = 0;
+        u16 lpagb = 0;
+        u16 lpa = 0;
 
-        if (!regs) {
-                printk(KERN_ERR "%s: regs not set up", __FUNCTION__);
-                return -EINVAL;
-        }
-
-        if (fixed->phy_status.link)
-                bmsr |= BMSR_LSTATUS;
-
-        if (fixed->phy_status.duplex) {
+        if (fp->status.duplex) {
                 bmcr |= BMCR_FULLDPLX;
 
-                switch (fixed->phy_status.speed) {
+                switch (fp->status.speed) {
+                case 1000:
+                        bmsr |= BMSR_ESTATEN;
+                        bmcr |= BMCR_SPEED1000;
+                        lpagb |= LPA_1000FULL;
+                        break;
                 case 100:
                         bmsr |= BMSR_100FULL;
                         bmcr |= BMCR_SPEED100;
+                        lpa |= LPA_100FULL;
                         break;
-
                 case 10:
                         bmsr |= BMSR_10FULL;
+                        lpa |= LPA_10FULL;
                         break;
+                default:
+                        printk(KERN_WARNING "fixed phy: unknown speed\n");
+                        return -EINVAL;
                 }
         } else {
-                switch (fixed->phy_status.speed) {
+                switch (fp->status.speed) {
+                case 1000:
+                        bmsr |= BMSR_ESTATEN;
+                        bmcr |= BMCR_SPEED1000;
+                        lpagb |= LPA_1000HALF;
+                        break;
                 case 100:
                         bmsr |= BMSR_100HALF;
                         bmcr |= BMCR_SPEED100;
+                        lpa |= LPA_100HALF;
                         break;
-
                 case 10:
-                        bmsr |= BMSR_100HALF;
+                        bmsr |= BMSR_10HALF;
+                        lpa |= LPA_10HALF;
                         break;
+                default:
+                        printk(KERN_WARNING "fixed phy: unknown speed\n");
+                        return -EINVAL;
                 }
         }
 
-        regs[MII_BMCR] = bmcr;
-        regs[MII_BMSR] = bmsr | 0x800;  /*we are always capable of 10 hdx */
+        if (fp->status.link)
+                bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
+
+        if (fp->status.pause)
+                lpa |= LPA_PAUSE_CAP;
+
+        if (fp->status.asym_pause)
+                lpa |= LPA_PAUSE_ASYM;
+
+        fp->regs[MII_PHYSID1] = fp->id >> 16;
+        fp->regs[MII_PHYSID2] = fp->id;
+
+        fp->regs[MII_BMSR] = bmsr;
+        fp->regs[MII_BMCR] = bmcr;
+        fp->regs[MII_LPA] = lpa;
+        fp->regs[MII_STAT1000] = lpagb;
 
         return 0;
 }
 
-static int fixed_mii_read(struct mii_bus *bus, int phy_id, int location)
+static int fixed_mdio_read(struct mii_bus *bus, int phy_id, int reg_num)
 {
-        struct fixed_info *fixed = bus->priv;
-
-        /* if user has registered link update callback, use it */
-        if (fixed->phydev)
-                if (fixed->phydev->attached_dev) {
-                        if (fixed->link_update) {
-                                fixed->link_update(fixed->phydev->attached_dev,
-                                                   &fixed->phy_status);
-                                fixed_mdio_update_regs(fixed);
+        struct fixed_mdio_bus *fmb = container_of(bus, struct fixed_mdio_bus,
+                                                  mii_bus);
+        struct fixed_phy *fp;
+
+        if (reg_num >= MII_REGS_NUM)
+                return -1;
+
+        list_for_each_entry(fp, &fmb->phys, node) {
+                if (fp->id == phy_id) {
+                        /* Issue callback if user registered it. */
+                        if (fp->link_update) {
+                                fp->link_update(fp->phydev->attached_dev,
+                                                &fp->status);
+                                fixed_phy_update_regs(fp);
                         }
+                        return fp->regs[reg_num];
                 }
+        }
 
-        if ((unsigned int)location >= fixed->regs_num)
-                return -1;
-        return fixed->regs[location];
+        return 0xFFFF;
 }
 
-static int fixed_mii_write(struct mii_bus *bus, int phy_id, int location,
-                           u16 val)
+static int fixed_mdio_write(struct mii_bus *bus, int phy_id, int reg_num,
+                            u16 val)
 {
-        /* do nothing for now */
         return 0;
 }
 
-static int fixed_mii_reset(struct mii_bus *bus)
+/*
+ * If something weird is required to be done with link/speed,
+ * network driver is able to assign a function to implement this.
+ * May be useful for PHY's that need to be software-driven.
+ */
+int fixed_phy_set_link_update(struct phy_device *phydev,
+                              int (*link_update)(struct net_device *,
+                                                 struct fixed_phy_status *))
 {
-        /*nothing here - no way/need to reset it */
-        return 0;
-}
-#endif
+        struct fixed_mdio_bus *fmb = &platform_fmb;
+        struct fixed_phy *fp;
 
-static int fixed_config_aneg(struct phy_device *phydev)
-{
-        /* :TODO:03/13/2006 09:45:37 PM::
-           The full autoneg funcionality can be emulated,
-           but no need to have anything here for now
-         */
-        return 0;
-}
+        if (!link_update || !phydev || !phydev->bus)
+                return -EINVAL;
 
-/*-----------------------------------------------------------------------------
- * the manual bind will do the magic - with phy_id_mask == 0
- * match will never return true...
- *-----------------------------------------------------------------------------*/
-static struct phy_driver fixed_mdio_driver = {
-        .name = "Fixed PHY",
-#ifdef CONFIG_FIXED_MII_1000_FDX
-        .features = PHY_GBIT_FEATURES,
-#else
-        .features = PHY_BASIC_FEATURES,
-#endif
-        .config_aneg = fixed_config_aneg,
-        .read_status = genphy_read_status,
-        .driver = { .owner = THIS_MODULE, },
-};
+        list_for_each_entry(fp, &fmb->phys, node) {
+                if (fp->id == phydev->phy_id) {
+                        fp->link_update = link_update;
+                        fp->phydev = phydev;
+                        return 0;
+                }
+        }
 
-static void fixed_mdio_release(struct device *dev)
-{
-        struct phy_device *phydev = container_of(dev, struct phy_device, dev);
-        struct mii_bus *bus = phydev->bus;
-        struct fixed_info *fixed = bus->priv;
-
-        kfree(phydev);
-        kfree(bus->dev);
-        kfree(bus);
-        kfree(fixed->regs);
-        kfree(fixed);
+        return -ENOENT;
 }
+EXPORT_SYMBOL_GPL(fixed_phy_set_link_update);
 
-/*-----------------------------------------------------------------------------
- *  This func is used to create all the necessary stuff, bind
- * the fixed phy driver and register all it on the mdio_bus_type.
- * speed is either 10 or 100 or 1000, duplex is boolean.
- * number is used to create multiple fixed PHYs, so that several devices can
- * utilize them simultaneously.
- *
- * The device on mdio bus will look like [bus_id]:[phy_id],
- * bus_id = number
- * phy_id = speed+duplex.
- *-----------------------------------------------------------------------------*/
-#if defined(CONFIG_FIXED_MII_100_FDX) || defined(CONFIG_FIXED_MII_10_FDX) || defined(CONFIG_FIXED_MII_1000_FDX)
-struct fixed_info *fixed_mdio_register_device(
-        int bus_id, int speed, int duplex, u8 phy_id)
+int fixed_phy_add(unsigned int irq, int phy_id,
+                  struct fixed_phy_status *status)
 {
-        struct mii_bus *new_bus;
-        struct fixed_info *fixed;
-        struct phy_device *phydev;
-        int err;
+        int ret;
+        struct fixed_mdio_bus *fmb = &platform_fmb;
+        struct fixed_phy *fp;
 
-        struct device *dev = kzalloc(sizeof(struct device), GFP_KERNEL);
+        fp = kzalloc(sizeof(*fp), GFP_KERNEL);
+        if (!fp)
+                return -ENOMEM;
 
-        if (dev == NULL)
-                goto err_dev_alloc;
+        memset(fp->regs, 0xFF,  sizeof(fp->regs[0]) * MII_REGS_NUM);
 
-        new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
+        fmb->irqs[phy_id] = irq;
 
-        if (new_bus == NULL)
-                goto err_bus_alloc;
+        fp->id = phy_id;
+        fp->status = *status;
 
-        fixed = kzalloc(sizeof(struct fixed_info), GFP_KERNEL);
+        ret = fixed_phy_update_regs(fp);
+        if (ret)
+                goto err_regs;
 
-        if (fixed == NULL)
-                goto err_fixed_alloc;
+        list_add_tail(&fp->node, &fmb->phys);
 
-        fixed->regs = kzalloc(MII_REGS_NUM * sizeof(int), GFP_KERNEL);
-        if (NULL == fixed->regs)
-                goto err_fixed_regs_alloc;
+        return 0;
 
-        fixed->regs_num = MII_REGS_NUM;
-        fixed->phy_status.speed = speed;
-        fixed->phy_status.duplex = duplex;
-        fixed->phy_status.link = 1;
+err_regs:
+        kfree(fp);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(fixed_phy_add);
 
-        new_bus->name = "Fixed MII Bus";
-        new_bus->read = &fixed_mii_read;
-        new_bus->write = &fixed_mii_write;
-        new_bus->reset = &fixed_mii_reset;
-        /*set up workspace */
-        fixed_mdio_update_regs(fixed);
-        new_bus->priv = fixed;
+static int __init fixed_mdio_bus_init(void)
+{
+        struct fixed_mdio_bus *fmb = &platform_fmb;
+        int ret;
 
-        new_bus->dev = dev;
-        dev_set_drvdata(dev, new_bus);
+        pdev = platform_device_register_simple("Fixed MDIO bus", 0, NULL, 0);
+        if (!pdev) {
+                ret = -ENOMEM;
+                goto err_pdev;
+        }
 
-        /* create phy_device and register it on the mdio bus */
-        phydev = phy_device_create(new_bus, 0, 0);
-        if (phydev == NULL)
-                goto err_phy_dev_create;
+        fmb->mii_bus.id = 0;
+        fmb->mii_bus.name = "Fixed MDIO Bus";
+        fmb->mii_bus.dev = &pdev->dev;
+        fmb->mii_bus.read = &fixed_mdio_read;
+        fmb->mii_bus.write = &fixed_mdio_write;
+        fmb->mii_bus.irq = fmb->irqs;
 
-        /*
-         * Put the phydev pointer into the fixed pack so that bus read/write
-         * code could be able to access for instance attached netdev. Well it
-         * doesn't have to do so, only in case of utilizing user-specified
-         * link-update...
-         */
+        ret = mdiobus_register(&fmb->mii_bus);
+        if (ret)
+                goto err_mdiobus_reg;
 
-        fixed->phydev = phydev;
-        phydev->speed = speed;
-        phydev->duplex = duplex;
+        return 0;
 
-        phydev->irq = PHY_IGNORE_INTERRUPT;
-        phydev->dev.bus = &mdio_bus_type;
+err_mdiobus_reg:
+        platform_device_unregister(pdev);
+err_pdev:
+        return ret;
+}
+module_init(fixed_mdio_bus_init);
 
-        snprintf(phydev->dev.bus_id, BUS_ID_SIZE,
-                 PHY_ID_FMT, bus_id, phy_id);
+static void __exit fixed_mdio_bus_exit(void)
+{
+        struct fixed_mdio_bus *fmb = &platform_fmb;
+        struct fixed_phy *fp;
 
-        phydev->bus = new_bus;
+        mdiobus_unregister(&fmb->mii_bus);
+        platform_device_unregister(pdev);
 
-        phydev->dev.driver = &fixed_mdio_driver.driver;
-        phydev->dev.release = fixed_mdio_release;
-        err = phydev->dev.driver->probe(&phydev->dev);
-        if (err < 0) {
-                printk(KERN_ERR "Phy %s: problems with fixed driver\n",
-                       phydev->dev.bus_id);
-                goto err_out;
-        }
-        err = device_register(&phydev->dev);
-        if (err) {
-                printk(KERN_ERR "Phy %s failed to register\n",
-                       phydev->dev.bus_id);
-                goto err_out;
+        list_for_each_entry(fp, &fmb->phys, node) {
+                list_del(&fp->node);
+                kfree(fp);
         }
-        //phydev->state = PHY_RUNNING; /* make phy go up quick, but in 10Mbit/HDX
-        return fixed;
-
-err_out:
-        kfree(phydev);
-err_phy_dev_create:
-        kfree(fixed->regs);
-err_fixed_regs_alloc:
-        kfree(fixed);
-err_fixed_alloc:
-        kfree(new_bus);
-err_bus_alloc:
-        kfree(dev);
-err_dev_alloc:
-
-        return NULL;
-
 }
-#endif
+module_exit(fixed_mdio_bus_exit);
 
-MODULE_DESCRIPTION("Fixed PHY device & driver for PAL");
+MODULE_DESCRIPTION("Fixed MDIO bus (MDIO bus emulation with fixed PHYs)");
 MODULE_AUTHOR("Vitaly Bordug");
 MODULE_LICENSE("GPL");
-
-static int __init fixed_init(void)
-{
-        int cnt = 0;
-        int i;
-/* register on the bus... Not expected to be matched
- * with anything there...
- *
- */
-        phy_driver_register(&fixed_mdio_driver);
-
-/* We will create several mdio devices here, and will bound the upper
- * driver to them.
- *
- * Then the external software can lookup the phy bus by searching
- * for 0:101, to be connected to the virtual 100M Fdx phy.
- *
- * In case several virtual PHYs required, the bus_id will be in form
- * [num]:[duplex]+[speed], which make it able even to define
- * driver-specific link control callback, if for instance PHY is
- * completely SW-driven.
- */
-        for (i=1; i <= CONFIG_FIXED_MII_AMNT; i++) {
-#ifdef CONFIG_FIXED_MII_1000_FDX
-                fixed_phy_ptrs[cnt++] = fixed_mdio_register_device(0, 1000, 1, i);
-#endif
-#ifdef CONFIG_FIXED_MII_100_FDX
-                fixed_phy_ptrs[cnt++] = fixed_mdio_register_device(1, 100, 1, i);
-#endif
-#ifdef CONFIG_FIXED_MII_10_FDX
-                fixed_phy_ptrs[cnt++] = fixed_mdio_register_device(2, 10, 1, i);
-#endif
-        }
-
-        return 0;
-}
-
-static void __exit fixed_exit(void)
-{
-        int i;
-
-        phy_driver_unregister(&fixed_mdio_driver);
-        for (i=0; i < MAX_PHY_AMNT; i++)
-                if ( fixed_phy_ptrs[i] )
-                        device_unregister(&fixed_phy_ptrs[i]->phydev->dev);
-}
-
-module_init(fixed_init);
-module_exit(fixed_exit);
diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
index f644807da2f9..80c5f1ba2e49 100644
--- a/drivers/rapidio/rio.c
+++ b/drivers/rapidio/rio.c
@@ -23,6 +23,7 @@
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/slab.h>
+#include <linux/interrupt.h>
 
 #include "rio.h"
 
@@ -476,8 +477,8 @@ int rio_init_mports(void)
                                         port->iores.end - port->iores.start,
                                         port->name)) {
                         printk(KERN_ERR
-                               "RIO: Error requesting master port region %8.8lx-%8.8lx\n",
-                               port->iores.start, port->iores.end - 1);
+                               "RIO: Error requesting master port region 0x%016llx-0x%016llx\n",
+                               (u64)port->iores.start, (u64)port->iores.end - 1);
                         rc = -ENOMEM;
                         goto out;
                 }
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index d7e1996e2fec..d962b74e3114 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -1284,4 +1284,14 @@ config SERIAL_OF_PLATFORM
           Currently, only 8250 compatible ports are supported, but
           others can easily be added.
 
+config SERIAL_QE
+        tristate "Freescale QUICC Engine serial port support"
+        depends on QUICC_ENGINE
+        select SERIAL_CORE
+        select FW_LOADER
+        default n
+        help
+          This driver supports the QE serial ports on Freescale embedded
+          PowerPC that contain a QUICC Engine.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index af6377d480d7..7eb45534778e 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -64,3 +64,4 @@ obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
 obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
 obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
 obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
+obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index def01582de5c..d9af06a791ba 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -165,9 +165,9 @@ void scc2_lineif(struct uart_cpm_port *pinfo)
          * really has to get out of the driver so boards can
          * be supported in a sane fashion.
          */
+        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
 #ifndef CONFIG_STX_GP3
         volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
 
         io->iop_pparb |= 0x008b0000;
         io->iop_pdirb |= 0x00880000;
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
new file mode 100644
index 000000000000..e0994f061001
--- /dev/null
+++ b/drivers/serial/ucc_uart.c
@@ -0,0 +1,1514 @@
+/*
+ * Freescale QUICC Engine UART device driver
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.  This file is licensed under
+ * the terms of the GNU General Public License version 2.  This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * This driver adds support for UART devices via Freescale's QUICC Engine
+ * found on some Freescale SOCs.
+ *
+ * If Soft-UART support is needed but not already present, then this driver
+ * will request and upload the "Soft-UART" microcode upon probe.  The
+ * filename of the microcode should be fsl_qe_ucode_uart_X_YZ.bin, where "X"
+ * is the name of the SOC (e.g. 8323), and YZ is the revision of the SOC,
+ * (e.g. "11" for 1.1).
+ */
+
+#include <linux/module.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/io.h>
+#include <linux/of_platform.h>
+#include <linux/dma-mapping.h>
+
+#include <linux/fs_uart_pd.h>
+#include <asm/ucc_slow.h>
+
+#include <linux/firmware.h>
+#include <asm/reg.h>
+
+/*
+ * The GUMR flag for Soft UART.  This would normally be defined in qe.h,
+ * but Soft-UART is a hack and we want to keep everything related to it in
+ * this file.
+ */
+#define UCC_SLOW_GUMR_H_SUART           0x00004000      /* Soft-UART */
+
+/*
+ * soft_uart is 1 if we need to use Soft-UART mode
+ */
+static int soft_uart;
+/*
+ * firmware_loaded is 1 if the firmware has been loaded, 0 otherwise.
+ */
+static int firmware_loaded;
+
+/* Enable this macro to configure all serial ports in internal loopback
+   mode */
+/* #define LOOPBACK */
+
+/* The major and minor device numbers are defined in
+ * http://www.lanana.org/docs/device-list/devices-2.6+.txt.  For the QE
+ * UART, we have major number 204 and minor numbers 46 - 49, which are the
+ * same as for the CPM2.  This decision was made because no Freescale part
+ * has both a CPM and a QE.
+ */
+#define SERIAL_QE_MAJOR 204
+#define SERIAL_QE_MINOR 46
+
+/* Since we only have minor numbers 46 - 49, there is a hard limit of 4 ports */
+#define UCC_MAX_UART    4
+
+/* The number of buffer descriptors for receiving characters. */
+#define RX_NUM_FIFO     4
+
+/* The number of buffer descriptors for transmitting characters. */
+#define TX_NUM_FIFO     4
+
+/* The maximum size of the character buffer for a single RX BD. */
+#define RX_BUF_SIZE     32
+
+/* The maximum size of the character buffer for a single TX BD. */
+#define TX_BUF_SIZE     32
+
+/*
+ * The number of jiffies to wait after receiving a close command before the
+ * device is actually closed.  This allows the last few characters to be
+ * sent over the wire.
+ */
+#define UCC_WAIT_CLOSING 100
+
+struct ucc_uart_pram {
+        struct ucc_slow_pram common;
+        u8 res1[8];             /* reserved */
+        __be16 maxidl;          /* Maximum idle chars */
+        __be16 idlc;            /* temp idle counter */
+        __be16 brkcr;           /* Break count register */
+        __be16 parec;           /* receive parity error counter */
+        __be16 frmec;           /* receive framing error counter */
+        __be16 nosec;           /* receive noise counter */
+        __be16 brkec;           /* receive break condition counter */
+        __be16 brkln;           /* last received break length */
+        __be16 uaddr[2];        /* UART address character 1 & 2 */
+        __be16 rtemp;           /* Temp storage */
+        __be16 toseq;           /* Transmit out of sequence char */
+        __be16 cchars[8];       /* control characters 1-8 */
+        __be16 rccm;            /* receive control character mask */
+        __be16 rccr;            /* receive control character register */
+        __be16 rlbc;            /* receive last break character */
+        __be16 res2;            /* reserved */
+        __be32 res3;            /* reserved, should be cleared */
+        u8 res4;                /* reserved, should be cleared */
+        u8 res5[3];             /* reserved, should be cleared */
+        __be32 res6;            /* reserved, should be cleared */
+        __be32 res7;            /* reserved, should be cleared */
+        __be32 res8;            /* reserved, should be cleared */
+        __be32 res9;            /* reserved, should be cleared */
+        __be32 res10;           /* reserved, should be cleared */
+        __be32 res11;           /* reserved, should be cleared */
+        __be32 res12;           /* reserved, should be cleared */
+        __be32 res13;           /* reserved, should be cleared */
+/* The rest is for Soft-UART only */
+        __be16 supsmr;          /* 0x90, Shadow UPSMR */
+        __be16 res92;           /* 0x92, reserved, initialize to 0 */
+        __be32 rx_state;        /* 0x94, RX state, initialize to 0 */
+        __be32 rx_cnt;          /* 0x98, RX count, initialize to 0 */
+        u8 rx_length;           /* 0x9C, Char length, set to 1+CL+PEN+1+SL */
+        u8 rx_bitmark;          /* 0x9D, reserved, initialize to 0 */
+        u8 rx_temp_dlst_qe;     /* 0x9E, reserved, initialize to 0 */
+        u8 res14[0xBC - 0x9F];  /* reserved */
+        __be32 dump_ptr;        /* 0xBC, Dump pointer */
+        __be32 rx_frame_rem;    /* 0xC0, reserved, initialize to 0 */
+        u8 rx_frame_rem_size;   /* 0xC4, reserved, initialize to 0 */
+        u8 tx_mode;             /* 0xC5, mode, 0=AHDLC, 1=UART */
+        __be16 tx_state;        /* 0xC6, TX state */
+        u8 res15[0xD0 - 0xC8];  /* reserved */
+        __be32 resD0;           /* 0xD0, reserved, initialize to 0 */
+        u8 resD4;               /* 0xD4, reserved, initialize to 0 */
+        __be16 resD5;           /* 0xD5, reserved, initialize to 0 */
+} __attribute__ ((packed));
+
+/* SUPSMR definitions, for Soft-UART only */
+#define UCC_UART_SUPSMR_SL              0x8000
+#define UCC_UART_SUPSMR_RPM_MASK        0x6000
+#define UCC_UART_SUPSMR_RPM_ODD         0x0000
+#define UCC_UART_SUPSMR_RPM_LOW         0x2000
+#define UCC_UART_SUPSMR_RPM_EVEN        0x4000
+#define UCC_UART_SUPSMR_RPM_HIGH        0x6000
+#define UCC_UART_SUPSMR_PEN             0x1000
+#define UCC_UART_SUPSMR_TPM_MASK        0x0C00
+#define UCC_UART_SUPSMR_TPM_ODD         0x0000
+#define UCC_UART_SUPSMR_TPM_LOW         0x0400
+#define UCC_UART_SUPSMR_TPM_EVEN        0x0800
+#define UCC_UART_SUPSMR_TPM_HIGH        0x0C00
+#define UCC_UART_SUPSMR_FRZ             0x0100
+#define UCC_UART_SUPSMR_UM_MASK         0x00c0
+#define UCC_UART_SUPSMR_UM_NORMAL       0x0000
+#define UCC_UART_SUPSMR_UM_MAN_MULTI    0x0040
+#define UCC_UART_SUPSMR_UM_AUTO_MULTI   0x00c0
+#define UCC_UART_SUPSMR_CL_MASK         0x0030
+#define UCC_UART_SUPSMR_CL_8            0x0030
+#define UCC_UART_SUPSMR_CL_7            0x0020
+#define UCC_UART_SUPSMR_CL_6            0x0010
+#define UCC_UART_SUPSMR_CL_5            0x0000
+
+#define UCC_UART_TX_STATE_AHDLC         0x00
+#define UCC_UART_TX_STATE_UART          0x01
+#define UCC_UART_TX_STATE_X1            0x00
+#define UCC_UART_TX_STATE_X16           0x80
+
+#define UCC_UART_PRAM_ALIGNMENT 0x100
+
+#define UCC_UART_SIZE_OF_BD     UCC_SLOW_SIZE_OF_BD
+#define NUM_CONTROL_CHARS       8
+
+/* Private per-port data structure */
+struct uart_qe_port {
+        struct uart_port port;
+        struct ucc_slow __iomem *uccp;
+        struct ucc_uart_pram __iomem *uccup;
+        struct ucc_slow_info us_info;
+        struct ucc_slow_private *us_private;
+        struct device_node *np;
+        unsigned int ucc_num;   /* First ucc is 0, not 1 */
+
+        u16 rx_nrfifos;
+        u16 rx_fifosize;
+        u16 tx_nrfifos;
+        u16 tx_fifosize;
+        int wait_closing;
+        u32 flags;
+        struct qe_bd *rx_bd_base;
+        struct qe_bd *rx_cur;
+        struct qe_bd *tx_bd_base;
+        struct qe_bd *tx_cur;
+        unsigned char *tx_buf;
+        unsigned char *rx_buf;
+        void *bd_virt;          /* virtual address of the BD buffers */
+        dma_addr_t bd_dma_addr; /* bus address of the BD buffers */
+        unsigned int bd_size;   /* size of BD buffer space */
+};
+
+static struct uart_driver ucc_uart_driver = {
+        .owner          = THIS_MODULE,
+        .driver_name    = "serial",
+        .dev_name       = "ttyQE",
+        .major          = SERIAL_QE_MAJOR,
+        .minor          = SERIAL_QE_MINOR,
+        .nr             = UCC_MAX_UART,
+};
+
+/*
+ * Virtual to physical address translation.
+ *
+ * Given the virtual address for a character buffer, this function returns
+ * the physical (DMA) equivalent.
+ */
+static inline dma_addr_t cpu2qe_addr(void *addr, struct uart_qe_port *qe_port)
+{
+        if (likely((addr >= qe_port->bd_virt)) &&
+            (addr < (qe_port->bd_virt + qe_port->bd_size)))
+                return qe_port->bd_dma_addr + (addr - qe_port->bd_virt);
+
+        /* something nasty happened */
+        printk(KERN_ERR "%s: addr=%p\n", __FUNCTION__, addr);
+        BUG();
+        return 0;
+}
+
+/*
+ * Physical to virtual address translation.
+ *
+ * Given the physical (DMA) address for a character buffer, this function
+ * returns the virtual equivalent.
+ */
+static inline void *qe2cpu_addr(dma_addr_t addr, struct uart_qe_port *qe_port)
+{
+        /* sanity check */
+        if (likely((addr >= qe_port->bd_dma_addr) &&
+                   (addr < (qe_port->bd_dma_addr + qe_port->bd_size))))
+                return qe_port->bd_virt + (addr - qe_port->bd_dma_addr);
+
+        /* something nasty happened */
+        printk(KERN_ERR "%s: addr=%x\n", __FUNCTION__, addr);
+        BUG();
+        return NULL;
+}
+
+/*
+ * Return 1 if the QE is done transmitting all buffers for this port
+ *
+ * This function scans each BD in sequence.  If we find a BD that is not
+ * ready (READY=1), then we return 0 indicating that the QE is still sending
+ * data.  If we reach the last BD (WRAP=1), then we know we've scanned
+ * the entire list, and all BDs are done.
+ */
+static unsigned int qe_uart_tx_empty(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+        struct qe_bd *bdp = qe_port->tx_bd_base;
+
+        while (1) {
+                if (in_be16(&bdp->status) & BD_SC_READY)
+                        /* This BD is not done, so return "not done" */
+                        return 0;
+
+                if (in_be16(&bdp->status) & BD_SC_WRAP)
+                        /*
+                         * This BD is done and it's the last one, so return
+                         * "done"
+                         */
+                        return 1;
+
+                bdp++;
+        };
+}
+
+/*
+ * Set the modem control lines
+ *
+ * Although the QE can control the modem control lines (e.g. CTS), we
+ * don't need that support. This function must exist, however, otherwise
+ * the kernel will panic.
+ */
+void qe_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+/*
+ * Get the current modem control line status
+ *
+ * Although the QE can control the modem control lines (e.g. CTS), this
+ * driver currently doesn't support that, so we always return Carrier
+ * Detect, Data Set Ready, and Clear To Send.
+ */
+static unsigned int qe_uart_get_mctrl(struct uart_port *port)
+{
+        return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
+}
+
+/*
+ * Disable the transmit interrupt.
+ *
+ * Although this function is called "stop_tx", it does not actually stop
+ * transmission of data.  Instead, it tells the QE to not generate an
+ * interrupt when the UCC is finished sending characters.
+ */
+static void qe_uart_stop_tx(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+
+        clrbits16(&qe_port->uccp->uccm, UCC_UART_UCCE_TX);
+}
+
+/*
+ * Transmit as many characters to the HW as possible.
+ *
+ * This function will attempt to stuff of all the characters from the
+ * kernel's transmit buffer into TX BDs.
+ *
+ * A return value of non-zero indicates that it sucessfully stuffed all
+ * characters from the kernel buffer.
+ *
+ * A return value of zero indicates that there are still characters in the
+ * kernel's buffer that have not been transmitted, but there are no more BDs
+ * available.  This function should be called again after a BD has been made
+ * available.
+ */
+static int qe_uart_tx_pump(struct uart_qe_port *qe_port)
+{
+        struct qe_bd *bdp;
+        unsigned char *p;
+        unsigned int count;
+        struct uart_port *port = &qe_port->port;
+        struct circ_buf *xmit = &port->info->xmit;
+
+        bdp = qe_port->rx_cur;
+
+        /* Handle xon/xoff */
+        if (port->x_char) {
+                /* Pick next descriptor and fill from buffer */
+                bdp = qe_port->tx_cur;
+
+                p = qe2cpu_addr(bdp->buf, qe_port);
+
+                *p++ = port->x_char;
+                out_be16(&bdp->length, 1);
+                setbits16(&bdp->status, BD_SC_READY);
+                /* Get next BD. */
+                if (in_be16(&bdp->status) & BD_SC_WRAP)
+                        bdp = qe_port->tx_bd_base;
+                else
+                        bdp++;
+                qe_port->tx_cur = bdp;
+
+                port->icount.tx++;
+                port->x_char = 0;
+                return 1;
+        }
+
+        if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+                qe_uart_stop_tx(port);
+                return 0;
+        }
+
+        /* Pick next descriptor and fill from buffer */
+        bdp = qe_port->tx_cur;
+
+        while (!(in_be16(&bdp->status) & BD_SC_READY) &&
+               (xmit->tail != xmit->head)) {
+                count = 0;
+                p = qe2cpu_addr(bdp->buf, qe_port);
+                while (count < qe_port->tx_fifosize) {
+                        *p++ = xmit->buf[xmit->tail];
+                        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+                        port->icount.tx++;
+                        count++;
+                        if (xmit->head == xmit->tail)
+                                break;
+                }
+
+                out_be16(&bdp->length, count);
+                setbits16(&bdp->status, BD_SC_READY);
+
+                /* Get next BD. */
+                if (in_be16(&bdp->status) & BD_SC_WRAP)
+                        bdp = qe_port->tx_bd_base;
+                else
+                        bdp++;
+        }
+        qe_port->tx_cur = bdp;
+
+        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+                uart_write_wakeup(port);
+
+        if (uart_circ_empty(xmit)) {
+                /* The kernel buffer is empty, so turn off TX interrupts.  We
+                   don't need to be told when the QE is finished transmitting
+                   the data. */
+                qe_uart_stop_tx(port);
+                return 0;
+        }
+
+        return 1;
+}
+
+/*
+ * Start transmitting data
+ *
+ * This function will start transmitting any available data, if the port
+ * isn't already transmitting data.
+ */
+static void qe_uart_start_tx(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+
+        /* If we currently are transmitting, then just return */
+        if (in_be16(&qe_port->uccp->uccm) & UCC_UART_UCCE_TX)
+                return;
+
+        /* Otherwise, pump the port and start transmission */
+        if (qe_uart_tx_pump(qe_port))
+                setbits16(&qe_port->uccp->uccm, UCC_UART_UCCE_TX);
+}
+
+/*
+ * Stop transmitting data
+ */
+static void qe_uart_stop_rx(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+
+        clrbits16(&qe_port->uccp->uccm, UCC_UART_UCCE_RX);
+}
+
+/*
+ * Enable status change interrupts
+ *
+ * We don't support status change interrupts, but we need to define this
+ * function otherwise the kernel will panic.
+ */
+static void qe_uart_enable_ms(struct uart_port *port)
+{
+}
+
+/* Start or stop sending  break signal
+ *
+ * This function controls the sending of a break signal.  If break_state=1,
+ * then we start sending a break signal.  If break_state=0, then we stop
+ * sending the break signal.
+ */
+static void qe_uart_break_ctl(struct uart_port *port, int break_state)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+
+        if (break_state)
+                ucc_slow_stop_tx(qe_port->us_private);
+        else
+                ucc_slow_restart_tx(qe_port->us_private);
+}
+
+/* ISR helper function for receiving character.
+ *
+ * This function is called by the ISR to handling receiving characters
+ */
+static void qe_uart_int_rx(struct uart_qe_port *qe_port)
+{
+        int i;
+        unsigned char ch, *cp;
+        struct uart_port *port = &qe_port->port;
+        struct tty_struct *tty = port->info->tty;
+        struct qe_bd *bdp;
+        u16 status;
+        unsigned int flg;
+
+        /* Just loop through the closed BDs and copy the characters into
+         * the buffer.
+         */
+        bdp = qe_port->rx_cur;
+        while (1) {
+                status = in_be16(&bdp->status);
+
+                /* If this one is empty, then we assume we've read them all */
+                if (status & BD_SC_EMPTY)
+                        break;
+
+                /* get number of characters, and check space in RX buffer */
+                i = in_be16(&bdp->length);
+
+                /* If we don't have enough room in RX buffer for the entire BD,
+                 * then we try later, which will be the next RX interrupt.
+                 */
+                if (tty_buffer_request_room(tty, i) < i) {
+                        dev_dbg(port->dev, "ucc-uart: no room in RX buffer\n");
+                        return;
+                }
+
+                /* get pointer */
+                cp = qe2cpu_addr(bdp->buf, qe_port);
+
+                /* loop through the buffer */
+                while (i-- > 0) {
+                        ch = *cp++;
+                        port->icount.rx++;
+                        flg = TTY_NORMAL;
+
+                        if (!i && status &
+                            (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
+                                goto handle_error;
+                        if (uart_handle_sysrq_char(port, ch))
+                                continue;
+
+error_return:
+                        tty_insert_flip_char(tty, ch, flg);
+
+                }
+
+                /* This BD is ready to be used again. Clear status. get next */
+                clrsetbits_be16(&bdp->status, BD_SC_BR | BD_SC_FR | BD_SC_PR |
+                        BD_SC_OV | BD_SC_ID, BD_SC_EMPTY);
+                if (in_be16(&bdp->status) & BD_SC_WRAP)
+                        bdp = qe_port->rx_bd_base;
+                else
+                        bdp++;
+
+        }
+
+        /* Write back buffer pointer */
+        qe_port->rx_cur = bdp;
+
+        /* Activate BH processing */
+        tty_flip_buffer_push(tty);
+
+        return;
+
+        /* Error processing */
+
+handle_error:
+        /* Statistics */
+        if (status & BD_SC_BR)
+                port->icount.brk++;
+        if (status & BD_SC_PR)
+                port->icount.parity++;
+        if (status & BD_SC_FR)
+                port->icount.frame++;
+        if (status & BD_SC_OV)
+                port->icount.overrun++;
+
+        /* Mask out ignored conditions */
+        status &= port->read_status_mask;
+
+        /* Handle the remaining ones */
+        if (status & BD_SC_BR)
+                flg = TTY_BREAK;
+        else if (status & BD_SC_PR)
+                flg = TTY_PARITY;
+        else if (status & BD_SC_FR)
+                flg = TTY_FRAME;
+
+        /* Overrun does not affect the current character ! */
+        if (status & BD_SC_OV)
+                tty_insert_flip_char(tty, 0, TTY_OVERRUN);
+#ifdef SUPPORT_SYSRQ
+        port->sysrq = 0;
+#endif
+        goto error_return;
+}
+
+/* Interrupt handler
+ *
+ * This interrupt handler is called after a BD is processed.
+ */
+static irqreturn_t qe_uart_int(int irq, void *data)
+{
+        struct uart_qe_port *qe_port = (struct uart_qe_port *) data;
+        struct ucc_slow __iomem *uccp = qe_port->uccp;
+        u16 events;
+
+        /* Clear the interrupts */
+        events = in_be16(&uccp->ucce);
+        out_be16(&uccp->ucce, events);
+
+        if (events & UCC_UART_UCCE_BRKE)
+                uart_handle_break(&qe_port->port);
+
+        if (events & UCC_UART_UCCE_RX)
+                qe_uart_int_rx(qe_port);
+
+        if (events & UCC_UART_UCCE_TX)
+                qe_uart_tx_pump(qe_port);
+
+        return events ? IRQ_HANDLED : IRQ_NONE;
+}
+
+/* Initialize buffer descriptors
+ *
+ * This function initializes all of the RX and TX buffer descriptors.
+ */
+static void qe_uart_initbd(struct uart_qe_port *qe_port)
+{
+        int i;
+        void *bd_virt;
+        struct qe_bd *bdp;
+
+        /* Set the physical address of the host memory buffers in the buffer
+         * descriptors, and the virtual address for us to work with.
+         */
+        bd_virt = qe_port->bd_virt;
+        bdp = qe_port->rx_bd_base;
+        qe_port->rx_cur = qe_port->rx_bd_base;
+        for (i = 0; i < (qe_port->rx_nrfifos - 1); i++) {
+                out_be16(&bdp->status, BD_SC_EMPTY | BD_SC_INTRPT);
+                out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port));
+                out_be16(&bdp->length, 0);
+                bd_virt += qe_port->rx_fifosize;
+                bdp++;
+        }
+
+        /* */
+        out_be16(&bdp->status, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
+        out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port));
+        out_be16(&bdp->length, 0);
+
+        /* Set the physical address of the host memory
+         * buffers in the buffer descriptors, and the
+         * virtual address for us to work with.
+         */
+        bd_virt = qe_port->bd_virt +
+                L1_CACHE_ALIGN(qe_port->rx_nrfifos * qe_port->rx_fifosize);
+        qe_port->tx_cur = qe_port->tx_bd_base;
+        bdp = qe_port->tx_bd_base;
+        for (i = 0; i < (qe_port->tx_nrfifos - 1); i++) {
+                out_be16(&bdp->status, BD_SC_INTRPT);
+                out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port));
+                out_be16(&bdp->length, 0);
+                bd_virt += qe_port->tx_fifosize;
+                bdp++;
+        }
+
+        /* Loopback requires the preamble bit to be set on the first TX BD */
+#ifdef LOOPBACK
+        setbits16(&qe_port->tx_cur->status, BD_SC_P);
+#endif
+
+        out_be16(&bdp->status, BD_SC_WRAP | BD_SC_INTRPT);
+        out_be32(&bdp->buf, cpu2qe_addr(bd_virt, qe_port));
+        out_be16(&bdp->length, 0);
+}
+
+/*
+ * Initialize a UCC for UART.
+ *
+ * This function configures a given UCC to be used as a UART device. Basic
+ * UCC initialization is handled in qe_uart_request_port().  This function
+ * does all the UART-specific stuff.
+ */
+static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
+{
+        u32 cecr_subblock;
+        struct ucc_slow __iomem *uccp = qe_port->uccp;
+        struct ucc_uart_pram *uccup = qe_port->uccup;
+
+        unsigned int i;
+
+        /* First, disable TX and RX in the UCC */
+        ucc_slow_disable(qe_port->us_private, COMM_DIR_RX_AND_TX);
+
+        /* Program the UCC UART parameter RAM */
+        out_8(&uccup->common.rbmr, UCC_BMR_GBL | UCC_BMR_BO_BE);
+        out_8(&uccup->common.tbmr, UCC_BMR_GBL | UCC_BMR_BO_BE);
+        out_be16(&uccup->common.mrblr, qe_port->rx_fifosize);
+        out_be16(&uccup->maxidl, 0x10);
+        out_be16(&uccup->brkcr, 1);
+        out_be16(&uccup->parec, 0);
+        out_be16(&uccup->frmec, 0);
+        out_be16(&uccup->nosec, 0);
+        out_be16(&uccup->brkec, 0);
+        out_be16(&uccup->uaddr[0], 0);
+        out_be16(&uccup->uaddr[1], 0);
+        out_be16(&uccup->toseq, 0);
+        for (i = 0; i < 8; i++)
+                out_be16(&uccup->cchars[i], 0xC000);
+        out_be16(&uccup->rccm, 0xc0ff);
+
+        /* Configure the GUMR registers for UART */
+        if (soft_uart)
+                /* Soft-UART requires a 1X multiplier for TX */
+                clrsetbits_be32(&uccp->gumr_l,
+                        UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
+                        UCC_SLOW_GUMR_L_RDCR_MASK,
+                        UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_1 |
+                        UCC_SLOW_GUMR_L_RDCR_16);
+        else
+                clrsetbits_be32(&uccp->gumr_l,
+                        UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
+                        UCC_SLOW_GUMR_L_RDCR_MASK,
+                        UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_16 |
+                        UCC_SLOW_GUMR_L_RDCR_16);
+
+        clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW,
+                UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX);
+
+#ifdef LOOPBACK
+        clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK,
+                UCC_SLOW_GUMR_L_DIAG_LOOP);
+        clrsetbits_be32(&uccp->gumr_h,
+                UCC_SLOW_GUMR_H_CTSP | UCC_SLOW_GUMR_H_RSYN,
+                UCC_SLOW_GUMR_H_CDS);
+#endif
+
+        /* Enable rx interrupts  and clear all pending events.  */
+        out_be16(&uccp->uccm, 0);
+        out_be16(&uccp->ucce, 0xffff);
+        out_be16(&uccp->udsr, 0x7e7e);
+
+        /* Initialize UPSMR */
+        out_be16(&uccp->upsmr, 0);
+
+        if (soft_uart) {
+                out_be16(&uccup->supsmr, 0x30);
+                out_be16(&uccup->res92, 0);
+                out_be32(&uccup->rx_state, 0);
+                out_be32(&uccup->rx_cnt, 0);
+                out_8(&uccup->rx_bitmark, 0);
+                out_8(&uccup->rx_length, 10);
+                out_be32(&uccup->dump_ptr, 0x4000);
+                out_8(&uccup->rx_temp_dlst_qe, 0);
+                out_be32(&uccup->rx_frame_rem, 0);
+                out_8(&uccup->rx_frame_rem_size, 0);
+                /* Soft-UART requires TX to be 1X */
+                out_8(&uccup->tx_mode,
+                        UCC_UART_TX_STATE_UART | UCC_UART_TX_STATE_X1);
+                out_be16(&uccup->tx_state, 0);
+                out_8(&uccup->resD4, 0);
+                out_be16(&uccup->resD5, 0);
+
+                /* Set UART mode.
+                 * Enable receive and transmit.
+                 */
+
+                /* From the microcode errata:
+                 * 1.GUMR_L register, set mode=0010 (QMC).
+                 * 2.Set GUMR_H[17] bit. (UART/AHDLC mode).
+                 * 3.Set GUMR_H[19:20] (Transparent mode)
+                 * 4.Clear GUMR_H[26] (RFW)
+                 * ...
+                 * 6.Receiver must use 16x over sampling
+                 */
+                clrsetbits_be32(&uccp->gumr_l,
+                        UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
+                        UCC_SLOW_GUMR_L_RDCR_MASK,
+                        UCC_SLOW_GUMR_L_MODE_QMC | UCC_SLOW_GUMR_L_TDCR_16 |
+                        UCC_SLOW_GUMR_L_RDCR_16);
+
+                clrsetbits_be32(&uccp->gumr_h,
+                        UCC_SLOW_GUMR_H_RFW | UCC_SLOW_GUMR_H_RSYN,
+                        UCC_SLOW_GUMR_H_SUART | UCC_SLOW_GUMR_H_TRX |
+                        UCC_SLOW_GUMR_H_TTX | UCC_SLOW_GUMR_H_TFL);
+
+#ifdef LOOPBACK
+                clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK,
+                                UCC_SLOW_GUMR_L_DIAG_LOOP);
+                clrbits32(&uccp->gumr_h, UCC_SLOW_GUMR_H_CTSP |
+                          UCC_SLOW_GUMR_H_CDS);
+#endif
+
+                cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num);
+                qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock,
+                        QE_CR_PROTOCOL_UNSPECIFIED, 0);
+        }
+}
+
+/*
+ * Initialize the port.
+ */
+static int qe_uart_startup(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+        int ret;
+
+        /*
+         * If we're using Soft-UART mode, then we need to make sure the
+         * firmware has been uploaded first.
+         */
+        if (soft_uart && !firmware_loaded) {
+                dev_err(port->dev, "Soft-UART firmware not uploaded\n");
+                return -ENODEV;
+        }
+
+        qe_uart_initbd(qe_port);
+        qe_uart_init_ucc(qe_port);
+
+        /* Install interrupt handler. */
+        ret = request_irq(port->irq, qe_uart_int, IRQF_SHARED, "ucc-uart",
+                qe_port);
+        if (ret) {
+                dev_err(port->dev, "could not claim IRQ %u\n", port->irq);
+                return ret;
+        }
+
+        /* Startup rx-int */
+        setbits16(&qe_port->uccp->uccm, UCC_UART_UCCE_RX);
+        ucc_slow_enable(qe_port->us_private, COMM_DIR_RX_AND_TX);
+
+        return 0;
+}
+
+/*
+ * Shutdown the port.
+ */
+static void qe_uart_shutdown(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+        struct ucc_slow __iomem *uccp = qe_port->uccp;
+        unsigned int timeout = 20;
+
+        /* Disable RX and TX */
+
+        /* Wait for all the BDs marked sent */
+        while (!qe_uart_tx_empty(port)) {
+                if (!--timeout) {
+                        dev_warn(port->dev, "shutdown timeout\n");
+                        break;
+                }
+                set_current_state(TASK_UNINTERRUPTIBLE);
+                schedule_timeout(2);
+        }
+
+        if (qe_port->wait_closing) {
+                /* Wait a bit longer */
+                set_current_state(TASK_UNINTERRUPTIBLE);
+                schedule_timeout(qe_port->wait_closing);
+        }
+
+        /* Stop uarts */
+        ucc_slow_disable(qe_port->us_private, COMM_DIR_RX_AND_TX);
+        clrbits16(&uccp->uccm, UCC_UART_UCCE_TX | UCC_UART_UCCE_RX);
+
+        /* Shut them really down and reinit buffer descriptors */
+        ucc_slow_graceful_stop_tx(qe_port->us_private);
+        qe_uart_initbd(qe_port);
+
+        free_irq(port->irq, qe_port);
+}
+
+/*
+ * Set the serial port parameters.
+ */
+static void qe_uart_set_termios(struct uart_port *port,
+                                struct ktermios *termios, struct ktermios *old)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+        struct ucc_slow __iomem *uccp = qe_port->uccp;
+        unsigned int baud;
+        unsigned long flags;
+        u16 upsmr = in_be16(&uccp->upsmr);
+        struct ucc_uart_pram __iomem *uccup = qe_port->uccup;
+        u16 supsmr = in_be16(&uccup->supsmr);
+        u8 char_length = 2; /* 1 + CL + PEN + 1 + SL */
+
+        /* Character length programmed into the mode register is the
+         * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
+         * 1 or 2 stop bits, minus 1.
+         * The value 'bits' counts this for us.
+         */
+
+        /* byte size */
+        upsmr &= UCC_UART_UPSMR_CL_MASK;
+        supsmr &= UCC_UART_SUPSMR_CL_MASK;
+
+        switch (termios->c_cflag & CSIZE) {
+        case CS5:
+                upsmr |= UCC_UART_UPSMR_CL_5;
+                supsmr |= UCC_UART_SUPSMR_CL_5;
+                char_length += 5;
+                break;
+        case CS6:
+                upsmr |= UCC_UART_UPSMR_CL_6;
+                supsmr |= UCC_UART_SUPSMR_CL_6;
+                char_length += 6;
+                break;
+        case CS7:
+                upsmr |= UCC_UART_UPSMR_CL_7;
+                supsmr |= UCC_UART_SUPSMR_CL_7;
+                char_length += 7;
+                break;
+        default:        /* case CS8 */
+                upsmr |= UCC_UART_UPSMR_CL_8;
+                supsmr |= UCC_UART_SUPSMR_CL_8;
+                char_length += 8;
+                break;
+        }
+
+        /* If CSTOPB is set, we want two stop bits */
+        if (termios->c_cflag & CSTOPB) {
+                upsmr |= UCC_UART_UPSMR_SL;
+                supsmr |= UCC_UART_SUPSMR_SL;
+                char_length++;  /* + SL */
+        }
+
+        if (termios->c_cflag & PARENB) {
+                upsmr |= UCC_UART_UPSMR_PEN;
+                supsmr |= UCC_UART_SUPSMR_PEN;
+                char_length++;  /* + PEN */
+
+                if (!(termios->c_cflag & PARODD)) {
+                        upsmr &= ~(UCC_UART_UPSMR_RPM_MASK |
+                                   UCC_UART_UPSMR_TPM_MASK);
+                        upsmr |= UCC_UART_UPSMR_RPM_EVEN |
+                                UCC_UART_UPSMR_TPM_EVEN;
+                        supsmr &= ~(UCC_UART_SUPSMR_RPM_MASK |
+                                    UCC_UART_SUPSMR_TPM_MASK);
+                        supsmr |= UCC_UART_SUPSMR_RPM_EVEN |
+                                UCC_UART_SUPSMR_TPM_EVEN;
+                }
+        }
+
+        /*
+         * Set up parity check flag
+         */
+        port->read_status_mask = BD_SC_EMPTY | BD_SC_OV;
+        if (termios->c_iflag & INPCK)
+                port->read_status_mask |= BD_SC_FR | BD_SC_PR;
+        if (termios->c_iflag & (BRKINT | PARMRK))
+                port->read_status_mask |= BD_SC_BR;
+
+        /*
+         * Characters to ignore
+         */
+        port->ignore_status_mask = 0;
+        if (termios->c_iflag & IGNPAR)
+                port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
+        if (termios->c_iflag & IGNBRK) {
+                port->ignore_status_mask |= BD_SC_BR;
+                /*
+                 * If we're ignore parity and break indicators, ignore
+                 * overruns too.  (For real raw support).
+                 */
+                if (termios->c_iflag & IGNPAR)
+                        port->ignore_status_mask |= BD_SC_OV;
+        }
+        /*
+         * !!! ignore all characters if CREAD is not set
+         */
+        if ((termios->c_cflag & CREAD) == 0)
+                port->read_status_mask &= ~BD_SC_EMPTY;
+
+        baud = uart_get_baud_rate(port, termios, old, 0, 115200);
+
+        /* Do we really need a spinlock here? */
+        spin_lock_irqsave(&port->lock, flags);
+
+        out_be16(&uccp->upsmr, upsmr);
+        if (soft_uart) {
+                out_be16(&uccup->supsmr, supsmr);
+                out_8(&uccup->rx_length, char_length);
+
+                /* Soft-UART requires a 1X multiplier for TX */
+                qe_setbrg(qe_port->us_info.rx_clock, baud, 16);
+                qe_setbrg(qe_port->us_info.tx_clock, baud, 1);
+        } else {
+                qe_setbrg(qe_port->us_info.rx_clock, baud, 16);
+                qe_setbrg(qe_port->us_info.tx_clock, baud, 16);
+        }
+
+        spin_unlock_irqrestore(&port->lock, flags);
+}
+
+/*
+ * Return a pointer to a string that describes what kind of port this is.
+ */
+static const char *qe_uart_type(struct uart_port *port)
+{
+        return "QE";
+}
+
+/*
+ * Allocate any memory and I/O resources required by the port.
+ */
+static int qe_uart_request_port(struct uart_port *port)
+{
+        int ret;
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+        struct ucc_slow_info *us_info = &qe_port->us_info;
+        struct ucc_slow_private *uccs;
+        unsigned int rx_size, tx_size;
+        void *bd_virt;
+        dma_addr_t bd_dma_addr = 0;
+
+        ret = ucc_slow_init(us_info, &uccs);
+        if (ret) {
+                dev_err(port->dev, "could not initialize UCC%u\n",
+                       qe_port->ucc_num);
+                return ret;
+        }
+
+        qe_port->us_private = uccs;
+        qe_port->uccp = uccs->us_regs;
+        qe_port->uccup = (struct ucc_uart_pram *) uccs->us_pram;
+        qe_port->rx_bd_base = uccs->rx_bd;
+        qe_port->tx_bd_base = uccs->tx_bd;
+
+        /*
+         * Allocate the transmit and receive data buffers.
+         */
+
+        rx_size = L1_CACHE_ALIGN(qe_port->rx_nrfifos * qe_port->rx_fifosize);
+        tx_size = L1_CACHE_ALIGN(qe_port->tx_nrfifos * qe_port->tx_fifosize);
+
+        bd_virt = dma_alloc_coherent(NULL, rx_size + tx_size, &bd_dma_addr,
+                GFP_KERNEL);
+        if (!bd_virt) {
+                dev_err(port->dev, "could not allocate buffer descriptors\n");
+                return -ENOMEM;
+        }
+
+        qe_port->bd_virt = bd_virt;
+        qe_port->bd_dma_addr = bd_dma_addr;
+        qe_port->bd_size = rx_size + tx_size;
+
+        qe_port->rx_buf = bd_virt;
+        qe_port->tx_buf = qe_port->rx_buf + rx_size;
+
+        return 0;
+}
+
+/*
+ * Configure the port.
+ *
+ * We say we're a CPM-type port because that's mostly true.  Once the device
+ * is configured, this driver operates almost identically to the CPM serial
+ * driver.
+ */
+static void qe_uart_config_port(struct uart_port *port, int flags)
+{
+        if (flags & UART_CONFIG_TYPE) {
+                port->type = PORT_CPM;
+                qe_uart_request_port(port);
+        }
+}
+
+/*
+ * Release any memory and I/O resources that were allocated in
+ * qe_uart_request_port().
+ */
+static void qe_uart_release_port(struct uart_port *port)
+{
+        struct uart_qe_port *qe_port =
+                container_of(port, struct uart_qe_port, port);
+        struct ucc_slow_private *uccs = qe_port->us_private;
+
+        dma_free_coherent(NULL, qe_port->bd_size, qe_port->bd_virt,
+                          qe_port->bd_dma_addr);
+
+        ucc_slow_free(uccs);
+}
+
+/*
+ * Verify that the data in serial_struct is suitable for this device.
+ */
+static int qe_uart_verify_port(struct uart_port *port,
+                               struct serial_struct *ser)
+{
+        if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
+                return -EINVAL;
+
+        if (ser->irq < 0 || ser->irq >= NR_IRQS)
+                return -EINVAL;
+
+        if (ser->baud_base < 9600)
+                return -EINVAL;
+
+        return 0;
+}
+/* UART operations
+ *
+ * Details on these functions can be found in Documentation/serial/driver
+ */
+static struct uart_ops qe_uart_pops = {
+        .tx_empty       = qe_uart_tx_empty,
+        .set_mctrl      = qe_uart_set_mctrl,
+        .get_mctrl      = qe_uart_get_mctrl,
+        .stop_tx        = qe_uart_stop_tx,
+        .start_tx       = qe_uart_start_tx,
+        .stop_rx        = qe_uart_stop_rx,
+        .enable_ms      = qe_uart_enable_ms,
+        .break_ctl      = qe_uart_break_ctl,
+        .startup        = qe_uart_startup,
+        .shutdown       = qe_uart_shutdown,
+        .set_termios    = qe_uart_set_termios,
+        .type           = qe_uart_type,
+        .release_port   = qe_uart_release_port,
+        .request_port   = qe_uart_request_port,
+        .config_port    = qe_uart_config_port,
+        .verify_port    = qe_uart_verify_port,
+};
+
+/*
+ * Obtain the SOC model number and revision level
+ *
+ * This function parses the device tree to obtain the SOC model.  It then
+ * reads the SVR register to the revision.
+ *
+ * The device tree stores the SOC model two different ways.
+ *
+ * The new way is:
+ *
+ *              cpu@0 {
+ *                      compatible = "PowerPC,8323";
+ *                      device_type = "cpu";
+ *                      ...
+ *
+ *
+ * The old way is:
+ *               PowerPC,8323@0 {
+ *                      device_type = "cpu";
+ *                      ...
+ *
+ * This code first checks the new way, and then the old way.
+ */
+static unsigned int soc_info(unsigned int *rev_h, unsigned int *rev_l)
+{
+        struct device_node *np;
+        const char *soc_string;
+        unsigned int svr;
+        unsigned int soc;
+
+        /* Find the CPU node */
+        np = of_find_node_by_type(NULL, "cpu");
+        if (!np)
+                return 0;
+        /* Find the compatible property */
+        soc_string = of_get_property(np, "compatible", NULL);
+        if (!soc_string)
+                /* No compatible property, so try the name. */
+                soc_string = np->name;
+
+        /* Extract the SOC number from the "PowerPC," string */
+        if ((sscanf(soc_string, "PowerPC,%u", &soc) != 1) || !soc)
+                return 0;
+
+        /* Get the revision from the SVR */
+        svr = mfspr(SPRN_SVR);
+        *rev_h = (svr >> 4) & 0xf;
+        *rev_l = svr & 0xf;
+
+        return soc;
+}
+
+/*
+ * requst_firmware_nowait() callback function
+ *
+ * This function is called by the kernel when a firmware is made available,
+ * or if it times out waiting for the firmware.
+ */
+static void uart_firmware_cont(const struct firmware *fw, void *context)
+{
+        struct qe_firmware *firmware;
+        struct device *dev = context;
+        int ret;
+
+        if (!fw) {
+                dev_err(dev, "firmware not found\n");
+                return;
+        }
+
+        firmware = (struct qe_firmware *) fw->data;
+
+        if (firmware->header.length != fw->size) {
+                dev_err(dev, "invalid firmware\n");
+                return;
+        }
+
+        ret = qe_upload_firmware(firmware);
+        if (ret) {
+                dev_err(dev, "could not load firmware\n");
+                return;
+        }
+
+        firmware_loaded = 1;
+}
+
+static int ucc_uart_probe(struct of_device *ofdev,
+        const struct of_device_id *match)
+{
+        struct device_node *np = ofdev->node;
+        const unsigned int *iprop;      /* Integer OF properties */
+        const char *sprop;      /* String OF properties */
+        struct uart_qe_port *qe_port = NULL;
+        struct resource res;
+        int ret;
+
+        /*
+         * Determine if we need Soft-UART mode
+         */
+        if (of_find_property(np, "soft-uart", NULL)) {
+                dev_dbg(&ofdev->dev, "using Soft-UART mode\n");
+                soft_uart = 1;
+        }
+
+        /*
+         * If we are using Soft-UART, determine if we need to upload the
+         * firmware, too.
+         */
+        if (soft_uart) {
+                struct qe_firmware_info *qe_fw_info;
+
+                qe_fw_info = qe_get_firmware_info();
+
+                /* Check if the firmware has been uploaded. */
+                if (qe_fw_info && strstr(qe_fw_info->id, "Soft-UART")) {
+                        firmware_loaded = 1;
+                } else {
+                        char filename[32];
+                        unsigned int soc;
+                        unsigned int rev_h;
+                        unsigned int rev_l;
+
+                        soc = soc_info(&rev_h, &rev_l);
+                        if (!soc) {
+                                dev_err(&ofdev->dev, "unknown CPU model\n");
+                                return -ENXIO;
+                        }
+                        sprintf(filename, "fsl_qe_ucode_uart_%u_%u%u.bin",
+                                soc, rev_h, rev_l);
+
+                        dev_info(&ofdev->dev, "waiting for firmware %s\n",
+                                filename);
+
+                        /*
+                         * We call request_firmware_nowait instead of
+                         * request_firmware so that the driver can load and
+                         * initialize the ports without holding up the rest of
+                         * the kernel.  If hotplug support is enabled in the
+                         * kernel, then we use it.
+                         */
+                        ret = request_firmware_nowait(THIS_MODULE,
+                                FW_ACTION_HOTPLUG, filename, &ofdev->dev,
+                                &ofdev->dev, uart_firmware_cont);
+                        if (ret) {
+                                dev_err(&ofdev->dev,
+                                        "could not load firmware %s\n",
+                                        filename);
+                                return ret;
+                        }
+                }
+        }
+
+        qe_port = kzalloc(sizeof(struct uart_qe_port), GFP_KERNEL);
+        if (!qe_port) {
+                dev_err(&ofdev->dev, "can't allocate QE port structure\n");
+                return -ENOMEM;
+        }
+
+        /* Search for IRQ and mapbase */
+        ret = of_address_to_resource(np, 0, &res);
+        if (ret) {
+                dev_err(&ofdev->dev, "missing 'reg' property in device tree\n");
+                kfree(qe_port);
+                return ret;
+        }
+        if (!res.start) {
+                dev_err(&ofdev->dev, "invalid 'reg' property in device tree\n");
+                kfree(qe_port);
+                return -EINVAL;
+        }
+        qe_port->port.mapbase = res.start;
+
+        /* Get the UCC number (device ID) */
+        /* UCCs are numbered 1-7 */
+        iprop = of_get_property(np, "device-id", NULL);
+        if (!iprop || (*iprop < 1) || (*iprop > UCC_MAX_NUM)) {
+                dev_err(&ofdev->dev,
+                        "missing or invalid UCC specified in device tree\n");
+                kfree(qe_port);
+                return -ENODEV;
+        }
+        qe_port->ucc_num = *iprop - 1;
+
+        /*
+         * In the future, we should not require the BRG to be specified in the
+         * device tree.  If no clock-source is specified, then just pick a BRG
+         * to use.  This requires a new QE library function that manages BRG
+         * assignments.
+         */
+
+        sprop = of_get_property(np, "rx-clock-name", NULL);
+        if (!sprop) {
+                dev_err(&ofdev->dev, "missing rx-clock-name in device tree\n");
+                kfree(qe_port);
+                return -ENODEV;
+        }
+
+        qe_port->us_info.rx_clock = qe_clock_source(sprop);
+        if ((qe_port->us_info.rx_clock < QE_BRG1) ||
+            (qe_port->us_info.rx_clock > QE_BRG16)) {
+                dev_err(&ofdev->dev, "rx-clock-name must be a BRG for UART\n");
+                kfree(qe_port);
+                return -ENODEV;
+        }
+
+#ifdef LOOPBACK
+        /* In internal loopback mode, TX and RX must use the same clock */
+        qe_port->us_info.tx_clock = qe_port->us_info.rx_clock;
+#else
+        sprop = of_get_property(np, "tx-clock-name", NULL);
+        if (!sprop) {
+                dev_err(&ofdev->dev, "missing tx-clock-name in device tree\n");
+                kfree(qe_port);
+                return -ENODEV;
+        }
+        qe_port->us_info.tx_clock = qe_clock_source(sprop);
+#endif
+        if ((qe_port->us_info.tx_clock < QE_BRG1) ||
+            (qe_port->us_info.tx_clock > QE_BRG16)) {
+                dev_err(&ofdev->dev, "tx-clock-name must be a BRG for UART\n");
+                kfree(qe_port);
+                return -ENODEV;
+        }
+
+        /* Get the port number, numbered 0-3 */
+        iprop = of_get_property(np, "port-number", NULL);
+        if (!iprop) {
+                dev_err(&ofdev->dev, "missing port-number in device tree\n");
+                kfree(qe_port);
+                return -EINVAL;
+        }
+        qe_port->port.line = *iprop;
+        if (qe_port->port.line >= UCC_MAX_UART) {
+                dev_err(&ofdev->dev, "port-number must be 0-%u\n",
+                        UCC_MAX_UART - 1);
+                kfree(qe_port);
+                return -EINVAL;
+        }
+
+        qe_port->port.irq = irq_of_parse_and_map(np, 0);
+        if (qe_port->port.irq == NO_IRQ) {
+                dev_err(&ofdev->dev, "could not map IRQ for UCC%u\n",
+                       qe_port->ucc_num + 1);
+                kfree(qe_port);
+                return -EINVAL;
+        }
+
+        /*
+         * Newer device trees have an "fsl,qe" compatible property for the QE
+         * node, but we still need to support older device trees.
+         */
+        np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+        if (!np) {
+                np = of_find_node_by_type(NULL, "qe");
+                if (!np) {
+                        dev_err(&ofdev->dev, "could not find 'qe' node\n");
+                        kfree(qe_port);
+                        return -EINVAL;
+                }
+        }
+
+        iprop = of_get_property(np, "brg-frequency", NULL);
+        if (!iprop) {
+                dev_err(&ofdev->dev,
+                       "missing brg-frequency in device tree\n");
+                kfree(qe_port);
+                return -EINVAL;
+        }
+
+        if (*iprop)
+                qe_port->port.uartclk = *iprop;
+        else {
+                /*
+                 * Older versions of U-Boot do not initialize the brg-frequency
+                 * property, so in this case we assume the BRG frequency is
+                 * half the QE bus frequency.
+                 */
+                iprop = of_get_property(np, "bus-frequency", NULL);
+                if (!iprop) {
+                        dev_err(&ofdev->dev,
+                                "missing QE bus-frequency in device tree\n");
+                        kfree(qe_port);
+                        return -EINVAL;
+                }
+                if (*iprop)
+                        qe_port->port.uartclk = *iprop / 2;
+                else {
+                        dev_err(&ofdev->dev,
+                                "invalid QE bus-frequency in device tree\n");
+                        kfree(qe_port);
+                        return -EINVAL;
+                }
+        }
+
+        spin_lock_init(&qe_port->port.lock);
+        qe_port->np = np;
+        qe_port->port.dev = &ofdev->dev;
+        qe_port->port.ops = &qe_uart_pops;
+        qe_port->port.iotype = UPIO_MEM;
+
+        qe_port->tx_nrfifos = TX_NUM_FIFO;
+        qe_port->tx_fifosize = TX_BUF_SIZE;
+        qe_port->rx_nrfifos = RX_NUM_FIFO;
+        qe_port->rx_fifosize = RX_BUF_SIZE;
+
+        qe_port->wait_closing = UCC_WAIT_CLOSING;
+        qe_port->port.fifosize = 512;
+        qe_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
+
+        qe_port->us_info.ucc_num = qe_port->ucc_num;
+        qe_port->us_info.regs = (phys_addr_t) res.start;
+        qe_port->us_info.irq = qe_port->port.irq;
+
+        qe_port->us_info.rx_bd_ring_len = qe_port->rx_nrfifos;
+        qe_port->us_info.tx_bd_ring_len = qe_port->tx_nrfifos;
+
+        /* Make sure ucc_slow_init() initializes both TX and RX */
+        qe_port->us_info.init_tx = 1;
+        qe_port->us_info.init_rx = 1;
+
+        /* Add the port to the uart sub-system.  This will cause
+         * qe_uart_config_port() to be called, so the us_info structure must
+         * be initialized.
+         */
+        ret = uart_add_one_port(&ucc_uart_driver, &qe_port->port);
+        if (ret) {
+                dev_err(&ofdev->dev, "could not add /dev/ttyQE%u\n",
+                       qe_port->port.line);
+                kfree(qe_port);
+                return ret;
+        }
+
+        dev_set_drvdata(&ofdev->dev, qe_port);
+
+        dev_info(&ofdev->dev, "UCC%u assigned to /dev/ttyQE%u\n",
+                qe_port->ucc_num + 1, qe_port->port.line);
+
+        /* Display the mknod command for this device */
+        dev_dbg(&ofdev->dev, "mknod command is 'mknod /dev/ttyQE%u c %u %u'\n",
+               qe_port->port.line, SERIAL_QE_MAJOR,
+               SERIAL_QE_MINOR + qe_port->port.line);
+
+        return 0;
+}
+
+static int ucc_uart_remove(struct of_device *ofdev)
+{
+        struct uart_qe_port *qe_port = dev_get_drvdata(&ofdev->dev);
+
+        dev_info(&ofdev->dev, "removing /dev/ttyQE%u\n", qe_port->port.line);
+
+        uart_remove_one_port(&ucc_uart_driver, &qe_port->port);
+
+        dev_set_drvdata(&ofdev->dev, NULL);
+        kfree(qe_port);
+
+        return 0;
+}
+
+static struct of_device_id ucc_uart_match[] = {
+        {
+                .type = "serial",
+                .compatible = "ucc_uart",
+        },
+        {},
+};
+MODULE_DEVICE_TABLE(of, ucc_uart_match);
+
+static struct of_platform_driver ucc_uart_of_driver = {
+        .owner          = THIS_MODULE,
+        .name           = "ucc_uart",
+        .match_table    = ucc_uart_match,
+        .probe          = ucc_uart_probe,
+        .remove         = ucc_uart_remove,
+};
+
+static int __init ucc_uart_init(void)
+{
+        int ret;
+
+        printk(KERN_INFO "Freescale QUICC Engine UART device driver\n");
+#ifdef LOOPBACK
+        printk(KERN_INFO "ucc-uart: Using loopback mode\n");
+#endif
+
+        ret = uart_register_driver(&ucc_uart_driver);
+        if (ret) {
+                printk(KERN_ERR "ucc-uart: could not register UART driver\n");
+                return ret;
+        }
+
+        ret = of_register_platform_driver(&ucc_uart_of_driver);
+        if (ret)
+                printk(KERN_ERR
+                       "ucc-uart: could not register platform driver\n");
+
+        return ret;
+}
+
+static void __exit ucc_uart_exit(void)
+{
+        printk(KERN_INFO
+               "Freescale QUICC Engine UART device driver unloading\n");
+
+        of_unregister_platform_driver(&ucc_uart_of_driver);
+        uart_unregister_driver(&ucc_uart_driver);
+}
+
+module_init(ucc_uart_init);
+module_exit(ucc_uart_exit);
+
+MODULE_DESCRIPTION("Freescale QUICC Engine (QE) UART");
+MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_QE_MAJOR);
+
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index aba9806b31c9..82a452615097 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -393,9 +393,39 @@ struct dbg {
         u8      res2[0x48];
 } __attribute__ ((packed));
 
-/* RISC Special Registers (Trap and Breakpoint) */
+/*
+ * RISC Special Registers (Trap and Breakpoint).  These are described in
+ * the QE Developer's Handbook.
+ */
 struct rsp {
-        u32     reg[0x40];      /* 64 32-bit registers */
+        __be32 tibcr[16];       /* Trap/instruction breakpoint control regs */
+        u8 res0[64];
+        __be32 ibcr0;
+        __be32 ibs0;
+        __be32 ibcnr0;
+        u8 res1[4];
+        __be32 ibcr1;
+        __be32 ibs1;
+        __be32 ibcnr1;
+        __be32 npcr;
+        __be32 dbcr;
+        __be32 dbar;
+        __be32 dbamr;
+        __be32 dbsr;
+        __be32 dbcnr;
+        u8 res2[12];
+        __be32 dbdr_h;
+        __be32 dbdr_l;
+        __be32 dbdmr_h;
+        __be32 dbdmr_l;
+        __be32 bsr;
+        __be32 bor;
+        __be32 bior;
+        u8 res3[4];
+        __be32 iatr[4];
+        __be32 eccr;            /* Exception control configuration register */
+        __be32 eicr;
+        u8 res4[0x100-0xf8];
 } __attribute__ ((packed));
 
 struct qe_immap {
diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h
index b5f9f4c9c294..5d1dc48a0bb8 100644
--- a/include/asm-powerpc/lmb.h
+++ b/include/asm-powerpc/lmb.h
@@ -51,6 +51,7 @@ extern unsigned long __init __lmb_alloc_base(unsigned long size,
 extern unsigned long __init lmb_phys_mem_size(void);
 extern unsigned long __init lmb_end_of_DRAM(void);
 extern void __init lmb_enforce_memory_limit(unsigned long memory_limit);
+extern int __init lmb_is_reserved(unsigned long addr);
 
 extern void lmb_dump_all(void);
 
diff --git a/include/asm-powerpc/mpc8260.h b/include/asm-powerpc/mpc8260.h
index e0d480790e12..03317e1e6185 100644
--- a/include/asm-powerpc/mpc8260.h
+++ b/include/asm-powerpc/mpc8260.h
@@ -8,6 +8,7 @@
 #ifndef __ASM_POWERPC_MPC8260_H__
 #define __ASM_POWERPC_MPC8260_H__
 
+#define MPC82XX_BCR_PLDP 0x00800000 /* Pipeline Maximum Depth */
 
 #ifdef CONFIG_8260
 
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index a6ea49eb680b..e5802c62f428 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -152,9 +152,6 @@ extern void setup_indirect_pci(struct pci_controller* hose,
                                resource_size_t cfg_addr,
                                resource_size_t cfg_data, u32 flags);
 extern void setup_grackle(struct pci_controller *hose);
-extern void __init update_bridge_resource(struct pci_dev *dev,
-                                          struct resource *res);
-
 #else   /* CONFIG_PPC64 */
 
 /*
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index a24b7b14958f..430dc77b35fc 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -94,6 +94,58 @@ unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
 void qe_muram_dump(void);
 void *qe_muram_addr(unsigned long offset);
 
+/* Structure that defines QE firmware binary files.
+ *
+ * See Documentation/powerpc/qe-firmware.txt for a description of these
+ * fields.
+ */
+struct qe_firmware {
+        struct qe_header {
+                __be32 length;  /* Length of the entire structure, in bytes */
+                u8 magic[3];    /* Set to { 'Q', 'E', 'F' } */
+                u8 version;     /* Version of this layout. First ver is '1' */
+        } header;
+        u8 id[62];      /* Null-terminated identifier string */
+        u8 split;       /* 0 = shared I-RAM, 1 = split I-RAM */
+        u8 count;       /* Number of microcode[] structures */
+        struct {
+                __be16 model;           /* The SOC model  */
+                u8 major;               /* The SOC revision major */
+                u8 minor;               /* The SOC revision minor */
+        } __attribute__ ((packed)) soc;
+        u8 padding[4];                  /* Reserved, for alignment */
+        __be64 extended_modes;          /* Extended modes */
+        __be32 vtraps[8];               /* Virtual trap addresses */
+        u8 reserved[4];                 /* Reserved, for future expansion */
+        struct qe_microcode {
+                u8 id[32];              /* Null-terminated identifier */
+                __be32 traps[16];       /* Trap addresses, 0 == ignore */
+                __be32 eccr;            /* The value for the ECCR register */
+                __be32 iram_offset;     /* Offset into I-RAM for the code */
+                __be32 count;           /* Number of 32-bit words of the code */
+                __be32 code_offset;     /* Offset of the actual microcode */
+                u8 major;               /* The microcode version major */
+                u8 minor;               /* The microcode version minor */
+                u8 revision;            /* The microcode version revision */
+                u8 padding;             /* Reserved, for alignment */
+                u8 reserved[4];         /* Reserved, for future expansion */
+        } __attribute__ ((packed)) microcode[1];
+        /* All microcode binaries should be located here */
+        /* CRC32 should be located here, after the microcode binaries */
+} __attribute__ ((packed));
+
+struct qe_firmware_info {
+        char id[64];            /* Firmware name */
+        u32 vtraps[8];          /* Virtual trap addresses */
+        u64 extended_modes;     /* Extended modes */
+};
+
+/* Upload a firmware to the QE */
+int qe_upload_firmware(const struct qe_firmware *firmware);
+
+/* Obtain information on the uploaded firmware */
+struct qe_firmware_info *qe_get_firmware_info(void);
+
 /* Buffer descriptors */
 struct qe_bd {
         __be16 status;
@@ -329,6 +381,15 @@ enum comm_dir {
 
 #define QE_SDEBCR_BA_MASK       0x01FFFFFF
 
+/* Communication Processor */
+#define QE_CP_CERCR_MEE         0x8000  /* Multi-user RAM ECC enable */
+#define QE_CP_CERCR_IEE         0x4000  /* Instruction RAM ECC enable */
+#define QE_CP_CERCR_CIR         0x0800  /* Common instruction RAM */
+
+/* I-RAM */
+#define QE_IRAM_IADD_AIE        0x80000000      /* Auto Increment Enable */
+#define QE_IRAM_IADD_BADDR      0x00080000      /* Base Address */
+
 /* UPC */
 #define UPGCR_PROTOCOL  0x80000000      /* protocol ul2 or pl2 */
 #define UPGCR_TMS       0x40000000      /* Transmit master/slave mode */
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 87be8c3bc9cb..bc9739dff5e7 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -169,6 +169,8 @@ extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
 extern void bad_page_fault(struct pt_regs *, unsigned long, int);
 extern int die(const char *, struct pt_regs *, long);
 extern void _exception(int, struct pt_regs *, int, unsigned long);
+extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
+
 #ifdef CONFIG_BOOKE_WDT
 extern u32 booke_wdt_enabled;
 extern u32 booke_wdt_period;
diff --git a/include/linux/phy_fixed.h b/include/linux/phy_fixed.h
index 04ba70d49fb8..509d8f5f984e 100644
--- a/include/linux/phy_fixed.h
+++ b/include/linux/phy_fixed.h
@@ -1,38 +1,31 @@
 #ifndef __PHY_FIXED_H
 #define __PHY_FIXED_H
 
-#define MII_REGS_NUM    29
-
-/* max number of virtual phy stuff */
-#define MAX_PHY_AMNT    10
-/*
-    The idea is to emulate normal phy behavior by responding with
-    pre-defined values to mii BMCR read, so that read_status hook could
-    take all the needed info.
-*/
-
 struct fixed_phy_status {
-        u8 link;
-        u16 speed;
-        u8 duplex;
+        int link;
+        int speed;
+        int duplex;
+        int pause;
+        int asym_pause;
 };
 
-/*-----------------------------------------------------------------------------
- *  Private information hoder for mii_bus
- *-----------------------------------------------------------------------------*/
-struct fixed_info {
-        u16 *regs;
-        u8 regs_num;
-        struct fixed_phy_status phy_status;
-        struct phy_device *phydev;      /* pointer to the container */
-        /* link & speed cb */
-        int (*link_update) (struct net_device *, struct fixed_phy_status *);
+#ifdef CONFIG_FIXED_PHY
+extern int fixed_phy_add(unsigned int irq, int phy_id,
+                         struct fixed_phy_status *status);
+#else
+static inline int fixed_phy_add(unsigned int irq, int phy_id,
+                                struct fixed_phy_status *status)
+{
+        return -ENODEV;
+}
+#endif /* CONFIG_FIXED_PHY */
 
-};
-
-
-int fixed_mdio_set_link_update(struct phy_device *,
-       int (*link_update) (struct net_device *, struct fixed_phy_status *));
-struct fixed_info *fixed_mdio_get_phydev (int phydev_ind);
+/*
+ * This function issued only by fixed_phy-aware drivers, no need
+ * protect it with #ifdef
+ */
+extern int fixed_phy_set_link_update(struct phy_device *phydev,
+                        int (*link_update)(struct net_device *,
+                                           struct fixed_phy_status *));
 
 #endif /* __PHY_FIXED_H */