diff options
-rw-r--r-- | drivers/net/ibm_emac/ibm_emac_phy.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ibm_emac/ibm_emac_phy.c b/drivers/net/ibm_emac/ibm_emac_phy.c index a27e49cfe43b..67935dd33a65 100644 --- a/drivers/net/ibm_emac/ibm_emac_phy.c +++ b/drivers/net/ibm_emac/ibm_emac_phy.c | |||
@@ -236,12 +236,16 @@ static struct mii_phy_def genmii_phy_def = { | |||
236 | }; | 236 | }; |
237 | 237 | ||
238 | /* CIS8201 */ | 238 | /* CIS8201 */ |
239 | #define MII_CIS8201_10BTCSR 0x16 | ||
240 | #define TENBTCSR_ECHO_DISABLE 0x2000 | ||
239 | #define MII_CIS8201_EPCR 0x17 | 241 | #define MII_CIS8201_EPCR 0x17 |
240 | #define EPCR_MODE_MASK 0x3000 | 242 | #define EPCR_MODE_MASK 0x3000 |
241 | #define EPCR_GMII_MODE 0x0000 | 243 | #define EPCR_GMII_MODE 0x0000 |
242 | #define EPCR_RGMII_MODE 0x1000 | 244 | #define EPCR_RGMII_MODE 0x1000 |
243 | #define EPCR_TBI_MODE 0x2000 | 245 | #define EPCR_TBI_MODE 0x2000 |
244 | #define EPCR_RTBI_MODE 0x3000 | 246 | #define EPCR_RTBI_MODE 0x3000 |
247 | #define MII_CIS8201_ACSR 0x1c | ||
248 | #define ACSR_PIN_PRIO_SELECT 0x0004 | ||
245 | 249 | ||
246 | static int cis8201_init(struct mii_phy *phy) | 250 | static int cis8201_init(struct mii_phy *phy) |
247 | { | 251 | { |
@@ -269,6 +273,14 @@ static int cis8201_init(struct mii_phy *phy) | |||
269 | } | 273 | } |
270 | 274 | ||
271 | phy_write(phy, MII_CIS8201_EPCR, epcr); | 275 | phy_write(phy, MII_CIS8201_EPCR, epcr); |
276 | |||
277 | /* MII regs override strap pins */ | ||
278 | phy_write(phy, MII_CIS8201_ACSR, | ||
279 | phy_read(phy, MII_CIS8201_ACSR) | ACSR_PIN_PRIO_SELECT); | ||
280 | |||
281 | /* Disable TX_EN -> CRS echo mode, otherwise 10/HDX doesn't work */ | ||
282 | phy_write(phy, MII_CIS8201_10BTCSR, | ||
283 | phy_read(phy, MII_CIS8201_10BTCSR) | TENBTCSR_ECHO_DISABLE); | ||
272 | 284 | ||
273 | return 0; | 285 | return 0; |
274 | } | 286 | } |