diff options
-rw-r--r-- | drivers/net/bnx2.c | 14 | ||||
-rw-r--r-- | drivers/net/bnx2.h | 6 |
2 files changed, 18 insertions, 2 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 953808efe551..ee7b75b976b5 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
@@ -57,8 +57,8 @@ | |||
57 | 57 | ||
58 | #define DRV_MODULE_NAME "bnx2" | 58 | #define DRV_MODULE_NAME "bnx2" |
59 | #define PFX DRV_MODULE_NAME ": " | 59 | #define PFX DRV_MODULE_NAME ": " |
60 | #define DRV_MODULE_VERSION "1.5.4" | 60 | #define DRV_MODULE_VERSION "1.5.5" |
61 | #define DRV_MODULE_RELDATE "January 24, 2007" | 61 | #define DRV_MODULE_RELDATE "February 1, 2007" |
62 | 62 | ||
63 | #define RUN_AT(x) (jiffies + (x)) | 63 | #define RUN_AT(x) (jiffies + (x)) |
64 | 64 | ||
@@ -1356,6 +1356,14 @@ bnx2_init_copper_phy(struct bnx2 *bp) | |||
1356 | bnx2_write_phy(bp, 0x18, 0x0400); | 1356 | bnx2_write_phy(bp, 0x18, 0x0400); |
1357 | } | 1357 | } |
1358 | 1358 | ||
1359 | if (bp->phy_flags & PHY_DIS_EARLY_DAC_FLAG) { | ||
1360 | bnx2_write_phy(bp, MII_BNX2_DSP_ADDRESS, | ||
1361 | MII_BNX2_DSP_EXPAND_REG | 0x8); | ||
1362 | bnx2_read_phy(bp, MII_BNX2_DSP_RW_PORT, &val); | ||
1363 | val &= ~(1 << 8); | ||
1364 | bnx2_write_phy(bp, MII_BNX2_DSP_RW_PORT, val); | ||
1365 | } | ||
1366 | |||
1359 | if (bp->dev->mtu > 1500) { | 1367 | if (bp->dev->mtu > 1500) { |
1360 | /* Set extended packet length bit */ | 1368 | /* Set extended packet length bit */ |
1361 | bnx2_write_phy(bp, 0x18, 0x7); | 1369 | bnx2_write_phy(bp, 0x18, 0x7); |
@@ -5918,6 +5926,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) | |||
5918 | } else if (CHIP_NUM(bp) == CHIP_NUM_5706 || | 5926 | } else if (CHIP_NUM(bp) == CHIP_NUM_5706 || |
5919 | CHIP_NUM(bp) == CHIP_NUM_5708) | 5927 | CHIP_NUM(bp) == CHIP_NUM_5708) |
5920 | bp->phy_flags |= PHY_CRC_FIX_FLAG; | 5928 | bp->phy_flags |= PHY_CRC_FIX_FLAG; |
5929 | else if (CHIP_ID(bp) == CHIP_ID_5709_A0) | ||
5930 | bp->phy_flags |= PHY_DIS_EARLY_DAC_FLAG; | ||
5921 | 5931 | ||
5922 | if ((CHIP_ID(bp) == CHIP_ID_5708_A0) || | 5932 | if ((CHIP_ID(bp) == CHIP_ID_5708_A0) || |
5923 | (CHIP_ID(bp) == CHIP_ID_5708_B0) || | 5933 | (CHIP_ID(bp) == CHIP_ID_5708_B0) || |
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 13b6f9b11e01..ccbdf81c6599 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -6288,6 +6288,10 @@ struct l2_fhdr { | |||
6288 | 6288 | ||
6289 | #define BCM5708S_TX_ACTL3 0x17 | 6289 | #define BCM5708S_TX_ACTL3 0x17 |
6290 | 6290 | ||
6291 | #define MII_BNX2_DSP_RW_PORT 0x15 | ||
6292 | #define MII_BNX2_DSP_ADDRESS 0x17 | ||
6293 | #define MII_BNX2_DSP_EXPAND_REG 0x0f00 | ||
6294 | |||
6291 | #define MIN_ETHERNET_PACKET_SIZE 60 | 6295 | #define MIN_ETHERNET_PACKET_SIZE 60 |
6292 | #define MAX_ETHERNET_PACKET_SIZE 1514 | 6296 | #define MAX_ETHERNET_PACKET_SIZE 1514 |
6293 | #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9014 | 6297 | #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9014 |
@@ -6489,6 +6493,7 @@ struct bnx2 { | |||
6489 | #define PHY_INT_MODE_MASK_FLAG 0x300 | 6493 | #define PHY_INT_MODE_MASK_FLAG 0x300 |
6490 | #define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100 | 6494 | #define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100 |
6491 | #define PHY_INT_MODE_LINK_READY_FLAG 0x200 | 6495 | #define PHY_INT_MODE_LINK_READY_FLAG 0x200 |
6496 | #define PHY_DIS_EARLY_DAC_FLAG 0x400 | ||
6492 | 6497 | ||
6493 | u32 chip_id; | 6498 | u32 chip_id; |
6494 | /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */ | 6499 | /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */ |
@@ -6512,6 +6517,7 @@ struct bnx2 { | |||
6512 | #define CHIP_ID_5708_A0 0x57080000 | 6517 | #define CHIP_ID_5708_A0 0x57080000 |
6513 | #define CHIP_ID_5708_B0 0x57081000 | 6518 | #define CHIP_ID_5708_B0 0x57081000 |
6514 | #define CHIP_ID_5708_B1 0x57081010 | 6519 | #define CHIP_ID_5708_B1 0x57081010 |
6520 | #define CHIP_ID_5709_A0 0x57090000 | ||
6515 | 6521 | ||
6516 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) | 6522 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) |
6517 | 6523 | ||