diff options
-rw-r--r-- | arch/mips/Kconfig | 4 | ||||
-rw-r--r-- | arch/mips/configs/jmr3927_defconfig | 24 | ||||
-rw-r--r-- | arch/mips/jmr3927/common/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/jmr3927/common/rtc_ds1742.c | 171 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/setup.c | 39 | ||||
-rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | 3 | ||||
-rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | 76 | ||||
-rw-r--r-- | include/asm-mips/ds1742.h | 13 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/jmr3927.h | 6 | ||||
-rw-r--r-- | include/asm-mips/mach-jmr3927/ds1742.h | 16 | ||||
-rw-r--r-- | include/asm-mips/mach-jmr3927/mangle-port.h | 18 | ||||
-rw-r--r-- | include/linux/ds1742rtc.h | 53 |
12 files changed, 86 insertions, 339 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 71729d0f013d..e7e880b87456 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -1895,10 +1895,6 @@ config HZ | |||
1895 | 1895 | ||
1896 | source "kernel/Kconfig.preempt" | 1896 | source "kernel/Kconfig.preempt" |
1897 | 1897 | ||
1898 | config RTC_DS1742 | ||
1899 | bool "DS1742 BRAM/RTC support" | ||
1900 | depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 | ||
1901 | |||
1902 | config MIPS_INSANE_LARGE | 1898 | config MIPS_INSANE_LARGE |
1903 | bool "Support for large 64-bit configurations" | 1899 | bool "Support for large 64-bit configurations" |
1904 | depends on CPU_R10000 && 64BIT | 1900 | depends on CPU_R10000 && 64BIT |
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index 9ebb522fbbbd..98b9fbc042f4 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig | |||
@@ -148,7 +148,6 @@ CONFIG_HZ=1000 | |||
148 | CONFIG_PREEMPT_NONE=y | 148 | CONFIG_PREEMPT_NONE=y |
149 | # CONFIG_PREEMPT_VOLUNTARY is not set | 149 | # CONFIG_PREEMPT_VOLUNTARY is not set |
150 | # CONFIG_PREEMPT is not set | 150 | # CONFIG_PREEMPT is not set |
151 | CONFIG_RTC_DS1742=y | ||
152 | # CONFIG_KEXEC is not set | 151 | # CONFIG_KEXEC is not set |
153 | CONFIG_LOCKDEP_SUPPORT=y | 152 | CONFIG_LOCKDEP_SUPPORT=y |
154 | CONFIG_STACKTRACE_SUPPORT=y | 153 | CONFIG_STACKTRACE_SUPPORT=y |
@@ -802,7 +801,28 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
802 | # | 801 | # |
803 | # Real Time Clock | 802 | # Real Time Clock |
804 | # | 803 | # |
805 | # CONFIG_RTC_CLASS is not set | 804 | CONFIG_RTC_LIB=y |
805 | CONFIG_RTC_CLASS=y | ||
806 | CONFIG_RTC_HCTOSYS=y | ||
807 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
808 | # CONFIG_RTC_DEBUG is not set | ||
809 | |||
810 | # | ||
811 | # RTC interfaces | ||
812 | # | ||
813 | CONFIG_RTC_INTF_SYSFS=y | ||
814 | CONFIG_RTC_INTF_PROC=y | ||
815 | CONFIG_RTC_INTF_DEV=y | ||
816 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
817 | |||
818 | # | ||
819 | # RTC drivers | ||
820 | # | ||
821 | # CONFIG_RTC_DRV_DS1553 is not set | ||
822 | CONFIG_RTC_DRV_DS1742=y | ||
823 | # CONFIG_RTC_DRV_M48T86 is not set | ||
824 | # CONFIG_RTC_DRV_TEST is not set | ||
825 | # CONFIG_RTC_DRV_V3020 is not set | ||
806 | 826 | ||
807 | # | 827 | # |
808 | # DMA Engine support | 828 | # DMA Engine support |
diff --git a/arch/mips/jmr3927/common/Makefile b/arch/mips/jmr3927/common/Makefile index cb09a8eede15..01e7db19bcbe 100644 --- a/arch/mips/jmr3927/common/Makefile +++ b/arch/mips/jmr3927/common/Makefile | |||
@@ -2,4 +2,4 @@ | |||
2 | # Makefile for the common code of TOSHIBA JMR-TX3927 board | 2 | # Makefile for the common code of TOSHIBA JMR-TX3927 board |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += prom.o puts.o rtc_ds1742.o | 5 | obj-y += prom.o puts.o |
diff --git a/arch/mips/jmr3927/common/rtc_ds1742.c b/arch/mips/jmr3927/common/rtc_ds1742.c deleted file mode 100644 index e6561345d12a..000000000000 --- a/arch/mips/jmr3927/common/rtc_ds1742.c +++ /dev/null | |||
@@ -1,171 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2001 MontaVista Software Inc. | ||
3 | * Author: MontaVista Software, Inc. | ||
4 | * ahennessy@mvista.com | ||
5 | * | ||
6 | * arch/mips/jmr3927/common/rtc_ds1742.c | ||
7 | * Based on arch/mips/ddb5xxx/common/rtc_ds1386.c | ||
8 | * low-level RTC hookups for s for Dallas 1742 chip. | ||
9 | * | ||
10 | * Copyright (C) 2000-2001 Toshiba Corporation | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License as published by the | ||
14 | * Free Software Foundation; either version 2 of the License, or (at your | ||
15 | * option) any later version. | ||
16 | * | ||
17 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
20 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
24 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
27 | * | ||
28 | * You should have received a copy of the GNU General Public License along | ||
29 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
31 | */ | ||
32 | |||
33 | |||
34 | /* | ||
35 | * This file exports a function, rtc_ds1386_init(), which expects an | ||
36 | * uncached base address as the argument. It will set the two function | ||
37 | * pointers expected by the MIPS generic timer code. | ||
38 | */ | ||
39 | |||
40 | #include <linux/bcd.h> | ||
41 | #include <linux/types.h> | ||
42 | #include <linux/time.h> | ||
43 | #include <linux/rtc.h> | ||
44 | #include <linux/ds1742rtc.h> | ||
45 | |||
46 | #include <asm/time.h> | ||
47 | #include <asm/addrspace.h> | ||
48 | |||
49 | #include <asm/debug.h> | ||
50 | |||
51 | #define EPOCH 2000 | ||
52 | |||
53 | static unsigned long rtc_base; | ||
54 | |||
55 | static unsigned long | ||
56 | rtc_ds1742_get_time(void) | ||
57 | { | ||
58 | unsigned int year, month, day, hour, minute, second; | ||
59 | unsigned int century; | ||
60 | unsigned long flags; | ||
61 | |||
62 | spin_lock_irqsave(&rtc_lock, flags); | ||
63 | rtc_write(RTC_READ, RTC_CONTROL); | ||
64 | second = BCD2BIN(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK); | ||
65 | minute = BCD2BIN(rtc_read(RTC_MINUTES)); | ||
66 | hour = BCD2BIN(rtc_read(RTC_HOURS)); | ||
67 | day = BCD2BIN(rtc_read(RTC_DATE)); | ||
68 | month = BCD2BIN(rtc_read(RTC_MONTH)); | ||
69 | year = BCD2BIN(rtc_read(RTC_YEAR)); | ||
70 | century = BCD2BIN(rtc_read(RTC_CENTURY) & RTC_CENTURY_MASK); | ||
71 | rtc_write(0, RTC_CONTROL); | ||
72 | spin_unlock_irqrestore(&rtc_lock, flags); | ||
73 | |||
74 | year += century * 100; | ||
75 | |||
76 | return mktime(year, month, day, hour, minute, second); | ||
77 | } | ||
78 | extern void to_tm(unsigned long tim, struct rtc_time * tm); | ||
79 | |||
80 | static int | ||
81 | rtc_ds1742_set_time(unsigned long t) | ||
82 | { | ||
83 | struct rtc_time tm; | ||
84 | u8 year, month, day, hour, minute, second; | ||
85 | u8 cmos_year, cmos_month, cmos_day, cmos_hour, cmos_minute, cmos_second; | ||
86 | int cmos_century; | ||
87 | unsigned long flags; | ||
88 | |||
89 | spin_lock_irqsave(&rtc_lock, flags); | ||
90 | rtc_write(RTC_READ, RTC_CONTROL); | ||
91 | cmos_second = (u8)(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK); | ||
92 | cmos_minute = (u8)rtc_read(RTC_MINUTES); | ||
93 | cmos_hour = (u8)rtc_read(RTC_HOURS); | ||
94 | cmos_day = (u8)rtc_read(RTC_DATE); | ||
95 | cmos_month = (u8)rtc_read(RTC_MONTH); | ||
96 | cmos_year = (u8)rtc_read(RTC_YEAR); | ||
97 | cmos_century = rtc_read(RTC_CENTURY) & RTC_CENTURY_MASK; | ||
98 | |||
99 | rtc_write(RTC_WRITE, RTC_CONTROL); | ||
100 | |||
101 | /* convert */ | ||
102 | to_tm(t, &tm); | ||
103 | |||
104 | /* check each field one by one */ | ||
105 | year = BIN2BCD(tm.tm_year - EPOCH); | ||
106 | if (year != cmos_year) { | ||
107 | rtc_write(year,RTC_YEAR); | ||
108 | } | ||
109 | |||
110 | month = BIN2BCD(tm.tm_mon); | ||
111 | if (month != (cmos_month & 0x1f)) { | ||
112 | rtc_write((month & 0x1f) | (cmos_month & ~0x1f),RTC_MONTH); | ||
113 | } | ||
114 | |||
115 | day = BIN2BCD(tm.tm_mday); | ||
116 | if (day != cmos_day) { | ||
117 | |||
118 | rtc_write(day, RTC_DATE); | ||
119 | } | ||
120 | |||
121 | if (cmos_hour & 0x40) { | ||
122 | /* 12 hour format */ | ||
123 | hour = 0x40; | ||
124 | if (tm.tm_hour > 12) { | ||
125 | hour |= 0x20 | (BIN2BCD(hour-12) & 0x1f); | ||
126 | } else { | ||
127 | hour |= BIN2BCD(tm.tm_hour); | ||
128 | } | ||
129 | } else { | ||
130 | /* 24 hour format */ | ||
131 | hour = BIN2BCD(tm.tm_hour) & 0x3f; | ||
132 | } | ||
133 | if (hour != cmos_hour) rtc_write(hour, RTC_HOURS); | ||
134 | |||
135 | minute = BIN2BCD(tm.tm_min); | ||
136 | if (minute != cmos_minute) { | ||
137 | rtc_write(minute, RTC_MINUTES); | ||
138 | } | ||
139 | |||
140 | second = BIN2BCD(tm.tm_sec); | ||
141 | if (second != cmos_second) { | ||
142 | rtc_write(second & RTC_SECONDS_MASK,RTC_SECONDS); | ||
143 | } | ||
144 | |||
145 | /* RTC_CENTURY and RTC_CONTROL share same address... */ | ||
146 | rtc_write(cmos_century, RTC_CONTROL); | ||
147 | spin_unlock_irqrestore(&rtc_lock, flags); | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | void | ||
153 | rtc_ds1742_init(unsigned long base) | ||
154 | { | ||
155 | u8 cmos_second; | ||
156 | |||
157 | /* remember the base */ | ||
158 | rtc_base = base; | ||
159 | db_assert((rtc_base & 0xe0000000) == KSEG1); | ||
160 | |||
161 | /* set the function pointers */ | ||
162 | rtc_mips_get_time = rtc_ds1742_get_time; | ||
163 | rtc_mips_set_time = rtc_ds1742_set_time; | ||
164 | |||
165 | /* clear oscillator stop bit */ | ||
166 | rtc_write(RTC_READ, RTC_CONTROL); | ||
167 | cmos_second = (u8)(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK); | ||
168 | rtc_write(RTC_WRITE, RTC_CONTROL); | ||
169 | rtc_write(cmos_second, RTC_SECONDS); /* clear msb */ | ||
170 | rtc_write(0, RTC_CONTROL); | ||
171 | } | ||
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index ecabe5b08489..fc523bda068f 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -45,6 +45,7 @@ | |||
45 | #include <linux/param.h> /* for HZ */ | 45 | #include <linux/param.h> /* for HZ */ |
46 | #include <linux/delay.h> | 46 | #include <linux/delay.h> |
47 | #include <linux/pm.h> | 47 | #include <linux/pm.h> |
48 | #include <linux/platform_device.h> | ||
48 | #ifdef CONFIG_SERIAL_TXX9 | 49 | #ifdef CONFIG_SERIAL_TXX9 |
49 | #include <linux/tty.h> | 50 | #include <linux/tty.h> |
50 | #include <linux/serial.h> | 51 | #include <linux/serial.h> |
@@ -172,19 +173,10 @@ static cycle_t jmr3927_hpt_read(void) | |||
172 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; | 173 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; |
173 | } | 174 | } |
174 | 175 | ||
175 | #define USE_RTC_DS1742 | ||
176 | #ifdef USE_RTC_DS1742 | ||
177 | extern void rtc_ds1742_init(unsigned long base); | ||
178 | #endif | ||
179 | static void __init jmr3927_time_init(void) | 176 | static void __init jmr3927_time_init(void) |
180 | { | 177 | { |
181 | clocksource_mips.read = jmr3927_hpt_read; | 178 | clocksource_mips.read = jmr3927_hpt_read; |
182 | mips_hpt_frequency = JMR3927_TIMER_CLK; | 179 | mips_hpt_frequency = JMR3927_TIMER_CLK; |
183 | #ifdef USE_RTC_DS1742 | ||
184 | if (jmr3927_have_nvram()) { | ||
185 | rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR); | ||
186 | } | ||
187 | #endif | ||
188 | } | 180 | } |
189 | 181 | ||
190 | void __init plat_timer_setup(struct irqaction *irq) | 182 | void __init plat_timer_setup(struct irqaction *irq) |
@@ -540,3 +532,32 @@ void __init tx3927_setup(void) | |||
540 | printk("TX3927 D-Cache WriteBack (CWF) .\n"); | 532 | printk("TX3927 D-Cache WriteBack (CWF) .\n"); |
541 | } | 533 | } |
542 | } | 534 | } |
535 | |||
536 | /* This trick makes rtc-ds1742 driver usable as is. */ | ||
537 | unsigned long __swizzle_addr_b(unsigned long port) | ||
538 | { | ||
539 | if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR) | ||
540 | return port; | ||
541 | port = (port & 0xffff0000) | (port & 0x7fff << 1); | ||
542 | #ifdef __BIG_ENDIAN | ||
543 | return port; | ||
544 | #else | ||
545 | return port | 1; | ||
546 | #endif | ||
547 | } | ||
548 | EXPORT_SYMBOL(__swizzle_addr_b); | ||
549 | |||
550 | static int __init jmr3927_rtc_init(void) | ||
551 | { | ||
552 | struct resource res = { | ||
553 | .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, | ||
554 | .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, | ||
555 | .flags = IORESOURCE_MEM, | ||
556 | }; | ||
557 | struct platform_device *dev; | ||
558 | if (!jmr3927_have_nvram()) | ||
559 | return -ENODEV; | ||
560 | dev = platform_device_register_simple("ds1742", -1, &res, 1); | ||
561 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | ||
562 | } | ||
563 | device_initcall(jmr3927_rtc_init); | ||
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index dcce88f403c9..5cc30c10e746 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |||
@@ -132,9 +132,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
132 | #include <asm/wbflush.h> | 132 | #include <asm/wbflush.h> |
133 | #include <linux/bootmem.h> | 133 | #include <linux/bootmem.h> |
134 | #include <linux/blkdev.h> | 134 | #include <linux/blkdev.h> |
135 | #ifdef CONFIG_RTC_DS1742 | ||
136 | #include <linux/ds1742rtc.h> | ||
137 | #endif | ||
138 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 135 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
139 | #include <asm/tx4927/smsc_fdc37m81x.h> | 136 | #include <asm/tx4927/smsc_fdc37m81x.h> |
140 | #endif | 137 | #endif |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c index 7316a78fdd68..0f7576dfd141 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | |||
@@ -53,6 +53,7 @@ | |||
53 | #include <linux/pci.h> | 53 | #include <linux/pci.h> |
54 | #include <linux/timex.h> | 54 | #include <linux/timex.h> |
55 | #include <linux/pm.h> | 55 | #include <linux/pm.h> |
56 | #include <linux/platform_device.h> | ||
56 | 57 | ||
57 | #include <asm/bootinfo.h> | 58 | #include <asm/bootinfo.h> |
58 | #include <asm/page.h> | 59 | #include <asm/page.h> |
@@ -64,9 +65,6 @@ | |||
64 | #include <asm/time.h> | 65 | #include <asm/time.h> |
65 | #include <linux/bootmem.h> | 66 | #include <linux/bootmem.h> |
66 | #include <linux/blkdev.h> | 67 | #include <linux/blkdev.h> |
67 | #ifdef CONFIG_RTC_DS1742 | ||
68 | #include <linux/ds1742rtc.h> | ||
69 | #endif | ||
70 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 68 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
71 | #include <asm/tx4927/smsc_fdc37m81x.h> | 69 | #include <asm/tx4927/smsc_fdc37m81x.h> |
72 | #endif | 70 | #endif |
@@ -1020,69 +1018,12 @@ void __init toshiba_rbtx4927_setup(void) | |||
1020 | "+\n"); | 1018 | "+\n"); |
1021 | } | 1019 | } |
1022 | 1020 | ||
1023 | #ifdef CONFIG_RTC_DS1742 | ||
1024 | extern unsigned long rtc_ds1742_get_time(void); | ||
1025 | extern int rtc_ds1742_set_time(unsigned long); | ||
1026 | extern void rtc_ds1742_wait(void); | ||
1027 | #endif | ||
1028 | |||
1029 | void __init | 1021 | void __init |
1030 | toshiba_rbtx4927_time_init(void) | 1022 | toshiba_rbtx4927_time_init(void) |
1031 | { | 1023 | { |
1032 | u32 c1; | ||
1033 | u32 c2; | ||
1034 | |||
1035 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "-\n"); | 1024 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "-\n"); |
1036 | 1025 | ||
1037 | #ifdef CONFIG_RTC_DS1742 | 1026 | mips_hpt_frequency = tx4927_cpu_clock / 2; |
1038 | |||
1039 | rtc_mips_get_time = rtc_ds1742_get_time; | ||
1040 | rtc_mips_set_time = rtc_ds1742_set_time; | ||
1041 | |||
1042 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1043 | ":rtc_ds1742_init()-\n"); | ||
1044 | rtc_ds1742_init(0xbc010000); | ||
1045 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1046 | ":rtc_ds1742_init()+\n"); | ||
1047 | |||
1048 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1049 | ":Calibrate mips_hpt_frequency-\n"); | ||
1050 | rtc_ds1742_wait(); | ||
1051 | |||
1052 | /* get the count */ | ||
1053 | c1 = read_c0_count(); | ||
1054 | |||
1055 | /* wait for the seconds to change again */ | ||
1056 | rtc_ds1742_wait(); | ||
1057 | |||
1058 | /* get the count again */ | ||
1059 | c2 = read_c0_count(); | ||
1060 | |||
1061 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1062 | ":Calibrate mips_hpt_frequency+\n"); | ||
1063 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1064 | ":c1=%12u\n", c1); | ||
1065 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1066 | ":c2=%12u\n", c2); | ||
1067 | |||
1068 | /* this diff is as close as we are going to get to counter ticks per sec */ | ||
1069 | mips_hpt_frequency = abs(c2 - c1); | ||
1070 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1071 | ":f1=%12u\n", mips_hpt_frequency); | ||
1072 | |||
1073 | /* round to 1/10th of a MHz */ | ||
1074 | mips_hpt_frequency /= (100 * 1000); | ||
1075 | mips_hpt_frequency *= (100 * 1000); | ||
1076 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, | ||
1077 | ":f2=%12u\n", mips_hpt_frequency); | ||
1078 | |||
1079 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_INFO, | ||
1080 | ":mips_hpt_frequency=%uHz (%uMHz)\n", | ||
1081 | mips_hpt_frequency, | ||
1082 | mips_hpt_frequency / 1000000); | ||
1083 | #else | ||
1084 | mips_hpt_frequency = 100000000; | ||
1085 | #endif | ||
1086 | 1027 | ||
1087 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n"); | 1028 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n"); |
1088 | 1029 | ||
@@ -1095,3 +1036,16 @@ void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq) | |||
1095 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP, | 1036 | TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP, |
1096 | "+\n"); | 1037 | "+\n"); |
1097 | } | 1038 | } |
1039 | |||
1040 | static int __init toshiba_rbtx4927_rtc_init(void) | ||
1041 | { | ||
1042 | struct resource res = { | ||
1043 | .start = 0x1c010000, | ||
1044 | .end = 0x1c010000 + 0x800 - 1, | ||
1045 | .flags = IORESOURCE_MEM, | ||
1046 | }; | ||
1047 | struct platform_device *dev = | ||
1048 | platform_device_register_simple("ds1742", -1, &res, 1); | ||
1049 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | ||
1050 | } | ||
1051 | device_initcall(toshiba_rbtx4927_rtc_init); | ||
diff --git a/include/asm-mips/ds1742.h b/include/asm-mips/ds1742.h deleted file mode 100644 index c2f2c32da637..000000000000 --- a/include/asm-mips/ds1742.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 by Ralf Baechle (ralf@linux-mips.org) | ||
7 | */ | ||
8 | #ifndef _ASM_DS1742_H | ||
9 | #define _ASM_DS1742_H | ||
10 | |||
11 | #include <ds1742.h> | ||
12 | |||
13 | #endif /* _ASM_DS1742_H */ | ||
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h index baf412967afa..c50e68ffa3af 100644 --- a/include/asm-mips/jmr3927/jmr3927.h +++ b/include/asm-mips/jmr3927/jmr3927.h | |||
@@ -179,12 +179,6 @@ static inline int jmr3927_have_isac(void) | |||
179 | #define jmr3927_have_nvram() \ | 179 | #define jmr3927_have_nvram() \ |
180 | ((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT) | 180 | ((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT) |
181 | 181 | ||
182 | /* NVRAM macro */ | ||
183 | #define jmr3927_nvram_in(ofs) \ | ||
184 | jmr3927_ioc_reg_in(JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1)) | ||
185 | #define jmr3927_nvram_out(d, ofs) \ | ||
186 | jmr3927_ioc_reg_out(d, JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1)) | ||
187 | |||
188 | /* LED macro */ | 182 | /* LED macro */ |
189 | #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) | 183 | #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) |
190 | #define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR) | 184 | #define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR) |
diff --git a/include/asm-mips/mach-jmr3927/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h deleted file mode 100644 index 8a8fef6d07fa..000000000000 --- a/include/asm-mips/mach-jmr3927/ds1742.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2003, 06 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_JMR3927_DS1742_H | ||
9 | #define __ASM_MACH_JMR3927_DS1742_H | ||
10 | |||
11 | #include <asm/jmr3927/jmr3927.h> | ||
12 | |||
13 | #define rtc_read(reg) (jmr3927_nvram_in(reg)) | ||
14 | #define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg))) | ||
15 | |||
16 | #endif /* __ASM_MACH_JMR3927_DS1742_H */ | ||
diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-jmr3927/mangle-port.h new file mode 100644 index 000000000000..501a202631b5 --- /dev/null +++ b/include/asm-mips/mach-jmr3927/mangle-port.h | |||
@@ -0,0 +1,18 @@ | |||
1 | #ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H | ||
2 | #define __ASM_MACH_JMR3927_MANGLE_PORT_H | ||
3 | |||
4 | extern unsigned long __swizzle_addr_b(unsigned long port); | ||
5 | #define __swizzle_addr_w(port) (port) | ||
6 | #define __swizzle_addr_l(port) (port) | ||
7 | #define __swizzle_addr_q(port) (port) | ||
8 | |||
9 | #define ioswabb(a,x) (x) | ||
10 | #define __mem_ioswabb(a,x) (x) | ||
11 | #define ioswabw(a,x) le16_to_cpu(x) | ||
12 | #define __mem_ioswabw(a,x) (x) | ||
13 | #define ioswabl(a,x) le32_to_cpu(x) | ||
14 | #define __mem_ioswabl(a,x) (x) | ||
15 | #define ioswabq(a,x) le64_to_cpu(x) | ||
16 | #define __mem_ioswabq(a,x) (x) | ||
17 | |||
18 | #endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */ | ||
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h deleted file mode 100644 index a83cdd1cafc9..000000000000 --- a/include/linux/ds1742rtc.h +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* | ||
2 | * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM | ||
3 | * | ||
4 | * Copyright (C) 1999-2001 Toshiba Corporation | ||
5 | * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) | ||
6 | * | ||
7 | * Permission is hereby granted to copy, modify and redistribute this code | ||
8 | * in terms of the GNU Library General Public License, Version 2 or later, | ||
9 | * at your option. | ||
10 | */ | ||
11 | #ifndef __LINUX_DS1742RTC_H | ||
12 | #define __LINUX_DS1742RTC_H | ||
13 | |||
14 | #include <asm/ds1742.h> | ||
15 | |||
16 | #define RTC_BRAM_SIZE 0x800 | ||
17 | #define RTC_OFFSET 0x7f8 | ||
18 | |||
19 | /* | ||
20 | * Register summary | ||
21 | */ | ||
22 | #define RTC_CONTROL (RTC_OFFSET + 0) | ||
23 | #define RTC_CENTURY (RTC_OFFSET + 0) | ||
24 | #define RTC_SECONDS (RTC_OFFSET + 1) | ||
25 | #define RTC_MINUTES (RTC_OFFSET + 2) | ||
26 | #define RTC_HOURS (RTC_OFFSET + 3) | ||
27 | #define RTC_DAY (RTC_OFFSET + 4) | ||
28 | #define RTC_DATE (RTC_OFFSET + 5) | ||
29 | #define RTC_MONTH (RTC_OFFSET + 6) | ||
30 | #define RTC_YEAR (RTC_OFFSET + 7) | ||
31 | |||
32 | #define RTC_CENTURY_MASK 0x3f | ||
33 | #define RTC_SECONDS_MASK 0x7f | ||
34 | #define RTC_DAY_MASK 0x07 | ||
35 | |||
36 | /* | ||
37 | * Bits in the Control/Century register | ||
38 | */ | ||
39 | #define RTC_WRITE 0x80 | ||
40 | #define RTC_READ 0x40 | ||
41 | |||
42 | /* | ||
43 | * Bits in the Seconds register | ||
44 | */ | ||
45 | #define RTC_STOP 0x80 | ||
46 | |||
47 | /* | ||
48 | * Bits in the Day register | ||
49 | */ | ||
50 | #define RTC_BATT_FLAG 0x80 | ||
51 | #define RTC_FREQ_TEST 0x40 | ||
52 | |||
53 | #endif /* __LINUX_DS1742RTC_H */ | ||