diff options
-rw-r--r-- | drivers/pci/quirks.c | 59 | ||||
-rw-r--r-- | include/linux/pci_ids.h | 1 |
2 files changed, 60 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 8385b815ecb1..08cd86a6dd66 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -1703,6 +1703,65 @@ static void __devinit quirk_disable_msi(struct pci_dev *dev) | |||
1703 | } | 1703 | } |
1704 | } | 1704 | } |
1705 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi); | 1705 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi); |
1706 | |||
1707 | /* Go through the list of Hypertransport capabilities and | ||
1708 | * return 1 if a HT MSI capability is found and enabled */ | ||
1709 | static int __devinit msi_ht_cap_enabled(struct pci_dev *dev) | ||
1710 | { | ||
1711 | u8 pos; | ||
1712 | int ttl; | ||
1713 | for (pos = pci_find_capability(dev, PCI_CAP_ID_HT), ttl = 48; | ||
1714 | pos && ttl; | ||
1715 | pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT), ttl--) { | ||
1716 | u32 cap_hdr; | ||
1717 | /* MSI mapping section according to Hypertransport spec */ | ||
1718 | if (pci_read_config_dword(dev, pos, &cap_hdr) == 0 | ||
1719 | && (cap_hdr & 0xf8000000) == 0xa8000000 /* MSI mapping */) { | ||
1720 | printk(KERN_INFO "PCI: Found HT MSI mapping on %s with capability %s\n", | ||
1721 | pci_name(dev), cap_hdr & 0x10000 ? "enabled" : "disabled"); | ||
1722 | return (cap_hdr & 0x10000) != 0; /* MSI mapping cap enabled */ | ||
1723 | } | ||
1724 | } | ||
1725 | return 0; | ||
1726 | } | ||
1727 | |||
1728 | /* Check the hypertransport MSI mapping to know whether MSI is enabled or not */ | ||
1729 | static void __devinit quirk_msi_ht_cap(struct pci_dev *dev) | ||
1730 | { | ||
1731 | if (dev->subordinate && !msi_ht_cap_enabled(dev)) { | ||
1732 | printk(KERN_WARNING "PCI: MSI quirk detected. " | ||
1733 | "MSI disabled on chipset %s.\n", | ||
1734 | pci_name(dev)); | ||
1735 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | ||
1736 | } | ||
1737 | } | ||
1738 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, | ||
1739 | quirk_msi_ht_cap); | ||
1740 | |||
1741 | /* The nVidia CK804 chipset may have 2 HT MSI mappings. | ||
1742 | * MSI are supported if the MSI capability set in any of these mappings. | ||
1743 | */ | ||
1744 | static void __devinit quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev) | ||
1745 | { | ||
1746 | struct pci_dev *pdev; | ||
1747 | |||
1748 | if (!dev->subordinate) | ||
1749 | return; | ||
1750 | |||
1751 | /* check HT MSI cap on this chipset and the root one. | ||
1752 | * a single one having MSI is enough to be sure that MSI are supported. | ||
1753 | */ | ||
1754 | pdev = pci_find_slot(dev->bus->number, 0); | ||
1755 | if (dev->subordinate && !msi_ht_cap_enabled(dev) | ||
1756 | && !msi_ht_cap_enabled(pdev)) { | ||
1757 | printk(KERN_WARNING "PCI: MSI quirk detected. " | ||
1758 | "MSI disabled on chipset %s.\n", | ||
1759 | pci_name(dev)); | ||
1760 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | ||
1761 | } | ||
1762 | } | ||
1763 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE, | ||
1764 | quirk_nvidia_ck804_msi_ht_cap); | ||
1706 | #endif /* CONFIG_PCI_MSI */ | 1765 | #endif /* CONFIG_PCI_MSI */ |
1707 | 1766 | ||
1708 | EXPORT_SYMBOL(pcie_mch_quirk); | 1767 | EXPORT_SYMBOL(pcie_mch_quirk); |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 6a1e09834559..b9e263adebab 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -1411,6 +1411,7 @@ | |||
1411 | #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 | 1411 | #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 |
1412 | #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 | 1412 | #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 |
1413 | #define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 | 1413 | #define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 |
1414 | #define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132 | ||
1414 | #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 | 1415 | #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 |
1415 | #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 | 1416 | #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 |
1416 | #define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 | 1417 | #define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 |