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-rw-r--r--drivers/media/video/cx18/cx18-driver.h4
-rw-r--r--drivers/media/video/cx18/cx18-io.c20
-rw-r--r--drivers/media/video/cx18/cx18-irq.c13
-rw-r--r--drivers/media/video/cx18/cx18-mailbox.c7
4 files changed, 22 insertions, 22 deletions
diff --git a/drivers/media/video/cx18/cx18-driver.h b/drivers/media/video/cx18/cx18-driver.h
index 02a82c3b7a32..cad352aeb837 100644
--- a/drivers/media/video/cx18/cx18-driver.h
+++ b/drivers/media/video/cx18/cx18-driver.h
@@ -446,6 +446,10 @@ struct cx18 {
446 /* when the current DMA is finished this queue is woken up */ 446 /* when the current DMA is finished this queue is woken up */
447 wait_queue_head_t dma_waitq; 447 wait_queue_head_t dma_waitq;
448 448
449 u32 sw1_irq_mask;
450 u32 sw2_irq_mask;
451 u32 hw2_irq_mask;
452
449 struct cx18_epu_work_order epu_work_order[CX18_MAX_EPU_WORK_ORDERS]; 453 struct cx18_epu_work_order epu_work_order[CX18_MAX_EPU_WORK_ORDERS];
450 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */ 454 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
451 455
diff --git a/drivers/media/video/cx18/cx18-io.c b/drivers/media/video/cx18/cx18-io.c
index a2b5e807faca..c6f1d0d7f2c2 100644
--- a/drivers/media/video/cx18/cx18-io.c
+++ b/drivers/media/video/cx18/cx18-io.c
@@ -71,32 +71,28 @@ void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
71 71
72void cx18_sw1_irq_enable(struct cx18 *cx, u32 val) 72void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
73{ 73{
74 u32 r;
75 cx18_write_reg_expect(cx, val, SW1_INT_STATUS, ~val, val); 74 cx18_write_reg_expect(cx, val, SW1_INT_STATUS, ~val, val);
76 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI); 75 cx->sw1_irq_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI) | val;
77 cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI); 76 cx18_write_reg(cx, cx->sw1_irq_mask, SW1_INT_ENABLE_PCI);
78} 77}
79 78
80void cx18_sw1_irq_disable(struct cx18 *cx, u32 val) 79void cx18_sw1_irq_disable(struct cx18 *cx, u32 val)
81{ 80{
82 u32 r; 81 cx->sw1_irq_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI) & ~val;
83 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI); 82 cx18_write_reg(cx, cx->sw1_irq_mask, SW1_INT_ENABLE_PCI);
84 cx18_write_reg(cx, r & ~val, SW1_INT_ENABLE_PCI);
85} 83}
86 84
87void cx18_sw2_irq_enable(struct cx18 *cx, u32 val) 85void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
88{ 86{
89 u32 r;
90 cx18_write_reg_expect(cx, val, SW2_INT_STATUS, ~val, val); 87 cx18_write_reg_expect(cx, val, SW2_INT_STATUS, ~val, val);
91 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI); 88 cx->sw2_irq_mask = cx18_read_reg(cx, SW2_INT_ENABLE_PCI) | val;
92 cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI); 89 cx18_write_reg(cx, cx->sw2_irq_mask, SW2_INT_ENABLE_PCI);
93} 90}
94 91
95void cx18_sw2_irq_disable(struct cx18 *cx, u32 val) 92void cx18_sw2_irq_disable(struct cx18 *cx, u32 val)
96{ 93{
97 u32 r; 94 cx->sw2_irq_mask = cx18_read_reg(cx, SW2_INT_ENABLE_PCI) & ~val;
98 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI); 95 cx18_write_reg(cx, cx->sw2_irq_mask, SW2_INT_ENABLE_PCI);
99 cx18_write_reg(cx, r & ~val, SW2_INT_ENABLE_PCI);
100} 96}
101 97
102void cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val) 98void cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val)
diff --git a/drivers/media/video/cx18/cx18-irq.c b/drivers/media/video/cx18/cx18-irq.c
index bc36a6b8f775..2a94e50ad0a8 100644
--- a/drivers/media/video/cx18/cx18-irq.c
+++ b/drivers/media/video/cx18/cx18-irq.c
@@ -44,16 +44,11 @@ static void epu_cmd(struct cx18 *cx, u32 sw1)
44irqreturn_t cx18_irq_handler(int irq, void *dev_id) 44irqreturn_t cx18_irq_handler(int irq, void *dev_id)
45{ 45{
46 struct cx18 *cx = (struct cx18 *)dev_id; 46 struct cx18 *cx = (struct cx18 *)dev_id;
47 u32 sw1, sw1_mask; 47 u32 sw1, sw2, hw2;
48 u32 sw2, sw2_mask;
49 u32 hw2, hw2_mask;
50 48
51 sw1_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI); 49 sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & cx->sw1_irq_mask;
52 sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & sw1_mask; 50 sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & cx->sw2_irq_mask;
53 sw2_mask = cx18_read_reg(cx, SW2_INT_ENABLE_PCI); 51 hw2 = cx18_read_reg(cx, HW2_INT_CLR_STATUS) & cx->hw2_irq_mask;
54 sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & sw2_mask;
55 hw2_mask = cx18_read_reg(cx, HW2_INT_MASK5_PCI);
56 hw2 = cx18_read_reg(cx, HW2_INT_CLR_STATUS) & hw2_mask;
57 52
58 if (sw1) 53 if (sw1)
59 cx18_write_reg_expect(cx, sw1, SW1_INT_STATUS, ~sw1, sw1); 54 cx18_write_reg_expect(cx, sw1, SW1_INT_STATUS, ~sw1, sw1);
diff --git a/drivers/media/video/cx18/cx18-mailbox.c b/drivers/media/video/cx18/cx18-mailbox.c
index 844a62de6535..e5d4f3112293 100644
--- a/drivers/media/video/cx18/cx18-mailbox.c
+++ b/drivers/media/video/cx18/cx18-mailbox.c
@@ -399,7 +399,12 @@ void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)
399 order->flags = 0; 399 order->flags = 0;
400 order->rpu = rpu; 400 order->rpu = rpu;
401 order_mb = &order->mb; 401 order_mb = &order->mb;
402 cx18_memcpy_fromio(cx, order_mb, mb, sizeof(struct cx18_mailbox)); 402
403 /* mb->cmd and mb->args[0] through mb->args[2] */
404 cx18_memcpy_fromio(cx, &order_mb->cmd, &mb->cmd, 4 * sizeof(u32));
405 /* mb->request and mb->ack. N.B. we want to read mb->ack last */
406 cx18_memcpy_fromio(cx, &order_mb->request, &mb->request,
407 2 * sizeof(u32));
403 408
404 if (order_mb->request == order_mb->ack) { 409 if (order_mb->request == order_mb->ack) {
405 CX18_WARN("Possibly falling behind: %s self-ack'ed our incoming" 410 CX18_WARN("Possibly falling behind: %s self-ack'ed our incoming"