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-rw-r--r--include/asm-sh/system.h97
-rw-r--r--include/asm-sh/system_32.h97
-rw-r--r--include/asm-sh/system_64.h39
-rw-r--r--include/asm-sh64/system.h190
4 files changed, 144 insertions, 279 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 288abeb5476f..0cfa96aa5844 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -12,60 +12,9 @@
12#include <asm/types.h> 12#include <asm/types.h>
13#include <asm/ptrace.h> 13#include <asm/ptrace.h>
14 14
15struct task_struct *__switch_to(struct task_struct *prev,
16 struct task_struct *next);
17
18#define AT_VECTOR_SIZE_ARCH 1 /* entries in ARCH_DLINFO */ 15#define AT_VECTOR_SIZE_ARCH 1 /* entries in ARCH_DLINFO */
19/*
20 * switch_to() should switch tasks to task nr n, first
21 */
22
23#define switch_to(prev, next, last) do { \
24 struct task_struct *__last; \
25 register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp; \
26 register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc; \
27 register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev; \
28 register unsigned long *__ts5 __asm__ ("r5") = (unsigned long *)next; \
29 register unsigned long *__ts6 __asm__ ("r6") = &next->thread.sp; \
30 register unsigned long __ts7 __asm__ ("r7") = next->thread.pc; \
31 __asm__ __volatile__ (".balign 4\n\t" \
32 "stc.l gbr, @-r15\n\t" \
33 "sts.l pr, @-r15\n\t" \
34 "mov.l r8, @-r15\n\t" \
35 "mov.l r9, @-r15\n\t" \
36 "mov.l r10, @-r15\n\t" \
37 "mov.l r11, @-r15\n\t" \
38 "mov.l r12, @-r15\n\t" \
39 "mov.l r13, @-r15\n\t" \
40 "mov.l r14, @-r15\n\t" \
41 "mov.l r15, @r1 ! save SP\n\t" \
42 "mov.l @r6, r15 ! change to new stack\n\t" \
43 "mova 1f, %0\n\t" \
44 "mov.l %0, @r2 ! save PC\n\t" \
45 "mov.l 2f, %0\n\t" \
46 "jmp @%0 ! call __switch_to\n\t" \
47 " lds r7, pr ! with return to new PC\n\t" \
48 ".balign 4\n" \
49 "2:\n\t" \
50 ".long __switch_to\n" \
51 "1:\n\t" \
52 "mov.l @r15+, r14\n\t" \
53 "mov.l @r15+, r13\n\t" \
54 "mov.l @r15+, r12\n\t" \
55 "mov.l @r15+, r11\n\t" \
56 "mov.l @r15+, r10\n\t" \
57 "mov.l @r15+, r9\n\t" \
58 "mov.l @r15+, r8\n\t" \
59 "lds.l @r15+, pr\n\t" \
60 "ldc.l @r15+, gbr\n\t" \
61 : "=z" (__last) \
62 : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
63 "r" (__ts5), "r" (__ts6), "r" (__ts7) \
64 : "r3", "t"); \
65 last = __last; \
66} while (0)
67 16
68#ifdef CONFIG_CPU_SH4A 17#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
69#define __icbi() \ 18#define __icbi() \
70{ \ 19{ \
71 unsigned long __addr; \ 20 unsigned long __addr; \
@@ -91,7 +40,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
91 * Historically we have only done this type of barrier for the MMUCR, but 40 * Historically we have only done this type of barrier for the MMUCR, but
92 * it's also necessary for the CCR, so we make it generic here instead. 41 * it's also necessary for the CCR, so we make it generic here instead.
93 */ 42 */
94#ifdef CONFIG_CPU_SH4A 43#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
95#define mb() __asm__ __volatile__ ("synco": : :"memory") 44#define mb() __asm__ __volatile__ ("synco": : :"memory")
96#define rmb() mb() 45#define rmb() mb()
97#define wmb() __asm__ __volatile__ ("synco": : :"memory") 46#define wmb() __asm__ __volatile__ ("synco": : :"memory")
@@ -119,42 +68,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
119 68
120#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) 69#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
121 70
122/*
123 * Jump to P2 area.
124 * When handling TLB or caches, we need to do it from P2 area.
125 */
126#define jump_to_P2() \
127do { \
128 unsigned long __dummy; \
129 __asm__ __volatile__( \
130 "mov.l 1f, %0\n\t" \
131 "or %1, %0\n\t" \
132 "jmp @%0\n\t" \
133 " nop\n\t" \
134 ".balign 4\n" \
135 "1: .long 2f\n" \
136 "2:" \
137 : "=&r" (__dummy) \
138 : "r" (0x20000000)); \
139} while (0)
140
141/*
142 * Back to P1 area.
143 */
144#define back_to_P1() \
145do { \
146 unsigned long __dummy; \
147 ctrl_barrier(); \
148 __asm__ __volatile__( \
149 "mov.l 1f, %0\n\t" \
150 "jmp @%0\n\t" \
151 " nop\n\t" \
152 ".balign 4\n" \
153 "1: .long 2f\n" \
154 "2:" \
155 : "=&r" (__dummy)); \
156} while (0)
157
158static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) 71static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
159{ 72{
160 unsigned long flags, retval; 73 unsigned long flags, retval;
@@ -281,4 +194,10 @@ asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5,
281 194
282#define arch_align_stack(x) (x) 195#define arch_align_stack(x) (x)
283 196
197#ifdef CONFIG_SUPERH32
198# include "system_32.h"
199#else
200# include "system_64.h"
201#endif
202
284#endif 203#endif
diff --git a/include/asm-sh/system_32.h b/include/asm-sh/system_32.h
new file mode 100644
index 000000000000..ad37e8d5f31e
--- /dev/null
+++ b/include/asm-sh/system_32.h
@@ -0,0 +1,97 @@
1#ifndef __ASM_SH_SYSTEM_32_H
2#define __ASM_SH_SYSTEM_32_H
3
4#include <linux/types.h>
5
6struct task_struct *__switch_to(struct task_struct *prev,
7 struct task_struct *next);
8
9/*
10 * switch_to() should switch tasks to task nr n, first
11 */
12#define switch_to(prev, next, last) \
13do { \
14 register u32 *__ts1 __asm__ ("r1") = &prev->thread.sp; \
15 register u32 *__ts2 __asm__ ("r2") = &prev->thread.pc; \
16 register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \
17 register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \
18 register u32 *__ts6 __asm__ ("r6") = &next->thread.sp; \
19 register u32 __ts7 __asm__ ("r7") = next->thread.pc; \
20 struct task_struct *__last; \
21 \
22 __asm__ __volatile__ ( \
23 ".balign 4\n\t" \
24 "stc.l gbr, @-r15\n\t" \
25 "sts.l pr, @-r15\n\t" \
26 "mov.l r8, @-r15\n\t" \
27 "mov.l r9, @-r15\n\t" \
28 "mov.l r10, @-r15\n\t" \
29 "mov.l r11, @-r15\n\t" \
30 "mov.l r12, @-r15\n\t" \
31 "mov.l r13, @-r15\n\t" \
32 "mov.l r14, @-r15\n\t" \
33 "mov.l r15, @r1\t! save SP\n\t" \
34 "mov.l @r6, r15\t! change to new stack\n\t" \
35 "mova 1f, %0\n\t" \
36 "mov.l %0, @r2\t! save PC\n\t" \
37 "mov.l 2f, %0\n\t" \
38 "jmp @%0\t! call __switch_to\n\t" \
39 " lds r7, pr\t! with return to new PC\n\t" \
40 ".balign 4\n" \
41 "2:\n\t" \
42 ".long __switch_to\n" \
43 "1:\n\t" \
44 "mov.l @r15+, r14\n\t" \
45 "mov.l @r15+, r13\n\t" \
46 "mov.l @r15+, r12\n\t" \
47 "mov.l @r15+, r11\n\t" \
48 "mov.l @r15+, r10\n\t" \
49 "mov.l @r15+, r9\n\t" \
50 "mov.l @r15+, r8\n\t" \
51 "lds.l @r15+, pr\n\t" \
52 "ldc.l @r15+, gbr\n\t" \
53 : "=z" (__last) \
54 : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
55 "r" (__ts5), "r" (__ts6), "r" (__ts7) \
56 : "r3", "t"); \
57 \
58 last = __last; \
59} while (0)
60
61/*
62 * Jump to P2 area.
63 * When handling TLB or caches, we need to do it from P2 area.
64 */
65#define jump_to_P2() \
66do { \
67 unsigned long __dummy; \
68 __asm__ __volatile__( \
69 "mov.l 1f, %0\n\t" \
70 "or %1, %0\n\t" \
71 "jmp @%0\n\t" \
72 " nop\n\t" \
73 ".balign 4\n" \
74 "1: .long 2f\n" \
75 "2:" \
76 : "=&r" (__dummy) \
77 : "r" (0x20000000)); \
78} while (0)
79
80/*
81 * Back to P1 area.
82 */
83#define back_to_P1() \
84do { \
85 unsigned long __dummy; \
86 ctrl_barrier(); \
87 __asm__ __volatile__( \
88 "mov.l 1f, %0\n\t" \
89 "jmp @%0\n\t" \
90 " nop\n\t" \
91 ".balign 4\n" \
92 "1: .long 2f\n" \
93 "2:" \
94 : "=&r" (__dummy)); \
95} while (0)
96
97#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/include/asm-sh/system_64.h b/include/asm-sh/system_64.h
new file mode 100644
index 000000000000..0e466e991f7d
--- /dev/null
+++ b/include/asm-sh/system_64.h
@@ -0,0 +1,39 @@
1#ifndef __ASM_SH_SYSTEM_64_H
2#define __ASM_SH_SYSTEM_64_H
3
4/*
5 * include/asm-sh/system_64.h
6 *
7 * Copyright (C) 2000, 2001 Paolo Alberelli
8 * Copyright (C) 2003 Paul Mundt
9 * Copyright (C) 2004 Richard Curnow
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <asm/processor.h>
16
17/*
18 * switch_to() should switch tasks to task nr n, first
19 */
20struct task_struct *sh64_switch_to(struct task_struct *prev,
21 struct thread_struct *prev_thread,
22 struct task_struct *next,
23 struct thread_struct *next_thread);
24
25#define switch_to(prev,next,last) \
26do { \
27 if (last_task_used_math != next) { \
28 struct pt_regs *regs = next->thread.uregs; \
29 if (regs) regs->sr |= SR_FD; \
30 } \
31 last = sh64_switch_to(prev, &prev->thread, next, \
32 &next->thread); \
33} while (0)
34
35/* No segmentation.. */
36#define jump_to_P2() do { } while (0)
37#define back_to_P1() do { } while (0)
38
39#endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/include/asm-sh64/system.h b/include/asm-sh64/system.h
deleted file mode 100644
index be2a15ffcc55..000000000000
--- a/include/asm-sh64/system.h
+++ /dev/null
@@ -1,190 +0,0 @@
1#ifndef __ASM_SH64_SYSTEM_H
2#define __ASM_SH64_SYSTEM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/system.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 * Copyright (C) 2004 Richard Curnow
14 *
15 */
16
17#include <asm/registers.h>
18#include <asm/processor.h>
19
20/*
21 * switch_to() should switch tasks to task nr n, first
22 */
23
24typedef struct {
25 unsigned long seg;
26} mm_segment_t;
27
28extern struct task_struct *sh64_switch_to(struct task_struct *prev,
29 struct thread_struct *prev_thread,
30 struct task_struct *next,
31 struct thread_struct *next_thread);
32
33#define switch_to(prev,next,last) \
34 do {\
35 if (last_task_used_math != next) {\
36 struct pt_regs *regs = next->thread.uregs;\
37 if (regs) regs->sr |= SR_FD;\
38 }\
39 last = sh64_switch_to(prev, &prev->thread, next, &next->thread);\
40 } while(0)
41
42#define nop() __asm__ __volatile__ ("nop")
43
44#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
45
46extern void __xchg_called_with_bad_pointer(void);
47
48#define mb() __asm__ __volatile__ ("synco": : :"memory")
49#define rmb() mb()
50#define wmb() __asm__ __volatile__ ("synco": : :"memory")
51#define read_barrier_depends() do { } while (0)
52
53#ifdef CONFIG_SMP
54#define smp_mb() mb()
55#define smp_rmb() rmb()
56#define smp_wmb() wmb()
57#define smp_read_barrier_depends() read_barrier_depends()
58#else
59#define smp_mb() barrier()
60#define smp_rmb() barrier()
61#define smp_wmb() barrier()
62#define smp_read_barrier_depends() do { } while (0)
63#endif /* CONFIG_SMP */
64
65#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
66
67/* Interrupt Control */
68#ifndef HARD_CLI
69#define SR_MASK_L 0x000000f0L
70#define SR_MASK_LL 0x00000000000000f0LL
71#else
72#define SR_MASK_L 0x10000000L
73#define SR_MASK_LL 0x0000000010000000LL
74#endif
75
76static __inline__ void local_irq_enable(void)
77{
78 /* cli/sti based on SR.BL */
79 unsigned long long __dummy0, __dummy1=~SR_MASK_LL;
80
81 __asm__ __volatile__("getcon " __SR ", %0\n\t"
82 "and %0, %1, %0\n\t"
83 "putcon %0, " __SR "\n\t"
84 : "=&r" (__dummy0)
85 : "r" (__dummy1));
86}
87
88static __inline__ void local_irq_disable(void)
89{
90 /* cli/sti based on SR.BL */
91 unsigned long long __dummy0, __dummy1=SR_MASK_LL;
92 __asm__ __volatile__("getcon " __SR ", %0\n\t"
93 "or %0, %1, %0\n\t"
94 "putcon %0, " __SR "\n\t"
95 : "=&r" (__dummy0)
96 : "r" (__dummy1));
97}
98
99#define local_save_flags(x) \
100(__extension__ ({ unsigned long long __dummy=SR_MASK_LL; \
101 __asm__ __volatile__( \
102 "getcon " __SR ", %0\n\t" \
103 "and %0, %1, %0" \
104 : "=&r" (x) \
105 : "r" (__dummy));}))
106
107#define local_irq_save(x) \
108(__extension__ ({ unsigned long long __d2=SR_MASK_LL, __d1; \
109 __asm__ __volatile__( \
110 "getcon " __SR ", %1\n\t" \
111 "or %1, r63, %0\n\t" \
112 "or %1, %2, %1\n\t" \
113 "putcon %1, " __SR "\n\t" \
114 "and %0, %2, %0" \
115 : "=&r" (x), "=&r" (__d1) \
116 : "r" (__d2));}));
117
118#define local_irq_restore(x) do { \
119 if ( ((x) & SR_MASK_L) == 0 ) /* dropping to 0 ? */ \
120 local_irq_enable(); /* yes...re-enable */ \
121} while (0)
122
123#define irqs_disabled() \
124({ \
125 unsigned long flags; \
126 local_save_flags(flags); \
127 (flags != 0); \
128})
129
130static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
131{
132 unsigned long flags, retval;
133
134 local_irq_save(flags);
135 retval = *m;
136 *m = val;
137 local_irq_restore(flags);
138 return retval;
139}
140
141static inline unsigned long xchg_u8(volatile unsigned char * m, unsigned long val)
142{
143 unsigned long flags, retval;
144
145 local_irq_save(flags);
146 retval = *m;
147 *m = val & 0xff;
148 local_irq_restore(flags);
149 return retval;
150}
151
152static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
153{
154 switch (size) {
155 case 4:
156 return xchg_u32(ptr, x);
157 break;
158 case 1:
159 return xchg_u8(ptr, x);
160 break;
161 }
162 __xchg_called_with_bad_pointer();
163 return x;
164}
165
166/* XXX
167 * disable hlt during certain critical i/o operations
168 */
169#define HAVE_DISABLE_HLT
170void disable_hlt(void);
171void enable_hlt(void);
172
173
174#define smp_mb() barrier()
175#define smp_rmb() barrier()
176#define smp_wmb() barrier()
177
178#ifdef CONFIG_SH_ALPHANUMERIC
179/* This is only used for debugging. */
180extern void print_seg(char *file,int line);
181#define PLS() print_seg(__FILE__,__LINE__)
182#else /* CONFIG_SH_ALPHANUMERIC */
183#define PLS()
184#endif /* CONFIG_SH_ALPHANUMERIC */
185
186#define PL() printk("@ <%s,%s:%d>\n",__FILE__,__FUNCTION__,__LINE__)
187
188#define arch_align_stack(x) (x)
189
190#endif /* __ASM_SH64_SYSTEM_H */
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