diff options
| -rw-r--r-- | arch/ppc/platforms/83xx/mpc834x_sys.c | 28 | ||||
| -rw-r--r-- | arch/ppc/platforms/85xx/mpc8540_ads.c | 46 | ||||
| -rw-r--r-- | arch/ppc/platforms/85xx/mpc8560_ads.c | 28 | ||||
| -rw-r--r-- | arch/ppc/platforms/85xx/sbc8560.c | 28 | ||||
| -rw-r--r-- | arch/ppc/platforms/85xx/stx_gp3.c | 26 |
5 files changed, 89 insertions, 67 deletions
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index 37ece1542799..ddd04d4c1ea9 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c | |||
| @@ -94,20 +94,24 @@ mpc834x_sys_setup_arch(void) | |||
| 94 | 94 | ||
| 95 | /* setup the board related information for the enet controllers */ | 95 | /* setup the board related information for the enet controllers */ |
| 96 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); | 96 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); |
| 97 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 97 | if (pdata) { |
| 98 | pdata->interruptPHY = MPC83xx_IRQ_EXT1; | 98 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 99 | pdata->phyid = 0; | 99 | pdata->interruptPHY = MPC83xx_IRQ_EXT1; |
| 100 | /* fixup phy address */ | 100 | pdata->phyid = 0; |
| 101 | pdata->phy_reg_addr += binfo->bi_immr_base; | 101 | /* fixup phy address */ |
| 102 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 102 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 103 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | ||
| 104 | } | ||
| 103 | 105 | ||
| 104 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); | 106 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); |
| 105 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 107 | if (pdata) { |
| 106 | pdata->interruptPHY = MPC83xx_IRQ_EXT2; | 108 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 107 | pdata->phyid = 1; | 109 | pdata->interruptPHY = MPC83xx_IRQ_EXT2; |
| 108 | /* fixup phy address */ | 110 | pdata->phyid = 1; |
| 109 | pdata->phy_reg_addr += binfo->bi_immr_base; | 111 | /* fixup phy address */ |
| 110 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 112 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 113 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | ||
| 114 | } | ||
| 111 | 115 | ||
| 112 | #ifdef CONFIG_BLK_DEV_INITRD | 116 | #ifdef CONFIG_BLK_DEV_INITRD |
| 113 | if (initrd_start) | 117 | if (initrd_start) |
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c index a2ed611cd936..ddd2e9a5bb12 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.c +++ b/arch/ppc/platforms/85xx/mpc8540_ads.c | |||
| @@ -92,28 +92,34 @@ mpc8540ads_setup_arch(void) | |||
| 92 | 92 | ||
| 93 | /* setup the board related information for the enet controllers */ | 93 | /* setup the board related information for the enet controllers */ |
| 94 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 94 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
| 95 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 95 | if (pdata) { |
| 96 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 96 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 97 | pdata->phyid = 0; | 97 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 98 | /* fixup phy address */ | 98 | pdata->phyid = 0; |
| 99 | pdata->phy_reg_addr += binfo->bi_immr_base; | 99 | /* fixup phy address */ |
| 100 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 100 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 101 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | ||
| 102 | } | ||
| 101 | 103 | ||
| 102 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 104 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
| 103 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 105 | if (pdata) { |
| 104 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 106 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 105 | pdata->phyid = 1; | 107 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 106 | /* fixup phy address */ | 108 | pdata->phyid = 1; |
| 107 | pdata->phy_reg_addr += binfo->bi_immr_base; | 109 | /* fixup phy address */ |
| 108 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 110 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 109 | 111 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | |
| 110 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); | 112 | } |
| 111 | pdata->board_flags = 0; | 113 | |
| 112 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 114 | if (pdata) { |
| 113 | pdata->phyid = 3; | 115 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); |
| 114 | /* fixup phy address */ | 116 | pdata->board_flags = 0; |
| 115 | pdata->phy_reg_addr += binfo->bi_immr_base; | 117 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 116 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); | 118 | pdata->phyid = 3; |
| 119 | /* fixup phy address */ | ||
| 120 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
| 121 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); | ||
| 122 | } | ||
| 117 | 123 | ||
| 118 | #ifdef CONFIG_BLK_DEV_INITRD | 124 | #ifdef CONFIG_BLK_DEV_INITRD |
| 119 | if (initrd_start) | 125 | if (initrd_start) |
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index d87dfd5ce0a2..e18380258b68 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c | |||
| @@ -90,20 +90,24 @@ mpc8560ads_setup_arch(void) | |||
| 90 | 90 | ||
| 91 | /* setup the board related information for the enet controllers */ | 91 | /* setup the board related information for the enet controllers */ |
| 92 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 92 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
| 93 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 93 | if (pdata) { |
| 94 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 94 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 95 | pdata->phyid = 0; | 95 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 96 | /* fixup phy address */ | 96 | pdata->phyid = 0; |
| 97 | pdata->phy_reg_addr += binfo->bi_immr_base; | 97 | /* fixup phy address */ |
| 98 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 98 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 99 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | ||
| 100 | } | ||
| 99 | 101 | ||
| 100 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 102 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
| 101 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 103 | if (pdata) { |
| 102 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 104 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 103 | pdata->phyid = 1; | 105 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 104 | /* fixup phy address */ | 106 | pdata->phyid = 1; |
| 105 | pdata->phy_reg_addr += binfo->bi_immr_base; | 107 | /* fixup phy address */ |
| 106 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 108 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 109 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | ||
| 110 | } | ||
| 107 | 111 | ||
| 108 | #ifdef CONFIG_BLK_DEV_INITRD | 112 | #ifdef CONFIG_BLK_DEV_INITRD |
| 109 | if (initrd_start) | 113 | if (initrd_start) |
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c index 3dbdd73618eb..165df94d4aa6 100644 --- a/arch/ppc/platforms/85xx/sbc8560.c +++ b/arch/ppc/platforms/85xx/sbc8560.c | |||
| @@ -129,20 +129,24 @@ sbc8560_setup_arch(void) | |||
| 129 | 129 | ||
| 130 | /* setup the board related information for the enet controllers */ | 130 | /* setup the board related information for the enet controllers */ |
| 131 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 131 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
| 132 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 132 | if (pdata) { |
| 133 | pdata->interruptPHY = MPC85xx_IRQ_EXT6; | 133 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 134 | pdata->phyid = 25; | 134 | pdata->interruptPHY = MPC85xx_IRQ_EXT6; |
| 135 | /* fixup phy address */ | 135 | pdata->phyid = 25; |
| 136 | pdata->phy_reg_addr += binfo->bi_immr_base; | 136 | /* fixup phy address */ |
| 137 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 137 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 138 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | ||
| 139 | } | ||
| 138 | 140 | ||
| 139 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 141 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
| 140 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 142 | if (pdata) { |
| 141 | pdata->interruptPHY = MPC85xx_IRQ_EXT7; | 143 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
| 142 | pdata->phyid = 26; | 144 | pdata->interruptPHY = MPC85xx_IRQ_EXT7; |
| 143 | /* fixup phy address */ | 145 | pdata->phyid = 26; |
| 144 | pdata->phy_reg_addr += binfo->bi_immr_base; | 146 | /* fixup phy address */ |
| 145 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 147 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 148 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | ||
| 149 | } | ||
| 146 | 150 | ||
| 147 | #ifdef CONFIG_BLK_DEV_INITRD | 151 | #ifdef CONFIG_BLK_DEV_INITRD |
| 148 | if (initrd_start) | 152 | if (initrd_start) |
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c index 9455bb6b45e9..bb41265cfc85 100644 --- a/arch/ppc/platforms/85xx/stx_gp3.c +++ b/arch/ppc/platforms/85xx/stx_gp3.c | |||
| @@ -122,19 +122,23 @@ gp3_setup_arch(void) | |||
| 122 | 122 | ||
| 123 | /* setup the board related information for the enet controllers */ | 123 | /* setup the board related information for the enet controllers */ |
| 124 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 124 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
| 125 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ | 125 | if (pdata) { |
| 126 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 126 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ |
| 127 | pdata->phyid = 2; | 127 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 128 | pdata->phy_reg_addr += binfo->bi_immr_base; | 128 | pdata->phyid = 2; |
| 129 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 129 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 130 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | ||
| 131 | } | ||
| 130 | 132 | ||
| 131 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 133 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
| 132 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ | 134 | if (pdata) { |
| 133 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 135 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ |
| 134 | pdata->phyid = 4; | 136 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; |
| 135 | /* fixup phy address */ | 137 | pdata->phyid = 4; |
| 136 | pdata->phy_reg_addr += binfo->bi_immr_base; | 138 | /* fixup phy address */ |
| 137 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 139 | pdata->phy_reg_addr += binfo->bi_immr_base; |
| 140 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | ||
| 141 | } | ||
| 138 | 142 | ||
| 139 | #ifdef CONFIG_BLK_DEV_INITRD | 143 | #ifdef CONFIG_BLK_DEV_INITRD |
| 140 | if (initrd_start) | 144 | if (initrd_start) |
