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-rw-r--r--arch/powerpc/kernel/cputable.c15
-rw-r--r--arch/powerpc/kernel/head_booke.h6
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S10
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype7
-rw-r--r--include/asm-powerpc/cache.h3
-rw-r--r--include/asm-powerpc/cputable.h6
-rw-r--r--include/asm-powerpc/synch.h2
7 files changed, 42 insertions, 7 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index e44d5530f0a6..aa421f5651c8 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1522,6 +1522,21 @@ static struct cpu_spec __initdata cpu_specs[] = {
1522 .machine_check = machine_check_e500, 1522 .machine_check = machine_check_e500,
1523 .platform = "ppc8548", 1523 .platform = "ppc8548",
1524 }, 1524 },
1525 { /* e500mc */
1526 .pvr_mask = 0xffff0000,
1527 .pvr_value = 0x80230000,
1528 .cpu_name = "e500mc",
1529 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1530 .cpu_features = CPU_FTRS_E500MC,
1531 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1532 .icache_bsize = 64,
1533 .dcache_bsize = 64,
1534 .num_pmcs = 4,
1535 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
1536 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1537 .machine_check = machine_check_e500,
1538 .platform = "ppce500mc",
1539 },
1525 { /* default match */ 1540 { /* default match */
1526 .pvr_mask = 0x00000000, 1541 .pvr_mask = 0x00000000,
1527 .pvr_value = 0x00000000, 1542 .pvr_value = 0x00000000,
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 9501c580ce87..505494f1ee7c 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -68,9 +68,13 @@
68#define MCHECK_STACK_BASE mcheckirq_ctx 68#define MCHECK_STACK_BASE mcheckirq_ctx
69#define CRIT_STACK_BASE critirq_ctx 69#define CRIT_STACK_BASE critirq_ctx
70 70
71/* only on e200 for now */ 71/* only on e500mc/e200 */
72#define DEBUG_STACK_BASE dbgirq_ctx 72#define DEBUG_STACK_BASE dbgirq_ctx
73#ifdef CONFIG_PPC_E500MC
74#define DEBUG_SPRG SPRN_SPRG9
75#else
73#define DEBUG_SPRG SPRN_SPRG6W 76#define DEBUG_SPRG SPRN_SPRG6W
77#endif
74 78
75#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) 79#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
76 80
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 503f86030b6e..7c2b65380658 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -304,7 +304,7 @@ skpinv: addi r6,r6,1 /* Increment */
304 SET_IVOR(13, DataTLBError); 304 SET_IVOR(13, DataTLBError);
305 SET_IVOR(14, InstructionTLBError); 305 SET_IVOR(14, InstructionTLBError);
306 SET_IVOR(15, DebugDebug); 306 SET_IVOR(15, DebugDebug);
307#if defined(CONFIG_E500) 307#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
308 SET_IVOR(15, DebugCrit); 308 SET_IVOR(15, DebugCrit);
309#endif 309#endif
310 SET_IVOR(32, SPEUnavailable); 310 SET_IVOR(32, SPEUnavailable);
@@ -313,6 +313,9 @@ skpinv: addi r6,r6,1 /* Increment */
313#ifndef CONFIG_E200 313#ifndef CONFIG_E200
314 SET_IVOR(35, PerformanceMonitor); 314 SET_IVOR(35, PerformanceMonitor);
315#endif 315#endif
316#ifdef CONFIG_PPC_E500MC
317 SET_IVOR(36, Doorbell);
318#endif
316 319
317 /* Establish the interrupt vector base */ 320 /* Establish the interrupt vector base */
318 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ 321 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
@@ -750,10 +753,13 @@ interrupt_base:
750 /* Performance Monitor */ 753 /* Performance Monitor */
751 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) 754 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
752 755
756#ifdef CONFIG_PPC_E500MC
757 EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE)
758#endif
753 759
754 /* Debug Interrupt */ 760 /* Debug Interrupt */
755 DEBUG_DEBUG_EXCEPTION 761 DEBUG_DEBUG_EXCEPTION
756#if defined(CONFIG_E500) 762#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
757 DEBUG_CRIT_EXCEPTION 763 DEBUG_CRIT_EXCEPTION
758#endif 764#endif
759 765
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f7efaa925a13..1a1ccfbb9232 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -95,6 +95,11 @@ config E500
95 select FSL_EMB_PERFMON 95 select FSL_EMB_PERFMON
96 bool 96 bool
97 97
98config PPC_E500MC
99 bool "e500mc Support"
100 select PPC_FPU
101 depends on E500
102
98config PPC_FPU 103config PPC_FPU
99 bool 104 bool
100 default y if PPC64 105 default y if PPC64
@@ -157,7 +162,7 @@ config ALTIVEC
157 162
158config SPE 163config SPE
159 bool "SPE Support" 164 bool "SPE Support"
160 depends on E200 || E500 165 depends on E200 || (E500 && !PPC_E500MC)
161 default y 166 default y
162 ---help--- 167 ---help---
163 This option enables kernel support for the Signal Processing 168 This option enables kernel support for the Signal Processing
diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h
index 53507046a1b1..81de6eb3455d 100644
--- a/include/asm-powerpc/cache.h
+++ b/include/asm-powerpc/cache.h
@@ -8,6 +8,9 @@
8#if defined(CONFIG_8xx) || defined(CONFIG_403GCX) 8#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
9#define L1_CACHE_SHIFT 4 9#define L1_CACHE_SHIFT 4
10#define MAX_COPY_PREFETCH 1 10#define MAX_COPY_PREFETCH 1
11#elif defined(CONFIG_PPC_E500MC)
12#define L1_CACHE_SHIFT 6
13#define MAX_COPY_PREFETCH 4
11#elif defined(CONFIG_PPC32) 14#elif defined(CONFIG_PPC32)
12#define L1_CACHE_SHIFT 5 15#define L1_CACHE_SHIFT 5
13#define MAX_COPY_PREFETCH 4 16#define MAX_COPY_PREFETCH 4
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 1e79673b7316..a3dce178b728 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -351,6 +351,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
351 CPU_FTR_NODSISRALIGN) 351 CPU_FTR_NODSISRALIGN)
352#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ 352#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
353 CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN) 353 CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN)
354#define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS | \
355 CPU_FTR_NODSISRALIGN)
354#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) 356#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
355 357
356/* 64-bit CPUs */ 358/* 64-bit CPUs */
@@ -421,7 +423,7 @@ enum {
421 CPU_FTRS_E200 | 423 CPU_FTRS_E200 |
422#endif 424#endif
423#ifdef CONFIG_E500 425#ifdef CONFIG_E500
424 CPU_FTRS_E500 | CPU_FTRS_E500_2 | 426 CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
425#endif 427#endif
426 0, 428 0,
427}; 429};
@@ -461,7 +463,7 @@ enum {
461 CPU_FTRS_E200 & 463 CPU_FTRS_E200 &
462#endif 464#endif
463#ifdef CONFIG_E500 465#ifdef CONFIG_E500
464 CPU_FTRS_E500 & CPU_FTRS_E500_2 & 466 CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
465#endif 467#endif
466 CPU_FTRS_POSSIBLE, 468 CPU_FTRS_POSSIBLE,
467}; 469};
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
index 2cda3c38a9fa..42a1ef590690 100644
--- a/include/asm-powerpc/synch.h
+++ b/include/asm-powerpc/synch.h
@@ -4,7 +4,7 @@
4 4
5#include <linux/stringify.h> 5#include <linux/stringify.h>
6 6
7#ifdef __powerpc64__ 7#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
8#define __SUBARCH_HAS_LWSYNC 8#define __SUBARCH_HAS_LWSYNC
9#endif 9#endif
10 10