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-rw-r--r--arch/arm/Kconfig11
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-msm/Makefile2
-rw-r--r--arch/arm/mach-msm/Makefile.boot3
-rw-r--r--arch/arm/mach-msm/idle.S36
-rw-r--r--arch/arm/mach-msm/io.c85
-rw-r--r--arch/arm/mm/Kconfig3
-rw-r--r--include/asm-arm/arch-msm/board.h37
-rw-r--r--include/asm-arm/arch-msm/debug-macro.S40
-rw-r--r--include/asm-arm/arch-msm/dma.h1
-rw-r--r--include/asm-arm/arch-msm/entry-macro.S38
-rw-r--r--include/asm-arm/arch-msm/hardware.h18
-rw-r--r--include/asm-arm/arch-msm/io.h33
-rw-r--r--include/asm-arm/arch-msm/irqs.h89
-rw-r--r--include/asm-arm/arch-msm/memory.h27
-rw-r--r--include/asm-arm/arch-msm/msm_iomap.h104
-rw-r--r--include/asm-arm/arch-msm/system.h23
-rw-r--r--include/asm-arm/arch-msm/timex.h20
-rw-r--r--include/asm-arm/arch-msm/uncompress.h36
-rw-r--r--include/asm-arm/arch-msm/vmalloc.h22
20 files changed, 628 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a04f507e7f2c..89c3811132c2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -409,6 +409,17 @@ config ARCH_OMAP
409 help 409 help
410 Support for TI's OMAP platform (OMAP1 and OMAP2). 410 Support for TI's OMAP platform (OMAP1 and OMAP2).
411 411
412config ARCH_MSM7X00A
413 bool "Qualcomm MSM7X00A"
414 select GENERIC_TIME
415 select GENERIC_CLOCKEVENTS
416 help
417 Support for Qualcomm MSM7X00A based systems. This runs on the ARM11
418 apps processor of the MSM7X00A and depends on a shared memory
419 interface to the ARM9 modem processor which runs the baseband stack
420 and controls some vital subsystems (clock and power control, etc).
421 <http://www.cdmatech.com/products/msm7200_chipset_solution.jsp>
422
412endchoice 423endchoice
413 424
414source "arch/arm/mach-clps711x/Kconfig" 425source "arch/arm/mach-clps711x/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 35e56c99ad1d..dd220d189843 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -139,6 +139,7 @@ endif
139 machine-$(CONFIG_ARCH_KS8695) := ks8695 139 machine-$(CONFIG_ARCH_KS8695) := ks8695
140 incdir-$(CONFIG_ARCH_MXC) := mxc 140 incdir-$(CONFIG_ARCH_MXC) := mxc
141 machine-$(CONFIG_ARCH_MX3) := mx3 141 machine-$(CONFIG_ARCH_MX3) := mx3
142 machine-$(CONFIG_ARCH_MSM7X00A) := msm
142 143
143ifeq ($(CONFIG_ARCH_EBSA110),y) 144ifeq ($(CONFIG_ARCH_EBSA110),y)
144# This is what happens if you forget the IOCS16 line. 145# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
new file mode 100644
index 000000000000..feb9e469df9a
--- /dev/null
+++ b/arch/arm/mach-msm/Makefile
@@ -0,0 +1,2 @@
1obj-y += io.o idle.o
2
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
new file mode 100644
index 000000000000..24dfbf8c07c4
--- /dev/null
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x10008000
2params_phys-y := 0x10000100
3initrd_phys-y := 0x10800000
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
new file mode 100644
index 000000000000..2b1cb7f16943
--- /dev/null
+++ b/arch/arm/mach-msm/idle.S
@@ -0,0 +1,36 @@
1/* linux/include/asm-arm/arch-msm/idle.S
2 *
3 * Idle processing for MSM7K - work around bugs with SWFI.
4 *
5 * Copyright (c) 2007 QUALCOMM Incorporated.
6 * Copyright (C) 2007 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/linkage.h>
20#include <asm/assembler.h>
21
22ENTRY(arch_idle)
23#ifdef CONFIG_MSM7X00A_IDLE
24 mrc p15, 0, r1, c1, c0, 0 /* read current CR */
25 bic r0, r1, #(1 << 2) /* clear dcache bit */
26 bic r0, r0, #(1 << 12) /* clear icache bit */
27 mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
28
29 mov r0, #0 /* prepare wfi value */
30 mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
31 mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
32 mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
33
34 mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */
35#endif
36 mov pc, lr
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
new file mode 100644
index 000000000000..c39edb994a88
--- /dev/null
+++ b/arch/arm/mach-msm/io.c
@@ -0,0 +1,85 @@
1/* arch/arm/mach-msm/io.c
2 *
3 * MSM7K io support
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Author: Brian Swetland <swetland@google.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21
22#include <asm/hardware.h>
23#include <asm/io.h>
24#include <asm/page.h>
25#include <asm/arch/msm_iomap.h>
26#include <asm/mach/map.h>
27
28#include <asm/arch/board.h>
29
30#define MSM_DEVICE(name) { \
31 .virtual = MSM_##name##_BASE, \
32 .pfn = __phys_to_pfn(MSM_##name##_PHYS), \
33 .length = MSM_##name##_SIZE, \
34 .type = MT_DEVICE_NONSHARED, \
35 }
36
37static struct map_desc msm_io_desc[] __initdata = {
38 MSM_DEVICE(VIC),
39 MSM_DEVICE(CSR),
40 MSM_DEVICE(GPT),
41 MSM_DEVICE(DMOV),
42 MSM_DEVICE(UART1),
43 MSM_DEVICE(UART2),
44 MSM_DEVICE(UART3),
45 MSM_DEVICE(I2C),
46 MSM_DEVICE(GPIO1),
47 MSM_DEVICE(GPIO2),
48 MSM_DEVICE(HSUSB),
49 MSM_DEVICE(CLK_CTL),
50 MSM_DEVICE(PMDH),
51 MSM_DEVICE(EMDH),
52 MSM_DEVICE(MDP),
53 {
54 .virtual = MSM_SHARED_RAM_BASE,
55 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
56 .length = MSM_SHARED_RAM_SIZE,
57 .type = MT_DEVICE,
58 },
59};
60
61void __init msm_map_common_io(void)
62{
63 /* Make sure the peripheral register window is closed, since
64 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
65 * pages are peripheral interface or not.
66 */
67 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
68
69 iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
70}
71
72void __iomem *
73__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
74{
75 if (mtype == MT_DEVICE) {
76 /* The peripherals in the 88000000 - D0000000 range
77 * are only accessable by type MT_DEVICE_NONSHARED.
78 * Adjust mtype as necessary to make this "just work."
79 */
80 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
81 mtype = MT_DEVICE_NONSHARED;
82 }
83
84 return __arm_ioremap(phys_addr, size, mtype);
85}
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 7868f4dc1d00..bc2ca3c03a48 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -345,8 +345,9 @@ config CPU_XSC3
345# ARMv6 345# ARMv6
346config CPU_V6 346config CPU_V6
347 bool "Support ARM V6 processor" 347 bool "Support ARM V6 processor"
348 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 348 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM7X00A
349 default y if ARCH_MX3 349 default y if ARCH_MX3
350 default y if ARCH_MSM7X00A
350 select CPU_32v6 351 select CPU_32v6
351 select CPU_ABRT_EV6 352 select CPU_ABRT_EV6
352 select CPU_CACHE_V6 353 select CPU_CACHE_V6
diff --git a/include/asm-arm/arch-msm/board.h b/include/asm-arm/arch-msm/board.h
new file mode 100644
index 000000000000..763051f8ba14
--- /dev/null
+++ b/include/asm-arm/arch-msm/board.h
@@ -0,0 +1,37 @@
1/* linux/include/asm-arm/arch-msm/board.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_BOARD_H
18#define __ASM_ARCH_MSM_BOARD_H
19
20#include <linux/types.h>
21
22/* platform device data structures */
23
24struct msm_mddi_platform_data
25{
26 void (*panel_power)(int on);
27 unsigned has_vsync_irq:1;
28};
29
30/* common init routines for use by arch/arm/mach-msm/board-*.c */
31
32void __init msm_add_devices(void);
33void __init msm_map_common_io(void);
34void __init msm_init_irq(void);
35void __init msm_init_gpio(void);
36
37#endif
diff --git a/include/asm-arm/arch-msm/debug-macro.S b/include/asm-arm/arch-msm/debug-macro.S
new file mode 100644
index 000000000000..393d5272e506
--- /dev/null
+++ b/include/asm-arm/arch-msm/debug-macro.S
@@ -0,0 +1,40 @@
1/* include/asm-arm/arch-msm7200/debug-macro.S
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <asm/hardware.h>
18#include <asm/arch/msm_iomap.h>
19
20 .macro addruart,rx
21 @ see if the MMU is enabled and select appropriate base address
22 mrc p15, 0, \rx, c1, c0
23 tst \rx, #1
24 ldreq \rx, =MSM_UART1_PHYS
25 ldrne \rx, =MSM_UART1_BASE
26 .endm
27
28 .macro senduart,rd,rx
29 str \rd, [\rx, #0x0C]
30 .endm
31
32 .macro waituart,rd,rx
33 @ wait for TX_READY
341: ldr \rd, [\rx, #0x08]
35 tst \rd, #0x04
36 beq 1b
37 .endm
38
39 .macro busyuart,rd,rx
40 .endm
diff --git a/include/asm-arm/arch-msm/dma.h b/include/asm-arm/arch-msm/dma.h
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/include/asm-arm/arch-msm/dma.h
@@ -0,0 +1 @@
diff --git a/include/asm-arm/arch-msm/entry-macro.S b/include/asm-arm/arch-msm/entry-macro.S
new file mode 100644
index 000000000000..ee24aece4cb0
--- /dev/null
+++ b/include/asm-arm/arch-msm/entry-macro.S
@@ -0,0 +1,38 @@
1/* include/asm-arm/arch-msm7200/entry-macro.S
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <asm/arch/msm_iomap.h>
18
19 .macro disable_fiq
20 .endm
21
22 .macro get_irqnr_preamble, base, tmp
23 @ enable imprecise aborts
24 cpsie a
25 mov \base, #MSM_VIC_BASE
26 .endm
27
28 .macro arch_ret_to_user, tmp1, tmp2
29 .endm
30
31 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
32 @ 0xD0 has irq# or old irq# if the irq has been handled
33 @ 0xD4 has irq# or -1 if none pending *but* if you just
34 @ read 0xD4 you never get the first irq for some reason
35 ldr \irqnr, [\base, #0xD0]
36 ldr \irqnr, [\base, #0xD4]
37 cmp \irqnr, #0xffffffff
38 .endm
diff --git a/include/asm-arm/arch-msm/hardware.h b/include/asm-arm/arch-msm/hardware.h
new file mode 100644
index 000000000000..89af2b70182f
--- /dev/null
+++ b/include/asm-arm/arch-msm/hardware.h
@@ -0,0 +1,18 @@
1/* linux/include/asm-arm/arch-msm/hardware.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_HARDWARE_H
17
18#endif
diff --git a/include/asm-arm/arch-msm/io.h b/include/asm-arm/arch-msm/io.h
new file mode 100644
index 000000000000..4645ae26b62a
--- /dev/null
+++ b/include/asm-arm/arch-msm/io.h
@@ -0,0 +1,33 @@
1/* include/asm-arm/arch-msm/io.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARM_ARCH_IO_H
17#define __ASM_ARM_ARCH_IO_H
18
19#define IO_SPACE_LIMIT 0xffffffff
20
21#define __arch_ioremap __msm_ioremap
22#define __arch_iounmap __iounmap
23
24void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
25
26static inline void __iomem *__io(unsigned long addr)
27{
28 return (void __iomem *)addr;
29}
30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32
33#endif
diff --git a/include/asm-arm/arch-msm/irqs.h b/include/asm-arm/arch-msm/irqs.h
new file mode 100644
index 000000000000..565430cfaa7e
--- /dev/null
+++ b/include/asm-arm/arch-msm/irqs.h
@@ -0,0 +1,89 @@
1/* linux/include/asm-arm/arch-msm/irqs.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_IRQS_H
18
19/* MSM ARM11 Interrupt Numbers */
20/* See 80-VE113-1 A, pp219-221 */
21
22#define INT_A9_M2A_0 0
23#define INT_A9_M2A_1 1
24#define INT_A9_M2A_2 2
25#define INT_A9_M2A_3 3
26#define INT_A9_M2A_4 4
27#define INT_A9_M2A_5 5
28#define INT_A9_M2A_6 6
29#define INT_GP_TIMER_EXP 7
30#define INT_DEBUG_TIMER_EXP 8
31#define INT_UART1 9
32#define INT_UART2 10
33#define INT_UART3 11
34#define INT_UART1_RX 12
35#define INT_UART2_RX 13
36#define INT_UART3_RX 14
37#define INT_USB_OTG 15
38#define INT_MDDI_PRI 16
39#define INT_MDDI_EXT 17
40#define INT_MDDI_CLIENT 18
41#define INT_MDP 19
42#define INT_GRAPHICS 20
43#define INT_ADM_AARM 21
44#define INT_ADSP_A11 22
45#define INT_ADSP_A9_A11 23
46#define INT_SDC1_0 24
47#define INT_SDC1_1 25
48#define INT_SDC2_0 26
49#define INT_SDC2_1 27
50#define INT_KEYSENSE 28
51#define INT_TCHSCRN_SSBI 29
52#define INT_TCHSCRN1 30
53#define INT_TCHSCRN2 31
54
55#define INT_GPIO_GROUP1 (32 + 0)
56#define INT_GPIO_GROUP2 (32 + 1)
57#define INT_PWB_I2C (32 + 2)
58#define INT_SOFTRESET (32 + 3)
59#define INT_NAND_WR_ER_DONE (32 + 4)
60#define INT_NAND_OP_DONE (32 + 5)
61#define INT_PBUS_ARM11 (32 + 6)
62#define INT_AXI_MPU_SMI (32 + 7)
63#define INT_AXI_MPU_EBI1 (32 + 8)
64#define INT_AD_HSSD (32 + 9)
65#define INT_ARM11_PMU (32 + 10)
66#define INT_ARM11_DMA (32 + 11)
67#define INT_TSIF_IRQ (32 + 12)
68#define INT_UART1DM_IRQ (32 + 13)
69#define INT_UART1DM_RX (32 + 14)
70#define INT_USB_HS (32 + 15)
71#define INT_SDC3_0 (32 + 16)
72#define INT_SDC3_1 (32 + 17)
73#define INT_SDC4_0 (32 + 18)
74#define INT_SDC4_1 (32 + 19)
75#define INT_UART2DM_RX (32 + 20)
76#define INT_UART2DM_IRQ (32 + 21)
77
78/* 22-31 are reserved */
79
80#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
81
82#define NR_MSM_IRQS 64
83#define NR_GPIO_IRQS 122
84#define NR_BOARD_IRQS 64
85#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
86
87#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n))
88
89#endif
diff --git a/include/asm-arm/arch-msm/memory.h b/include/asm-arm/arch-msm/memory.h
new file mode 100644
index 000000000000..b5ce0e9ac86d
--- /dev/null
+++ b/include/asm-arm/arch-msm/memory.h
@@ -0,0 +1,27 @@
1/* linux/include/asm-arm/arch-msm/memory.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MEMORY_H
17#define __ASM_ARCH_MEMORY_H
18
19/* physical offset of RAM */
20#define PHYS_OFFSET UL(0x10000000)
21
22/* bus address and physical addresses are identical */
23#define __virt_to_bus(x) __virt_to_phys(x)
24#define __bus_to_virt(x) __phys_to_virt(x)
25
26#endif
27
diff --git a/include/asm-arm/arch-msm/msm_iomap.h b/include/asm-arm/arch-msm/msm_iomap.h
new file mode 100644
index 000000000000..b8955cc26fec
--- /dev/null
+++ b/include/asm-arm/arch-msm/msm_iomap.h
@@ -0,0 +1,104 @@
1/* linux/include/asm-arm/arch-msm/msm_iomap.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 *
16 * The MSM peripherals are spread all over across 768MB of physical
17 * space, which makes just having a simple IO_ADDRESS macro to slide
18 * them into the right virtual location rough. Instead, we will
19 * provide a master phys->virt mapping for peripherals here.
20 *
21 */
22
23#ifndef __ASM_ARCH_MSM_IOMAP_H
24#define __ASM_ARCH_MSM_IOMAP_H
25
26#include <asm/sizes.h>
27
28/* Physical base address and size of peripherals.
29 * Ordered by the virtual base addresses they will be mapped at.
30 *
31 * MSM_VIC_BASE must be an value that can be loaded via a "mov"
32 * instruction, otherwise entry-macro.S will not compile.
33 *
34 * If you add or remove entries here, you'll want to edit the
35 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
36 * changes.
37 *
38 */
39
40#define MSM_VIC_BASE 0xE0000000
41#define MSM_VIC_PHYS 0xC0000000
42#define MSM_VIC_SIZE SZ_4K
43
44#define MSM_CSR_BASE 0xE0001000
45#define MSM_CSR_PHYS 0xC0100000
46#define MSM_CSR_SIZE SZ_4K
47
48#define MSM_GPT_PHYS MSM_CSR_PHYS
49#define MSM_GPT_BASE MSM_CSR_BASE
50#define MSM_GPT_SIZE SZ_4K
51
52#define MSM_DMOV_BASE 0xE0002000
53#define MSM_DMOV_PHYS 0xA9700000
54#define MSM_DMOV_SIZE SZ_4K
55
56#define MSM_UART1_BASE 0xE0003000
57#define MSM_UART1_PHYS 0xA9A00000
58#define MSM_UART1_SIZE SZ_4K
59
60#define MSM_UART2_BASE 0xE0004000
61#define MSM_UART2_PHYS 0xA9B00000
62#define MSM_UART2_SIZE SZ_4K
63
64#define MSM_UART3_BASE 0xE0005000
65#define MSM_UART3_PHYS 0xA9C00000
66#define MSM_UART3_SIZE SZ_4K
67
68#define MSM_I2C_BASE 0xE0006000
69#define MSM_I2C_PHYS 0xA9900000
70#define MSM_I2C_SIZE SZ_4K
71
72#define MSM_GPIO1_BASE 0xE0007000
73#define MSM_GPIO1_PHYS 0xA9200000
74#define MSM_GPIO1_SIZE SZ_4K
75
76#define MSM_GPIO2_BASE 0xE0008000
77#define MSM_GPIO2_PHYS 0xA9300000
78#define MSM_GPIO2_SIZE SZ_4K
79
80#define MSM_HSUSB_BASE 0xE0009000
81#define MSM_HSUSB_PHYS 0xA0800000
82#define MSM_HSUSB_SIZE SZ_4K
83
84#define MSM_CLK_CTL_BASE 0xE000A000
85#define MSM_CLK_CTL_PHYS 0xA8600000
86#define MSM_CLK_CTL_SIZE SZ_4K
87
88#define MSM_PMDH_BASE 0xE000B000
89#define MSM_PMDH_PHYS 0xAA600000
90#define MSM_PMDH_SIZE SZ_4K
91
92#define MSM_EMDH_BASE 0xE000C000
93#define MSM_EMDH_PHYS 0xAA700000
94#define MSM_EMDH_SIZE SZ_4K
95
96#define MSM_MDP_BASE 0xE0010000
97#define MSM_MDP_PHYS 0xAA200000
98#define MSM_MDP_SIZE 0x000F0000
99
100#define MSM_SHARED_RAM_BASE 0xE0100000
101#define MSM_SHARED_RAM_PHYS 0x01F00000
102#define MSM_SHARED_RAM_SIZE SZ_1M
103
104#endif
diff --git a/include/asm-arm/arch-msm/system.h b/include/asm-arm/arch-msm/system.h
new file mode 100644
index 000000000000..7c5544bdd0c7
--- /dev/null
+++ b/include/asm-arm/arch-msm/system.h
@@ -0,0 +1,23 @@
1/* linux/include/asm-arm/arch-msm/system.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <asm/hardware.h>
17
18void arch_idle(void);
19
20static inline void arch_reset(char mode)
21{
22 for (;;) ; /* depends on IPC w/ other core */
23}
diff --git a/include/asm-arm/arch-msm/timex.h b/include/asm-arm/arch-msm/timex.h
new file mode 100644
index 000000000000..154b23fb3599
--- /dev/null
+++ b/include/asm-arm/arch-msm/timex.h
@@ -0,0 +1,20 @@
1/* linux/include/asm-arm/arch-msm/timex.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_TIMEX_H
17
18#define CLOCK_TICK_RATE 1000000
19
20#endif
diff --git a/include/asm-arm/arch-msm/uncompress.h b/include/asm-arm/arch-msm/uncompress.h
new file mode 100644
index 000000000000..e91ed786ffec
--- /dev/null
+++ b/include/asm-arm/arch-msm/uncompress.h
@@ -0,0 +1,36 @@
1/* linux/include/asm-arm/arch-msm/uncompress.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17
18#include "hardware.h"
19
20static void putc(int c)
21{
22}
23
24static inline void flush(void)
25{
26}
27
28static inline void arch_decomp_setup(void)
29{
30}
31
32static inline void arch_decomp_wdog(void)
33{
34}
35
36#endif
diff --git a/include/asm-arm/arch-msm/vmalloc.h b/include/asm-arm/arch-msm/vmalloc.h
new file mode 100644
index 000000000000..60f8d910e825
--- /dev/null
+++ b/include/asm-arm/arch-msm/vmalloc.h
@@ -0,0 +1,22 @@
1/* linux/include/asm-arm/arch-msm/vmalloc.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ASM_ARCH_MSM_VMALLOC_H
17#define __ASM_ARCH_MSM_VMALLOC_H
18
19#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
20
21#endif
22