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-rw-r--r--arch/sparc64/kernel/entry.S554
-rw-r--r--arch/sparc64/kernel/time.c32
-rw-r--r--arch/sparc64/mm/init.c41
-rw-r--r--include/asm-sparc64/hypervisor.h640
4 files changed, 1160 insertions, 107 deletions
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index f8cc3c0731c7..8f10dda0f5c0 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -1725,96 +1725,142 @@ real_hard_smp_processor_id:
1725 * returns %o0: sysino 1725 * returns %o0: sysino
1726 */ 1726 */
1727 .globl sun4v_devino_to_sysino 1727 .globl sun4v_devino_to_sysino
1728 .type sun4v_devino_to_sysino,#function
1728sun4v_devino_to_sysino: 1729sun4v_devino_to_sysino:
1729 mov HV_FAST_INTR_DEVINO2SYSINO, %o5 1730 mov HV_FAST_INTR_DEVINO2SYSINO, %o5
1730 ta HV_FAST_TRAP 1731 ta HV_FAST_TRAP
1731 retl 1732 retl
1732 mov %o1, %o0 1733 mov %o1, %o0
1734 .size sun4v_devino_to_sysino, .-sun4v_devino_to_sysino
1733 1735
1734 /* %o0: sysino 1736 /* %o0: sysino
1735 * 1737 *
1736 * returns %o0: intr_enabled (HV_INTR_{DISABLED,ENABLED}) 1738 * returns %o0: intr_enabled (HV_INTR_{DISABLED,ENABLED})
1737 */ 1739 */
1738 .globl sun4v_intr_getenabled 1740 .globl sun4v_intr_getenabled
1741 .type sun4v_intr_getenabled,#function
1739sun4v_intr_getenabled: 1742sun4v_intr_getenabled:
1740 mov HV_FAST_INTR_GETENABLED, %o5 1743 mov HV_FAST_INTR_GETENABLED, %o5
1741 ta HV_FAST_TRAP 1744 ta HV_FAST_TRAP
1742 retl 1745 retl
1743 mov %o1, %o0 1746 mov %o1, %o0
1747 .size sun4v_intr_getenabled, .-sun4v_intr_getenabled
1744 1748
1745 /* %o0: sysino 1749 /* %o0: sysino
1746 * %o1: intr_enabled (HV_INTR_{DISABLED,ENABLED}) 1750 * %o1: intr_enabled (HV_INTR_{DISABLED,ENABLED})
1747 */ 1751 */
1748 .globl sun4v_intr_setenabled 1752 .globl sun4v_intr_setenabled
1753 .type sun4v_intr_setenabled,#function
1749sun4v_intr_setenabled: 1754sun4v_intr_setenabled:
1750 mov HV_FAST_INTR_SETENABLED, %o5 1755 mov HV_FAST_INTR_SETENABLED, %o5
1751 ta HV_FAST_TRAP 1756 ta HV_FAST_TRAP
1752 retl 1757 retl
1753 nop 1758 nop
1759 .size sun4v_intr_setenabled, .-sun4v_intr_setenabled
1754 1760
1755 /* %o0: sysino 1761 /* %o0: sysino
1756 * 1762 *
1757 * returns %o0: intr_state (HV_INTR_STATE_*) 1763 * returns %o0: intr_state (HV_INTR_STATE_*)
1758 */ 1764 */
1759 .globl sun4v_intr_getstate 1765 .globl sun4v_intr_getstate
1766 .type sun4v_intr_getstate,#function
1760sun4v_intr_getstate: 1767sun4v_intr_getstate:
1761 mov HV_FAST_INTR_GETSTATE, %o5 1768 mov HV_FAST_INTR_GETSTATE, %o5
1762 ta HV_FAST_TRAP 1769 ta HV_FAST_TRAP
1763 retl 1770 retl
1764 mov %o1, %o0 1771 mov %o1, %o0
1772 .size sun4v_intr_getstate, .-sun4v_intr_getstate
1765 1773
1766 /* %o0: sysino 1774 /* %o0: sysino
1767 * %o1: intr_state (HV_INTR_STATE_*) 1775 * %o1: intr_state (HV_INTR_STATE_*)
1768 */ 1776 */
1769 .globl sun4v_intr_setstate 1777 .globl sun4v_intr_setstate
1778 .type sun4v_intr_setstate,#function
1770sun4v_intr_setstate: 1779sun4v_intr_setstate:
1771 mov HV_FAST_INTR_SETSTATE, %o5 1780 mov HV_FAST_INTR_SETSTATE, %o5
1772 ta HV_FAST_TRAP 1781 ta HV_FAST_TRAP
1773 retl 1782 retl
1774 nop 1783 nop
1784 .size sun4v_intr_setstate, .-sun4v_intr_setstate
1775 1785
1776 /* %o0: sysino 1786 /* %o0: sysino
1777 * 1787 *
1778 * returns %o0: cpuid 1788 * returns %o0: cpuid
1779 */ 1789 */
1780 .globl sun4v_intr_gettarget 1790 .globl sun4v_intr_gettarget
1791 .type sun4v_intr_gettarget,#function
1781sun4v_intr_gettarget: 1792sun4v_intr_gettarget:
1782 mov HV_FAST_INTR_GETTARGET, %o5 1793 mov HV_FAST_INTR_GETTARGET, %o5
1783 ta HV_FAST_TRAP 1794 ta HV_FAST_TRAP
1784 retl 1795 retl
1785 mov %o1, %o0 1796 mov %o1, %o0
1797 .size sun4v_intr_gettarget, .-sun4v_intr_gettarget
1786 1798
1787 /* %o0: sysino 1799 /* %o0: sysino
1788 * %o1: cpuid 1800 * %o1: cpuid
1789 */ 1801 */
1790 .globl sun4v_intr_settarget 1802 .globl sun4v_intr_settarget
1803 .type sun4v_intr_settarget,#function
1791sun4v_intr_settarget: 1804sun4v_intr_settarget:
1792 mov HV_FAST_INTR_SETTARGET, %o5 1805 mov HV_FAST_INTR_SETTARGET, %o5
1793 ta HV_FAST_TRAP 1806 ta HV_FAST_TRAP
1794 retl 1807 retl
1795 nop 1808 nop
1809 .size sun4v_intr_settarget, .-sun4v_intr_settarget
1796 1810
1797 /* %o0: type 1811 /* %o0: cpuid
1798 * %o1: queue paddr 1812 * %o1: pc
1799 * %o2: num queue entries 1813 * %o2: rtba
1814 * %o3: arg0
1800 * 1815 *
1801 * returns %o0: status 1816 * returns %o0: status
1802 */ 1817 */
1803 .globl sun4v_cpu_qconf 1818 .globl sun4v_cpu_start
1804sun4v_cpu_qconf: 1819 .type sun4v_cpu_start,#function
1805 mov HV_FAST_CPU_QCONF, %o5 1820sun4v_cpu_start:
1821 mov HV_FAST_CPU_START, %o5
1806 ta HV_FAST_TRAP 1822 ta HV_FAST_TRAP
1807 retl 1823 retl
1808 nop 1824 nop
1825 .size sun4v_cpu_start, .-sun4v_cpu_start
1809 1826
1810 /* returns %o0: status 1827 /* %o0: cpuid
1828 *
1829 * returns %o0: status
1811 */ 1830 */
1831 .globl sun4v_cpu_stop
1832 .type sun4v_cpu_stop,#function
1833sun4v_cpu_stop:
1834 mov HV_FAST_CPU_STOP, %o5
1835 ta HV_FAST_TRAP
1836 retl
1837 nop
1838 .size sun4v_cpu_stop, .-sun4v_cpu_stop
1839
1840 /* returns %o0: status */
1812 .globl sun4v_cpu_yield 1841 .globl sun4v_cpu_yield
1842 .type sun4v_cpu_yield, #function
1813sun4v_cpu_yield: 1843sun4v_cpu_yield:
1814 mov HV_FAST_CPU_YIELD, %o5 1844 mov HV_FAST_CPU_YIELD, %o5
1815 ta HV_FAST_TRAP 1845 ta HV_FAST_TRAP
1816 retl 1846 retl
1817 nop 1847 nop
1848 .size sun4v_cpu_yield, .-sun4v_cpu_yield
1849
1850 /* %o0: type
1851 * %o1: queue paddr
1852 * %o2: num queue entries
1853 *
1854 * returns %o0: status
1855 */
1856 .globl sun4v_cpu_qconf
1857 .type sun4v_cpu_qconf,#function
1858sun4v_cpu_qconf:
1859 mov HV_FAST_CPU_QCONF, %o5
1860 ta HV_FAST_TRAP
1861 retl
1862 nop
1863 .size sun4v_cpu_qconf, .-sun4v_cpu_qconf
1818 1864
1819 /* %o0: num cpus in cpu list 1865 /* %o0: num cpus in cpu list
1820 * %o1: cpu list paddr 1866 * %o1: cpu list paddr
@@ -1823,11 +1869,13 @@ sun4v_cpu_yield:
1823 * returns %o0: status 1869 * returns %o0: status
1824 */ 1870 */
1825 .globl sun4v_cpu_mondo_send 1871 .globl sun4v_cpu_mondo_send
1872 .type sun4v_cpu_mondo_send,#function
1826sun4v_cpu_mondo_send: 1873sun4v_cpu_mondo_send:
1827 mov HV_FAST_CPU_MONDO_SEND, %o5 1874 mov HV_FAST_CPU_MONDO_SEND, %o5
1828 ta HV_FAST_TRAP 1875 ta HV_FAST_TRAP
1829 retl 1876 retl
1830 nop 1877 nop
1878 .size sun4v_cpu_mondo_send, .-sun4v_cpu_mondo_send
1831 1879
1832 /* %o0: CPU ID 1880 /* %o0: CPU ID
1833 * 1881 *
@@ -1835,6 +1883,7 @@ sun4v_cpu_mondo_send:
1835 * %o0: cpu state as HV_CPU_STATE_* 1883 * %o0: cpu state as HV_CPU_STATE_*
1836 */ 1884 */
1837 .globl sun4v_cpu_state 1885 .globl sun4v_cpu_state
1886 .type sun4v_cpu_state,#function
1838sun4v_cpu_state: 1887sun4v_cpu_state:
1839 mov HV_FAST_CPU_STATE, %o5 1888 mov HV_FAST_CPU_STATE, %o5
1840 ta HV_FAST_TRAP 1889 ta HV_FAST_TRAP
@@ -1843,6 +1892,37 @@ sun4v_cpu_state:
1843 mov %o1, %o0 1892 mov %o1, %o0
18441: retl 18931: retl
1845 nop 1894 nop
1895 .size sun4v_cpu_state, .-sun4v_cpu_state
1896
1897 /* %o0: virtual address
1898 * %o1: must be zero
1899 * %o2: TTE
1900 * %o3: HV_MMU_* flags
1901 *
1902 * returns %o0: status
1903 */
1904 .globl sun4v_mmu_map_perm_addr
1905 .type sun4v_mmu_map_perm_addr,#function
1906sun4v_mmu_map_perm_addr:
1907 mov HV_FAST_MMU_MAP_PERM_ADDR, %o5
1908 ta HV_FAST_TRAP
1909 retl
1910 nop
1911 .size sun4v_mmu_map_perm_addr, .-sun4v_mmu_map_perm_addr
1912
1913 /* %o0: number of TSB descriptions
1914 * %o1: TSB descriptions real address
1915 *
1916 * returns %o0: status
1917 */
1918 .globl sun4v_mmu_tsb_ctx0
1919 .type sun4v_mmu_tsb_ctx0,#function
1920sun4v_mmu_tsb_ctx0:
1921 mov HV_FAST_MMU_TSB_CTX0, %o5
1922 ta HV_FAST_TRAP
1923 retl
1924 nop
1925 .size sun4v_mmu_tsb_ctx0, .-sun4v_mmu_tsb_ctx0
1846 1926
1847 /* %o0: API group number 1927 /* %o0: API group number
1848 * %o1: pointer to unsigned long major number storage 1928 * %o1: pointer to unsigned long major number storage
@@ -1851,6 +1931,7 @@ sun4v_cpu_state:
1851 * returns %o0: status 1931 * returns %o0: status
1852 */ 1932 */
1853 .globl sun4v_get_version 1933 .globl sun4v_get_version
1934 .type sun4v_get_version,#function
1854sun4v_get_version: 1935sun4v_get_version:
1855 mov HV_CORE_GET_VER, %o5 1936 mov HV_CORE_GET_VER, %o5
1856 mov %o1, %o3 1937 mov %o1, %o3
@@ -1859,6 +1940,7 @@ sun4v_get_version:
1859 stx %o1, [%o3] 1940 stx %o1, [%o3]
1860 retl 1941 retl
1861 stx %o2, [%o4] 1942 stx %o2, [%o4]
1943 .size sun4v_get_version, .-sun4v_get_version
1862 1944
1863 /* %o0: API group number 1945 /* %o0: API group number
1864 * %o1: desired major number 1946 * %o1: desired major number
@@ -1868,18 +1950,49 @@ sun4v_get_version:
1868 * returns %o0: status 1950 * returns %o0: status
1869 */ 1951 */
1870 .globl sun4v_set_version 1952 .globl sun4v_set_version
1953 .type sun4v_set_version,#function
1871sun4v_set_version: 1954sun4v_set_version:
1872 mov HV_CORE_SET_VER, %o5 1955 mov HV_CORE_SET_VER, %o5
1873 mov %o3, %o4 1956 mov %o3, %o4
1874 ta HV_CORE_TRAP 1957 ta HV_CORE_TRAP
1875 retl 1958 retl
1876 stx %o1, [%o4] 1959 stx %o1, [%o4]
1960 .size sun4v_set_version, .-sun4v_set_version
1961
1962 /* %o0: pointer to unsigned long time
1963 *
1964 * returns %o0: status
1965 */
1966 .globl sun4v_tod_get
1967 .type sun4v_tod_get,#function
1968sun4v_tod_get:
1969 mov %o0, %o4
1970 mov HV_FAST_TOD_GET, %o5
1971 ta HV_FAST_TRAP
1972 stx %o1, [%o4]
1973 retl
1974 nop
1975 .size sun4v_tod_get, .-sun4v_tod_get
1976
1977 /* %o0: time
1978 *
1979 * returns %o0: status
1980 */
1981 .globl sun4v_tod_set
1982 .type sun4v_tod_set,#function
1983sun4v_tod_set:
1984 mov HV_FAST_TOD_SET, %o5
1985 ta HV_FAST_TRAP
1986 retl
1987 nop
1988 .size sun4v_tod_set, .-sun4v_tod_set
1877 1989
1878 /* %o0: pointer to unsigned long status 1990 /* %o0: pointer to unsigned long status
1879 * 1991 *
1880 * returns %o0: signed character 1992 * returns %o0: signed character
1881 */ 1993 */
1882 .globl sun4v_con_getchar 1994 .globl sun4v_con_getchar
1995 .type sun4v_con_getchar,#function
1883sun4v_con_getchar: 1996sun4v_con_getchar:
1884 mov %o0, %o4 1997 mov %o0, %o4
1885 mov HV_FAST_CONS_GETCHAR, %o5 1998 mov HV_FAST_CONS_GETCHAR, %o5
@@ -1889,17 +2002,20 @@ sun4v_con_getchar:
1889 stx %o0, [%o4] 2002 stx %o0, [%o4]
1890 retl 2003 retl
1891 sra %o1, 0, %o0 2004 sra %o1, 0, %o0
2005 .size sun4v_con_getchar, .-sun4v_con_getchar
1892 2006
1893 /* %o0: signed long character 2007 /* %o0: signed long character
1894 * 2008 *
1895 * returns %o0: status 2009 * returns %o0: status
1896 */ 2010 */
1897 .globl sun4v_con_putchar 2011 .globl sun4v_con_putchar
2012 .type sun4v_con_putchar,#function
1898sun4v_con_putchar: 2013sun4v_con_putchar:
1899 mov HV_FAST_CONS_PUTCHAR, %o5 2014 mov HV_FAST_CONS_PUTCHAR, %o5
1900 ta HV_FAST_TRAP 2015 ta HV_FAST_TRAP
1901 retl 2016 retl
1902 sra %o0, 0, %o0 2017 sra %o0, 0, %o0
2018 .size sun4v_con_putchar, .-sun4v_con_putchar
1903 2019
1904 /* %o0: buffer real address 2020 /* %o0: buffer real address
1905 * %o1: buffer size 2021 * %o1: buffer size
@@ -1908,6 +2024,7 @@ sun4v_con_putchar:
1908 * returns %o0: status 2024 * returns %o0: status
1909 */ 2025 */
1910 .globl sun4v_con_read 2026 .globl sun4v_con_read
2027 .type sun4v_con_read,#function
1911sun4v_con_read: 2028sun4v_con_read:
1912 mov %o2, %o4 2029 mov %o2, %o4
1913 mov HV_FAST_CONS_READ, %o5 2030 mov HV_FAST_CONS_READ, %o5
@@ -1922,6 +2039,7 @@ sun4v_con_read:
1922 stx %o1, [%o4] 2039 stx %o1, [%o4]
19231: retl 20401: retl
1924 nop 2041 nop
2042 .size sun4v_con_read, .-sun4v_con_read
1925 2043
1926 /* %o0: buffer real address 2044 /* %o0: buffer real address
1927 * %o1: buffer size 2045 * %o1: buffer size
@@ -1930,6 +2048,7 @@ sun4v_con_read:
1930 * returns %o0: status 2048 * returns %o0: status
1931 */ 2049 */
1932 .globl sun4v_con_write 2050 .globl sun4v_con_write
2051 .type sun4v_con_write,#function
1933sun4v_con_write: 2052sun4v_con_write:
1934 mov %o2, %o4 2053 mov %o2, %o4
1935 mov HV_FAST_CONS_WRITE, %o5 2054 mov HV_FAST_CONS_WRITE, %o5
@@ -1937,6 +2056,7 @@ sun4v_con_write:
1937 stx %o1, [%o4] 2056 stx %o1, [%o4]
1938 retl 2057 retl
1939 nop 2058 nop
2059 .size sun4v_con_write, .-sun4v_con_write
1940 2060
1941 /* %o0: soft state 2061 /* %o0: soft state
1942 * %o1: address of description string 2062 * %o1: address of description string
@@ -1944,13 +2064,35 @@ sun4v_con_write:
1944 * returns %o0: status 2064 * returns %o0: status
1945 */ 2065 */
1946 .globl sun4v_mach_set_soft_state 2066 .globl sun4v_mach_set_soft_state
2067 .type sun4v_mach_set_soft_state,#function
1947sun4v_mach_set_soft_state: 2068sun4v_mach_set_soft_state:
1948 mov HV_FAST_MACH_SET_SOFT_STATE, %o5 2069 mov HV_FAST_MACH_SET_SOFT_STATE, %o5
1949 ta HV_FAST_TRAP 2070 ta HV_FAST_TRAP
1950 retl 2071 retl
1951 nop 2072 nop
2073 .size sun4v_mach_set_soft_state, .-sun4v_mach_set_soft_state
1952 2074
2075 /* %o0: exit code
2076 *
2077 * Does not return.
2078 */
2079 .globl sun4v_mach_exit
2080 .type sun4v_mach_exit,#function
2081sun4v_mach_exit:
2082 mov HV_FAST_MACH_EXIT, %o5
2083 ta HV_FAST_TRAP
2084 retl
2085 nop
2086 .size sun4v_mach_exit, .-sun4v_mach_exit
2087
2088 /* %o0: buffer real address
2089 * %o1: buffer length
2090 * %o2: pointer to unsigned long real_buf_len
2091 *
2092 * returns %o0: status
2093 */
1953 .globl sun4v_mach_desc 2094 .globl sun4v_mach_desc
2095 .type sun4v_mach_desc,#function
1954sun4v_mach_desc: 2096sun4v_mach_desc:
1955 mov %o2, %o4 2097 mov %o2, %o4
1956 mov HV_FAST_MACH_DESC, %o5 2098 mov HV_FAST_MACH_DESC, %o5
@@ -1958,3 +2100,401 @@ sun4v_mach_desc:
1958 stx %o1, [%o4] 2100 stx %o1, [%o4]
1959 retl 2101 retl
1960 nop 2102 nop
2103 .size sun4v_mach_desc, .-sun4v_mach_desc
2104
2105 /* %o0: new timeout in milliseconds
2106 * %o1: pointer to unsigned long orig_timeout
2107 *
2108 * returns %o0: status
2109 */
2110 .globl sun4v_mach_set_watchdog
2111 .type sun4v_mach_set_watchdog,#function
2112sun4v_mach_set_watchdog:
2113 mov %o1, %o4
2114 mov HV_FAST_MACH_SET_WATCHDOG, %o5
2115 ta HV_FAST_TRAP
2116 stx %o1, [%o4]
2117 retl
2118 nop
2119 .size sun4v_mach_set_watchdog, .-sun4v_mach_set_watchdog
2120
2121 /* No inputs and does not return. */
2122 .globl sun4v_mach_sir
2123 .type sun4v_mach_sir,#function
2124sun4v_mach_sir:
2125 mov %o1, %o4
2126 mov HV_FAST_MACH_SIR, %o5
2127 ta HV_FAST_TRAP
2128 stx %o1, [%o4]
2129 retl
2130 nop
2131 .size sun4v_mach_sir, .-sun4v_mach_sir
2132
2133 /* %o0: channel
2134 * %o1: ra
2135 * %o2: num_entries
2136 *
2137 * returns %o0: status
2138 */
2139 .globl sun4v_ldc_tx_qconf
2140 .type sun4v_ldc_tx_qconf,#function
2141sun4v_ldc_tx_qconf:
2142 mov HV_FAST_LDC_TX_QCONF, %o5
2143 ta HV_FAST_TRAP
2144 retl
2145 nop
2146 .size sun4v_ldc_tx_qconf, .-sun4v_ldc_tx_qconf
2147
2148 /* %o0: channel
2149 * %o1: pointer to unsigned long ra
2150 * %o2: pointer to unsigned long num_entries
2151 *
2152 * returns %o0: status
2153 */
2154 .globl sun4v_ldc_tx_qinfo
2155 .type sun4v_ldc_tx_qinfo,#function
2156sun4v_ldc_tx_qinfo:
2157 mov %o1, %g1
2158 mov %o2, %g2
2159 mov HV_FAST_LDC_TX_QINFO, %o5
2160 ta HV_FAST_TRAP
2161 stx %o1, [%g1]
2162 stx %o2, [%g2]
2163 retl
2164 nop
2165 .size sun4v_ldc_tx_qinfo, .-sun4v_ldc_tx_qinfo
2166
2167 /* %o0: channel
2168 * %o1: pointer to unsigned long head_off
2169 * %o2: pointer to unsigned long tail_off
2170 * %o2: pointer to unsigned long chan_state
2171 *
2172 * returns %o0: status
2173 */
2174 .globl sun4v_ldc_tx_get_state
2175 .type sun4v_ldc_tx_get_state,#function
2176sun4v_ldc_tx_get_state:
2177 mov %o1, %g1
2178 mov %o2, %g2
2179 mov %o3, %g3
2180 mov HV_FAST_LDC_TX_GET_STATE, %o5
2181 ta HV_FAST_TRAP
2182 stx %o1, [%g1]
2183 stx %o2, [%g2]
2184 stx %o3, [%g3]
2185 retl
2186 nop
2187 .size sun4v_ldc_tx_get_state, .-sun4v_ldc_tx_get_state
2188
2189 /* %o0: channel
2190 * %o1: tail_off
2191 *
2192 * returns %o0: status
2193 */
2194 .globl sun4v_ldc_tx_set_qtail
2195 .type sun4v_ldc_tx_set_qtail,#function
2196sun4v_ldc_tx_set_qtail:
2197 mov HV_FAST_LDC_TX_SET_QTAIL, %o5
2198 ta HV_FAST_TRAP
2199 retl
2200 nop
2201 .size sun4v_ldc_tx_set_qtail, .-sun4v_ldc_tx_set_qtail
2202
2203 /* %o0: channel
2204 * %o1: ra
2205 * %o2: num_entries
2206 *
2207 * returns %o0: status
2208 */
2209 .globl sun4v_ldc_rx_qconf
2210 .type sun4v_ldc_rx_qconf,#function
2211sun4v_ldc_rx_qconf:
2212 mov HV_FAST_LDC_RX_QCONF, %o5
2213 ta HV_FAST_TRAP
2214 retl
2215 nop
2216 .size sun4v_ldc_rx_qconf, .-sun4v_ldc_rx_qconf
2217
2218 /* %o0: channel
2219 * %o1: pointer to unsigned long ra
2220 * %o2: pointer to unsigned long num_entries
2221 *
2222 * returns %o0: status
2223 */
2224 .globl sun4v_ldc_rx_qinfo
2225 .type sun4v_ldc_rx_qinfo,#function
2226sun4v_ldc_rx_qinfo:
2227 mov %o1, %g1
2228 mov %o2, %g2
2229 mov HV_FAST_LDC_RX_QINFO, %o5
2230 ta HV_FAST_TRAP
2231 stx %o1, [%g1]
2232 stx %o2, [%g2]
2233 retl
2234 nop
2235 .size sun4v_ldc_rx_qinfo, .-sun4v_ldc_rx_qinfo
2236
2237 /* %o0: channel
2238 * %o1: pointer to unsigned long head_off
2239 * %o2: pointer to unsigned long tail_off
2240 * %o2: pointer to unsigned long chan_state
2241 *
2242 * returns %o0: status
2243 */
2244 .globl sun4v_ldc_rx_get_state
2245 .type sun4v_ldc_rx_get_state,#function
2246sun4v_ldc_rx_get_state:
2247 mov %o1, %g1
2248 mov %o2, %g2
2249 mov %o3, %g3
2250 mov HV_FAST_LDC_RX_GET_STATE, %o5
2251 ta HV_FAST_TRAP
2252 stx %o1, [%g1]
2253 stx %o2, [%g2]
2254 stx %o3, [%g3]
2255 retl
2256 nop
2257 .size sun4v_ldc_rx_get_state, .-sun4v_ldc_rx_get_state
2258
2259 /* %o0: channel
2260 * %o1: head_off
2261 *
2262 * returns %o0: status
2263 */
2264 .globl sun4v_ldc_rx_set_qhead
2265 .type sun4v_ldc_rx_set_qhead,#function
2266sun4v_ldc_rx_set_qhead:
2267 mov HV_FAST_LDC_RX_SET_QHEAD, %o5
2268 ta HV_FAST_TRAP
2269 retl
2270 nop
2271 .size sun4v_ldc_rx_set_qhead, .-sun4v_ldc_rx_set_qhead
2272
2273 /* %o0: channel
2274 * %o1: ra
2275 * %o2: num_entries
2276 *
2277 * returns %o0: status
2278 */
2279 .globl sun4v_ldc_set_map_table
2280 .type sun4v_ldc_set_map_table,#function
2281sun4v_ldc_set_map_table:
2282 mov HV_FAST_LDC_SET_MAP_TABLE, %o5
2283 ta HV_FAST_TRAP
2284 retl
2285 nop
2286 .size sun4v_ldc_set_map_table, .-sun4v_ldc_set_map_table
2287
2288 /* %o0: channel
2289 * %o1: pointer to unsigned long ra
2290 * %o2: pointer to unsigned long num_entries
2291 *
2292 * returns %o0: status
2293 */
2294 .globl sun4v_ldc_get_map_table
2295 .type sun4v_ldc_get_map_table,#function
2296sun4v_ldc_get_map_table:
2297 mov %o1, %g1
2298 mov %o2, %g2
2299 mov HV_FAST_LDC_GET_MAP_TABLE, %o5
2300 ta HV_FAST_TRAP
2301 stx %o1, [%g1]
2302 stx %o2, [%g2]
2303 retl
2304 nop
2305 .size sun4v_ldc_get_map_table, .-sun4v_ldc_get_map_table
2306
2307 /* %o0: channel
2308 * %o1: dir_code
2309 * %o2: tgt_raddr
2310 * %o3: lcl_raddr
2311 * %o4: len
2312 * %o5: pointer to unsigned long actual_len
2313 *
2314 * returns %o0: status
2315 */
2316 .globl sun4v_ldc_copy
2317 .type sun4v_ldc_copy,#function
2318sun4v_ldc_copy:
2319 mov %o5, %g1
2320 mov HV_FAST_LDC_COPY, %o5
2321 ta HV_FAST_TRAP
2322 stx %o1, [%g1]
2323 retl
2324 nop
2325 .size sun4v_ldc_copy, .-sun4v_ldc_copy
2326
2327 /* %o0: channel
2328 * %o1: cookie
2329 * %o2: pointer to unsigned long ra
2330 * %o3: pointer to unsigned long perm
2331 *
2332 * returns %o0: status
2333 */
2334 .globl sun4v_ldc_mapin
2335 .type sun4v_ldc_mapin,#function
2336sun4v_ldc_mapin:
2337 mov %o2, %g1
2338 mov %o3, %g2
2339 mov HV_FAST_LDC_MAPIN, %o5
2340 ta HV_FAST_TRAP
2341 stx %o1, [%g1]
2342 stx %o2, [%g2]
2343 retl
2344 nop
2345 .size sun4v_ldc_mapin, .-sun4v_ldc_mapin
2346
2347 /* %o0: ra
2348 *
2349 * returns %o0: status
2350 */
2351 .globl sun4v_ldc_unmap
2352 .type sun4v_ldc_unmap,#function
2353sun4v_ldc_unmap:
2354 mov HV_FAST_LDC_UNMAP, %o5
2355 ta HV_FAST_TRAP
2356 retl
2357 nop
2358 .size sun4v_ldc_unmap, .-sun4v_ldc_unmap
2359
2360 /* %o0: cookie
2361 * %o1: mte_cookie
2362 *
2363 * returns %o0: status
2364 */
2365 .globl sun4v_ldc_revoke
2366 .type sun4v_ldc_revoke,#function
2367sun4v_ldc_revoke:
2368 mov HV_FAST_LDC_REVOKE, %o5
2369 ta HV_FAST_TRAP
2370 retl
2371 nop
2372 .size sun4v_ldc_revoke, .-sun4v_ldc_revoke
2373
2374 /* %o0: device handle
2375 * %o1: device INO
2376 * %o2: pointer to unsigned long cookie
2377 *
2378 * returns %o0: status
2379 */
2380 .globl sun4v_vintr_get_cookie
2381 .type sun4v_vintr_get_cookie,#function
2382sun4v_vintr_get_cookie:
2383 mov %o2, %g1
2384 mov HV_FAST_VINTR_GET_COOKIE, %o5
2385 ta HV_FAST_TRAP
2386 stx %o1, [%g1]
2387 retl
2388 nop
2389 .size sun4v_vintr_get_cookie, .-sun4v_vintr_get_cookie
2390
2391 /* %o0: device handle
2392 * %o1: device INO
2393 * %o2: cookie
2394 *
2395 * returns %o0: status
2396 */
2397 .globl sun4v_vintr_set_cookie
2398 .type sun4v_vintr_set_cookie,#function
2399sun4v_vintr_set_cookie:
2400 mov HV_FAST_VINTR_SET_COOKIE, %o5
2401 ta HV_FAST_TRAP
2402 retl
2403 nop
2404 .size sun4v_vintr_set_cookie, .-sun4v_vintr_set_cookie
2405
2406 /* %o0: device handle
2407 * %o1: device INO
2408 * %o2: pointer to unsigned long valid_state
2409 *
2410 * returns %o0: status
2411 */
2412 .globl sun4v_vintr_get_valid
2413 .type sun4v_vintr_get_valid,#function
2414sun4v_vintr_get_valid:
2415 mov %o2, %g1
2416 mov HV_FAST_VINTR_GET_VALID, %o5
2417 ta HV_FAST_TRAP
2418 stx %o1, [%g1]
2419 retl
2420 nop
2421 .size sun4v_vintr_get_valid, .-sun4v_vintr_get_valid
2422
2423 /* %o0: device handle
2424 * %o1: device INO
2425 * %o2: valid_state
2426 *
2427 * returns %o0: status
2428 */
2429 .globl sun4v_vintr_set_valid
2430 .type sun4v_vintr_set_valid,#function
2431sun4v_vintr_set_valid:
2432 mov HV_FAST_VINTR_SET_VALID, %o5
2433 ta HV_FAST_TRAP
2434 retl
2435 nop
2436 .size sun4v_vintr_set_valid, .-sun4v_vintr_set_valid
2437
2438 /* %o0: device handle
2439 * %o1: device INO
2440 * %o2: pointer to unsigned long state
2441 *
2442 * returns %o0: status
2443 */
2444 .globl sun4v_vintr_get_state
2445 .type sun4v_vintr_get_state,#function
2446sun4v_vintr_get_state:
2447 mov %o2, %g1
2448 mov HV_FAST_VINTR_GET_STATE, %o5
2449 ta HV_FAST_TRAP
2450 stx %o1, [%g1]
2451 retl
2452 nop
2453 .size sun4v_vintr_get_state, .-sun4v_vintr_get_state
2454
2455 /* %o0: device handle
2456 * %o1: device INO
2457 * %o2: state
2458 *
2459 * returns %o0: status
2460 */
2461 .globl sun4v_vintr_set_state
2462 .type sun4v_vintr_set_state,#function
2463sun4v_vintr_set_state:
2464 mov HV_FAST_VINTR_SET_STATE, %o5
2465 ta HV_FAST_TRAP
2466 retl
2467 nop
2468 .size sun4v_vintr_set_state, .-sun4v_vintr_set_state
2469
2470 /* %o0: device handle
2471 * %o1: device INO
2472 * %o2: pointer to unsigned long cpuid
2473 *
2474 * returns %o0: status
2475 */
2476 .globl sun4v_vintr_get_target
2477 .type sun4v_vintr_get_target,#function
2478sun4v_vintr_get_target:
2479 mov %o2, %g1
2480 mov HV_FAST_VINTR_GET_TARGET, %o5
2481 ta HV_FAST_TRAP
2482 stx %o1, [%g1]
2483 retl
2484 nop
2485 .size sun4v_vintr_get_target, .-sun4v_vintr_get_target
2486
2487 /* %o0: device handle
2488 * %o1: device INO
2489 * %o2: cpuid
2490 *
2491 * returns %o0: status
2492 */
2493 .globl sun4v_vintr_set_target
2494 .type sun4v_vintr_set_target,#function
2495sun4v_vintr_set_target:
2496 mov HV_FAST_VINTR_SET_TARGET, %o5
2497 ta HV_FAST_TRAP
2498 retl
2499 nop
2500 .size sun4v_vintr_set_target, .-sun4v_vintr_set_target
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index f2e73e613748..a31a0439244f 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -680,22 +680,14 @@ static int starfire_set_time(u32 val)
680 680
681static u32 hypervisor_get_time(void) 681static u32 hypervisor_get_time(void)
682{ 682{
683 register unsigned long func asm("%o5"); 683 unsigned long ret, time;
684 register unsigned long arg0 asm("%o0");
685 register unsigned long arg1 asm("%o1");
686 int retries = 10000; 684 int retries = 10000;
687 685
688retry: 686retry:
689 func = HV_FAST_TOD_GET; 687 ret = sun4v_tod_get(&time);
690 arg0 = 0; 688 if (ret == HV_EOK)
691 arg1 = 0; 689 return time;
692 __asm__ __volatile__("ta %6" 690 if (ret == HV_EWOULDBLOCK) {
693 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
694 : "0" (func), "1" (arg0), "2" (arg1),
695 "i" (HV_FAST_TRAP));
696 if (arg0 == HV_EOK)
697 return arg1;
698 if (arg0 == HV_EWOULDBLOCK) {
699 if (--retries > 0) { 691 if (--retries > 0) {
700 udelay(100); 692 udelay(100);
701 goto retry; 693 goto retry;
@@ -709,20 +701,14 @@ retry:
709 701
710static int hypervisor_set_time(u32 secs) 702static int hypervisor_set_time(u32 secs)
711{ 703{
712 register unsigned long func asm("%o5"); 704 unsigned long ret;
713 register unsigned long arg0 asm("%o0");
714 int retries = 10000; 705 int retries = 10000;
715 706
716retry: 707retry:
717 func = HV_FAST_TOD_SET; 708 ret = sun4v_tod_set(secs);
718 arg0 = secs; 709 if (ret == HV_EOK)
719 __asm__ __volatile__("ta %4"
720 : "=&r" (func), "=&r" (arg0)
721 : "0" (func), "1" (arg0),
722 "i" (HV_FAST_TRAP));
723 if (arg0 == HV_EOK)
724 return 0; 710 return 0;
725 if (arg0 == HV_EWOULDBLOCK) { 711 if (ret == HV_EWOULDBLOCK) {
726 if (--retries > 0) { 712 if (--retries > 0) {
727 udelay(100); 713 udelay(100);
728 goto retry; 714 goto retry;
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 97af4311f787..3010227fe243 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -558,26 +558,11 @@ static void __init hypervisor_tlb_lock(unsigned long vaddr,
558 unsigned long pte, 558 unsigned long pte,
559 unsigned long mmu) 559 unsigned long mmu)
560{ 560{
561 register unsigned long func asm("%o5"); 561 unsigned long ret = sun4v_mmu_map_perm_addr(vaddr, 0, pte, mmu);
562 register unsigned long arg0 asm("%o0"); 562
563 register unsigned long arg1 asm("%o1"); 563 if (ret != 0) {
564 register unsigned long arg2 asm("%o2");
565 register unsigned long arg3 asm("%o3");
566
567 func = HV_FAST_MMU_MAP_PERM_ADDR;
568 arg0 = vaddr;
569 arg1 = 0;
570 arg2 = pte;
571 arg3 = mmu;
572 __asm__ __volatile__("ta 0x80"
573 : "=&r" (func), "=&r" (arg0),
574 "=&r" (arg1), "=&r" (arg2),
575 "=&r" (arg3)
576 : "0" (func), "1" (arg0), "2" (arg1),
577 "3" (arg2), "4" (arg3));
578 if (arg0 != 0) {
579 prom_printf("hypervisor_tlb_lock[%lx:%lx:%lx:%lx]: " 564 prom_printf("hypervisor_tlb_lock[%lx:%lx:%lx:%lx]: "
580 "errors with %lx\n", vaddr, 0, pte, mmu, arg0); 565 "errors with %lx\n", vaddr, 0, pte, mmu, ret);
581 prom_halt(); 566 prom_halt();
582 } 567 }
583} 568}
@@ -1314,20 +1299,16 @@ static void __init sun4v_ktsb_init(void)
1314 1299
1315void __cpuinit sun4v_ktsb_register(void) 1300void __cpuinit sun4v_ktsb_register(void)
1316{ 1301{
1317 register unsigned long func asm("%o5"); 1302 unsigned long pa, ret;
1318 register unsigned long arg0 asm("%o0");
1319 register unsigned long arg1 asm("%o1");
1320 unsigned long pa;
1321 1303
1322 pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE); 1304 pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE);
1323 1305
1324 func = HV_FAST_MMU_TSB_CTX0; 1306 ret = sun4v_mmu_tsb_ctx0(NUM_KTSB_DESCR, pa);
1325 arg0 = NUM_KTSB_DESCR; 1307 if (ret != 0) {
1326 arg1 = pa; 1308 prom_printf("hypervisor_mmu_tsb_ctx0[%lx]: "
1327 __asm__ __volatile__("ta %6" 1309 "errors with %lx\n", pa, ret);
1328 : "=&r" (func), "=&r" (arg0), "=&r" (arg1) 1310 prom_halt();
1329 : "0" (func), "1" (arg0), "2" (arg1), 1311 }
1330 "i" (HV_FAST_TRAP));
1331} 1312}
1332 1313
1333/* paging_init() sets up the page tables */ 1314/* paging_init() sets up the page tables */
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h
index 0a241c82fc7b..5cdb1ff04838 100644
--- a/include/asm-sparc64/hypervisor.h
+++ b/include/asm-sparc64/hypervisor.h
@@ -73,6 +73,8 @@
73#define HV_ENOTSUPPORTED 13 /* Function not supported */ 73#define HV_ENOTSUPPORTED 13 /* Function not supported */
74#define HV_ENOMAP 14 /* No mapping found */ 74#define HV_ENOMAP 14 /* No mapping found */
75#define HV_ETOOMANY 15 /* Too many items specified */ 75#define HV_ETOOMANY 15 /* Too many items specified */
76#define HV_ECHANNEL 16 /* Invalid LDC channel */
77#define HV_EBUSY 17 /* Resource busy */
76 78
77/* mach_exit() 79/* mach_exit()
78 * TRAP: HV_FAST_TRAP 80 * TRAP: HV_FAST_TRAP
@@ -95,6 +97,10 @@
95 */ 97 */
96#define HV_FAST_MACH_EXIT 0x00 98#define HV_FAST_MACH_EXIT 0x00
97 99
100#ifndef __ASSEMBLY__
101extern void sun4v_mach_exit(unsigned long exit_core);
102#endif
103
98/* Domain services. */ 104/* Domain services. */
99 105
100/* mach_desc() 106/* mach_desc()
@@ -121,11 +127,12 @@
121#define HV_FAST_MACH_DESC 0x01 127#define HV_FAST_MACH_DESC 0x01
122 128
123#ifndef __ASSEMBLY__ 129#ifndef __ASSEMBLY__
124extern unsigned long sun4v_mach_desc(unsigned long buffer_pa, unsigned long buf_len, 130extern unsigned long sun4v_mach_desc(unsigned long buffer_pa,
131 unsigned long buf_len,
125 unsigned long *real_buf_len); 132 unsigned long *real_buf_len);
126#endif 133#endif
127 134
128/* mach_exit() 135/* mach_sir()
129 * TRAP: HV_FAST_TRAP 136 * TRAP: HV_FAST_TRAP
130 * FUNCTION: HV_FAST_MACH_SIR 137 * FUNCTION: HV_FAST_MACH_SIR
131 * ERRORS: This service does not return. 138 * ERRORS: This service does not return.
@@ -140,59 +147,67 @@ extern unsigned long sun4v_mach_desc(unsigned long buffer_pa, unsigned long buf_
140 */ 147 */
141#define HV_FAST_MACH_SIR 0x02 148#define HV_FAST_MACH_SIR 0x02
142 149
143/* mach_set_soft_state() 150#ifndef __ASSEMBLY__
151extern void sun4v_mach_sir(void);
152#endif
153
154/* mach_set_watchdog()
144 * TRAP: HV_FAST_TRAP 155 * TRAP: HV_FAST_TRAP
145 * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE 156 * FUNCTION: HV_FAST_MACH_SET_WATCHDOG
146 * ARG0: software state 157 * ARG0: timeout in milliseconds
147 * ARG1: software state description pointer
148 * RET0: status 158 * RET0: status
149 * ERRORS: EINVAL software state not valid or software state 159 * RET1: time remaining in milliseconds
150 * description is not NULL terminated
151 * ENORADDR software state description pointer is not a
152 * valid real address
153 * EBADALIGNED software state description is not correctly
154 * aligned
155 * 160 *
156 * This allows the guest to report it's soft state to the hypervisor. There 161 * A guest uses this API to set a watchdog timer. Once the gues has set
157 * are two primary components to this state. The first part states whether 162 * the timer, it must call the timer service again either to disable or
158 * the guest software is running or not. The second containts optional 163 * postpone the expiration. If the timer expires before being reset or
159 * details specific to the software. 164 * disabled, then the hypervisor take a platform specific action leading
165 * to guest termination within a bounded time period. The platform action
166 * may include recovery actions such as reporting the expiration to a
167 * Service Processor, and/or automatically restarting the gues.
160 * 168 *
161 * The software state argument is defined below in HV_SOFT_STATE_*, and 169 * The 'timeout' parameter is specified in milliseconds, however the
162 * indicates whether the guest is operating normally or in a transitional 170 * implementated granularity is given by the 'watchdog-resolution'
163 * state. 171 * property in the 'platform' node of the guest's machine description.
172 * The largest allowed timeout value is specified by the
173 * 'watchdog-max-timeout' property of the 'platform' node.
164 * 174 *
165 * The software state description argument is a real address of a data buffer 175 * If the 'timeout' argument is not zero, the watchdog timer is set to
166 * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL 176 * expire after a minimum of 'timeout' milliseconds.
167 * terminated 7-bit ASCII string of up to 31 characters not including the 177 *
168 * NULL termination. 178 * If the 'timeout' argument is zero, the watchdog timer is disabled.
179 *
180 * If the 'timeout' value exceeds the value of the 'max-watchdog-timeout'
181 * property, the hypervisor leaves the watchdog timer state unchanged,
182 * and returns a status of EINVAL.
183 *
184 * The 'time remaining' return value is valid regardless of whether the
185 * return status is EOK or EINVAL. A non-zero return value indicates the
186 * number of milliseconds that were remaining until the timer was to expire.
187 * If less than one millisecond remains, the return value is '1'. If the
188 * watchdog timer was disabled at the time of the call, the return value is
189 * zero.
190 *
191 * If the hypervisor cannot support the exact timeout value requested, but
192 * can support a larger timeout value, the hypervisor may round the actual
193 * timeout to a value larger than the requested timeout, consequently the
194 * 'time remaining' return value may be larger than the previously requested
195 * timeout value.
196 *
197 * Any guest OS debugger should be aware that the watchdog service may be in
198 * use. Consequently, it is recommended that the watchdog service is
199 * disabled upon debugger entry (e.g. reaching a breakpoint), and then
200 * re-enabled upon returning to normal execution. The API has been designed
201 * with this in mind, and the 'time remaining' result of the disable call may
202 * be used directly as the timeout argument of the re-enable call.
169 */ 203 */
170#define HV_FAST_MACH_SET_SOFT_STATE 0x70 204#define HV_FAST_MACH_SET_WATCHDOG 0x05
171#define HV_SOFT_STATE_NORMAL 0x01
172#define HV_SOFT_STATE_TRANSITION 0x02
173 205
174#ifndef __ASSEMBLY__ 206#ifndef __ASSEMBLY__
175extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state, 207extern unsigned long sun4v_mach_set_watchdog(unsigned long timeout,
176 unsigned long msg_string_ra); 208 unsigned long *orig_timeout);
177#endif 209#endif
178 210
179/* mach_get_soft_state()
180 * TRAP: HV_FAST_TRAP
181 * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE
182 * ARG0: software state description pointer
183 * RET0: status
184 * RET1: software state
185 * ERRORS: ENORADDR software state description pointer is not a
186 * valid real address
187 * EBADALIGNED software state description is not correctly
188 * aligned
189 *
190 * Retrieve the current value of the guest's software state. The rules
191 * for the software state pointer are the same as for mach_set_soft_state()
192 * above.
193 */
194#define HV_FAST_MACH_GET_SOFT_STATE 0x71
195
196/* CPU services. 211/* CPU services.
197 * 212 *
198 * CPUs represent devices that can execute software threads. A single 213 * CPUs represent devices that can execute software threads. A single
@@ -216,8 +231,8 @@ extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
216 * FUNCTION: HV_FAST_CPU_START 231 * FUNCTION: HV_FAST_CPU_START
217 * ARG0: CPU ID 232 * ARG0: CPU ID
218 * ARG1: PC 233 * ARG1: PC
219 * ARG1: RTBA 234 * ARG2: RTBA
220 * ARG1: target ARG0 235 * ARG3: target ARG0
221 * RET0: status 236 * RET0: status
222 * ERRORS: ENOCPU Invalid CPU ID 237 * ERRORS: ENOCPU Invalid CPU ID
223 * EINVAL Target CPU ID is not in the stopped state 238 * EINVAL Target CPU ID is not in the stopped state
@@ -234,6 +249,13 @@ extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
234 */ 249 */
235#define HV_FAST_CPU_START 0x10 250#define HV_FAST_CPU_START 0x10
236 251
252#ifndef __ASSEMBLY__
253extern unsigned long sun4v_cpu_start(unsigned long cpuid,
254 unsigned long pc,
255 unsigned long rtba,
256 unsigned long arg0);
257#endif
258
237/* cpu_stop() 259/* cpu_stop()
238 * TRAP: HV_FAST_TRAP 260 * TRAP: HV_FAST_TRAP
239 * FUNCTION: HV_FAST_CPU_STOP 261 * FUNCTION: HV_FAST_CPU_STOP
@@ -255,6 +277,10 @@ extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
255 */ 277 */
256#define HV_FAST_CPU_STOP 0x11 278#define HV_FAST_CPU_STOP 0x11
257 279
280#ifndef __ASSEMBLY__
281extern unsigned long sun4v_cpu_stop(unsigned long cpuid);
282#endif
283
258/* cpu_yield() 284/* cpu_yield()
259 * TRAP: HV_FAST_TRAP 285 * TRAP: HV_FAST_TRAP
260 * FUNCTION: HV_FAST_CPU_YIELD 286 * FUNCTION: HV_FAST_CPU_YIELD
@@ -598,6 +624,11 @@ struct hv_fault_status {
598 */ 624 */
599#define HV_FAST_MMU_TSB_CTX0 0x20 625#define HV_FAST_MMU_TSB_CTX0 0x20
600 626
627#ifndef __ASSEMBLY__
628extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions,
629 unsigned long tsb_desc_ra);
630#endif
631
601/* mmu_tsb_ctxnon0() 632/* mmu_tsb_ctxnon0()
602 * TRAP: HV_FAST_TRAP 633 * TRAP: HV_FAST_TRAP
603 * FUNCTION: HV_FAST_MMU_TSB_CTXNON0 634 * FUNCTION: HV_FAST_MMU_TSB_CTXNON0
@@ -704,6 +735,13 @@ struct hv_fault_status {
704 */ 735 */
705#define HV_FAST_MMU_MAP_PERM_ADDR 0x25 736#define HV_FAST_MMU_MAP_PERM_ADDR 0x25
706 737
738#ifndef __ASSEMBLY__
739extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr,
740 unsigned long set_to_zero,
741 unsigned long tte,
742 unsigned long flags);
743#endif
744
707/* mmu_fault_area_conf() 745/* mmu_fault_area_conf()
708 * TRAP: HV_FAST_TRAP 746 * TRAP: HV_FAST_TRAP
709 * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF 747 * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF
@@ -902,6 +940,10 @@ struct hv_fault_status {
902 */ 940 */
903#define HV_FAST_TOD_GET 0x50 941#define HV_FAST_TOD_GET 0x50
904 942
943#ifndef __ASSEMBLY__
944extern unsigned long sun4v_tod_get(unsigned long *time);
945#endif
946
905/* tod_set() 947/* tod_set()
906 * TRAP: HV_FAST_TRAP 948 * TRAP: HV_FAST_TRAP
907 * FUNCTION: HV_FAST_TOD_SET 949 * FUNCTION: HV_FAST_TOD_SET
@@ -915,6 +957,10 @@ struct hv_fault_status {
915 */ 957 */
916#define HV_FAST_TOD_SET 0x51 958#define HV_FAST_TOD_SET 0x51
917 959
960#ifndef __ASSEMBLY__
961extern unsigned long sun4v_tod_set(unsigned long time);
962#endif
963
918/* Console services */ 964/* Console services */
919 965
920/* con_getchar() 966/* con_getchar()
@@ -998,6 +1044,59 @@ extern unsigned long sun4v_con_write(unsigned long buffer,
998 unsigned long *bytes_written); 1044 unsigned long *bytes_written);
999#endif 1045#endif
1000 1046
1047/* mach_set_soft_state()
1048 * TRAP: HV_FAST_TRAP
1049 * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE
1050 * ARG0: software state
1051 * ARG1: software state description pointer
1052 * RET0: status
1053 * ERRORS: EINVAL software state not valid or software state
1054 * description is not NULL terminated
1055 * ENORADDR software state description pointer is not a
1056 * valid real address
1057 * EBADALIGNED software state description is not correctly
1058 * aligned
1059 *
1060 * This allows the guest to report it's soft state to the hypervisor. There
1061 * are two primary components to this state. The first part states whether
1062 * the guest software is running or not. The second containts optional
1063 * details specific to the software.
1064 *
1065 * The software state argument is defined below in HV_SOFT_STATE_*, and
1066 * indicates whether the guest is operating normally or in a transitional
1067 * state.
1068 *
1069 * The software state description argument is a real address of a data buffer
1070 * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL
1071 * terminated 7-bit ASCII string of up to 31 characters not including the
1072 * NULL termination.
1073 */
1074#define HV_FAST_MACH_SET_SOFT_STATE 0x70
1075#define HV_SOFT_STATE_NORMAL 0x01
1076#define HV_SOFT_STATE_TRANSITION 0x02
1077
1078#ifndef __ASSEMBLY__
1079extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
1080 unsigned long msg_string_ra);
1081#endif
1082
1083/* mach_get_soft_state()
1084 * TRAP: HV_FAST_TRAP
1085 * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE
1086 * ARG0: software state description pointer
1087 * RET0: status
1088 * RET1: software state
1089 * ERRORS: ENORADDR software state description pointer is not a
1090 * valid real address
1091 * EBADALIGNED software state description is not correctly
1092 * aligned
1093 *
1094 * Retrieve the current value of the guest's software state. The rules
1095 * for the software state pointer are the same as for mach_set_soft_state()
1096 * above.
1097 */
1098#define HV_FAST_MACH_GET_SOFT_STATE 0x71
1099
1001/* Trap trace services. 1100/* Trap trace services.
1002 * 1101 *
1003 * The hypervisor provides a trap tracing capability for privileged 1102 * The hypervisor provides a trap tracing capability for privileged
@@ -1389,6 +1488,113 @@ extern unsigned long sun4v_intr_gettarget(unsigned long sysino);
1389extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid); 1488extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid);
1390#endif 1489#endif
1391 1490
1491/* vintr_get_cookie()
1492 * TRAP: HV_FAST_TRAP
1493 * FUNCTION: HV_FAST_VINTR_GET_COOKIE
1494 * ARG0: device handle
1495 * ARG1: device ino
1496 * RET0: status
1497 * RET1: cookie
1498 */
1499#define HV_FAST_VINTR_GET_COOKIE 0xa7
1500
1501/* vintr_set_cookie()
1502 * TRAP: HV_FAST_TRAP
1503 * FUNCTION: HV_FAST_VINTR_SET_COOKIE
1504 * ARG0: device handle
1505 * ARG1: device ino
1506 * ARG2: cookie
1507 * RET0: status
1508 */
1509#define HV_FAST_VINTR_SET_COOKIE 0xa8
1510
1511/* vintr_get_valid()
1512 * TRAP: HV_FAST_TRAP
1513 * FUNCTION: HV_FAST_VINTR_GET_VALID
1514 * ARG0: device handle
1515 * ARG1: device ino
1516 * RET0: status
1517 * RET1: valid state
1518 */
1519#define HV_FAST_VINTR_GET_VALID 0xa9
1520
1521/* vintr_set_valid()
1522 * TRAP: HV_FAST_TRAP
1523 * FUNCTION: HV_FAST_VINTR_SET_VALID
1524 * ARG0: device handle
1525 * ARG1: device ino
1526 * ARG2: valid state
1527 * RET0: status
1528 */
1529#define HV_FAST_VINTR_SET_VALID 0xaa
1530
1531/* vintr_get_state()
1532 * TRAP: HV_FAST_TRAP
1533 * FUNCTION: HV_FAST_VINTR_GET_STATE
1534 * ARG0: device handle
1535 * ARG1: device ino
1536 * RET0: status
1537 * RET1: state
1538 */
1539#define HV_FAST_VINTR_GET_STATE 0xab
1540
1541/* vintr_set_state()
1542 * TRAP: HV_FAST_TRAP
1543 * FUNCTION: HV_FAST_VINTR_SET_STATE
1544 * ARG0: device handle
1545 * ARG1: device ino
1546 * ARG2: state
1547 * RET0: status
1548 */
1549#define HV_FAST_VINTR_SET_STATE 0xac
1550
1551/* vintr_get_target()
1552 * TRAP: HV_FAST_TRAP
1553 * FUNCTION: HV_FAST_VINTR_GET_TARGET
1554 * ARG0: device handle
1555 * ARG1: device ino
1556 * RET0: status
1557 * RET1: cpuid
1558 */
1559#define HV_FAST_VINTR_GET_TARGET 0xad
1560
1561/* vintr_set_target()
1562 * TRAP: HV_FAST_TRAP
1563 * FUNCTION: HV_FAST_VINTR_SET_TARGET
1564 * ARG0: device handle
1565 * ARG1: device ino
1566 * ARG2: cpuid
1567 * RET0: status
1568 */
1569#define HV_FAST_VINTR_SET_TARGET 0xae
1570
1571#ifndef __ASSEMBLY__
1572extern unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle,
1573 unsigned long dev_ino,
1574 unsigned long *cookie);
1575extern unsigned long sun4v_vintr_set_cookie(unsigned long dev_handle,
1576 unsigned long dev_ino,
1577 unsigned long cookie);
1578extern unsigned long sun4v_vintr_get_valid(unsigned long dev_handle,
1579 unsigned long dev_ino,
1580 unsigned long *valid);
1581extern unsigned long sun4v_vintr_set_valid(unsigned long dev_handle,
1582 unsigned long dev_ino,
1583 unsigned long valid);
1584extern unsigned long sun4v_vintr_get_state(unsigned long dev_handle,
1585 unsigned long dev_ino,
1586 unsigned long *state);
1587extern unsigned long sun4v_vintr_set_state(unsigned long dev_handle,
1588 unsigned long dev_ino,
1589 unsigned long state);
1590extern unsigned long sun4v_vintr_get_target(unsigned long dev_handle,
1591 unsigned long dev_ino,
1592 unsigned long *cpuid);
1593extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle,
1594 unsigned long dev_ino,
1595 unsigned long cpuid);
1596#endif
1597
1392/* PCI IO services. 1598/* PCI IO services.
1393 * 1599 *
1394 * See the terminology descriptions in the device interrupt services 1600 * See the terminology descriptions in the device interrupt services
@@ -2047,6 +2253,346 @@ extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cp
2047 */ 2253 */
2048#define HV_FAST_PCI_MSG_SETVALID 0xd3 2254#define HV_FAST_PCI_MSG_SETVALID 0xd3
2049 2255
2256/* Logical Domain Channel services. */
2257
2258#define LDC_CHANNEL_DOWN 0
2259#define LDC_CHANNEL_UP 1
2260#define LDC_CHANNEL_RESETTING 2
2261
2262/* ldc_tx_qconf()
2263 * TRAP: HV_FAST_TRAP
2264 * FUNCTION: HV_FAST_LDC_TX_QCONF
2265 * ARG0: channel ID
2266 * ARG1: real address base of queue
2267 * ARG2: num entries in queue
2268 * RET0: status
2269 *
2270 * Configure transmit queue for the LDC endpoint specified by the
2271 * given channel ID, to be placed at the given real address, and
2272 * be of the given num entries. Num entries must be a power of two.
2273 * The real address base of the queue must be aligned on the queue
2274 * size. Each queue entry is 64-bytes, so for example, a 32 entry
2275 * queue must be aligned on a 2048 byte real address boundary.
2276 *
2277 * Upon configuration of a valid transmit queue the head and tail
2278 * pointers are set to a hypervisor specific identical value indicating
2279 * that the queue initially is empty.
2280 *
2281 * The endpoint's transmit queue is un-configured if num entries is zero.
2282 *
2283 * The maximum number of entries for each queue for a specific cpu may be
2284 * determined from the machine description. A transmit queue may be
2285 * specified even in the event that the LDC is down (peer endpoint has no
2286 * receive queue specified). Transmission will begin as soon as the peer
2287 * endpoint defines a receive queue.
2288 *
2289 * It is recommended that a guest wait for a transmit queue to empty prior
2290 * to reconfiguring it, or un-configuring it. Re or un-configuring of a
2291 * non-empty transmit queue behaves exactly as defined above, however it
2292 * is undefined as to how many of the pending entries in the original queue
2293 * will be delivered prior to the re-configuration taking effect.
2294 * Furthermore, as the queue configuration causes a reset of the head and
2295 * tail pointers there is no way for a guest to determine how many entries
2296 * have been sent after the configuration operation.
2297 */
2298#define HV_FAST_LDC_TX_QCONF 0xe0
2299
2300/* ldc_tx_qinfo()
2301 * TRAP: HV_FAST_TRAP
2302 * FUNCTION: HV_FAST_LDC_TX_QINFO
2303 * ARG0: channel ID
2304 * RET0: status
2305 * RET1: real address base of queue
2306 * RET2: num entries in queue
2307 *
2308 * Return the configuration info for the transmit queue of LDC endpoint
2309 * defined by the given channel ID. The real address is the currently
2310 * defined real address base of the defined queue, and num entries is the
2311 * size of the queue in terms of number of entries.
2312 *
2313 * If the specified channel ID is a valid endpoint number, but no transmit
2314 * queue has been defined this service will return success, but with num
2315 * entries set to zero and the real address will have an undefined value.
2316 */
2317#define HV_FAST_LDC_TX_QINFO 0xe1
2318
2319/* ldc_tx_get_state()
2320 * TRAP: HV_FAST_TRAP
2321 * FUNCTION: HV_FAST_LDC_TX_GET_STATE
2322 * ARG0: channel ID
2323 * RET0: status
2324 * RET1: head offset
2325 * RET2: tail offset
2326 * RET3: channel state
2327 *
2328 * Return the transmit state, and the head and tail queue pointers, for
2329 * the transmit queue of the LDC endpoint defined by the given channel ID.
2330 * The head and tail values are the byte offset of the head and tail
2331 * positions of the transmit queue for the specified endpoint.
2332 */
2333#define HV_FAST_LDC_TX_GET_STATE 0xe2
2334
2335/* ldc_tx_set_qtail()
2336 * TRAP: HV_FAST_TRAP
2337 * FUNCTION: HV_FAST_LDC_TX_SET_QTAIL
2338 * ARG0: channel ID
2339 * ARG1: tail offset
2340 * RET0: status
2341 *
2342 * Update the tail pointer for the transmit queue associated with the LDC
2343 * endpoint defined by the given channel ID. The tail offset specified
2344 * must be aligned on a 64 byte boundary, and calculated so as to increase
2345 * the number of pending entries on the transmit queue. Any attempt to
2346 * decrease the number of pending transmit queue entires is considered
2347 * an invalid tail offset and will result in an EINVAL error.
2348 *
2349 * Since the tail of the transmit queue may not be moved backwards, the
2350 * transmit queue may be flushed by configuring a new transmit queue,
2351 * whereupon the hypervisor will configure the initial transmit head and
2352 * tail pointers to be equal.
2353 */
2354#define HV_FAST_LDC_TX_SET_QTAIL 0xe3
2355
2356/* ldc_rx_qconf()
2357 * TRAP: HV_FAST_TRAP
2358 * FUNCTION: HV_FAST_LDC_RX_QCONF
2359 * ARG0: channel ID
2360 * ARG1: real address base of queue
2361 * ARG2: num entries in queue
2362 * RET0: status
2363 *
2364 * Configure receive queue for the LDC endpoint specified by the
2365 * given channel ID, to be placed at the given real address, and
2366 * be of the given num entries. Num entries must be a power of two.
2367 * The real address base of the queue must be aligned on the queue
2368 * size. Each queue entry is 64-bytes, so for example, a 32 entry
2369 * queue must be aligned on a 2048 byte real address boundary.
2370 *
2371 * The endpoint's transmit queue is un-configured if num entries is zero.
2372 *
2373 * If a valid receive queue is specified for a local endpoint the LDC is
2374 * in the up state for the purpose of transmission to this endpoint.
2375 *
2376 * The maximum number of entries for each queue for a specific cpu may be
2377 * determined from the machine description.
2378 *
2379 * As receive queue configuration causes a reset of the queue's head and
2380 * tail pointers there is no way for a gues to determine how many entries
2381 * have been received between a preceeding ldc_get_rx_state() API call
2382 * and the completion of the configuration operation. It should be noted
2383 * that datagram delivery is not guarenteed via domain channels anyway,
2384 * and therefore any higher protocol should be resilient to datagram
2385 * loss if necessary. However, to overcome this specific race potential
2386 * it is recommended, for example, that a higher level protocol be employed
2387 * to ensure either retransmission, or ensure that no datagrams are pending
2388 * on the peer endpoint's transmit queue prior to the configuration process.
2389 */
2390#define HV_FAST_LDC_RX_QCONF 0xe4
2391
2392/* ldc_rx_qinfo()
2393 * TRAP: HV_FAST_TRAP
2394 * FUNCTION: HV_FAST_LDC_RX_QINFO
2395 * ARG0: channel ID
2396 * RET0: status
2397 * RET1: real address base of queue
2398 * RET2: num entries in queue
2399 *
2400 * Return the configuration info for the receive queue of LDC endpoint
2401 * defined by the given channel ID. The real address is the currently
2402 * defined real address base of the defined queue, and num entries is the
2403 * size of the queue in terms of number of entries.
2404 *
2405 * If the specified channel ID is a valid endpoint number, but no receive
2406 * queue has been defined this service will return success, but with num
2407 * entries set to zero and the real address will have an undefined value.
2408 */
2409#define HV_FAST_LDC_RX_QINFO 0xe5
2410
2411/* ldc_rx_get_state()
2412 * TRAP: HV_FAST_TRAP
2413 * FUNCTION: HV_FAST_LDC_RX_GET_STATE
2414 * ARG0: channel ID
2415 * RET0: status
2416 * RET1: head offset
2417 * RET2: tail offset
2418 * RET3: channel state
2419 *
2420 * Return the receive state, and the head and tail queue pointers, for
2421 * the receive queue of the LDC endpoint defined by the given channel ID.
2422 * The head and tail values are the byte offset of the head and tail
2423 * positions of the receive queue for the specified endpoint.
2424 */
2425#define HV_FAST_LDC_RX_GET_STATE 0xe6
2426
2427/* ldc_rx_set_qhead()
2428 * TRAP: HV_FAST_TRAP
2429 * FUNCTION: HV_FAST_LDC_RX_SET_QHEAD
2430 * ARG0: channel ID
2431 * ARG1: head offset
2432 * RET0: status
2433 *
2434 * Update the head pointer for the receive queue associated with the LDC
2435 * endpoint defined by the given channel ID. The head offset specified
2436 * must be aligned on a 64 byte boundary, and calculated so as to decrease
2437 * the number of pending entries on the receive queue. Any attempt to
2438 * increase the number of pending receive queue entires is considered
2439 * an invalid head offset and will result in an EINVAL error.
2440 *
2441 * The receive queue may be flushed by setting the head offset equal
2442 * to the current tail offset.
2443 */
2444#define HV_FAST_LDC_RX_SET_QHEAD 0xe7
2445
2446/* LDC Map Table Entry. Each slot is defined by a translation table
2447 * entry, as specified by the LDC_MTE_* bits below, and a 64-bit
2448 * hypervisor invalidation cookie.
2449 */
2450#define LDC_MTE_PADDR 0x0fffffffffffe000 /* pa[55:13] */
2451#define LDC_MTE_COPY_W 0x0000000000000400 /* copy write access */
2452#define LDC_MTE_COPY_R 0x0000000000000200 /* copy read access */
2453#define LDC_MTE_IOMMU_W 0x0000000000000100 /* IOMMU write access */
2454#define LDC_MTE_IOMMU_R 0x0000000000000080 /* IOMMU read access */
2455#define LDC_MTE_EXEC 0x0000000000000040 /* execute */
2456#define LDC_MTE_WRITE 0x0000000000000020 /* read */
2457#define LDC_MTE_READ 0x0000000000000010 /* write */
2458#define LDC_MTE_SZALL 0x000000000000000f /* page size bits */
2459#define LDC_MTE_SZ16GB 0x0000000000000007 /* 16GB page */
2460#define LDC_MTE_SZ2GB 0x0000000000000006 /* 2GB page */
2461#define LDC_MTE_SZ256MB 0x0000000000000005 /* 256MB page */
2462#define LDC_MTE_SZ32MB 0x0000000000000004 /* 32MB page */
2463#define LDC_MTE_SZ4MB 0x0000000000000003 /* 4MB page */
2464#define LDC_MTE_SZ512K 0x0000000000000002 /* 512K page */
2465#define LDC_MTE_SZ64K 0x0000000000000001 /* 64K page */
2466#define LDC_MTE_SZ8K 0x0000000000000000 /* 8K page */
2467
2468#ifndef __ASSEMBLY__
2469struct ldc_mtable_entry {
2470 unsigned long mte;
2471 unsigned long cookie;
2472};
2473#endif
2474
2475/* ldc_set_map_table()
2476 * TRAP: HV_FAST_TRAP
2477 * FUNCTION: HV_FAST_LDC_SET_MAP_TABLE
2478 * ARG0: channel ID
2479 * ARG1: table real address
2480 * ARG2: num entries
2481 * RET0: status
2482 *
2483 * Register the MTE table at the given table real address, with the
2484 * specified num entries, for the LDC indicated by the given channel
2485 * ID.
2486 */
2487#define HV_FAST_LDC_SET_MAP_TABLE 0xea
2488
2489/* ldc_get_map_table()
2490 * TRAP: HV_FAST_TRAP
2491 * FUNCTION: HV_FAST_LDC_GET_MAP_TABLE
2492 * ARG0: channel ID
2493 * RET0: status
2494 * RET1: table real address
2495 * RET2: num entries
2496 *
2497 * Return the configuration of the current mapping table registered
2498 * for the given channel ID.
2499 */
2500#define HV_FAST_LDC_GET_MAP_TABLE 0xeb
2501
2502#define LDC_COPY_IN 0
2503#define LDC_COPY_OUT 1
2504
2505/* ldc_copy()
2506 * TRAP: HV_FAST_TRAP
2507 * FUNCTION: HV_FAST_LDC_COPY
2508 * ARG0: channel ID
2509 * ARG1: LDC_COPY_* direction code
2510 * ARG2: target real address
2511 * ARG3: local real address
2512 * ARG4: length in bytes
2513 * RET0: status
2514 * RET1: actual length in bytes
2515 */
2516#define HV_FAST_LDC_COPY 0xec
2517
2518#define LDC_MEM_READ 1
2519#define LDC_MEM_WRITE 2
2520#define LDC_MEM_EXEC 4
2521
2522/* ldc_mapin()
2523 * TRAP: HV_FAST_TRAP
2524 * FUNCTION: HV_FAST_LDC_MAPIN
2525 * ARG0: channel ID
2526 * ARG1: cookie
2527 * RET0: status
2528 * RET1: real address
2529 * RET2: LDC_MEM_* permissions
2530 */
2531#define HV_FAST_LDC_MAPIN 0xed
2532
2533/* ldc_unmap()
2534 * TRAP: HV_FAST_TRAP
2535 * FUNCTION: HV_FAST_LDC_UNMAP
2536 * ARG0: real address
2537 * RET0: status
2538 */
2539#define HV_FAST_LDC_UNMAP 0xee
2540
2541/* ldc_revoke()
2542 * TRAP: HV_FAST_TRAP
2543 * FUNCTION: HV_FAST_LDC_REVOKE
2544 * ARG0: cookie
2545 * ARG1: ldc_mtable_entry cookie
2546 * RET0: status
2547 */
2548#define HV_FAST_LDC_REVOKE 0xef
2549
2550#ifndef __ASSEMBLY__
2551extern unsigned long sun4v_ldc_tx_qconf(unsigned long channel,
2552 unsigned long ra,
2553 unsigned long num_entries);
2554extern unsigned long sun4v_ldc_tx_qinfo(unsigned long channel,
2555 unsigned long *ra,
2556 unsigned long *num_entries);
2557extern unsigned long sun4v_ldc_tx_get_state(unsigned long channel,
2558 unsigned long *head_off,
2559 unsigned long *tail_off,
2560 unsigned long *chan_state);
2561extern unsigned long sun4v_ldc_tx_set_qtail(unsigned long channel,
2562 unsigned long tail_off);
2563extern unsigned long sun4v_ldc_rx_qconf(unsigned long channel,
2564 unsigned long ra,
2565 unsigned long num_entries);
2566extern unsigned long sun4v_ldc_rx_qinfo(unsigned long channel,
2567 unsigned long *ra,
2568 unsigned long *num_entries);
2569extern unsigned long sun4v_ldc_rx_get_state(unsigned long channel,
2570 unsigned long *head_off,
2571 unsigned long *tail_off,
2572 unsigned long *chan_state);
2573extern unsigned long sun4v_ldc_rx_set_qhead(unsigned long channel,
2574 unsigned long head_off);
2575extern unsigned long sun4v_ldc_set_map_table(unsigned long channel,
2576 unsigned long ra,
2577 unsigned long num_entries);
2578extern unsigned long sun4v_ldc_get_map_table(unsigned long channel,
2579 unsigned long *ra,
2580 unsigned long *num_entries);
2581extern unsigned long sun4v_ldc_copy(unsigned long channel,
2582 unsigned long dir_code,
2583 unsigned long tgt_raddr,
2584 unsigned long lcl_raddr,
2585 unsigned long len,
2586 unsigned long *actual_len);
2587extern unsigned long sun4v_ldc_mapin(unsigned long channel,
2588 unsigned long cookie,
2589 unsigned long *ra,
2590 unsigned long *perm);
2591extern unsigned long sun4v_ldc_unmap(unsigned long ra);
2592extern unsigned long sun4v_ldc_revoke(unsigned long cookie,
2593 unsigned long mte_cookie);
2594#endif
2595
2050/* Performance counter services. */ 2596/* Performance counter services. */
2051 2597
2052#define HV_PERF_JBUS_PERF_CTRL_REG 0x00 2598#define HV_PERF_JBUS_PERF_CTRL_REG 0x00