88 files changed, 6220 insertions, 1183 deletions

diff --git a/Documentation/kprobes.txt b/Documentation/kprobes.txt
index 6877e7187113..a79633d702bf 100644
--- a/Documentation/kprobes.txt
+++ b/Documentation/kprobes.txt
@@ -172,6 +172,7 @@ architectures:
 - ia64 (Does not support probes on instruction slot1.)
 - sparc64 (Return probes not yet implemented.)
 - arm
+- ppc
 
 3. Configuring Kprobes
 
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 948f6417a40b..b68684d39f96 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -61,6 +61,7 @@ Table of Contents
       r) Freescale Display Interface Unit
       s) Freescale on board FPGA
       t) Freescael MSI interrupt controller
+      u) Freescale General-purpose Timers Module
 
   VII - Marvell Discovery mv64[345]6x System Controller chips
     1) The /system-controller node
@@ -1735,6 +1736,33 @@ platforms are moved over to use the flattened-device-tree model.
                         ......
                 };
 
+   Note that "par_io" nodes are obsolete, and should not be used for
+   the new device trees. Instead, each Par I/O bank should be represented
+   via its own gpio-controller node:
+
+   Required properties:
+   - #gpio-cells : should be "2".
+   - compatible : should be "fsl,<chip>-qe-pario-bank",
+     "fsl,mpc8323-qe-pario-bank".
+   - reg : offset to the register set and its length.
+   - gpio-controller : node to identify gpio controllers.
+
+   Example:
+        qe_pio_a: gpio-controller@1400 {
+                #gpio-cells = <2>;
+                compatible = "fsl,mpc8360-qe-pario-bank",
+                             "fsl,mpc8323-qe-pario-bank";
+                reg = <0x1400 0x18>;
+                gpio-controller;
+        };
+
+        qe_pio_e: gpio-controller@1460 {
+                #gpio-cells = <2>;
+                compatible = "fsl,mpc8360-qe-pario-bank",
+                             "fsl,mpc8323-qe-pario-bank";
+                reg = <0x1460 0x18>;
+                gpio-controller;
+        };
 
    vi) Pin configuration nodes
 
@@ -2907,6 +2935,37 @@ platforms are moved over to use the flattened-device-tree model.
                 interrupt-parent = <&mpic>;
         };
 
+    u) Freescale General-purpose Timers Module
+
+    Required properties:
+      - compatible : should be
+        "fsl,<chip>-gtm", "fsl,gtm" for SOC GTMs
+        "fsl,<chip>-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs
+        "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs
+      - reg : should contain gtm registers location and length (0x40).
+      - interrupts : should contain four interrupts.
+      - interrupt-parent : interrupt source phandle.
+      - clock-frequency : specifies the frequency driving the timer.
+
+    Example:
+
+    timer@500 {
+        compatible = "fsl,mpc8360-gtm", "fsl,gtm";
+        reg = <0x500 0x40>;
+        interrupts = <90 8 78 8 84 8 72 8>;
+        interrupt-parent = <&ipic>;
+        /* filled by u-boot */
+        clock-frequency = <0>;
+    };
+
+    timer@440 {
+        compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm";
+        reg = <0x440 0x40>;
+        interrupts = <12 13 14 15>;
+        interrupt-parent = <&qeic>;
+        /* filled by u-boot */
+        clock-frequency = <0>;
+    };
 
 VII - Marvell Discovery mv64[345]6x System Controller chips
 ===========================================================
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3934e2659407..2cde4e333fd5 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -538,6 +538,12 @@ config FSL_LBC
         help
           Freescale Localbus support
 
+config FSL_GTM
+        bool
+        depends on PPC_83xx || QUICC_ENGINE || CPM2
+        help
+          Freescale General-purpose Timers support
+
 # Yes MCA RS/6000s exist but Linux-PPC does not currently support any
 config MCA
         bool
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e98841d60330..3463253893f2 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -256,6 +256,7 @@ image-$(CONFIG_MPC85xx_DS)		+= cuImage.mpc8544ds \
                                            cuImage.mpc8572ds
 image-$(CONFIG_TQM8540)                 += cuImage.tqm8540
 image-$(CONFIG_TQM8541)                 += cuImage.tqm8541
+image-$(CONFIG_TQM8548)                 += cuImage.tqm8548
 image-$(CONFIG_TQM8555)                 += cuImage.tqm8555
 image-$(CONFIG_TQM8560)                 += cuImage.tqm8560
 image-$(CONFIG_SBC8548)                 += cuImage.sbc8548
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 972cf78fff65..8b1bb0e41905 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -118,6 +118,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
                 /* port = 0 or 1 */
                 usb@22000 {
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 6eb7c771f6a4..fd5804398417 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -83,6 +83,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {                                    /* For TSECs */
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index e1f0dca8ac39..b2068430a06d 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -144,6 +144,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8313-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index d7a1ececa30f..a40e8064d429 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -132,6 +132,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 539e02fb3526..b5968b6c8a29 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -114,6 +114,41 @@
                         interrupt-parent = <&ipic>;
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 crypto@30000 {
                         device_type = "crypto";
                         model = "SEC2";
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 179c81c6a7ac..a798d8639a7d 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -68,7 +68,7 @@
                         compatible = "fsl-i2c";
                         reg = <0x3000 0x100>;
                         interrupts = <14 0x8>;
-                        interrupt-parent = <&pic>;
+                        interrupt-parent = <&ipic>;
                         dfsrr;
                 };
 
@@ -79,7 +79,7 @@
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
-                        interrupt-parent = <&pic>;
+                        interrupt-parent = <&ipic>;
                 };
 
                 serial1: serial@4600 {
@@ -89,7 +89,42 @@
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
-                        interrupt-parent = <&pic>;
+                        interrupt-parent = <&ipic>;
+                };
+
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
                 };
 
                 crypto@30000 {
@@ -98,7 +133,7 @@
                         compatible = "talitos";
                         reg = <0x30000 0x7000>;
                         interrupts = <11 0x8>;
-                        interrupt-parent = <&pic>;
+                        interrupt-parent = <&ipic>;
                         /* Rev. 2.2 */
                         num-channels = <1>;
                         channel-fifo-len = <24>;
@@ -106,7 +141,7 @@
                         descriptor-types-mask = <0x0122003f>;
                 };
 
-                pic:pic@700 {
+                ipic:pic@700 {
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
@@ -240,13 +275,13 @@
                         compatible = "fsl,ucc-mdio";
 
                         phy00:ethernet-phy@00 {
-                                interrupt-parent = <&pic>;
+                                interrupt-parent = <&ipic>;
                                 interrupts = <0>;
                                 reg = <0x0>;
                                 device_type = "ethernet-phy";
                         };
                         phy04:ethernet-phy@04 {
-                                interrupt-parent = <&pic>;
+                                interrupt-parent = <&ipic>;
                                 interrupts = <0>;
                                 reg = <0x4>;
                                 device_type = "ethernet-phy";
@@ -261,7 +296,7 @@
                         reg = <0x80 0x80>;
                         big-endian;
                         interrupts = <32 0x8 33 0x8>; //high:32 low:33
-                        interrupt-parent = <&pic>;
+                        interrupt-parent = <&ipic>;
                 };
         };
 
@@ -270,21 +305,21 @@
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
                                 /* IDSEL 0x10 AD16 (USB) */
-                                 0x8000 0x0 0x0 0x1 &pic 17 0x8
+                                 0x8000 0x0 0x0 0x1 &ipic 17 0x8
 
                                 /* IDSEL 0x11 AD17 (Mini1)*/
-                                 0x8800 0x0 0x0 0x1 &pic 18 0x8
-                                 0x8800 0x0 0x0 0x2 &pic 19 0x8
-                                 0x8800 0x0 0x0 0x3 &pic 20 0x8
-                                 0x8800 0x0 0x0 0x4 &pic 48 0x8
+                                 0x8800 0x0 0x0 0x1 &ipic 18 0x8
+                                 0x8800 0x0 0x0 0x2 &ipic 19 0x8
+                                 0x8800 0x0 0x0 0x3 &ipic 20 0x8
+                                 0x8800 0x0 0x0 0x4 &ipic 48 0x8
 
                                 /* IDSEL 0x12 AD18 (PCI/Mini2) */
-                                 0x9000 0x0 0x0 0x1 &pic 19 0x8
-                                 0x9000 0x0 0x0 0x2 &pic 20 0x8
-                                 0x9000 0x0 0x0 0x3 &pic 48 0x8
-                                 0x9000 0x0 0x0 0x4 &pic 17 0x8>;
+                                 0x9000 0x0 0x0 0x1 &ipic 19 0x8
+                                 0x9000 0x0 0x0 0x2 &ipic 20 0x8
+                                 0x9000 0x0 0x0 0x3 &ipic 48 0x8
+                                 0x9000 0x0 0x0 0x4 &ipic 17 0x8>;
 
-                interrupt-parent = <&pic>;
+                interrupt-parent = <&ipic>;
                 interrupts = <66 0x8>;
                 bus-range = <0x0 0x0>;
                 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 9426676b0b7d..fc0f4c918c76 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -93,6 +93,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@22000 {
                         compatible = "fsl-usb2-mph";
                         reg = <0x22000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f81d735e6e72..e6afb1d1e19e 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -91,6 +91,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 0199c5c548d8..9c75c7c69e21 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -103,6 +103,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
                 /* port = 0 or 1 */
                 usb@22000 {
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 8160ff24e87e..8e33b155f112 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -118,6 +118,41 @@
                         interrupt-parent = <&ipic>;
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 crypto@30000 {
                         device_type = "crypto";
                         model = "SEC2";
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
new file mode 100644
index 000000000000..8acd1d6577f2
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -0,0 +1,432 @@
+/*
+ * MPC8360E RDK Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2007-2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8360rdk";
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                serial2 = &serial2;
+                serial3 = &serial3;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8360@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <32768>;
+                        i-cache-size = <32768>;
+                        /* filled by u-boot */
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                /* filled by u-boot */
+                reg = <0 0>;
+        };
+
+        soc@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc",
+                             "simple-bus";
+                ranges = <0 0xe0000000 0x200000>;
+                reg = <0xe0000000 0x200>;
+                /* filled by u-boot */
+                bus-frequency = <0>;
+
+                wdt@200 {
+                        compatible = "mpc83xx_wdt";
+                        reg = <0x200 0x100>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <14 8>;
+                        interrupt-parent = <&ipic>;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <16 8>;
+                        interrupt-parent = <&ipic>;
+                        dfsrr;
+                };
+
+                serial0: serial@4500 {
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        interrupts = <9 8>;
+                        interrupt-parent = <&ipic>;
+                        /* filled by u-boot */
+                        clock-frequency = <0>;
+                };
+
+                serial1: serial@4600 {
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        interrupts = <10 8>;
+                        interrupt-parent = <&ipic>;
+                        /* filled by u-boot */
+                        clock-frequency = <0>;
+                };
+
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec2-crypto";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <11 8>;
+                        interrupt-parent = <&ipic>;
+                        num-channels = <4>;
+                        channel-fifo-len = <24>;
+                        exec-units-mask = <0x7e>;
+                        /*
+                         * desc mask is for rev1.x, we need runtime fixup
+                         * for >=2.x
+                         */
+                        descriptor-types-mask = <0x1010ebf>;
+                };
+
+                ipic: interrupt-controller@700 {
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        compatible = "fsl,pq2pro-pic", "fsl,ipic";
+                        interrupt-controller;
+                        reg = <0x700 0x100>;
+                };
+
+                qe_pio_b: gpio-controller@1418 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8360-qe-pario-bank",
+                                     "fsl,mpc8323-qe-pario-bank";
+                        reg = <0x1418 0x18>;
+                        gpio-controller;
+                };
+
+                qe_pio_e: gpio-controller@1460 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8360-qe-pario-bank",
+                                     "fsl,mpc8323-qe-pario-bank";
+                        reg = <0x1460 0x18>;
+                        gpio-controller;
+                };
+
+                qe@100000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "qe";
+                        compatible = "fsl,qe", "simple-bus";
+                        ranges = <0 0x100000 0x100000>;
+                        reg = <0x100000 0x480>;
+                        /* filled by u-boot */
+                        clock-frequency = <0>;
+                        bus-frequency = <0>;
+                        brg-frequency = <0>;
+
+                        muram@10000 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "fsl,qe-muram", "fsl,cpm-muram";
+                                ranges = <0 0x10000 0xc000>;
+
+                                data-only@0 {
+                                        compatible = "fsl,qe-muram-data",
+                                                     "fsl,cpm-muram-data";
+                                        reg = <0 0xc000>;
+                                };
+                        };
+
+                        timer@440 {
+                                compatible = "fsl,mpc8360-qe-gtm",
+                                             "fsl,qe-gtm", "fsl,gtm";
+                                reg = <0x440 0x40>;
+                                interrupts = <12 13 14 15>;
+                                interrupt-parent = <&qeic>;
+                                /* filled by u-boot */
+                                clock-frequency = <0>;
+                        };
+
+                        spi@4c0 {
+                                cell-index = <0>;
+                                compatible = "fsl,spi";
+                                reg = <0x4c0 0x40>;
+                                interrupts = <2>;
+                                interrupt-parent = <&qeic>;
+                                mode = "cpu-qe";
+                        };
+
+                        spi@500 {
+                                cell-index = <1>;
+                                compatible = "fsl,spi";
+                                reg = <0x500 0x40>;
+                                interrupts = <1>;
+                                interrupt-parent = <&qeic>;
+                                mode = "cpu-qe";
+                        };
+
+                        enet0: ucc@2000 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <1>;
+                                reg = <0x2000 0x200>;
+                                interrupts = <32>;
+                                interrupt-parent = <&qeic>;
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk9";
+                                phy-handle = <&phy2>;
+                                phy-connection-type = "rgmii-rxid";
+                                /* filled by u-boot */
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                        };
+
+                        enet1: ucc@3000 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <2>;
+                                reg = <0x3000 0x200>;
+                                interrupts = <33>;
+                                interrupt-parent = <&qeic>;
+                                rx-clock-name = "none";
+                                tx-clock-name = "clk4";
+                                phy-handle = <&phy4>;
+                                phy-connection-type = "rgmii-rxid";
+                                /* filled by u-boot */
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                        };
+
+                        enet2: ucc@2600 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <7>;
+                                reg = <0x2600 0x200>;
+                                interrupts = <42>;
+                                interrupt-parent = <&qeic>;
+                                rx-clock-name = "clk20";
+                                tx-clock-name = "clk19";
+                                phy-handle = <&phy1>;
+                                phy-connection-type = "mii";
+                                /* filled by u-boot */
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                        };
+
+                        enet3: ucc@3200 {
+                                device_type = "network";
+                                compatible = "ucc_geth";
+                                cell-index = <4>;
+                                reg = <0x3200 0x200>;
+                                interrupts = <35>;
+                                interrupt-parent = <&qeic>;
+                                rx-clock-name = "clk8";
+                                tx-clock-name = "clk7";
+                                phy-handle = <&phy3>;
+                                phy-connection-type = "mii";
+                                /* filled by u-boot */
+                                local-mac-address = [ 00 00 00 00 00 00 ];
+                        };
+
+                        mdio@2120 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,ucc-mdio";
+                                reg = <0x2120 0x18>;
+
+                                phy1: ethernet-phy@1 {
+                                        device_type = "ethernet-phy";
+                                        compatible = "national,DP83848VV";
+                                        reg = <1>;
+                                };
+
+                                phy2: ethernet-phy@2 {
+                                        device_type = "ethernet-phy";
+                                        compatible = "broadcom,BCM5481UA2KMLG";
+                                        reg = <2>;
+                                };
+
+                                phy3: ethernet-phy@3 {
+                                        device_type = "ethernet-phy";
+                                        compatible = "national,DP83848VV";
+                                        reg = <3>;
+                                };
+
+                                phy4: ethernet-phy@4 {
+                                        device_type = "ethernet-phy";
+                                        compatible = "broadcom,BCM5481UA2KMLG";
+                                        reg = <4>;
+                                };
+                        };
+
+                        serial2: ucc@2400 {
+                                device_type = "serial";
+                                compatible = "ucc_uart";
+                                reg = <0x2400 0x200>;
+                                cell-index = <5>;
+                                port-number = <0>;
+                                rx-clock-name = "brg7";
+                                tx-clock-name = "brg8";
+                                interrupts = <40>;
+                                interrupt-parent = <&qeic>;
+                                soft-uart;
+                        };
+
+                        serial3: ucc@3400 {
+                                device_type = "serial";
+                                compatible = "ucc_uart";
+                                reg = <0x3400 0x200>;
+                                cell-index = <6>;
+                                port-number = <1>;
+                                rx-clock-name = "brg13";
+                                tx-clock-name = "brg14";
+                                interrupts = <41>;
+                                interrupt-parent = <&qeic>;
+                                soft-uart;
+                        };
+
+                        qeic: interrupt-controller@80 {
+                                #address-cells = <0>;
+                                #interrupt-cells = <1>;
+                                compatible = "fsl,qe-ic";
+                                interrupt-controller;
+                                reg = <0x80 0x80>;
+                                big-endian;
+                                interrupts = <32 8 33 8>;
+                                interrupt-parent = <&ipic>;
+                        };
+                };
+        };
+
+        localbus@e0005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
+                             "simple-bus";
+                reg = <0xe0005000 0xd8>;
+                ranges = <0 0 0xff800000 0x0800000
+                          1 0 0x60000000 0x0001000
+                          2 0 0x70000000 0x4000000>;
+
+                flash@0,0 {
+                        compatible = "intel,PC28F640P30T85", "cfi-flash";
+                        reg = <0 0 0x800000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+                };
+
+                display@2,0 {
+                        device_type = "display";
+                        compatible = "fujitsu,MB86277", "fujitsu,mint";
+                        reg = <2 0 0x4000000>;
+                        fujitsu,sh3;
+                        little-endian;
+                        /* filled by u-boot */
+                        address = <0>;
+                        depth = <0>;
+                        width = <0>;
+                        height = <0>;
+                        linebytes = <0>;
+                        /* linux,opened; - added by uboot */
+                };
+        };
+
+        pci0: pci@e0008500 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
+                reg = <0xe0008500 0x100>;
+                ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
+                          0x42000000 0 0x80000000 0x80000000 0 0x10000000
+                          0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
+                interrupts = <66 8>;
+                interrupt-parent = <&ipic>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */
+                                 0xa000 0 0 1 &ipic 18 8
+                                 0xa000 0 0 2 &ipic 19 8
+
+                                 /* PCI1 IDSEL 0x15 AD21 */
+                                 0xa800 0 0 1 &ipic 19 8
+                                 0xa800 0 0 2 &ipic 20 8
+                                 0xa800 0 0 3 &ipic 21 8
+                                 0xa800 0 0 4 &ipic 18 8>;
+                /* filled by u-boot */
+                bus-range = <0 0>;
+                clock-frequency = <0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index fea592574004..49a38cb95b52 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -233,41 +233,6 @@
                         interrupt-parent = <&ipic>;
                 };
 
-                crypto@30000 {
-                        model = "SEC3";
-                        compatible = "talitos";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <11 0x8>;
-                        interrupt-parent = <&ipic>;
-                        /* Rev. 3.0 geometry */
-                        num-channels = <4>;
-                        channel-fifo-len = <24>;
-                        exec-units-mask = <0x000001fe>;
-                        descriptor-types-mask = <0x03ab0ebf>;
-                };
-
-                sdhc@2e000 {
-                        model = "eSDHC";
-                        compatible = "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <42 0x8>;
-                        interrupt-parent = <&ipic>;
-                };
-
-                sata@18000 {
-                        compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
-                        reg = <0x18000 0x1000>;
-                        interrupts = <44 0x8>;
-                        interrupt-parent = <&ipic>;
-                };
-
-                sata@19000 {
-                        compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
-                        reg = <0x19000 0x1000>;
-                        interrupts = <45 0x8>;
-                        interrupt-parent = <&ipic>;
-                };
-
                 dma@82a8 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -303,6 +268,41 @@
                         };
                 };
 
+                crypto@30000 {
+                        model = "SEC3";
+                        compatible = "talitos";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <11 0x8>;
+                        interrupt-parent = <&ipic>;
+                        /* Rev. 3.0 geometry */
+                        num-channels = <4>;
+                        channel-fifo-len = <24>;
+                        exec-units-mask = <0x000001fe>;
+                        descriptor-types-mask = <0x03ab0ebf>;
+                };
+
+                sdhc@2e000 {
+                        model = "eSDHC";
+                        compatible = "fsl,esdhc";
+                        reg = <0x2e000 0x1000>;
+                        interrupts = <42 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
+
+                sata@18000 {
+                        compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+                        reg = <0x18000 0x1000>;
+                        interrupts = <44 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
+
+                sata@19000 {
+                        compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+                        reg = <0x19000 0x1000>;
+                        interrupts = <45 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
+
                 /* IPIC
                  * interrupts cell = <intr #, sense>
                  * sense values match linux IORESOURCE_IRQ_* defines:
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 5bc09ad016f5..e05743ad7b3f 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -143,6 +143,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 1d6ea080ad73..99ad49d4f13f 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -157,6 +157,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 711f9a30f9ab..a8bdbaa975c9 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -143,6 +143,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 6f78a9fd9826..980be8136276 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -157,6 +157,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index c11ceb7d3299..9d636e39f23f 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -143,6 +143,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 usb@23000 {
                         compatible = "fsl-usb2-dr";
                         reg = <0x23000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 79881a1fb8aa..f2273a872b11 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -84,6 +84,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 66192aa0f311..21ad71b825c1 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -84,6 +84,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 205598d51f25..621388db3c9e 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -100,6 +100,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 7c9d0b16d7e5..6fc8059b5a01 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -84,6 +84,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 5d9f3c4b5b71..ba8159de040b 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -73,6 +73,47 @@
                         interrupts = <16 2>;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index d7af8db1a22f..be9a289c0d62 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -107,6 +107,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index a444e6a2387d..cb06325f0b79 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -117,6 +117,88 @@
                         dfsrr;
                 };
 
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 14f718d5e50b..ae08761ffff1 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -134,6 +134,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 3839d4b7d6a7..5b76bb26085a 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -95,6 +95,41 @@
                         mode = "cpu";
                 };
 
+                dma@82a8 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+                        reg = <0x82a8 4>;
+                        ranges = <0 0x8100 0x1a8>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <71 8>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x80 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x100 0x80>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                                reg = <0x180 0x28>;
+                                interrupt-parent = <&ipic>;
+                                interrupts = <71 8>;
+                        };
+                };
+
                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
                 /* port = 0 or 1 */
                 usb@22000 {
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index d252e38283e7..21cbacb1000c 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -193,6 +193,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index e556c5a4cf95..db3632ef9888 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -98,6 +98,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 3eebeec157b3..9652456158fb 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -151,6 +151,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index 1e612836b248..fcd1db6ca0a8 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -83,6 +83,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 7b653a583a2d..e1d260b9085e 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -12,8 +12,8 @@
 /dts-v1/;
 
 / {
-        model = "tqm,8540";
-        compatible = "tqm,8540", "tqm,85xx";
+        model = "tqc,tqm8540";
+        compatible = "tqc,tqm8540";
         #address-cells = <1>;
         #size-cells = <1>;
 
@@ -90,6 +90,47 @@
                         };
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8540-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 8fe73ef34195..d083a648a81d 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -12,8 +12,8 @@
 /dts-v1/;
 
 / {
-        model = "tqm,8541";
-        compatible = "tqm,8541", "tqm,85xx";
+        model = "tqc,tqm8541";
+        compatible = "tqc,tqm8541";
         #address-cells = <1>;
         #size-cells = <1>;
 
@@ -89,6 +89,47 @@
                         };
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8541-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
new file mode 100644
index 000000000000..64d2d5bbcdf1
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -0,0 +1,406 @@
+/*
+ * TQM8548 Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "tqc,tqm8548";
+        compatible = "tqc,tqm8548";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8548@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;        // L1, 32K
+                        i-cache-size = <0x8000>;        // L1, 32K
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000>;  // Filled in by U-Boot
+        };
+
+        soc8548@a0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xa0000000 0x100000>;
+                reg = <0xa0000000 0x1000>;      // CCSRBAR
+                bus-frequency = <0>;
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8548-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8548-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2, 512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+
+                        phy1: ethernet-phy@0 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <1>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy2: ethernet-phy@1 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <2>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <3>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy4: ethernet-phy@4 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <4>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy5: ethernet-phy@5 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <5>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy2>;
+                };
+
+                enet1: ethernet@25000 {
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy1>;
+                };
+
+                enet2: ethernet@26000 {
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy3>;
+                };
+
+                enet3: ethernet@27000 {
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy4>;
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;   // reg base, size
+                        clock-frequency = <0>;  // should we fill in in uboot?
+                        current-speed = <115200>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;   // reg base, size
+                        clock-frequency = <0>;  // should we fill in in uboot?
+                        current-speed = <115200>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        // global utilities reg
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+        };
+
+        localbus@a0005000 {
+                compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xa0005000 0x100>;       // BRx, ORx, etc.
+
+                ranges = <
+                        0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
+                        1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
+                        2 0x0 0xa3000000 0x00008000     // CAN (2 x i82527)
+                        3 0x0 0xa3010000 0x00008000     // NAND FLASH
+
+                >;
+
+                flash@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <1 0x0 0x8000000>;
+                        bank-width = <4>;
+                        device-width = <1>;
+
+                        partition@0 {
+                                label = "kernel";
+                                reg = <0x00000000 0x00200000>;
+                        };
+                        partition@200000 {
+                                label = "root";
+                                reg = <0x00200000 0x00300000>;
+                        };
+                        partition@500000 {
+                                label = "user";
+                                reg = <0x00500000 0x07a00000>;
+                        };
+                        partition@7f00000 {
+                                label = "env1";
+                                reg = <0x07f00000 0x00040000>;
+                        };
+                        partition@7f40000 {
+                                label = "env2";
+                                reg = <0x07f40000 0x00040000>;
+                        };
+                        partition@7f80000 {
+                                label = "u-boot";
+                                reg = <0x07f80000 0x00080000>;
+                                read-only;
+                        };
+                };
+
+                /* Note: CAN support needs be enabled in U-Boot */
+                can0@2,0 {
+                        compatible = "intel,82527"; // Bosch CC770
+                        reg = <2 0x0 0x100>;
+                        interrupts = <4 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                can1@2,100 {
+                        compatible = "intel,82527"; // Bosch CC770
+                        reg = <2 0x100 0x100>;
+                        interrupts = <4 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                /* Note: NAND support needs to be enabled in U-Boot */
+                upm@3,0 {
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        compatible = "fsl,upm-nand";
+                        reg = <3 0x0 0x800>;
+                        fsl,upm-addr-offset = <0x10>;
+                        fsl,upm-cmd-offset = <0x08>;
+                        chip-delay = <25>; // in micro-seconds
+
+                        nand@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+
+                                partition@0 {
+                                            label = "fs";
+                                            reg = <0x00000000 0x01000000>;
+                                };
+                        };
+                };
+        };
+
+        pci0: pci@a0008000 {
+                cell-index = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
+                reg = <0xa0008000 0x1000>;
+                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                                /* IDSEL 28 */
+                                 0xe000 0 0 1 &mpic 2 1
+                                 0xe000 0 0 2 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xa2000000 0 0x01000000>;
+        };
+
+        pci1: pcie@a000a000 {
+                cell-index = <2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 (PEX) */
+                        0x00000 0 0 1 &mpic 0 1
+                        0x00000 0 0 2 &mpic 1 1
+                        0x00000 0 0 3 &mpic 2 1
+                        0x00000 0 0 4 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                bus-range = <0 0xff>;
+                ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xaf000000 0 0x08000000>;
+                clock-frequency = <33333333>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xa000a000 0x1000>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x02000000 0 0xb0000000 0x02000000 0
+                                  0xb0000000 0 0x10000000
+                                  0x01000000 0 0x00000000 0x01000000 0
+                                  0x00000000 0 0x08000000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
new file mode 100644
index 000000000000..13cd7280cb26
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -0,0 +1,406 @@
+/*
+ * TQM8548 Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "tqc,tqm8548";
+        compatible = "tqc,tqm8548";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8548@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;        // L1, 32K
+                        i-cache-size = <0x8000>;        // L1, 32K
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000>;  // Filled in by U-Boot
+        };
+
+        soc8548@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                ranges = <0x0 0xe0000000 0x100000>;
+                reg = <0xe0000000 0x1000>;      // CCSRBAR
+                bus-frequency = <0>;
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8548-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8548-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2, 512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8548-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+
+                        phy1: ethernet-phy@0 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <1>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy2: ethernet-phy@1 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <2>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <3>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy4: ethernet-phy@4 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <4>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy5: ethernet-phy@5 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                                reg = <5>;
+                                device_type = "ethernet-phy";
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy2>;
+                };
+
+                enet1: ethernet@25000 {
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy1>;
+                };
+
+                enet2: ethernet@26000 {
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy3>;
+                };
+
+                enet3: ethernet@27000 {
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy4>;
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;   // reg base, size
+                        clock-frequency = <0>;  // should we fill in in uboot?
+                        current-speed = <115200>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;   // reg base, size
+                        clock-frequency = <0>;  // should we fill in in uboot?
+                        current-speed = <115200>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        // global utilities reg
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+        };
+
+        localbus@e0005000 {
+                compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xe0005000 0x100>;       // BRx, ORx, etc.
+
+                ranges = <
+                        0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
+                        1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
+                        2 0x0 0xe3000000 0x00008000     // CAN (2 x i82527)
+                        3 0x0 0xe3010000 0x00008000     // NAND FLASH
+
+                >;
+
+                flash@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <1 0x0 0x8000000>;
+                        bank-width = <4>;
+                        device-width = <1>;
+
+                        partition@0 {
+                                label = "kernel";
+                                reg = <0x00000000 0x00200000>;
+                        };
+                        partition@200000 {
+                                label = "root";
+                                reg = <0x00200000 0x00300000>;
+                        };
+                        partition@500000 {
+                                label = "user";
+                                reg = <0x00500000 0x07a00000>;
+                        };
+                        partition@7f00000 {
+                                label = "env1";
+                                reg = <0x07f00000 0x00040000>;
+                        };
+                        partition@7f40000 {
+                                label = "env2";
+                                reg = <0x07f40000 0x00040000>;
+                        };
+                        partition@7f80000 {
+                                label = "u-boot";
+                                reg = <0x07f80000 0x00080000>;
+                                read-only;
+                        };
+                };
+
+                /* Note: CAN support needs be enabled in U-Boot */
+                can0@2,0 {
+                        compatible = "intel,82527"; // Bosch CC770
+                        reg = <2 0x0 0x100>;
+                        interrupts = <4 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                can1@2,100 {
+                        compatible = "intel,82527"; // Bosch CC770
+                        reg = <2 0x100 0x100>;
+                        interrupts = <4 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                /* Note: NAND support needs to be enabled in U-Boot */
+                upm@3,0 {
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        compatible = "fsl,upm-nand";
+                        reg = <3 0x0 0x800>;
+                        fsl,upm-addr-offset = <0x10>;
+                        fsl,upm-cmd-offset = <0x08>;
+                        chip-delay = <25>; // in micro-seconds
+
+                        nand@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+
+                                partition@0 {
+                                            label = "fs";
+                                            reg = <0x00000000 0x01000000>;
+                                };
+                        };
+                };
+        };
+
+        pci0: pci@e0008000 {
+                cell-index = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+                device_type = "pci";
+                reg = <0xe0008000 0x1000>;
+                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                                /* IDSEL 28 */
+                                 0xe000 0 0 1 &mpic 2 1
+                                 0xe000 0 0 2 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                bus-range = <0 0>;
+                ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
+        };
+
+        pci1: pcie@e000a000 {
+                cell-index = <2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 (PEX) */
+                        0x00000 0 0 1 &mpic 0 1
+                        0x00000 0 0 2 &mpic 1 1
+                        0x00000 0 0 3 &mpic 2 1
+                        0x00000 0 0 4 &mpic 3 1>;
+
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                bus-range = <0 0xff>;
+                ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000
+                          0x01000000 0 0x00000000 0xef000000 0 0x08000000>;
+                clock-frequency = <33333333>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xe000a000 0x1000>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x02000000 0 0xc0000000 0x02000000 0
+                                  0xc0000000 0 0x20000000
+                                  0x01000000 0 0x00000000 0x01000000 0
+                                  0x00000000 0 0x08000000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 0a53bb9ce76f..96b0b94ad925 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -12,8 +12,8 @@
 /dts-v1/;
 
 / {
-        model = "tqm,8555";
-        compatible = "tqm,8555", "tqm,85xx";
+        model = "tqc,tqm8555";
+        compatible = "tqc,tqm8555";
         #address-cells = <1>;
         #size-cells = <1>;
 
@@ -89,6 +89,47 @@
                         };
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8555-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index a4ee596e97bc..3fe35208907b 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -2,6 +2,7 @@
  * TQM 8560 Device Tree Source
  *
  * Copyright 2008 Freescale Semiconductor Inc.
+ * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -12,8 +13,8 @@
 /dts-v1/;
 
 / {
-        model = "tqm,8560";
-        compatible = "tqm,8560", "tqm,85xx";
+        model = "tqc,tqm8560";
+        compatible = "tqc,tqm8560";
         #address-cells = <1>;
         #size-cells = <1>;
 
@@ -90,6 +91,47 @@
                         };
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8560-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -223,6 +265,70 @@
                 };
         };
 
+        localbus@e0005000 {
+                compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xe0005000 0x100>;       // BRx, ORx, etc.
+
+                ranges = <
+                        0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
+                        1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
+                        2 0x0 0xe3000000 0x00008000     // CAN (2 x i82527)
+                >;
+
+                flash@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <1 0x0 0x8000000>;
+                        bank-width = <4>;
+                        device-width = <1>;
+
+                        partition@0 {
+                                label = "kernel";
+                                reg = <0x00000000 0x00200000>;
+                        };
+                        partition@200000 {
+                                label = "root";
+                                reg = <0x00200000 0x00300000>;
+                        };
+                        partition@500000 {
+                                label = "user";
+                                reg = <0x00500000 0x07a00000>;
+                        };
+                        partition@7f00000 {
+                                label = "env1";
+                                reg = <0x07f00000 0x00040000>;
+                        };
+                        partition@7f40000 {
+                                label = "env2";
+                                reg = <0x07f40000 0x00040000>;
+                        };
+                        partition@7f80000 {
+                                label = "u-boot";
+                                reg = <0x07f80000 0x00080000>;
+                                read-only;
+                        };
+                };
+
+                /* Note: CAN support needs be enabled in U-Boot */
+                can0@2,0 {
+                        compatible = "intel,82527"; // Bosch CC770
+                        reg = <2 0x0 0x100>;
+                        interrupts = <4 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                can1@2,100 {
+                        compatible = "intel,82527"; // Bosch CC770
+                        reg = <2 0x100 0x100>;
+                        interrupts = <4 0>;
+                        interrupt-parent = <&mpic>;
+                };
+        };
+
         pci0: pci@e0008000 {
                 cell-index = <0>;
                 #interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 4832be880998..cb87a015be7c 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -177,7 +177,7 @@ cuboot*)
     *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*)
         platformo=$object/cuboot-85xx-cpm2.o
         ;;
-    *-mpc85*|*-tqm8540|*-sbc85*)
+    *-mpc85*|*-tqm85*|*-sbc85*)
         platformo=$object/cuboot-85xx.o
         ;;
     esac
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
new file mode 100644
index 000000000000..d2c435f0da42
--- /dev/null
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -0,0 +1,1128 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc2
+# Mon May 19 21:12:32 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_FSL_EMB_PERFMON is not set
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+# CONFIG_EPOLL is not set
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_PPC_82xx is not set
+CONFIG_PPC_83xx=y
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC83xx=y
+# CONFIG_MPC831x_RDB is not set
+# CONFIG_MPC832x_MDS is not set
+# CONFIG_MPC832x_RDB is not set
+# CONFIG_MPC834x_MDS is not set
+# CONFIG_MPC834x_ITX is not set
+# CONFIG_MPC836x_MDS is not set
+CONFIG_MPC836x_RDK=y
+# CONFIG_MPC837x_MDS is not set
+# CONFIG_MPC837x_RDB is not set
+# CONFIG_SBC834x is not set
+CONFIG_IPIC=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_QUICC_ENGINE=y
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_LBC=y
+CONFIG_FSL_GTM=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_OF_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+CONFIG_BROADCOM_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_GIANFAR is not set
+CONFIG_UCC_GETH=y
+CONFIG_UGETH_NAPI=y
+# CONFIG_UGETH_MAGIC_PACKET is not set
+# CONFIG_UGETH_FILTERING is not set
+# CONFIG_UGETH_TX_ON_DEMAND is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_SERIAL_QE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_MPC83xx=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_HAVE_GPIO_LIB=y
+
+#
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_83xx_WDT=y
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+CONFIG_FB_MACMODES=y
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+CONFIG_FB_OF=y
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_FSL_DIU is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+CONFIG_UCC_SLOW=y
+CONFIG_UCC_FAST=y
+CONFIG_UCC=y
+CONFIG_QE_GPIO=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_IRQSTACKS is not set
+CONFIG_PPC_EARLY_DEBUG=y
+# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
+# CONFIG_PPC_EARLY_DEBUG_G5 is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
+# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
+# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
+# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
+# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
+# CONFIG_PPC_EARLY_DEBUG_44x is not set
+# CONFIG_PPC_EARLY_DEBUG_40x is not set
+# CONFIG_PPC_EARLY_DEBUG_CPM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_LIB_RHEAP=y
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
new file mode 100644
index 000000000000..5d5b898767a3
--- /dev/null
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -0,0 +1,1094 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc4
+# Tue Jun  3 14:39:30 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+CONFIG_PPC_85xx=y
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_E500=y
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+CONFIG_FSL_EMB_PERFMON=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC85xx=y
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_MPC85xx_CDS is not set
+# CONFIG_MPC85xx_MDS is not set
+# CONFIG_MPC85xx_DS is not set
+# CONFIG_KSI8560 is not set
+# CONFIG_STX_GP3 is not set
+# CONFIG_TQM8540 is not set
+# CONFIG_TQM8541 is not set
+CONFIG_TQM8548=y
+# CONFIG_TQM8555 is not set
+# CONFIG_TQM8560 is not set
+# CONFIG_SBC8548 is not set
+# CONFIG_SBC8560 is not set
+CONFIG_TQM85xx=y
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+CONFIG_PPC_CPM_NEW_BINDING=y
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_MATH_EMULATION=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+# CONFIG_SECCOMP is not set
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_FSL_LBC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x10000000
+CONFIG_TASK_SIZE=0xc0000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_ECC_SMC=y
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+CONFIG_MTD_NAND_FSL_UPM=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=m
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+CONFIG_IDE=y
+CONFIG_IDE_MAX_HWIFS=4
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+# CONFIG_BLK_DEV_IDEDISK is not set
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_PLATFORM is not set
+CONFIG_BLK_DEV_IDEDMA_SFF=y
+
+#
+# PCI IDE chipsets support
+#
+CONFIG_BLK_DEV_IDEPCI=y
+CONFIG_IDEPCI_PCIBUS_ORDER=y
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+CONFIG_BLK_DEV_VIA82CXXX=y
+# CONFIG_BLK_DEV_TC86C001 is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_BLK_DEV_HD_ONLY is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 2346d271fbfd..0e8f928fef70 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_IBMVIO)		+= vio.o
 obj-$(CONFIG_IBMEBUS)           += ibmebus.o
 obj-$(CONFIG_GENERIC_TBSYNC)    += smp-tbsync.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
+obj-$(CONFIG_E500)              += idle_e500.o
 obj-$(CONFIG_6xx)               += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
 obj-$(CONFIG_TAU)               += tau_6xx.o
 obj-$(CONFIG_HIBERNATION)       += swsusp.o suspend.o \
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 31283cdab61c..f247fc6ad12d 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1493,7 +1493,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80200000,
                 .cpu_name               = "e500",
-                /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
                 .cpu_features           = CPU_FTRS_E500,
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_SPE_COMP |
@@ -1510,7 +1509,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80210000,
                 .cpu_name               = "e500v2",
-                /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
                 .cpu_features           = CPU_FTRS_E500_2,
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_SPE_COMP |
@@ -1524,6 +1522,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_e500,
                 .platform               = "ppc8548",
         },
+        {       /* e500mc */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x80230000,
+                .cpu_name               = "e500mc",
+                .cpu_features           = CPU_FTRS_E500MC,
+                .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .icache_bsize           = 64,
+                .dcache_bsize           = 64,
+                .num_pmcs               = 4,
+                .oprofile_cpu_type      = "ppc/e500", /* xxx - galak, e500mc? */
+                .oprofile_type          = PPC_OPROFILE_FSL_EMB,
+                .machine_check          = machine_check_e500,
+                .platform               = "ppce500mc",
+        },
         {       /* default match */
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index fe21674d4f06..ab2d62f70b14 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -176,14 +176,14 @@ transfer_to_handler:
         cmplw   r1,r9                   /* if r1 <= ksp_limit */
         ble-    stack_ovf               /* then the kernel stack overflowed */
 5:
-#ifdef CONFIG_6xx
+#if defined(CONFIG_6xx) || defined(CONFIG_E500)
         rlwinm  r9,r1,0,0,31-THREAD_SHIFT
         tophys(r9,r9)                   /* check local flags */
         lwz     r12,TI_LOCAL_FLAGS(r9)
         mtcrf   0x01,r12
         bt-     31-TLF_NAPPING,4f
         bt-     31-TLF_SLEEPING,7f
-#endif /* CONFIG_6xx */
+#endif /* CONFIG_6xx || CONFIG_E500 */
         .globl transfer_to_handler_cont
 transfer_to_handler_cont:
 3:
@@ -196,10 +196,10 @@ transfer_to_handler_cont:
         SYNC
         RFI                             /* jump to handler, enable MMU */
 
-#ifdef CONFIG_6xx
+#if defined (CONFIG_6xx) || defined(CONFIG_E500)
 4:      rlwinm  r12,r12,0,~_TLF_NAPPING
         stw     r12,TI_LOCAL_FLAGS(r9)
-        b       power_save_6xx_restore
+        b       power_save_ppc32_restore
 
 7:      rlwinm  r12,r12,0,~_TLF_SLEEPING
         stw     r12,TI_LOCAL_FLAGS(r9)
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index f277fade1932..505494f1ee7c 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -68,9 +68,13 @@
 #define MCHECK_STACK_BASE       mcheckirq_ctx
 #define CRIT_STACK_BASE         critirq_ctx
 
-/* only on e200 for now */
+/* only on e500mc/e200 */
 #define DEBUG_STACK_BASE        dbgirq_ctx
+#ifdef CONFIG_PPC_E500MC
+#define DEBUG_SPRG              SPRN_SPRG9
+#else
 #define DEBUG_SPRG              SPRN_SPRG6W
+#endif
 
 #define EXC_LVL_FRAME_OVERHEAD  (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
 
@@ -240,7 +244,7 @@ label:
          * the code where the exception occurred (since exception entry       \
          * doesn't turn off DE automatically).  We simulate the effect        \
          * of turning off DE on entry to an exception handler by turning      \
-         * off DE in the CSRR1 value and clearing the debug status.           \
+         * off DE in the DSRR1 value and clearing the debug status.           \
          */                                                                   \
         mfspr   r10,SPRN_DBSR;          /* check single-step/branch taken */  \
         andis.  r10,r10,DBSR_IC@h;                                            \
@@ -278,7 +282,7 @@ label:
         RFDI;                                                                 \
         b       .;                                                            \
                                                                               \
-        /* continue normal handling for a critical exception... */            \
+        /* continue normal handling for a debug exception... */               \
 2:      mfspr   r4,SPRN_DBSR;                                                 \
         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
         EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 503f86030b6e..c4268500e856 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -39,6 +39,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/cache.h>
 #include "head_booke.h"
 
 /* As with the other PowerPC ports, it is expected that when code
@@ -304,7 +305,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
         SET_IVOR(13, DataTLBError);
         SET_IVOR(14, InstructionTLBError);
         SET_IVOR(15, DebugDebug);
-#if defined(CONFIG_E500)
+#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
         SET_IVOR(15, DebugCrit);
 #endif
         SET_IVOR(32, SPEUnavailable);
@@ -313,6 +314,9 @@ skpinv:	addi	r6,r6,1				/* Increment */
 #ifndef CONFIG_E200
         SET_IVOR(35, PerformanceMonitor);
 #endif
+#ifdef CONFIG_PPC_E500MC
+        SET_IVOR(36, Doorbell);
+#endif
 
         /* Establish the interrupt vector base */
         lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
@@ -750,10 +754,13 @@ interrupt_base:
         /* Performance Monitor */
         EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
 
+#ifdef CONFIG_PPC_E500MC
+        EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE)
+#endif
 
         /* Debug Interrupt */
         DEBUG_DEBUG_EXCEPTION
-#if defined(CONFIG_E500)
+#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
         DEBUG_CRIT_EXCEPTION
 #endif
 
@@ -1065,6 +1072,52 @@ _GLOBAL(set_context)
         isync                   /* Force context change */
         blr
 
+_GLOBAL(flush_dcache_L1)
+        mfspr   r3,SPRN_L1CFG0
+
+        rlwinm  r5,r3,9,3       /* Extract cache block size */
+        twlgti  r5,1            /* Only 32 and 64 byte cache blocks
+                                 * are currently defined.
+                                 */
+        li      r4,32
+        subfic  r6,r5,2         /* r6 = log2(1KiB / cache block size) -
+                                 *      log2(number of ways)
+                                 */
+        slw     r5,r4,r5        /* r5 = cache block size */
+
+        rlwinm  r7,r3,0,0xff    /* Extract number of KiB in the cache */
+        mulli   r7,r7,13        /* An 8-way cache will require 13
+                                 * loads per set.
+                                 */
+        slw     r7,r7,r6
+
+        /* save off HID0 and set DCFA */
+        mfspr   r8,SPRN_HID0
+        ori     r9,r8,HID0_DCFA@l
+        mtspr   SPRN_HID0,r9
+        isync
+
+        lis     r4,KERNELBASE@h
+        mtctr   r7
+
+1:      lwz     r3,0(r4)        /* Load... */
+        add     r4,r4,r5
+        bdnz    1b
+
+        msync
+        lis     r4,KERNELBASE@h
+        mtctr   r7
+
+1:      dcbf    0,r4            /* ...and flush. */
+        add     r4,r4,r5
+        bdnz    1b
+        
+        /* restore HID0 */
+        mtspr   SPRN_HID0,r8
+        isync
+
+        blr
+
 /*
  * We put a few things here that have to be page-aligned. This stuff
  * goes at the beginning of the data segment, which is page-aligned.
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 01bcd52bbf8e..019b02d8844f 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -153,7 +153,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
  * address of current.  R11 points to the exception frame (physical
  * address).  We have to preserve r10.
  */
-_GLOBAL(power_save_6xx_restore)
+_GLOBAL(power_save_ppc32_restore)
         lwz     r9,_LINK(r11)           /* interrupted in ppc6xx_idle: */
         stw     r9,_NIP(r11)            /* make it do a blr */
 
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
new file mode 100644
index 000000000000..06304034b393
--- /dev/null
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Dave Liu <daveliu@freescale.com>
+ * copy from idle_6xx.S and modify for e500 based processor,
+ * implement the power_save function in idle.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/threads.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+        .text
+
+_GLOBAL(e500_idle)
+        rlwinm  r3,r1,0,0,31-THREAD_SHIFT       /* current thread_info */
+        lwz     r4,TI_LOCAL_FLAGS(r3)   /* set napping bit */
+        ori     r4,r4,_TLF_NAPPING      /* so when we take an exception */
+        stw     r4,TI_LOCAL_FLAGS(r3)   /* it will return to our caller */
+
+        /* Check if we can nap or doze, put HID0 mask in r3 */
+        lis     r3,0
+BEGIN_FTR_SECTION
+        lis     r3,HID0_DOZE@h
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
+
+BEGIN_FTR_SECTION
+        /* Now check if user enabled NAP mode */
+        lis     r4,powersave_nap@ha
+        lwz     r4,powersave_nap@l(r4)
+        cmpwi   0,r4,0
+        beq     1f
+        stwu    r1,-16(r1)
+        mflr    r0
+        stw     r0,20(r1)
+        bl      flush_dcache_L1
+        lwz     r0,20(r1)
+        addi    r1,r1,16
+        mtlr    r0
+        lis     r3,HID0_NAP@h
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
+BEGIN_FTR_SECTION
+        msync
+        li      r7,L2CSR0_L2FL@l
+        mtspr   SPRN_L2CSR0,r7
+2:
+        mfspr   r7,SPRN_L2CSR0
+        andi.   r4,r7,L2CSR0_L2FL@l
+        bne     2b
+END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
+1:
+        /* Go to NAP or DOZE now */
+        mfspr   r4,SPRN_HID0
+        rlwinm  r4,r4,0,~(HID0_DOZE|HID0_NAP|HID0_SLEEP)
+        or      r4,r4,r3
+        isync
+        mtspr   SPRN_HID0,r4
+        isync
+
+        mfmsr   r7
+        oris    r7,r7,MSR_WE@h
+        ori     r7,r7,MSR_EE
+        msync
+        mtmsr   r7
+        isync
+2:      b       2b
+
+/*
+ * Return from NAP/DOZE mode, restore some CPU specific registers,
+ * r2 containing physical address of current.
+ * r11 points to the exception frame (physical address).
+ * We have to preserve r10.
+ */
+_GLOBAL(power_save_ppc32_restore)
+        lwz     r9,_LINK(r11)           /* interrupted in e500_idle */
+        stw     r9,_NIP(r11)            /* make it do a blr */
+
+#ifdef CONFIG_SMP
+        mfspr   r12,SPRN_SPRG3
+        lwz     r11,TI_CPU(r12)         /* get cpu number * 4 */
+        slwi    r11,r11,2
+#else
+        li      r11,0
+#endif
+        b       transfer_to_handler_cont
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index 23545a2f51f3..4ba2af125450 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -34,6 +34,13 @@
 #include <asm/cacheflush.h>
 #include <asm/sstep.h>
 #include <asm/uaccess.h>
+#include <asm/system.h>
+
+#ifdef CONFIG_BOOKE
+#define MSR_SINGLESTEP  (MSR_DE)
+#else
+#define MSR_SINGLESTEP  (MSR_SE)
+#endif
 
 DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
 DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
@@ -53,7 +60,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
                 ret = -EINVAL;
         }
 
-        /* insn must be on a special executable page on ppc64 */
+        /* insn must be on a special executable page on ppc64.  This is
+         * not explicitly required on ppc32 (right now), but it doesn't hurt */
         if (!ret) {
                 p->ainsn.insn = get_insn_slot();
                 if (!p->ainsn.insn)
@@ -95,7 +103,16 @@ void __kprobes arch_remove_kprobe(struct kprobe *p)
 
 static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
 {
-        regs->msr |= MSR_SE;
+        /* We turn off async exceptions to ensure that the single step will
+         * be for the instruction we have the kprobe on, if we dont its
+         * possible we'd get the single step reported for an exception handler
+         * like Decrementer or External Interrupt */
+        regs->msr &= ~MSR_EE;
+        regs->msr |= MSR_SINGLESTEP;
+#ifdef CONFIG_BOOKE
+        regs->msr &= ~MSR_CE;
+        mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
+#endif
 
         /*
          * On powerpc we should single step on the original
@@ -158,7 +175,8 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                         kprobe_opcode_t insn = *p->ainsn.insn;
                         if (kcb->kprobe_status == KPROBE_HIT_SS &&
                                         is_trap(insn)) {
-                                regs->msr &= ~MSR_SE;
+                                /* Turn off 'trace' bits */
+                                regs->msr &= ~MSR_SINGLESTEP;
                                 regs->msr |= kcb->kprobe_saved_msr;
                                 goto no_kprobe;
                         }
@@ -376,6 +394,10 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs)
         if (!cur)
                 return 0;
 
+        /* make sure we got here for instruction we have a kprobe on */
+        if (((unsigned long)cur->ainsn.insn + 4) != regs->nip)
+                return 0;
+
         if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
                 kcb->kprobe_status = KPROBE_HIT_SSDONE;
                 cur->post_handler(cur, regs, 0);
@@ -395,10 +417,10 @@ out:
 
         /*
          * if somebody else is singlestepping across a probe point, msr
-         * will have SE set, in which case, continue the remaining processing
+         * will have DE/SE set, in which case, continue the remaining processing
          * of do_debug, as if this is not a probe hit.
          */
-        if (regs->msr & MSR_SE)
+        if (regs->msr & MSR_SINGLESTEP)
                 return 0;
 
         return 1;
@@ -421,7 +443,7 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
                  * normal page fault.
                  */
                 regs->nip = (unsigned long)cur->addr;
-                regs->msr &= ~MSR_SE;
+                regs->msr &= ~MSR_SINGLESTEP; /* Turn off 'trace' bits */
                 regs->msr |= kcb->kprobe_saved_msr;
                 if (kcb->kprobe_status == KPROBE_REENTER)
                         restore_previous_kprobe(kcb);
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 89aaaa6f3561..6321ae36f729 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
  *
  * flush_icache_range(unsigned long start, unsigned long stop)
  */
-_GLOBAL(__flush_icache_range)
+_KPROBE(__flush_icache_range)
 BEGIN_FTR_SECTION
         blr                             /* for 601, do nothing */
 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index bef0be3fd98b..9e83add54290 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -127,6 +127,11 @@ void __init machine_init(unsigned long dt_ptr, unsigned long phys)
                 ppc_md.power_save = ppc6xx_idle;
 #endif
 
+#ifdef CONFIG_E500
+        if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
+            cpu_has_feature(CPU_FTR_CAN_NAP))
+                ppc_md.power_save = e500_idle;
+#endif
         if (ppc_md.progress)
                 ppc_md.progress("id mach(): done", 0x200);
 }
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4b5b7ff4f78b..b463d48145a4 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1030,21 +1030,29 @@ void SoftwareEmulation(struct pt_regs *regs)
 
 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
 
-void DebugException(struct pt_regs *regs, unsigned long debug_status)
+void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
 {
         if (debug_status & DBSR_IC) {   /* instruction completion */
                 regs->msr &= ~MSR_DE;
+
+                /* Disable instruction completion */
+                mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
+                /* Clear the instruction completion event */
+                mtspr(SPRN_DBSR, DBSR_IC);
+
+                if (notify_die(DIE_SSTEP, "single_step", regs, 5,
+                               5, SIGTRAP) == NOTIFY_STOP) {
+                        return;
+                }
+
+                if (debugger_sstep(regs))
+                        return;
+
                 if (user_mode(regs)) {
                         current->thread.dbcr0 &= ~DBCR0_IC;
-                } else {
-                        /* Disable instruction completion */
-                        mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
-                        /* Clear the instruction completion event */
-                        mtspr(SPRN_DBSR, DBSR_IC);
-                        if (debugger_sstep(regs))
-                                return;
                 }
-                _exception(SIGTRAP, regs, TRAP_TRACE, 0);
+
+                _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
         }
 }
 #endif /* CONFIG_4xx || CONFIG_BOOKE */
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 583b0c7409c9..fe75b2ac3c9f 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -58,6 +58,17 @@ config MPC836x_MDS
         help
           This option enables support for the MPC836x MDS Processor Board.
 
+config MPC836x_RDK
+        bool "Freescale/Logic MPC836x RDK"
+        select DEFAULT_UIMAGE
+        select QUICC_ENGINE
+        select QE_GPIO
+        select FSL_GTM
+        select FSL_LBC
+        help
+          This option enables support for the MPC836x RDK Processor Board,
+          also known as ZOOM PowerQUICC Kit.
+
 config MPC837x_MDS
         bool "Freescale MPC837x MDS"
         select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 76494bed69ae..f331fd7dd836 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_MPC832x_RDB)	+= mpc832x_rdb.o
 obj-$(CONFIG_MPC834x_MDS)       += mpc834x_mds.o
 obj-$(CONFIG_MPC834x_ITX)       += mpc834x_itx.o
 obj-$(CONFIG_MPC836x_MDS)       += mpc836x_mds.o
+obj-$(CONFIG_MPC836x_RDK)       += mpc836x_rdk.o
 obj-$(CONFIG_MPC832x_MDS)       += mpc832x_mds.o
 obj-$(CONFIG_MPC837x_MDS)       += mpc837x_mds.o
 obj-$(CONFIG_SBC834x)           += sbc834x.o
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
new file mode 100644
index 000000000000..c10dec4bf178
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
@@ -0,0 +1,102 @@
+/*
+ * MPC8360E-RDK board file.
+ *
+ * Copyright (c) 2006  Freescale Semicondutor, Inc.
+ * Copyright (c) 2007-2008  MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc83xx.h"
+
+static struct of_device_id __initdata mpc836x_rdk_ids[] = {
+        { .compatible = "simple-bus", },
+        {},
+};
+
+static int __init mpc836x_rdk_declare_of_platform_devices(void)
+{
+        return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL);
+}
+machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices);
+
+static void __init mpc836x_rdk_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+        struct device_node *np;
+#endif
+
+        if (ppc_md.progress)
+                ppc_md.progress("mpc836x_rdk_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+                mpc83xx_add_bridge(np);
+#endif
+
+        qe_reset();
+}
+
+static void __init mpc836x_rdk_init_IRQ(void)
+{
+        struct device_node *np;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+        if (!np)
+                return;
+
+        ipic_init(np, 0);
+
+        /*
+         * Initialize the default interrupt mapping priorities,
+         * in case the boot rom changed something on us.
+         */
+        ipic_set_default_priority();
+        of_node_put(np);
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+        if (!np)
+                return;
+
+        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
+        of_node_put(np);
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened.
+ */
+static int __init mpc836x_rdk_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk");
+}
+
+define_machine(mpc836x_rdk) {
+        .name           = "MPC836x RDK",
+        .probe          = mpc836x_rdk_probe,
+        .setup_arch     = mpc836x_rdk_setup_arch,
+        .init_IRQ       = mpc836x_rdk_init_IRQ,
+        .get_irq        = ipic_get_irq,
+        .restart        = mpc83xx_restart,
+        .time_init      = mpc83xx_time_init,
+        .calibrate_decr = generic_calibrate_decr,
+        .progress       = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 7ff29d53dc2d..91d67ee8e6db 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -74,6 +74,14 @@ config TQM8541
         select TQM85xx
         select CPM2
 
+config TQM8548
+        bool "TQ Components TQM8548"
+        help
+          This option enables support for the TQ Components TQM8548 board.
+        select DEFAULT_UIMAGE
+        select PPC_CPM_NEW_BINDING
+        select TQM85xx
+
 config TQM8555
         bool "TQ Components TQM8555"
         help
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3582c841844b..ba498d6f2d02 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -119,6 +119,8 @@ static const struct cpm_pin mpc8560_ads_pins[] = {
         {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 
         /* SCC2 */
+        {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
         {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -145,7 +147,6 @@ static const struct cpm_pin mpc8560_ads_pins[] = {
         {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
         {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
         {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -156,8 +157,9 @@ static const struct cpm_pin mpc8560_ads_pins[] = {
         {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
         {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
         {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
-        {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
+        {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
+        {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
+        {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 };
 
 static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 77681acf1bae..d850880d6964 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -120,8 +120,18 @@ static void __init tqm85xx_setup_arch(void)
 #endif
 
 #ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-                fsl_add_bridge(np, 1);
+        for_each_node_by_type(np, "pci") {
+                if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+                    of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
+                        struct resource rsrc;
+                        if (!of_address_to_resource(np, 0, &rsrc)) {
+                                if ((rsrc.start & 0xfffff) == 0x8000)
+                                        fsl_add_bridge(np, 1);
+                                else
+                                        fsl_add_bridge(np, 0);
+                        }
+                }
+        }
 #endif
 }
 
@@ -165,10 +175,11 @@ static int __init tqm85xx_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        if ((of_flat_dt_is_compatible(root, "tqm,8540")) ||
-            (of_flat_dt_is_compatible(root, "tqm,8541")) ||
-            (of_flat_dt_is_compatible(root, "tqm,8555")) ||
-            (of_flat_dt_is_compatible(root, "tqm,8560")))
+        if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) ||
+            (of_flat_dt_is_compatible(root, "tqc,tqm8541")) ||
+            (of_flat_dt_is_compatible(root, "tqc,tqm8548")) ||
+            (of_flat_dt_is_compatible(root, "tqc,tqm8555")) ||
+            (of_flat_dt_is_compatible(root, "tqc,tqm8560")))
                 return 1;
 
         return 0;
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f7efaa925a13..1a1ccfbb9232 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -95,6 +95,11 @@ config E500
         select FSL_EMB_PERFMON
         bool
 
+config PPC_E500MC
+        bool "e500mc Support"
+        select PPC_FPU
+        depends on E500
+
 config PPC_FPU
         bool
         default y if PPC64
@@ -157,7 +162,7 @@ config ALTIVEC
 
 config SPE
         bool "SPE Support"
-        depends on E200 || E500
+        depends on E200 || (E500 && !PPC_E500MC)
         default y
         ---help---
           This option enables kernel support for the Signal Processing
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index dd6dff3ffb0f..16a0ed28eb00 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_MMIO_NVRAM)	+= mmio_nvram.o
 obj-$(CONFIG_FSL_SOC)           += fsl_soc.o
 obj-$(CONFIG_FSL_PCI)           += fsl_pci.o $(fsl-msi-obj-y)
 obj-$(CONFIG_FSL_LBC)           += fsl_lbc.o
+obj-$(CONFIG_FSL_GTM)           += fsl_gtm.o
 obj-$(CONFIG_RAPIDIO)           += fsl_rio.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
 obj-$(CONFIG_QUICC_ENGINE)      += qe_lib/
@@ -41,6 +42,7 @@ endif
 ifeq ($(ARCH),powerpc)
 obj-$(CONFIG_CPM)               += cpm_common.o
 obj-$(CONFIG_CPM2)              += cpm2.o cpm2_pic.o
+obj-$(CONFIG_QUICC_ENGINE)      += cpm_common.o
 obj-$(CONFIG_PPC_DCR)           += dcr.o
 obj-$(CONFIG_8xx)               += mpc8xx_pic.o cpm1.o
 obj-$(CONFIG_UCODE_PATCH)       += micropatch.o
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2dce44f..9b75d164bdf9 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -85,9 +85,13 @@ int __init cpm_muram_init(void)
 
         np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
         if (!np) {
-                printk(KERN_ERR "Cannot find CPM muram data node");
-                ret = -ENODEV;
-                goto out;
+                /* try legacy bindings */
+                np = of_find_node_by_name(NULL, "data-only");
+                if (!np) {
+                        printk(KERN_ERR "Cannot find CPM muram data node");
+                        ret = -ENODEV;
+                        goto out;
+                }
         }
 
         muram_pbase = of_translate_address(np, zero);
@@ -189,6 +193,12 @@ void __iomem *cpm_muram_addr(unsigned long offset)
 }
 EXPORT_SYMBOL(cpm_muram_addr);
 
+unsigned long cpm_muram_offset(void __iomem *addr)
+{
+        return addr - (void __iomem *)muram_vbase;
+}
+EXPORT_SYMBOL(cpm_muram_offset);
+
 /**
  * cpm_muram_dma - turn a muram virtual address into a DMA address
  * @offset: virtual address from cpm_muram_addr() to convert
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
new file mode 100644
index 000000000000..714ec02fed2e
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -0,0 +1,434 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ *               Shlomi Gridish <gridish@freescale.com>
+ *               Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *               Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/list.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <linux/bitops.h>
+#include <asm/fsl_gtm.h>
+
+#define GTCFR_STP(x)            ((x) & 1 ? 1 << 5 : 1 << 1)
+#define GTCFR_RST(x)            ((x) & 1 ? 1 << 4 : 1 << 0)
+
+#define GTMDR_ICLK_MASK         (3 << 1)
+#define GTMDR_ICLK_ICAS         (0 << 1)
+#define GTMDR_ICLK_ICLK         (1 << 1)
+#define GTMDR_ICLK_SLGO         (2 << 1)
+#define GTMDR_FRR               (1 << 3)
+#define GTMDR_ORI               (1 << 4)
+#define GTMDR_SPS(x)            ((x) << 8)
+
+struct gtm_timers_regs {
+        u8      gtcfr1;         /* Timer 1, Timer 2 global config register */
+        u8      res0[0x3];
+        u8      gtcfr2;         /* Timer 3, timer 4 global config register */
+        u8      res1[0xB];
+        __be16  gtmdr1;         /* Timer 1 mode register */
+        __be16  gtmdr2;         /* Timer 2 mode register */
+        __be16  gtrfr1;         /* Timer 1 reference register */
+        __be16  gtrfr2;         /* Timer 2 reference register */
+        __be16  gtcpr1;         /* Timer 1 capture register */
+        __be16  gtcpr2;         /* Timer 2 capture register */
+        __be16  gtcnr1;         /* Timer 1 counter */
+        __be16  gtcnr2;         /* Timer 2 counter */
+        __be16  gtmdr3;         /* Timer 3 mode register */
+        __be16  gtmdr4;         /* Timer 4 mode register */
+        __be16  gtrfr3;         /* Timer 3 reference register */
+        __be16  gtrfr4;         /* Timer 4 reference register */
+        __be16  gtcpr3;         /* Timer 3 capture register */
+        __be16  gtcpr4;         /* Timer 4 capture register */
+        __be16  gtcnr3;         /* Timer 3 counter */
+        __be16  gtcnr4;         /* Timer 4 counter */
+        __be16  gtevr1;         /* Timer 1 event register */
+        __be16  gtevr2;         /* Timer 2 event register */
+        __be16  gtevr3;         /* Timer 3 event register */
+        __be16  gtevr4;         /* Timer 4 event register */
+        __be16  gtpsr1;         /* Timer 1 prescale register */
+        __be16  gtpsr2;         /* Timer 2 prescale register */
+        __be16  gtpsr3;         /* Timer 3 prescale register */
+        __be16  gtpsr4;         /* Timer 4 prescale register */
+        u8 res2[0x40];
+} __attribute__ ((packed));
+
+struct gtm {
+        unsigned int clock;
+        struct gtm_timers_regs __iomem *regs;
+        struct gtm_timer timers[4];
+        spinlock_t lock;
+        struct list_head list_node;
+};
+
+static LIST_HEAD(gtms);
+
+/**
+ * gtm_get_timer - request GTM timer to use it with the rest of GTM API
+ * Context:     non-IRQ
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer->irq
+ * to manage timer interrupt.
+ */
+struct gtm_timer *gtm_get_timer16(void)
+{
+        struct gtm *gtm = NULL;
+        int i;
+
+        list_for_each_entry(gtm, &gtms, list_node) {
+                spin_lock_irq(&gtm->lock);
+
+                for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
+                        if (!gtm->timers[i].requested) {
+                                gtm->timers[i].requested = true;
+                                spin_unlock_irq(&gtm->lock);
+                                return &gtm->timers[i];
+                        }
+                }
+
+                spin_unlock_irq(&gtm->lock);
+        }
+
+        if (gtm)
+                return ERR_PTR(-EBUSY);
+        return ERR_PTR(-ENODEV);
+}
+EXPORT_SYMBOL(gtm_get_timer16);
+
+/**
+ * gtm_get_specific_timer - request specific GTM timer
+ * @gtm:        specific GTM, pass here GTM's device_node->data
+ * @timer:      specific timer number, Timer1 is 0.
+ * Context:     non-IRQ
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer->irq
+ * to manage timer interrupt.
+ */
+struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
+                                           unsigned int timer)
+{
+        struct gtm_timer *ret = ERR_PTR(-EBUSY);
+
+        if (timer > 3)
+                return ERR_PTR(-EINVAL);
+
+        spin_lock_irq(&gtm->lock);
+
+        if (gtm->timers[timer].requested)
+                goto out;
+
+        ret = &gtm->timers[timer];
+        ret->requested = true;
+
+out:
+        spin_unlock_irq(&gtm->lock);
+        return ret;
+}
+EXPORT_SYMBOL(gtm_get_specific_timer16);
+
+/**
+ * gtm_put_timer16 - release 16 bits GTM timer
+ * @tmr:        pointer to the gtm_timer structure obtained from gtm_get_timer
+ * Context:     any
+ *
+ * This function releases GTM timer so others may request it.
+ */
+void gtm_put_timer16(struct gtm_timer *tmr)
+{
+        gtm_stop_timer16(tmr);
+
+        spin_lock_irq(&tmr->gtm->lock);
+        tmr->requested = false;
+        spin_unlock_irq(&tmr->gtm->lock);
+}
+EXPORT_SYMBOL(gtm_put_timer16);
+
+/*
+ * This is back-end for the exported functions, it's used to reset single
+ * timer in reference mode.
+ */
+static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency,
+                               int reference_value, bool free_run)
+{
+        struct gtm *gtm = tmr->gtm;
+        int num = tmr - &gtm->timers[0];
+        unsigned int prescaler;
+        u8 iclk = GTMDR_ICLK_ICLK;
+        u8 psr;
+        u8 sps;
+        unsigned long flags;
+        int max_prescaler = 256 * 256 * 16;
+
+        /* CPM2 doesn't have primary prescaler */
+        if (!tmr->gtpsr)
+                max_prescaler /= 256;
+
+        prescaler = gtm->clock / frequency;
+        /*
+         * We have two 8 bit prescalers -- primary and secondary (psr, sps),
+         * plus "slow go" mode (clk / 16). So, total prescale value is
+         * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
+         */
+        if (prescaler > max_prescaler)
+                return -EINVAL;
+
+        if (prescaler > max_prescaler / 16) {
+                iclk = GTMDR_ICLK_SLGO;
+                prescaler /= 16;
+        }
+
+        if (prescaler <= 256) {
+                psr = 0;
+                sps = prescaler - 1;
+        } else {
+                psr = 256 - 1;
+                sps = prescaler / 256 - 1;
+        }
+
+        spin_lock_irqsave(&gtm->lock, flags);
+
+        /*
+         * Properly reset timers: stop, reset, set up prescalers, reference
+         * value and clear event register.
+         */
+        clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
+                                 GTCFR_STP(num) | GTCFR_RST(num));
+
+        setbits8(tmr->gtcfr, GTCFR_STP(num));
+
+        if (tmr->gtpsr)
+                out_be16(tmr->gtpsr, psr);
+        clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
+                        GTMDR_ORI | (free_run ? GTMDR_FRR : 0));
+        out_be16(tmr->gtcnr, 0);
+        out_be16(tmr->gtrfr, reference_value);
+        out_be16(tmr->gtevr, 0xFFFF);
+
+        /* Let it be. */
+        clrbits8(tmr->gtcfr, GTCFR_STP(num));
+
+        spin_unlock_irqrestore(&gtm->lock, flags);
+
+        return 0;
+}
+
+/**
+ * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
+ * @tmr:        pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @usec:       timer interval in microseconds
+ * @reload:     if set, the timer will reset upon expiry rather than
+ *              continue running free.
+ * Context:     any
+ *
+ * This function (re)sets the GTM timer so that it counts up to the requested
+ * interval value, and fires the interrupt when the value is reached. This
+ * function will reduce the precision of the timer as needed in order for the
+ * requested timeout to fit in a 16-bit register.
+ */
+int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload)
+{
+        /* quite obvious, frequency which is enough for µSec precision */
+        int freq = 1000000;
+        unsigned int bit;
+
+        bit = fls_long(usec);
+        if (bit > 15) {
+                freq >>= bit - 15;
+                usec >>= bit - 15;
+        }
+
+        if (!freq)
+                return -EINVAL;
+
+        return gtm_set_ref_timer16(tmr, freq, usec, reload);
+}
+EXPORT_SYMBOL(gtm_set_timer16);
+
+/**
+ * gtm_set_exact_utimer16 - (re)set 16 bits timer
+ * @tmr:        pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @usec:       timer interval in microseconds
+ * @reload:     if set, the timer will reset upon expiry rather than
+ *              continue running free.
+ * Context:     any
+ *
+ * This function (re)sets GTM timer so that it counts up to the requested
+ * interval value, and fires the interrupt when the value is reached. If reload
+ * flag was set, timer will also reset itself upon reference value, otherwise
+ * it continues to increment.
+ *
+ * The _exact_ bit in the function name states that this function will not
+ * crop precision of the "usec" argument, thus usec is limited to 16 bits
+ * (single timer width).
+ */
+int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload)
+{
+        /* quite obvious, frequency which is enough for µSec precision */
+        const int freq = 1000000;
+
+        /*
+         * We can lower the frequency (and probably power consumption) by
+         * dividing both frequency and usec by 2 until there is no remainder.
+         * But we won't bother with this unless savings are measured, so just
+         * run the timer as is.
+         */
+
+        return gtm_set_ref_timer16(tmr, freq, usec, reload);
+}
+EXPORT_SYMBOL(gtm_set_exact_timer16);
+
+/**
+ * gtm_stop_timer16 - stop single timer
+ * @tmr:        pointer to the gtm_timer structure obtained from gtm_get_timer
+ * Context:     any
+ *
+ * This function simply stops the GTM timer.
+ */
+void gtm_stop_timer16(struct gtm_timer *tmr)
+{
+        struct gtm *gtm = tmr->gtm;
+        int num = tmr - &gtm->timers[0];
+        unsigned long flags;
+
+        spin_lock_irqsave(&gtm->lock, flags);
+
+        setbits8(tmr->gtcfr, GTCFR_STP(num));
+        out_be16(tmr->gtevr, 0xFFFF);
+
+        spin_unlock_irqrestore(&gtm->lock, flags);
+}
+EXPORT_SYMBOL(gtm_stop_timer16);
+
+/**
+ * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
+ * @tmr:        pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @events:     events mask to ack
+ * Context:     any
+ *
+ * Thus function used to acknowledge timer interrupt event, use it inside the
+ * interrupt handler.
+ */
+void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
+{
+        out_be16(tmr->gtevr, events);
+}
+EXPORT_SYMBOL(gtm_ack_timer16);
+
+static void __init gtm_set_shortcuts(struct device_node *np,
+                                     struct gtm_timer *timers,
+                                     struct gtm_timers_regs __iomem *regs)
+{
+        /*
+         * Yeah, I don't like this either, but timers' registers a bit messed,
+         * so we have to provide shortcuts to write timer independent code.
+         * Alternative option is to create gt*() accessors, but that will be
+         * even uglier and cryptic.
+         */
+        timers[0].gtcfr = &regs->gtcfr1;
+        timers[0].gtmdr = &regs->gtmdr1;
+        timers[0].gtcnr = &regs->gtcnr1;
+        timers[0].gtrfr = &regs->gtrfr1;
+        timers[0].gtevr = &regs->gtevr1;
+
+        timers[1].gtcfr = &regs->gtcfr1;
+        timers[1].gtmdr = &regs->gtmdr2;
+        timers[1].gtcnr = &regs->gtcnr2;
+        timers[1].gtrfr = &regs->gtrfr2;
+        timers[1].gtevr = &regs->gtevr2;
+
+        timers[2].gtcfr = &regs->gtcfr2;
+        timers[2].gtmdr = &regs->gtmdr3;
+        timers[2].gtcnr = &regs->gtcnr3;
+        timers[2].gtrfr = &regs->gtrfr3;
+        timers[2].gtevr = &regs->gtevr3;
+
+        timers[3].gtcfr = &regs->gtcfr2;
+        timers[3].gtmdr = &regs->gtmdr4;
+        timers[3].gtcnr = &regs->gtcnr4;
+        timers[3].gtrfr = &regs->gtrfr4;
+        timers[3].gtevr = &regs->gtevr4;
+
+        /* CPM2 doesn't have primary prescaler */
+        if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) {
+                timers[0].gtpsr = &regs->gtpsr1;
+                timers[1].gtpsr = &regs->gtpsr2;
+                timers[2].gtpsr = &regs->gtpsr3;
+                timers[3].gtpsr = &regs->gtpsr4;
+        }
+}
+
+static int __init fsl_gtm_init(void)
+{
+        struct device_node *np;
+
+        for_each_compatible_node(np, NULL, "fsl,gtm") {
+                int i;
+                struct gtm *gtm;
+                const u32 *clock;
+                int size;
+
+                gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
+                if (!gtm) {
+                        pr_err("%s: unable to allocate memory\n",
+                                np->full_name);
+                        continue;
+                }
+
+                spin_lock_init(&gtm->lock);
+
+                clock = of_get_property(np, "clock-frequency", &size);
+                if (!clock || size != sizeof(*clock)) {
+                        pr_err("%s: no clock-frequency\n", np->full_name);
+                        goto err;
+                }
+                gtm->clock = *clock;
+
+                for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
+                        int ret;
+                        struct resource irq;
+
+                        ret = of_irq_to_resource(np, i, &irq);
+                        if (ret == NO_IRQ) {
+                                pr_err("%s: not enough interrupts specified\n",
+                                       np->full_name);
+                                goto err;
+                        }
+                        gtm->timers[i].irq = irq.start;
+                        gtm->timers[i].gtm = gtm;
+                }
+
+                gtm->regs = of_iomap(np, 0);
+                if (!gtm->regs) {
+                        pr_err("%s: unable to iomap registers\n",
+                               np->full_name);
+                        goto err;
+                }
+
+                gtm_set_shortcuts(np, gtm->timers, gtm->regs);
+                list_add(&gtm->list_node, &gtms);
+
+                /* We don't want to lose the node and its ->data */
+                np->data = gtm;
+                of_node_get(np);
+
+                continue;
+err:
+                kfree(gtm);
+        }
+        return 0;
+}
+arch_initcall(fsl_gtm_init);
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig
index adc66212a419..4bb18f57901e 100644
--- a/arch/powerpc/sysdev/qe_lib/Kconfig
+++ b/arch/powerpc/sysdev/qe_lib/Kconfig
@@ -20,3 +20,16 @@ config UCC
         bool
         default y if UCC_FAST || UCC_SLOW
 
+config QE_USB
+        bool
+        help
+          QE USB Host Controller support
+
+config QE_GPIO
+        bool "QE GPIO support"
+        depends on QUICC_ENGINE
+        select GENERIC_GPIO
+        select HAVE_GPIO_LIB
+        help
+          Say Y here if you're going to use hardware that connects to the
+          QE GPIOs.
diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/arch/powerpc/sysdev/qe_lib/Makefile
index 874fe1a5b1cf..f1855c185291 100644
--- a/arch/powerpc/sysdev/qe_lib/Makefile
+++ b/arch/powerpc/sysdev/qe_lib/Makefile
@@ -6,3 +6,5 @@ obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
 obj-$(CONFIG_UCC)       += ucc.o
 obj-$(CONFIG_UCC_SLOW)  += ucc_slow.o
 obj-$(CONFIG_UCC_FAST)  += ucc_fast.o
+obj-$(CONFIG_QE_USB)    += usb.o
+obj-$(CONFIG_QE_GPIO)   += gpio.o
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c
new file mode 100644
index 000000000000..8e5a0bc36d0b
--- /dev/null
+++ b/arch/powerpc/sysdev/qe_lib/gpio.c
@@ -0,0 +1,149 @@
+/*
+ * QUICC Engine GPIOs
+ *
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+#include <asm/qe.h>
+
+struct qe_gpio_chip {
+        struct of_mm_gpio_chip mm_gc;
+        spinlock_t lock;
+
+        /* shadowed data register to clear/set bits safely */
+        u32 cpdata;
+};
+
+static inline struct qe_gpio_chip *
+to_qe_gpio_chip(struct of_mm_gpio_chip *mm_gc)
+{
+        return container_of(mm_gc, struct qe_gpio_chip, mm_gc);
+}
+
+static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+        struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+        struct qe_pio_regs __iomem *regs = mm_gc->regs;
+
+        qe_gc->cpdata = in_be32(&regs->cpdata);
+}
+
+static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+        struct qe_pio_regs __iomem *regs = mm_gc->regs;
+        u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
+
+        return in_be32(&regs->cpdata) & pin_mask;
+}
+
+static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+        struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+        struct qe_pio_regs __iomem *regs = mm_gc->regs;
+        unsigned long flags;
+        u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
+
+        spin_lock_irqsave(&qe_gc->lock, flags);
+
+        if (val)
+                qe_gc->cpdata |= pin_mask;
+        else
+                qe_gc->cpdata &= ~pin_mask;
+
+        out_be32(&regs->cpdata, qe_gc->cpdata);
+
+        spin_unlock_irqrestore(&qe_gc->lock, flags);
+}
+
+static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+        struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+        unsigned long flags;
+
+        spin_lock_irqsave(&qe_gc->lock, flags);
+
+        __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_IN, 0, 0, 0);
+
+        spin_unlock_irqrestore(&qe_gc->lock, flags);
+
+        return 0;
+}
+
+static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+        struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+        unsigned long flags;
+
+        spin_lock_irqsave(&qe_gc->lock, flags);
+
+        __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_OUT, 0, 0, 0);
+
+        spin_unlock_irqrestore(&qe_gc->lock, flags);
+
+        qe_gpio_set(gc, gpio, val);
+
+        return 0;
+}
+
+static int __init qe_add_gpiochips(void)
+{
+        struct device_node *np;
+
+        for_each_compatible_node(np, NULL, "fsl,mpc8323-qe-pario-bank") {
+                int ret;
+                struct qe_gpio_chip *qe_gc;
+                struct of_mm_gpio_chip *mm_gc;
+                struct of_gpio_chip *of_gc;
+                struct gpio_chip *gc;
+
+                qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL);
+                if (!qe_gc) {
+                        ret = -ENOMEM;
+                        goto err;
+                }
+
+                spin_lock_init(&qe_gc->lock);
+
+                mm_gc = &qe_gc->mm_gc;
+                of_gc = &mm_gc->of_gc;
+                gc = &of_gc->gc;
+
+                mm_gc->save_regs = qe_gpio_save_regs;
+                of_gc->gpio_cells = 2;
+                gc->ngpio = QE_PIO_PINS;
+                gc->direction_input = qe_gpio_dir_in;
+                gc->direction_output = qe_gpio_dir_out;
+                gc->get = qe_gpio_get;
+                gc->set = qe_gpio_set;
+
+                ret = of_mm_gpiochip_add(np, mm_gc);
+                if (ret)
+                        goto err;
+                continue;
+err:
+                pr_err("%s: registration failed with status %d\n",
+                       np->full_name, ret);
+                kfree(qe_gc);
+                /* try others anyway */
+        }
+        return 0;
+}
+arch_initcall(qe_add_gpiochips);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index cff550eec7e8..9e82d7e725a5 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -35,7 +35,6 @@
 #include <asm/rheap.h>
 
 static void qe_snums_init(void);
-static void qe_muram_init(void);
 static int qe_sdma_init(void);
 
 static DEFINE_SPINLOCK(qe_lock);
@@ -88,7 +87,7 @@ phys_addr_t get_qe_base(void)
 
 EXPORT_SYMBOL(get_qe_base);
 
-void qe_reset(void)
+void __init qe_reset(void)
 {
         if (qe_immr == NULL)
                 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);
@@ -325,97 +324,6 @@ static int qe_sdma_init(void)
         return 0;
 }
 
-/*
- * muram_alloc / muram_free bits.
- */
-static DEFINE_SPINLOCK(qe_muram_lock);
-
-/* 16 blocks should be enough to satisfy all requests
- * until the memory subsystem goes up... */
-static rh_block_t qe_boot_muram_rh_block[16];
-static rh_info_t qe_muram_info;
-
-static void qe_muram_init(void)
-{
-        struct device_node *np;
-        const u32 *address;
-        u64 size;
-        unsigned int flags;
-
-        /* initialize the info header */
-        rh_init(&qe_muram_info, 1,
-                sizeof(qe_boot_muram_rh_block) /
-                sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block);
-
-        /* Attach the usable muram area */
-        /* XXX: This is a subset of the available muram. It
-         * varies with the processor and the microcode patches activated.
-         */
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
-        if (!np) {
-                np = of_find_node_by_name(NULL, "data-only");
-                if (!np) {
-                        WARN_ON(1);
-                        return;
-                }
-        }
-
-        address = of_get_address(np, 0, &size, &flags);
-        WARN_ON(!address);
-
-        of_node_put(np);
-        if (address)
-                rh_attach_region(&qe_muram_info, *address, (int)size);
-}
-
-/* This function returns an index into the MURAM area.
- */
-unsigned long qe_muram_alloc(int size, int align)
-{
-        unsigned long start;
-        unsigned long flags;
-
-        spin_lock_irqsave(&qe_muram_lock, flags);
-        start = rh_alloc_align(&qe_muram_info, size, align, "QE");
-        spin_unlock_irqrestore(&qe_muram_lock, flags);
-
-        return start;
-}
-EXPORT_SYMBOL(qe_muram_alloc);
-
-int qe_muram_free(unsigned long offset)
-{
-        int ret;
-        unsigned long flags;
-
-        spin_lock_irqsave(&qe_muram_lock, flags);
-        ret = rh_free(&qe_muram_info, offset);
-        spin_unlock_irqrestore(&qe_muram_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(qe_muram_free);
-
-/* not sure if this is ever needed */
-unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
-{
-        unsigned long start;
-        unsigned long flags;
-
-        spin_lock_irqsave(&qe_muram_lock, flags);
-        start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
-        spin_unlock_irqrestore(&qe_muram_lock, flags);
-
-        return start;
-}
-EXPORT_SYMBOL(qe_muram_alloc_fixed);
-
-void qe_muram_dump(void)
-{
-        rh_dump(&qe_muram_info);
-}
-EXPORT_SYMBOL(qe_muram_dump);
-
 /* The maximum number of RISCs we support */
 #define MAX_QE_RISC     2
 
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c
index 93916a48afec..7c87460179ef 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
@@ -28,21 +28,7 @@
 
 #undef DEBUG
 
-#define NUM_OF_PINS     32
-
-struct port_regs {
-        __be32  cpodr;          /* Open drain register */
-        __be32  cpdata;         /* Data register */
-        __be32  cpdir1;         /* Direction register */
-        __be32  cpdir2;         /* Direction register */
-        __be32  cppar1;         /* Pin assignment register */
-        __be32  cppar2;         /* Pin assignment register */
-#ifdef CONFIG_PPC_85xx
-        u8      pad[8];
-#endif
-};
-
-static struct port_regs __iomem *par_io;
+static struct qe_pio_regs __iomem *par_io;
 static int num_par_io_ports = 0;
 
 int par_io_init(struct device_node *np)
@@ -64,69 +50,79 @@ int par_io_init(struct device_node *np)
         return 0;
 }
 
-int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
-                      int assignment, int has_irq)
+void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir,
+                         int open_drain, int assignment, int has_irq)
 {
-        u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val;
-
-        if (!par_io)
-                return -1;
+        u32 pin_mask1bit;
+        u32 pin_mask2bits;
+        u32 new_mask2bits;
+        u32 tmp_val;
 
         /* calculate pin location for single and 2 bits information */
-        pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1)));
+        pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));
 
         /* Set open drain, if required */
-        tmp_val = in_be32(&par_io[port].cpodr);
+        tmp_val = in_be32(&par_io->cpodr);
         if (open_drain)
-                out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val);
+                out_be32(&par_io->cpodr, pin_mask1bit | tmp_val);
         else
-                out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val);
+                out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val);
 
         /* define direction */
-        tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ?
-                in_be32(&par_io[port].cpdir2) :
-                in_be32(&par_io[port].cpdir1);
+        tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
+                in_be32(&par_io->cpdir2) :
+                in_be32(&par_io->cpdir1);
 
         /* get all bits mask for 2 bit per port */
-        pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS -
-                                (pin % (NUM_OF_PINS / 2) + 1) * 2));
+        pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS -
+                                (pin % (QE_PIO_PINS / 2) + 1) * 2));
 
         /* Get the final mask we need for the right definition */
-        new_mask2bits = (u32) (dir << (NUM_OF_PINS -
-                                (pin % (NUM_OF_PINS / 2) + 1) * 2));
+        new_mask2bits = (u32) (dir << (QE_PIO_PINS -
+                                (pin % (QE_PIO_PINS / 2) + 1) * 2));
 
         /* clear and set 2 bits mask */
-        if (pin > (NUM_OF_PINS / 2) - 1) {
-                out_be32(&par_io[port].cpdir2,
+        if (pin > (QE_PIO_PINS / 2) - 1) {
+                out_be32(&par_io->cpdir2,
                          ~pin_mask2bits & tmp_val);
                 tmp_val &= ~pin_mask2bits;
-                out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val);
+                out_be32(&par_io->cpdir2, new_mask2bits | tmp_val);
         } else {
-                out_be32(&par_io[port].cpdir1,
+                out_be32(&par_io->cpdir1,
                          ~pin_mask2bits & tmp_val);
                 tmp_val &= ~pin_mask2bits;
-                out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val);
+                out_be32(&par_io->cpdir1, new_mask2bits | tmp_val);
         }
         /* define pin assignment */
-        tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ?
-                in_be32(&par_io[port].cppar2) :
-                in_be32(&par_io[port].cppar1);
+        tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
+                in_be32(&par_io->cppar2) :
+                in_be32(&par_io->cppar1);
 
-        new_mask2bits = (u32) (assignment << (NUM_OF_PINS -
-                        (pin % (NUM_OF_PINS / 2) + 1) * 2));
+        new_mask2bits = (u32) (assignment << (QE_PIO_PINS -
+                        (pin % (QE_PIO_PINS / 2) + 1) * 2));
         /* clear and set 2 bits mask */
-        if (pin > (NUM_OF_PINS / 2) - 1) {
-                out_be32(&par_io[port].cppar2,
+        if (pin > (QE_PIO_PINS / 2) - 1) {
+                out_be32(&par_io->cppar2,
                          ~pin_mask2bits & tmp_val);
                 tmp_val &= ~pin_mask2bits;
-                out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val);
+                out_be32(&par_io->cppar2, new_mask2bits | tmp_val);
         } else {
-                out_be32(&par_io[port].cppar1,
+                out_be32(&par_io->cppar1,
                          ~pin_mask2bits & tmp_val);
                 tmp_val &= ~pin_mask2bits;
-                out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val);
+                out_be32(&par_io->cppar1, new_mask2bits | tmp_val);
         }
+}
+EXPORT_SYMBOL(__par_io_config_pin);
+
+int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
+                      int assignment, int has_irq)
+{
+        if (!par_io || port >= num_par_io_ports)
+                return -EINVAL;
 
+        __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment,
+                            has_irq);
         return 0;
 }
 EXPORT_SYMBOL(par_io_config_pin);
@@ -137,10 +133,10 @@ int par_io_data_set(u8 port, u8 pin, u8 val)
 
         if (port >= num_par_io_ports)
                 return -EINVAL;
-        if (pin >= NUM_OF_PINS)
+        if (pin >= QE_PIO_PINS)
                 return -EINVAL;
         /* calculate pin location */
-        pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin));
+        pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin));
 
         tmp_val = in_be32(&par_io[port].cpdata);
 
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index 0e348d9af8a6..d3c7f5af9bc8 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -26,7 +26,8 @@
 #include <asm/qe.h>
 #include <asm/ucc.h>
 
-static DEFINE_SPINLOCK(ucc_lock);
+DEFINE_SPINLOCK(cmxgcr_lock);
+EXPORT_SYMBOL(cmxgcr_lock);
 
 int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
 {
@@ -35,10 +36,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
         if (ucc_num > UCC_MAX_NUM - 1)
                 return -EINVAL;
 
-        spin_lock_irqsave(&ucc_lock, flags);
+        spin_lock_irqsave(&cmxgcr_lock, flags);
         clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG,
                 ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT);
-        spin_unlock_irqrestore(&ucc_lock, flags);
+        spin_unlock_irqrestore(&cmxgcr_lock, flags);
 
         return 0;
 }
diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c
new file mode 100644
index 000000000000..8105462078eb
--- /dev/null
+++ b/arch/powerpc/sysdev/qe_lib/usb.c
@@ -0,0 +1,55 @@
+/*
+ * QE USB routines
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ *               Shlomi Gridish <gridish@freescale.com>
+ *               Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *               Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <asm/immap_qe.h>
+#include <asm/qe.h>
+
+int qe_usb_clock_set(enum qe_clock clk, int rate)
+{
+        struct qe_mux __iomem *mux = &qe_immr->qmx;
+        unsigned long flags;
+        u32 val;
+
+        switch (clk) {
+        case QE_CLK3:  val = QE_CMXGCR_USBCS_CLK3;  break;
+        case QE_CLK5:  val = QE_CMXGCR_USBCS_CLK5;  break;
+        case QE_CLK7:  val = QE_CMXGCR_USBCS_CLK7;  break;
+        case QE_CLK9:  val = QE_CMXGCR_USBCS_CLK9;  break;
+        case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
+        case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
+        case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
+        case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
+        case QE_BRG9:  val = QE_CMXGCR_USBCS_BRG9;  break;
+        case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
+        default:
+                pr_err("%s: requested unknown clock %d\n", __func__, clk);
+                return -EINVAL;
+        }
+
+        if (qe_clock_is_brg(clk))
+                qe_setbrg(clk, rate, 1);
+
+        spin_lock_irqsave(&cmxgcr_lock, flags);
+
+        clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
+
+        spin_unlock_irqrestore(&cmxgcr_lock, flags);
+
+        return 0;
+}
+EXPORT_SYMBOL(qe_usb_clock_set);
diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h
index 0cc39f82d7c5..5c76e0ae0582 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -6,7 +6,7 @@
  *  Copyright (C) 2004 Freescale Semiconductor, Inc.
  *
  *  2006 (c) MontaVista Software, Inc.
- *      Vitaly Bordug <vbordug@ru.mvista.com>
+ *      Vitaly Bordug <vbordug@ru.mvista.com>
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
@@ -28,7 +28,7 @@
 #define SERIAL_CPM_MAJOR        204
 #define SERIAL_CPM_MINOR        46
 
-#define IS_SMC(pinfo)           (pinfo->flags & FLAG_SMC)
+#define IS_SMC(pinfo)           (pinfo->flags & FLAG_SMC)
 #define IS_DISCARDING(pinfo)    (pinfo->flags & FLAG_DISCARDING)
 #define FLAG_DISCARDING 0x00000004      /* when set, don't discard */
 #define FLAG_SMC        0x00000002
@@ -70,7 +70,7 @@ struct uart_cpm_port {
         void                    (*set_lineif)(struct uart_cpm_port *);
         u8                      brg;
         uint                     dp_addr;
-        void                    *mem_addr;
+        void                    *mem_addr;
         dma_addr_t               dma_addr;
         u32                     mem_size;
         /* helpers */
@@ -79,14 +79,11 @@ struct uart_cpm_port {
         /* Keep track of 'odd' SMC2 wirings */
         int                     is_portb;
         /* wait on close if needed */
-        int                     wait_closing;
+        int                     wait_closing;
         /* value to combine with opcode to form cpm command */
         u32                     command;
 };
 
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-extern int cpm_uart_port_map[UART_NR];
-#endif
 extern int cpm_uart_nr;
 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
 
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index a19dc7ef8861..43f58dc69fc9 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -13,7 +13,7 @@
  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  *            (C) 2004 Intracom, S.A.
  *            (C) 2005-2006 MontaVista Software, Inc.
- *              Vitaly Bordug <vbordug@ru.mvista.com>
+ *              Vitaly Bordug <vbordug@ru.mvista.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -42,6 +42,7 @@
 #include <linux/bootmem.h>
 #include <linux/dma-mapping.h>
 #include <linux/fs_uart_pd.h>
+#include <linux/of_platform.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -49,10 +50,6 @@
 #include <asm/fs_pd.h>
 #include <asm/udbg.h>
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
-#include <linux/of_platform.h>
-#endif
-
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
 #endif
@@ -72,59 +69,6 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
 
 /**************************************************************/
 
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Track which ports are configured as uarts */
-int cpm_uart_port_map[UART_NR];
-/* How many ports did we config as uarts */
-int cpm_uart_nr;
-
-/* Place-holder for board-specific stuff */
-struct platform_device* __attribute__ ((weak)) __init
-early_uart_get_pdev(int index)
-{
-        return NULL;
-}
-
-
-static void cpm_uart_count(void)
-{
-        cpm_uart_nr = 0;
-#ifdef CONFIG_SERIAL_CPM_SMC1
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SMC2
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC1
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC2
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC3
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC4
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
-#endif
-}
-
-/* Get UART number by its id */
-static int cpm_uart_id2nr(int id)
-{
-        int i;
-        if (id < UART_NR) {
-                for (i=0; i<UART_NR; i++) {
-                        if (cpm_uart_port_map[i] == id)
-                                return i;
-                }
-        }
-
-        /* not found or invalid argument */
-        return -1;
-}
-#endif
-
 /*
  * Check, if transmit buffers are processed
 */
@@ -935,7 +879,6 @@ static struct uart_ops cpm_uart_pops = {
         .verify_port    = cpm_uart_verify_port,
 };
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 struct uart_cpm_port cpm_uart_ports[UART_NR];
 
 static int cpm_uart_init_port(struct device_node *np,
@@ -1012,153 +955,6 @@ out_mem:
         return ret;
 }
 
-#else
-
-struct uart_cpm_port cpm_uart_ports[UART_NR] = {
-        [UART_SMC1] = {
-                .port = {
-                        .irq            = SMC1_IRQ,
-                        .ops            = &cpm_uart_pops,
-                        .iotype         = UPIO_MEM,
-                        .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock),
-                },
-                .flags = FLAG_SMC,
-                .tx_nrfifos = TX_NUM_FIFO,
-                .tx_fifosize = TX_BUF_SIZE,
-                .rx_nrfifos = RX_NUM_FIFO,
-                .rx_fifosize = RX_BUF_SIZE,
-                .set_lineif = smc1_lineif,
-        },
-        [UART_SMC2] = {
-                .port = {
-                        .irq            = SMC2_IRQ,
-                        .ops            = &cpm_uart_pops,
-                        .iotype         = UPIO_MEM,
-                        .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock),
-                },
-                .flags = FLAG_SMC,
-                .tx_nrfifos = TX_NUM_FIFO,
-                .tx_fifosize = TX_BUF_SIZE,
-                .rx_nrfifos = RX_NUM_FIFO,
-                .rx_fifosize = RX_BUF_SIZE,
-                .set_lineif = smc2_lineif,
-#ifdef CONFIG_SERIAL_CPM_ALT_SMC2
-                .is_portb = 1,
-#endif
-        },
-        [UART_SCC1] = {
-                .port = {
-                        .irq            = SCC1_IRQ,
-                        .ops            = &cpm_uart_pops,
-                        .iotype         = UPIO_MEM,
-                        .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock),
-                },
-                .tx_nrfifos = TX_NUM_FIFO,
-                .tx_fifosize = TX_BUF_SIZE,
-                .rx_nrfifos = RX_NUM_FIFO,
-                .rx_fifosize = RX_BUF_SIZE,
-                .set_lineif = scc1_lineif,
-                .wait_closing = SCC_WAIT_CLOSING,
-        },
-        [UART_SCC2] = {
-                .port = {
-                        .irq            = SCC2_IRQ,
-                        .ops            = &cpm_uart_pops,
-                        .iotype         = UPIO_MEM,
-                        .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock),
-                },
-                .tx_nrfifos = TX_NUM_FIFO,
-                .tx_fifosize = TX_BUF_SIZE,
-                .rx_nrfifos = RX_NUM_FIFO,
-                .rx_fifosize = RX_BUF_SIZE,
-                .set_lineif = scc2_lineif,
-                .wait_closing = SCC_WAIT_CLOSING,
-        },
-        [UART_SCC3] = {
-                .port = {
-                        .irq            = SCC3_IRQ,
-                        .ops            = &cpm_uart_pops,
-                        .iotype         = UPIO_MEM,
-                        .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock),
-                },
-                .tx_nrfifos = TX_NUM_FIFO,
-                .tx_fifosize = TX_BUF_SIZE,
-                .rx_nrfifos = RX_NUM_FIFO,
-                .rx_fifosize = RX_BUF_SIZE,
-                .set_lineif = scc3_lineif,
-                .wait_closing = SCC_WAIT_CLOSING,
-        },
-        [UART_SCC4] = {
-                .port = {
-                        .irq            = SCC4_IRQ,
-                        .ops            = &cpm_uart_pops,
-                        .iotype         = UPIO_MEM,
-                        .lock           = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock),
-                },
-                .tx_nrfifos = TX_NUM_FIFO,
-                .tx_fifosize = TX_BUF_SIZE,
-                .rx_nrfifos = RX_NUM_FIFO,
-                .rx_fifosize = RX_BUF_SIZE,
-                .set_lineif = scc4_lineif,
-                .wait_closing = SCC_WAIT_CLOSING,
-        },
-};
-
-int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
-{
-        struct resource *r;
-        struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
-        int idx;        /* It is UART_SMCx or UART_SCCx index */
-        struct uart_cpm_port *pinfo;
-        int line;
-        u32 mem, pram;
-
-        idx = pdata->fs_no = fs_uart_get_id(pdata);
-
-        line = cpm_uart_id2nr(idx);
-        if(line < 0) {
-                printk(KERN_ERR"%s(): port %d is not registered", __func__, idx);
-                return -EINVAL;
-        }
-
-        pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
-
-        pinfo->brg = pdata->brg;
-
-        if (!is_con) {
-                pinfo->port.line = line;
-                pinfo->port.flags = UPF_BOOT_AUTOCONF;
-        }
-
-        if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
-                return -EINVAL;
-        mem = (u32)ioremap(r->start, r->end - r->start + 1);
-
-        if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
-                return -EINVAL;
-        pram = (u32)ioremap(r->start, r->end - r->start + 1);
-
-        if(idx > fsid_smc2_uart) {
-                pinfo->sccp = (scc_t *)mem;
-                pinfo->sccup = (scc_uart_t *)pram;
-        } else {
-                pinfo->smcp = (smc_t *)mem;
-                pinfo->smcup = (smc_uart_t *)pram;
-        }
-        pinfo->tx_nrfifos = pdata->tx_num_fifo;
-        pinfo->tx_fifosize = pdata->tx_buf_size;
-
-        pinfo->rx_nrfifos = pdata->rx_num_fifo;
-        pinfo->rx_fifosize = pdata->rx_buf_size;
-
-        pinfo->port.uartclk = pdata->uart_clk;
-        pinfo->port.mapbase = (unsigned long)mem;
-        pinfo->port.irq = platform_get_irq(pdev, 0);
-
-        return 0;
-}
-#endif
-
 #ifdef CONFIG_SERIAL_CPM_CONSOLE
 /*
  *      Print a string to the serial port trying not to disturb
@@ -1169,12 +965,7 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
 static void cpm_uart_console_write(struct console *co, const char *s,
                                    u_int count)
 {
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
-#else
-        struct uart_cpm_port *pinfo =
-            &cpm_uart_ports[cpm_uart_port_map[co->index]];
-#endif
         unsigned int i;
         cbd_t __iomem *bdp, *bdbase;
         unsigned char *cp;
@@ -1252,7 +1043,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
         struct uart_cpm_port *pinfo;
         struct uart_port *port;
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
         struct device_node *np = NULL;
         int i = 0;
 
@@ -1284,35 +1074,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
         if (ret)
                 return ret;
 
-#else
-
-        struct fs_uart_platform_info *pdata;
-        struct platform_device* pdev = early_uart_get_pdev(co->index);
-
-        if (!pdev) {
-                pr_info("cpm_uart: console: compat mode\n");
-                /* compatibility - will be cleaned up */
-                cpm_uart_init_portdesc();
-        }
-
-        port =
-            (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
-        pinfo = (struct uart_cpm_port *)port;
-        if (!pdev) {
-                if (pinfo->set_lineif)
-                        pinfo->set_lineif(pinfo);
-        } else {
-                pdata = pdev->dev.platform_data;
-                if (pdata)
-                        if (pdata->init_ioports)
-                                pdata->init_ioports(pdata);
-
-                cpm_uart_drv_get_platform_data(pdev, 1);
-        }
-
-        pinfo->flags |= FLAG_CONSOLE;
-#endif
-
         if (options) {
                 uart_parse_options(options, &baud, &parity, &bits, &flow);
         } else {
@@ -1386,7 +1147,6 @@ static struct uart_driver cpm_reg = {
         .nr             = UART_NR,
 };
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 static int probe_index;
 
 static int __devinit cpm_uart_probe(struct of_device *ofdev,
@@ -1457,135 +1217,6 @@ static void __exit cpm_uart_exit(void)
         of_unregister_platform_driver(&cpm_uart_driver);
         uart_unregister_driver(&cpm_reg);
 }
-#else
-static int cpm_uart_drv_probe(struct device *dev)
-{
-        struct platform_device  *pdev = to_platform_device(dev);
-        struct fs_uart_platform_info *pdata;
-        int ret = -ENODEV;
-
-        if(!pdev) {
-                printk(KERN_ERR"CPM UART: platform data missing!\n");
-                return ret;
-        }
-
-        pdata = pdev->dev.platform_data;
-
-        if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
-                return ret;
-
-        pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no));
-
-        if (pdata->init_ioports)
-                pdata->init_ioports(pdata);
-
-        ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
-
-        return ret;
-}
-
-static int cpm_uart_drv_remove(struct device *dev)
-{
-        struct platform_device  *pdev = to_platform_device(dev);
-        struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
-
-        pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
-                        cpm_uart_id2nr(pdata->fs_no));
-
-        uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
-        return 0;
-}
-
-static struct device_driver cpm_smc_uart_driver = {
-        .name   = "fsl-cpm-smc:uart",
-        .bus    = &platform_bus_type,
-        .probe  = cpm_uart_drv_probe,
-        .remove = cpm_uart_drv_remove,
-};
-
-static struct device_driver cpm_scc_uart_driver = {
-        .name   = "fsl-cpm-scc:uart",
-        .bus    = &platform_bus_type,
-        .probe  = cpm_uart_drv_probe,
-        .remove = cpm_uart_drv_remove,
-};
-
-/*
-   This is supposed to match uart devices on platform bus,
-   */
-static int match_is_uart (struct device* dev, void* data)
-{
-        struct platform_device* pdev = container_of(dev, struct platform_device, dev);
-        int ret = 0;
-        /* this was setfunc as uart */
-        if(strstr(pdev->name,":uart")) {
-                ret = 1;
-        }
-        return ret;
-}
-
-
-static int cpm_uart_init(void) {
-
-        int ret;
-        int i;
-        struct device *dev;
-        printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
-
-        /* lookup the bus for uart devices */
-        dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
-
-        /* There are devices on the bus - all should be OK  */
-        if (dev) {
-                cpm_uart_count();
-                cpm_reg.nr = cpm_uart_nr;
-
-                if (!(ret = uart_register_driver(&cpm_reg))) {
-                        if ((ret = driver_register(&cpm_smc_uart_driver))) {
-                                uart_unregister_driver(&cpm_reg);
-                                return ret;
-                        }
-                        if ((ret = driver_register(&cpm_scc_uart_driver))) {
-                                driver_unregister(&cpm_scc_uart_driver);
-                                uart_unregister_driver(&cpm_reg);
-                        }
-                }
-        } else {
-        /* No capable platform devices found - falling back to legacy mode */
-                pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
-                pr_info(
-                "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
-
-                /* Don't run this again, if the console driver did it already */
-                if (cpm_uart_nr == 0)
-                        cpm_uart_init_portdesc();
-
-                cpm_reg.nr = cpm_uart_nr;
-                ret = uart_register_driver(&cpm_reg);
-
-                if (ret)
-                        return ret;
-
-                for (i = 0; i < cpm_uart_nr; i++) {
-                        int con = cpm_uart_port_map[i];
-                        cpm_uart_ports[con].port.line = i;
-                        cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
-                        if (cpm_uart_ports[con].set_lineif)
-                                cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]);
-                        uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
-                }
-
-        }
-        return ret;
-}
-
-static void __exit cpm_uart_exit(void)
-{
-        driver_unregister(&cpm_scc_uart_driver);
-        driver_unregister(&cpm_smc_uart_driver);
-        uart_unregister_driver(&cpm_reg);
-}
-#endif
 
 module_init(cpm_uart_init);
 module_exit(cpm_uart_exit);
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
index 74f1432bb248..0f0aff06c596 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
@@ -9,7 +9,7 @@
  *  Copyright (C) 2004 Freescale Semiconductor, Inc.
  *            (C) 2004 Intracom, S.A.
  *            (C) 2006 MontaVista Software, Inc.
- *              Vitaly Bordug <vbordug@ru.mvista.com>
+ *              Vitaly Bordug <vbordug@ru.mvista.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -51,7 +51,6 @@
 
 /**************************************************************/
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
 {
         cpm_command(port->command, cmd);
@@ -68,75 +67,6 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram)
         iounmap(pram);
 }
 
-#else
-void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
-{
-        ushort val;
-        int line = port - cpm_uart_ports;
-        volatile cpm8xx_t *cp = cpmp;
-
-        switch (line) {
-        case UART_SMC1:
-                val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG;
-                break;
-        case UART_SMC2:
-                val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC1:
-                val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC2:
-                val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC3:
-                val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC4:
-                val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG;
-                break;
-        default:
-                return;
-
-        }
-        cp->cp_cpcr = val;
-        while (cp->cp_cpcr & CPM_CR_FLG) ;
-}
-
-void smc1_lineif(struct uart_cpm_port *pinfo)
-{
-        pinfo->brg = 1;
-}
-
-void smc2_lineif(struct uart_cpm_port *pinfo)
-{
-        pinfo->brg = 2;
-}
-
-void scc1_lineif(struct uart_cpm_port *pinfo)
-{
-        /* XXX SCC1: insert port configuration here */
-        pinfo->brg = 1;
-}
-
-void scc2_lineif(struct uart_cpm_port *pinfo)
-{
-        /* XXX SCC2: insert port configuration here */
-        pinfo->brg = 2;
-}
-
-void scc3_lineif(struct uart_cpm_port *pinfo)
-{
-        /* XXX SCC3: insert port configuration here */
-        pinfo->brg = 3;
-}
-
-void scc4_lineif(struct uart_cpm_port *pinfo)
-{
-        /* XXX SCC4: insert port configuration here */
-        pinfo->brg = 4;
-}
-#endif
-
 /*
  * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
  * receive buffer descriptors from dual port ram, and a character
@@ -205,101 +135,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
 
         cpm_dpfree(pinfo->dp_addr);
 }
-
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Setup any dynamic params in the uart desc */
-int cpm_uart_init_portdesc(void)
-{
-        pr_debug("CPM uart[-]:init portdesc\n");
-
-        cpm_uart_nr = 0;
-#ifdef CONFIG_SERIAL_CPM_SMC1
-        cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0];
-/*
- *  Is SMC1 being relocated?
- */
-# ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
-        cpm_uart_ports[UART_SMC1].smcup =
-            (smc_uart_t *) & cpmp->cp_dparam[0x3C0];
-# else
-        cpm_uart_ports[UART_SMC1].smcup =
-            (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1];
-# endif
-        cpm_uart_ports[UART_SMC1].port.mapbase =
-            (unsigned long)&cpmp->cp_smc[0];
-        cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
-        cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-        cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
-        cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1];
-        cpm_uart_ports[UART_SMC2].smcup =
-            (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2];
-        cpm_uart_ports[UART_SMC2].port.mapbase =
-            (unsigned long)&cpmp->cp_smc[1];
-        cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
-        cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-        cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
-        cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0];
-        cpm_uart_ports[UART_SCC1].sccup =
-            (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1];
-        cpm_uart_ports[UART_SCC1].port.mapbase =
-            (unsigned long)&cpmp->cp_scc[0];
-        cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
-        cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1];
-        cpm_uart_ports[UART_SCC2].sccup =
-            (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2];
-        cpm_uart_ports[UART_SCC2].port.mapbase =
-            (unsigned long)&cpmp->cp_scc[1];
-        cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
-        cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2];
-        cpm_uart_ports[UART_SCC3].sccup =
-            (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3];
-        cpm_uart_ports[UART_SCC3].port.mapbase =
-            (unsigned long)&cpmp->cp_scc[2];
-        cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
-        cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3];
-        cpm_uart_ports[UART_SCC4].sccup =
-            (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4];
-        cpm_uart_ports[UART_SCC4].port.mapbase =
-            (unsigned long)&cpmp->cp_scc[3];
-        cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
-#endif
-        return 0;
-}
-#endif
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/serial/cpm_uart/cpm_uart_cpm1.h
index ddf46d3c964b..10eecd6af6d4 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.h
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.h
@@ -2,7 +2,7 @@
  * linux/drivers/serial/cpm_uart/cpm_uart_cpm1.h
  *
  * Driver for CPM (SCC/SMC) serial ports
- * 
+ *
  * definitions for cpm1
  *
  */
@@ -12,16 +12,6 @@
 
 #include <asm/cpm1.h>
 
-/* defines for IRQs */
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-#define SMC1_IRQ        (CPM_IRQ_OFFSET + CPMVEC_SMC1)
-#define SMC2_IRQ        (CPM_IRQ_OFFSET + CPMVEC_SMC2)
-#define SCC1_IRQ        (CPM_IRQ_OFFSET + CPMVEC_SCC1)
-#define SCC2_IRQ        (CPM_IRQ_OFFSET + CPMVEC_SCC2)
-#define SCC3_IRQ        (CPM_IRQ_OFFSET + CPMVEC_SCC3)
-#define SCC4_IRQ        (CPM_IRQ_OFFSET + CPMVEC_SCC4)
-#endif
-
 static inline void cpm_set_brg(int brg, int baud)
 {
         cpm_setbrg(brg, baud);
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index bb862e2f54cf..b8db4d3eed36 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -5,11 +5,11 @@
  *
  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
- * 
+ *
  *  Copyright (C) 2004 Freescale Semiconductor, Inc.
  *            (C) 2004 Intracom, S.A.
  *            (C) 2006 MontaVista Software, Inc.
- *              Vitaly Bordug <vbordug@ru.mvista.com>
+ *              Vitaly Bordug <vbordug@ru.mvista.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -41,9 +41,7 @@
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/fs_pd.h>
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 #include <asm/prom.h>
-#endif
 
 #include <linux/serial_core.h>
 #include <linux/kernel.h>
@@ -52,7 +50,6 @@
 
 /**************************************************************/
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
 {
         cpm_command(port->command, cmd);
@@ -106,174 +103,8 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram)
                 iounmap(pram);
 }
 
-#else
-void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
-{
-        ulong val;
-        int line = port - cpm_uart_ports;
-        volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
-
-
-        switch (line) {
-        case UART_SMC1:
-                val = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0,
-                                cmd) | CPM_CR_FLG;
-                break;
-        case UART_SMC2:
-                val = mk_cr_cmd(CPM_CR_SMC2_PAGE, CPM_CR_SMC2_SBLOCK, 0,
-                                cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC1:
-                val = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0,
-                                cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC2:
-                val = mk_cr_cmd(CPM_CR_SCC2_PAGE, CPM_CR_SCC2_SBLOCK, 0,
-                                cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC3:
-                val = mk_cr_cmd(CPM_CR_SCC3_PAGE, CPM_CR_SCC3_SBLOCK, 0,
-                                cmd) | CPM_CR_FLG;
-                break;
-        case UART_SCC4:
-                val = mk_cr_cmd(CPM_CR_SCC4_PAGE, CPM_CR_SCC4_SBLOCK, 0,
-                                cmd) | CPM_CR_FLG;
-                break;
-        default:
-                return;
-
-        }
-        cp->cp_cpcr = val;
-        while (cp->cp_cpcr & CPM_CR_FLG) ;
-
-        cpm2_unmap(cp);
-}
-
-void smc1_lineif(struct uart_cpm_port *pinfo)
-{
-        volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
-        /* SMC1 is only on port D */
-        io->iop_ppard |= 0x00c00000;
-        io->iop_pdird |= 0x00400000;
-        io->iop_pdird &= ~0x00800000;
-        io->iop_psord &= ~0x00c00000;
-
-        /* Wire BRG1 to SMC1 */
-        cpmux->cmx_smr &= 0x0f;
-        pinfo->brg = 1;
-
-        cpm2_unmap(cpmux);
-        cpm2_unmap(io);
-}
-
-void smc2_lineif(struct uart_cpm_port *pinfo)
-{
-        volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
-        /* SMC2 is only on port A */
-        io->iop_ppara |= 0x00c00000;
-        io->iop_pdira |= 0x00400000;
-        io->iop_pdira &= ~0x00800000;
-        io->iop_psora &= ~0x00c00000;
-
-        /* Wire BRG2 to SMC2 */
-        cpmux->cmx_smr &= 0xf0;
-        pinfo->brg = 2;
-
-        cpm2_unmap(cpmux);
-        cpm2_unmap(io);
-}
-
-void scc1_lineif(struct uart_cpm_port *pinfo)
-{
-        volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
-        /* Use Port D for SCC1 instead of other functions.  */
-        io->iop_ppard |= 0x00000003;
-        io->iop_psord &= ~0x00000001;   /* Rx */
-        io->iop_psord |= 0x00000002;    /* Tx */
-        io->iop_pdird &= ~0x00000001;   /* Rx */
-        io->iop_pdird |= 0x00000002;    /* Tx */
-
-        /* Wire BRG1 to SCC1 */
-        cpmux->cmx_scr &= 0x00ffffff;
-        cpmux->cmx_scr |= 0x00000000;
-        pinfo->brg = 1;
-
-        cpm2_unmap(cpmux);
-        cpm2_unmap(io);
-}
-
-void scc2_lineif(struct uart_cpm_port *pinfo)
-{
-        /*
-         * STx GP3 uses the SCC2 secondary option pin assignment
-         * which this driver doesn't account for in the static
-         * pin assignments. This kind of board specific info
-         * really has to get out of the driver so boards can
-         * be supported in a sane fashion.
-         */
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-#ifndef CONFIG_STX_GP3
-        volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-
-        io->iop_pparb |= 0x008b0000;
-        io->iop_pdirb |= 0x00880000;
-        io->iop_psorb |= 0x00880000;
-        io->iop_pdirb &= ~0x00030000;
-        io->iop_psorb &= ~0x00030000;
-#endif
-        cpmux->cmx_scr &= 0xff00ffff;
-        cpmux->cmx_scr |= 0x00090000;
-        pinfo->brg = 2;
-
-        cpm2_unmap(cpmux);
-        cpm2_unmap(io);
-}
-
-void scc3_lineif(struct uart_cpm_port *pinfo)
-{
-        volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
-        io->iop_pparb |= 0x008b0000;
-        io->iop_pdirb |= 0x00880000;
-        io->iop_psorb |= 0x00880000;
-        io->iop_pdirb &= ~0x00030000;
-        io->iop_psorb &= ~0x00030000;
-        cpmux->cmx_scr &= 0xffff00ff;
-        cpmux->cmx_scr |= 0x00001200;
-        pinfo->brg = 3;
-
-        cpm2_unmap(cpmux);
-        cpm2_unmap(io);
-}
-
-void scc4_lineif(struct uart_cpm_port *pinfo)
-{
-        volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-        volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
-        io->iop_ppard |= 0x00000600;
-        io->iop_psord &= ~0x00000600;   /* Tx/Rx */
-        io->iop_pdird &= ~0x00000200;   /* Rx */
-        io->iop_pdird |= 0x00000400;    /* Tx */
-
-        cpmux->cmx_scr &= 0xffffff00;
-        cpmux->cmx_scr |= 0x0000001b;
-        pinfo->brg = 4;
-
-        cpm2_unmap(cpmux);
-        cpm2_unmap(io);
-}
-#endif
-
 /*
- * Allocate DP-Ram and memory buffers. We need to allocate a transmit and 
+ * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
  * receive buffer descriptors from dual port ram, and a character
  * buffer area from host mem. If we are allocating for the console we need
  * to do it from bootmem
@@ -340,111 +171,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
 
         cpm_dpfree(pinfo->dp_addr);
 }
-
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Setup any dynamic params in the uart desc */
-int cpm_uart_init_portdesc(void)
-{
-#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
-        u16 *addr;
-#endif
-        pr_debug("CPM uart[-]:init portdesc\n");
-
-        cpm_uart_nr = 0;
-#ifdef CONFIG_SERIAL_CPM_SMC1
-        cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]);
-        cpm_uart_ports[UART_SMC1].port.mapbase =
-            (unsigned long)cpm_uart_ports[UART_SMC1].smcp;
-
-        cpm_uart_ports[UART_SMC1].smcup =
-            (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE);
-        addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2);
-        *addr = PROFF_SMC1;
-        cpm2_unmap(addr);
-
-        cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
-        cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-        cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
-        cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]);
-        cpm_uart_ports[UART_SMC2].port.mapbase =
-            (unsigned long)cpm_uart_ports[UART_SMC2].smcp;
-
-        cpm_uart_ports[UART_SMC2].smcup =
-            (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE);
-        addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2);
-        *addr = PROFF_SMC2;
-        cpm2_unmap(addr);
-
-        cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
-        cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-        cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
-        cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]);
-        cpm_uart_ports[UART_SCC1].port.mapbase =
-            (unsigned long)cpm_uart_ports[UART_SCC1].sccp;
-        cpm_uart_ports[UART_SCC1].sccup =
-            (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE);
-
-        cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
-        cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]);
-        cpm_uart_ports[UART_SCC2].port.mapbase =
-            (unsigned long)cpm_uart_ports[UART_SCC2].sccp;
-        cpm_uart_ports[UART_SCC2].sccup =
-            (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE);
-
-        cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
-        cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]);
-        cpm_uart_ports[UART_SCC3].port.mapbase =
-            (unsigned long)cpm_uart_ports[UART_SCC3].sccp;
-        cpm_uart_ports[UART_SCC3].sccup =
-            (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE);
-
-        cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
-        cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]);
-        cpm_uart_ports[UART_SCC4].port.mapbase =
-            (unsigned long)cpm_uart_ports[UART_SCC4].sccp;
-        cpm_uart_ports[UART_SCC4].sccup =
-            (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE);
-
-        cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
-            ~(UART_SCCM_TX | UART_SCCM_RX);
-        cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
-            ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-        cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock();
-        cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
-#endif
-
-        return 0;
-}
-#endif
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
index 40006a7dce46..7194c63dcf5f 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
@@ -2,7 +2,7 @@
  * linux/drivers/serial/cpm_uart/cpm_uart_cpm2.h
  *
  * Driver for CPM (SCC/SMC) serial ports
- * 
+ *
  * definitions for cpm2
  *
  */
@@ -12,16 +12,6 @@
 
 #include <asm/cpm2.h>
 
-/* defines for IRQs */
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-#define SMC1_IRQ        SIU_INT_SMC1
-#define SMC2_IRQ        SIU_INT_SMC2
-#define SCC1_IRQ        SIU_INT_SCC1
-#define SCC2_IRQ        SIU_INT_SCC2
-#define SCC3_IRQ        SIU_INT_SCC3
-#define SCC4_IRQ        SIU_INT_SCC4
-#endif
-
 static inline void cpm_set_brg(int brg, int baud)
 {
         cpm_setbrg(brg, baud);
diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h
index 53507046a1b1..81de6eb3455d 100644
--- a/include/asm-powerpc/cache.h
+++ b/include/asm-powerpc/cache.h
@@ -8,6 +8,9 @@
 #if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
 #define L1_CACHE_SHIFT          4
 #define MAX_COPY_PREFETCH       1
+#elif defined(CONFIG_PPC_E500MC)
+#define L1_CACHE_SHIFT          6
+#define MAX_COPY_PREFETCH       4
 #elif defined(CONFIG_PPC32)
 #define L1_CACHE_SHIFT          5
 #define MAX_COPY_PREFETCH       4
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ffe466a..63a55337c2de 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -96,6 +96,7 @@ unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
 int cpm_muram_free(unsigned long offset);
 unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
 void __iomem *cpm_muram_addr(unsigned long offset);
+unsigned long cpm_muram_offset(void __iomem *addr);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
diff --git a/include/asm-powerpc/cpm1.h b/include/asm-powerpc/cpm1.h
index 3df439678006..2ff798744c1d 100644
--- a/include/asm-powerpc/cpm1.h
+++ b/include/asm-powerpc/cpm1.h
@@ -42,35 +42,15 @@
 
 #define mk_cr_cmd(CH, CMD)      ((CMD << 8) | (CH << 4))
 
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* The dual ported RAM is multi-functional.  Some areas can be (and are
- * being) used for microcode.  There is an area that can only be used
- * as data ram for buffer descriptors, which is all we use right now.
- * Currently the first 512 and last 256 bytes are used for microcode.
- */
-#define CPM_DATAONLY_BASE       ((uint)0x0800)
-#define CPM_DATAONLY_SIZE       ((uint)0x0700)
-#define CPM_DP_NOSPACE          ((uint)0x7fffffff)
-#endif
-
 /* Export the base address of the communication processor registers
  * and dual port ram.
  */
 extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 #define cpm_dpalloc cpm_muram_alloc
 #define cpm_dpfree cpm_muram_free
 #define cpm_dpram_addr cpm_muram_addr
 #define cpm_dpram_phys cpm_muram_dma
-#else
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-extern uint cpm_dpram_phys(u8 *addr);
-#endif
 
 extern void cpm_setbrg(uint brg, uint rate);
 
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index 4c85ed9cd43f..2c7fd9cee291 100644
--- a/include/asm-powerpc/cpm2.h
+++ b/include/asm-powerpc/cpm2.h
@@ -78,24 +78,6 @@
 #define mk_cr_cmd(PG, SBC, MCN, OP) \
         ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
 
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Dual Port RAM addresses.  The first 16K is available for almost
- * any CPM use, so we put the BDs there.  The first 128 bytes are
- * used for SMC1 and SMC2 parameter RAM, so we start allocating
- * BDs above that.  All of this must change when we start
- * downloading RAM microcode.
- */
-#define CPM_DATAONLY_BASE       ((uint)128)
-#define CPM_DP_NOSPACE          ((uint)0x7fffffff)
-#if defined(CONFIG_8272) || defined(CONFIG_MPC8555)
-#define CPM_DATAONLY_SIZE       ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE    ((uint)0x00009000)
-#else
-#define CPM_DATAONLY_SIZE       ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE    ((uint)0x0000b000)
-#endif
-#endif
-
 /* The number of pages of host memory we allocate for CPM.  This is
  * done early in kernel initialization to get physically contiguous
  * pages.
@@ -107,17 +89,9 @@
  */
 extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 #define cpm_dpalloc cpm_muram_alloc
 #define cpm_dpfree cpm_muram_free
 #define cpm_dpram_addr cpm_muram_addr
-#else
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-#endif
 
 extern void cpm_setbrg(uint brg, uint rate);
 extern void cpm2_fastbrg(uint brg, uint rate, int div16);
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 1e79673b7316..9106113ae0b5 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -132,7 +132,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
 #define CPU_FTR_TAU                     ASM_CONST(0x0000000000000010)
 #define CPU_FTR_CAN_DOZE                ASM_CONST(0x0000000000000020)
 #define CPU_FTR_USE_TB                  ASM_CONST(0x0000000000000040)
-#define CPU_FTR_604_PERF_MON            ASM_CONST(0x0000000000000080)
+#define CPU_FTR_L2CSR                   ASM_CONST(0x0000000000000080)
 #define CPU_FTR_601                     ASM_CONST(0x0000000000000100)
 #define CPU_FTR_HPTE_TABLE              ASM_CONST(0x0000000000000200)
 #define CPU_FTR_CAN_NAP                 ASM_CONST(0x0000000000000400)
@@ -245,8 +245,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
 #define CPU_FTRS_604    (CPU_FTR_COMMON | \
-            CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE | \
-            CPU_FTR_PPC_LE)
+            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_PPC_LE)
 #define CPU_FTRS_740_NOTAU      (CPU_FTR_COMMON | \
             CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
             CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
@@ -347,10 +346,14 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
 #define CPU_FTRS_E200   (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
             CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
             CPU_FTR_UNIFIED_ID_CACHE)
-#define CPU_FTRS_E500   (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
+#define CPU_FTRS_E500   (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | \
             CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
-            CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN | \
+            CPU_FTR_L2CSR)
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 
 /* 64-bit CPUs */
@@ -421,7 +424,7 @@ enum {
             CPU_FTRS_E200 |
 #endif
 #ifdef CONFIG_E500
-            CPU_FTRS_E500 | CPU_FTRS_E500_2 |
+            CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
 #endif
             0,
 };
@@ -461,7 +464,7 @@ enum {
             CPU_FTRS_E200 &
 #endif
 #ifdef CONFIG_E500
-            CPU_FTRS_E500 & CPU_FTRS_E500_2 &
+            CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
 #endif
             CPU_FTRS_POSSIBLE,
 };
diff --git a/include/asm-powerpc/fsl_gtm.h b/include/asm-powerpc/fsl_gtm.h
new file mode 100644
index 000000000000..8e8c9b5032d3
--- /dev/null
+++ b/include/asm-powerpc/fsl_gtm.h
@@ -0,0 +1,47 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ *               Shlomi Gridish <gridish@freescale.com>
+ *               Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *               Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_FSL_GTM_H
+#define __ASM_FSL_GTM_H
+
+#include <linux/types.h>
+
+struct gtm;
+
+struct gtm_timer {
+        unsigned int irq;
+
+        struct gtm *gtm;
+        bool requested;
+        u8 __iomem *gtcfr;
+        __be16 __iomem *gtmdr;
+        __be16 __iomem *gtpsr;
+        __be16 __iomem *gtcnr;
+        __be16 __iomem *gtrfr;
+        __be16 __iomem *gtevr;
+};
+
+extern struct gtm_timer *gtm_get_timer16(void);
+extern struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
+                                                  unsigned int timer);
+extern void gtm_put_timer16(struct gtm_timer *tmr);
+extern int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec,
+                             bool reload);
+extern int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec,
+                                 bool reload);
+extern void gtm_stop_timer16(struct gtm_timer *tmr);
+extern void gtm_ack_timer16(struct gtm_timer *tmr, u16 events);
+
+#endif /* __ASM_FSL_GTM_H */
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 54ed64df95b8..989922621e35 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -262,6 +262,7 @@ struct machdep_calls {
 #endif
 };
 
+extern void e500_idle(void);
 extern void power4_idle(void);
 extern void power4_cpu_offline_powersave(void);
 extern void ppc6xx_idle(void);
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index c3be6e2e1490..edee15d269ea 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -16,6 +16,8 @@
 #define _ASM_POWERPC_QE_H
 #ifdef __KERNEL__
 
+#include <linux/spinlock.h>
+#include <asm/cpm.h>
 #include <asm/immap_qe.h>
 
 #define QE_NUM_OF_SNUM  28
@@ -74,10 +76,38 @@ enum qe_clock {
         QE_CLK_DUMMY
 };
 
+static inline bool qe_clock_is_brg(enum qe_clock clk)
+{
+        return clk >= QE_BRG1 && clk <= QE_BRG16;
+}
+
+extern spinlock_t cmxgcr_lock;
+
 /* Export QE common operations */
-extern void qe_reset(void);
+extern void __init qe_reset(void);
+
+/* QE PIO */
+#define QE_PIO_PINS 32
+
+struct qe_pio_regs {
+        __be32  cpodr;          /* Open drain register */
+        __be32  cpdata;         /* Data register */
+        __be32  cpdir1;         /* Direction register */
+        __be32  cpdir2;         /* Direction register */
+        __be32  cppar1;         /* Pin assignment register */
+        __be32  cppar2;         /* Pin assignment register */
+#ifdef CONFIG_PPC_85xx
+        u8      pad[8];
+#endif
+};
+
 extern int par_io_init(struct device_node *np);
 extern int par_io_of_config(struct device_node *np);
+#define QE_PIO_DIR_IN   2
+#define QE_PIO_DIR_OUT  1
+extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin,
+                                int dir, int open_drain, int assignment,
+                                int has_irq);
 extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
                              int assignment, int has_irq);
 extern int par_io_data_set(u8 port, u8 pin, u8 val);
@@ -89,20 +119,13 @@ unsigned int qe_get_brg_clk(void);
 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
 int qe_get_snum(void);
 void qe_put_snum(u8 snum);
-unsigned long qe_muram_alloc(int size, int align);
-int qe_muram_free(unsigned long offset);
-unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
-void qe_muram_dump(void);
-
-static inline void __iomem *qe_muram_addr(unsigned long offset)
-{
-        return (void __iomem *)&qe_immr->muram[offset];
-}
-
-static inline unsigned long qe_muram_offset(void __iomem *addr)
-{
-        return addr - (void __iomem *)qe_immr->muram;
-}
+/* we actually use cpm_muram implementation, define this for convenience */
+#define qe_muram_init cpm_muram_init
+#define qe_muram_alloc cpm_muram_alloc
+#define qe_muram_alloc_fixed cpm_muram_alloc_fixed
+#define qe_muram_free cpm_muram_free
+#define qe_muram_addr cpm_muram_addr
+#define qe_muram_offset cpm_muram_offset
 
 /* Structure that defines QE firmware binary files.
  *
@@ -156,6 +179,9 @@ int qe_upload_firmware(const struct qe_firmware *firmware);
 /* Obtain information on the uploaded firmware */
 struct qe_firmware_info *qe_get_firmware_info(void);
 
+/* QE USB */
+int qe_usb_clock_set(enum qe_clock clk, int rate);
+
 /* Buffer descriptors */
 struct qe_bd {
         __be16 status;
@@ -166,20 +192,6 @@ struct qe_bd {
 #define BD_STATUS_MASK  0xffff0000
 #define BD_LENGTH_MASK  0x0000ffff
 
-#define BD_SC_EMPTY     0x8000  /* Receive is empty */
-#define BD_SC_READY     0x8000  /* Transmit is ready */
-#define BD_SC_WRAP      0x2000  /* Last buffer descriptor */
-#define BD_SC_INTRPT    0x1000  /* Interrupt on change */
-#define BD_SC_LAST      0x0800  /* Last buffer in frame */
-#define BD_SC_CM        0x0200  /* Continous mode */
-#define BD_SC_ID        0x0100  /* Rec'd too many idles */
-#define BD_SC_P         0x0100  /* xmt preamble */
-#define BD_SC_BR        0x0020  /* Break received */
-#define BD_SC_FR        0x0010  /* Framing error */
-#define BD_SC_PR        0x0008  /* Parity error */
-#define BD_SC_OV        0x0002  /* Overrun */
-#define BD_SC_CD        0x0001  /* ?? */
-
 /* Alignment */
 #define QE_INTR_TABLE_ALIGN     16      /* ??? */
 #define QE_ALIGNMENT_OF_BD      8
@@ -254,6 +266,16 @@ enum comm_dir {
 #define QE_CMXGCR_MII_ENET_MNG          0x00007000
 #define QE_CMXGCR_MII_ENET_MNG_SHIFT    12
 #define QE_CMXGCR_USBCS                 0x0000000f
+#define QE_CMXGCR_USBCS_CLK3            0x1
+#define QE_CMXGCR_USBCS_CLK5            0x2
+#define QE_CMXGCR_USBCS_CLK7            0x3
+#define QE_CMXGCR_USBCS_CLK9            0x4
+#define QE_CMXGCR_USBCS_CLK13           0x5
+#define QE_CMXGCR_USBCS_CLK17           0x6
+#define QE_CMXGCR_USBCS_CLK19           0x7
+#define QE_CMXGCR_USBCS_CLK21           0x8
+#define QE_CMXGCR_USBCS_BRG9            0x9
+#define QE_CMXGCR_USBCS_BRG10           0xa
 
 /* QE CECR Commands.
 */
@@ -283,7 +305,7 @@ enum comm_dir {
 #define QE_HPAC_START_TX                0x0000060b
 #define QE_HPAC_START_RX                0x0000070b
 #define QE_USB_STOP_TX                  0x0000000a
-#define QE_USB_RESTART_TX               0x0000000b
+#define QE_USB_RESTART_TX               0x0000000c
 #define QE_QMC_STOP_TX                  0x0000000c
 #define QE_QMC_STOP_RX                  0x0000000d
 #define QE_SS7_SU_FIL_RESET             0x0000000e
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index edc0cfd7f6e2..079999b032af 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -240,7 +240,7 @@
 #define HID0_DAPUEN     (1<<8)          /* Debug APU enable */
 #define HID0_SGE        (1<<7)          /* Store Gathering Enable */
 #define HID0_SIED       (1<<7)          /* Serial Instr. Execution [Disable] */
-#define HID0_DFCA       (1<<6)          /* Data Cache Flush Assist */
+#define HID0_DCFA       (1<<6)          /* Data Cache Flush Assist */
 #define HID0_LRSTK      (1<<4)          /* Link register stack - 745x */
 #define HID0_BTIC       (1<<5)          /* Branch Target Instr Cache Enable */
 #define HID0_ABE        (1<<3)          /* Address Broadcast Enable */
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index cf54a3f31753..be980f4ee495 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -61,6 +61,8 @@
 #define SPRN_SPEFSCR    0x200   /* SPE & Embedded FP Status & Control */
 #define SPRN_BBEAR      0x201   /* Branch Buffer Entry Address Register */
 #define SPRN_BBTAR      0x202   /* Branch Buffer Target Address Register */
+#define SPRN_L1CFG0     0x203   /* L1 Cache Configure Register 0 */
+#define SPRN_L1CFG1     0x204   /* L1 Cache Configure Register 1 */
 #define SPRN_ATB        0x20E   /* Alternate Time Base */
 #define SPRN_ATBL       0x20E   /* Alternate Time Base Lower */
 #define SPRN_ATBU       0x20F   /* Alternate Time Base Upper */
@@ -78,6 +80,7 @@
 #define SPRN_DSRR1      0x23F   /* Debug Save and Restore Register 1 */
 #define SPRN_SPRG8      0x25C   /* Special Purpose Register General 8 */
 #define SPRN_SPRG9      0x25D   /* Special Purpose Register General 9 */
+#define SPRN_L1CSR2     0x25E   /* L1 Cache Control and Status Register 2 */
 #define SPRN_MAS0       0x270   /* MMU Assist Register 0 */
 #define SPRN_MAS1       0x271   /* MMU Assist Register 1 */
 #define SPRN_MAS2       0x272   /* MMU Assist Register 2 */
@@ -108,6 +111,8 @@
 #define SPRN_L1CSR1     0x3F3   /* L1 Cache Control and Status Register 1 */
 #define SPRN_PIT        0x3DB   /* Programmable Interval Timer */
 #define SPRN_BUCSR      0x3F5   /* Branch Unit Control and Status */
+#define SPRN_L2CSR0     0x3F9   /* L2 Data Cache Control and Status Register 0 */
+#define SPRN_L2CSR1     0x3FA   /* L2 Data Cache Control and Status Register 1 */
 #define SPRN_DCCR       0x3FA   /* Data Cache Cacheability Register */
 #define SPRN_ICCR       0x3FB   /* Instruction Cache Cacheability Register */
 #define SPRN_SVR        0x3FF   /* System Version Register */
@@ -210,6 +215,7 @@
 #ifdef CONFIG_BOOKE
 #define DBSR_IC         0x08000000      /* Instruction Completion */
 #define DBSR_BT         0x04000000      /* Branch Taken */
+#define DBSR_IRPT       0x02000000      /* Exception Debug Event */
 #define DBSR_TIE        0x01000000      /* Trap Instruction Event */
 #define DBSR_IAC1       0x00800000      /* Instr Address Compare 1 Event */
 #define DBSR_IAC2       0x00400000      /* Instr Address Compare 2 Event */
@@ -219,10 +225,14 @@
 #define DBSR_DAC1W      0x00040000      /* Data Addr Compare 1 Write Event */
 #define DBSR_DAC2R      0x00020000      /* Data Addr Compare 2 Read Event */
 #define DBSR_DAC2W      0x00010000      /* Data Addr Compare 2 Write Event */
+#define DBSR_RET        0x00008000      /* Return Debug Event */
+#define DBSR_CIRPT      0x00000040      /* Critical Interrupt Taken Event */
+#define DBSR_CRET       0x00000020      /* Critical Return Debug Event */
 #endif
 #ifdef CONFIG_40x
 #define DBSR_IC         0x80000000      /* Instruction Completion */
 #define DBSR_BT         0x40000000      /* Branch taken */
+#define DBSR_IRPT       0x20000000      /* Exception Debug Event */
 #define DBSR_TIE        0x10000000      /* Trap Instruction debug Event */
 #define DBSR_IAC1       0x04000000      /* Instruction Address Compare 1 Event */
 #define DBSR_IAC2       0x02000000      /* Instruction Address Compare 2 Event */
@@ -253,6 +263,7 @@
 #define ESR_BO          0x00020000      /* Byte Ordering */
 
 /* Bit definitions related to the DBCR0. */
+#if defined(CONFIG_40x)
 #define DBCR0_EDM       0x80000000      /* External Debug Mode */
 #define DBCR0_IDM       0x40000000      /* Internal Debug Mode */
 #define DBCR0_RST       0x30000000      /* all the bits in the RST field */
@@ -261,20 +272,69 @@
 #define DBCR0_RST_CORE  0x10000000      /* Core Reset */
 #define DBCR0_RST_NONE  0x00000000      /* No Reset */
 #define DBCR0_IC        0x08000000      /* Instruction Completion */
+#define DBCR0_ICMP      DBCR0_IC
 #define DBCR0_BT        0x04000000      /* Branch Taken */
+#define DBCR0_BRT       DBCR0_BT
 #define DBCR0_EDE       0x02000000      /* Exception Debug Event */
+#define DBCR0_IRPT      DBCR0_EDE
 #define DBCR0_TDE       0x01000000      /* TRAP Debug Event */
 #define DBCR0_IA1       0x00800000      /* Instr Addr compare 1 enable */
+#define DBCR0_IAC1      DBCR0_IA1
 #define DBCR0_IA2       0x00400000      /* Instr Addr compare 2 enable */
+#define DBCR0_IAC2      DBCR0_IA2
 #define DBCR0_IA12      0x00200000      /* Instr Addr 1-2 range enable */
 #define DBCR0_IA12X     0x00100000      /* Instr Addr 1-2 range eXclusive */
 #define DBCR0_IA3       0x00080000      /* Instr Addr compare 3 enable */
+#define DBCR0_IAC3      DBCR0_IA3
 #define DBCR0_IA4       0x00040000      /* Instr Addr compare 4 enable */
+#define DBCR0_IAC4      DBCR0_IA4
 #define DBCR0_IA34      0x00020000      /* Instr Addr 3-4 range Enable */
 #define DBCR0_IA34X     0x00010000      /* Instr Addr 3-4 range eXclusive */
 #define DBCR0_IA12T     0x00008000      /* Instr Addr 1-2 range Toggle */
 #define DBCR0_IA34T     0x00004000      /* Instr Addr 3-4 range Toggle */
 #define DBCR0_FT        0x00000001      /* Freeze Timers on debug event */
+#elif defined(CONFIG_BOOKE)
+#define DBCR0_EDM       0x80000000      /* External Debug Mode */
+#define DBCR0_IDM       0x40000000      /* Internal Debug Mode */
+#define DBCR0_RST       0x30000000      /* all the bits in the RST field */
+/* DBCR0_RST_* is 44x specific and not followed in fsl booke */
+#define DBCR0_RST_SYSTEM 0x30000000     /* System Reset */
+#define DBCR0_RST_CHIP  0x20000000      /* Chip Reset */
+#define DBCR0_RST_CORE  0x10000000      /* Core Reset */
+#define DBCR0_RST_NONE  0x00000000      /* No Reset */
+#define DBCR0_ICMP      0x08000000      /* Instruction Completion */
+#define DBCR0_IC        DBCR0_ICMP
+#define DBCR0_BRT       0x04000000      /* Branch Taken */
+#define DBCR0_BT        DBCR0_BRT
+#define DBCR0_IRPT      0x02000000      /* Exception Debug Event */
+#define DBCR0_TDE       0x01000000      /* TRAP Debug Event */
+#define DBCR0_TIE       DBCR0_TDE
+#define DBCR0_IAC1      0x00800000      /* Instr Addr compare 1 enable */
+#define DBCR0_IAC2      0x00400000      /* Instr Addr compare 2 enable */
+#define DBCR0_IAC3      0x00200000      /* Instr Addr compare 3 enable */
+#define DBCR0_IAC4      0x00100000      /* Instr Addr compare 4 enable */
+#define DBCR0_DAC1R     0x00080000      /* DAC 1 Read enable */
+#define DBCR0_DAC1W     0x00040000      /* DAC 1 Write enable */
+#define DBCR0_DAC2R     0x00020000      /* DAC 2 Read enable */
+#define DBCR0_DAC2W     0x00010000      /* DAC 2 Write enable */
+#define DBCR0_RET       0x00008000      /* Return Debug Event */
+#define DBCR0_CIRPT     0x00000040      /* Critical Interrupt Taken Event */
+#define DBCR0_CRET      0x00000020      /* Critical Return Debug Event */
+#define DBCR0_FT        0x00000001      /* Freeze Timers on debug event */
+
+/* Bit definitions related to the DBCR1. */
+#define DBCR1_IAC12M    0x00800000      /* Instr Addr 1-2 range enable */
+#define DBCR1_IAC12MX   0x00C00000      /* Instr Addr 1-2 range eXclusive */
+#define DBCR1_IAC12AT   0x00010000      /* Instr Addr 1-2 range Toggle */
+#define DBCR1_IAC34M    0x00000080      /* Instr Addr 3-4 range enable */
+#define DBCR1_IAC34MX   0x000000C0      /* Instr Addr 3-4 range eXclusive */
+#define DBCR1_IAC34AT   0x00000001      /* Instr Addr 3-4 range Toggle */
+
+/* Bit definitions related to the DBCR2. */
+#define DBCR2_DAC12M    0x00800000      /* DAC 1-2 range enable */
+#define DBCR2_DAC12MX   0x00C00000      /* DAC 1-2 range eXclusive */
+#define DBCR2_DAC12A    0x00200000      /* DAC 1-2 Asynchronous */
+#endif
 
 /* Bit definitions related to the TCR. */
 #define TCR_WP(x)       (((x)&0x3)<<30) /* WDT Period */
@@ -336,6 +396,20 @@
 #define L1CSR1_ICFI     0x00000002      /* Instr Cache Flash Invalidate */
 #define L1CSR1_ICE      0x00000001      /* Instr Cache Enable */
 
+/* Bit definitions for L2CSR0. */
+#define L2CSR0_L2E      0x80000000      /* L2 Cache Enable */
+#define L2CSR0_L2PE     0x40000000      /* L2 Cache Parity/ECC Enable */
+#define L2CSR0_L2WP     0x1c000000      /* L2 I/D Way Partioning */
+#define L2CSR0_L2CM     0x03000000      /* L2 Cache Coherency Mode */
+#define L2CSR0_L2FI     0x00200000      /* L2 Cache Flash Invalidate */
+#define L2CSR0_L2IO     0x00100000      /* L2 Cache Instruction Only */
+#define L2CSR0_L2DO     0x00010000      /* L2 Cache Data Only */
+#define L2CSR0_L2REP    0x00003000      /* L2 Line Replacement Algo */
+#define L2CSR0_L2FL     0x00000800      /* L2 Cache Flush */
+#define L2CSR0_L2LFC    0x00000400      /* L2 Cache Lock Flash Clear */
+#define L2CSR0_L2LOA    0x00000080      /* L2 Cache Lock Overflow Allocate */
+#define L2CSR0_L2LO     0x00000020      /* L2 Cache Lock Overflow */
+
 /* Bit definitions for SGR. */
 #define SGR_NORMAL      0               /* Speculative fetching allowed. */
 #define SGR_GUARDED     1               /* Speculative fetching disallowed. */
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
index 2cda3c38a9fa..42a1ef590690 100644
--- a/include/asm-powerpc/synch.h
+++ b/include/asm-powerpc/synch.h
@@ -4,7 +4,7 @@
 
 #include <linux/stringify.h>
 
-#ifdef __powerpc64__
+#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
 #define __SUBARCH_HAS_LWSYNC
 #endif