diff options
-rw-r--r-- | arch/powerpc/oprofile/op_model_7450.c | 10 | ||||
-rw-r--r-- | arch/powerpc/oprofile/op_model_fsl_booke.c | 81 | ||||
-rw-r--r-- | arch/powerpc/oprofile/op_model_power4.c | 10 | ||||
-rw-r--r-- | arch/powerpc/oprofile/op_model_rs64.c | 10 | ||||
-rw-r--r-- | include/asm-powerpc/oprofile_impl.h | 89 |
5 files changed, 98 insertions, 102 deletions
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c index f481c0ed5e67..5d1bbaf35ccb 100644 --- a/arch/powerpc/oprofile/op_model_7450.c +++ b/arch/powerpc/oprofile/op_model_7450.c | |||
@@ -137,9 +137,9 @@ static void fsl7450_start(struct op_counter_config *ctr) | |||
137 | 137 | ||
138 | for (i = 0; i < NUM_CTRS; ++i) { | 138 | for (i = 0; i < NUM_CTRS; ++i) { |
139 | if (ctr[i].enabled) | 139 | if (ctr[i].enabled) |
140 | ctr_write(i, reset_value[i]); | 140 | classic_ctr_write(i, reset_value[i]); |
141 | else | 141 | else |
142 | ctr_write(i, 0); | 142 | classic_ctr_write(i, 0); |
143 | } | 143 | } |
144 | 144 | ||
145 | /* Clear the freeze bit, and enable the interrupt. | 145 | /* Clear the freeze bit, and enable the interrupt. |
@@ -179,13 +179,13 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs, | |||
179 | is_kernel = is_kernel_addr(pc); | 179 | is_kernel = is_kernel_addr(pc); |
180 | 180 | ||
181 | for (i = 0; i < NUM_CTRS; ++i) { | 181 | for (i = 0; i < NUM_CTRS; ++i) { |
182 | val = ctr_read(i); | 182 | val = classic_ctr_read(i); |
183 | if (val < 0) { | 183 | if (val < 0) { |
184 | if (oprofile_running && ctr[i].enabled) { | 184 | if (oprofile_running && ctr[i].enabled) { |
185 | oprofile_add_ext_sample(pc, regs, i, is_kernel); | 185 | oprofile_add_ext_sample(pc, regs, i, is_kernel); |
186 | ctr_write(i, reset_value[i]); | 186 | classic_ctr_write(i, reset_value[i]); |
187 | } else { | 187 | } else { |
188 | ctr_write(i, 0); | 188 | classic_ctr_write(i, 0); |
189 | } | 189 | } |
190 | } | 190 | } |
191 | } | 191 | } |
diff --git a/arch/powerpc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c index 0b3c31f5209e..2267eb8c661b 100644 --- a/arch/powerpc/oprofile/op_model_fsl_booke.c +++ b/arch/powerpc/oprofile/op_model_fsl_booke.c | |||
@@ -32,6 +32,87 @@ static unsigned long reset_value[OP_MAX_COUNTER]; | |||
32 | static int num_counters; | 32 | static int num_counters; |
33 | static int oprofile_running; | 33 | static int oprofile_running; |
34 | 34 | ||
35 | static inline u32 get_pmlca(int ctr) | ||
36 | { | ||
37 | u32 pmlca; | ||
38 | |||
39 | switch (ctr) { | ||
40 | case 0: | ||
41 | pmlca = mfpmr(PMRN_PMLCA0); | ||
42 | break; | ||
43 | case 1: | ||
44 | pmlca = mfpmr(PMRN_PMLCA1); | ||
45 | break; | ||
46 | case 2: | ||
47 | pmlca = mfpmr(PMRN_PMLCA2); | ||
48 | break; | ||
49 | case 3: | ||
50 | pmlca = mfpmr(PMRN_PMLCA3); | ||
51 | break; | ||
52 | default: | ||
53 | panic("Bad ctr number\n"); | ||
54 | } | ||
55 | |||
56 | return pmlca; | ||
57 | } | ||
58 | |||
59 | static inline void set_pmlca(int ctr, u32 pmlca) | ||
60 | { | ||
61 | switch (ctr) { | ||
62 | case 0: | ||
63 | mtpmr(PMRN_PMLCA0, pmlca); | ||
64 | break; | ||
65 | case 1: | ||
66 | mtpmr(PMRN_PMLCA1, pmlca); | ||
67 | break; | ||
68 | case 2: | ||
69 | mtpmr(PMRN_PMLCA2, pmlca); | ||
70 | break; | ||
71 | case 3: | ||
72 | mtpmr(PMRN_PMLCA3, pmlca); | ||
73 | break; | ||
74 | default: | ||
75 | panic("Bad ctr number\n"); | ||
76 | } | ||
77 | } | ||
78 | |||
79 | static inline unsigned int ctr_read(unsigned int i) | ||
80 | { | ||
81 | switch(i) { | ||
82 | case 0: | ||
83 | return mfpmr(PMRN_PMC0); | ||
84 | case 1: | ||
85 | return mfpmr(PMRN_PMC1); | ||
86 | case 2: | ||
87 | return mfpmr(PMRN_PMC2); | ||
88 | case 3: | ||
89 | return mfpmr(PMRN_PMC3); | ||
90 | default: | ||
91 | return 0; | ||
92 | } | ||
93 | } | ||
94 | |||
95 | static inline void ctr_write(unsigned int i, unsigned int val) | ||
96 | { | ||
97 | switch(i) { | ||
98 | case 0: | ||
99 | mtpmr(PMRN_PMC0, val); | ||
100 | break; | ||
101 | case 1: | ||
102 | mtpmr(PMRN_PMC1, val); | ||
103 | break; | ||
104 | case 2: | ||
105 | mtpmr(PMRN_PMC2, val); | ||
106 | break; | ||
107 | case 3: | ||
108 | mtpmr(PMRN_PMC3, val); | ||
109 | break; | ||
110 | default: | ||
111 | break; | ||
112 | } | ||
113 | } | ||
114 | |||
115 | |||
35 | static void init_pmc_stop(int ctr) | 116 | static void init_pmc_stop(int ctr) |
36 | { | 117 | { |
37 | u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU | | 118 | u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU | |
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c index 356709d515b9..fe597a154d4f 100644 --- a/arch/powerpc/oprofile/op_model_power4.c +++ b/arch/powerpc/oprofile/op_model_power4.c | |||
@@ -121,9 +121,9 @@ static void power4_start(struct op_counter_config *ctr) | |||
121 | 121 | ||
122 | for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { | 122 | for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { |
123 | if (ctr[i].enabled) { | 123 | if (ctr[i].enabled) { |
124 | ctr_write(i, reset_value[i]); | 124 | classic_ctr_write(i, reset_value[i]); |
125 | } else { | 125 | } else { |
126 | ctr_write(i, 0); | 126 | classic_ctr_write(i, 0); |
127 | } | 127 | } |
128 | } | 128 | } |
129 | 129 | ||
@@ -254,13 +254,13 @@ static void power4_handle_interrupt(struct pt_regs *regs, | |||
254 | mtmsrd(mfmsr() | MSR_PMM); | 254 | mtmsrd(mfmsr() | MSR_PMM); |
255 | 255 | ||
256 | for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { | 256 | for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { |
257 | val = ctr_read(i); | 257 | val = classic_ctr_read(i); |
258 | if (val < 0) { | 258 | if (val < 0) { |
259 | if (oprofile_running && ctr[i].enabled) { | 259 | if (oprofile_running && ctr[i].enabled) { |
260 | oprofile_add_ext_sample(pc, regs, i, is_kernel); | 260 | oprofile_add_ext_sample(pc, regs, i, is_kernel); |
261 | ctr_write(i, reset_value[i]); | 261 | classic_ctr_write(i, reset_value[i]); |
262 | } else { | 262 | } else { |
263 | ctr_write(i, 0); | 263 | classic_ctr_write(i, 0); |
264 | } | 264 | } |
265 | } | 265 | } |
266 | } | 266 | } |
diff --git a/arch/powerpc/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c index 19c5ee089bc9..c731acbfb2a5 100644 --- a/arch/powerpc/oprofile/op_model_rs64.c +++ b/arch/powerpc/oprofile/op_model_rs64.c | |||
@@ -137,10 +137,10 @@ static void rs64_start(struct op_counter_config *ctr) | |||
137 | 137 | ||
138 | for (i = 0; i < num_counters; ++i) { | 138 | for (i = 0; i < num_counters; ++i) { |
139 | if (ctr[i].enabled) { | 139 | if (ctr[i].enabled) { |
140 | ctr_write(i, reset_value[i]); | 140 | classic_ctr_write(i, reset_value[i]); |
141 | ctrl_write(i, ctr[i].event); | 141 | ctrl_write(i, ctr[i].event); |
142 | } else { | 142 | } else { |
143 | ctr_write(i, 0); | 143 | classic_ctr_write(i, 0); |
144 | } | 144 | } |
145 | } | 145 | } |
146 | 146 | ||
@@ -186,13 +186,13 @@ static void rs64_handle_interrupt(struct pt_regs *regs, | |||
186 | mtmsrd(mfmsr() | MSR_PMM); | 186 | mtmsrd(mfmsr() | MSR_PMM); |
187 | 187 | ||
188 | for (i = 0; i < num_counters; ++i) { | 188 | for (i = 0; i < num_counters; ++i) { |
189 | val = ctr_read(i); | 189 | val = classic_ctr_read(i); |
190 | if (val < 0) { | 190 | if (val < 0) { |
191 | if (ctr[i].enabled) { | 191 | if (ctr[i].enabled) { |
192 | oprofile_add_ext_sample(pc, regs, i, is_kernel); | 192 | oprofile_add_ext_sample(pc, regs, i, is_kernel); |
193 | ctr_write(i, reset_value[i]); | 193 | classic_ctr_write(i, reset_value[i]); |
194 | } else { | 194 | } else { |
195 | ctr_write(i, 0); | 195 | classic_ctr_write(i, 0); |
196 | } | 196 | } |
197 | } | 197 | } |
198 | } | 198 | } |
diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h index 71043bf3641f..94c0ad2bff96 100644 --- a/include/asm-powerpc/oprofile_impl.h +++ b/include/asm-powerpc/oprofile_impl.h | |||
@@ -58,10 +58,8 @@ extern struct op_powerpc_model op_model_power4; | |||
58 | extern struct op_powerpc_model op_model_7450; | 58 | extern struct op_powerpc_model op_model_7450; |
59 | extern struct op_powerpc_model op_model_cell; | 59 | extern struct op_powerpc_model op_model_cell; |
60 | 60 | ||
61 | #ifndef CONFIG_FSL_BOOKE | ||
62 | |||
63 | /* All the classic PPC parts use these */ | 61 | /* All the classic PPC parts use these */ |
64 | static inline unsigned int ctr_read(unsigned int i) | 62 | static inline unsigned int classic_ctr_read(unsigned int i) |
65 | { | 63 | { |
66 | switch(i) { | 64 | switch(i) { |
67 | case 0: | 65 | case 0: |
@@ -89,7 +87,7 @@ static inline unsigned int ctr_read(unsigned int i) | |||
89 | } | 87 | } |
90 | } | 88 | } |
91 | 89 | ||
92 | static inline void ctr_write(unsigned int i, unsigned int val) | 90 | static inline void classic_ctr_write(unsigned int i, unsigned int val) |
93 | { | 91 | { |
94 | switch(i) { | 92 | switch(i) { |
95 | case 0: | 93 | case 0: |
@@ -124,89 +122,6 @@ static inline void ctr_write(unsigned int i, unsigned int val) | |||
124 | break; | 122 | break; |
125 | } | 123 | } |
126 | } | 124 | } |
127 | #else /* CONFIG_FSL_BOOKE */ | ||
128 | static inline u32 get_pmlca(int ctr) | ||
129 | { | ||
130 | u32 pmlca; | ||
131 | |||
132 | switch (ctr) { | ||
133 | case 0: | ||
134 | pmlca = mfpmr(PMRN_PMLCA0); | ||
135 | break; | ||
136 | case 1: | ||
137 | pmlca = mfpmr(PMRN_PMLCA1); | ||
138 | break; | ||
139 | case 2: | ||
140 | pmlca = mfpmr(PMRN_PMLCA2); | ||
141 | break; | ||
142 | case 3: | ||
143 | pmlca = mfpmr(PMRN_PMLCA3); | ||
144 | break; | ||
145 | default: | ||
146 | panic("Bad ctr number\n"); | ||
147 | } | ||
148 | |||
149 | return pmlca; | ||
150 | } | ||
151 | |||
152 | static inline void set_pmlca(int ctr, u32 pmlca) | ||
153 | { | ||
154 | switch (ctr) { | ||
155 | case 0: | ||
156 | mtpmr(PMRN_PMLCA0, pmlca); | ||
157 | break; | ||
158 | case 1: | ||
159 | mtpmr(PMRN_PMLCA1, pmlca); | ||
160 | break; | ||
161 | case 2: | ||
162 | mtpmr(PMRN_PMLCA2, pmlca); | ||
163 | break; | ||
164 | case 3: | ||
165 | mtpmr(PMRN_PMLCA3, pmlca); | ||
166 | break; | ||
167 | default: | ||
168 | panic("Bad ctr number\n"); | ||
169 | } | ||
170 | } | ||
171 | |||
172 | static inline unsigned int ctr_read(unsigned int i) | ||
173 | { | ||
174 | switch(i) { | ||
175 | case 0: | ||
176 | return mfpmr(PMRN_PMC0); | ||
177 | case 1: | ||
178 | return mfpmr(PMRN_PMC1); | ||
179 | case 2: | ||
180 | return mfpmr(PMRN_PMC2); | ||
181 | case 3: | ||
182 | return mfpmr(PMRN_PMC3); | ||
183 | default: | ||
184 | return 0; | ||
185 | } | ||
186 | } | ||
187 | |||
188 | static inline void ctr_write(unsigned int i, unsigned int val) | ||
189 | { | ||
190 | switch(i) { | ||
191 | case 0: | ||
192 | mtpmr(PMRN_PMC0, val); | ||
193 | break; | ||
194 | case 1: | ||
195 | mtpmr(PMRN_PMC1, val); | ||
196 | break; | ||
197 | case 2: | ||
198 | mtpmr(PMRN_PMC2, val); | ||
199 | break; | ||
200 | case 3: | ||
201 | mtpmr(PMRN_PMC3, val); | ||
202 | break; | ||
203 | default: | ||
204 | break; | ||
205 | } | ||
206 | } | ||
207 | |||
208 | |||
209 | #endif /* CONFIG_FSL_BOOKE */ | ||
210 | 125 | ||
211 | 126 | ||
212 | extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); | 127 | extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); |