diff options
-rw-r--r-- | drivers/scsi/qla1280.c | 143 | ||||
-rw-r--r-- | drivers/scsi/qla1280.h | 21 |
2 files changed, 81 insertions, 83 deletions
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c index 1a8b1147821d..6481deb57048 100644 --- a/drivers/scsi/qla1280.c +++ b/drivers/scsi/qla1280.c | |||
@@ -1328,7 +1328,7 @@ qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target) | |||
1328 | uint8_t mr; | 1328 | uint8_t mr; |
1329 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | 1329 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
1330 | struct nvram *nv; | 1330 | struct nvram *nv; |
1331 | int status; | 1331 | int status, lun; |
1332 | 1332 | ||
1333 | nv = &ha->nvram; | 1333 | nv = &ha->nvram; |
1334 | 1334 | ||
@@ -1336,24 +1336,38 @@ qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target) | |||
1336 | 1336 | ||
1337 | /* Set Target Parameters. */ | 1337 | /* Set Target Parameters. */ |
1338 | mb[0] = MBC_SET_TARGET_PARAMETERS; | 1338 | mb[0] = MBC_SET_TARGET_PARAMETERS; |
1339 | mb[1] = (uint16_t) (bus ? target | BIT_7 : target); | 1339 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); |
1340 | mb[1] <<= 8; | 1340 | mb[2] = nv->bus[bus].target[target].parameter.renegotiate_on_error << 8; |
1341 | 1341 | mb[2] |= nv->bus[bus].target[target].parameter.stop_queue_on_check << 9; | |
1342 | mb[2] = (nv->bus[bus].target[target].parameter.c << 8); | 1342 | mb[2] |= nv->bus[bus].target[target].parameter.auto_request_sense << 10; |
1343 | mb[2] |= nv->bus[bus].target[target].parameter.tag_queuing << 11; | ||
1344 | mb[2] |= nv->bus[bus].target[target].parameter.enable_sync << 12; | ||
1345 | mb[2] |= nv->bus[bus].target[target].parameter.enable_wide << 13; | ||
1346 | mb[2] |= nv->bus[bus].target[target].parameter.parity_checking << 14; | ||
1347 | mb[2] |= nv->bus[bus].target[target].parameter.disconnect_allowed << 15; | ||
1343 | 1348 | ||
1344 | if (IS_ISP1x160(ha)) { | 1349 | if (IS_ISP1x160(ha)) { |
1345 | mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5; | 1350 | mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5; |
1346 | mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8) | | 1351 | mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8); |
1347 | nv->bus[bus].target[target].sync_period; | ||
1348 | mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) | | 1352 | mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) | |
1349 | nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width; | 1353 | nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width; |
1350 | mr |= BIT_6; | 1354 | mr |= BIT_6; |
1351 | } else { | 1355 | } else { |
1352 | mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8) | | 1356 | mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8); |
1353 | nv->bus[bus].target[target].sync_period; | ||
1354 | } | 1357 | } |
1358 | mb[3] |= nv->bus[bus].target[target].sync_period; | ||
1359 | |||
1360 | status = qla1280_mailbox_command(ha, mr, mb); | ||
1355 | 1361 | ||
1356 | status = qla1280_mailbox_command(ha, mr, &mb[0]); | 1362 | /* Set Device Queue Parameters. */ |
1363 | for (lun = 0; lun < MAX_LUNS; lun++) { | ||
1364 | mb[0] = MBC_SET_DEVICE_QUEUE; | ||
1365 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); | ||
1366 | mb[1] |= lun; | ||
1367 | mb[2] = nv->bus[bus].max_queue_depth; | ||
1368 | mb[3] = nv->bus[bus].target[target].execution_throttle; | ||
1369 | status |= qla1280_mailbox_command(ha, 0x0f, mb); | ||
1370 | } | ||
1357 | 1371 | ||
1358 | if (status) | 1372 | if (status) |
1359 | printk(KERN_WARNING "scsi(%ld:%i:%i): " | 1373 | printk(KERN_WARNING "scsi(%ld:%i:%i): " |
@@ -1400,19 +1414,19 @@ qla1280_slave_configure(struct scsi_device *device) | |||
1400 | } | 1414 | } |
1401 | 1415 | ||
1402 | #if LINUX_VERSION_CODE > 0x020500 | 1416 | #if LINUX_VERSION_CODE > 0x020500 |
1403 | nv->bus[bus].target[target].parameter.f.enable_sync = device->sdtr; | 1417 | nv->bus[bus].target[target].parameter.enable_sync = device->sdtr; |
1404 | nv->bus[bus].target[target].parameter.f.enable_wide = device->wdtr; | 1418 | nv->bus[bus].target[target].parameter.enable_wide = device->wdtr; |
1405 | nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr; | 1419 | nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr; |
1406 | #endif | 1420 | #endif |
1407 | 1421 | ||
1408 | if (driver_setup.no_sync || | 1422 | if (driver_setup.no_sync || |
1409 | (driver_setup.sync_mask && | 1423 | (driver_setup.sync_mask && |
1410 | (~driver_setup.sync_mask & (1 << target)))) | 1424 | (~driver_setup.sync_mask & (1 << target)))) |
1411 | nv->bus[bus].target[target].parameter.f.enable_sync = 0; | 1425 | nv->bus[bus].target[target].parameter.enable_sync = 0; |
1412 | if (driver_setup.no_wide || | 1426 | if (driver_setup.no_wide || |
1413 | (driver_setup.wide_mask && | 1427 | (driver_setup.wide_mask && |
1414 | (~driver_setup.wide_mask & (1 << target)))) | 1428 | (~driver_setup.wide_mask & (1 << target)))) |
1415 | nv->bus[bus].target[target].parameter.f.enable_wide = 0; | 1429 | nv->bus[bus].target[target].parameter.enable_wide = 0; |
1416 | if (IS_ISP1x160(ha)) { | 1430 | if (IS_ISP1x160(ha)) { |
1417 | if (driver_setup.no_ppr || | 1431 | if (driver_setup.no_ppr || |
1418 | (driver_setup.ppr_mask && | 1432 | (driver_setup.ppr_mask && |
@@ -1421,7 +1435,7 @@ qla1280_slave_configure(struct scsi_device *device) | |||
1421 | } | 1435 | } |
1422 | 1436 | ||
1423 | spin_lock_irqsave(HOST_LOCK, flags); | 1437 | spin_lock_irqsave(HOST_LOCK, flags); |
1424 | if (nv->bus[bus].target[target].parameter.f.enable_sync) | 1438 | if (nv->bus[bus].target[target].parameter.enable_sync) |
1425 | status = qla1280_set_target_parameters(ha, bus, target); | 1439 | status = qla1280_set_target_parameters(ha, bus, target); |
1426 | qla1280_get_target_parameters(ha, device); | 1440 | qla1280_get_target_parameters(ha, device); |
1427 | spin_unlock_irqrestore(HOST_LOCK, flags); | 1441 | spin_unlock_irqrestore(HOST_LOCK, flags); |
@@ -2151,17 +2165,17 @@ qla1280_set_target_defaults(struct scsi_qla_host *ha, int bus, int target) | |||
2151 | { | 2165 | { |
2152 | struct nvram *nv = &ha->nvram; | 2166 | struct nvram *nv = &ha->nvram; |
2153 | 2167 | ||
2154 | nv->bus[bus].target[target].parameter.f.renegotiate_on_error = 1; | 2168 | nv->bus[bus].target[target].parameter.renegotiate_on_error = 1; |
2155 | nv->bus[bus].target[target].parameter.f.auto_request_sense = 1; | 2169 | nv->bus[bus].target[target].parameter.auto_request_sense = 1; |
2156 | nv->bus[bus].target[target].parameter.f.tag_queuing = 1; | 2170 | nv->bus[bus].target[target].parameter.tag_queuing = 1; |
2157 | nv->bus[bus].target[target].parameter.f.enable_sync = 1; | 2171 | nv->bus[bus].target[target].parameter.enable_sync = 1; |
2158 | #if 1 /* Some SCSI Processors do not seem to like this */ | 2172 | #if 1 /* Some SCSI Processors do not seem to like this */ |
2159 | nv->bus[bus].target[target].parameter.f.enable_wide = 1; | 2173 | nv->bus[bus].target[target].parameter.enable_wide = 1; |
2160 | #endif | 2174 | #endif |
2161 | nv->bus[bus].target[target].parameter.f.parity_checking = 1; | ||
2162 | nv->bus[bus].target[target].parameter.f.disconnect_allowed = 1; | ||
2163 | nv->bus[bus].target[target].execution_throttle = | 2175 | nv->bus[bus].target[target].execution_throttle = |
2164 | nv->bus[bus].max_queue_depth - 1; | 2176 | nv->bus[bus].max_queue_depth - 1; |
2177 | nv->bus[bus].target[target].parameter.parity_checking = 1; | ||
2178 | nv->bus[bus].target[target].parameter.disconnect_allowed = 1; | ||
2165 | 2179 | ||
2166 | if (IS_ISP1x160(ha)) { | 2180 | if (IS_ISP1x160(ha)) { |
2167 | nv->bus[bus].target[target].flags.flags1x160.device_enable = 1; | 2181 | nv->bus[bus].target[target].flags.flags1x160.device_enable = 1; |
@@ -2237,66 +2251,53 @@ qla1280_config_target(struct scsi_qla_host *ha, int bus, int target) | |||
2237 | struct nvram *nv = &ha->nvram; | 2251 | struct nvram *nv = &ha->nvram; |
2238 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | 2252 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
2239 | int status, lun; | 2253 | int status, lun; |
2254 | uint16_t flag; | ||
2240 | 2255 | ||
2241 | /* Set Target Parameters. */ | 2256 | /* Set Target Parameters. */ |
2242 | mb[0] = MBC_SET_TARGET_PARAMETERS; | 2257 | mb[0] = MBC_SET_TARGET_PARAMETERS; |
2243 | mb[1] = (uint16_t) (bus ? target | BIT_7 : target); | 2258 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); |
2244 | mb[1] <<= 8; | ||
2245 | |||
2246 | /* | ||
2247 | * Do not enable wide, sync, and ppr for the initial | ||
2248 | * INQUIRY run. We enable this later if we determine | ||
2249 | * the target actually supports it. | ||
2250 | */ | ||
2251 | nv->bus[bus].target[target].parameter.f. | ||
2252 | auto_request_sense = 1; | ||
2253 | nv->bus[bus].target[target].parameter.f. | ||
2254 | stop_queue_on_check = 0; | ||
2255 | |||
2256 | if (IS_ISP1x160(ha)) | ||
2257 | nv->bus[bus].target[target].ppr_1x160. | ||
2258 | flags.enable_ppr = 0; | ||
2259 | 2259 | ||
2260 | /* | 2260 | /* |
2261 | * No sync, wide, etc. while probing | 2261 | * Do not enable sync and ppr for the initial INQUIRY run. We |
2262 | * enable this later if we determine the target actually | ||
2263 | * supports it. | ||
2262 | */ | 2264 | */ |
2263 | mb[2] = (nv->bus[bus].target[target].parameter.c << 8) & | 2265 | mb[2] = (TP_RENEGOTIATE | TP_AUTO_REQUEST_SENSE | TP_TAGGED_QUEUE |
2264 | ~(TP_SYNC /*| TP_WIDE | TP_PPR*/); | 2266 | | TP_WIDE | TP_PARITY | TP_DISCONNECT); |
2265 | 2267 | ||
2266 | if (IS_ISP1x160(ha)) | 2268 | if (IS_ISP1x160(ha)) |
2267 | mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8; | 2269 | mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8; |
2268 | else | 2270 | else |
2269 | mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8; | 2271 | mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8; |
2270 | mb[3] |= nv->bus[bus].target[target].sync_period; | 2272 | mb[3] |= nv->bus[bus].target[target].sync_period; |
2271 | 2273 | status = qla1280_mailbox_command(ha, 0x0f, mb); | |
2272 | status = qla1280_mailbox_command(ha, BIT_3 | BIT_2 | BIT_1 | BIT_0, &mb[0]); | ||
2273 | 2274 | ||
2274 | /* Save Tag queuing enable flag. */ | 2275 | /* Save Tag queuing enable flag. */ |
2275 | mb[0] = BIT_0 << target; | 2276 | flag = (BIT_0 << target) & mb[0]; |
2276 | if (nv->bus[bus].target[target].parameter.f.tag_queuing) | 2277 | if (nv->bus[bus].target[target].parameter.tag_queuing) |
2277 | ha->bus_settings[bus].qtag_enables |= mb[0]; | 2278 | ha->bus_settings[bus].qtag_enables |= flag; |
2278 | 2279 | ||
2279 | /* Save Device enable flag. */ | 2280 | /* Save Device enable flag. */ |
2280 | if (IS_ISP1x160(ha)) { | 2281 | if (IS_ISP1x160(ha)) { |
2281 | if (nv->bus[bus].target[target].flags.flags1x160.device_enable) | 2282 | if (nv->bus[bus].target[target].flags.flags1x160.device_enable) |
2282 | ha->bus_settings[bus].device_enables |= mb[0]; | 2283 | ha->bus_settings[bus].device_enables |= flag; |
2283 | ha->bus_settings[bus].lun_disables |= 0; | 2284 | ha->bus_settings[bus].lun_disables |= 0; |
2284 | } else { | 2285 | } else { |
2285 | if (nv->bus[bus].target[target].flags.flags1x80.device_enable) | 2286 | if (nv->bus[bus].target[target].flags.flags1x80.device_enable) |
2286 | ha->bus_settings[bus].device_enables |= mb[0]; | 2287 | ha->bus_settings[bus].device_enables |= flag; |
2287 | /* Save LUN disable flag. */ | 2288 | /* Save LUN disable flag. */ |
2288 | if (nv->bus[bus].target[target].flags.flags1x80.lun_disable) | 2289 | if (nv->bus[bus].target[target].flags.flags1x80.lun_disable) |
2289 | ha->bus_settings[bus].lun_disables |= mb[0]; | 2290 | ha->bus_settings[bus].lun_disables |= flag; |
2290 | } | 2291 | } |
2291 | 2292 | ||
2292 | /* Set Device Queue Parameters. */ | 2293 | /* Set Device Queue Parameters. */ |
2293 | for (lun = 0; lun < MAX_LUNS; lun++) { | 2294 | for (lun = 0; lun < MAX_LUNS; lun++) { |
2294 | mb[0] = MBC_SET_DEVICE_QUEUE; | 2295 | mb[0] = MBC_SET_DEVICE_QUEUE; |
2295 | mb[1] = (uint16_t)(bus ? target | BIT_7 : target); | 2296 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); |
2296 | mb[1] = mb[1] << 8 | lun; | 2297 | mb[1] |= lun; |
2297 | mb[2] = nv->bus[bus].max_queue_depth; | 2298 | mb[2] = nv->bus[bus].max_queue_depth; |
2298 | mb[3] = nv->bus[bus].target[target].execution_throttle; | 2299 | mb[3] = nv->bus[bus].target[target].execution_throttle; |
2299 | status |= qla1280_mailbox_command(ha, 0x0f, &mb[0]); | 2300 | status |= qla1280_mailbox_command(ha, 0x0f, mb); |
2300 | } | 2301 | } |
2301 | 2302 | ||
2302 | return status; | 2303 | return status; |
@@ -2341,7 +2342,6 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2341 | struct nvram *nv = &ha->nvram; | 2342 | struct nvram *nv = &ha->nvram; |
2342 | int bus, target, status = 0; | 2343 | int bus, target, status = 0; |
2343 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | 2344 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
2344 | uint16_t mask; | ||
2345 | 2345 | ||
2346 | ENTER("qla1280_nvram_config"); | 2346 | ENTER("qla1280_nvram_config"); |
2347 | 2347 | ||
@@ -2349,7 +2349,7 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2349 | /* Always force AUTO sense for LINUX SCSI */ | 2349 | /* Always force AUTO sense for LINUX SCSI */ |
2350 | for (bus = 0; bus < MAX_BUSES; bus++) | 2350 | for (bus = 0; bus < MAX_BUSES; bus++) |
2351 | for (target = 0; target < MAX_TARGETS; target++) { | 2351 | for (target = 0; target < MAX_TARGETS; target++) { |
2352 | nv->bus[bus].target[target].parameter.f. | 2352 | nv->bus[bus].target[target].parameter. |
2353 | auto_request_sense = 1; | 2353 | auto_request_sense = 1; |
2354 | } | 2354 | } |
2355 | } else { | 2355 | } else { |
@@ -2416,16 +2416,17 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2416 | 2416 | ||
2417 | /* Firmware feature word. */ | 2417 | /* Firmware feature word. */ |
2418 | mb[0] = MBC_SET_FIRMWARE_FEATURES; | 2418 | mb[0] = MBC_SET_FIRMWARE_FEATURES; |
2419 | mask = BIT_5 | BIT_1 | BIT_0; | 2419 | mb[1] = nv->firmware_feature.f.enable_fast_posting; |
2420 | mb[1] = le16_to_cpu(nv->firmware_feature.w) & (mask); | 2420 | mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1; |
2421 | mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5; | ||
2421 | #if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2) | 2422 | #if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2) |
2422 | if (ia64_platform_is("sn2")) { | 2423 | if (ia64_platform_is("sn2")) { |
2423 | printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " | 2424 | printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " |
2424 | "workaround\n", ha->host_no); | 2425 | "workaround\n", ha->host_no); |
2425 | mb[1] |= BIT_9; | 2426 | mb[1] |= nv->firmware_feature.f.unused_9 << 9; /* XXX */ |
2426 | } | 2427 | } |
2427 | #endif | 2428 | #endif |
2428 | status |= qla1280_mailbox_command(ha, mask, &mb[0]); | 2429 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2429 | 2430 | ||
2430 | /* Retry count and delay. */ | 2431 | /* Retry count and delay. */ |
2431 | mb[0] = MBC_SET_RETRY_COUNT; | 2432 | mb[0] = MBC_SET_RETRY_COUNT; |
@@ -2454,27 +2455,27 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2454 | mb[2] |= BIT_5; | 2455 | mb[2] |= BIT_5; |
2455 | if (nv->bus[1].config_2.data_line_active_negation) | 2456 | if (nv->bus[1].config_2.data_line_active_negation) |
2456 | mb[2] |= BIT_4; | 2457 | mb[2] |= BIT_4; |
2457 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); | 2458 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); |
2458 | 2459 | ||
2459 | mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY; | 2460 | mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY; |
2460 | mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */ | 2461 | mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */ |
2461 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); | 2462 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2462 | 2463 | ||
2463 | /* thingy */ | 2464 | /* thingy */ |
2464 | mb[0] = MBC_SET_PCI_CONTROL; | 2465 | mb[0] = MBC_SET_PCI_CONTROL; |
2465 | mb[1] = 2; /* Data DMA Channel Burst Enable */ | 2466 | mb[1] = BIT_1; /* Data DMA Channel Burst Enable */ |
2466 | mb[2] = 2; /* Command DMA Channel Burst Enable */ | 2467 | mb[2] = BIT_1; /* Command DMA Channel Burst Enable */ |
2467 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); | 2468 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); |
2468 | 2469 | ||
2469 | mb[0] = MBC_SET_TAG_AGE_LIMIT; | 2470 | mb[0] = MBC_SET_TAG_AGE_LIMIT; |
2470 | mb[1] = 8; | 2471 | mb[1] = 8; |
2471 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); | 2472 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2472 | 2473 | ||
2473 | /* Selection timeout. */ | 2474 | /* Selection timeout. */ |
2474 | mb[0] = MBC_SET_SELECTION_TIMEOUT; | 2475 | mb[0] = MBC_SET_SELECTION_TIMEOUT; |
2475 | mb[1] = nv->bus[0].selection_timeout; | 2476 | mb[1] = nv->bus[0].selection_timeout; |
2476 | mb[2] = nv->bus[1].selection_timeout; | 2477 | mb[2] = nv->bus[1].selection_timeout; |
2477 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); | 2478 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); |
2478 | 2479 | ||
2479 | for (bus = 0; bus < ha->ports; bus++) | 2480 | for (bus = 0; bus < ha->ports; bus++) |
2480 | status |= qla1280_config_bus(ha, bus); | 2481 | status |= qla1280_config_bus(ha, bus); |
@@ -3915,21 +3916,21 @@ qla1280_get_target_options(struct scsi_cmnd *cmd, struct scsi_qla_host *ha) | |||
3915 | result = cmd->request_buffer; | 3916 | result = cmd->request_buffer; |
3916 | n = &ha->nvram; | 3917 | n = &ha->nvram; |
3917 | 3918 | ||
3918 | n->bus[bus].target[target].parameter.f.enable_wide = 0; | 3919 | n->bus[bus].target[target].parameter.enable_wide = 0; |
3919 | n->bus[bus].target[target].parameter.f.enable_sync = 0; | 3920 | n->bus[bus].target[target].parameter.enable_sync = 0; |
3920 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0; | 3921 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0; |
3921 | 3922 | ||
3922 | if (result[7] & 0x60) | 3923 | if (result[7] & 0x60) |
3923 | n->bus[bus].target[target].parameter.f.enable_wide = 1; | 3924 | n->bus[bus].target[target].parameter.enable_wide = 1; |
3924 | if (result[7] & 0x10) | 3925 | if (result[7] & 0x10) |
3925 | n->bus[bus].target[target].parameter.f.enable_sync = 1; | 3926 | n->bus[bus].target[target].parameter.enable_sync = 1; |
3926 | if ((result[2] >= 3) && (result[4] + 5 > 56) && | 3927 | if ((result[2] >= 3) && (result[4] + 5 > 56) && |
3927 | (result[56] & 0x4)) | 3928 | (result[56] & 0x4)) |
3928 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1; | 3929 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1; |
3929 | 3930 | ||
3930 | dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n", | 3931 | dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n", |
3931 | n->bus[bus].target[target].parameter.f.enable_wide, | 3932 | n->bus[bus].target[target].parameter.enable_wide, |
3932 | n->bus[bus].target[target].parameter.f.enable_sync, | 3933 | n->bus[bus].target[target].parameter.enable_sync, |
3933 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr); | 3934 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr); |
3934 | } | 3935 | } |
3935 | #endif | 3936 | #endif |
diff --git a/drivers/scsi/qla1280.h b/drivers/scsi/qla1280.h index 4032ea3f2b94..7c919db97a40 100644 --- a/drivers/scsi/qla1280.h +++ b/drivers/scsi/qla1280.h | |||
@@ -451,18 +451,15 @@ struct nvram { | |||
451 | uint16_t unused_38; /* 38, 39 */ | 451 | uint16_t unused_38; /* 38, 39 */ |
452 | 452 | ||
453 | struct { | 453 | struct { |
454 | union { | 454 | struct { |
455 | uint8_t c; | 455 | uint8_t renegotiate_on_error:1; |
456 | struct { | 456 | uint8_t stop_queue_on_check:1; |
457 | uint8_t renegotiate_on_error:1; | 457 | uint8_t auto_request_sense:1; |
458 | uint8_t stop_queue_on_check:1; | 458 | uint8_t tag_queuing:1; |
459 | uint8_t auto_request_sense:1; | 459 | uint8_t enable_sync:1; |
460 | uint8_t tag_queuing:1; | 460 | uint8_t enable_wide:1; |
461 | uint8_t enable_sync:1; | 461 | uint8_t parity_checking:1; |
462 | uint8_t enable_wide:1; | 462 | uint8_t disconnect_allowed:1; |
463 | uint8_t parity_checking:1; | ||
464 | uint8_t disconnect_allowed:1; | ||
465 | } f; | ||
466 | } parameter; /* 40 */ | 463 | } parameter; /* 40 */ |
467 | 464 | ||
468 | uint8_t execution_throttle; /* 41 */ | 465 | uint8_t execution_throttle; /* 41 */ |