diff options
-rw-r--r-- | drivers/net/bnx2.c | 9 | ||||
-rw-r--r-- | drivers/net/bnx2.h | 9 |
2 files changed, 15 insertions, 3 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 353c73fa3433..8d0022d0cc45 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
@@ -4438,18 +4438,21 @@ bnx2_init_chip(struct bnx2 *bp) | |||
4438 | } | 4438 | } |
4439 | 4439 | ||
4440 | if (bp->flags & BNX2_FLAG_USING_MSIX) { | 4440 | if (bp->flags & BNX2_FLAG_USING_MSIX) { |
4441 | u32 base = ((BNX2_TX_VEC - 1) * BNX2_HC_SB_CONFIG_SIZE) + | ||
4442 | BNX2_HC_SB_CONFIG_1; | ||
4443 | |||
4441 | REG_WR(bp, BNX2_HC_MSIX_BIT_VECTOR, | 4444 | REG_WR(bp, BNX2_HC_MSIX_BIT_VECTOR, |
4442 | BNX2_HC_MSIX_BIT_VECTOR_VAL); | 4445 | BNX2_HC_MSIX_BIT_VECTOR_VAL); |
4443 | 4446 | ||
4444 | REG_WR(bp, BNX2_HC_SB_CONFIG_1, | 4447 | REG_WR(bp, base, |
4445 | BNX2_HC_SB_CONFIG_1_TX_TMR_MODE | | 4448 | BNX2_HC_SB_CONFIG_1_TX_TMR_MODE | |
4446 | BNX2_HC_SB_CONFIG_1_ONE_SHOT); | 4449 | BNX2_HC_SB_CONFIG_1_ONE_SHOT); |
4447 | 4450 | ||
4448 | REG_WR(bp, BNX2_HC_TX_QUICK_CONS_TRIP_1, | 4451 | REG_WR(bp, base + BNX2_HC_TX_QUICK_CONS_TRIP_OFF, |
4449 | (bp->tx_quick_cons_trip_int << 16) | | 4452 | (bp->tx_quick_cons_trip_int << 16) | |
4450 | bp->tx_quick_cons_trip); | 4453 | bp->tx_quick_cons_trip); |
4451 | 4454 | ||
4452 | REG_WR(bp, BNX2_HC_TX_TICKS_1, | 4455 | REG_WR(bp, base + BNX2_HC_TX_TICKS_OFF, |
4453 | (bp->tx_ticks_int << 16) | bp->tx_ticks); | 4456 | (bp->tx_ticks_int << 16) | bp->tx_ticks); |
4454 | 4457 | ||
4455 | val |= BNX2_HC_CONFIG_SB_ADDR_INC_128B; | 4458 | val |= BNX2_HC_CONFIG_SB_ADDR_INC_128B; |
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 059e1159647f..7a1eff445052 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -5510,6 +5510,15 @@ struct l2_fhdr { | |||
5510 | #define BNX2_HC_PERIODIC_TICKS_8_HC_PERIODIC_TICKS (0xffffL<<0) | 5510 | #define BNX2_HC_PERIODIC_TICKS_8_HC_PERIODIC_TICKS (0xffffL<<0) |
5511 | #define BNX2_HC_PERIODIC_TICKS_8_HC_INT_PERIODIC_TICKS (0xffffL<<16) | 5511 | #define BNX2_HC_PERIODIC_TICKS_8_HC_INT_PERIODIC_TICKS (0xffffL<<16) |
5512 | 5512 | ||
5513 | #define BNX2_HC_SB_CONFIG_SIZE (BNX2_HC_SB_CONFIG_2 - BNX2_HC_SB_CONFIG_1) | ||
5514 | #define BNX2_HC_COMP_PROD_TRIP_OFF (BNX2_HC_COMP_PROD_TRIP_1 - \ | ||
5515 | BNX2_HC_SB_CONFIG_1) | ||
5516 | #define BNX2_HC_COM_TICKS_OFF (BNX2_HC_COM_TICKS_1 - BNX2_HC_SB_CONFIG_1) | ||
5517 | #define BNX2_HC_CMD_TICKS_OFF (BNX2_HC_CMD_TICKS_1 - BNX2_HC_SB_CONFIG_1) | ||
5518 | #define BNX2_HC_TX_QUICK_CONS_TRIP_OFF (BNX2_HC_TX_QUICK_CONS_TRIP_1 - \ | ||
5519 | BNX2_HC_SB_CONFIG_1) | ||
5520 | #define BNX2_HC_TX_TICKS_OFF (BNX2_HC_TX_TICKS_1 - BNX2_HC_SB_CONFIG_1) | ||
5521 | |||
5513 | 5522 | ||
5514 | /* | 5523 | /* |
5515 | * txp_reg definition | 5524 | * txp_reg definition |