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-rw-r--r--drivers/net/skge.c6
-rw-r--r--drivers/net/skge.h8
2 files changed, 8 insertions, 6 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index f50405b4fba2..43a275d97107 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -1660,9 +1660,9 @@ static void yukon_init(struct skge_hw *hw, int port)
1660 1660
1661 /* Enable phy interrupt on autonegotiation complete (or link up) */ 1661 /* Enable phy interrupt on autonegotiation complete (or link up) */
1662 if (skge->autoneg == AUTONEG_ENABLE) 1662 if (skge->autoneg == AUTONEG_ENABLE)
1663 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); 1663 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_MSK);
1664 else 1664 else
1665 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); 1665 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK);
1666} 1666}
1667 1667
1668static void yukon_reset(struct skge_hw *hw, int port) 1668static void yukon_reset(struct skge_hw *hw, int port)
@@ -1891,7 +1891,7 @@ static void yukon_link_up(struct skge_port *skge)
1891 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; 1891 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1892 gma_write16(hw, port, GM_GP_CTRL, reg); 1892 gma_write16(hw, port, GM_GP_CTRL, reg);
1893 1893
1894 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); 1894 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK);
1895 skge_link_up(skge); 1895 skge_link_up(skge);
1896} 1896}
1897 1897
diff --git a/drivers/net/skge.h b/drivers/net/skge.h
index e2546950bf55..c37214692c07 100644
--- a/drivers/net/skge.h
+++ b/drivers/net/skge.h
@@ -1449,10 +1449,12 @@ enum {
1449 PHY_M_IS_DTE_CHANGE = 1<<2, /* DTE Power Det. Status Changed */ 1449 PHY_M_IS_DTE_CHANGE = 1<<2, /* DTE Power Det. Status Changed */
1450 PHY_M_IS_POL_CHANGE = 1<<1, /* Polarity Changed */ 1450 PHY_M_IS_POL_CHANGE = 1<<1, /* Polarity Changed */
1451 PHY_M_IS_JABBER = 1<<0, /* Jabber */ 1451 PHY_M_IS_JABBER = 1<<0, /* Jabber */
1452};
1453 1452
1454#define PHY_M_DEF_MSK ( PHY_M_IS_AN_ERROR | PHY_M_IS_LSP_CHANGE | \ 1453 PHY_M_IS_DEF_MSK = PHY_M_IS_AN_ERROR | PHY_M_IS_LSP_CHANGE |
1455 PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR) 1454 PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR,
1455
1456 PHY_M_IS_AN_MSK = PHY_M_IS_AN_ERROR | PHY_M_IS_AN_COMPL,
1457};
1456 1458
1457/***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/ 1459/***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/
1458enum { 1460enum {