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-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/boot/compressed/head.S3
-rw-r--r--arch/arm/configs/mp1000_defconfig897
-rw-r--r--arch/arm/kernel/module.c1
-rw-r--r--arch/arm/kernel/traps.c4
-rw-r--r--arch/arm/lib/Makefile2
-rw-r--r--arch/arm/lib/sha1.S206
-rw-r--r--arch/arm/mach-aaec2000/Makefile2
-rw-r--r--arch/arm/mach-aaec2000/aaed2000.c50
-rw-r--r--arch/arm/mach-aaec2000/clock.c110
-rw-r--r--arch/arm/mach-aaec2000/clock.h23
-rw-r--r--arch/arm/mach-aaec2000/core.c135
-rw-r--r--arch/arm/mach-aaec2000/core.h11
-rw-r--r--arch/arm/mach-clps711x/Kconfig11
-rw-r--r--arch/arm/mach-clps711x/Makefile1
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c12
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c7
-rw-r--r--arch/arm/mach-clps711x/ceiva.c12
-rw-r--r--arch/arm/mach-clps711x/edb7211-mm.c30
-rw-r--r--arch/arm/mach-clps711x/mm.c8
-rw-r--r--arch/arm/mach-clps711x/mp1000-mach.c49
-rw-r--r--arch/arm/mach-clps711x/mp1000-mm.c47
-rw-r--r--arch/arm/mach-clps711x/mp1000-seprom.c195
-rw-r--r--arch/arm/mach-clps711x/p720t.c14
-rw-r--r--arch/arm/mach-clps7500/core.c25
-rw-r--r--arch/arm/mach-ebsa110/core.c38
-rw-r--r--arch/arm/mach-ebsa110/io.c1
-rw-r--r--arch/arm/mach-epxa10db/mm.c37
-rw-r--r--arch/arm/mach-footbridge/common.c57
-rw-r--r--arch/arm/mach-h720x/common.c7
-rw-r--r--arch/arm/mach-imx/generic.c8
-rw-r--r--arch/arm/mach-imx/mx1ads.c38
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c79
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c67
-rw-r--r--arch/arm/mach-iop3xx/iop321-setup.c18
-rw-r--r--arch/arm/mach-iop3xx/iop331-setup.c18
-rw-r--r--arch/arm/mach-iop3xx/iq31244-mm.c10
-rw-r--r--arch/arm/mach-iop3xx/iq80321-mm.c10
-rw-r--r--arch/arm/mach-ixp2000/core.c16
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c8
-rw-r--r--arch/arm/mach-lh7a40x/arch-kev7a400.c13
-rw-r--r--arch/arm/mach-lh7a40x/arch-lpd7a40x.c86
-rw-r--r--arch/arm/mach-omap1/board-innovator.c8
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c8
-rw-r--r--arch/arm/mach-omap1/io.c46
-rw-r--r--arch/arm/mach-pxa/generic.c82
-rw-r--r--arch/arm/mach-pxa/idp.c21
-rw-r--r--arch/arm/mach-pxa/lubbock.c27
-rw-r--r--arch/arm/mach-pxa/mainstone.c32
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c2
-rw-r--r--arch/arm/mach-pxa/sleep.S7
-rw-r--r--arch/arm/mach-pxa/standby.S2
-rw-r--r--arch/arm/mach-rpc/riscpc.c19
-rw-r--r--arch/arm/mach-s3c2410/cpu.h2
-rw-r--r--arch/arm/mach-s3c2410/devs.c36
-rw-r--r--arch/arm/mach-s3c2410/gpio.c22
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c40
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c3
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2440.c70
-rw-r--r--arch/arm/mach-sa1100/assabet.c14
-rw-r--r--arch/arm/mach-sa1100/badge4.c20
-rw-r--r--arch/arm/mach-sa1100/cerf.c8
-rw-r--r--arch/arm/mach-sa1100/collie.c14
-rw-r--r--arch/arm/mach-sa1100/generic.c26
-rw-r--r--arch/arm/mach-sa1100/h3600.c20
-rw-r--r--arch/arm/mach-sa1100/hackkit.c8
-rw-r--r--arch/arm/mach-sa1100/jornada720.c20
-rw-r--r--arch/arm/mach-sa1100/lart.c14
-rw-r--r--arch/arm/mach-sa1100/neponset.c14
-rw-r--r--arch/arm/mach-sa1100/simpad.c16
-rw-r--r--arch/arm/mach-shark/core.c7
-rw-r--r--arch/arm/mach-versatile/core.c83
-rw-r--r--arch/arm/mm/init.c480
-rw-r--r--arch/arm/mm/ioremap.c1
-rw-r--r--arch/arm/mm/mm-armv.c172
-rw-r--r--arch/arm/oprofile/Makefile4
-rw-r--r--arch/arm/oprofile/common.c185
-rw-r--r--arch/arm/oprofile/init.c33
-rw-r--r--arch/arm/oprofile/op_arm_model.h4
-rw-r--r--arch/arm/plat-omap/sram.c6
-rw-r--r--drivers/char/nvram.c110
-rw-r--r--drivers/mmc/mmci.c1
-rw-r--r--drivers/mtd/maps/sa1100-flash.c1
-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/arm/am79c961a.c1
-rw-r--r--drivers/net/cs89x0.c14
-rw-r--r--drivers/net/cs89x0.h2
-rw-r--r--drivers/net/irda/Kconfig10
-rw-r--r--drivers/net/irda/Makefile1
-rw-r--r--drivers/net/irda/pxaficp_ir.c871
-rw-r--r--drivers/pcmcia/sa1111_generic.c2
-rw-r--r--drivers/serial/amba-pl010.c1
-rw-r--r--drivers/serial/amba-pl011.c1
-rw-r--r--drivers/serial/clps711x.c9
-rw-r--r--drivers/serial/pxa.c21
-rw-r--r--drivers/usb/gadget/pxa2xx_udc.c2
-rw-r--r--drivers/usb/gadget/pxa2xx_udc.h8
-rw-r--r--drivers/video/amba-clcd.c1
-rw-r--r--include/asm-arm/arch-aaec2000/aaec2000.h56
-rw-r--r--include/asm-arm/arch-aaec2000/aaed2000.h40
-rw-r--r--include/asm-arm/arch-aaec2000/hardware.h3
-rw-r--r--include/asm-arm/arch-aaec2000/io.h2
-rw-r--r--include/asm-arm/arch-cl7500/io.h2
-rw-r--r--include/asm-arm/arch-clps711x/hardware.h117
-rw-r--r--include/asm-arm/arch-clps711x/io.h2
-rw-r--r--include/asm-arm/arch-clps711x/mp1000-seprom.h77
-rw-r--r--include/asm-arm/arch-ebsa285/io.h2
-rw-r--r--include/asm-arm/arch-epxa10db/io.h2
-rw-r--r--include/asm-arm/arch-h720x/io.h2
-rw-r--r--include/asm-arm/arch-imx/io.h2
-rw-r--r--include/asm-arm/arch-integrator/hardware.h9
-rw-r--r--include/asm-arm/arch-integrator/io.h8
-rw-r--r--include/asm-arm/arch-iop3xx/io.h2
-rw-r--r--include/asm-arm/arch-ixp2000/io.h2
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h43
-rw-r--r--include/asm-arm/arch-l7200/io.h2
-rw-r--r--include/asm-arm/arch-lh7a40x/io.h2
-rw-r--r--include/asm-arm/arch-omap/io.h2
-rw-r--r--include/asm-arm/arch-pxa/hardware.h4
-rw-r--r--include/asm-arm/arch-pxa/io.h2
-rw-r--r--include/asm-arm/arch-pxa/irda.h17
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h42
-rw-r--r--include/asm-arm/arch-pxa/uncompress.h1
-rw-r--r--include/asm-arm/arch-rpc/io.h2
-rw-r--r--include/asm-arm/arch-s3c2410/fb.h3
-rw-r--r--include/asm-arm/arch-s3c2410/io.h2
-rw-r--r--include/asm-arm/arch-s3c2410/regs-gpio.h6
-rw-r--r--include/asm-arm/arch-sa1100/hardware.h7
-rw-r--r--include/asm-arm/arch-sa1100/io.h8
-rw-r--r--include/asm-arm/arch-sa1100/system.h1
-rw-r--r--include/asm-arm/arch-shark/io.h2
-rw-r--r--include/asm-arm/io.h1
-rw-r--r--include/asm-arm/mach/arch.h6
-rw-r--r--include/asm-arm/mach/map.h5
-rw-r--r--sound/arm/aaci.c1
138 files changed, 4715 insertions, 782 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 11fff042aa81..682367bd0f65 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -204,6 +204,7 @@ config ARCH_H720X
204 204
205config ARCH_AAEC2000 205config ARCH_AAEC2000
206 bool "Agilent AAEC-2000 based" 206 bool "Agilent AAEC-2000 based"
207 select ARM_AMBA
207 help 208 help
208 This enables support for systems based on the Agilent AAEC-2000 209 This enables support for systems based on the Agilent AAEC-2000
209 210
@@ -687,7 +688,8 @@ source "drivers/acorn/block/Kconfig"
687 688
688if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \ 689if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \
689 || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \ 690 || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \
690 || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE 691 || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \
692 || MACH_MP1000
691source "drivers/ide/Kconfig" 693source "drivers/ide/Kconfig"
692endif 694endif
693 695
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 7c7f475e213e..a54d2eb64892 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -39,7 +39,8 @@
39 defined(CONFIG_ARCH_IXP4XX) || \ 39 defined(CONFIG_ARCH_IXP4XX) || \
40 defined(CONFIG_ARCH_IXP2000) || \ 40 defined(CONFIG_ARCH_IXP2000) || \
41 defined(CONFIG_ARCH_LH7A40X) || \ 41 defined(CONFIG_ARCH_LH7A40X) || \
42 defined(CONFIG_ARCH_OMAP) 42 defined(CONFIG_ARCH_OMAP) || \
43 defined(CONFIG_MACH_MP1000)
43 .macro loadsp, rb 44 .macro loadsp, rb
44 addruart \rb 45 addruart \rb
45 .endm 46 .endm
diff --git a/arch/arm/configs/mp1000_defconfig b/arch/arm/configs/mp1000_defconfig
new file mode 100644
index 000000000000..d2cbc6fada1d
--- /dev/null
+++ b/arch/arm/configs/mp1000_defconfig
@@ -0,0 +1,897 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc1
4# Fri Sep 16 15:48:13 2005
5#
6CONFIG_ARM=y
7CONFIG_MMU=y
8CONFIG_UID16=y
9CONFIG_RWSEM_GENERIC_SPINLOCK=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y
11
12#
13# Code maturity level options
14#
15CONFIG_EXPERIMENTAL=y
16# CONFIG_CLEAN_COMPILE is not set
17CONFIG_BROKEN=y
18CONFIG_BROKEN_ON_SMP=y
19CONFIG_LOCK_KERNEL=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y
27CONFIG_SWAP=y
28CONFIG_SYSVIPC=y
29# CONFIG_POSIX_MQUEUE is not set
30# CONFIG_BSD_PROCESS_ACCT is not set
31CONFIG_SYSCTL=y
32# CONFIG_AUDIT is not set
33# CONFIG_HOTPLUG is not set
34CONFIG_KOBJECT_UEVENT=y
35CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y
37CONFIG_INITRAMFS_SOURCE=""
38CONFIG_EMBEDDED=y
39CONFIG_KALLSYMS=y
40# CONFIG_KALLSYMS_ALL is not set
41# CONFIG_KALLSYMS_EXTRA_PASS is not set
42CONFIG_PRINTK=y
43CONFIG_BUG=y
44CONFIG_BASE_FULL=y
45CONFIG_FUTEX=y
46CONFIG_EPOLL=y
47CONFIG_CC_OPTIMIZE_FOR_SIZE=y
48CONFIG_SHMEM=y
49CONFIG_CC_ALIGN_FUNCTIONS=0
50CONFIG_CC_ALIGN_LABELS=0
51CONFIG_CC_ALIGN_LOOPS=0
52CONFIG_CC_ALIGN_JUMPS=0
53# CONFIG_TINY_SHMEM is not set
54CONFIG_BASE_SMALL=0
55
56#
57# Loadable module support
58#
59CONFIG_MODULES=y
60CONFIG_MODULE_UNLOAD=y
61# CONFIG_MODULE_FORCE_UNLOAD is not set
62CONFIG_OBSOLETE_MODPARM=y
63# CONFIG_MODVERSIONS is not set
64# CONFIG_MODULE_SRCVERSION_ALL is not set
65CONFIG_KMOD=y
66
67#
68# System Type
69#
70# CONFIG_ARCH_CLPS7500 is not set
71CONFIG_ARCH_CLPS711X=y
72# CONFIG_ARCH_CO285 is not set
73# CONFIG_ARCH_EBSA110 is not set
74# CONFIG_ARCH_CAMELOT is not set
75# CONFIG_ARCH_FOOTBRIDGE is not set
76# CONFIG_ARCH_INTEGRATOR is not set
77# CONFIG_ARCH_IOP3XX is not set
78# CONFIG_ARCH_IXP4XX is not set
79# CONFIG_ARCH_IXP2000 is not set
80# CONFIG_ARCH_L7200 is not set
81# CONFIG_ARCH_PXA is not set
82# CONFIG_ARCH_RPC is not set
83# CONFIG_ARCH_SA1100 is not set
84# CONFIG_ARCH_S3C2410 is not set
85# CONFIG_ARCH_SHARK is not set
86# CONFIG_ARCH_LH7A40X is not set
87# CONFIG_ARCH_OMAP is not set
88# CONFIG_ARCH_VERSATILE is not set
89# CONFIG_ARCH_IMX is not set
90# CONFIG_ARCH_H720X is not set
91# CONFIG_ARCH_AAEC2000 is not set
92
93#
94# CLPS711X/EP721X Implementations
95#
96# CONFIG_ARCH_AUTCPU12 is not set
97# CONFIG_ARCH_CDB89712 is not set
98# CONFIG_ARCH_CEIVA is not set
99# CONFIG_ARCH_CLEP7312 is not set
100# CONFIG_ARCH_EDB7211 is not set
101# CONFIG_ARCH_P720T is not set
102# CONFIG_ARCH_FORTUNET is not set
103CONFIG_MACH_MP1000=y
104CONFIG_MP1000_90MHZ=y
105
106#
107# Processor Type
108#
109CONFIG_CPU_32=y
110CONFIG_CPU_ARM720T=y
111CONFIG_CPU_32v4=y
112CONFIG_CPU_ABRT_LV4T=y
113CONFIG_CPU_CACHE_V4=y
114CONFIG_CPU_CACHE_VIVT=y
115CONFIG_CPU_COPY_V4WT=y
116CONFIG_CPU_TLB_V4WT=y
117
118#
119# Processor Features
120#
121CONFIG_ARM_THUMB=y
122
123#
124# Bus support
125#
126CONFIG_ISA_DMA_API=y
127
128#
129# PCCARD (PCMCIA/CardBus) support
130#
131# CONFIG_PCCARD is not set
132
133#
134# Kernel Features
135#
136# CONFIG_SMP is not set
137CONFIG_PREEMPT=y
138# CONFIG_NO_IDLE_HZ is not set
139# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
140CONFIG_SELECT_MEMORY_MODEL=y
141CONFIG_FLATMEM_MANUAL=y
142# CONFIG_DISCONTIGMEM_MANUAL is not set
143# CONFIG_SPARSEMEM_MANUAL is not set
144CONFIG_FLATMEM=y
145CONFIG_FLAT_NODE_MEM_MAP=y
146# CONFIG_SPARSEMEM_STATIC is not set
147CONFIG_ALIGNMENT_TRAP=y
148
149#
150# Boot options
151#
152CONFIG_ZBOOT_ROM_TEXT=0x0
153CONFIG_ZBOOT_ROM_BSS=0x0
154CONFIG_CMDLINE="console=ttyCL,38400 root=/dev/discs/disc0/part1 ip=any cs89x0_media=rj45"
155# CONFIG_XIP_KERNEL is not set
156
157#
158# Floating point emulation
159#
160
161#
162# At least one emulation must be selected
163#
164CONFIG_FPE_NWFPE=y
165# CONFIG_FPE_NWFPE_XP is not set
166# CONFIG_FPE_FASTFPE is not set
167
168#
169# Userspace binary formats
170#
171CONFIG_BINFMT_ELF=y
172# CONFIG_BINFMT_AOUT is not set
173CONFIG_BINFMT_MISC=y
174# CONFIG_ARTHUR is not set
175
176#
177# Power management options
178#
179# CONFIG_PM is not set
180
181#
182# Networking
183#
184CONFIG_NET=y
185
186#
187# Networking options
188#
189CONFIG_PACKET=y
190# CONFIG_PACKET_MMAP is not set
191CONFIG_UNIX=y
192# CONFIG_NET_KEY is not set
193CONFIG_INET=y
194# CONFIG_IP_MULTICAST is not set
195# CONFIG_IP_ADVANCED_ROUTER is not set
196CONFIG_IP_FIB_HASH=y
197CONFIG_IP_PNP=y
198CONFIG_IP_PNP_DHCP=y
199CONFIG_IP_PNP_BOOTP=y
200CONFIG_IP_PNP_RARP=y
201# CONFIG_NET_IPIP is not set
202# CONFIG_NET_IPGRE is not set
203# CONFIG_ARPD is not set
204# CONFIG_SYN_COOKIES is not set
205# CONFIG_INET_AH is not set
206# CONFIG_INET_ESP is not set
207# CONFIG_INET_IPCOMP is not set
208# CONFIG_INET_TUNNEL is not set
209CONFIG_INET_DIAG=y
210CONFIG_INET_TCP_DIAG=y
211# CONFIG_TCP_CONG_ADVANCED is not set
212CONFIG_TCP_CONG_BIC=y
213CONFIG_IPV6=y
214# CONFIG_IPV6_PRIVACY is not set
215# CONFIG_INET6_AH is not set
216# CONFIG_INET6_ESP is not set
217# CONFIG_INET6_IPCOMP is not set
218# CONFIG_INET6_TUNNEL is not set
219# CONFIG_IPV6_TUNNEL is not set
220# CONFIG_NETFILTER is not set
221
222#
223# DCCP Configuration (EXPERIMENTAL)
224#
225# CONFIG_IP_DCCP is not set
226
227#
228# SCTP Configuration (EXPERIMENTAL)
229#
230# CONFIG_IP_SCTP is not set
231# CONFIG_ATM is not set
232# CONFIG_BRIDGE is not set
233# CONFIG_VLAN_8021Q is not set
234# CONFIG_DECNET is not set
235# CONFIG_LLC2 is not set
236# CONFIG_IPX is not set
237# CONFIG_ATALK is not set
238# CONFIG_X25 is not set
239# CONFIG_LAPB is not set
240# CONFIG_NET_DIVERT is not set
241# CONFIG_ECONET is not set
242# CONFIG_WAN_ROUTER is not set
243# CONFIG_NET_SCHED is not set
244# CONFIG_NET_CLS_ROUTE is not set
245
246#
247# Network testing
248#
249# CONFIG_NET_PKTGEN is not set
250# CONFIG_NETFILTER_NETLINK is not set
251# CONFIG_HAMRADIO is not set
252# CONFIG_IRDA is not set
253# CONFIG_BT is not set
254# CONFIG_IEEE80211 is not set
255
256#
257# Device Drivers
258#
259
260#
261# Generic Driver Options
262#
263CONFIG_STANDALONE=y
264CONFIG_PREVENT_FIRMWARE_BUILD=y
265# CONFIG_FW_LOADER is not set
266# CONFIG_DEBUG_DRIVER is not set
267
268#
269# Memory Technology Devices (MTD)
270#
271CONFIG_MTD=y
272CONFIG_MTD_DEBUG=y
273CONFIG_MTD_DEBUG_VERBOSE=3
274# CONFIG_MTD_CONCAT is not set
275CONFIG_MTD_PARTITIONS=y
276CONFIG_MTD_REDBOOT_PARTS=m
277CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
278CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
279# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
280CONFIG_MTD_CMDLINE_PARTS=y
281# CONFIG_MTD_AFS_PARTS is not set
282
283#
284# User Modules And Translation Layers
285#
286CONFIG_MTD_CHAR=y
287CONFIG_MTD_BLOCK=y
288# CONFIG_FTL is not set
289# CONFIG_NFTL is not set
290# CONFIG_INFTL is not set
291
292#
293# RAM/ROM/Flash chip drivers
294#
295CONFIG_MTD_CFI=m
296# CONFIG_MTD_JEDECPROBE is not set
297CONFIG_MTD_GEN_PROBE=m
298CONFIG_MTD_CFI_ADV_OPTIONS=y
299CONFIG_MTD_CFI_NOSWAP=y
300# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
301# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
302CONFIG_MTD_CFI_GEOMETRY=y
303# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
304# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
305CONFIG_MTD_MAP_BANK_WIDTH_4=y
306# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
307# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
308# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
309# CONFIG_MTD_CFI_I1 is not set
310CONFIG_MTD_CFI_I2=y
311# CONFIG_MTD_CFI_I4 is not set
312# CONFIG_MTD_CFI_I8 is not set
313# CONFIG_MTD_OTP is not set
314CONFIG_MTD_CFI_INTELEXT=m
315# CONFIG_MTD_CFI_AMDSTD is not set
316# CONFIG_MTD_CFI_STAA is not set
317CONFIG_MTD_CFI_UTIL=m
318# CONFIG_MTD_RAM is not set
319# CONFIG_MTD_ROM is not set
320# CONFIG_MTD_ABSENT is not set
321# CONFIG_MTD_OBSOLETE_CHIPS is not set
322# CONFIG_MTD_XIP is not set
323
324#
325# Mapping drivers for chip access
326#
327# CONFIG_MTD_COMPLEX_MAPPINGS is not set
328CONFIG_MTD_PHYSMAP=m
329CONFIG_MTD_PHYSMAP_START=0x0000000
330CONFIG_MTD_PHYSMAP_LEN=0x4000000
331CONFIG_MTD_PHYSMAP_BANKWIDTH=2
332# CONFIG_MTD_ARM_INTEGRATOR is not set
333CONFIG_MTD_EDB7312=m
334# CONFIG_MTD_PLATRAM is not set
335
336#
337# Self-contained MTD device drivers
338#
339# CONFIG_MTD_SLRAM is not set
340# CONFIG_MTD_PHRAM is not set
341# CONFIG_MTD_MTDRAM is not set
342# CONFIG_MTD_BLKMTD is not set
343# CONFIG_MTD_BLOCK2MTD is not set
344
345#
346# Disk-On-Chip Device Drivers
347#
348# CONFIG_MTD_DOC2000 is not set
349# CONFIG_MTD_DOC2001 is not set
350# CONFIG_MTD_DOC2001PLUS is not set
351
352#
353# NAND Flash Device Drivers
354#
355CONFIG_MTD_NAND=y
356# CONFIG_MTD_NAND_VERIFY_WRITE is not set
357CONFIG_MTD_NAND_MP1000=y
358CONFIG_MTD_NAND_IDS=y
359# CONFIG_MTD_NAND_DISKONCHIP is not set
360# CONFIG_MTD_NAND_NANDSIM is not set
361
362#
363# Parallel port support
364#
365# CONFIG_PARPORT is not set
366
367#
368# Plug and Play support
369#
370
371#
372# Block devices
373#
374# CONFIG_BLK_DEV_COW_COMMON is not set
375CONFIG_BLK_DEV_LOOP=m
376# CONFIG_BLK_DEV_CRYPTOLOOP is not set
377# CONFIG_BLK_DEV_NBD is not set
378CONFIG_BLK_DEV_RAM=y
379CONFIG_BLK_DEV_RAM_COUNT=2
380CONFIG_BLK_DEV_RAM_SIZE=16384
381CONFIG_BLK_DEV_INITRD=y
382# CONFIG_CDROM_PKTCDVD is not set
383
384#
385# IO Schedulers
386#
387CONFIG_IOSCHED_NOOP=y
388CONFIG_IOSCHED_AS=y
389CONFIG_IOSCHED_DEADLINE=y
390CONFIG_IOSCHED_CFQ=y
391# CONFIG_ATA_OVER_ETH is not set
392
393#
394# ATA/ATAPI/MFM/RLL support
395#
396CONFIG_IDE=y
397CONFIG_BLK_DEV_IDE=y
398
399#
400# Please see Documentation/ide.txt for help/info on IDE drives
401#
402# CONFIG_BLK_DEV_IDE_SATA is not set
403# CONFIG_BLK_DEV_HD_IDE is not set
404CONFIG_BLK_DEV_IDEDISK=y
405# CONFIG_IDEDISK_MULTI_MODE is not set
406# CONFIG_BLK_DEV_IDECD is not set
407# CONFIG_BLK_DEV_IDETAPE is not set
408# CONFIG_BLK_DEV_IDEFLOPPY is not set
409# CONFIG_IDE_TASK_IOCTL is not set
410
411#
412# IDE chipset support/bugfixes
413#
414# CONFIG_IDE_GENERIC is not set
415CONFIG_IDE_ARM=y
416CONFIG_BLK_DEV_IDE_MP1000=y
417# CONFIG_BLK_DEV_IDEDMA is not set
418# CONFIG_IDEDMA_AUTO is not set
419# CONFIG_BLK_DEV_HD is not set
420
421#
422# SCSI device support
423#
424# CONFIG_RAID_ATTRS is not set
425# CONFIG_SCSI is not set
426
427#
428# Multi-device support (RAID and LVM)
429#
430CONFIG_MD=y
431# CONFIG_BLK_DEV_MD is not set
432CONFIG_BLK_DEV_DM=y
433# CONFIG_DM_CRYPT is not set
434# CONFIG_DM_SNAPSHOT is not set
435# CONFIG_DM_MIRROR is not set
436# CONFIG_DM_ZERO is not set
437# CONFIG_DM_MULTIPATH is not set
438
439#
440# Fusion MPT device support
441#
442# CONFIG_FUSION is not set
443
444#
445# IEEE 1394 (FireWire) support
446#
447# CONFIG_IEEE1394 is not set
448
449#
450# I2O device support
451#
452
453#
454# Network device support
455#
456CONFIG_NETDEVICES=y
457# CONFIG_DUMMY is not set
458# CONFIG_BONDING is not set
459# CONFIG_EQUALIZER is not set
460# CONFIG_TUN is not set
461
462#
463# PHY device support
464#
465# CONFIG_PHYLIB is not set
466
467#
468# Ethernet (10 or 100Mbit)
469#
470CONFIG_NET_ETHERNET=y
471# CONFIG_MII is not set
472# CONFIG_SMC91X is not set
473# CONFIG_DM9000 is not set
474CONFIG_CS89x0=y
475
476#
477# Ethernet (1000 Mbit)
478#
479
480#
481# Ethernet (10000 Mbit)
482#
483
484#
485# Token Ring devices
486#
487
488#
489# Wireless LAN (non-hamradio)
490#
491# CONFIG_NET_RADIO is not set
492
493#
494# Wan interfaces
495#
496# CONFIG_WAN is not set
497# CONFIG_PPP is not set
498# CONFIG_SLIP is not set
499# CONFIG_SHAPER is not set
500# CONFIG_NETCONSOLE is not set
501# CONFIG_NETPOLL is not set
502# CONFIG_NET_POLL_CONTROLLER is not set
503
504#
505# ISDN subsystem
506#
507# CONFIG_ISDN is not set
508
509#
510# Input device support
511#
512CONFIG_INPUT=y
513
514#
515# Userland interfaces
516#
517# CONFIG_INPUT_MOUSEDEV is not set
518# CONFIG_INPUT_JOYDEV is not set
519# CONFIG_INPUT_TSDEV is not set
520# CONFIG_INPUT_EVDEV is not set
521CONFIG_INPUT_EVBUG=y
522
523#
524# Input Device Drivers
525#
526# CONFIG_INPUT_KEYBOARD is not set
527# CONFIG_INPUT_MOUSE is not set
528# CONFIG_INPUT_JOYSTICK is not set
529# CONFIG_INPUT_TOUCHSCREEN is not set
530# CONFIG_INPUT_MISC is not set
531
532#
533# Hardware I/O ports
534#
535CONFIG_SERIO=y
536CONFIG_SERIO_SERPORT=y
537# CONFIG_SERIO_LIBPS2 is not set
538# CONFIG_SERIO_RAW is not set
539# CONFIG_GAMEPORT is not set
540
541#
542# Character devices
543#
544CONFIG_VT=y
545CONFIG_VT_CONSOLE=y
546CONFIG_HW_CONSOLE=y
547# CONFIG_SERIAL_NONSTANDARD is not set
548
549#
550# Serial drivers
551#
552CONFIG_SERIAL_8250=y
553CONFIG_SERIAL_8250_CONSOLE=y
554CONFIG_SERIAL_8250_NR_UARTS=2
555# CONFIG_SERIAL_8250_EXTENDED is not set
556
557#
558# Non-8250 serial port support
559#
560CONFIG_SERIAL_CLPS711X=y
561CONFIG_SERIAL_CLPS711X_CONSOLE=y
562CONFIG_SERIAL_CORE=y
563CONFIG_SERIAL_CORE_CONSOLE=y
564CONFIG_UNIX98_PTYS=y
565CONFIG_LEGACY_PTYS=y
566CONFIG_LEGACY_PTY_COUNT=256
567
568#
569# IPMI
570#
571# CONFIG_IPMI_HANDLER is not set
572
573#
574# Watchdog Cards
575#
576# CONFIG_WATCHDOG is not set
577CONFIG_NVRAM=y
578CONFIG_RTC=y
579# CONFIG_DTLK is not set
580# CONFIG_R3964 is not set
581
582#
583# Ftape, the floppy tape device driver
584#
585# CONFIG_RAW_DRIVER is not set
586
587#
588# TPM devices
589#
590
591#
592# I2C support
593#
594# CONFIG_I2C is not set
595
596#
597# Hardware Monitoring support
598#
599CONFIG_HWMON=y
600# CONFIG_HWMON_VID is not set
601# CONFIG_HWMON_DEBUG_CHIP is not set
602
603#
604# Misc devices
605#
606
607#
608# Multimedia Capabilities Port drivers
609#
610
611#
612# Multimedia devices
613#
614# CONFIG_VIDEO_DEV is not set
615
616#
617# Digital Video Broadcasting Devices
618#
619# CONFIG_DVB is not set
620
621#
622# Graphics support
623#
624# CONFIG_FB is not set
625
626#
627# Console display driver support
628#
629# CONFIG_VGA_CONSOLE is not set
630CONFIG_DUMMY_CONSOLE=y
631
632#
633# Sound
634#
635# CONFIG_SOUND is not set
636
637#
638# USB support
639#
640CONFIG_USB_ARCH_HAS_HCD=y
641# CONFIG_USB_ARCH_HAS_OHCI is not set
642# CONFIG_USB is not set
643
644#
645# USB Gadget Support
646#
647# CONFIG_USB_GADGET is not set
648
649#
650# MMC/SD Card support
651#
652# CONFIG_MMC is not set
653
654#
655# File systems
656#
657CONFIG_EXT2_FS=y
658CONFIG_EXT2_FS_XATTR=y
659# CONFIG_EXT2_FS_POSIX_ACL is not set
660# CONFIG_EXT2_FS_SECURITY is not set
661# CONFIG_EXT2_FS_XIP is not set
662CONFIG_EXT3_FS=y
663CONFIG_EXT3_FS_XATTR=y
664# CONFIG_EXT3_FS_POSIX_ACL is not set
665# CONFIG_EXT3_FS_SECURITY is not set
666CONFIG_JBD=y
667# CONFIG_JBD_DEBUG is not set
668CONFIG_FS_MBCACHE=y
669CONFIG_REISERFS_FS=m
670# CONFIG_REISERFS_CHECK is not set
671# CONFIG_REISERFS_PROC_INFO is not set
672# CONFIG_REISERFS_FS_XATTR is not set
673# CONFIG_JFS_FS is not set
674CONFIG_FS_POSIX_ACL=y
675# CONFIG_XFS_FS is not set
676# CONFIG_MINIX_FS is not set
677# CONFIG_ROMFS_FS is not set
678CONFIG_INOTIFY=y
679CONFIG_QUOTA=y
680# CONFIG_QFMT_V1 is not set
681# CONFIG_QFMT_V2 is not set
682CONFIG_QUOTACTL=y
683CONFIG_DNOTIFY=y
684# CONFIG_AUTOFS_FS is not set
685# CONFIG_AUTOFS4_FS is not set
686# CONFIG_FUSE_FS is not set
687
688#
689# CD-ROM/DVD Filesystems
690#
691# CONFIG_ISO9660_FS is not set
692# CONFIG_UDF_FS is not set
693
694#
695# DOS/FAT/NT Filesystems
696#
697# CONFIG_MSDOS_FS is not set
698# CONFIG_VFAT_FS is not set
699# CONFIG_NTFS_FS is not set
700
701#
702# Pseudo filesystems
703#
704CONFIG_PROC_FS=y
705CONFIG_SYSFS=y
706CONFIG_TMPFS=y
707# CONFIG_HUGETLBFS is not set
708# CONFIG_HUGETLB_PAGE is not set
709CONFIG_RAMFS=y
710# CONFIG_RELAYFS_FS is not set
711
712#
713# Miscellaneous filesystems
714#
715# CONFIG_ADFS_FS is not set
716# CONFIG_AFFS_FS is not set
717# CONFIG_HFS_FS is not set
718# CONFIG_HFSPLUS_FS is not set
719# CONFIG_BEFS_FS is not set
720# CONFIG_BFS_FS is not set
721# CONFIG_EFS_FS is not set
722# CONFIG_JFFS_FS is not set
723CONFIG_JFFS2_FS=m
724CONFIG_JFFS2_FS_DEBUG=0
725CONFIG_JFFS2_FS_WRITEBUFFER=y
726# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
727CONFIG_JFFS2_ZLIB=y
728CONFIG_JFFS2_RTIME=y
729# CONFIG_JFFS2_RUBIN is not set
730CONFIG_CRAMFS=m
731# CONFIG_VXFS_FS is not set
732# CONFIG_HPFS_FS is not set
733# CONFIG_QNX4FS_FS is not set
734# CONFIG_SYSV_FS is not set
735# CONFIG_UFS_FS is not set
736
737#
738# Network File Systems
739#
740CONFIG_NFS_FS=y
741CONFIG_NFS_V3=y
742# CONFIG_NFS_V3_ACL is not set
743CONFIG_NFS_V4=y
744# CONFIG_NFS_DIRECTIO is not set
745CONFIG_NFSD=y
746CONFIG_NFSD_V3=y
747# CONFIG_NFSD_V3_ACL is not set
748CONFIG_NFSD_V4=y
749CONFIG_NFSD_TCP=y
750CONFIG_ROOT_NFS=y
751CONFIG_LOCKD=y
752CONFIG_LOCKD_V4=y
753CONFIG_EXPORTFS=y
754CONFIG_NFS_COMMON=y
755CONFIG_SUNRPC=y
756CONFIG_SUNRPC_GSS=y
757CONFIG_RPCSEC_GSS_KRB5=y
758# CONFIG_RPCSEC_GSS_SPKM3 is not set
759CONFIG_SMB_FS=m
760# CONFIG_SMB_NLS_DEFAULT is not set
761CONFIG_CIFS=m
762# CONFIG_CIFS_STATS is not set
763# CONFIG_CIFS_XATTR is not set
764# CONFIG_CIFS_EXPERIMENTAL is not set
765# CONFIG_NCP_FS is not set
766# CONFIG_CODA_FS is not set
767# CONFIG_AFS_FS is not set
768# CONFIG_9P_FS is not set
769
770#
771# Partition Types
772#
773# CONFIG_PARTITION_ADVANCED is not set
774CONFIG_MSDOS_PARTITION=y
775
776#
777# Native Language Support
778#
779CONFIG_NLS=y
780CONFIG_NLS_DEFAULT="iso8859-1"
781CONFIG_NLS_CODEPAGE_437=y
782# CONFIG_NLS_CODEPAGE_737 is not set
783# CONFIG_NLS_CODEPAGE_775 is not set
784# CONFIG_NLS_CODEPAGE_850 is not set
785# CONFIG_NLS_CODEPAGE_852 is not set
786# CONFIG_NLS_CODEPAGE_855 is not set
787# CONFIG_NLS_CODEPAGE_857 is not set
788# CONFIG_NLS_CODEPAGE_860 is not set
789# CONFIG_NLS_CODEPAGE_861 is not set
790# CONFIG_NLS_CODEPAGE_862 is not set
791# CONFIG_NLS_CODEPAGE_863 is not set
792# CONFIG_NLS_CODEPAGE_864 is not set
793# CONFIG_NLS_CODEPAGE_865 is not set
794# CONFIG_NLS_CODEPAGE_866 is not set
795# CONFIG_NLS_CODEPAGE_869 is not set
796# CONFIG_NLS_CODEPAGE_936 is not set
797# CONFIG_NLS_CODEPAGE_950 is not set
798# CONFIG_NLS_CODEPAGE_932 is not set
799# CONFIG_NLS_CODEPAGE_949 is not set
800# CONFIG_NLS_CODEPAGE_874 is not set
801# CONFIG_NLS_ISO8859_8 is not set
802# CONFIG_NLS_CODEPAGE_1250 is not set
803# CONFIG_NLS_CODEPAGE_1251 is not set
804# CONFIG_NLS_ASCII is not set
805# CONFIG_NLS_ISO8859_1 is not set
806# CONFIG_NLS_ISO8859_2 is not set
807# CONFIG_NLS_ISO8859_3 is not set
808# CONFIG_NLS_ISO8859_4 is not set
809# CONFIG_NLS_ISO8859_5 is not set
810# CONFIG_NLS_ISO8859_6 is not set
811# CONFIG_NLS_ISO8859_7 is not set
812# CONFIG_NLS_ISO8859_9 is not set
813# CONFIG_NLS_ISO8859_13 is not set
814# CONFIG_NLS_ISO8859_14 is not set
815# CONFIG_NLS_ISO8859_15 is not set
816# CONFIG_NLS_KOI8_R is not set
817# CONFIG_NLS_KOI8_U is not set
818# CONFIG_NLS_UTF8 is not set
819
820#
821# Profiling support
822#
823# CONFIG_PROFILING is not set
824
825#
826# Kernel hacking
827#
828CONFIG_PRINTK_TIME=y
829CONFIG_DEBUG_KERNEL=y
830# CONFIG_MAGIC_SYSRQ is not set
831CONFIG_LOG_BUF_SHIFT=14
832CONFIG_DETECT_SOFTLOCKUP=y
833# CONFIG_SCHEDSTATS is not set
834# CONFIG_DEBUG_SLAB is not set
835CONFIG_DEBUG_PREEMPT=y
836# CONFIG_DEBUG_SPINLOCK is not set
837# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
838# CONFIG_DEBUG_KOBJECT is not set
839# CONFIG_DEBUG_BUGVERBOSE is not set
840CONFIG_DEBUG_INFO=y
841# CONFIG_DEBUG_FS is not set
842CONFIG_FRAME_POINTER=y
843CONFIG_DEBUG_USER=y
844CONFIG_DEBUG_WAITQ=y
845CONFIG_DEBUG_ERRORS=y
846CONFIG_DEBUG_LL=y
847# CONFIG_DEBUG_ICEDCC is not set
848# CONFIG_DEBUG_CLPS711X_UART2 is not set
849
850#
851# Security options
852#
853# CONFIG_KEYS is not set
854# CONFIG_SECURITY is not set
855
856#
857# Cryptographic options
858#
859CONFIG_CRYPTO=y
860# CONFIG_CRYPTO_HMAC is not set
861# CONFIG_CRYPTO_NULL is not set
862# CONFIG_CRYPTO_MD4 is not set
863CONFIG_CRYPTO_MD5=y
864# CONFIG_CRYPTO_SHA1 is not set
865# CONFIG_CRYPTO_SHA256 is not set
866# CONFIG_CRYPTO_SHA512 is not set
867# CONFIG_CRYPTO_WP512 is not set
868# CONFIG_CRYPTO_TGR192 is not set
869CONFIG_CRYPTO_DES=y
870# CONFIG_CRYPTO_BLOWFISH is not set
871# CONFIG_CRYPTO_TWOFISH is not set
872# CONFIG_CRYPTO_SERPENT is not set
873# CONFIG_CRYPTO_AES is not set
874# CONFIG_CRYPTO_CAST5 is not set
875# CONFIG_CRYPTO_CAST6 is not set
876# CONFIG_CRYPTO_TEA is not set
877# CONFIG_CRYPTO_ARC4 is not set
878# CONFIG_CRYPTO_KHAZAD is not set
879# CONFIG_CRYPTO_ANUBIS is not set
880# CONFIG_CRYPTO_DEFLATE is not set
881# CONFIG_CRYPTO_MICHAEL_MIC is not set
882# CONFIG_CRYPTO_CRC32C is not set
883# CONFIG_CRYPTO_TEST is not set
884
885#
886# Hardware crypto devices
887#
888
889#
890# Library routines
891#
892# CONFIG_CRC_CCITT is not set
893# CONFIG_CRC16 is not set
894CONFIG_CRC32=y
895# CONFIG_LIBCRC32C is not set
896CONFIG_ZLIB_INFLATE=m
897CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 1a85cfdad5ac..6055e1427ba3 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -11,6 +11,7 @@
11 */ 11 */
12#include <linux/config.h> 12#include <linux/config.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/moduleloader.h>
14#include <linux/kernel.h> 15#include <linux/kernel.h>
15#include <linux/elf.h> 16#include <linux/elf.h>
16#include <linux/vmalloc.h> 17#include <linux/vmalloc.h>
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f6de76e0a45d..baa09601a64e 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -345,7 +345,9 @@ static int bad_syscall(int n, struct pt_regs *regs)
345 struct thread_info *thread = current_thread_info(); 345 struct thread_info *thread = current_thread_info();
346 siginfo_t info; 346 siginfo_t info;
347 347
348 if (current->personality != PER_LINUX && thread->exec_domain->handler) { 348 if (current->personality != PER_LINUX &&
349 current->personality != PER_LINUX_32BIT &&
350 thread->exec_domain->handler) {
349 thread->exec_domain->handler(n, regs); 351 thread->exec_domain->handler(n, regs);
350 return regs->ARM_r0; 352 return regs->ARM_r0;
351 } 353 }
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 8725d63e4219..71e5b99e519e 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -11,7 +11,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
11 strnlen_user.o strchr.o strrchr.o testchangebit.o \ 11 strnlen_user.o strchr.o strrchr.o testchangebit.o \
12 testclearbit.o testsetbit.o uaccess.o getuser.o \ 12 testclearbit.o testsetbit.o uaccess.o getuser.o \
13 putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 13 putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
14 ucmpdi2.o lib1funcs.o div64.o \ 14 ucmpdi2.o lib1funcs.o div64.o sha1.o \
15 io-readsb.o io-writesb.o io-readsl.o io-writesl.o 15 io-readsb.o io-writesb.o io-readsl.o io-writesl.o
16 16
17ifeq ($(CONFIG_CPU_32v3),y) 17ifeq ($(CONFIG_CPU_32v3),y)
diff --git a/arch/arm/lib/sha1.S b/arch/arm/lib/sha1.S
new file mode 100644
index 000000000000..ff6ece487ffc
--- /dev/null
+++ b/arch/arm/lib/sha1.S
@@ -0,0 +1,206 @@
1/*
2 * linux/arch/arm/lib/sha1.S
3 *
4 * SHA transform optimized for ARM
5 *
6 * Copyright: (C) 2005 by Nicolas Pitre <nico@cam.org>
7 * Created: September 17, 2005
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * The reference implementation for this code is linux/lib/sha1.c
14 */
15
16#include <linux/linkage.h>
17
18 .text
19
20
21/*
22 * void sha_transform(__u32 *digest, const char *in, __u32 *W)
23 *
24 * Note: the "in" ptr may be unaligned.
25 */
26
27ENTRY(sha_transform)
28
29 stmfd sp!, {r4 - r8, lr}
30
31 @ for (i = 0; i < 16; i++)
32 @ W[i] = be32_to_cpu(in[i]); */
33
34#ifdef __ARMEB__
35 mov r4, r0
36 mov r0, r2
37 mov r2, #64
38 bl memcpy
39 mov r2, r0
40 mov r0, r4
41#else
42 mov r3, r2
43 mov lr, #16
441: ldrb r4, [r1], #1
45 ldrb r5, [r1], #1
46 ldrb r6, [r1], #1
47 ldrb r7, [r1], #1
48 subs lr, lr, #1
49 orr r5, r5, r4, lsl #8
50 orr r6, r6, r5, lsl #8
51 orr r7, r7, r6, lsl #8
52 str r7, [r3], #4
53 bne 1b
54#endif
55
56 @ for (i = 0; i < 64; i++)
57 @ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31);
58
59 sub r3, r2, #4
60 mov lr, #64
612: ldr r4, [r3, #4]!
62 subs lr, lr, #1
63 ldr r5, [r3, #8]
64 ldr r6, [r3, #32]
65 ldr r7, [r3, #52]
66 eor r4, r4, r5
67 eor r4, r4, r6
68 eor r4, r4, r7
69 mov r4, r4, ror #31
70 str r4, [r3, #64]
71 bne 2b
72
73 /*
74 * The SHA functions are:
75 *
76 * f1(B,C,D) = (D ^ (B & (C ^ D)))
77 * f2(B,C,D) = (B ^ C ^ D)
78 * f3(B,C,D) = ((B & C) | (D & (B | C)))
79 *
80 * Then the sub-blocks are processed as follows:
81 *
82 * A' = ror(A, 27) + f(B,C,D) + E + K + *W++
83 * B' = A
84 * C' = ror(B, 2)
85 * D' = C
86 * E' = D
87 *
88 * We therefore unroll each loop 5 times to avoid register shuffling.
89 * Also the ror for C (and also D and E which are successivelyderived
90 * from it) is applied in place to cut on an additional mov insn for
91 * each round.
92 */
93
94 .macro sha_f1, A, B, C, D, E
95 ldr r3, [r2], #4
96 eor ip, \C, \D
97 add \E, r1, \E, ror #2
98 and ip, \B, ip, ror #2
99 add \E, \E, \A, ror #27
100 eor ip, ip, \D, ror #2
101 add \E, \E, r3
102 add \E, \E, ip
103 .endm
104
105 .macro sha_f2, A, B, C, D, E
106 ldr r3, [r2], #4
107 add \E, r1, \E, ror #2
108 eor ip, \B, \C, ror #2
109 add \E, \E, \A, ror #27
110 eor ip, ip, \D, ror #2
111 add \E, \E, r3
112 add \E, \E, ip
113 .endm
114
115 .macro sha_f3, A, B, C, D, E
116 ldr r3, [r2], #4
117 add \E, r1, \E, ror #2
118 orr ip, \B, \C, ror #2
119 add \E, \E, \A, ror #27
120 and ip, ip, \D, ror #2
121 add \E, \E, r3
122 and r3, \B, \C, ror #2
123 orr ip, ip, r3
124 add \E, \E, ip
125 .endm
126
127 ldmia r0, {r4 - r8}
128
129 mov lr, #4
130 ldr r1, .L_sha_K + 0
131
132 /* adjust initial values */
133 mov r6, r6, ror #30
134 mov r7, r7, ror #30
135 mov r8, r8, ror #30
136
1373: subs lr, lr, #1
138 sha_f1 r4, r5, r6, r7, r8
139 sha_f1 r8, r4, r5, r6, r7
140 sha_f1 r7, r8, r4, r5, r6
141 sha_f1 r6, r7, r8, r4, r5
142 sha_f1 r5, r6, r7, r8, r4
143 bne 3b
144
145 ldr r1, .L_sha_K + 4
146 mov lr, #4
147
1484: subs lr, lr, #1
149 sha_f2 r4, r5, r6, r7, r8
150 sha_f2 r8, r4, r5, r6, r7
151 sha_f2 r7, r8, r4, r5, r6
152 sha_f2 r6, r7, r8, r4, r5
153 sha_f2 r5, r6, r7, r8, r4
154 bne 4b
155
156 ldr r1, .L_sha_K + 8
157 mov lr, #4
158
1595: subs lr, lr, #1
160 sha_f3 r4, r5, r6, r7, r8
161 sha_f3 r8, r4, r5, r6, r7
162 sha_f3 r7, r8, r4, r5, r6
163 sha_f3 r6, r7, r8, r4, r5
164 sha_f3 r5, r6, r7, r8, r4
165 bne 5b
166
167 ldr r1, .L_sha_K + 12
168 mov lr, #4
169
1706: subs lr, lr, #1
171 sha_f2 r4, r5, r6, r7, r8
172 sha_f2 r8, r4, r5, r6, r7
173 sha_f2 r7, r8, r4, r5, r6
174 sha_f2 r6, r7, r8, r4, r5
175 sha_f2 r5, r6, r7, r8, r4
176 bne 6b
177
178 ldmia r0, {r1, r2, r3, ip, lr}
179 add r4, r1, r4
180 add r5, r2, r5
181 add r6, r3, r6, ror #2
182 add r7, ip, r7, ror #2
183 add r8, lr, r8, ror #2
184 stmia r0, {r4 - r8}
185
186 ldmfd sp!, {r4 - r8, pc}
187
188.L_sha_K:
189 .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
190
191
192/*
193 * void sha_init(__u32 *buf)
194 */
195
196.L_sha_initial_digest:
197 .word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0
198
199ENTRY(sha_init)
200
201 str lr, [sp, #-4]!
202 adr r1, .L_sha_initial_digest
203 ldmia r1, {r1, r2, r3, ip, lr}
204 stmia r0, {r1, r2, r3, ip, lr}
205 ldr pc, [sp], #4
206
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
index 20ec83896c37..a8e462f58bc9 100644
--- a/arch/arm/mach-aaec2000/Makefile
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support (must be linked before board specific support) 5# Common support (must be linked before board specific support)
6obj-y += core.o 6obj-y += core.o clock.o
7 7
8# Specific board support 8# Specific board support
9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o 9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c
index c9d899886648..f5ef69702296 100644
--- a/arch/arm/mach-aaec2000/aaed2000.c
+++ b/arch/arm/mach-aaec2000/aaed2000.c
@@ -27,16 +27,65 @@
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
29 29
30#include <asm/arch/aaed2000.h>
31
30#include "core.h" 32#include "core.h"
31 33
34static void aaed2000_clcd_disable(struct clcd_fb *fb)
35{
36 AAED_EXT_GPIO &= ~AAED_EGPIO_LCD_PWR_EN;
37}
38
39static void aaed2000_clcd_enable(struct clcd_fb *fb)
40{
41 AAED_EXT_GPIO |= AAED_EGPIO_LCD_PWR_EN;
42}
43
44struct aaec2000_clcd_info clcd_info = {
45 .enable = aaed2000_clcd_enable,
46 .disable = aaed2000_clcd_disable,
47 .panel = {
48 .mode = {
49 .name = "Sharp",
50 .refresh = 60,
51 .xres = 640,
52 .yres = 480,
53 .pixclock = 39721,
54 .left_margin = 20,
55 .right_margin = 44,
56 .upper_margin = 21,
57 .lower_margin = 34,
58 .hsync_len = 96,
59 .vsync_len = 2,
60 .sync = 0,
61 .vmode = FB_VMODE_NONINTERLACED,
62 },
63 .width = -1,
64 .height = -1,
65 .tim2 = TIM2_IVS | TIM2_IHS,
66 .cntl = CNTL_LCDTFT,
67 .bpp = 16,
68 },
69};
70
32static void __init aaed2000_init_irq(void) 71static void __init aaed2000_init_irq(void)
33{ 72{
34 aaec2000_init_irq(); 73 aaec2000_init_irq();
35} 74}
36 75
76static void __init aaed2000_init(void)
77{
78 aaec2000_set_clcd_plat_data(&clcd_info);
79}
80
81static struct map_desc aaed2000_io_desc[] __initdata = {
82 { EXT_GPIO_VBASE, EXT_GPIO_PBASE, EXT_GPIO_LENGTH, MT_DEVICE }, /* Ext GPIO */
83};
84
37static void __init aaed2000_map_io(void) 85static void __init aaed2000_map_io(void)
38{ 86{
39 aaec2000_map_io(); 87 aaec2000_map_io();
88 iotable_init(aaed2000_io_desc, ARRAY_SIZE(aaed2000_io_desc));
40} 89}
41 90
42MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform") 91MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
@@ -47,4 +96,5 @@ MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
47 .map_io = aaed2000_map_io, 96 .map_io = aaed2000_map_io,
48 .init_irq = aaed2000_init_irq, 97 .init_irq = aaed2000_init_irq,
49 .timer = &aaec2000_timer, 98 .timer = &aaec2000_timer,
99 .init_machine = aaed2000_init,
50MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-aaec2000/clock.c b/arch/arm/mach-aaec2000/clock.c
new file mode 100644
index 000000000000..99e019169dda
--- /dev/null
+++ b/arch/arm/mach-aaec2000/clock.c
@@ -0,0 +1,110 @@
1/*
2 * linux/arch/arm/mach-aaec2000/clock.c
3 *
4 * Copyright (C) 2005 Nicolas Bellido Y Ortega
5 *
6 * Based on linux/arch/arm/mach-integrator/clock.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/errno.h>
16#include <linux/err.h>
17
18#include <asm/semaphore.h>
19#include <asm/hardware/clock.h>
20
21#include "clock.h"
22
23static LIST_HEAD(clocks);
24static DECLARE_MUTEX(clocks_sem);
25
26struct clk *clk_get(struct device *dev, const char *id)
27{
28 struct clk *p, *clk = ERR_PTR(-ENOENT);
29
30 down(&clocks_sem);
31 list_for_each_entry(p, &clocks, node) {
32 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
33 clk = p;
34 break;
35 }
36 }
37 up(&clocks_sem);
38
39 return clk;
40}
41EXPORT_SYMBOL(clk_get);
42
43void clk_put(struct clk *clk)
44{
45 module_put(clk->owner);
46}
47EXPORT_SYMBOL(clk_put);
48
49int clk_enable(struct clk *clk)
50{
51 return 0;
52}
53EXPORT_SYMBOL(clk_enable);
54
55void clk_disable(struct clk *clk)
56{
57}
58EXPORT_SYMBOL(clk_disable);
59
60int clk_use(struct clk *clk)
61{
62 return 0;
63}
64EXPORT_SYMBOL(clk_use);
65
66void clk_unuse(struct clk *clk)
67{
68}
69EXPORT_SYMBOL(clk_unuse);
70
71unsigned long clk_get_rate(struct clk *clk)
72{
73 return clk->rate;
74}
75EXPORT_SYMBOL(clk_get_rate);
76
77long clk_round_rate(struct clk *clk, unsigned long rate)
78{
79 return rate;
80}
81EXPORT_SYMBOL(clk_round_rate);
82
83int clk_set_rate(struct clk *clk, unsigned long rate)
84{
85 return 0;
86}
87EXPORT_SYMBOL(clk_set_rate);
88
89int clk_register(struct clk *clk)
90{
91 down(&clocks_sem);
92 list_add(&clk->node, &clocks);
93 up(&clocks_sem);
94 return 0;
95}
96EXPORT_SYMBOL(clk_register);
97
98void clk_unregister(struct clk *clk)
99{
100 down(&clocks_sem);
101 list_del(&clk->node);
102 up(&clocks_sem);
103}
104EXPORT_SYMBOL(clk_unregister);
105
106static int __init clk_init(void)
107{
108 return 0;
109}
110arch_initcall(clk_init);
diff --git a/arch/arm/mach-aaec2000/clock.h b/arch/arm/mach-aaec2000/clock.h
new file mode 100644
index 000000000000..d4bb74ff613f
--- /dev/null
+++ b/arch/arm/mach-aaec2000/clock.h
@@ -0,0 +1,23 @@
1/*
2 * linux/arch/arm/mach-aaec2000/clock.h
3 *
4 * Copyright (C) 2005 Nicolas Bellido Y Ortega
5 *
6 * Based on linux/arch/arm/mach-integrator/clock.h
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12struct module;
13
14struct clk {
15 struct list_head node;
16 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 void *data;
20};
21
22int clk_register(struct clk *clk);
23void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index aece0cd4f0a3..0c53dab80905 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -13,19 +13,27 @@
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/device.h>
16#include <linux/list.h> 17#include <linux/list.h>
17#include <linux/errno.h> 18#include <linux/errno.h>
19#include <linux/dma-mapping.h>
18#include <linux/interrupt.h> 20#include <linux/interrupt.h>
19#include <linux/timex.h> 21#include <linux/timex.h>
20#include <linux/signal.h> 22#include <linux/signal.h>
21 23
22#include <asm/hardware.h> 24#include <asm/hardware.h>
23#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/sizes.h>
27#include <asm/hardware/amba.h>
24 28
29#include <asm/mach/flash.h>
25#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
26#include <asm/mach/time.h> 31#include <asm/mach/time.h>
27#include <asm/mach/map.h> 32#include <asm/mach/map.h>
28 33
34#include "core.h"
35#include "clock.h"
36
29/* 37/*
30 * Common I/O mapping: 38 * Common I/O mapping:
31 * 39 *
@@ -40,9 +48,17 @@
40 * default mapping provided here. 48 * default mapping provided here.
41 */ 49 */
42static struct map_desc standard_io_desc[] __initdata = { 50static struct map_desc standard_io_desc[] __initdata = {
43 /* virtual physical length type */ 51 {
44 { VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE }, 52 .virtual = VIO_APB_BASE,
45 { VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE } 53 .physical = __phys_to_pfn(PIO_APB_BASE),
54 .length = IO_APB_LENGTH,
55 .type = MT_DEVICE
56 }, {
57 .virtual = VIO_AHB_BASE,
58 .physical = __phys_to_pfn(PIO_AHB_BASE),
59 .length = IO_AHB_LENGTH,
60 .type = MT_DEVICE
61 }
46}; 62};
47 63
48void __init aaec2000_map_io(void) 64void __init aaec2000_map_io(void)
@@ -155,3 +171,116 @@ struct sys_timer aaec2000_timer = {
155 .offset = aaec2000_gettimeoffset, 171 .offset = aaec2000_gettimeoffset,
156}; 172};
157 173
174static struct clcd_panel mach_clcd_panel;
175
176static int aaec2000_clcd_setup(struct clcd_fb *fb)
177{
178 dma_addr_t dma;
179
180 fb->panel = &mach_clcd_panel;
181
182 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
183 &dma, GFP_KERNEL);
184
185 if (!fb->fb.screen_base) {
186 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
187 return -ENOMEM;
188 }
189
190 fb->fb.fix.smem_start = dma;
191 fb->fb.fix.smem_len = SZ_1M;
192
193 return 0;
194}
195
196static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
197{
198 return dma_mmap_writecombine(&fb->dev->dev, vma,
199 fb->fb.screen_base,
200 fb->fb.fix.smem_start,
201 fb->fb.fix.smem_len);
202}
203
204static void aaec2000_clcd_remove(struct clcd_fb *fb)
205{
206 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
207 fb->fb.screen_base, fb->fb.fix.smem_start);
208}
209
210static struct clcd_board clcd_plat_data = {
211 .name = "AAEC-2000",
212 .check = clcdfb_check,
213 .decode = clcdfb_decode,
214 .setup = aaec2000_clcd_setup,
215 .mmap = aaec2000_clcd_mmap,
216 .remove = aaec2000_clcd_remove,
217};
218
219static struct amba_device clcd_device = {
220 .dev = {
221 .bus_id = "mb:16",
222 .coherent_dma_mask = ~0,
223 .platform_data = &clcd_plat_data,
224 },
225 .res = {
226 .start = AAEC_CLCD_PHYS,
227 .end = AAEC_CLCD_PHYS + SZ_4K - 1,
228 .flags = IORESOURCE_MEM,
229 },
230 .irq = { INT_LCD, NO_IRQ },
231 .periphid = 0x41110,
232};
233
234static struct amba_device *amba_devs[] __initdata = {
235 &clcd_device,
236};
237
238static struct clk aaec2000_clcd_clk = {
239 .name = "CLCDCLK",
240};
241
242void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
243{
244 clcd_plat_data.enable = clcd->enable;
245 clcd_plat_data.disable = clcd->disable;
246 memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
247}
248
249static struct flash_platform_data aaec2000_flash_data = {
250 .map_name = "cfi_probe",
251 .width = 4,
252};
253
254static struct resource aaec2000_flash_resource = {
255 .start = AAEC_FLASH_BASE,
256 .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
257 .flags = IORESOURCE_MEM,
258};
259
260static struct platform_device aaec2000_flash_device = {
261 .name = "armflash",
262 .id = 0,
263 .dev = {
264 .platform_data = &aaec2000_flash_data,
265 },
266 .num_resources = 1,
267 .resource = &aaec2000_flash_resource,
268};
269
270static int __init aaec2000_init(void)
271{
272 int i;
273
274 clk_register(&aaec2000_clcd_clk);
275
276 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
277 struct amba_device *d = amba_devs[i];
278 amba_device_register(d, &iomem_resource);
279 }
280
281 platform_device_register(&aaec2000_flash_device);
282
283 return 0;
284};
285arch_initcall(aaec2000_init);
286
diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h
index 91893d848c16..daefc0ea14a1 100644
--- a/arch/arm/mach-aaec2000/core.h
+++ b/arch/arm/mach-aaec2000/core.h
@@ -9,8 +9,19 @@
9 * 9 *
10 */ 10 */
11 11
12#include <asm/hardware/amba_clcd.h>
13
12struct sys_timer; 14struct sys_timer;
13 15
14extern struct sys_timer aaec2000_timer; 16extern struct sys_timer aaec2000_timer;
15extern void __init aaec2000_map_io(void); 17extern void __init aaec2000_map_io(void);
16extern void __init aaec2000_init_irq(void); 18extern void __init aaec2000_init_irq(void);
19
20struct aaec2000_clcd_info {
21 struct clcd_panel panel;
22 void (*disable)(struct clcd_fb *);
23 void (*enable)(struct clcd_fb *);
24};
25
26extern void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *);
27
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index 0793dcf54f2e..d5c155045762 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -69,6 +69,17 @@ config EP72XX_ROM_BOOT
69 69
70 You almost surely want to say N here. 70 You almost surely want to say N here.
71 71
72config MACH_MP1000
73 bool "MACH_MP1000"
74 help
75 Say Y if you intend to run the kernel on the Comdial MP1000 platform.
76
77config MP1000_90MHZ
78 bool "MP1000_90MHZ"
79 depends on MACH_MP1000
80 help
81 Say Y if you have the MP1000 configured to be set at 90MHZ rather than 74MHZ
82
72endmenu 83endmenu
73 84
74endif 85endif
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 4a197315f0cf..8a6dc1ccf8fe 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
15obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o 15obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
16obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o 16obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
17obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o 17obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
18obj-$(CONFIG_MACH_MP1000) += mp1000-mach.o mp1000-mm.o mp1000-seprom.o
18obj-$(CONFIG_ARCH_P720T) += p720t.o 19obj-$(CONFIG_ARCH_P720T) += p720t.o
19leds-$(CONFIG_ARCH_P720T) += p720t-leds.o 20leds-$(CONFIG_ARCH_P720T) += p720t-leds.o
20obj-$(CONFIG_LEDS) += $(leds-y) 21obj-$(CONFIG_LEDS) += $(leds-y)
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index dc73feb1ffb0..43b9423d1440 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -46,10 +46,14 @@
46*/ 46*/
47 47
48static struct map_desc autcpu12_io_desc[] __initdata = { 48static struct map_desc autcpu12_io_desc[] __initdata = {
49 /* virtual, physical, length, type */ 49 /* memory-mapped extra io and CS8900A Ethernet chip */
50 /* memory-mapped extra io and CS8900A Ethernet chip */ 50 /* ethernet chip */
51 /* ethernet chip */ 51 {
52 { AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, MT_DEVICE } 52 .virtual = AUTCPU12_VIRT_CS8900A,
53 .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
54 .length = SZ_1M,
55 .type = MT_DEVICE
56 }
53}; 57};
54 58
55void __init autcpu12_map_io(void) 59void __init autcpu12_map_io(void)
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index a46c82cd2711..cba7be5a06c3 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -39,7 +39,12 @@
39 * ethernet driver, perhaps. 39 * ethernet driver, perhaps.
40 */ 40 */
41static struct map_desc cdb89712_io_desc[] __initdata = { 41static struct map_desc cdb89712_io_desc[] __initdata = {
42 { ETHER_BASE, ETHER_START, ETHER_SIZE, MT_DEVICE } 42 {
43 .virtual = ETHER_BASE,
44 .pfn =__phys_to_pfn(ETHER_START),
45 .length = ETHER_SIZE,
46 .type = MT_DEVICE
47 }
43}; 48};
44 49
45static void __init cdb89712_map_io(void) 50static void __init cdb89712_map_io(void)
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
index 780d91805984..35d51a759b59 100644
--- a/arch/arm/mach-clps711x/ceiva.c
+++ b/arch/arm/mach-clps711x/ceiva.c
@@ -37,11 +37,13 @@
37#include "common.h" 37#include "common.h"
38 38
39static struct map_desc ceiva_io_desc[] __initdata = { 39static struct map_desc ceiva_io_desc[] __initdata = {
40 /* virtual, physical, length, type */ 40 /* SED1355 controlled video RAM & registers */
41 41 {
42 /* SED1355 controlled video RAM & registers */ 42 .virtual = CEIVA_VIRT_SED1355,
43 { CEIVA_VIRT_SED1355, CEIVA_PHYS_SED1355, SZ_2M, MT_DEVICE } 43 .pfn = __phys_to_pfn(CEIVA_PHYS_SED1355),
44 44 .length = SZ_2M,
45 .type = MT_DEVICE
46 }
45}; 47};
46 48
47 49
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c
index 7fd7b01822d0..72f8bb05d55e 100644
--- a/arch/arm/mach-clps711x/edb7211-mm.c
+++ b/arch/arm/mach-clps711x/edb7211-mm.c
@@ -51,15 +51,27 @@ extern void clps711x_map_io(void);
51 * happens). 51 * happens).
52 */ 52 */
53static struct map_desc edb7211_io_desc[] __initdata = { 53static struct map_desc edb7211_io_desc[] __initdata = {
54 /* virtual, physical, length, type */ 54 { /* memory-mapped extra keyboard row */
55 55 .virtual = EP7211_VIRT_EXTKBD,
56 /* memory-mapped extra keyboard row and CS8900A Ethernet chip */ 56 .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
57 { EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, SZ_1M, MT_DEVICE }, 57 .length = SZ_1M,
58 { EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, SZ_1M, MT_DEVICE }, 58 .type - MT_DEVICE
59 59 }, { /* and CS8900A Ethernet chip */
60 /* flash banks */ 60 .virtual = EP7211_VIRT_CS8900A,
61 { EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, SZ_8M, MT_DEVICE }, 61 .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
62 { EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, SZ_8M, MT_DEVICE } 62 .length = SZ_1M,
63 .type = MT_DEVICE
64 }, { /* flash banks */
65 .virtual = EP7211_VIRT_FLASH1,
66 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
67 .length = SZ_8M,
68 .type = MT_DEVICE
69 }, {
70 .virtual = EP7211_VIRT_FLASH2,
71 .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
72 .length = SZ_8M,
73 .type = MT_DEVICE
74 }
63}; 75};
64 76
65void __init edb7211_map_io(void) 77void __init edb7211_map_io(void)
diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c
index 120b7cac84b5..a00f77ef8df8 100644
--- a/arch/arm/mach-clps711x/mm.c
+++ b/arch/arm/mach-clps711x/mm.c
@@ -24,6 +24,7 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/bootmem.h> 25#include <linux/bootmem.h>
26 26
27#include <asm/sizes.h>
27#include <asm/hardware.h> 28#include <asm/hardware.h>
28#include <asm/pgtable.h> 29#include <asm/pgtable.h>
29#include <asm/page.h> 30#include <asm/page.h>
@@ -34,7 +35,12 @@
34 * This maps the generic CLPS711x registers 35 * This maps the generic CLPS711x registers
35 */ 36 */
36static struct map_desc clps711x_io_desc[] __initdata = { 37static struct map_desc clps711x_io_desc[] __initdata = {
37 { CLPS7111_VIRT_BASE, CLPS7111_PHYS_BASE, 1048576, MT_DEVICE } 38 {
39 .virtual = CLPS7111_VIRT_BASE,
40 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
41 .length = SZ_1M,
42 .type = MT_DEVICE
43 }
38}; 44};
39 45
40void __init clps711x_map_io(void) 46void __init clps711x_map_io(void)
diff --git a/arch/arm/mach-clps711x/mp1000-mach.c b/arch/arm/mach-clps711x/mp1000-mach.c
new file mode 100644
index 000000000000..c2816bcde5e7
--- /dev/null
+++ b/arch/arm/mach-clps711x/mp1000-mach.c
@@ -0,0 +1,49 @@
1/*
2 * linux/arch/arm/mach-mp1000/mp1000.c
3 *
4 * Copyright (C) 2005 Comdial Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/string.h>
23
24#include <asm/setup.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <asm/arch/mp1000-seprom.h>
28
29#include "common.h"
30
31extern void mp1000_map_io(void);
32
33static void __init mp1000_init(void)
34{
35 seprom_init();
36}
37
38MACHINE_START(MP1000, "Comdial MP1000")
39 /* Maintainer: Jon Ringle */
40 .phys_ram = 0xc0000000,
41 .phys_io = 0x80000000,
42 .io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
43 .boot_params = 0xc0015100,
44 .map_io = mp1000_map_io,
45 .init_irq = clps711x_init_irq,
46 .init_machine = mp1000_init,
47 .timer = &clps711x_timer,
48MACHINE_END
49
diff --git a/arch/arm/mach-clps711x/mp1000-mm.c b/arch/arm/mach-clps711x/mp1000-mm.c
new file mode 100644
index 000000000000..20e810b0ec0c
--- /dev/null
+++ b/arch/arm/mach-clps711x/mp1000-mm.c
@@ -0,0 +1,47 @@
1/*
2 * linux/arch/arm/mach-mp1000/mm.c
3 *
4 * Extra MM routines for the MP1000
5 *
6 * Copyright (C) 2005 Comdial Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include <asm/hardware.h>
26#include <asm/page.h>
27#include <asm/pgtable.h>
28#include <asm/sizes.h>
29
30#include <asm/mach/map.h>
31
32extern void clps711x_map_io(void);
33
34static struct map_desc mp1000_io_desc[] __initdata = {
35 { MP1000_EIO_BASE, MP1000_EIO_START, MP1000_EIO_SIZE, MT_DEVICE },
36 { MP1000_FIO_BASE, MP1000_FIO_START, MP1000_FIO_SIZE, MT_DEVICE },
37 { MP1000_LIO_BASE, MP1000_LIO_START, MP1000_LIO_SIZE, MT_DEVICE },
38 { MP1000_NIO_BASE, MP1000_NIO_START, MP1000_NIO_SIZE, MT_DEVICE },
39 { MP1000_IDE_BASE, MP1000_IDE_START, MP1000_IDE_SIZE, MT_DEVICE },
40 { MP1000_DSP_BASE, MP1000_DSP_START, MP1000_DSP_SIZE, MT_DEVICE }
41};
42
43void __init mp1000_map_io(void)
44{
45 clps711x_map_io();
46 iotable_init(mp1000_io_desc, ARRAY_SIZE(mp1000_io_desc));
47}
diff --git a/arch/arm/mach-clps711x/mp1000-seprom.c b/arch/arm/mach-clps711x/mp1000-seprom.c
new file mode 100644
index 000000000000..b22d0bebb851
--- /dev/null
+++ b/arch/arm/mach-clps711x/mp1000-seprom.c
@@ -0,0 +1,195 @@
1/*`
2 * mp1000-seprom.c
3 *
4 * This file contains the Serial EEPROM code for the MP1000 board
5 *
6 * Copyright (C) 2005 Comdial Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <asm/hardware.h>
27#include <asm/hardware/clps7111.h>
28#include <asm/arch/mp1000-seprom.h>
29
30/* If SepromInit() can initialize and checksum the seprom successfully, */
31/* then it will point seprom_data_ptr at the shadow copy. */
32
33static eeprom_struct seprom_data; /* shadow copy of seprom content */
34
35eeprom_struct *seprom_data_ptr = 0; /* 0 => not initialized */
36
37/*
38 * Port D Bit 5 is Chip Select for EEPROM
39 * Port E Bit 0 is Input, Data out from EEPROM
40 * Port E Bit 1 is Output, Data in to EEPROM
41 * Port E Bit 2 is Output, CLK to EEPROM
42 */
43
44static char *port_d_ptr = (char *)(CLPS7111_VIRT_BASE + PDDR);
45static char *port_e_ptr = (char *)(CLPS7111_VIRT_BASE + PEDR);
46
47#define NO_OF_SHORTS 64 // Device is 64 x 16 bits
48#define ENABLE_RW 0
49#define DISABLE_RW 1
50
51static inline void toggle_seprom_clock(void)
52{
53 *port_e_ptr |= HwPortESepromCLK;
54 *port_e_ptr &= ~(HwPortESepromCLK);
55}
56
57static inline void select_eeprom(void)
58{
59 *port_d_ptr |= HwPortDEECS;
60 *port_e_ptr &= ~(HwPortESepromCLK);
61}
62
63static inline void deselect_eeprom(void)
64{
65 *port_d_ptr &= ~(HwPortDEECS);
66 *port_e_ptr &= ~(HwPortESepromDIn);
67}
68
69/*
70 * GetSepromDataPtr - returns pointer to shadow (RAM) copy of seprom
71 * and returns 0 if seprom is not initialized or
72 * has a checksum error.
73 */
74
75eeprom_struct* get_seprom_ptr(void)
76{
77 return seprom_data_ptr;
78}
79
80unsigned char* get_eeprom_mac_address(void)
81{
82 return seprom_data_ptr->variant.eprom_struct.mac_Address;
83}
84
85/*
86 * ReadSProm, Physically reads data from the Serial PROM
87 */
88static void read_sprom(short address, int length, eeprom_struct *buffer)
89{
90 short data = COMMAND_READ | (address & 0x3F);
91 short bit;
92 int i;
93
94 select_eeprom();
95
96 // Clock in 9 bits of the command
97 for (i = 0, bit = 0x100; i < 9; i++, bit >>= 1) {
98 if (data & bit)
99 *port_e_ptr |= HwPortESepromDIn;
100 else
101 *port_e_ptr &= ~(HwPortESepromDIn);
102
103 toggle_seprom_clock();
104 }
105
106 //
107 // Now read one or more shorts of data from the Seprom
108 //
109 while (length-- > 0) {
110 data = 0;
111
112 // Read 16 bits at a time
113 for (i = 0; i < 16; i++) {
114 data <<= 1;
115 toggle_seprom_clock();
116 data |= *port_e_ptr & HwPortESepromDOut;
117
118 }
119
120 buffer->variant.eprom_short_data[address++] = data;
121 }
122
123 deselect_eeprom();
124
125 return;
126}
127
128
129
130/*
131 * ReadSerialPROM
132 *
133 * Input: Pointer to array of 64 x 16 Bits
134 *
135 * Output: if no problem reading data is filled in
136 */
137static void read_serial_prom(eeprom_struct *data)
138{
139 read_sprom(0, 64, data);
140}
141
142
143//
144// Compute Serial EEPROM checksum
145//
146// Input: Pointer to struct with Eprom data
147//
148// Output: The computed Eprom checksum
149//
150static short compute_seprom_checksum(eeprom_struct *data)
151{
152 short checksum = 0;
153 int i;
154
155 for (i = 0; i < 126; i++) {
156 checksum += (short)data->variant.eprom_byte_data[i];
157 }
158
159 return((short)(0x5555 - (checksum & 0xFFFF)));
160}
161
162//
163// Make sure the data port bits for the SEPROM are correctly initialised
164//
165
166void __init seprom_init(void)
167{
168 short checksum;
169
170 // Init Port D
171 *(char *)(CLPS7111_VIRT_BASE + PDDDR) = 0x0;
172 *(char *)(CLPS7111_VIRT_BASE + PDDR) = 0x15;
173
174 // Init Port E
175 *(int *)(CLPS7111_VIRT_BASE + PEDDR) = 0x06;
176 *(int *)(CLPS7111_VIRT_BASE + PEDR) = 0x04;
177
178 //
179 // Make sure that EEPROM struct size never exceeds 128 bytes
180 //
181 if (sizeof(eeprom_struct) > 128) {
182 panic("Serial PROM struct size > 128, aborting read\n");
183 }
184
185 read_serial_prom(&seprom_data);
186
187 checksum = compute_seprom_checksum(&seprom_data);
188
189 if (checksum != seprom_data.variant.eprom_short_data[63]) {
190 panic("Serial EEPROM checksum failed\n");
191 }
192
193 seprom_data_ptr = &seprom_data;
194}
195
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 5bdb90edf992..a1acb945fb51 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -29,6 +29,7 @@
29#include <asm/pgtable.h> 29#include <asm/pgtable.h>
30#include <asm/page.h> 30#include <asm/page.h>
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/sizes.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 35#include <asm/mach/map.h>
@@ -42,8 +43,17 @@
42 * We map both here. 43 * We map both here.
43 */ 44 */
44static struct map_desc p720t_io_desc[] __initdata = { 45static struct map_desc p720t_io_desc[] __initdata = {
45 { SYSPLD_VIRT_BASE, SYSPLD_PHYS_BASE, 1048576, MT_DEVICE }, 46 {
46 { 0xfe400000, 0x10400000, 1048576, MT_DEVICE } 47 .virtual = SYSPLD_VIRT_BASE,
48 .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
49 .length = SZ_1M,
50 .type = MT_DEVICE
51 }, {
52 .virtual = 0xfe400000,
53 .pfn = __phys_to_pfn(0x10400000),
54 .length = SZ_1M,
55 .type = MT_DEVICE
56 }
47}; 57};
48 58
49static void __init 59static void __init
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index e216ab8b9e8f..0364ba4b539e 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -259,10 +259,27 @@ static void __init clps7500_init_irq(void)
259} 259}
260 260
261static struct map_desc cl7500_io_desc[] __initdata = { 261static struct map_desc cl7500_io_desc[] __initdata = {
262 { IO_BASE, IO_START, IO_SIZE, MT_DEVICE }, /* IO space */ 262 { /* IO space */
263 { ISA_BASE, ISA_START, ISA_SIZE, MT_DEVICE }, /* ISA space */ 263 .virtual = IO_BASE,
264 { FLASH_BASE, FLASH_START, FLASH_SIZE, MT_DEVICE }, /* Flash */ 264 .pfn = __phys_to_pfn(IO_START),
265 { LED_BASE, LED_START, LED_SIZE, MT_DEVICE } /* LED */ 265 .length = IO_SIZE,
266 .type = MT_DEVICE
267 }, { /* ISA space */
268 .virtual = ISA_BASE,
269 .pfn = __phys_to_pfn(ISA_START),
270 .length = ISA_SIZE,
271 .type = MT_DEVICE
272 }, { /* Flash */
273 .virtual = FLASH_BASE,
274 .pfn = __phys_to_pfn(FLASH_START),
275 .length = FLASH_SIZE,
276 .type = MT_DEVICE
277 }, { /* LED */
278 .virtual = LED_BASE,
279 .pfn = __phys_to_pfn(LED_START),
280 .length = LED_SIZE,
281 .type = MT_DEVICE
282 }
266}; 283};
267 284
268static void __init clps7500_map_io(void) 285static void __init clps7500_map_io(void)
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 5aeadfd72143..15261646dcdd 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -76,16 +76,42 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
76 /* 76 /*
77 * sparse external-decode ISAIO space 77 * sparse external-decode ISAIO space
78 */ 78 */
79 { IRQ_STAT, TRICK4_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_STAT/IRQ_MCLR */ 79 { /* IRQ_STAT/IRQ_MCLR */
80 { IRQ_MASK, TRICK3_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_MASK/IRQ_MSET */ 80 .virtual = IRQ_STAT,
81 { SOFT_BASE, TRICK1_PHYS, PGDIR_SIZE, MT_DEVICE }, /* SOFT_BASE */ 81 .pfn = __phys_to_pfn(TRICK4_PHYS),
82 { PIT_BASE, TRICK0_PHYS, PGDIR_SIZE, MT_DEVICE }, /* PIT_BASE */ 82 .length = PGDIR_SIZE,
83 .type = MT_DEVICE
84 }, { /* IRQ_MASK/IRQ_MSET */
85 .virtual = IRQ_MASK,
86 .pfn = __phys_to_pfn(TRICK3_PHYS),
87 .length = PGDIR_SIZE,
88 .type = MT_DEVICE
89 }, { /* SOFT_BASE */
90 .virtual = SOFT_BASE,
91 .pfn = __phys_to_pfn(TRICK1_PHYS),
92 .length = PGDIR_SIZE,
93 .type = MT_DEVICE
94 }, { /* PIT_BASE */
95 .virtual = PIT_BASE,
96 .pfn = __phys_to_pfn(TRICK0_PHYS),
97 .length = PGDIR_SIZE,
98 .type = MT_DEVICE
99 },
83 100
84 /* 101 /*
85 * self-decode ISAIO space 102 * self-decode ISAIO space
86 */ 103 */
87 { ISAIO_BASE, ISAIO_PHYS, ISAIO_SIZE, MT_DEVICE }, 104 {
88 { ISAMEM_BASE, ISAMEM_PHYS, ISAMEM_SIZE, MT_DEVICE } 105 .virtual = ISAIO_BASE,
106 .pfn = __phys_to_pfn(ISAIO_PHYS),
107 .length = ISAIO_SIZE,
108 .type = MT_DEVICE
109 }, {
110 .virtual = ISAMEM_BASE,
111 .pfn = __phys_to_pfn(ISAMEM_PHYS),
112 .length = ISAMEM_SIZE,
113 .type = MT_DEVICE
114 }
89}; 115};
90 116
91static void __init ebsa110_map_io(void) 117static void __init ebsa110_map_io(void)
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c
index ef7eb5dc91bd..c648bfb676a1 100644
--- a/arch/arm/mach-ebsa110/io.c
+++ b/arch/arm/mach-ebsa110/io.c
@@ -24,6 +24,7 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware.h>
27#include <asm/io.h> 28#include <asm/io.h>
28#include <asm/page.h> 29#include <asm/page.h>
29 30
diff --git a/arch/arm/mach-epxa10db/mm.c b/arch/arm/mach-epxa10db/mm.c
index 2aa57fa46da3..e8832d0910ee 100644
--- a/arch/arm/mach-epxa10db/mm.c
+++ b/arch/arm/mach-epxa10db/mm.c
@@ -31,12 +31,37 @@
31/* Page table mapping for I/O region */ 31/* Page table mapping for I/O region */
32 32
33static struct map_desc epxa10db_io_desc[] __initdata = { 33static struct map_desc epxa10db_io_desc[] __initdata = {
34 { IO_ADDRESS(EXC_REGISTERS_BASE), EXC_REGISTERS_BASE, SZ_16K, MT_DEVICE }, 34 {
35 { IO_ADDRESS(EXC_PLD_BLOCK0_BASE), EXC_PLD_BLOCK0_BASE, SZ_16K, MT_DEVICE }, 35 .virtual = IO_ADDRESS(EXC_REGISTERS_BASE),
36 { IO_ADDRESS(EXC_PLD_BLOCK1_BASE), EXC_PLD_BLOCK1_BASE, SZ_16K, MT_DEVICE }, 36 .pfn = __phys_to_pfn(EXC_REGISTERS_BASE),
37 { IO_ADDRESS(EXC_PLD_BLOCK2_BASE), EXC_PLD_BLOCK2_BASE, SZ_16K, MT_DEVICE }, 37 .length = SZ_16K,
38 { IO_ADDRESS(EXC_PLD_BLOCK3_BASE), EXC_PLD_BLOCK3_BASE, SZ_16K, MT_DEVICE }, 38 .type = MT_DEVICE
39 { FLASH_VADDR(EXC_EBI_BLOCK0_BASE), EXC_EBI_BLOCK0_BASE, SZ_16M, MT_DEVICE } 39 }, {
40 .virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE),
41 .pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE),
42 .length = SZ_16K,
43 .type = MT_DEVICE
44 }, {
45 .virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE),
46 .pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE),
47 .length = SZ_16K,
48 .type = MT_DEVICE
49 }, {
50 .virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE),
51 .physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE),
52 .length = SZ_16K,
53 .type = MT_DEVICE
54 }, {
55 .virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE),
56 .pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE),
57 .length = SZ_16K,
58 .type = MT_DEVICE
59 }, {
60 .virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE),
61 .pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE),
62 .length = SZ_16M,
63 .type = MT_DEVICE
64 }
40}; 65};
41 66
42void __init epxa10db_map_io(void) 67void __init epxa10db_map_io(void)
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index eb8238c1ef06..dc09fd200c16 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -130,8 +130,17 @@ void __init footbridge_init_irq(void)
130 * it means that we have extra bullet protection on our feet. 130 * it means that we have extra bullet protection on our feet.
131 */ 131 */
132static struct map_desc fb_common_io_desc[] __initdata = { 132static struct map_desc fb_common_io_desc[] __initdata = {
133 { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE }, 133 {
134 { XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE } 134 .virtual = ARMCSR_BASE,
135 .pfn = DC21285_ARMCSR_BASE,
136 .length = ARMCSR_SIZE,
137 .type = MT_DEVICE
138 }, {
139 .virtual = XBUS_BASE,
140 .pfn = __phys_to_pfn(0x40000000),
141 .length = XBUS_SIZE,
142 .type = MT_DEVICE
143 }
135}; 144};
136 145
137/* 146/*
@@ -140,11 +149,32 @@ static struct map_desc fb_common_io_desc[] __initdata = {
140 */ 149 */
141static struct map_desc ebsa285_host_io_desc[] __initdata = { 150static struct map_desc ebsa285_host_io_desc[] __initdata = {
142#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST) 151#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
143 { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }, 152 {
144 { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE }, 153 .virtual = PCIMEM_BASE,
145 { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE }, 154 .pfn = __phys_to_pfn(DC21285_PCI_MEM),
146 { PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE }, 155 .length = PCIMEM_SIZE,
147 { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE } 156 .type = MT_DEVICE
157 }, {
158 .virtual = PCICFG0_BASE,
159 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
160 .length = PCICFG0_SIZE,
161 .type = MT_DEVICE
162 }, {
163 .virtual = PCICFG1_BASE,
164 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
165 .length = PCICFG1_SIZE,
166 .type = MT_DEVICE
167 }, {
168 .virtual = PCIIACK_BASE,
169 .pfn = __phys_to_pfn(DC21285_PCI_IACK),
170 .length = PCIIACK_SIZE,
171 .type = MT_DEVICE
172 }, {
173 .virtual = PCIO_BASE,
174 .pfn = __phys_to_pfn(DC21285_PCI_IO),
175 .length = PCIO_SIZE,
176 .type = MT_DEVICE
177 }
148#endif 178#endif
149}; 179};
150 180
@@ -153,8 +183,17 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = {
153 */ 183 */
154static struct map_desc co285_io_desc[] __initdata = { 184static struct map_desc co285_io_desc[] __initdata = {
155#ifdef CONFIG_ARCH_CO285 185#ifdef CONFIG_ARCH_CO285
156 { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }, 186 {
157 { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE } 187 .virtual = PCIO_BASE,
188 .pfn = __phys_to_pfn(DC21285_PCI_IO),
189 .length = PCIO_SIZE,
190 .type = MT_DEVICE
191 }, {
192 .virtual = PCIMEM_BASE,
193 .pfn = __phys_to_pfn(DC21285_PCI_MEM),
194 .length = PCIMEM_SIZE,
195 .type = MT_DEVICE
196 }
158#endif 197#endif
159}; 198};
160 199
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 5110e2e65ddd..c096b4569308 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -237,7 +237,12 @@ void __init h720x_init_irq (void)
237} 237}
238 238
239static struct map_desc h720x_io_desc[] __initdata = { 239static struct map_desc h720x_io_desc[] __initdata = {
240 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 240 {
241 .virtual = IO_VIRT,
242 .pfn = __phys_to_pfn(IO_PHYS),
243 .length = IO_SIZE,
244 .type = MT_DEVICE
245 },
241}; 246};
242 247
243/* Initialize io tables */ 248/* Initialize io tables */
diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c
index f8a742bb2d5b..cb14b0682cef 100644
--- a/arch/arm/mach-imx/generic.c
+++ b/arch/arm/mach-imx/generic.c
@@ -273,8 +273,12 @@ static struct platform_device *devices[] __initdata = {
273}; 273};
274 274
275static struct map_desc imx_io_desc[] __initdata = { 275static struct map_desc imx_io_desc[] __initdata = {
276 /* virtual physical length type */ 276 {
277 {IMX_IO_BASE, IMX_IO_PHYS, IMX_IO_SIZE, MT_DEVICE}, 277 .virtual = IMX_IO_BASE,
278 .pfn = __phys_to_pfn(IMX_IO_PHYS),
279 .length = IMX_IO_SIZE,
280 .type = MT_DEVICE
281 }
278}; 282};
279 283
280void __init 284void __init
diff --git a/arch/arm/mach-imx/mx1ads.c b/arch/arm/mach-imx/mx1ads.c
index a7511ddfe364..4cbdc1fe04b1 100644
--- a/arch/arm/mach-imx/mx1ads.c
+++ b/arch/arm/mach-imx/mx1ads.c
@@ -61,13 +61,37 @@ mx1ads_init(void)
61} 61}
62 62
63static struct map_desc mx1ads_io_desc[] __initdata = { 63static struct map_desc mx1ads_io_desc[] __initdata = {
64 /* virtual physical length type */ 64 {
65 {IMX_CS0_VIRT, IMX_CS0_PHYS, IMX_CS0_SIZE, MT_DEVICE}, 65 .virtual = IMX_CS0_VIRT,
66 {IMX_CS1_VIRT, IMX_CS1_PHYS, IMX_CS1_SIZE, MT_DEVICE}, 66 .pfn = __phys_to_pfn(IMX_CS0_PHYS),
67 {IMX_CS2_VIRT, IMX_CS2_PHYS, IMX_CS2_SIZE, MT_DEVICE}, 67 .length = IMX_CS0_SIZE,
68 {IMX_CS3_VIRT, IMX_CS3_PHYS, IMX_CS3_SIZE, MT_DEVICE}, 68 .type = MT_DEVICE
69 {IMX_CS4_VIRT, IMX_CS4_PHYS, IMX_CS4_SIZE, MT_DEVICE}, 69 }, {
70 {IMX_CS5_VIRT, IMX_CS5_PHYS, IMX_CS5_SIZE, MT_DEVICE}, 70 .virtual = IMX_CS1_VIRT,
71 .pfn = __phys_to_pfn(IMX_CS1_PHYS),
72 .length = IMX_CS1_SIZE,
73 .type = MT_DEVICE
74 }, {
75 .virtual = IMX_CS2_VIRT,
76 .pfn = __phys_to_pfn(IMX_CS2_PHYS),
77 .length = IMX_CS2_SIZE,
78 .type = MT_DEVICE
79 }, {
80 .virtual = IMX_CS3_VIRT,
81 .pfn = __phys_to_pfn(IMX_CS3_PHYS),
82 .length = IMX_CS3_SIZE,
83 .type = MT_DEVICE
84 }, {
85 .virtual = IMX_CS4_VIRT,
86 .pfn = __phys_to_pfn(IMX_CS4_PHYS),
87 .length = IMX_CS4_SIZE,
88 .type = MT_DEVICE
89 }, {
90 .virtual = IMX_CS5_VIRT,
91 .pfn = __phys_to_pfn(IMX_CS5_PHYS),
92 .length = IMX_CS5_SIZE,
93 .type = MT_DEVICE
94 }
71}; 95};
72 96
73static void __init 97static void __init
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 36e2b6eb67b7..f368b85f0447 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -75,19 +75,72 @@
75 */ 75 */
76 76
77static struct map_desc ap_io_desc[] __initdata = { 77static struct map_desc ap_io_desc[] __initdata = {
78 { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE }, 78 {
79 { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE }, 79 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
80 { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE }, 80 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
81 { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE }, 81 .length = SZ_4K,
82 { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE }, 82 .type = MT_DEVICE
83 { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE }, 83 }, {
84 { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE }, 84 .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE),
85 { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE }, 85 .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE),
86 { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE }, 86 .length = SZ_4K,
87 { PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE }, 87 .type = MT_DEVICE
88 { PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE }, 88 }, {
89 { PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_64K, MT_DEVICE }, 89 .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE),
90 { PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE } 90 .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE),
91 .length = SZ_4K,
92 .type = MT_DEVICE
93 }, {
94 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
95 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
96 .length = SZ_4K,
97 .type = MT_DEVICE
98 }, {
99 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
100 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
101 .length = SZ_4K,
102 .type = MT_DEVICE
103 }, {
104 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
105 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
106 .length = SZ_4K,
107 .type = MT_DEVICE
108 }, {
109 .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE),
110 .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE),
111 .length = SZ_4K,
112 .type = MT_DEVICE
113 }, {
114 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
115 .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
116 .length = SZ_4K,
117 .type = MT_DEVICE
118 }, {
119 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
120 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
121 .length = SZ_4K,
122 .type = MT_DEVICE
123 }, {
124 .virtual = PCI_MEMORY_VADDR,
125 .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
126 .length = SZ_16M,
127 .type = MT_DEVICE
128 }, {
129 .virtual = PCI_CONFIG_VADDR,
130 .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
131 .length = SZ_16M,
132 .type = MT_DEVICE
133 }, {
134 .virtual = PCI_V3_VADDR,
135 .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
136 .length = SZ_64K,
137 .type = MT_DEVICE
138 }, {
139 .virtual = PCI_IO_VADDR,
140 .pfn = __phys_to_pfn(PHYS_PCI_IO_BASE),
141 .length = SZ_64K,
142 .type = MT_DEVICE
143 }
91}; 144};
92 145
93static void __init ap_map_io(void) 146static void __init ap_map_io(void)
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 2be5c03ab87f..aa34c58b96c4 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -74,17 +74,62 @@
74 */ 74 */
75 75
76static struct map_desc intcp_io_desc[] __initdata = { 76static struct map_desc intcp_io_desc[] __initdata = {
77 { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE }, 77 {
78 { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE }, 78 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
79 { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE }, 79 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
80 { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE }, 80 .length = SZ_4K,
81 { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE }, 81 .type = MT_DEVICE
82 { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE }, 82 }, {
83 { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE }, 83 .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE),
84 { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE }, 84 .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE),
85 { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE }, 85 .length = SZ_4K,
86 { 0xfca00000, 0xca000000, SZ_4K, MT_DEVICE }, 86 .type = MT_DEVICE
87 { 0xfcb00000, 0xcb000000, SZ_4K, MT_DEVICE }, 87 }, {
88 .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE),
89 .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE
92 }, {
93 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
94 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
95 .length = SZ_4K,
96 .type = MT_DEVICE
97 }, {
98 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
99 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
100 .length = SZ_4K,
101 .type = MT_DEVICE
102 }, {
103 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
104 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
105 .length = SZ_4K,
106 .type = MT_DEVICE
107 }, {
108 .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE),
109 .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE),
110 .length = SZ_4K,
111 .type = MT_DEVICE
112 }, {
113 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
114 .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
115 .length = SZ_4K,
116 .type = MT_DEVICE
117 }, {
118 .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
119 .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
120 .length = SZ_4K,
121 .type = MT_DEVICE
122 }, {
123 .virtual = 0xfca00000,
124 .pfn = __phys_to_pfn(0xca000000),
125 .length = SZ_4K,
126 .type = MT_DEVICE
127 }, {
128 .virtual = 0xfcb00000,
129 .pfn = __phys_to_pfn(0xcb000000),
130 .length = SZ_4K,
131 .type = MT_DEVICE
132 }
88}; 133};
89 134
90static void __init intcp_map_io(void) 135static void __init intcp_map_io(void)
diff --git a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c
index 0f921ba2750c..bb5091223b63 100644
--- a/arch/arm/mach-iop3xx/iop321-setup.c
+++ b/arch/arm/mach-iop3xx/iop321-setup.c
@@ -38,13 +38,17 @@
38 * Standard IO mapping for all IOP321 based systems 38 * Standard IO mapping for all IOP321 based systems
39 */ 39 */
40static struct map_desc iop321_std_desc[] __initdata = { 40static struct map_desc iop321_std_desc[] __initdata = {
41 /* virtual physical length type */ 41 { /* mem mapped registers */
42 42 .virtual = IOP321_VIRT_MEM_BASE,
43 /* mem mapped registers */ 43 .pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
44 { IOP321_VIRT_MEM_BASE, IOP321_PHYS_MEM_BASE, 0x00002000, MT_DEVICE }, 44 .length = 0x00002000,
45 45 .type = MT_DEVICE
46 /* PCI IO space */ 46 }, { /* PCI IO space */
47 { IOP321_PCI_LOWER_IO_VA, IOP321_PCI_LOWER_IO_PA, IOP321_PCI_IO_WINDOW_SIZE, MT_DEVICE } 47 .virtual = IOP321_PCI_LOWER_IO_VA,
48 .pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
49 .length = IOP321_PCI_IO_WINDOW_SIZE,
50 .type = MT_DEVICE
51 }
48}; 52};
49 53
50#ifdef CONFIG_ARCH_IQ80321 54#ifdef CONFIG_ARCH_IQ80321
diff --git a/arch/arm/mach-iop3xx/iop331-setup.c b/arch/arm/mach-iop3xx/iop331-setup.c
index fc74b722f72f..a2533c3ab42f 100644
--- a/arch/arm/mach-iop3xx/iop331-setup.c
+++ b/arch/arm/mach-iop3xx/iop331-setup.c
@@ -37,13 +37,17 @@
37 * Standard IO mapping for all IOP331 based systems 37 * Standard IO mapping for all IOP331 based systems
38 */ 38 */
39static struct map_desc iop331_std_desc[] __initdata = { 39static struct map_desc iop331_std_desc[] __initdata = {
40 /* virtual physical length type */ 40 { /* mem mapped registers */
41 41 .virtual = IOP331_VIRT_MEM_BASE,
42 /* mem mapped registers */ 42 .pfn = __phys_to_pfn(IOP331_PHYS_MEM_BASE),
43 { IOP331_VIRT_MEM_BASE, IOP331_PHYS_MEM_BASE, 0x00002000, MT_DEVICE }, 43 .length = 0x00002000,
44 44 .type = MT_DEVICE
45 /* PCI IO space */ 45 }, { /* PCI IO space */
46 { IOP331_PCI_LOWER_IO_VA, IOP331_PCI_LOWER_IO_PA, IOP331_PCI_IO_WINDOW_SIZE, MT_DEVICE } 46 .virtual = IOP331_PCI_LOWER_IO_VA,
47 .pfn = __phys_to_pfn(IOP331_PCI_LOWER_IO_PA),
48 .length = IOP331_PCI_IO_WINDOW_SIZE,
49 .type = MT_DEVICE
50 }
47}; 51};
48 52
49static struct uart_port iop331_serial_ports[] = { 53static struct uart_port iop331_serial_ports[] = {
diff --git a/arch/arm/mach-iop3xx/iq31244-mm.c b/arch/arm/mach-iop3xx/iq31244-mm.c
index 55992ab586ba..e874b54eefe3 100644
--- a/arch/arm/mach-iop3xx/iq31244-mm.c
+++ b/arch/arm/mach-iop3xx/iq31244-mm.c
@@ -29,10 +29,12 @@
29 * We use RedBoot's setup for the onboard devices. 29 * We use RedBoot's setup for the onboard devices.
30 */ 30 */
31static struct map_desc iq31244_io_desc[] __initdata = { 31static struct map_desc iq31244_io_desc[] __initdata = {
32 /* virtual physical length type */ 32 { /* on-board devices */
33 33 .virtual = IQ31244_UART,
34 /* on-board devices */ 34 .pfn = __phys_to_pfn(IQ31244_UART),
35 { IQ31244_UART, IQ31244_UART, 0x00100000, MT_DEVICE } 35 .length = 0x00100000,
36 .type = MT_DEVICE
37 }
36}; 38};
37 39
38void __init iq31244_map_io(void) 40void __init iq31244_map_io(void)
diff --git a/arch/arm/mach-iop3xx/iq80321-mm.c b/arch/arm/mach-iop3xx/iq80321-mm.c
index bb3e9e5a9aff..d9cac5e1fc3d 100644
--- a/arch/arm/mach-iop3xx/iq80321-mm.c
+++ b/arch/arm/mach-iop3xx/iq80321-mm.c
@@ -29,10 +29,12 @@
29 * We use RedBoot's setup for the onboard devices. 29 * We use RedBoot's setup for the onboard devices.
30 */ 30 */
31static struct map_desc iq80321_io_desc[] __initdata = { 31static struct map_desc iq80321_io_desc[] __initdata = {
32 /* virtual physical length type */ 32 { /* on-board devices */
33 33 .virtual = IQ80321_UART,
34 /* on-board devices */ 34 .pfn = __phys_to_pfn(IQ80321_UART),
35 { IQ80321_UART, IQ80321_UART, 0x00100000, MT_DEVICE } 35 .length = 0x00100000,
36 .type = MT_DEVICE
37 }
36}; 38};
37 39
38void __init iq80321_map_io(void) 40void __init iq80321_map_io(void)
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index f4d7f1f6ef85..01c393c504d0 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -83,42 +83,42 @@ void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
83static struct map_desc ixp2000_io_desc[] __initdata = { 83static struct map_desc ixp2000_io_desc[] __initdata = {
84 { 84 {
85 .virtual = IXP2000_CAP_VIRT_BASE, 85 .virtual = IXP2000_CAP_VIRT_BASE,
86 .physical = IXP2000_CAP_PHYS_BASE, 86 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
87 .length = IXP2000_CAP_SIZE, 87 .length = IXP2000_CAP_SIZE,
88 .type = MT_DEVICE 88 .type = MT_DEVICE
89 }, { 89 }, {
90 .virtual = IXP2000_INTCTL_VIRT_BASE, 90 .virtual = IXP2000_INTCTL_VIRT_BASE,
91 .physical = IXP2000_INTCTL_PHYS_BASE, 91 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
92 .length = IXP2000_INTCTL_SIZE, 92 .length = IXP2000_INTCTL_SIZE,
93 .type = MT_DEVICE 93 .type = MT_DEVICE
94 }, { 94 }, {
95 .virtual = IXP2000_PCI_CREG_VIRT_BASE, 95 .virtual = IXP2000_PCI_CREG_VIRT_BASE,
96 .physical = IXP2000_PCI_CREG_PHYS_BASE, 96 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
97 .length = IXP2000_PCI_CREG_SIZE, 97 .length = IXP2000_PCI_CREG_SIZE,
98 .type = MT_DEVICE 98 .type = MT_DEVICE
99 }, { 99 }, {
100 .virtual = IXP2000_PCI_CSR_VIRT_BASE, 100 .virtual = IXP2000_PCI_CSR_VIRT_BASE,
101 .physical = IXP2000_PCI_CSR_PHYS_BASE, 101 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
102 .length = IXP2000_PCI_CSR_SIZE, 102 .length = IXP2000_PCI_CSR_SIZE,
103 .type = MT_DEVICE 103 .type = MT_DEVICE
104 }, { 104 }, {
105 .virtual = IXP2000_MSF_VIRT_BASE, 105 .virtual = IXP2000_MSF_VIRT_BASE,
106 .physical = IXP2000_MSF_PHYS_BASE, 106 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
107 .length = IXP2000_MSF_SIZE, 107 .length = IXP2000_MSF_SIZE,
108 .type = MT_DEVICE 108 .type = MT_DEVICE
109 }, { 109 }, {
110 .virtual = IXP2000_PCI_IO_VIRT_BASE, 110 .virtual = IXP2000_PCI_IO_VIRT_BASE,
111 .physical = IXP2000_PCI_IO_PHYS_BASE, 111 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
112 .length = IXP2000_PCI_IO_SIZE, 112 .length = IXP2000_PCI_IO_SIZE,
113 .type = MT_DEVICE 113 .type = MT_DEVICE
114 }, { 114 }, {
115 .virtual = IXP2000_PCI_CFG0_VIRT_BASE, 115 .virtual = IXP2000_PCI_CFG0_VIRT_BASE,
116 .physical = IXP2000_PCI_CFG0_PHYS_BASE, 116 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
117 .length = IXP2000_PCI_CFG0_SIZE, 117 .length = IXP2000_PCI_CFG0_SIZE,
118 .type = MT_DEVICE 118 .type = MT_DEVICE
119 }, { 119 }, {
120 .virtual = IXP2000_PCI_CFG1_VIRT_BASE, 120 .virtual = IXP2000_PCI_CFG1_VIRT_BASE,
121 .physical = IXP2000_PCI_CFG1_PHYS_BASE, 121 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
122 .length = IXP2000_PCI_CFG1_SIZE, 122 .length = IXP2000_PCI_CFG1_SIZE,
123 .type = MT_DEVICE 123 .type = MT_DEVICE
124 } 124 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 63ba0191aa65..8b4a839b6279 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -176,7 +176,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long
176 *************************************************************************/ 176 *************************************************************************/
177static struct map_desc ixdp2x00_io_desc __initdata = { 177static struct map_desc ixdp2x00_io_desc __initdata = {
178 .virtual = IXDP2X00_VIRT_CPLD_BASE, 178 .virtual = IXDP2X00_VIRT_CPLD_BASE,
179 .physical = IXDP2X00_PHYS_CPLD_BASE, 179 .pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
180 .length = IXDP2X00_CPLD_SIZE, 180 .length = IXDP2X00_CPLD_SIZE,
181 .type = MT_DEVICE 181 .type = MT_DEVICE
182}; 182};
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 7a5109921287..fee1d7b73503 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -136,7 +136,7 @@ void __init ixdp2x01_init_irq(void)
136 *************************************************************************/ 136 *************************************************************************/
137static struct map_desc ixdp2x01_io_desc __initdata = { 137static struct map_desc ixdp2x01_io_desc __initdata = {
138 .virtual = IXDP2X01_VIRT_CPLD_BASE, 138 .virtual = IXDP2X01_VIRT_CPLD_BASE,
139 .physical = IXDP2X01_PHYS_CPLD_BASE, 139 .pfn = __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE),
140 .length = IXDP2X01_CPLD_REGION_SIZE, 140 .length = IXDP2X01_CPLD_REGION_SIZE,
141 .type = MT_DEVICE 141 .type = MT_DEVICE
142}; 142};
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 36b6045213ee..6c396447c4e0 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -44,24 +44,24 @@
44static struct map_desc ixp4xx_io_desc[] __initdata = { 44static struct map_desc ixp4xx_io_desc[] __initdata = {
45 { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */ 45 { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
46 .virtual = IXP4XX_PERIPHERAL_BASE_VIRT, 46 .virtual = IXP4XX_PERIPHERAL_BASE_VIRT,
47 .physical = IXP4XX_PERIPHERAL_BASE_PHYS, 47 .pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
48 .length = IXP4XX_PERIPHERAL_REGION_SIZE, 48 .length = IXP4XX_PERIPHERAL_REGION_SIZE,
49 .type = MT_DEVICE 49 .type = MT_DEVICE
50 }, { /* Expansion Bus Config Registers */ 50 }, { /* Expansion Bus Config Registers */
51 .virtual = IXP4XX_EXP_CFG_BASE_VIRT, 51 .virtual = IXP4XX_EXP_CFG_BASE_VIRT,
52 .physical = IXP4XX_EXP_CFG_BASE_PHYS, 52 .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
53 .length = IXP4XX_EXP_CFG_REGION_SIZE, 53 .length = IXP4XX_EXP_CFG_REGION_SIZE,
54 .type = MT_DEVICE 54 .type = MT_DEVICE
55 }, { /* PCI Registers */ 55 }, { /* PCI Registers */
56 .virtual = IXP4XX_PCI_CFG_BASE_VIRT, 56 .virtual = IXP4XX_PCI_CFG_BASE_VIRT,
57 .physical = IXP4XX_PCI_CFG_BASE_PHYS, 57 .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
58 .length = IXP4XX_PCI_CFG_REGION_SIZE, 58 .length = IXP4XX_PCI_CFG_REGION_SIZE,
59 .type = MT_DEVICE 59 .type = MT_DEVICE
60 }, 60 },
61#ifdef CONFIG_DEBUG_LL 61#ifdef CONFIG_DEBUG_LL
62 { /* Debug UART mapping */ 62 { /* Debug UART mapping */
63 .virtual = IXP4XX_DEBUG_UART_BASE_VIRT, 63 .virtual = IXP4XX_DEBUG_UART_BASE_VIRT,
64 .physical = IXP4XX_DEBUG_UART_BASE_PHYS, 64 .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
65 .length = IXP4XX_DEBUG_UART_REGION_SIZE, 65 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
66 .type = MT_DEVICE 66 .type = MT_DEVICE
67 } 67 }
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index cb3dcd3bd00a..19f2fa2244c4 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -26,8 +26,17 @@
26 /* This function calls the board specific IRQ initialization function. */ 26 /* This function calls the board specific IRQ initialization function. */
27 27
28static struct map_desc kev7a400_io_desc[] __initdata = { 28static struct map_desc kev7a400_io_desc[] __initdata = {
29 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 29 {
30 { CPLD_VIRT, CPLD_PHYS, CPLD_SIZE, MT_DEVICE }, 30 .virtual = IO_VIRT,
31 .pfn = __phys_to_pfn(IO_PHYS),
32 .length = IO_SIZE,
33 .type = MT_DEVICE
34 }, {
35 .virtual = CPLD_VIRT,
36 .pfn = __phys_to_pfn(CPLD_PHYS),
37 .length = CPLD_SIZE,
38 .type = MT_DEVICE
39 }
31}; 40};
32 41
33void __init kev7a400_map_io(void) 42void __init kev7a400_map_io(void)
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 6eb61a17c63b..a20eabc132b0 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -227,23 +227,79 @@ void __init lh7a40x_init_board_irq (void)
227} 227}
228 228
229static struct map_desc lpd7a400_io_desc[] __initdata = { 229static struct map_desc lpd7a400_io_desc[] __initdata = {
230 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 230 {
231 /* Mapping added to work around chip select problems */ 231 .virtual = IO_VIRT,
232 { IOBARRIER_VIRT, IOBARRIER_PHYS, IOBARRIER_SIZE, MT_DEVICE }, 232 .pfn = __phys_to_pfn(IO_PHYS),
233 { CF_VIRT, CF_PHYS, CF_SIZE, MT_DEVICE }, 233 .length = IO_SIZE,
234 .type = MT_DEVICE
235 }, { /* Mapping added to work around chip select problems */
236 .virtual = IOBARRIER_VIRT,
237 .pfn = __phys_to_pfn(IOBARRIER_PHYS),
238 .length = IOBARRIER_SIZE,
239 .type = MT_DEVICE
240 }, {
241 .virtual = CF_VIRT,
242 .pfn = __phys_to_pfn(CF_PHYS),
243 .length = CF_SIZE,
244 .type = MT_DEVICE
245 }, {
246 .virtual = CPLD02_VIRT,
247 .pfn = __phys_to_pfn(CPLD02_PHYS),
248 .length = CPLD02_SIZE,
249 .type = MT_DEVICE
250 }, {
251 .virtual = CPLD06_VIRT,
252 .pfn = __phys_to_pfn(CPLD06_PHYS),
253 .length = CPLD06_SIZE,
254 .type = MT_DEVICE
255 }, {
256 .virtual = CPLD08_VIRT,
257 .pfn = __phys_to_pfn(CPLD08_PHYS),
258 .length = CPLD08_SIZE,
259 .type = MT_DEVICE
260 }, {
261 .virtual = CPLD0C_VIRT,
262 .pfn = __phys_to_pfn(CPLD0C_PHYS),
263 .length = CPLD0C_SIZE,
264 .type = MT_DEVICE
265 }, {
266 .virtual = CPLD0E_VIRT,
267 .pfn = __phys_to_pfn(CPLD0E_PHYS),
268 .length = CPLD0E_SIZE,
269 .type = MT_DEVICE
270 }, {
271 .virtual = CPLD10_VIRT,
272 .pfn = __phys_to_pfn(CPLD10_PHYS),
273 .length = CPLD10_SIZE,
274 .type = MT_DEVICE
275 }, {
276 .virtual = CPLD12_VIRT,
277 .pfn = __phys_to_pfn(CPLD12_PHYS),
278 .length = CPLD12_SIZE,
279 .type = MT_DEVICE
280 }, {
281 .virtual = CPLD14_VIRT,
282 .pfn = __phys_to_pfn(CPLD14_PHYS),
283 .length = CPLD14_SIZE,
284 .type = MT_DEVICE
285 }, {
286 .virtual = CPLD16_VIRT,
287 .pfn = __phys_to_pfn(CPLD16_PHYS),
288 .length = CPLD16_SIZE,
289 .type = MT_DEVICE
290 }, {
291 .virtual = CPLD18_VIRT,
292 .pfn = __phys_to_pfn(CPLD18_PHYS),
293 .length = CPLD18_SIZE,
294 .type = MT_DEVICE
295 }, {
296 .virtual = CPLD1A_VIRT,
297 .pfn = __phys_to_pfn(CPLD1A_PHYS),
298 .length = CPLD1A_SIZE,
299 .type = MT_DEVICE
300 },
234 /* This mapping is redundant since the smc driver performs another. */ 301 /* This mapping is redundant since the smc driver performs another. */
235/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ 302/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */
236 { CPLD02_VIRT, CPLD02_PHYS, CPLD02_SIZE, MT_DEVICE },
237 { CPLD06_VIRT, CPLD06_PHYS, CPLD06_SIZE, MT_DEVICE },
238 { CPLD08_VIRT, CPLD08_PHYS, CPLD08_SIZE, MT_DEVICE },
239 { CPLD0C_VIRT, CPLD0C_PHYS, CPLD0C_SIZE, MT_DEVICE },
240 { CPLD0E_VIRT, CPLD0E_PHYS, CPLD0E_SIZE, MT_DEVICE },
241 { CPLD10_VIRT, CPLD10_PHYS, CPLD10_SIZE, MT_DEVICE },
242 { CPLD12_VIRT, CPLD12_PHYS, CPLD12_SIZE, MT_DEVICE },
243 { CPLD14_VIRT, CPLD14_PHYS, CPLD14_SIZE, MT_DEVICE },
244 { CPLD16_VIRT, CPLD16_PHYS, CPLD16_SIZE, MT_DEVICE },
245 { CPLD18_VIRT, CPLD18_PHYS, CPLD18_SIZE, MT_DEVICE },
246 { CPLD1A_VIRT, CPLD1A_PHYS, CPLD1A_SIZE, MT_DEVICE },
247}; 303};
248 304
249void __init 305void __init
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index df0312b596e4..fd9183ff2ed5 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -103,8 +103,12 @@ static struct platform_device innovator_flash_device = {
103 103
104/* Only FPGA needs to be mapped here. All others are done with ioremap */ 104/* Only FPGA needs to be mapped here. All others are done with ioremap */
105static struct map_desc innovator1510_io_desc[] __initdata = { 105static struct map_desc innovator1510_io_desc[] __initdata = {
106{ OMAP1510_FPGA_BASE, OMAP1510_FPGA_START, OMAP1510_FPGA_SIZE, 106 {
107 MT_DEVICE }, 107 .virtual = OMAP1510_FPGA_BASE,
108 .pfn = __phys_to_pfn(OMAP1510_FPGA_START),
109 .length = OMAP1510_FPGA_SIZE,
110 .type = MT_DEVICE
111 }
108}; 112};
109 113
110static struct resource innovator1510_smc91x_resources[] = { 114static struct resource innovator1510_smc91x_resources[] = {
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 107c68c8ab54..2ba26e239108 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -134,8 +134,12 @@ void omap_perseus2_init_irq(void)
134 134
135/* Only FPGA needs to be mapped here. All others are done with ioremap */ 135/* Only FPGA needs to be mapped here. All others are done with ioremap */
136static struct map_desc omap_perseus2_io_desc[] __initdata = { 136static struct map_desc omap_perseus2_io_desc[] __initdata = {
137 {H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE, 137 {
138 MT_DEVICE}, 138 .virtual = H2P2_DBG_FPGA_BASE,
139 .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
140 .length = H2P2_DBG_FPGA_SIZE,
141 .type = MT_DEVICE
142 }
139}; 143};
140 144
141static void __init omap_perseus2_map_io(void) 145static void __init omap_perseus2_map_io(void)
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index eb8261d7dead..79fb86535ebc 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -26,27 +26,59 @@ extern void omap_sram_init(void);
26 * default mapping provided here. 26 * default mapping provided here.
27 */ 27 */
28static struct map_desc omap_io_desc[] __initdata = { 28static struct map_desc omap_io_desc[] __initdata = {
29 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, 29 {
30 .virtual = IO_VIRT,
31 .pfn = __phys_to_pfn(IO_PHYS),
32 .length = IO_SIZE,
33 .type = MT_DEVICE
34 }
30}; 35};
31 36
32#ifdef CONFIG_ARCH_OMAP730 37#ifdef CONFIG_ARCH_OMAP730
33static struct map_desc omap730_io_desc[] __initdata = { 38static struct map_desc omap730_io_desc[] __initdata = {
34 { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE }, 39 {
35 { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE }, 40 .virtual = OMAP730_DSP_BASE,
41 .pfn = __phys_to_pfn(OMAP730_DSP_START),
42 .length = OMAP730_DSP_SIZE,
43 .type = MT_DEVICE
44 }, {
45 .virtual = OMAP730_DSPREG_BASE,
46 .pfn = __phys_to_pfn(OMAP730_DSPREG_START),
47 .length = OMAP730_DSPREG_SIZE,
48 .type = MT_DEVICE
49 }
36}; 50};
37#endif 51#endif
38 52
39#ifdef CONFIG_ARCH_OMAP1510 53#ifdef CONFIG_ARCH_OMAP1510
40static struct map_desc omap1510_io_desc[] __initdata = { 54static struct map_desc omap1510_io_desc[] __initdata = {
41 { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE }, 55 {
42 { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE }, 56 .virtual = OMAP1510_DSP_BASE,
57 .pfn = __phys_to_pfn(OMAP1510_DSP_START),
58 .length = OMAP1510_DSP_SIZE,
59 .type = MT_DEVICE
60 }, {
61 .virtual = OMAP1510_DSPREG_BASE,
62 .pfn = __phys_to_pfn(OMAP1510_DSPREG_START),
63 .length = OMAP1510_DSPREG_SIZE,
64 .type = MT_DEVICE
65 }
43}; 66};
44#endif 67#endif
45 68
46#if defined(CONFIG_ARCH_OMAP16XX) 69#if defined(CONFIG_ARCH_OMAP16XX)
47static struct map_desc omap16xx_io_desc[] __initdata = { 70static struct map_desc omap16xx_io_desc[] __initdata = {
48 { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, 71 {
49 { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, 72 .virtual = OMAP16XX_DSP_BASE,
73 .pfn = __phys_to_pfn(OMAP16XX_DSP_START),
74 .length = OMAP16XX_DSP_SIZE,
75 .type = MT_DEVICE
76 }, {
77 .virtual = OMAP16XX_DSPREG_BASE,
78 .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START),
79 .length = OMAP16XX_DSPREG_SIZE,
80 .type = MT_DEVICE
81 }
50}; 82};
51#endif 83#endif
52 84
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 1d7677669a76..3248bc9b9495 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -34,6 +34,7 @@
34#include <asm/arch/udc.h> 34#include <asm/arch/udc.h>
35#include <asm/arch/pxafb.h> 35#include <asm/arch/pxafb.h>
36#include <asm/arch/mmc.h> 36#include <asm/arch/mmc.h>
37#include <asm/arch/irda.h>
37#include <asm/arch/i2c.h> 38#include <asm/arch/i2c.h>
38 39
39#include "generic.h" 40#include "generic.h"
@@ -92,14 +93,42 @@ EXPORT_SYMBOL(pxa_set_cken);
92 * and cache flush area. 93 * and cache flush area.
93 */ 94 */
94static struct map_desc standard_io_desc[] __initdata = { 95static struct map_desc standard_io_desc[] __initdata = {
95 /* virtual physical length type */ 96 { /* Devs */
96 { 0xf2000000, 0x40000000, 0x02000000, MT_DEVICE }, /* Devs */ 97 .virtual = 0xf2000000,
97 { 0xf4000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */ 98 .pfn = __phys_to_pfn(0x40000000),
98 { 0xf6000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */ 99 .length = 0x02000000,
99 { 0xf8000000, 0x4c000000, 0x00100000, MT_DEVICE }, /* USB host */ 100 .type = MT_DEVICE
100 { 0xfa000000, 0x50000000, 0x00100000, MT_DEVICE }, /* Camera */ 101 }, { /* LCD */
101 { 0xfe000000, 0x58000000, 0x00100000, MT_DEVICE }, /* IMem ctl */ 102 .virtual = 0xf4000000,
102 { 0xff000000, 0x00000000, 0x00100000, MT_DEVICE } /* UNCACHED_PHYS_0 */ 103 .pfn = __phys_to_pfn(0x44000000),
104 .length = 0x00100000,
105 .type = MT_DEVICE
106 }, { /* Mem Ctl */
107 .virtual = 0xf6000000,
108 .pfn = __phys_to_pfn(0x48000000),
109 .length = 0x00100000,
110 .type = MT_DEVICE
111 }, { /* USB host */
112 .virtual = 0xf8000000,
113 .pfn = __phys_to_pfn(0x4c000000),
114 .length = 0x00100000,
115 .type = MT_DEVICE
116 }, { /* Camera */
117 .virtual = 0xfa000000,
118 .pfn = __phys_to_pfn(0x50000000),
119 .length = 0x00100000,
120 .type = MT_DEVICE
121 }, { /* IMem ctl */
122 .virtual = 0xfe000000,
123 .pfn = __phys_to_pfn(0x58000000),
124 .length = 0x00100000,
125 .type = MT_DEVICE
126 }, { /* UNCACHED_PHYS_0 */
127 .virtual = 0xff000000,
128 .pfn = __phys_to_pfn(0x00000000),
129 .length = 0x00100000,
130 .type = MT_DEVICE
131 }
103}; 132};
104 133
105void __init pxa_map_io(void) 134void __init pxa_map_io(void)
@@ -225,6 +254,10 @@ static struct platform_device stuart_device = {
225 .name = "pxa2xx-uart", 254 .name = "pxa2xx-uart",
226 .id = 2, 255 .id = 2,
227}; 256};
257static struct platform_device hwuart_device = {
258 .name = "pxa2xx-uart",
259 .id = 3,
260};
228 261
229static struct resource i2c_resources[] = { 262static struct resource i2c_resources[] = {
230 { 263 {
@@ -265,10 +298,26 @@ static struct resource i2s_resources[] = {
265static struct platform_device i2s_device = { 298static struct platform_device i2s_device = {
266 .name = "pxa2xx-i2s", 299 .name = "pxa2xx-i2s",
267 .id = -1, 300 .id = -1,
268 .resource = i2c_resources, 301 .resource = i2s_resources,
269 .num_resources = ARRAY_SIZE(i2s_resources), 302 .num_resources = ARRAY_SIZE(i2s_resources),
270}; 303};
271 304
305static u64 pxaficp_dmamask = ~(u32)0;
306
307static struct platform_device pxaficp_device = {
308 .name = "pxa2xx-ir",
309 .id = -1,
310 .dev = {
311 .dma_mask = &pxaficp_dmamask,
312 .coherent_dma_mask = 0xffffffff,
313 },
314};
315
316void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
317{
318 pxaficp_device.dev.platform_data = info;
319}
320
272static struct platform_device *devices[] __initdata = { 321static struct platform_device *devices[] __initdata = {
273 &pxamci_device, 322 &pxamci_device,
274 &udc_device, 323 &udc_device,
@@ -276,13 +325,26 @@ static struct platform_device *devices[] __initdata = {
276 &ffuart_device, 325 &ffuart_device,
277 &btuart_device, 326 &btuart_device,
278 &stuart_device, 327 &stuart_device,
328 &pxaficp_device,
279 &i2c_device, 329 &i2c_device,
280 &i2s_device, 330 &i2s_device,
281}; 331};
282 332
283static int __init pxa_init(void) 333static int __init pxa_init(void)
284{ 334{
285 return platform_add_devices(devices, ARRAY_SIZE(devices)); 335 int cpuid, ret;
336
337 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
338 if (ret)
339 return ret;
340
341 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
342 cpuid = read_cpuid(CPUID_ID);
343 if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
344 ((cpuid >> 4) & 0xfff) == 0x290)
345 ret = platform_device_register(&hwuart_device);
346
347 return ret;
286} 348}
287 349
288subsys_initcall(pxa_init); 350subsys_initcall(pxa_init);
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 386e107b53cc..01a83ab09ac3 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -152,16 +152,17 @@ static void __init idp_init_irq(void)
152} 152}
153 153
154static struct map_desc idp_io_desc[] __initdata = { 154static struct map_desc idp_io_desc[] __initdata = {
155 /* virtual physical length type */ 155 {
156 156 .virtual = IDP_COREVOLT_VIRT,
157 { IDP_COREVOLT_VIRT, 157 .pfn = __phys_to_pfn(IDP_COREVOLT_PHYS),
158 IDP_COREVOLT_PHYS, 158 .length = IDP_COREVOLT_SIZE,
159 IDP_COREVOLT_SIZE, 159 .type = MT_DEVICE
160 MT_DEVICE }, 160 }, {
161 { IDP_CPLD_VIRT, 161 .virtual = IDP_CPLD_VIRT,
162 IDP_CPLD_PHYS, 162 .pfn = __phys_to_pfn(IDP_CPLD_PHYS),
163 IDP_CPLD_SIZE, 163 .length = IDP_CPLD_SIZE,
164 MT_DEVICE } 164 .type = MT_DEVICE
165 }
165}; 166};
166 167
167static void __init idp_map_io(void) 168static void __init idp_map_io(void)
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 1f38033921e9..beccf455f796 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -35,6 +35,7 @@
35#include <asm/arch/pxa-regs.h> 35#include <asm/arch/pxa-regs.h>
36#include <asm/arch/lubbock.h> 36#include <asm/arch/lubbock.h>
37#include <asm/arch/udc.h> 37#include <asm/arch/udc.h>
38#include <asm/arch/irda.h>
38#include <asm/arch/pxafb.h> 39#include <asm/arch/pxafb.h>
39#include <asm/arch/mmc.h> 40#include <asm/arch/mmc.h>
40 41
@@ -237,16 +238,40 @@ static struct pxamci_platform_data lubbock_mci_platform_data = {
237 .init = lubbock_mci_init, 238 .init = lubbock_mci_init,
238}; 239};
239 240
241static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
242{
243 unsigned long flags;
244
245 local_irq_save(flags);
246 if (mode & IR_SIRMODE) {
247 LUB_MISC_WR &= ~(1 << 4);
248 } else if (mode & IR_FIRMODE) {
249 LUB_MISC_WR |= 1 << 4;
250 }
251 local_irq_restore(flags);
252}
253
254static struct pxaficp_platform_data lubbock_ficp_platform_data = {
255 .transceiver_cap = IR_SIRMODE | IR_FIRMODE,
256 .transceiver_mode = lubbock_irda_transceiver_mode,
257};
258
240static void __init lubbock_init(void) 259static void __init lubbock_init(void)
241{ 260{
242 pxa_set_udc_info(&udc_info); 261 pxa_set_udc_info(&udc_info);
243 set_pxa_fb_info(&sharp_lm8v31); 262 set_pxa_fb_info(&sharp_lm8v31);
244 pxa_set_mci_info(&lubbock_mci_platform_data); 263 pxa_set_mci_info(&lubbock_mci_platform_data);
264 pxa_set_ficp_info(&lubbock_ficp_platform_data);
245 (void) platform_add_devices(devices, ARRAY_SIZE(devices)); 265 (void) platform_add_devices(devices, ARRAY_SIZE(devices));
246} 266}
247 267
248static struct map_desc lubbock_io_desc[] __initdata = { 268static struct map_desc lubbock_io_desc[] __initdata = {
249 { LUBBOCK_FPGA_VIRT, LUBBOCK_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ 269 { /* CPLD */
270 .virtual = LUBBOCK_FPGA_VIRT,
271 .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS),
272 .length = 0x00100000,
273 .type = MT_DEVICE
274 }
250}; 275};
251 276
252static void __init lubbock_map_io(void) 277static void __init lubbock_map_io(void)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 85fdb5b1470a..a48c64026e1f 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -37,6 +37,7 @@
37#include <asm/arch/audio.h> 37#include <asm/arch/audio.h>
38#include <asm/arch/pxafb.h> 38#include <asm/arch/pxafb.h>
39#include <asm/arch/mmc.h> 39#include <asm/arch/mmc.h>
40#include <asm/arch/irda.h>
40 41
41#include "generic.h" 42#include "generic.h"
42 43
@@ -294,6 +295,29 @@ static struct pxamci_platform_data mainstone_mci_platform_data = {
294 .exit = mainstone_mci_exit, 295 .exit = mainstone_mci_exit,
295}; 296};
296 297
298static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
299{
300 unsigned long flags;
301
302 local_irq_save(flags);
303 if (mode & IR_SIRMODE) {
304 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
305 } else if (mode & IR_FIRMODE) {
306 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
307 }
308 if (mode & IR_OFF) {
309 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
310 } else {
311 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
312 }
313 local_irq_restore(flags);
314}
315
316static struct pxaficp_platform_data mainstone_ficp_platform_data = {
317 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
318 .transceiver_mode = mainstone_irda_transceiver_mode,
319};
320
297static void __init mainstone_init(void) 321static void __init mainstone_init(void)
298{ 322{
299 /* 323 /*
@@ -313,11 +337,17 @@ static void __init mainstone_init(void)
313 set_pxa_fb_info(&toshiba_ltm035a776c); 337 set_pxa_fb_info(&toshiba_ltm035a776c);
314 338
315 pxa_set_mci_info(&mainstone_mci_platform_data); 339 pxa_set_mci_info(&mainstone_mci_platform_data);
340 pxa_set_ficp_info(&mainstone_ficp_platform_data);
316} 341}
317 342
318 343
319static struct map_desc mainstone_io_desc[] __initdata = { 344static struct map_desc mainstone_io_desc[] __initdata = {
320 { MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ 345 { /* CPLD */
346 .virtual = MST_FPGA_VIRT,
347 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
348 .length = 0x00100000,
349 .type = MT_DEVICE
350 }
321}; 351};
322 352
323static void __init mainstone_map_io(void) 353static void __init mainstone_map_io(void)
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 7869c3b4e62f..573a5758e781 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -129,7 +129,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
129 case PM_SUSPEND_MEM: 129 case PM_SUSPEND_MEM:
130 /* set resume return address */ 130 /* set resume return address */
131 PSPR = virt_to_phys(pxa_cpu_resume); 131 PSPR = virt_to_phys(pxa_cpu_resume);
132 pxa_cpu_suspend(3); 132 pxa_cpu_suspend(PWRMODE_SLEEP);
133 break; 133 break;
134 } 134 }
135} 135}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 9a791b07118d..09a5d593f04b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -157,7 +157,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
157 case PM_SUSPEND_MEM: 157 case PM_SUSPEND_MEM:
158 /* set resume return address */ 158 /* set resume return address */
159 PSPR = virt_to_phys(pxa_cpu_resume); 159 PSPR = virt_to_phys(pxa_cpu_resume);
160 pxa_cpu_suspend(3); 160 pxa_cpu_suspend(PWRMODE_SLEEP);
161 break; 161 break;
162 } 162 }
163} 163}
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 5786ccad938c..c9862688ff3d 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -28,7 +28,9 @@
28/* 28/*
29 * pxa_cpu_suspend() 29 * pxa_cpu_suspend()
30 * 30 *
31 * Forces CPU into sleep state 31 * Forces CPU into sleep state.
32 *
33 * r0 = value for PWRMODE M field for desired sleep state
32 */ 34 */
33 35
34ENTRY(pxa_cpu_suspend) 36ENTRY(pxa_cpu_suspend)
@@ -53,6 +55,7 @@ ENTRY(pxa_cpu_suspend)
53 mov r10, sp 55 mov r10, sp
54 stmfd sp!, {r3 - r10} 56 stmfd sp!, {r3 - r10}
55 57
58 mov r5, r0 @ save sleep mode
56 @ preserve phys address of stack 59 @ preserve phys address of stack
57 mov r0, sp 60 mov r0, sp
58 bl sleep_phys_sp 61 bl sleep_phys_sp
@@ -66,7 +69,7 @@ ENTRY(pxa_cpu_suspend)
66 @ (also workaround for sighting 28071) 69 @ (also workaround for sighting 28071)
67 70
68 @ prepare value for sleep mode 71 @ prepare value for sleep mode
69 mov r1, #3 @ sleep mode 72 mov r1, r5 @ sleep mode
70 73
71 @ prepare pointer to physical address 0 (virtual mapping in generic.c) 74 @ prepare pointer to physical address 0 (virtual mapping in generic.c)
72 mov r2, #UNCACHED_PHYS_0 75 mov r2, #UNCACHED_PHYS_0
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S
index 8a3f27b76784..6f6dbbd08021 100644
--- a/arch/arm/mach-pxa/standby.S
+++ b/arch/arm/mach-pxa/standby.S
@@ -21,7 +21,7 @@
21ENTRY(pxa_cpu_standby) 21ENTRY(pxa_cpu_standby)
22 ldr r0, =PSSR 22 ldr r0, =PSSR
23 mov r1, #(PSSR_PH | PSSR_STS) 23 mov r1, #(PSSR_PH | PSSR_STS)
24 mov r2, #2 24 mov r2, #PWRMODE_STANDBY
25 mov r3, #UNCACHED_PHYS_0 @ Read mem context in. 25 mov r3, #UNCACHED_PHYS_0 @ Read mem context in.
26 ldr ip, [r3] 26 ldr ip, [r3]
27 b 1f 27 b 1f
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index e3587efec4bf..5c4ac1c008a6 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -61,9 +61,22 @@ static int __init parse_tag_acorn(const struct tag *tag)
61__tagtable(ATAG_ACORN, parse_tag_acorn); 61__tagtable(ATAG_ACORN, parse_tag_acorn);
62 62
63static struct map_desc rpc_io_desc[] __initdata = { 63static struct map_desc rpc_io_desc[] __initdata = {
64 { SCREEN_BASE, SCREEN_START, 2*1048576, MT_DEVICE }, /* VRAM */ 64 { /* VRAM */
65 { (u32)IO_BASE, IO_START, IO_SIZE , MT_DEVICE }, /* IO space */ 65 .virtual = SCREEN_BASE,
66 { EASI_BASE, EASI_START, EASI_SIZE, MT_DEVICE } /* EASI space */ 66 .pfn = __phys_to_pfn(SCREEN_START),
67 .length = 2*1048576,
68 .type = MT_DEVICE
69 }, { /* IO space */
70 .virtual = (u32)IO_BASE,
71 .pfn = __phys_to_pfn(IO_START),
72 .length = IO_SIZE ,
73 .type = MT_DEVICE
74 }, { /* EASI space */
75 .virtual = EASI_BASE,
76 .pfn = __phys_to_pfn(EASI_START),
77 .length = EASI_SIZE,
78 .type = MT_DEVICE
79 }
67}; 80};
68 81
69static void __init rpc_map_io(void) 82static void __init rpc_map_io(void)
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h
index 478c15c0e36a..9cbe5eef492b 100644
--- a/arch/arm/mach-s3c2410/cpu.h
+++ b/arch/arm/mach-s3c2410/cpu.h
@@ -21,7 +21,7 @@
21 21
22/* todo - fix when rmk changes iodescs to use `void __iomem *` */ 22/* todo - fix when rmk changes iodescs to use `void __iomem *` */
23 23
24#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, S3C2410_PA_##x, S3C24XX_SZ_##x, MT_DEVICE } 24#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
25 25
26#ifndef MHZ 26#ifndef MHZ
27#define MHZ (1000*1000) 27#define MHZ (1000*1000)
diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c
index 0077937a7ab8..08bc7d95a45d 100644
--- a/arch/arm/mach-s3c2410/devs.c
+++ b/arch/arm/mach-s3c2410/devs.c
@@ -47,7 +47,7 @@ struct platform_device *s3c24xx_uart_devs[3];
47static struct resource s3c_usb_resource[] = { 47static struct resource s3c_usb_resource[] = {
48 [0] = { 48 [0] = {
49 .start = S3C2410_PA_USBHOST, 49 .start = S3C2410_PA_USBHOST,
50 .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST, 50 .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
51 .flags = IORESOURCE_MEM, 51 .flags = IORESOURCE_MEM,
52 }, 52 },
53 [1] = { 53 [1] = {
@@ -77,7 +77,7 @@ EXPORT_SYMBOL(s3c_device_usb);
77static struct resource s3c_lcd_resource[] = { 77static struct resource s3c_lcd_resource[] = {
78 [0] = { 78 [0] = {
79 .start = S3C2410_PA_LCD, 79 .start = S3C2410_PA_LCD,
80 .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD, 80 .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1,
81 .flags = IORESOURCE_MEM, 81 .flags = IORESOURCE_MEM,
82 }, 82 },
83 [1] = { 83 [1] = {
@@ -103,21 +103,25 @@ struct platform_device s3c_device_lcd = {
103 103
104EXPORT_SYMBOL(s3c_device_lcd); 104EXPORT_SYMBOL(s3c_device_lcd);
105 105
106static struct s3c2410fb_mach_info s3c2410fb_info; 106void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
107
108void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info)
109{ 107{
110 memcpy(&s3c2410fb_info,hard_s3c2410fb_info,sizeof(struct s3c2410fb_mach_info)); 108 struct s3c2410fb_mach_info *npd;
111 s3c_device_lcd.dev.platform_data = &s3c2410fb_info; 109
110 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
111 if (npd) {
112 memcpy(npd, pd, sizeof(*npd));
113 s3c_device_lcd.dev.platform_data = npd;
114 } else {
115 printk(KERN_ERR "no memory for LCD platform data\n");
116 }
112} 117}
113EXPORT_SYMBOL(set_s3c2410fb_info);
114 118
115/* NAND Controller */ 119/* NAND Controller */
116 120
117static struct resource s3c_nand_resource[] = { 121static struct resource s3c_nand_resource[] = {
118 [0] = { 122 [0] = {
119 .start = S3C2410_PA_NAND, 123 .start = S3C2410_PA_NAND,
120 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND, 124 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
121 .flags = IORESOURCE_MEM, 125 .flags = IORESOURCE_MEM,
122 } 126 }
123}; 127};
@@ -136,7 +140,7 @@ EXPORT_SYMBOL(s3c_device_nand);
136static struct resource s3c_usbgadget_resource[] = { 140static struct resource s3c_usbgadget_resource[] = {
137 [0] = { 141 [0] = {
138 .start = S3C2410_PA_USBDEV, 142 .start = S3C2410_PA_USBDEV,
139 .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV, 143 .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
140 .flags = IORESOURCE_MEM, 144 .flags = IORESOURCE_MEM,
141 }, 145 },
142 [1] = { 146 [1] = {
@@ -161,7 +165,7 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
161static struct resource s3c_wdt_resource[] = { 165static struct resource s3c_wdt_resource[] = {
162 [0] = { 166 [0] = {
163 .start = S3C2410_PA_WATCHDOG, 167 .start = S3C2410_PA_WATCHDOG,
164 .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG, 168 .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
165 .flags = IORESOURCE_MEM, 169 .flags = IORESOURCE_MEM,
166 }, 170 },
167 [1] = { 171 [1] = {
@@ -186,7 +190,7 @@ EXPORT_SYMBOL(s3c_device_wdt);
186static struct resource s3c_i2c_resource[] = { 190static struct resource s3c_i2c_resource[] = {
187 [0] = { 191 [0] = {
188 .start = S3C2410_PA_IIC, 192 .start = S3C2410_PA_IIC,
189 .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC, 193 .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1,
190 .flags = IORESOURCE_MEM, 194 .flags = IORESOURCE_MEM,
191 }, 195 },
192 [1] = { 196 [1] = {
@@ -211,7 +215,7 @@ EXPORT_SYMBOL(s3c_device_i2c);
211static struct resource s3c_iis_resource[] = { 215static struct resource s3c_iis_resource[] = {
212 [0] = { 216 [0] = {
213 .start = S3C2410_PA_IIS, 217 .start = S3C2410_PA_IIS,
214 .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS, 218 .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1,
215 .flags = IORESOURCE_MEM, 219 .flags = IORESOURCE_MEM,
216 } 220 }
217}; 221};
@@ -265,7 +269,7 @@ EXPORT_SYMBOL(s3c_device_rtc);
265static struct resource s3c_adc_resource[] = { 269static struct resource s3c_adc_resource[] = {
266 [0] = { 270 [0] = {
267 .start = S3C2410_PA_ADC, 271 .start = S3C2410_PA_ADC,
268 .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC, 272 .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1,
269 .flags = IORESOURCE_MEM, 273 .flags = IORESOURCE_MEM,
270 }, 274 },
271 [1] = { 275 [1] = {
@@ -288,7 +292,7 @@ struct platform_device s3c_device_adc = {
288static struct resource s3c_sdi_resource[] = { 292static struct resource s3c_sdi_resource[] = {
289 [0] = { 293 [0] = {
290 .start = S3C2410_PA_SDI, 294 .start = S3C2410_PA_SDI,
291 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI, 295 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
292 .flags = IORESOURCE_MEM, 296 .flags = IORESOURCE_MEM,
293 }, 297 },
294 [1] = { 298 [1] = {
@@ -465,7 +469,7 @@ EXPORT_SYMBOL(s3c_device_timer3);
465static struct resource s3c_camif_resource[] = { 469static struct resource s3c_camif_resource[] = {
466 [0] = { 470 [0] = {
467 .start = S3C2440_PA_CAMIF, 471 .start = S3C2440_PA_CAMIF,
468 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF, 472 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
469 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
470 }, 474 },
471 [1] = { 475 [1] = {
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index 94f1776cf312..23ea3d5fa09c 100644
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -30,6 +30,7 @@
30 * 04-Oct-2004 BJD Added irq filter controls for GPIO 30 * 04-Oct-2004 BJD Added irq filter controls for GPIO
31 * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code 31 * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code
32 * 13-Mar-2005 BJD Updates for __iomem 32 * 13-Mar-2005 BJD Updates for __iomem
33 * 26-Oct-2005 BJD Added generic configuration types
33 */ 34 */
34 35
35 36
@@ -58,6 +59,27 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
58 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; 59 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
59 } 60 }
60 61
62 switch (function) {
63 case S3C2410_GPIO_LEAVE:
64 mask = 0;
65 function = 0;
66 break;
67
68 case S3C2410_GPIO_INPUT:
69 case S3C2410_GPIO_OUTPUT:
70 case S3C2410_GPIO_SFN2:
71 case S3C2410_GPIO_SFN3:
72 if (pin < S3C2410_GPIO_BANKB) {
73 function &= 1;
74 function <<= S3C2410_GPIO_OFFSET(pin);
75 } else {
76 function &= 3;
77 function <<= S3C2410_GPIO_OFFSET(pin)*2;
78 }
79 }
80
81 /* modify the specified register wwith IRQs off */
82
61 local_irq_save(flags); 83 local_irq_save(flags);
62 84
63 con = __raw_readl(base + 0x00); 85 con = __raw_readl(base + 0x00);
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 7b51bfd0ba6d..c1b5c63ec24a 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -32,6 +32,7 @@
32 * 25-Jul-2005 BJD Removed ASIX static mappings 32 * 25-Jul-2005 BJD Removed ASIX static mappings
33 * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus 33 * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus
34 * 20-Sep-2005 BJD Added static to non-exported items 34 * 20-Sep-2005 BJD Added static to non-exported items
35 * 26-Oct-2005 BJD Added FB platform data
35*/ 36*/
36 37
37#include <linux/kernel.h> 38#include <linux/kernel.h>
@@ -61,8 +62,10 @@
61#include <asm/arch/regs-gpio.h> 62#include <asm/arch/regs-gpio.h>
62#include <asm/arch/regs-mem.h> 63#include <asm/arch/regs-mem.h>
63#include <asm/arch/regs-lcd.h> 64#include <asm/arch/regs-lcd.h>
65
64#include <asm/arch/nand.h> 66#include <asm/arch/nand.h>
65#include <asm/arch/iic.h> 67#include <asm/arch/iic.h>
68#include <asm/arch/fb.h>
66 69
67#include <linux/mtd/mtd.h> 70#include <linux/mtd/mtd.h>
68#include <linux/mtd/nand.h> 71#include <linux/mtd/nand.h>
@@ -399,6 +402,38 @@ static struct s3c2410_platform_i2c bast_i2c_info = {
399 .max_freq = 130*1000, 402 .max_freq = 130*1000,
400}; 403};
401 404
405
406static struct s3c2410fb_mach_info __initdata bast_lcd_info = {
407 .width = 640,
408 .height = 480,
409
410 .xres = {
411 .min = 320,
412 .max = 1024,
413 .defval = 640,
414 },
415
416 .yres = {
417 .min = 240,
418 .max = 600,
419 .defval = 480,
420 },
421
422 .bpp = {
423 .min = 4,
424 .max = 16,
425 .defval = 8,
426 },
427
428 .regs = {
429 .lcdcon1 = 0x00000176,
430 .lcdcon2 = 0x1d77c7c2,
431 .lcdcon3 = 0x013a7f13,
432 .lcdcon4 = 0x00000057,
433 .lcdcon5 = 0x00014b02,
434 }
435};
436
402/* Standard BAST devices */ 437/* Standard BAST devices */
403 438
404static struct platform_device *bast_devices[] __initdata = { 439static struct platform_device *bast_devices[] __initdata = {
@@ -454,6 +489,10 @@ static void __init bast_map_io(void)
454 usb_simtec_init(); 489 usb_simtec_init();
455} 490}
456 491
492static void __init bast_init(void)
493{
494 s3c24xx_fb_set_platdata(&bast_lcd_info);
495}
457 496
458MACHINE_START(BAST, "Simtec-BAST") 497MACHINE_START(BAST, "Simtec-BAST")
459 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ 498 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
@@ -463,5 +502,6 @@ MACHINE_START(BAST, "Simtec-BAST")
463 .boot_params = S3C2410_SDRAM_PA + 0x100, 502 .boot_params = S3C2410_SDRAM_PA + 0x100,
464 .map_io = bast_map_io, 503 .map_io = bast_map_io,
465 .init_irq = s3c24xx_init_irq, 504 .init_irq = s3c24xx_init_irq,
505 .init_machine = bast_init,
466 .timer = &s3c24xx_timer, 506 .timer = &s3c24xx_timer,
467MACHINE_END 507MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index fb3cb01266e5..7efeaaad2361 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -25,6 +25,7 @@
25 * 14-Jan-2005 BJD Added clock init 25 * 14-Jan-2005 BJD Added clock init
26 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 26 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
27 * 20-Sep-2005 BJD Added static to non-exported items 27 * 20-Sep-2005 BJD Added static to non-exported items
28 * 26-Oct-2005 BJD Changed name of fb init call
28*/ 29*/
29 30
30#include <linux/kernel.h> 31#include <linux/kernel.h>
@@ -164,7 +165,7 @@ static void __init h1940_init_irq(void)
164 165
165static void __init h1940_init(void) 166static void __init h1940_init(void)
166{ 167{
167 set_s3c2410fb_info(&h1940_lcdcfg); 168 s3c24xx_fb_set_platdata(&h1940_lcdcfg);
168} 169}
169 170
170MACHINE_START(H1940, "IPAQ-H1940") 171MACHINE_START(H1940, "IPAQ-H1940")
diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c
index 722ef46b630a..6950e61b7914 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2440.c
@@ -19,6 +19,7 @@
19 * 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA 19 * 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA
20 * 14-Mar-2005 BJD void __iomem fixes 20 * 14-Mar-2005 BJD void __iomem fixes
21 * 20-Sep-2005 BJD Added static to non-exported items 21 * 20-Sep-2005 BJD Added static to non-exported items
22 * 26-Oct-2005 BJD Added framebuffer data
22*/ 23*/
23 24
24#include <linux/kernel.h> 25#include <linux/kernel.h>
@@ -41,7 +42,10 @@
41//#include <asm/debug-ll.h> 42//#include <asm/debug-ll.h>
42#include <asm/arch/regs-serial.h> 43#include <asm/arch/regs-serial.h>
43#include <asm/arch/regs-gpio.h> 44#include <asm/arch/regs-gpio.h>
45#include <asm/arch/regs-lcd.h>
46
44#include <asm/arch/idle.h> 47#include <asm/arch/idle.h>
48#include <asm/arch/fb.h>
45 49
46#include "s3c2410.h" 50#include "s3c2410.h"
47#include "s3c2440.h" 51#include "s3c2440.h"
@@ -86,6 +90,70 @@ static struct s3c2410_uartcfg smdk2440_uartcfgs[] = {
86 } 90 }
87}; 91};
88 92
93/* LCD driver info */
94
95static struct s3c2410fb_mach_info smdk2440_lcd_cfg __initdata = {
96 .regs = {
97
98 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
99 S3C2410_LCDCON1_TFT |
100 S3C2410_LCDCON1_CLKVAL(0x04),
101
102 .lcdcon2 = S3C2410_LCDCON2_VBPD(7) |
103 S3C2410_LCDCON2_LINEVAL(319) |
104 S3C2410_LCDCON2_VFPD(6) |
105 S3C2410_LCDCON2_VSPW(3),
106
107 .lcdcon3 = S3C2410_LCDCON3_HBPD(19) |
108 S3C2410_LCDCON3_HOZVAL(239) |
109 S3C2410_LCDCON3_HFPD(7),
110
111 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
112 S3C2410_LCDCON4_HSPW(3),
113
114 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
115 S3C2410_LCDCON5_INVVLINE |
116 S3C2410_LCDCON5_INVVFRAME |
117 S3C2410_LCDCON5_PWREN |
118 S3C2410_LCDCON5_HWSWP,
119 },
120
121#if 0
122 /* currently setup by downloader */
123 .gpccon = 0xaa940659,
124 .gpccon_mask = 0xffffffff,
125 .gpcup = 0x0000ffff,
126 .gpcup_mask = 0xffffffff,
127 .gpdcon = 0xaa84aaa0,
128 .gpdcon_mask = 0xffffffff,
129 .gpdup = 0x0000faff,
130 .gpdup_mask = 0xffffffff,
131#endif
132
133 .lpcsel = ((0xCE6) & ~7) | 1<<4,
134
135 .width = 240,
136 .height = 320,
137
138 .xres = {
139 .min = 240,
140 .max = 240,
141 .defval = 240,
142 },
143
144 .yres = {
145 .min = 320,
146 .max = 320,
147 .defval = 320,
148 },
149
150 .bpp = {
151 .min = 16,
152 .max = 16,
153 .defval = 16,
154 },
155};
156
89static struct platform_device *smdk2440_devices[] __initdata = { 157static struct platform_device *smdk2440_devices[] __initdata = {
90 &s3c_device_usb, 158 &s3c_device_usb,
91 &s3c_device_lcd, 159 &s3c_device_lcd,
@@ -121,6 +189,8 @@ static void __init smdk2440_machine_init(void)
121 s3c2410_gpio_setpin(S3C2410_GPF6, 0); 189 s3c2410_gpio_setpin(S3C2410_GPF6, 0);
122 s3c2410_gpio_setpin(S3C2410_GPF7, 0); 190 s3c2410_gpio_setpin(S3C2410_GPF7, 0);
123 191
192 s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg);
193
124 s3c2410_pm_init(); 194 s3c2410_pm_init();
125} 195}
126 196
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 24687f511bf5..75efb5da5b6d 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -388,9 +388,17 @@ static struct sa1100_port_fns assabet_port_fns __initdata = {
388}; 388};
389 389
390static struct map_desc assabet_io_desc[] __initdata = { 390static struct map_desc assabet_io_desc[] __initdata = {
391 /* virtual physical length type */ 391 { /* Board Control Register */
392 { 0xf1000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */ 392 .virtual = 0xf1000000,
393 { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */ 393 .pfn = __phys_to_pfn(0x12000000),
394 .length = 0x00100000,
395 .type = MT_DEVICE
396 }, { /* MQ200 */
397 .virtual = 0xf2800000,
398 .pfn = __phys_to_pfn(0x4b800000),
399 .length = 0x00800000,
400 .type = MT_DEVICE
401 }
394}; 402};
395 403
396static void __init assabet_map_io(void) 404static void __init assabet_map_io(void)
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index b6169cb09196..c92cebff7f8e 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -254,10 +254,22 @@ EXPORT_SYMBOL(badge4_set_5V);
254 254
255 255
256static struct map_desc badge4_io_desc[] __initdata = { 256static struct map_desc badge4_io_desc[] __initdata = {
257 /* virtual physical length type */ 257 { /* SRAM bank 1 */
258 {0xf1000000, 0x08000000, 0x00100000, MT_DEVICE },/* SRAM bank 1 */ 258 .virtual = 0xf1000000,
259 {0xf2000000, 0x10000000, 0x00100000, MT_DEVICE },/* SRAM bank 2 */ 259 .pfn = __phys_to_pfn(0x08000000),
260 {0xf4000000, 0x48000000, 0x00100000, MT_DEVICE } /* SA-1111 */ 260 .length = 0x00100000,
261 .type = MT_DEVICE
262 }, { /* SRAM bank 2 */
263 .virtual = 0xf2000000,
264 .pfn = __phys_to_pfn(0x10000000),
265 .length = 0x00100000,
266 .type = MT_DEVICE
267 }, { /* SA-1111 */
268 .virtual = 0xf4000000,
269 .pfn = __phys_to_pfn(0x48000000),
270 .length = 0x00100000,
271 .type = MT_DEVICE
272 }
261}; 273};
262 274
263static void 275static void
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 9484be7dc671..23cb74885275 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -100,8 +100,12 @@ static void __init cerf_init_irq(void)
100} 100}
101 101
102static struct map_desc cerf_io_desc[] __initdata = { 102static struct map_desc cerf_io_desc[] __initdata = {
103 /* virtual physical length type */ 103 { /* Crystal Ethernet Chip */
104 { 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */ 104 .virtual = 0xf0000000,
105 .pfn = __phys_to_pfn(0x08000000),
106 .length = 0x00100000,
107 .type = MT_DEVICE
108 }
105}; 109};
106 110
107static void __init cerf_map_io(void) 111static void __init cerf_map_io(void)
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 6ecab7e2c238..7fd6e29c36b7 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -171,9 +171,17 @@ static void __init collie_init(void)
171} 171}
172 172
173static struct map_desc collie_io_desc[] __initdata = { 173static struct map_desc collie_io_desc[] __initdata = {
174 /* virtual physical length type */ 174 { /* 32M main flash (cs0) */
175 {0xe8000000, 0x00000000, 0x02000000, MT_DEVICE}, /* 32M main flash (cs0) */ 175 .virtual = 0xe8000000,
176 {0xea000000, 0x08000000, 0x02000000, MT_DEVICE}, /* 32M boot flash (cs1) */ 176 .pfn = __phys_to_pfn(0x00000000),
177 .length = 0x02000000,
178 .type = MT_DEVICE
179 }, { /* 32M boot flash (cs1) */
180 .virtual = 0xea000000,
181 .pfn = __phys_to_pfn(0x08000000),
182 .length = 0x02000000,
183 .type = MT_DEVICE
184 }
177}; 185};
178 186
179static void __init collie_map_io(void) 187static void __init collie_map_io(void)
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 3f1e358455e5..93619497779c 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -369,11 +369,27 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
369 */ 369 */
370 370
371static struct map_desc standard_io_desc[] __initdata = { 371static struct map_desc standard_io_desc[] __initdata = {
372 /* virtual physical length type */ 372 { /* PCM */
373 { 0xf8000000, 0x80000000, 0x00100000, MT_DEVICE }, /* PCM */ 373 .virtual = 0xf8000000,
374 { 0xfa000000, 0x90000000, 0x00100000, MT_DEVICE }, /* SCM */ 374 .pfn = __phys_to_pfn(0x80000000),
375 { 0xfc000000, 0xa0000000, 0x00100000, MT_DEVICE }, /* MER */ 375 .length = 0x00100000,
376 { 0xfe000000, 0xb0000000, 0x00200000, MT_DEVICE } /* LCD + DMA */ 376 .type = MT_DEVICE
377 }, { /* SCM */
378 .virtual = 0xfa000000,
379 .pfn = __phys_to_pfn(0x90000000),
380 .length = 0x00100000,
381 .type = MT_DEVICE
382 }, { /* MER */
383 .virtual = 0xfc000000,
384 .pfn = __phys_to_pfn(0xa0000000),
385 .length = 0x00100000,
386 .type = MT_DEVICE
387 }, { /* LCD + DMA */
388 .virtual = 0xfe000000,
389 .pfn = __phys_to_pfn(0xb0000000),
390 .length = 0x00200000,
391 .type = MT_DEVICE
392 },
377}; 393};
378 394
379void __init sa1100_map_io(void) 395void __init sa1100_map_io(void)
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index e7aa2681ca64..e8352b7f74b0 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -223,10 +223,22 @@ static void h3xxx_lcd_power(int enable)
223} 223}
224 224
225static struct map_desc h3600_io_desc[] __initdata = { 225static struct map_desc h3600_io_desc[] __initdata = {
226 /* virtual physical length type */ 226 { /* static memory bank 2 CS#2 */
227 { H3600_BANK_2_VIRT, SA1100_CS2_PHYS, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */ 227 .virtual = H3600_BANK_2_VIRT,
228 { H3600_BANK_4_VIRT, SA1100_CS4_PHYS, 0x00800000, MT_DEVICE }, /* static memory bank 4 CS#4 */ 228 .pfn = __phys_to_pfn(SA1100_CS2_PHYS),
229 { H3600_EGPIO_VIRT, H3600_EGPIO_PHYS, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */ 229 .length = 0x02800000,
230 .type = MT_DEVICE
231 }, { /* static memory bank 4 CS#4 */
232 .virtual = H3600_BANK_4_VIRT,
233 .pfn = __phys_to_pfn(SA1100_CS4_PHYS),
234 .length = 0x00800000,
235 .type = MT_DEVICE
236 }, { /* EGPIO 0 CS#5 */
237 .virtual = H3600_EGPIO_VIRT,
238 .pfn = __phys_to_pfn(H3600_EGPIO_PHYS),
239 .length = 0x01000000,
240 .type = MT_DEVICE
241 }
230}; 242};
231 243
232/* 244/*
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 502d65cfe654..c922e043c424 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -57,8 +57,12 @@ static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
57 */ 57 */
58 58
59static struct map_desc hackkit_io_desc[] __initdata = { 59static struct map_desc hackkit_io_desc[] __initdata = {
60 /* virtual physical length type */ 60 { /* Flash bank 0 */
61 { 0xe8000000, 0x00000000, 0x01000000, MT_DEVICE } /* Flash bank 0 */ 61 .virtual = 0xe8000000,
62 .pfn = __phys_to_pfn(0x00000000),
63 .length = 0x01000000,
64 .type = MT_DEVICE
65 },
62}; 66};
63 67
64static struct sa1100_port_fns hackkit_port_fns __initdata = { 68static struct sa1100_port_fns hackkit_port_fns __initdata = {
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 2f497112c96a..9c363bfcf310 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -81,10 +81,22 @@ static int __init jornada720_init(void)
81arch_initcall(jornada720_init); 81arch_initcall(jornada720_init);
82 82
83static struct map_desc jornada720_io_desc[] __initdata = { 83static struct map_desc jornada720_io_desc[] __initdata = {
84 /* virtual physical length type */ 84 { /* Epson registers */
85 { 0xf0000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Epson registers */ 85 .virtual = 0xf0000000,
86 { 0xf1000000, 0x48200000, 0x00100000, MT_DEVICE }, /* Epson frame buffer */ 86 .pfn = __phys_to_pfn(0x48000000),
87 { 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */ 87 .length = 0x00100000,
88 .type = MT_DEVICE
89 }, { /* Epson frame buffer */
90 .virtual = 0xf1000000,
91 .pfn = __phys_to_pfn(0x48200000),
92 .length = 0x00100000,
93 .type = MT_DEVICE
94 }, { /* SA-1111 */
95 .virtual = 0xf4000000,
96 .pfn = __phys_to_pfn(0x40000000),
97 .length = 0x00100000,
98 .type = MT_DEVICE
99 }
88}; 100};
89 101
90static void __init jornada720_map_io(void) 102static void __init jornada720_map_io(void)
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index ed6744d480af..8c9e3dd52942 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -31,9 +31,17 @@ static void __init lart_init(void)
31} 31}
32 32
33static struct map_desc lart_io_desc[] __initdata = { 33static struct map_desc lart_io_desc[] __initdata = {
34 /* virtual physical length type */ 34 { /* main flash memory */
35 { 0xe8000000, 0x00000000, 0x00400000, MT_DEVICE }, /* main flash memory */ 35 .virtual = 0xe8000000,
36 { 0xec000000, 0x08000000, 0x00400000, MT_DEVICE } /* main flash, alternative location */ 36 .pfn = __phys_to_pfn(0x00000000),
37 .length = 0x00400000,
38 .type = MT_DEVICE
39 }, { /* main flash, alternative location */
40 .virtual = 0xec000000,
41 .pfn = __phys_to_pfn(0x08000000),
42 .length = 0x00400000,
43 .type = MT_DEVICE
44 }
37}; 45};
38 46
39static void __init lart_map_io(void) 47static void __init lart_map_io(void)
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index fc061641b7be..0c5eff3bdc09 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -331,9 +331,17 @@ static int __init neponset_init(void)
331subsys_initcall(neponset_init); 331subsys_initcall(neponset_init);
332 332
333static struct map_desc neponset_io_desc[] __initdata = { 333static struct map_desc neponset_io_desc[] __initdata = {
334 /* virtual physical length type */ 334 { /* System Registers */
335 { 0xf3000000, 0x10000000, SZ_1M, MT_DEVICE }, /* System Registers */ 335 .virtual = 0xf3000000,
336 { 0xf4000000, 0x40000000, SZ_1M, MT_DEVICE } /* SA-1111 */ 336 .pfn = __phys_to_pfn(0x10000000),
337 .length = SZ_1M,
338 .type = MT_DEVICE
339 }, { /* SA-1111 */
340 .virtual = 0xf4000000,
341 .pfn = __phys_to_pfn(0x40000000),
342 .length = SZ_1M,
343 .type = MT_DEVICE
344 }
337}; 345};
338 346
339void __init neponset_map_io(void) 347void __init neponset_map_io(void)
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 07f6d5fd7bb0..cfb6658e5cdf 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -60,11 +60,17 @@ EXPORT_SYMBOL(set_cs3_bit);
60EXPORT_SYMBOL(clear_cs3_bit); 60EXPORT_SYMBOL(clear_cs3_bit);
61 61
62static struct map_desc simpad_io_desc[] __initdata = { 62static struct map_desc simpad_io_desc[] __initdata = {
63 /* virtual physical length type */ 63 { /* MQ200 */
64 /* MQ200 */ 64 .virtual = 0xf2800000,
65 { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE }, 65 .pfn = __phys_to_pfn(0x4b800000),
66 /* Paules CS3, write only */ 66 .length = 0x00800000,
67 { 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE }, 67 .type = MT_DEVICE
68 }, { /* Paules CS3, write only */
69 .virtual = 0xf1000000,
70 .pfn = __phys_to_pfn(0x18000000),
71 .length = 0x00100000,
72 .type = MT_DEVICE
73 },
68}; 74};
69 75
70 76
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 946c0d11c73b..2d428b6dbb58 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -62,7 +62,12 @@ arch_initcall(shark_init);
62extern void shark_init_irq(void); 62extern void shark_init_irq(void);
63 63
64static struct map_desc shark_io_desc[] __initdata = { 64static struct map_desc shark_io_desc[] __initdata = {
65 { IO_BASE , IO_START , IO_SIZE , MT_DEVICE } 65 {
66 .virtual = IO_BASE,
67 .pfn = __phys_to_pfn(IO_START),
68 .length = IO_SIZE,
69 .type = MT_DEVICE
70 }
66}; 71};
67 72
68static void __init shark_map_io(void) 73static void __init shark_map_io(void)
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index a30e0451df72..7e4bdd07f4af 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -186,25 +186,82 @@ void __init versatile_init_irq(void)
186} 186}
187 187
188static struct map_desc versatile_io_desc[] __initdata = { 188static struct map_desc versatile_io_desc[] __initdata = {
189 { IO_ADDRESS(VERSATILE_SYS_BASE), VERSATILE_SYS_BASE, SZ_4K, MT_DEVICE }, 189 {
190 { IO_ADDRESS(VERSATILE_SIC_BASE), VERSATILE_SIC_BASE, SZ_4K, MT_DEVICE }, 190 .virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
191 { IO_ADDRESS(VERSATILE_VIC_BASE), VERSATILE_VIC_BASE, SZ_4K, MT_DEVICE }, 191 .pfn = __phys_to_pfn(VERSATILE_SYS_BASE),
192 { IO_ADDRESS(VERSATILE_SCTL_BASE), VERSATILE_SCTL_BASE, SZ_4K * 9, MT_DEVICE }, 192 .length = SZ_4K,
193 .type = MT_DEVICE
194 }, {
195 .virtual = IO_ADDRESS(VERSATILE_SIC_BASE),
196 .pfn = __phys_to_pfn(VERSATILE_SIC_BASE),
197 .length = SZ_4K,
198 .type = MT_DEVICE
199 }, {
200 .virtual = IO_ADDRESS(VERSATILE_VIC_BASE),
201 .pfn = __phys_to_pfn(VERSATILE_VIC_BASE),
202 .length = SZ_4K,
203 .type = MT_DEVICE
204 }, {
205 .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE),
206 .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE),
207 .length = SZ_4K * 9,
208 .type = MT_DEVICE
209 },
193#ifdef CONFIG_MACH_VERSATILE_AB 210#ifdef CONFIG_MACH_VERSATILE_AB
194 { IO_ADDRESS(VERSATILE_GPIO0_BASE), VERSATILE_GPIO0_BASE, SZ_4K, MT_DEVICE }, 211 {
195 { IO_ADDRESS(VERSATILE_IB2_BASE), VERSATILE_IB2_BASE, SZ_64M, MT_DEVICE }, 212 .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE),
213 .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE),
214 .length = SZ_4K,
215 .type = MT_DEVICE
216 }, {
217 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
218 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
219 .length = SZ_64M,
220 .type = MT_DEVICE
221 },
196#endif 222#endif
197#ifdef CONFIG_DEBUG_LL 223#ifdef CONFIG_DEBUG_LL
198 { IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE }, 224 {
225 .virtual = IO_ADDRESS(VERSATILE_UART0_BASE),
226 .pfn = __phys_to_pfn(VERSATILE_UART0_BASE),
227 .length = SZ_4K,
228 .type = MT_DEVICE
229 },
199#endif 230#endif
200#ifdef CONFIG_PCI 231#ifdef CONFIG_PCI
201 { IO_ADDRESS(VERSATILE_PCI_CORE_BASE), VERSATILE_PCI_CORE_BASE, SZ_4K, MT_DEVICE }, 232 {
202 { VERSATILE_PCI_VIRT_BASE, VERSATILE_PCI_BASE, VERSATILE_PCI_BASE_SIZE, MT_DEVICE }, 233 .virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE),
203 { VERSATILE_PCI_CFG_VIRT_BASE, VERSATILE_PCI_CFG_BASE, VERSATILE_PCI_CFG_BASE_SIZE, MT_DEVICE }, 234 .pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE),
235 .length = SZ_4K,
236 .type = MT_DEVICE
237 }, {
238 .virtual = VERSATILE_PCI_VIRT_BASE,
239 .pfn = __phys_to_pfn(VERSATILE_PCI_BASE),
240 .length = VERSATILE_PCI_BASE_SIZE,
241 .type = MT_DEVICE
242 }, {
243 .virtual = VERSATILE_PCI_CFG_VIRT_BASE,
244 .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
245 .length = VERSATILE_PCI_CFG_BASE_SIZE,
246 .type = MT_DEVICE
247 },
204#if 0 248#if 0
205 { VERSATILE_PCI_VIRT_MEM_BASE0, VERSATILE_PCI_MEM_BASE0, SZ_16M, MT_DEVICE }, 249 {
206 { VERSATILE_PCI_VIRT_MEM_BASE1, VERSATILE_PCI_MEM_BASE1, SZ_16M, MT_DEVICE }, 250 .virtual = VERSATILE_PCI_VIRT_MEM_BASE0,
207 { VERSATILE_PCI_VIRT_MEM_BASE2, VERSATILE_PCI_MEM_BASE2, SZ_16M, MT_DEVICE }, 251 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
252 .length = SZ_16M,
253 .type = MT_DEVICE
254 }, {
255 .virtual = VERSATILE_PCI_VIRT_MEM_BASE1,
256 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1),
257 .length = SZ_16M,
258 .type = MT_DEVICE
259 }, {
260 .virtual = VERSATILE_PCI_VIRT_MEM_BASE2,
261 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2),
262 .length = SZ_16M,
263 .type = MT_DEVICE
264 },
208#endif 265#endif
209#endif 266#endif
210}; 267};
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index edffa47a4b2a..f4496813615a 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mm/init.c 2 * linux/arch/arm/mm/init.c
3 * 3 *
4 * Copyright (C) 1995-2002 Russell King 4 * Copyright (C) 1995-2005 Russell King
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -86,14 +86,19 @@ void show_mem(void)
86 printk("%d pages swap cached\n", cached); 86 printk("%d pages swap cached\n", cached);
87} 87}
88 88
89struct node_info { 89static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
90 unsigned int start; 90{
91 unsigned int end; 91 return pmd_offset(pgd, virt);
92 int bootmap_pages; 92}
93}; 93
94static inline pmd_t *pmd_off_k(unsigned long virt)
95{
96 return pmd_off(pgd_offset_k(virt), virt);
97}
94 98
95#define O_PFN_DOWN(x) ((x) >> PAGE_SHIFT) 99#define for_each_nodebank(iter,mi,no) \
96#define O_PFN_UP(x) (PAGE_ALIGN(x) >> PAGE_SHIFT) 100 for (iter = 0; iter < mi->nr_banks; iter++) \
101 if (mi->bank[iter].node == no)
97 102
98/* 103/*
99 * FIXME: We really want to avoid allocating the bootmap bitmap 104 * FIXME: We really want to avoid allocating the bootmap bitmap
@@ -106,15 +111,12 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
106{ 111{
107 unsigned int start_pfn, bank, bootmap_pfn; 112 unsigned int start_pfn, bank, bootmap_pfn;
108 113
109 start_pfn = O_PFN_UP(__pa(&_end)); 114 start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
110 bootmap_pfn = 0; 115 bootmap_pfn = 0;
111 116
112 for (bank = 0; bank < mi->nr_banks; bank ++) { 117 for_each_nodebank(bank, mi, node) {
113 unsigned int start, end; 118 unsigned int start, end;
114 119
115 if (mi->bank[bank].node != node)
116 continue;
117
118 start = mi->bank[bank].start >> PAGE_SHIFT; 120 start = mi->bank[bank].start >> PAGE_SHIFT;
119 end = (mi->bank[bank].size + 121 end = (mi->bank[bank].size +
120 mi->bank[bank].start) >> PAGE_SHIFT; 122 mi->bank[bank].start) >> PAGE_SHIFT;
@@ -140,92 +142,6 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
140 return bootmap_pfn; 142 return bootmap_pfn;
141} 143}
142 144
143/*
144 * Scan the memory info structure and pull out:
145 * - the end of memory
146 * - the number of nodes
147 * - the pfn range of each node
148 * - the number of bootmem bitmap pages
149 */
150static unsigned int __init
151find_memend_and_nodes(struct meminfo *mi, struct node_info *np)
152{
153 unsigned int i, bootmem_pages = 0, memend_pfn = 0;
154
155 for (i = 0; i < MAX_NUMNODES; i++) {
156 np[i].start = -1U;
157 np[i].end = 0;
158 np[i].bootmap_pages = 0;
159 }
160
161 for (i = 0; i < mi->nr_banks; i++) {
162 unsigned long start, end;
163 int node;
164
165 if (mi->bank[i].size == 0) {
166 /*
167 * Mark this bank with an invalid node number
168 */
169 mi->bank[i].node = -1;
170 continue;
171 }
172
173 node = mi->bank[i].node;
174
175 /*
176 * Make sure we haven't exceeded the maximum number of nodes
177 * that we have in this configuration. If we have, we're in
178 * trouble. (maybe we ought to limit, instead of bugging?)
179 */
180 if (node >= MAX_NUMNODES)
181 BUG();
182 node_set_online(node);
183
184 /*
185 * Get the start and end pfns for this bank
186 */
187 start = mi->bank[i].start >> PAGE_SHIFT;
188 end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT;
189
190 if (np[node].start > start)
191 np[node].start = start;
192
193 if (np[node].end < end)
194 np[node].end = end;
195
196 if (memend_pfn < end)
197 memend_pfn = end;
198 }
199
200 /*
201 * Calculate the number of pages we require to
202 * store the bootmem bitmaps.
203 */
204 for_each_online_node(i) {
205 if (np[i].end == 0)
206 continue;
207
208 np[i].bootmap_pages = bootmem_bootmap_pages(np[i].end -
209 np[i].start);
210 bootmem_pages += np[i].bootmap_pages;
211 }
212
213 high_memory = __va(memend_pfn << PAGE_SHIFT);
214
215 /*
216 * This doesn't seem to be used by the Linux memory
217 * manager any more. If we can get rid of it, we
218 * also get rid of some of the stuff above as well.
219 *
220 * Note: max_low_pfn and max_pfn reflect the number
221 * of _pages_ in the system, not the maximum PFN.
222 */
223 max_low_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
224 max_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
225
226 return bootmem_pages;
227}
228
229static int __init check_initrd(struct meminfo *mi) 145static int __init check_initrd(struct meminfo *mi)
230{ 146{
231 int initrd_node = -2; 147 int initrd_node = -2;
@@ -266,9 +182,8 @@ static int __init check_initrd(struct meminfo *mi)
266/* 182/*
267 * Reserve the various regions of node 0 183 * Reserve the various regions of node 0
268 */ 184 */
269static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int bootmap_pages) 185static __init void reserve_node_zero(pg_data_t *pgdat)
270{ 186{
271 pg_data_t *pgdat = NODE_DATA(0);
272 unsigned long res_size = 0; 187 unsigned long res_size = 0;
273 188
274 /* 189 /*
@@ -289,13 +204,6 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot
289 PTRS_PER_PGD * sizeof(pgd_t)); 204 PTRS_PER_PGD * sizeof(pgd_t));
290 205
291 /* 206 /*
292 * And don't forget to reserve the allocator bitmap,
293 * which will be freed later.
294 */
295 reserve_bootmem_node(pgdat, bootmap_pfn << PAGE_SHIFT,
296 bootmap_pages << PAGE_SHIFT);
297
298 /*
299 * Hmm... This should go elsewhere, but we really really need to 207 * Hmm... This should go elsewhere, but we really really need to
300 * stop things allocating the low memory; ideally we need a better 208 * stop things allocating the low memory; ideally we need a better
301 * implementation of GFP_DMA which does not assume that DMA-able 209 * implementation of GFP_DMA which does not assume that DMA-able
@@ -324,183 +232,276 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot
324 reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size); 232 reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size);
325} 233}
326 234
327/* 235void __init build_mem_type_table(void);
328 * Register all available RAM in this node with the bootmem allocator. 236void __init create_mapping(struct map_desc *md);
329 */ 237
330static inline void free_bootmem_node_bank(int node, struct meminfo *mi) 238static unsigned long __init
239bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
331{ 240{
332 pg_data_t *pgdat = NODE_DATA(node); 241 unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
333 int bank; 242 unsigned long start_pfn, end_pfn, boot_pfn;
243 unsigned int boot_pages;
244 pg_data_t *pgdat;
245 int i;
334 246
335 for (bank = 0; bank < mi->nr_banks; bank++) 247 start_pfn = -1UL;
336 if (mi->bank[bank].node == node) 248 end_pfn = 0;
337 free_bootmem_node(pgdat, mi->bank[bank].start,
338 mi->bank[bank].size);
339}
340 249
341/* 250 /*
342 * Initialise the bootmem allocator for all nodes. This is called 251 * Calculate the pfn range, and map the memory banks for this node.
343 * early during the architecture specific initialisation. 252 */
344 */ 253 for_each_nodebank(i, mi, node) {
345static void __init bootmem_init(struct meminfo *mi) 254 unsigned long start, end;
346{ 255 struct map_desc map;
347 struct node_info node_info[MAX_NUMNODES], *np = node_info;
348 unsigned int bootmap_pages, bootmap_pfn, map_pg;
349 int node, initrd_node;
350 256
351 bootmap_pages = find_memend_and_nodes(mi, np); 257 start = mi->bank[i].start >> PAGE_SHIFT;
352 bootmap_pfn = find_bootmap_pfn(0, mi, bootmap_pages); 258 end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT;
353 initrd_node = check_initrd(mi);
354 259
355 map_pg = bootmap_pfn; 260 if (start_pfn > start)
261 start_pfn = start;
262 if (end_pfn < end)
263 end_pfn = end;
264
265 map.pfn = __phys_to_pfn(mi->bank[i].start);
266 map.virtual = __phys_to_virt(mi->bank[i].start);
267 map.length = mi->bank[i].size;
268 map.type = MT_MEMORY;
269
270 create_mapping(&map);
271 }
356 272
357 /* 273 /*
358 * Initialise the bootmem nodes. 274 * If there is no memory in this node, ignore it.
359 *
360 * What we really want to do is:
361 *
362 * unmap_all_regions_except_kernel();
363 * for_each_node_in_reverse_order(node) {
364 * map_node(node);
365 * allocate_bootmem_map(node);
366 * init_bootmem_node(node);
367 * free_bootmem_node(node);
368 * }
369 *
370 * but this is a 2.5-type change. For now, we just set
371 * the nodes up in reverse order.
372 *
373 * (we could also do with rolling bootmem_init and paging_init
374 * into one generic "memory_init" type function).
375 */ 275 */
376 np += num_online_nodes() - 1; 276 if (end_pfn == 0)
377 for (node = num_online_nodes() - 1; node >= 0; node--, np--) { 277 return end_pfn;
378 /*
379 * If there are no pages in this node, ignore it.
380 * Note that node 0 must always have some pages.
381 */
382 if (np->end == 0 || !node_online(node)) {
383 if (node == 0)
384 BUG();
385 continue;
386 }
387 278
388 /* 279 /*
389 * Initialise the bootmem allocator. 280 * Allocate the bootmem bitmap page.
390 */ 281 */
391 init_bootmem_node(NODE_DATA(node), map_pg, np->start, np->end); 282 boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
392 free_bootmem_node_bank(node, mi); 283 boot_pfn = find_bootmap_pfn(node, mi, boot_pages);
393 map_pg += np->bootmap_pages;
394 284
395 /* 285 /*
396 * If this is node 0, we need to reserve some areas ASAP - 286 * Initialise the bootmem allocator for this node, handing the
397 * we may use bootmem on node 0 to setup the other nodes. 287 * memory banks over to bootmem.
398 */ 288 */
399 if (node == 0) 289 node_set_online(node);
400 reserve_node_zero(bootmap_pfn, bootmap_pages); 290 pgdat = NODE_DATA(node);
401 } 291 init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn);
402 292
293 for_each_nodebank(i, mi, node)
294 free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size);
295
296 /*
297 * Reserve the bootmem bitmap for this node.
298 */
299 reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT,
300 boot_pages << PAGE_SHIFT);
403 301
404#ifdef CONFIG_BLK_DEV_INITRD 302#ifdef CONFIG_BLK_DEV_INITRD
405 if (phys_initrd_size && initrd_node >= 0) { 303 /*
406 reserve_bootmem_node(NODE_DATA(initrd_node), phys_initrd_start, 304 * If the initrd is in this node, reserve its memory.
305 */
306 if (node == initrd_node) {
307 reserve_bootmem_node(pgdat, phys_initrd_start,
407 phys_initrd_size); 308 phys_initrd_size);
408 initrd_start = __phys_to_virt(phys_initrd_start); 309 initrd_start = __phys_to_virt(phys_initrd_start);
409 initrd_end = initrd_start + phys_initrd_size; 310 initrd_end = initrd_start + phys_initrd_size;
410 } 311 }
411#endif 312#endif
412 313
413 BUG_ON(map_pg != bootmap_pfn + bootmap_pages); 314 /*
315 * Finally, reserve any node zero regions.
316 */
317 if (node == 0)
318 reserve_node_zero(pgdat);
319
320 /*
321 * initialise the zones within this node.
322 */
323 memset(zone_size, 0, sizeof(zone_size));
324 memset(zhole_size, 0, sizeof(zhole_size));
325
326 /*
327 * The size of this node has already been determined. If we need
328 * to do anything fancy with the allocation of this memory to the
329 * zones, now is the time to do it.
330 */
331 zone_size[0] = end_pfn - start_pfn;
332
333 /*
334 * For each bank in this node, calculate the size of the holes.
335 * holes = node_size - sum(bank_sizes_in_node)
336 */
337 zhole_size[0] = zone_size[0];
338 for_each_nodebank(i, mi, node)
339 zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT;
340
341 /*
342 * Adjust the sizes according to any special requirements for
343 * this machine type.
344 */
345 arch_adjust_zones(node, zone_size, zhole_size);
346
347 free_area_init_node(node, pgdat, zone_size, start_pfn, zhole_size);
348
349 return end_pfn;
414} 350}
415 351
416/* 352static void __init bootmem_init(struct meminfo *mi)
417 * paging_init() sets up the page tables, initialises the zone memory
418 * maps, and sets up the zero page, bad page and bad page tables.
419 */
420void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
421{ 353{
422 void *zero_page; 354 unsigned long addr, memend_pfn = 0;
423 int node; 355 int node, initrd_node, i;
424 356
425 bootmem_init(mi); 357 /*
358 * Invalidate the node number for empty or invalid memory banks
359 */
360 for (i = 0; i < mi->nr_banks; i++)
361 if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES)
362 mi->bank[i].node = -1;
426 363
427 memcpy(&meminfo, mi, sizeof(meminfo)); 364 memcpy(&meminfo, mi, sizeof(meminfo));
428 365
366#ifdef CONFIG_XIP_KERNEL
367#error needs fixing
368 p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK);
369 p->virtual = (unsigned long)&_stext & PMD_MASK;
370 p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
371 p->type = MT_ROM;
372 p ++;
373#endif
374
429 /* 375 /*
430 * allocate the zero page. Note that we count on this going ok. 376 * Clear out all the mappings below the kernel image.
377 * FIXME: what about XIP?
431 */ 378 */
432 zero_page = alloc_bootmem_low_pages(PAGE_SIZE); 379 for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
380 pmd_clear(pmd_off_k(addr));
433 381
434 /* 382 /*
435 * initialise the page tables. 383 * Clear out all the kernel space mappings, except for the first
384 * memory bank, up to the end of the vmalloc region.
436 */ 385 */
437 memtable_init(mi); 386 for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size);
438 if (mdesc->map_io) 387 addr < VMALLOC_END; addr += PGDIR_SIZE)
439 mdesc->map_io(); 388 pmd_clear(pmd_off_k(addr));
440 local_flush_tlb_all();
441 389
442 /* 390 /*
443 * initialise the zones within each node 391 * Locate which node contains the ramdisk image, if any.
444 */ 392 */
445 for_each_online_node(node) { 393 initrd_node = check_initrd(mi);
446 unsigned long zone_size[MAX_NR_ZONES];
447 unsigned long zhole_size[MAX_NR_ZONES];
448 struct bootmem_data *bdata;
449 pg_data_t *pgdat;
450 int i;
451 394
452 /* 395 /*
453 * Initialise the zone size information. 396 * Run through each node initialising the bootmem allocator.
454 */ 397 */
455 for (i = 0; i < MAX_NR_ZONES; i++) { 398 for_each_node(node) {
456 zone_size[i] = 0; 399 unsigned long end_pfn;
457 zhole_size[i] = 0;
458 }
459 400
460 pgdat = NODE_DATA(node); 401 end_pfn = bootmem_init_node(node, initrd_node, mi);
461 bdata = pgdat->bdata;
462 402
463 /* 403 /*
464 * The size of this node has already been determined. 404 * Remember the highest memory PFN.
465 * If we need to do anything fancy with the allocation
466 * of this memory to the zones, now is the time to do
467 * it.
468 */ 405 */
469 zone_size[0] = bdata->node_low_pfn - 406 if (end_pfn > memend_pfn)
470 (bdata->node_boot_start >> PAGE_SHIFT); 407 memend_pfn = end_pfn;
408 }
471 409
472 /* 410 high_memory = __va(memend_pfn << PAGE_SHIFT);
473 * If this zone has zero size, skip it.
474 */
475 if (!zone_size[0])
476 continue;
477 411
478 /* 412 /*
479 * For each bank in this node, calculate the size of the 413 * This doesn't seem to be used by the Linux memory manager any
480 * holes. holes = node_size - sum(bank_sizes_in_node) 414 * more, but is used by ll_rw_block. If we can get rid of it, we
481 */ 415 * also get rid of some of the stuff above as well.
482 zhole_size[0] = zone_size[0]; 416 *
483 for (i = 0; i < mi->nr_banks; i++) { 417 * Note: max_low_pfn and max_pfn reflect the number of _pages_ in
484 if (mi->bank[i].node != node) 418 * the system, not the maximum PFN.
485 continue; 419 */
420 max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET;
421}
486 422
487 zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT; 423/*
488 } 424 * Set up device the mappings. Since we clear out the page tables for all
425 * mappings above VMALLOC_END, we will remove any debug device mappings.
426 * This means you have to be careful how you debug this function, or any
427 * called function. (Do it by code inspection!)
428 */
429static void __init devicemaps_init(struct machine_desc *mdesc)
430{
431 struct map_desc map;
432 unsigned long addr;
433 void *vectors;
489 434
490 /* 435 for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
491 * Adjust the sizes according to any special 436 pmd_clear(pmd_off_k(addr));
492 * requirements for this machine type.
493 */
494 arch_adjust_zones(node, zone_size, zhole_size);
495 437
496 free_area_init_node(node, pgdat, zone_size, 438 /*
497 bdata->node_boot_start >> PAGE_SHIFT, zhole_size); 439 * Map the cache flushing regions.
440 */
441#ifdef FLUSH_BASE
442 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
443 map.virtual = FLUSH_BASE;
444 map.length = PGDIR_SIZE;
445 map.type = MT_CACHECLEAN;
446 create_mapping(&map);
447#endif
448#ifdef FLUSH_BASE_MINICACHE
449 map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE);
450 map.virtual = FLUSH_BASE_MINICACHE;
451 map.length = PGDIR_SIZE;
452 map.type = MT_MINICLEAN;
453 create_mapping(&map);
454#endif
455
456 flush_cache_all();
457 local_flush_tlb_all();
458
459 vectors = alloc_bootmem_low_pages(PAGE_SIZE);
460 BUG_ON(!vectors);
461
462 /*
463 * Create a mapping for the machine vectors at the high-vectors
464 * location (0xffff0000). If we aren't using high-vectors, also
465 * create a mapping at the low-vectors virtual address.
466 */
467 map.pfn = __phys_to_pfn(virt_to_phys(vectors));
468 map.virtual = 0xffff0000;
469 map.length = PAGE_SIZE;
470 map.type = MT_HIGH_VECTORS;
471 create_mapping(&map);
472
473 if (!vectors_high()) {
474 map.virtual = 0;
475 map.type = MT_LOW_VECTORS;
476 create_mapping(&map);
498 } 477 }
499 478
500 /* 479 /*
501 * finish off the bad pages once 480 * Ask the machine support to map in the statically mapped devices.
502 * the mem_map is initialised 481 * After this point, we can start to touch devices again.
482 */
483 if (mdesc->map_io)
484 mdesc->map_io();
485}
486
487/*
488 * paging_init() sets up the page tables, initialises the zone memory
489 * maps, and sets up the zero page, bad page and bad page tables.
490 */
491void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
492{
493 void *zero_page;
494
495 build_mem_type_table();
496 bootmem_init(mi);
497 devicemaps_init(mdesc);
498
499 top_pmd = pmd_off_k(0xffff0000);
500
501 /*
502 * allocate the zero page. Note that we count on this going ok.
503 */ 503 */
504 zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
504 memzero(zero_page, PAGE_SIZE); 505 memzero(zero_page, PAGE_SIZE);
505 empty_zero_page = virt_to_page(zero_page); 506 empty_zero_page = virt_to_page(zero_page);
506 flush_dcache_page(empty_zero_page); 507 flush_dcache_page(empty_zero_page);
@@ -562,10 +563,7 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
562 * may not be the case, especially if the user has provided the 563 * may not be the case, especially if the user has provided the
563 * information on the command line. 564 * information on the command line.
564 */ 565 */
565 for (i = 0; i < mi->nr_banks; i++) { 566 for_each_nodebank(i, mi, node) {
566 if (mi->bank[i].size == 0 || mi->bank[i].node != node)
567 continue;
568
569 bank_start = mi->bank[i].start >> PAGE_SHIFT; 567 bank_start = mi->bank[i].start >> PAGE_SHIFT;
570 if (bank_start < prev_bank_end) { 568 if (bank_start < prev_bank_end) {
571 printk(KERN_ERR "MEM: unordered memory banks. " 569 printk(KERN_ERR "MEM: unordered memory banks. "
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 7110e54182b1..6fb1258df1b5 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -26,6 +26,7 @@
26#include <linux/vmalloc.h> 26#include <linux/vmalloc.h>
27 27
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include <asm/hardware.h>
29#include <asm/io.h> 30#include <asm/io.h>
30#include <asm/tlbflush.h> 31#include <asm/tlbflush.h>
31 32
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index d125a3dc061c..61bc2fa0511e 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mm/mm-armv.c 2 * linux/arch/arm/mm/mm-armv.c
3 * 3 *
4 * Copyright (C) 1998-2002 Russell King 4 * Copyright (C) 1998-2005 Russell King
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -305,16 +305,6 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
305 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); 305 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
306} 306}
307 307
308/*
309 * Clear any PGD mapping. On a two-level page table system,
310 * the clearance is done by the middle-level functions (pmd)
311 * rather than the top-level (pgd) functions.
312 */
313static inline void clear_mapping(unsigned long virt)
314{
315 pmd_clear(pmd_off_k(virt));
316}
317
318struct mem_types { 308struct mem_types {
319 unsigned int prot_pte; 309 unsigned int prot_pte;
320 unsigned int prot_l1; 310 unsigned int prot_l1;
@@ -373,7 +363,7 @@ static struct mem_types mem_types[] __initdata = {
373/* 363/*
374 * Adjust the PMD section entries according to the CPU in use. 364 * Adjust the PMD section entries according to the CPU in use.
375 */ 365 */
376static void __init build_mem_type_table(void) 366void __init build_mem_type_table(void)
377{ 367{
378 struct cachepolicy *cp; 368 struct cachepolicy *cp;
379 unsigned int cr = get_cr(); 369 unsigned int cr = get_cr();
@@ -483,25 +473,25 @@ static void __init build_mem_type_table(void)
483 * offsets, and we take full advantage of sections and 473 * offsets, and we take full advantage of sections and
484 * supersections. 474 * supersections.
485 */ 475 */
486static void __init create_mapping(struct map_desc *md) 476void __init create_mapping(struct map_desc *md)
487{ 477{
488 unsigned long virt, length; 478 unsigned long virt, length;
489 int prot_sect, prot_l1, domain; 479 int prot_sect, prot_l1, domain;
490 pgprot_t prot_pte; 480 pgprot_t prot_pte;
491 long off; 481 unsigned long off = (u32)__pfn_to_phys(md->pfn);
492 482
493 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { 483 if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) {
494 printk(KERN_WARNING "BUG: not creating mapping for " 484 printk(KERN_WARNING "BUG: not creating mapping for "
495 "0x%08lx at 0x%08lx in user region\n", 485 "0x%016llx at 0x%08lx in user region\n",
496 md->physical, md->virtual); 486 __pfn_to_phys((u64)md->pfn), md->virtual);
497 return; 487 return;
498 } 488 }
499 489
500 if ((md->type == MT_DEVICE || md->type == MT_ROM) && 490 if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
501 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 491 md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
502 printk(KERN_WARNING "BUG: mapping for 0x%08lx at 0x%08lx " 492 printk(KERN_WARNING "BUG: mapping for 0x%016llx at 0x%08lx "
503 "overlaps vmalloc space\n", 493 "overlaps vmalloc space\n",
504 md->physical, md->virtual); 494 __pfn_to_phys((u64)md->pfn), md->virtual);
505 } 495 }
506 496
507 domain = mem_types[md->type].domain; 497 domain = mem_types[md->type].domain;
@@ -509,15 +499,40 @@ static void __init create_mapping(struct map_desc *md)
509 prot_l1 = mem_types[md->type].prot_l1 | PMD_DOMAIN(domain); 499 prot_l1 = mem_types[md->type].prot_l1 | PMD_DOMAIN(domain);
510 prot_sect = mem_types[md->type].prot_sect | PMD_DOMAIN(domain); 500 prot_sect = mem_types[md->type].prot_sect | PMD_DOMAIN(domain);
511 501
502 /*
503 * Catch 36-bit addresses
504 */
505 if(md->pfn >= 0x100000) {
506 if(domain) {
507 printk(KERN_ERR "MM: invalid domain in supersection "
508 "mapping for 0x%016llx at 0x%08lx\n",
509 __pfn_to_phys((u64)md->pfn), md->virtual);
510 return;
511 }
512 if((md->virtual | md->length | __pfn_to_phys(md->pfn))
513 & ~SUPERSECTION_MASK) {
514 printk(KERN_ERR "MM: cannot create mapping for "
515 "0x%016llx at 0x%08lx invalid alignment\n",
516 __pfn_to_phys((u64)md->pfn), md->virtual);
517 return;
518 }
519
520 /*
521 * Shift bits [35:32] of address into bits [23:20] of PMD
522 * (See ARMv6 spec).
523 */
524 off |= (((md->pfn >> (32 - PAGE_SHIFT)) & 0xF) << 20);
525 }
526
512 virt = md->virtual; 527 virt = md->virtual;
513 off = md->physical - virt; 528 off -= virt;
514 length = md->length; 529 length = md->length;
515 530
516 if (mem_types[md->type].prot_l1 == 0 && 531 if (mem_types[md->type].prot_l1 == 0 &&
517 (virt & 0xfffff || (virt + off) & 0xfffff || (virt + length) & 0xfffff)) { 532 (virt & 0xfffff || (virt + off) & 0xfffff || (virt + length) & 0xfffff)) {
518 printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " 533 printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not "
519 "be mapped using pages, ignoring.\n", 534 "be mapped using pages, ignoring.\n",
520 md->physical, md->virtual); 535 __pfn_to_phys(md->pfn), md->virtual);
521 return; 536 return;
522 } 537 }
523 538
@@ -535,13 +550,22 @@ static void __init create_mapping(struct map_desc *md)
535 * of the actual domain assignments in use. 550 * of the actual domain assignments in use.
536 */ 551 */
537 if (cpu_architecture() >= CPU_ARCH_ARMv6 && domain == 0) { 552 if (cpu_architecture() >= CPU_ARCH_ARMv6 && domain == 0) {
538 /* Align to supersection boundary */ 553 /*
539 while ((virt & ~SUPERSECTION_MASK || (virt + off) & 554 * Align to supersection boundary if !high pages.
540 ~SUPERSECTION_MASK) && length >= (PGDIR_SIZE / 2)) { 555 * High pages have already been checked for proper
541 alloc_init_section(virt, virt + off, prot_sect); 556 * alignment above and they will fail the SUPSERSECTION_MASK
542 557 * check because of the way the address is encoded into
543 virt += (PGDIR_SIZE / 2); 558 * offset.
544 length -= (PGDIR_SIZE / 2); 559 */
560 if (md->pfn <= 0x100000) {
561 while ((virt & ~SUPERSECTION_MASK ||
562 (virt + off) & ~SUPERSECTION_MASK) &&
563 length >= (PGDIR_SIZE / 2)) {
564 alloc_init_section(virt, virt + off, prot_sect);
565
566 virt += (PGDIR_SIZE / 2);
567 length -= (PGDIR_SIZE / 2);
568 }
545 } 569 }
546 570
547 while (length >= SUPERSECTION_SIZE) { 571 while (length >= SUPERSECTION_SIZE) {
@@ -601,100 +625,6 @@ void setup_mm_for_reboot(char mode)
601 } 625 }
602} 626}
603 627
604extern void _stext, _etext;
605
606/*
607 * Setup initial mappings. We use the page we allocated for zero page to hold
608 * the mappings, which will get overwritten by the vectors in traps_init().
609 * The mappings must be in virtual address order.
610 */
611void __init memtable_init(struct meminfo *mi)
612{
613 struct map_desc *init_maps, *p, *q;
614 unsigned long address = 0;
615 int i;
616
617 build_mem_type_table();
618
619 init_maps = p = alloc_bootmem_low_pages(PAGE_SIZE);
620
621#ifdef CONFIG_XIP_KERNEL
622 p->physical = CONFIG_XIP_PHYS_ADDR & PMD_MASK;
623 p->virtual = (unsigned long)&_stext & PMD_MASK;
624 p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
625 p->type = MT_ROM;
626 p ++;
627#endif
628
629 for (i = 0; i < mi->nr_banks; i++) {
630 if (mi->bank[i].size == 0)
631 continue;
632
633 p->physical = mi->bank[i].start;
634 p->virtual = __phys_to_virt(p->physical);
635 p->length = mi->bank[i].size;
636 p->type = MT_MEMORY;
637 p ++;
638 }
639
640#ifdef FLUSH_BASE
641 p->physical = FLUSH_BASE_PHYS;
642 p->virtual = FLUSH_BASE;
643 p->length = PGDIR_SIZE;
644 p->type = MT_CACHECLEAN;
645 p ++;
646#endif
647
648#ifdef FLUSH_BASE_MINICACHE
649 p->physical = FLUSH_BASE_PHYS + PGDIR_SIZE;
650 p->virtual = FLUSH_BASE_MINICACHE;
651 p->length = PGDIR_SIZE;
652 p->type = MT_MINICLEAN;
653 p ++;
654#endif
655
656 /*
657 * Go through the initial mappings, but clear out any
658 * pgdir entries that are not in the description.
659 */
660 q = init_maps;
661 do {
662 if (address < q->virtual || q == p) {
663 clear_mapping(address);
664 address += PGDIR_SIZE;
665 } else {
666 create_mapping(q);
667
668 address = q->virtual + q->length;
669 address = (address + PGDIR_SIZE - 1) & PGDIR_MASK;
670
671 q ++;
672 }
673 } while (address != 0);
674
675 /*
676 * Create a mapping for the machine vectors at the high-vectors
677 * location (0xffff0000). If we aren't using high-vectors, also
678 * create a mapping at the low-vectors virtual address.
679 */
680 init_maps->physical = virt_to_phys(init_maps);
681 init_maps->virtual = 0xffff0000;
682 init_maps->length = PAGE_SIZE;
683 init_maps->type = MT_HIGH_VECTORS;
684 create_mapping(init_maps);
685
686 if (!vectors_high()) {
687 init_maps->virtual = 0;
688 init_maps->type = MT_LOW_VECTORS;
689 create_mapping(init_maps);
690 }
691
692 flush_cache_all();
693 local_flush_tlb_all();
694
695 top_pmd = pmd_off_k(0xffff0000);
696}
697
698/* 628/*
699 * Create the architecture specific mappings 629 * Create the architecture specific mappings
700 */ 630 */
diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile
index 8ffb523e6c77..6a94e54848fd 100644
--- a/arch/arm/oprofile/Makefile
+++ b/arch/arm/oprofile/Makefile
@@ -6,6 +6,6 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
6 oprofilefs.o oprofile_stats.o \ 6 oprofilefs.o oprofile_stats.o \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) init.o backtrace.o 9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
10oprofile-$(CONFIG_CPU_XSCALE) += common.o op_model_xscale.o 10oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o
11 11
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index e57dde882898..1415930ceee1 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -10,74 +10,23 @@
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/oprofile.h> 11#include <linux/oprofile.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <asm/semaphore.h>
14#include <linux/sysdev.h> 13#include <linux/sysdev.h>
14#include <asm/semaphore.h>
15 15
16#include "op_counter.h" 16#include "op_counter.h"
17#include "op_arm_model.h" 17#include "op_arm_model.h"
18 18
19static struct op_arm_model_spec *pmu_model; 19static struct op_arm_model_spec *op_arm_model;
20static int pmu_enabled; 20static int op_arm_enabled;
21static struct semaphore pmu_sem; 21static struct semaphore op_arm_sem;
22
23static int pmu_start(void);
24static int pmu_setup(void);
25static void pmu_stop(void);
26static int pmu_create_files(struct super_block *, struct dentry *);
27
28#ifdef CONFIG_PM
29static int pmu_suspend(struct sys_device *dev, pm_message_t state)
30{
31 if (pmu_enabled)
32 pmu_stop();
33 return 0;
34}
35
36static int pmu_resume(struct sys_device *dev)
37{
38 if (pmu_enabled)
39 pmu_start();
40 return 0;
41}
42
43static struct sysdev_class oprofile_sysclass = {
44 set_kset_name("oprofile"),
45 .resume = pmu_resume,
46 .suspend = pmu_suspend,
47};
48
49static struct sys_device device_oprofile = {
50 .id = 0,
51 .cls = &oprofile_sysclass,
52};
53
54static int __init init_driverfs(void)
55{
56 int ret;
57
58 if (!(ret = sysdev_class_register(&oprofile_sysclass)))
59 ret = sysdev_register(&device_oprofile);
60
61 return ret;
62}
63
64static void exit_driverfs(void)
65{
66 sysdev_unregister(&device_oprofile);
67 sysdev_class_unregister(&oprofile_sysclass);
68}
69#else
70#define init_driverfs() do { } while (0)
71#define exit_driverfs() do { } while (0)
72#endif /* CONFIG_PM */
73 22
74struct op_counter_config counter_config[OP_MAX_COUNTER]; 23struct op_counter_config counter_config[OP_MAX_COUNTER];
75 24
76static int pmu_create_files(struct super_block *sb, struct dentry *root) 25static int op_arm_create_files(struct super_block *sb, struct dentry *root)
77{ 26{
78 unsigned int i; 27 unsigned int i;
79 28
80 for (i = 0; i < pmu_model->num_counters; i++) { 29 for (i = 0; i < op_arm_model->num_counters; i++) {
81 struct dentry *dir; 30 struct dentry *dir;
82 char buf[2]; 31 char buf[2];
83 32
@@ -94,63 +43,123 @@ static int pmu_create_files(struct super_block *sb, struct dentry *root)
94 return 0; 43 return 0;
95} 44}
96 45
97static int pmu_setup(void) 46static int op_arm_setup(void)
98{ 47{
99 int ret; 48 int ret;
100 49
101 spin_lock(&oprofilefs_lock); 50 spin_lock(&oprofilefs_lock);
102 ret = pmu_model->setup_ctrs(); 51 ret = op_arm_model->setup_ctrs();
103 spin_unlock(&oprofilefs_lock); 52 spin_unlock(&oprofilefs_lock);
104 return ret; 53 return ret;
105} 54}
106 55
107static int pmu_start(void) 56static int op_arm_start(void)
108{ 57{
109 int ret = -EBUSY; 58 int ret = -EBUSY;
110 59
111 down(&pmu_sem); 60 down(&op_arm_sem);
112 if (!pmu_enabled) { 61 if (!op_arm_enabled) {
113 ret = pmu_model->start(); 62 ret = op_arm_model->start();
114 pmu_enabled = !ret; 63 op_arm_enabled = !ret;
115 } 64 }
116 up(&pmu_sem); 65 up(&op_arm_sem);
117 return ret; 66 return ret;
118} 67}
119 68
120static void pmu_stop(void) 69static void op_arm_stop(void)
70{
71 down(&op_arm_sem);
72 if (op_arm_enabled)
73 op_arm_model->stop();
74 op_arm_enabled = 0;
75 up(&op_arm_sem);
76}
77
78#ifdef CONFIG_PM
79static int op_arm_suspend(struct sys_device *dev, pm_message_t state)
121{ 80{
122 down(&pmu_sem); 81 down(&op_arm_sem);
123 if (pmu_enabled) 82 if (op_arm_enabled)
124 pmu_model->stop(); 83 op_arm_model->stop();
125 pmu_enabled = 0; 84 up(&op_arm_sem);
126 up(&pmu_sem); 85 return 0;
127} 86}
128 87
129int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec) 88static int op_arm_resume(struct sys_device *dev)
130{ 89{
131 init_MUTEX(&pmu_sem); 90 down(&op_arm_sem);
91 if (op_arm_enabled && op_arm_model->start())
92 op_arm_enabled = 0;
93 up(&op_arm_sem);
94 return 0;
95}
96
97static struct sysdev_class oprofile_sysclass = {
98 set_kset_name("oprofile"),
99 .resume = op_arm_resume,
100 .suspend = op_arm_suspend,
101};
132 102
133 if (spec->init() < 0) 103static struct sys_device device_oprofile = {
134 return -ENODEV; 104 .id = 0,
105 .cls = &oprofile_sysclass,
106};
135 107
136 pmu_model = spec; 108static int __init init_driverfs(void)
137 init_driverfs(); 109{
138 ops->create_files = pmu_create_files; 110 int ret;
139 ops->setup = pmu_setup;
140 ops->shutdown = pmu_stop;
141 ops->start = pmu_start;
142 ops->stop = pmu_stop;
143 ops->cpu_type = pmu_model->name;
144 printk(KERN_INFO "oprofile: using %s PMU\n", spec->name);
145 111
146 return 0; 112 if (!(ret = sysdev_class_register(&oprofile_sysclass)))
113 ret = sysdev_register(&device_oprofile);
114
115 return ret;
116}
117
118static void exit_driverfs(void)
119{
120 sysdev_unregister(&device_oprofile);
121 sysdev_class_unregister(&oprofile_sysclass);
122}
123#else
124#define init_driverfs() do { } while (0)
125#define exit_driverfs() do { } while (0)
126#endif /* CONFIG_PM */
127
128int __init oprofile_arch_init(struct oprofile_operations *ops)
129{
130 struct op_arm_model_spec *spec = NULL;
131 int ret = -ENODEV;
132
133#ifdef CONFIG_CPU_XSCALE
134 spec = &op_xscale_spec;
135#endif
136
137 if (spec) {
138 init_MUTEX(&op_arm_sem);
139
140 if (spec->init() < 0)
141 return -ENODEV;
142
143 op_arm_model = spec;
144 init_driverfs();
145 ops->create_files = op_arm_create_files;
146 ops->setup = op_arm_setup;
147 ops->shutdown = op_arm_stop;
148 ops->start = op_arm_start;
149 ops->stop = op_arm_stop;
150 ops->cpu_type = op_arm_model->name;
151 ops->backtrace = arm_backtrace;
152 printk(KERN_INFO "oprofile: using %s\n", spec->name);
153 }
154
155 return ret;
147} 156}
148 157
149void pmu_exit(void) 158void oprofile_arch_exit(void)
150{ 159{
151 if (pmu_model) { 160 if (op_arm_model) {
152 exit_driverfs(); 161 exit_driverfs();
153 pmu_model = NULL; 162 op_arm_model = NULL;
154 } 163 }
155} 164}
156 165
diff --git a/arch/arm/oprofile/init.c b/arch/arm/oprofile/init.c
deleted file mode 100644
index d315a3a86c86..000000000000
--- a/arch/arm/oprofile/init.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/**
2 * @file init.c
3 *
4 * @remark Copyright 2004 Oprofile Authors
5 * @remark Read the file COPYING
6 *
7 * @author Zwane Mwaikambo
8 */
9
10#include <linux/oprofile.h>
11#include <linux/init.h>
12#include <linux/errno.h>
13#include "op_arm_model.h"
14
15int __init oprofile_arch_init(struct oprofile_operations *ops)
16{
17 int ret = -ENODEV;
18
19#ifdef CONFIG_CPU_XSCALE
20 ret = pmu_init(ops, &op_xscale_spec);
21#endif
22
23 ops->backtrace = arm_backtrace;
24
25 return ret;
26}
27
28void oprofile_arch_exit(void)
29{
30#ifdef CONFIG_CPU_XSCALE
31 pmu_exit();
32#endif
33}
diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h
index 2148d07484b7..38c6ad158547 100644
--- a/arch/arm/oprofile/op_arm_model.h
+++ b/arch/arm/oprofile/op_arm_model.h
@@ -26,6 +26,6 @@ extern struct op_arm_model_spec op_xscale_spec;
26 26
27extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth); 27extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth);
28 28
29extern int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec); 29extern int __init op_arm_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec);
30extern void pmu_exit(void); 30extern void op_arm_exit(void);
31#endif /* OP_ARM_MODEL_H */ 31#endif /* OP_ARM_MODEL_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 7719a4062e3a..7ad69f14a3e7 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -59,7 +59,11 @@ void __init omap_detect_sram(void)
59} 59}
60 60
61static struct map_desc omap_sram_io_desc[] __initdata = { 61static struct map_desc omap_sram_io_desc[] __initdata = {
62 { OMAP1_SRAM_BASE, OMAP1_SRAM_START, 0, MT_DEVICE } 62 { /* .length gets filled in at runtime */
63 .virtual = OMAP1_SRAM_BASE,
64 .pfn = __phys_to_pfn(OMAP1_SRAM_START),
65 .type = MT_DEVICE
66 }
63}; 67};
64 68
65/* 69/*
diff --git a/drivers/char/nvram.c b/drivers/char/nvram.c
index 1af733d07321..9e24bbd4090c 100644
--- a/drivers/char/nvram.c
+++ b/drivers/char/nvram.c
@@ -32,9 +32,11 @@
32 * added changelog 32 * added changelog
33 * 1.2 Erik Gilling: Cobalt Networks support 33 * 1.2 Erik Gilling: Cobalt Networks support
34 * Tim Hockin: general cleanup, Cobalt support 34 * Tim Hockin: general cleanup, Cobalt support
35 * 1.3 Jon Ringle: Comdial MP1000 support
36 *
35 */ 37 */
36 38
37#define NVRAM_VERSION "1.2" 39#define NVRAM_VERSION "1.3"
38 40
39#include <linux/module.h> 41#include <linux/module.h>
40#include <linux/config.h> 42#include <linux/config.h>
@@ -45,6 +47,7 @@
45#define PC 1 47#define PC 1
46#define ATARI 2 48#define ATARI 2
47#define COBALT 3 49#define COBALT 3
50#define MP1000 4
48 51
49/* select machine configuration */ 52/* select machine configuration */
50#if defined(CONFIG_ATARI) 53#if defined(CONFIG_ATARI)
@@ -54,6 +57,9 @@
54# if defined(CONFIG_COBALT) 57# if defined(CONFIG_COBALT)
55# include <linux/cobalt-nvram.h> 58# include <linux/cobalt-nvram.h>
56# define MACH COBALT 59# define MACH COBALT
60# elif defined(CONFIG_MACH_MP1000)
61# undef MACH
62# define MACH MP1000
57# else 63# else
58# define MACH PC 64# define MACH PC
59# endif 65# endif
@@ -112,6 +118,23 @@
112 118
113#endif 119#endif
114 120
121#if MACH == MP1000
122
123/* RTC in a MP1000 */
124#define CHECK_DRIVER_INIT() 1
125
126#define MP1000_CKS_RANGE_START 0
127#define MP1000_CKS_RANGE_END 111
128#define MP1000_CKS_LOC 112
129
130#define NVRAM_BYTES (128-NVRAM_FIRST_BYTE)
131
132#define mach_check_checksum mp1000_check_checksum
133#define mach_set_checksum mp1000_set_checksum
134#define mach_proc_infos mp1000_proc_infos
135
136#endif
137
115/* Note that *all* calls to CMOS_READ and CMOS_WRITE must be done with 138/* Note that *all* calls to CMOS_READ and CMOS_WRITE must be done with
116 * rtc_lock held. Due to the index-port/data-port design of the RTC, we 139 * rtc_lock held. Due to the index-port/data-port design of the RTC, we
117 * don't want two different things trying to get to it at once. (e.g. the 140 * don't want two different things trying to get to it at once. (e.g. the
@@ -915,6 +938,91 @@ atari_proc_infos(unsigned char *nvram, char *buffer, int *len,
915 938
916#endif /* MACH == ATARI */ 939#endif /* MACH == ATARI */
917 940
941#if MACH == MP1000
942
943static int
944mp1000_check_checksum(void)
945{
946 int i;
947 unsigned short sum = 0;
948 unsigned short expect;
949
950 for (i = MP1000_CKS_RANGE_START; i <= MP1000_CKS_RANGE_END; ++i)
951 sum += __nvram_read_byte(i);
952
953 expect = __nvram_read_byte(MP1000_CKS_LOC+1)<<8 |
954 __nvram_read_byte(MP1000_CKS_LOC);
955 return ((sum & 0xffff) == expect);
956}
957
958static void
959mp1000_set_checksum(void)
960{
961 int i;
962 unsigned short sum = 0;
963
964 for (i = MP1000_CKS_RANGE_START; i <= MP1000_CKS_RANGE_END; ++i)
965 sum += __nvram_read_byte(i);
966 __nvram_write_byte(sum >> 8, MP1000_CKS_LOC + 1);
967 __nvram_write_byte(sum & 0xff, MP1000_CKS_LOC);
968}
969
970#ifdef CONFIG_PROC_FS
971
972#define SERVER_N_LEN 32
973#define PATH_N_LEN 32
974#define FILE_N_LEN 32
975#define NVRAM_MAGIC_SIG 0xdead
976
977typedef struct NvRamImage
978{
979 unsigned short int magic;
980 unsigned short int mode;
981 char fname[FILE_N_LEN];
982 char path[PATH_N_LEN];
983 char server[SERVER_N_LEN];
984 char pad[12];
985} NvRam;
986
987static int
988mp1000_proc_infos(unsigned char *nvram, char *buffer, int *len,
989 off_t *begin, off_t offset, int size)
990{
991 int checksum;
992 NvRam* nv = (NvRam*)nvram;
993
994 spin_lock_irq(&rtc_lock);
995 checksum = __nvram_check_checksum();
996 spin_unlock_irq(&rtc_lock);
997
998 PRINT_PROC("Checksum status: %svalid\n", checksum ? "" : "not ");
999
1000 switch( nv->mode )
1001 {
1002 case 0 :
1003 PRINT_PROC( "\tMode 0, tftp prompt\n" );
1004 break;
1005 case 1 :
1006 PRINT_PROC( "\tMode 1, booting from disk\n" );
1007 break;
1008 case 2 :
1009 PRINT_PROC( "\tMode 2, Alternate boot from disk /boot/%s\n", nv->fname );
1010 break;
1011 case 3 :
1012 PRINT_PROC( "\tMode 3, Booting from net:\n" );
1013 PRINT_PROC( "\t\t%s:%s%s\n",nv->server, nv->path, nv->fname );
1014 break;
1015 default:
1016 PRINT_PROC( "\tInconsistant nvram?\n" );
1017 break;
1018 }
1019
1020 return 1;
1021}
1022#endif
1023
1024#endif /* MACH == MP1000 */
1025
918MODULE_LICENSE("GPL"); 1026MODULE_LICENSE("GPL");
919 1027
920EXPORT_SYMBOL(__nvram_read_byte); 1028EXPORT_SYMBOL(__nvram_read_byte);
diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c
index 91c74843dc0d..1e6bdba26756 100644
--- a/drivers/mmc/mmci.c
+++ b/drivers/mmc/mmci.c
@@ -24,6 +24,7 @@
24#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/scatterlist.h> 26#include <asm/scatterlist.h>
27#include <asm/sizes.h>
27#include <asm/hardware/amba.h> 28#include <asm/hardware/amba.h>
28#include <asm/hardware/clock.h> 29#include <asm/hardware/clock.h>
29#include <asm/mach/mmc.h> 30#include <asm/mach/mmc.h>
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index 8dcaa357b4bb..9133351ba483 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -21,6 +21,7 @@
21#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
22#include <linux/mtd/concat.h> 22#include <linux/mtd/concat.h>
23 23
24#include <asm/hardware.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/sizes.h> 26#include <asm/sizes.h>
26#include <asm/mach/flash.h> 27#include <asm/mach/flash.h>
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5148d47492a0..fee8c5cf1f3a 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1338,7 +1338,7 @@ config FORCEDETH
1338 1338
1339config CS89x0 1339config CS89x0
1340 tristate "CS89x0 support" 1340 tristate "CS89x0 support"
1341 depends on (NET_PCI && (ISA || ARCH_IXDP2X01)) || ARCH_PNX0105 1341 depends on (NET_PCI && (ISA || ARCH_IXDP2X01)) || ARCH_PNX0105 || MACH_MP1000
1342 ---help--- 1342 ---help---
1343 Support for CS89x0 chipset based Ethernet cards. If you have a 1343 Support for CS89x0 chipset based Ethernet cards. If you have a
1344 network (Ethernet) card of this type, say Y and read the 1344 network (Ethernet) card of this type, say Y and read the
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c
index c56d86d371a9..3d50e953faaa 100644
--- a/drivers/net/arm/am79c961a.c
+++ b/drivers/net/arm/am79c961a.c
@@ -29,6 +29,7 @@
29 29
30#include <asm/system.h> 30#include <asm/system.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/hardware.h>
32#include <asm/io.h> 33#include <asm/io.h>
33 34
34#define TX_BUFFERS 15 35#define TX_BUFFERS 15
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index a6078ad9b654..bfdae10036ed 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -182,6 +182,10 @@ static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};
182#define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */ 182#define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */
183static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0}; 183static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0};
184static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0}; 184static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0};
185#elif defined(CONFIG_MACH_MP1000)
186#include <asm/arch/mp1000-seprom.h>
187static unsigned int netcard_portlist[] __initdata = {MP1000_EIO_BASE+0x300, 0};
188static unsigned int cs8900_irq_map[] = {IRQ_EINT3,0,0,0};
185#else 189#else
186static unsigned int netcard_portlist[] __initdata = 190static unsigned int netcard_portlist[] __initdata =
187 { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; 191 { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
@@ -590,6 +594,10 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
590 cnt -= j; 594 cnt -= j;
591 } 595 }
592 } else 596 } else
597#elif defined(CONFIG_MACH_MP1000)
598 if (1) {
599 memcpy(dev->dev_addr, get_eeprom_mac_address(), ETH_ALEN);
600 } else
593#endif 601#endif
594 602
595 if ((readreg(dev, PP_SelfST) & (EEPROM_OK | EEPROM_PRESENT)) == 603 if ((readreg(dev, PP_SelfST) & (EEPROM_OK | EEPROM_PRESENT)) ==
@@ -649,6 +657,10 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
649 if (1) { 657 if (1) {
650 printk(KERN_NOTICE "cs89x0: No EEPROM on HiCO.SH4\n"); 658 printk(KERN_NOTICE "cs89x0: No EEPROM on HiCO.SH4\n");
651 } else 659 } else
660#elif defined(CONFIG_MACH_MP1000)
661 if (1) {
662 lp->force |= FORCE_RJ45;
663 } else
652#endif 664#endif
653 if ((readreg(dev, PP_SelfST) & EEPROM_PRESENT) == 0) 665 if ((readreg(dev, PP_SelfST) & EEPROM_PRESENT) == 0)
654 printk(KERN_WARNING "cs89x0: No EEPROM, relying on command line....\n"); 666 printk(KERN_WARNING "cs89x0: No EEPROM, relying on command line....\n");
@@ -1231,7 +1243,7 @@ net_open(struct net_device *dev)
1231 else 1243 else
1232#endif 1244#endif
1233 { 1245 {
1234#if !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX0105) 1246#if !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX0105) && !defined(CONFIG_MACH_MP1000)
1235 if (((1 << dev->irq) & lp->irq_map) == 0) { 1247 if (((1 << dev->irq) & lp->irq_map) == 0) {
1236 printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n", 1248 printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",
1237 dev->name, dev->irq, lp->irq_map); 1249 dev->name, dev->irq, lp->irq_map);
diff --git a/drivers/net/cs89x0.h b/drivers/net/cs89x0.h
index decea264f121..f19d1ebe0183 100644
--- a/drivers/net/cs89x0.h
+++ b/drivers/net/cs89x0.h
@@ -16,7 +16,7 @@
16 16
17#include <linux/config.h> 17#include <linux/config.h>
18 18
19#if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105) 19#if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105) || defined (CONFIG_MACH_MP1000)
20/* IXDP2401/IXDP2801 uses dword-aligned register addressing */ 20/* IXDP2401/IXDP2801 uses dword-aligned register addressing */
21#define CS89x0_PORT(reg) ((reg) * 2) 21#define CS89x0_PORT(reg) ((reg) * 2)
22#else 22#else
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig
index ca5914091d3a..d54156f11e61 100644
--- a/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@ -400,5 +400,15 @@ config VIA_FIR
400 To compile it as a module, choose M here: the module will be called 400 To compile it as a module, choose M here: the module will be called
401 via-ircc. 401 via-ircc.
402 402
403config PXA_FICP
404 tristate "Intel PXA2xx Internal FICP"
405 depends on ARCH_PXA && IRDA
406 help
407 Say Y or M here if you want to build support for the PXA2xx
408 built-in IRDA interface which can support both SIR and FIR.
409 This driver relies on platform specific helper routines so
410 available capabilities may vary from one PXA2xx target to
411 another.
412
403endmenu 413endmenu
404 414
diff --git a/drivers/net/irda/Makefile b/drivers/net/irda/Makefile
index 29a8bd812b21..e7a8b7f7f5dd 100644
--- a/drivers/net/irda/Makefile
+++ b/drivers/net/irda/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SMC_IRCC_FIR) += smsc-ircc2.o
18obj-$(CONFIG_ALI_FIR) += ali-ircc.o 18obj-$(CONFIG_ALI_FIR) += ali-ircc.o
19obj-$(CONFIG_VLSI_FIR) += vlsi_ir.o 19obj-$(CONFIG_VLSI_FIR) += vlsi_ir.o
20obj-$(CONFIG_VIA_FIR) += via-ircc.o 20obj-$(CONFIG_VIA_FIR) += via-ircc.o
21obj-$(CONFIG_PXA_FICP) += pxaficp_ir.o
21# Old dongle drivers for old SIR drivers 22# Old dongle drivers for old SIR drivers
22obj-$(CONFIG_ESI_DONGLE_OLD) += esi.o 23obj-$(CONFIG_ESI_DONGLE_OLD) += esi.o
23obj-$(CONFIG_TEKRAM_DONGLE_OLD) += tekram.o 24obj-$(CONFIG_TEKRAM_DONGLE_OLD) += tekram.o
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
new file mode 100644
index 000000000000..aef80f5e7c9c
--- /dev/null
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -0,0 +1,871 @@
1/*
2 * linux/drivers/net/irda/pxaficp_ir.c
3 *
4 * Based on sa1100_ir.c by Russell King
5 *
6 * Changes copyright (C) 2003-2005 MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor
13 *
14 */
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/types.h>
18#include <linux/init.h>
19#include <linux/errno.h>
20#include <linux/netdevice.h>
21#include <linux/slab.h>
22#include <linux/rtnetlink.h>
23#include <linux/interrupt.h>
24#include <linux/dma-mapping.h>
25#include <linux/pm.h>
26
27#include <net/irda/irda.h>
28#include <net/irda/irmod.h>
29#include <net/irda/wrapper.h>
30#include <net/irda/irda_device.h>
31
32#include <asm/irq.h>
33#include <asm/dma.h>
34#include <asm/delay.h>
35#include <asm/hardware.h>
36#include <asm/arch/irda.h>
37#include <asm/arch/pxa-regs.h>
38
39#ifdef CONFIG_MACH_MAINSTONE
40#include <asm/arch/mainstone.h>
41#endif
42
43#define IrSR_RXPL_NEG_IS_ZERO (1<<4)
44#define IrSR_RXPL_POS_IS_ZERO 0x0
45#define IrSR_TXPL_NEG_IS_ZERO (1<<3)
46#define IrSR_TXPL_POS_IS_ZERO 0x0
47#define IrSR_XMODE_PULSE_1_6 (1<<2)
48#define IrSR_XMODE_PULSE_3_16 0x0
49#define IrSR_RCVEIR_IR_MODE (1<<1)
50#define IrSR_RCVEIR_UART_MODE 0x0
51#define IrSR_XMITIR_IR_MODE (1<<0)
52#define IrSR_XMITIR_UART_MODE 0x0
53
54#define IrSR_IR_RECEIVE_ON (\
55 IrSR_RXPL_NEG_IS_ZERO | \
56 IrSR_TXPL_POS_IS_ZERO | \
57 IrSR_XMODE_PULSE_3_16 | \
58 IrSR_RCVEIR_IR_MODE | \
59 IrSR_XMITIR_UART_MODE)
60
61#define IrSR_IR_TRANSMIT_ON (\
62 IrSR_RXPL_NEG_IS_ZERO | \
63 IrSR_TXPL_POS_IS_ZERO | \
64 IrSR_XMODE_PULSE_3_16 | \
65 IrSR_RCVEIR_UART_MODE | \
66 IrSR_XMITIR_IR_MODE)
67
68struct pxa_irda {
69 int speed;
70 int newspeed;
71 unsigned long last_oscr;
72
73 unsigned char *dma_rx_buff;
74 unsigned char *dma_tx_buff;
75 dma_addr_t dma_rx_buff_phy;
76 dma_addr_t dma_tx_buff_phy;
77 unsigned int dma_tx_buff_len;
78 int txdma;
79 int rxdma;
80
81 struct net_device_stats stats;
82 struct irlap_cb *irlap;
83 struct qos_info qos;
84
85 iobuff_t tx_buff;
86 iobuff_t rx_buff;
87
88 struct device *dev;
89 struct pxaficp_platform_data *pdata;
90};
91
92
93#define IS_FIR(si) ((si)->speed >= 4000000)
94#define IRDA_FRAME_SIZE_LIMIT 2047
95
96inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si)
97{
98 DCSR(si->rxdma) = DCSR_NODESC;
99 DSADR(si->rxdma) = __PREG(ICDR);
100 DTADR(si->rxdma) = si->dma_rx_buff_phy;
101 DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
102 DCSR(si->rxdma) |= DCSR_RUN;
103}
104
105inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si)
106{
107 DCSR(si->txdma) = DCSR_NODESC;
108 DSADR(si->txdma) = si->dma_tx_buff_phy;
109 DTADR(si->txdma) = __PREG(ICDR);
110 DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
111 DCSR(si->txdma) |= DCSR_RUN;
112}
113
114/*
115 * Set the IrDA communications speed.
116 */
117static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
118{
119 unsigned long flags;
120 unsigned int divisor;
121
122 switch (speed) {
123 case 9600: case 19200: case 38400:
124 case 57600: case 115200:
125
126 /* refer to PXA250/210 Developer's Manual 10-7 */
127 /* BaudRate = 14.7456 MHz / (16*Divisor) */
128 divisor = 14745600 / (16 * speed);
129
130 local_irq_save(flags);
131
132 if (IS_FIR(si)) {
133 /* stop RX DMA */
134 DCSR(si->rxdma) &= ~DCSR_RUN;
135 /* disable FICP */
136 ICCR0 = 0;
137 pxa_set_cken(CKEN13_FICP, 0);
138
139 /* set board transceiver to SIR mode */
140 si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
141
142 /* configure GPIO46/47 */
143 pxa_gpio_mode(GPIO46_STRXD_MD);
144 pxa_gpio_mode(GPIO47_STTXD_MD);
145
146 /* enable the STUART clock */
147 pxa_set_cken(CKEN5_STUART, 1);
148 }
149
150 /* disable STUART first */
151 STIER = 0;
152
153 /* access DLL & DLH */
154 STLCR |= LCR_DLAB;
155 STDLL = divisor & 0xff;
156 STDLH = divisor >> 8;
157 STLCR &= ~LCR_DLAB;
158
159 si->speed = speed;
160 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
161 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
162
163 local_irq_restore(flags);
164 break;
165
166 case 4000000:
167 local_irq_save(flags);
168
169 /* disable STUART */
170 STIER = 0;
171 STISR = 0;
172 pxa_set_cken(CKEN5_STUART, 0);
173
174 /* disable FICP first */
175 ICCR0 = 0;
176
177 /* set board transceiver to FIR mode */
178 si->pdata->transceiver_mode(si->dev, IR_FIRMODE);
179
180 /* configure GPIO46/47 */
181 pxa_gpio_mode(GPIO46_ICPRXD_MD);
182 pxa_gpio_mode(GPIO47_ICPTXD_MD);
183
184 /* enable the FICP clock */
185 pxa_set_cken(CKEN13_FICP, 1);
186
187 si->speed = speed;
188 pxa_irda_fir_dma_rx_start(si);
189 ICCR0 = ICCR0_ITR | ICCR0_RXE;
190
191 local_irq_restore(flags);
192 break;
193
194 default:
195 return -EINVAL;
196 }
197
198 return 0;
199}
200
201/* SIR interrupt service routine. */
202static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id, struct pt_regs *regs)
203{
204 struct net_device *dev = dev_id;
205 struct pxa_irda *si = netdev_priv(dev);
206 int iir, lsr, data;
207
208 iir = STIIR;
209
210 switch (iir & 0x0F) {
211 case 0x06: /* Receiver Line Status */
212 lsr = STLSR;
213 while (lsr & LSR_FIFOE) {
214 data = STRBR;
215 if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) {
216 printk(KERN_DEBUG "pxa_ir: sir receiving error\n");
217 si->stats.rx_errors++;
218 if (lsr & LSR_FE)
219 si->stats.rx_frame_errors++;
220 if (lsr & LSR_OE)
221 si->stats.rx_fifo_errors++;
222 } else {
223 si->stats.rx_bytes++;
224 async_unwrap_char(dev, &si->stats, &si->rx_buff, data);
225 }
226 lsr = STLSR;
227 }
228 dev->last_rx = jiffies;
229 si->last_oscr = OSCR;
230 break;
231
232 case 0x04: /* Received Data Available */
233 /* forth through */
234
235 case 0x0C: /* Character Timeout Indication */
236 do {
237 si->stats.rx_bytes++;
238 async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR);
239 } while (STLSR & LSR_DR);
240 dev->last_rx = jiffies;
241 si->last_oscr = OSCR;
242 break;
243
244 case 0x02: /* Transmit FIFO Data Request */
245 while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) {
246 STTHR = *si->tx_buff.data++;
247 si->tx_buff.len -= 1;
248 }
249
250 if (si->tx_buff.len == 0) {
251 si->stats.tx_packets++;
252 si->stats.tx_bytes += si->tx_buff.data -
253 si->tx_buff.head;
254
255 /* We need to ensure that the transmitter has finished. */
256 while ((STLSR & LSR_TEMT) == 0)
257 cpu_relax();
258 si->last_oscr = OSCR;
259
260 /*
261 * Ok, we've finished transmitting. Now enable
262 * the receiver. Sometimes we get a receive IRQ
263 * immediately after a transmit...
264 */
265 if (si->newspeed) {
266 pxa_irda_set_speed(si, si->newspeed);
267 si->newspeed = 0;
268 } else {
269 /* enable IR Receiver, disable IR Transmitter */
270 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
271 /* enable STUART and receive interrupts */
272 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
273 }
274 /* I'm hungry! */
275 netif_wake_queue(dev);
276 }
277 break;
278 }
279
280 return IRQ_HANDLED;
281}
282
283/* FIR Receive DMA interrupt handler */
284static void pxa_irda_fir_dma_rx_irq(int channel, void *data, struct pt_regs *regs)
285{
286 int dcsr = DCSR(channel);
287
288 DCSR(channel) = dcsr & ~DCSR_RUN;
289
290 printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr);
291}
292
293/* FIR Transmit DMA interrupt handler */
294static void pxa_irda_fir_dma_tx_irq(int channel, void *data, struct pt_regs *regs)
295{
296 struct net_device *dev = data;
297 struct pxa_irda *si = netdev_priv(dev);
298 int dcsr;
299
300 dcsr = DCSR(channel);
301 DCSR(channel) = dcsr & ~DCSR_RUN;
302
303 if (dcsr & DCSR_ENDINTR) {
304 si->stats.tx_packets++;
305 si->stats.tx_bytes += si->dma_tx_buff_len;
306 } else {
307 si->stats.tx_errors++;
308 }
309
310 while (ICSR1 & ICSR1_TBY)
311 cpu_relax();
312 si->last_oscr = OSCR;
313
314 /*
315 * HACK: It looks like the TBY bit is dropped too soon.
316 * Without this delay things break.
317 */
318 udelay(120);
319
320 if (si->newspeed) {
321 pxa_irda_set_speed(si, si->newspeed);
322 si->newspeed = 0;
323 } else {
324 ICCR0 = 0;
325 pxa_irda_fir_dma_rx_start(si);
326 ICCR0 = ICCR0_ITR | ICCR0_RXE;
327 }
328 netif_wake_queue(dev);
329}
330
331/* EIF(Error in FIFO/End in Frame) handler for FIR */
332static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev)
333{
334 unsigned int len, stat, data;
335
336 /* Get the current data position. */
337 len = DTADR(si->rxdma) - si->dma_rx_buff_phy;
338
339 do {
340 /* Read Status, and then Data. */
341 stat = ICSR1;
342 rmb();
343 data = ICDR;
344
345 if (stat & (ICSR1_CRE | ICSR1_ROR)) {
346 si->stats.rx_errors++;
347 if (stat & ICSR1_CRE) {
348 printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n");
349 si->stats.rx_crc_errors++;
350 }
351 if (stat & ICSR1_ROR) {
352 printk(KERN_DEBUG "pxa_ir: fir receive overrun\n");
353 si->stats.rx_frame_errors++;
354 }
355 } else {
356 si->dma_rx_buff[len++] = data;
357 }
358 /* If we hit the end of frame, there's no point in continuing. */
359 if (stat & ICSR1_EOF)
360 break;
361 } while (ICSR0 & ICSR0_EIF);
362
363 if (stat & ICSR1_EOF) {
364 /* end of frame. */
365 struct sk_buff *skb = alloc_skb(len+1,GFP_ATOMIC);
366 if (!skb) {
367 printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n");
368 si->stats.rx_dropped++;
369 return;
370 }
371
372 /* Align IP header to 20 bytes */
373 skb_reserve(skb, 1);
374 memcpy(skb->data, si->dma_rx_buff, len);
375 skb_put(skb, len);
376
377 /* Feed it to IrLAP */
378 skb->dev = dev;
379 skb->mac.raw = skb->data;
380 skb->protocol = htons(ETH_P_IRDA);
381 netif_rx(skb);
382
383 si->stats.rx_packets++;
384 si->stats.rx_bytes += len;
385
386 dev->last_rx = jiffies;
387 }
388}
389
390/* FIR interrupt handler */
391static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id, struct pt_regs *regs)
392{
393 struct net_device *dev = dev_id;
394 struct pxa_irda *si = netdev_priv(dev);
395 int icsr0;
396
397 /* stop RX DMA */
398 DCSR(si->rxdma) &= ~DCSR_RUN;
399 si->last_oscr = OSCR;
400 icsr0 = ICSR0;
401
402 if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) {
403 if (icsr0 & ICSR0_FRE) {
404 printk(KERN_DEBUG "pxa_ir: fir receive frame error\n");
405 si->stats.rx_frame_errors++;
406 } else {
407 printk(KERN_DEBUG "pxa_ir: fir receive abort\n");
408 si->stats.rx_errors++;
409 }
410 ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB);
411 }
412
413 if (icsr0 & ICSR0_EIF) {
414 /* An error in FIFO occured, or there is a end of frame */
415 pxa_irda_fir_irq_eif(si, dev);
416 }
417
418 ICCR0 = 0;
419 pxa_irda_fir_dma_rx_start(si);
420 ICCR0 = ICCR0_ITR | ICCR0_RXE;
421
422 return IRQ_HANDLED;
423}
424
425/* hard_xmit interface of irda device */
426static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
427{
428 struct pxa_irda *si = netdev_priv(dev);
429 int speed = irda_get_next_speed(skb);
430
431 /*
432 * Does this packet contain a request to change the interface
433 * speed? If so, remember it until we complete the transmission
434 * of this frame.
435 */
436 if (speed != si->speed && speed != -1)
437 si->newspeed = speed;
438
439 /*
440 * If this is an empty frame, we can bypass a lot.
441 */
442 if (skb->len == 0) {
443 if (si->newspeed) {
444 si->newspeed = 0;
445 pxa_irda_set_speed(si, speed);
446 }
447 dev_kfree_skb(skb);
448 return 0;
449 }
450
451 netif_stop_queue(dev);
452
453 if (!IS_FIR(si)) {
454 si->tx_buff.data = si->tx_buff.head;
455 si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize);
456
457 /* Disable STUART interrupts and switch to transmit mode. */
458 STIER = 0;
459 STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6;
460
461 /* enable STUART and transmit interrupts */
462 STIER = IER_UUE | IER_TIE;
463 } else {
464 unsigned long mtt = irda_get_mtt(skb);
465
466 si->dma_tx_buff_len = skb->len;
467 memcpy(si->dma_tx_buff, skb->data, skb->len);
468
469 if (mtt)
470 while ((unsigned)(OSCR - si->last_oscr)/4 < mtt)
471 cpu_relax();
472
473 /* stop RX DMA, disable FICP */
474 DCSR(si->rxdma) &= ~DCSR_RUN;
475 ICCR0 = 0;
476
477 pxa_irda_fir_dma_tx_start(si);
478 ICCR0 = ICCR0_ITR | ICCR0_TXE;
479 }
480
481 dev_kfree_skb(skb);
482 dev->trans_start = jiffies;
483 return 0;
484}
485
486static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
487{
488 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
489 struct pxa_irda *si = netdev_priv(dev);
490 int ret;
491
492 switch (cmd) {
493 case SIOCSBANDWIDTH:
494 ret = -EPERM;
495 if (capable(CAP_NET_ADMIN)) {
496 /*
497 * We are unable to set the speed if the
498 * device is not running.
499 */
500 if (netif_running(dev)) {
501 ret = pxa_irda_set_speed(si,
502 rq->ifr_baudrate);
503 } else {
504 printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n");
505 ret = 0;
506 }
507 }
508 break;
509
510 case SIOCSMEDIABUSY:
511 ret = -EPERM;
512 if (capable(CAP_NET_ADMIN)) {
513 irda_device_set_media_busy(dev, TRUE);
514 ret = 0;
515 }
516 break;
517
518 case SIOCGRECEIVING:
519 ret = 0;
520 rq->ifr_receiving = IS_FIR(si) ? 0
521 : si->rx_buff.state != OUTSIDE_FRAME;
522 break;
523
524 default:
525 ret = -EOPNOTSUPP;
526 break;
527 }
528
529 return ret;
530}
531
532static struct net_device_stats *pxa_irda_stats(struct net_device *dev)
533{
534 struct pxa_irda *si = netdev_priv(dev);
535 return &si->stats;
536}
537
538static void pxa_irda_startup(struct pxa_irda *si)
539{
540 /* Disable STUART interrupts */
541 STIER = 0;
542 /* enable STUART interrupt to the processor */
543 STMCR = MCR_OUT2;
544 /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */
545 STLCR = LCR_WLS0 | LCR_WLS1;
546 /* enable FIFO, we use FIFO to improve performance */
547 STFCR = FCR_TRFIFOE | FCR_ITL_32;
548
549 /* disable FICP */
550 ICCR0 = 0;
551 /* configure FICP ICCR2 */
552 ICCR2 = ICCR2_TXP | ICCR2_TRIG_32;
553
554 /* configure DMAC */
555 DRCMR17 = si->rxdma | DRCMR_MAPVLD;
556 DRCMR18 = si->txdma | DRCMR_MAPVLD;
557
558 /* force SIR reinitialization */
559 si->speed = 4000000;
560 pxa_irda_set_speed(si, 9600);
561
562 printk(KERN_DEBUG "pxa_ir: irda startup\n");
563}
564
565static void pxa_irda_shutdown(struct pxa_irda *si)
566{
567 unsigned long flags;
568
569 local_irq_save(flags);
570
571 /* disable STUART and interrupt */
572 STIER = 0;
573 /* disable STUART SIR mode */
574 STISR = 0;
575 /* disable the STUART clock */
576 pxa_set_cken(CKEN5_STUART, 0);
577
578 /* disable DMA */
579 DCSR(si->txdma) &= ~DCSR_RUN;
580 DCSR(si->rxdma) &= ~DCSR_RUN;
581 /* disable FICP */
582 ICCR0 = 0;
583 /* disable the FICP clock */
584 pxa_set_cken(CKEN13_FICP, 0);
585
586 DRCMR17 = 0;
587 DRCMR18 = 0;
588
589 local_irq_restore(flags);
590
591 /* power off board transceiver */
592 si->pdata->transceiver_mode(si->dev, IR_OFF);
593
594 printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
595}
596
597static int pxa_irda_start(struct net_device *dev)
598{
599 struct pxa_irda *si = netdev_priv(dev);
600 int err;
601
602 si->speed = 9600;
603
604 err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev);
605 if (err)
606 goto err_irq1;
607
608 err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev);
609 if (err)
610 goto err_irq2;
611
612 /*
613 * The interrupt must remain disabled for now.
614 */
615 disable_irq(IRQ_STUART);
616 disable_irq(IRQ_ICP);
617
618 err = -EBUSY;
619 si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev);
620 if (si->rxdma < 0)
621 goto err_rx_dma;
622
623 si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev);
624 if (si->txdma < 0)
625 goto err_tx_dma;
626
627 err = -ENOMEM;
628 si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
629 &si->dma_rx_buff_phy, GFP_KERNEL );
630 if (!si->dma_rx_buff)
631 goto err_dma_rx_buff;
632
633 si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
634 &si->dma_tx_buff_phy, GFP_KERNEL );
635 if (!si->dma_tx_buff)
636 goto err_dma_tx_buff;
637
638 /* Setup the serial port for the initial speed. */
639 pxa_irda_startup(si);
640
641 /*
642 * Open a new IrLAP layer instance.
643 */
644 si->irlap = irlap_open(dev, &si->qos, "pxa");
645 err = -ENOMEM;
646 if (!si->irlap)
647 goto err_irlap;
648
649 /*
650 * Now enable the interrupt and start the queue
651 */
652 enable_irq(IRQ_STUART);
653 enable_irq(IRQ_ICP);
654 netif_start_queue(dev);
655
656 printk(KERN_DEBUG "pxa_ir: irda driver opened\n");
657
658 return 0;
659
660err_irlap:
661 pxa_irda_shutdown(si);
662 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
663err_dma_tx_buff:
664 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
665err_dma_rx_buff:
666 pxa_free_dma(si->txdma);
667err_tx_dma:
668 pxa_free_dma(si->rxdma);
669err_rx_dma:
670 free_irq(IRQ_ICP, dev);
671err_irq2:
672 free_irq(IRQ_STUART, dev);
673err_irq1:
674
675 return err;
676}
677
678static int pxa_irda_stop(struct net_device *dev)
679{
680 struct pxa_irda *si = netdev_priv(dev);
681
682 netif_stop_queue(dev);
683
684 pxa_irda_shutdown(si);
685
686 /* Stop IrLAP */
687 if (si->irlap) {
688 irlap_close(si->irlap);
689 si->irlap = NULL;
690 }
691
692 free_irq(IRQ_STUART, dev);
693 free_irq(IRQ_ICP, dev);
694
695 pxa_free_dma(si->rxdma);
696 pxa_free_dma(si->txdma);
697
698 if (si->dma_rx_buff)
699 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
700 if (si->dma_tx_buff)
701 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
702
703 printk(KERN_DEBUG "pxa_ir: irda driver closed\n");
704 return 0;
705}
706
707static int pxa_irda_suspend(struct device *_dev, pm_message_t state, u32 level)
708{
709 struct net_device *dev = dev_get_drvdata(_dev);
710 struct pxa_irda *si;
711
712 if (!dev || level != SUSPEND_DISABLE)
713 return 0;
714
715 if (netif_running(dev)) {
716 si = netdev_priv(dev);
717 netif_device_detach(dev);
718 pxa_irda_shutdown(si);
719 }
720
721 return 0;
722}
723
724static int pxa_irda_resume(struct device *_dev, u32 level)
725{
726 struct net_device *dev = dev_get_drvdata(_dev);
727 struct pxa_irda *si;
728
729 if (!dev || level != RESUME_ENABLE)
730 return 0;
731
732 if (netif_running(dev)) {
733 si = netdev_priv(dev);
734 pxa_irda_startup(si);
735 netif_device_attach(dev);
736 netif_wake_queue(dev);
737 }
738
739 return 0;
740}
741
742
743static int pxa_irda_init_iobuf(iobuff_t *io, int size)
744{
745 io->head = kmalloc(size, GFP_KERNEL | GFP_DMA);
746 if (io->head != NULL) {
747 io->truesize = size;
748 io->in_frame = FALSE;
749 io->state = OUTSIDE_FRAME;
750 io->data = io->head;
751 }
752 return io->head ? 0 : -ENOMEM;
753}
754
755static int pxa_irda_probe(struct device *_dev)
756{
757 struct platform_device *pdev = to_platform_device(_dev);
758 struct net_device *dev;
759 struct pxa_irda *si;
760 unsigned int baudrate_mask;
761 int err;
762
763 if (!pdev->dev.platform_data)
764 return -ENODEV;
765
766 err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY;
767 if (err)
768 goto err_mem_1;
769
770 err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY;
771 if (err)
772 goto err_mem_2;
773
774 dev = alloc_irdadev(sizeof(struct pxa_irda));
775 if (!dev)
776 goto err_mem_3;
777
778 si = netdev_priv(dev);
779 si->dev = &pdev->dev;
780 si->pdata = pdev->dev.platform_data;
781
782 /*
783 * Initialise the SIR buffers
784 */
785 err = pxa_irda_init_iobuf(&si->rx_buff, 14384);
786 if (err)
787 goto err_mem_4;
788 err = pxa_irda_init_iobuf(&si->tx_buff, 4000);
789 if (err)
790 goto err_mem_5;
791
792 dev->hard_start_xmit = pxa_irda_hard_xmit;
793 dev->open = pxa_irda_start;
794 dev->stop = pxa_irda_stop;
795 dev->do_ioctl = pxa_irda_ioctl;
796 dev->get_stats = pxa_irda_stats;
797
798 irda_init_max_qos_capabilies(&si->qos);
799
800 baudrate_mask = 0;
801 if (si->pdata->transceiver_cap & IR_SIRMODE)
802 baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
803 if (si->pdata->transceiver_cap & IR_FIRMODE)
804 baudrate_mask |= IR_4000000 << 8;
805
806 si->qos.baud_rate.bits &= baudrate_mask;
807 si->qos.min_turn_time.bits = 7; /* 1ms or more */
808
809 irda_qos_bits_to_value(&si->qos);
810
811 err = register_netdev(dev);
812
813 if (err == 0)
814 dev_set_drvdata(&pdev->dev, dev);
815
816 if (err) {
817 kfree(si->tx_buff.head);
818err_mem_5:
819 kfree(si->rx_buff.head);
820err_mem_4:
821 free_netdev(dev);
822err_mem_3:
823 release_mem_region(__PREG(FICP), 0x1c);
824err_mem_2:
825 release_mem_region(__PREG(STUART), 0x24);
826 }
827err_mem_1:
828 return err;
829}
830
831static int pxa_irda_remove(struct device *_dev)
832{
833 struct net_device *dev = dev_get_drvdata(_dev);
834
835 if (dev) {
836 struct pxa_irda *si = netdev_priv(dev);
837 unregister_netdev(dev);
838 kfree(si->tx_buff.head);
839 kfree(si->rx_buff.head);
840 free_netdev(dev);
841 }
842
843 release_mem_region(__PREG(STUART), 0x24);
844 release_mem_region(__PREG(FICP), 0x1c);
845
846 return 0;
847}
848
849static struct device_driver pxa_ir_driver = {
850 .name = "pxa2xx-ir",
851 .bus = &platform_bus_type,
852 .probe = pxa_irda_probe,
853 .remove = pxa_irda_remove,
854 .suspend = pxa_irda_suspend,
855 .resume = pxa_irda_resume,
856};
857
858static int __init pxa_irda_init(void)
859{
860 return driver_register(&pxa_ir_driver);
861}
862
863static void __exit pxa_irda_exit(void)
864{
865 driver_unregister(&pxa_ir_driver);
866}
867
868module_init(pxa_irda_init);
869module_exit(pxa_irda_exit);
870
871MODULE_LICENSE("GPL");
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index bb90a1448a53..81ded52c8959 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -122,7 +122,7 @@ void sa1111_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
122 122
123static int pcmcia_probe(struct sa1111_dev *dev) 123static int pcmcia_probe(struct sa1111_dev *dev)
124{ 124{
125 char *base; 125 void __iomem *base;
126 126
127 if (!request_mem_region(dev->res.start, 512, 127 if (!request_mem_region(dev->res.start, 512,
128 SA1111_DRIVER_NAME(dev))) 128 SA1111_DRIVER_NAME(dev)))
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 679e678c7e6a..ddd0307fece2 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -50,6 +50,7 @@
50 50
51#include <asm/io.h> 51#include <asm/io.h>
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/hardware.h>
53#include <asm/hardware/amba.h> 54#include <asm/hardware/amba.h>
54#include <asm/hardware/amba_serial.h> 55#include <asm/hardware/amba_serial.h>
55 56
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index 1ff629c74750..938d185841c9 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -50,6 +50,7 @@
50 50
51#include <asm/io.h> 51#include <asm/io.h>
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/sizes.h>
53#include <asm/hardware/amba.h> 54#include <asm/hardware/amba.h>
54#include <asm/hardware/clock.h> 55#include <asm/hardware/clock.h>
55#include <asm/hardware/amba_serial.h> 56#include <asm/hardware/amba_serial.h>
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c
index 87ef368384fb..6a67e8f585b3 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/serial/clps711x.c
@@ -408,7 +408,11 @@ static struct uart_port clps711x_ports[UART_NR] = {
408 { 408 {
409 .iobase = SYSCON1, 409 .iobase = SYSCON1,
410 .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */ 410 .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
411#ifdef CONFIG_MP1000_90MHZ
412 .uartclk = 4515840,
413#else
411 .uartclk = 3686400, 414 .uartclk = 3686400,
415#endif
412 .fifosize = 16, 416 .fifosize = 16,
413 .ops = &clps711x_pops, 417 .ops = &clps711x_pops,
414 .line = 0, 418 .line = 0,
@@ -417,7 +421,11 @@ static struct uart_port clps711x_ports[UART_NR] = {
417 { 421 {
418 .iobase = SYSCON2, 422 .iobase = SYSCON2,
419 .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */ 423 .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */
424#ifdef CONFIG_MP1000_90MHZ
425 .uartclk = 4515840,
426#else
420 .uartclk = 3686400, 427 .uartclk = 3686400,
428#endif
421 .fifosize = 16, 429 .fifosize = 16,
422 .ops = &clps711x_pops, 430 .ops = &clps711x_pops,
423 .line = 1, 431 .line = 1,
@@ -551,6 +559,7 @@ console_initcall(clps711xuart_console_init);
551static struct uart_driver clps711x_reg = { 559static struct uart_driver clps711x_reg = {
552 .driver_name = "ttyCL", 560 .driver_name = "ttyCL",
553 .dev_name = "ttyCL", 561 .dev_name = "ttyCL",
562 .devfs_name = "ttyCL",
554 .major = SERIAL_CLPS711X_MAJOR, 563 .major = SERIAL_CLPS711X_MAJOR,
555 .minor = SERIAL_CLPS711X_MINOR, 564 .minor = SERIAL_CLPS711X_MINOR,
556 .nr = UART_NR, 565 .nr = UART_NR,
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index 90c2a86c421b..005f027e081a 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -358,6 +358,9 @@ static int serial_pxa_startup(struct uart_port *port)
358 unsigned long flags; 358 unsigned long flags;
359 int retval; 359 int retval;
360 360
361 if (port->line == 3) /* HWUART */
362 up->mcr |= UART_MCR_AFE;
363 else
361 up->mcr = 0; 364 up->mcr = 0;
362 365
363 /* 366 /*
@@ -481,8 +484,10 @@ serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
481 484
482 if ((up->port.uartclk / quot) < (2400 * 16)) 485 if ((up->port.uartclk / quot) < (2400 * 16))
483 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 486 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
484 else 487 else if ((up->port.uartclk / quot) < (230400 * 16))
485 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 488 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
489 else
490 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
486 491
487 /* 492 /*
488 * Ok, we're now changing the port state. Do it with 493 * Ok, we're now changing the port state. Do it with
@@ -772,6 +777,20 @@ static struct uart_pxa_port serial_pxa_ports[] = {
772 .ops = &serial_pxa_pops, 777 .ops = &serial_pxa_pops,
773 .line = 2, 778 .line = 2,
774 }, 779 },
780 }, { /* HWUART */
781 .name = "HWUART",
782 .cken = CKEN4_HWUART,
783 .port = {
784 .type = PORT_PXA,
785 .iotype = UPIO_MEM,
786 .membase = (void *)&HWUART,
787 .mapbase = __PREG(HWUART),
788 .irq = IRQ_HWUART,
789 .uartclk = 921600 * 16,
790 .fifosize = 64,
791 .ops = &serial_pxa_pops,
792 .line = 3,
793 },
775 } 794 }
776}; 795};
777 796
diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa2xx_udc.c
index 6e545393cfff..3d4d89c371e7 100644
--- a/drivers/usb/gadget/pxa2xx_udc.c
+++ b/drivers/usb/gadget/pxa2xx_udc.c
@@ -422,7 +422,7 @@ static inline void ep0_idle (struct pxa2xx_udc *dev)
422} 422}
423 423
424static int 424static int
425write_packet(volatile unsigned long *uddr, struct pxa2xx_request *req, unsigned max) 425write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
426{ 426{
427 u8 *buf; 427 u8 *buf;
428 unsigned length, count; 428 unsigned length, count;
diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa2xx_udc.h
index a58f3e6e71f1..19a883f7d1b8 100644
--- a/drivers/usb/gadget/pxa2xx_udc.h
+++ b/drivers/usb/gadget/pxa2xx_udc.h
@@ -69,11 +69,11 @@ struct pxa2xx_ep {
69 * UDDR = UDC Endpoint Data Register (the fifo) 69 * UDDR = UDC Endpoint Data Register (the fifo)
70 * DRCM = DMA Request Channel Map 70 * DRCM = DMA Request Channel Map
71 */ 71 */
72 volatile unsigned long *reg_udccs; 72 volatile u32 *reg_udccs;
73 volatile unsigned long *reg_ubcr; 73 volatile u32 *reg_ubcr;
74 volatile unsigned long *reg_uddr; 74 volatile u32 *reg_uddr;
75#ifdef USE_DMA 75#ifdef USE_DMA
76 volatile unsigned long *reg_drcmr; 76 volatile u32 *reg_drcmr;
77#define drcmr(n) .reg_drcmr = & DRCMR ## n , 77#define drcmr(n) .reg_drcmr = & DRCMR ## n ,
78#else 78#else
79#define drcmr(n) 79#define drcmr(n)
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index 321dbe91dc14..cde6fd8eb390 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -22,6 +22,7 @@
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23#include <linux/list.h> 23#include <linux/list.h>
24 24
25#include <asm/sizes.h>
25#include <asm/hardware/amba.h> 26#include <asm/hardware/amba.h>
26#include <asm/hardware/clock.h> 27#include <asm/hardware/clock.h>
27 28
diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h
index 0e9b7e18af05..002227924b9f 100644
--- a/include/asm-arm/arch-aaec2000/aaec2000.h
+++ b/include/asm-arm/arch-aaec2000/aaec2000.h
@@ -17,6 +17,16 @@
17#error You must include hardware.h not this file 17#error You must include hardware.h not this file
18#endif /* __ASM_ARCH_HARDWARE_H */ 18#endif /* __ASM_ARCH_HARDWARE_H */
19 19
20/* Chip selects */
21#define AAEC_CS0 0x00000000
22#define AAEC_CS1 0x10000000
23#define AAEC_CS2 0x20000000
24#define AAEC_CS3 0x30000000
25
26/* Flash */
27#define AAEC_FLASH_BASE AAEC_CS0
28#define AAEC_FLASH_SIZE SZ_64M
29
20/* Interrupt controller */ 30/* Interrupt controller */
21#define IRQ_BASE __REG(0x80000500) 31#define IRQ_BASE __REG(0x80000500)
22#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */ 32#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
@@ -148,4 +158,50 @@
148#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */ 158#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
149#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */ 159#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
150 160
161/* GPIO Registers */
162#define AAEC_GPIO_PHYS 0x80000e00
163
164#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00)
165#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04)
166#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08)
167#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c)
168#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10)
169#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14)
170#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18)
171#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c)
172#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20)
173#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24)
174#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28)
175#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c)
176#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30)
177#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34)
178#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38)
179#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c)
180#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40)
181#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44)
182#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48)
183#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c)
184#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50)
185#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54)
186#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58)
187#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c)
188#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60)
189#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64)
190#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68)
191#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c)
192#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70)
193#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74)
194#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78)
195#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c)
196#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80)
197#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84)
198
199#define AAEC_GPIO_PINMUX_PE0CON (1 << 0)
200#define AAEC_GPIO_PINMUX_PD0CON (1 << 1)
201#define AAEC_GPIO_PINMUX_CODECON (1 << 2)
202#define AAEC_GPIO_PINMUX_UART3CON (1 << 3)
203
204/* LCD Controller */
205#define AAEC_CLCD_PHYS 0x80003000
206
151#endif /* __ARM_ARCH_AAEC2000_H */ 207#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/include/asm-arm/arch-aaec2000/aaed2000.h b/include/asm-arm/arch-aaec2000/aaed2000.h
new file mode 100644
index 000000000000..bc76d2badb91
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/aaed2000.h
@@ -0,0 +1,40 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/aaed2000.h
3 *
4 * AAED-2000 specific bits definition
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_AAED2000_H
14#define __ASM_ARCH_AAED2000_H
15
16/* External GPIOs. */
17
18#define EXT_GPIO_PBASE AAEC_CS3
19#define EXT_GPIO_VBASE 0xf8100000
20#define EXT_GPIO_LENGTH 0x00001000
21
22#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE)
23#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE)
24
25#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x)))
26#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x)))
27
28#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE)
29
30#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */
31#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */
32#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */
33#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */
34#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */
35#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */
36#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */
37#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */
38
39
40#endif /* __ARM_ARCH_AAED2000_H */
diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h
index 4c37219e030e..153506fd06ed 100644
--- a/include/asm-arm/arch-aaec2000/hardware.h
+++ b/include/asm-arm/arch-aaec2000/hardware.h
@@ -11,7 +11,8 @@
11#ifndef __ASM_ARCH_HARDWARE_H 11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H 12#define __ASM_ARCH_HARDWARE_H
13 13
14#include <linux/config.h> 14#include <asm/sizes.h>
15#include <asm/arch/aaec2000.h>
15 16
16/* The kernel is loaded at physical address 0xf8000000. 17/* The kernel is loaded at physical address 0xf8000000.
17 * We map the IO space a bit after 18 * We map the IO space a bit after
diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h
index c58a8d10425a..8d67907fd4f0 100644
--- a/include/asm-arm/arch-aaec2000/io.h
+++ b/include/asm-arm/arch-aaec2000/io.h
@@ -6,6 +6,8 @@
6#ifndef __ASM_ARM_ARCH_IO_H 6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H 7#define __ASM_ARM_ARCH_IO_H
8 8
9#include <asm/hardware.h>
10
9#define IO_SPACE_LIMIT 0xffffffff 11#define IO_SPACE_LIMIT 0xffffffff
10 12
11/* 13/*
diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h
index f0113bc75630..89a33287f4fe 100644
--- a/include/asm-arm/arch-cl7500/io.h
+++ b/include/asm-arm/arch-cl7500/io.h
@@ -10,6 +10,8 @@
10#ifndef __ASM_ARM_ARCH_IO_H 10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H 11#define __ASM_ARM_ARCH_IO_H
12 12
13#include <asm/hardware.h>
14
13#define IO_SPACE_LIMIT 0xffffffff 15#define IO_SPACE_LIMIT 0xffffffff
14 16
15/* 17/*
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
index 1386871e1a5a..f864c367c934 100644
--- a/include/asm-arm/arch-clps711x/hardware.h
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -235,4 +235,121 @@
235#define CEIVA_PB0_BLK_BTN (1<<0) 235#define CEIVA_PB0_BLK_BTN (1<<0)
236#endif // #if defined (CONFIG_ARCH_CEIVA) 236#endif // #if defined (CONFIG_ARCH_CEIVA)
237 237
238#if defined (CONFIG_MACH_MP1000)
239/* NOR FLASH */
240#define MP1000_NIO_BASE 0xf9000000 /* virtual */
241#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
242#define MP1000_NIO_SIZE 0x00400000
243
244/* DSP Interface */
245#define MP1000_DSP_BASE 0xfa000000 /* virtual */
246#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
247#define MP1000_DSP_SIZE 0x00100000
248
249/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
250#define MP1000_LIO_BASE 0xfb000000 /* virtual */
251#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
252#define MP1000_LIO_SIZE 0x00100000
253
254/* NAND FLASH */
255#define MP1000_FIO_BASE 0xfc000000 /* virtual */
256#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
257#define MP1000_FIO_SIZE 0x00800000
258
259/* Ethernet */
260#define MP1000_EIO_BASE 0xfd000000 /* virtual */
261#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
262#define MP1000_EIO_SIZE 0x00100000
263
264#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
265#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
266#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
267#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
268
269/* IDE */
270#define MP1000_IDE_BASE 0xfe000000 /* virtual */
271#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
272#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
273
274#define IRQ_HARDDISK IRQ_EINT2
275
276/*
277 * IDE registers definition
278 */
279
280#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
281#define IDE_BASE_OFF (MP1000_IDE_BASE)
282
283#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
284#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
285#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
286#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
287#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
288#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
289#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
290#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
291#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
292
293#define IDE_IRQ IRQ_EINT2
294
295
296#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
297#define RTC_ALWAYS_BCD 0
298
299/*
300// Definitions of the bit fields in the HwPortA register for the
301// MP1000 board.
302*/
303#define HwPortAKeyboardRow1 0x00000001
304#define HwPortAKeyboardRow2 0x00000002
305#define HwPortAKeyboardRow3 0x00000004
306#define HwPortAKeyboardRow4 0x00000008
307#define HwPortAKeyboardRow5 0x00000010
308#define HwPortAKeyboardRow6 0x00000020
309#define HwPortALCDEnable 0x00000040
310#define HwPortAOffhook 0x00000080
311
312/*
313// Definitions of the bit fields in the HwPortB register for the
314// MP1000 board.
315*/
316#define HwPortBL3Mode 0x00000001
317#define HwPortBL3Clk 0x00000002
318#define HwPortBSClk 0x00000001
319#define HwPortBSData 0x00000002
320#define HwPortBL3Data 0x00000004
321#define HwPortBMute 0x00000008
322#define HwPortBQD0 0x00000010
323#define HwPortBQD1 0x00000020
324#define HwPortBQD2 0x00000040
325#define HwPortBQD3 0x00000080
326
327/*
328// Definitions of the bit fields in the HwPortD register for the
329// MP1000 board.
330*/
331#define HwPortDLED1 0x00000001
332#define HwPortDLED2 0x00000002
333#define HwPortDLED3 0x00000004
334#define HwPortDLED4 0x00000008
335#define HwPortDLED5 0x00000010
336#define HwPortDEECS 0x00000020
337#define HwPortBRTS 0x00000040
338#define HwPortBRI 0x00000080
339
340
341/*
342// Definitions of the bit fields in the HwPortE register for the
343// MP1000 board.
344*/
345
346#define HwPortECLE 0x00000001
347#define HwPortESepromDOut 0x00000001
348#define HwPortEALE 0x00000002
349#define HwPortESepromDIn 0x00000002
350#define HwPortENANDCS 0x00000004
351#define HwPortESepromCLK 0x00000004
352
353#endif // #if defined (CONFIG_MACH_MP1000)
354
238#endif 355#endif
diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h
index 14d7e8da5453..62613b0e2d96 100644
--- a/include/asm-arm/arch-clps711x/io.h
+++ b/include/asm-arm/arch-clps711x/io.h
@@ -20,6 +20,8 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#include <asm/hardware.h>
24
23#define IO_SPACE_LIMIT 0xffffffff 25#define IO_SPACE_LIMIT 0xffffffff
24 26
25#define __io(a) ((void __iomem *)(a)) 27#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h
new file mode 100644
index 000000000000..3e5566cf9666
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/mp1000-seprom.h
@@ -0,0 +1,77 @@
1#ifndef MP1000_SEPROM_H
2#define MP1000_SEPROM_H
3
4/*
5 * mp1000-seprom.h
6 *
7 *
8 * This file contains the Serial EEPROM definitions for the MP1000 board
9 *
10 * Copyright (C) 2005 Comdial Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#define COMMAND_ERASE (0x1C0)
29#define COMMAND_ERASE_ALL (0x120)
30#define COMMAND_WRITE_DISABLE (0x100)
31#define COMMAND_WRITE_ENABLE (0x130)
32#define COMMAND_READ (0x180)
33#define COMMAND_WRITE (0x140)
34#define COMMAND_WRITE_ALL (0x110)
35
36//
37// Serial EEPROM data format
38//
39
40#define PACKED __attribute__ ((packed))
41
42typedef struct _EEPROM {
43 union {
44 unsigned char eprom_byte_data[128];
45 unsigned short eprom_short_data[64];
46 struct {
47 unsigned char version PACKED; // EEPROM Version "1" for now
48 unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
49 unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
50 unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
51 unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
52 unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
53 unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
54 unsigned char country PACKED; // Country of deployment
55 unsigned char mac_Address[6] PACKED; // MAC Address
56 unsigned char oem_string[20] PACKED; // OEM ID string
57 unsigned short feature_bits1 PACKED; // Feature Bits 1
58 unsigned short feature_bits2 PACKED; // Feature Bits 2
59 unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
60 unsigned short checksum PACKED; // byte accumulated short checksum
61 } eprom_struct;
62 } variant;
63} eeprom_struct;
64
65/* These settings must be mutually exclusive */
66#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
67#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
68#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
69
70#define FEATURE_BITS1_CPUIS90MEG 0x0010
71
72extern void seprom_init(void);
73extern eeprom_struct* get_seprom_ptr(void);
74extern unsigned char* get_eeprom_mac_address(void);
75
76#endif /* MP1000_SEPROM_H */
77
diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h
index 70576b17f922..776f9d377057 100644
--- a/include/asm-arm/arch-ebsa285/io.h
+++ b/include/asm-arm/arch-ebsa285/io.h
@@ -14,6 +14,8 @@
14#ifndef __ASM_ARM_ARCH_IO_H 14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H 15#define __ASM_ARM_ARCH_IO_H
16 16
17#include <asm/hardware.h>
18
17#define IO_SPACE_LIMIT 0xffff 19#define IO_SPACE_LIMIT 0xffff
18 20
19/* 21/*
diff --git a/include/asm-arm/arch-epxa10db/io.h b/include/asm-arm/arch-epxa10db/io.h
index 1f0afa257621..9fe100c9d6be 100644
--- a/include/asm-arm/arch-epxa10db/io.h
+++ b/include/asm-arm/arch-epxa10db/io.h
@@ -20,6 +20,8 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#include <asm/hardware.h>
24
23#define IO_SPACE_LIMIT 0xffff 25#define IO_SPACE_LIMIT 0xffff
24 26
25 27
diff --git a/include/asm-arm/arch-h720x/io.h b/include/asm-arm/arch-h720x/io.h
index 68814828c9a7..d3ccfd8172b7 100644
--- a/include/asm-arm/arch-h720x/io.h
+++ b/include/asm-arm/arch-h720x/io.h
@@ -14,7 +14,7 @@
14#ifndef __ASM_ARM_ARCH_IO_H 14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H 15#define __ASM_ARM_ARCH_IO_H
16 16
17#include <asm/arch/hardware.h> 17#include <asm/hardware.h>
18 18
19#define IO_SPACE_LIMIT 0xffffffff 19#define IO_SPACE_LIMIT 0xffffffff
20 20
diff --git a/include/asm-arm/arch-imx/io.h b/include/asm-arm/arch-imx/io.h
index 28a4cca6a4cb..b191cdd05576 100644
--- a/include/asm-arm/arch-imx/io.h
+++ b/include/asm-arm/arch-imx/io.h
@@ -20,6 +20,8 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#include <asm/hardware.h>
24
23#define IO_SPACE_LIMIT 0xffffffff 25#define IO_SPACE_LIMIT 0xffffffff
24 26
25#define __io(a) ((void __iomem *)(a)) 27#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h
index be2716eeaa02..6f0947bc500d 100644
--- a/include/asm-arm/arch-integrator/hardware.h
+++ b/include/asm-arm/arch-integrator/hardware.h
@@ -33,15 +33,6 @@
33#define IO_SIZE 0x0B000000 // How much? 33#define IO_SIZE 0x0B000000 // How much?
34#define IO_START INTEGRATOR_HDR_BASE // PA of IO 34#define IO_START INTEGRATOR_HDR_BASE // PA of IO
35 35
36/*
37 * Similar to above, but for PCI addresses (memory, IO, Config and the
38 * V3 chip itself). WARNING: this has to mirror definitions in platform.h
39 */
40#define PCI_MEMORY_VADDR 0xe8000000
41#define PCI_CONFIG_VADDR 0xec000000
42#define PCI_V3_VADDR 0xed000000
43#define PCI_IO_VADDR 0xee000000
44
45#define PCIO_BASE PCI_IO_VADDR 36#define PCIO_BASE PCI_IO_VADDR
46#define PCIMEM_BASE PCI_MEMORY_VADDR 37#define PCIMEM_BASE PCI_MEMORY_VADDR
47 38
diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h
index fbea8be67d26..31f2deab51b0 100644
--- a/include/asm-arm/arch-integrator/io.h
+++ b/include/asm-arm/arch-integrator/io.h
@@ -22,6 +22,14 @@
22 22
23#define IO_SPACE_LIMIT 0xffff 23#define IO_SPACE_LIMIT 0xffff
24 24
25/*
26 * WARNING: this has to mirror definitions in platform.h
27 */
28#define PCI_MEMORY_VADDR 0xe8000000
29#define PCI_CONFIG_VADDR 0xec000000
30#define PCI_V3_VADDR 0xed000000
31#define PCI_IO_VADDR 0xee000000
32
25#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) 33#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
26#define __mem_pci(a) (a) 34#define __mem_pci(a) (a)
27#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR) 35#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
diff --git a/include/asm-arm/arch-iop3xx/io.h b/include/asm-arm/arch-iop3xx/io.h
index 2761dfd8694d..f39046a6ab14 100644
--- a/include/asm-arm/arch-iop3xx/io.h
+++ b/include/asm-arm/arch-iop3xx/io.h
@@ -11,6 +11,8 @@
11#ifndef __ASM_ARM_ARCH_IO_H 11#ifndef __ASM_ARM_ARCH_IO_H
12#define __ASM_ARM_ARCH_IO_H 12#define __ASM_ARM_ARCH_IO_H
13 13
14#include <asm/hardware.h>
15
14#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
15 17
16#define __io(p) ((void __iomem *)(p)) 18#define __io(p) ((void __iomem *)(p))
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index 3241cd6f0778..7fbcdf9931ee 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -15,6 +15,8 @@
15#ifndef __ASM_ARM_ARCH_IO_H 15#ifndef __ASM_ARM_ARCH_IO_H
16#define __ASM_ARM_ARCH_IO_H 16#define __ASM_ARM_ARCH_IO_H
17 17
18#include <asm/hardware.h>
19
18#define IO_SPACE_LIMIT 0xffffffff 20#define IO_SPACE_LIMIT 0xffffffff
19#define __mem_pci(a) (a) 21#define __mem_pci(a) (a)
20 22
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 32aece069869..def089d693d2 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -392,4 +392,47 @@
392#define WDT_RESET_ENABLE 0x01000000 392#define WDT_RESET_ENABLE 0x01000000
393 393
394 394
395/*
396 * MSF registers. The IXP2400 and IXP2800 have somewhat different MSF
397 * units, but the registers that differ between the two don't overlap,
398 * so we can have one register list for both.
399 */
400#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x)))
401#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000)
402#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004)
403#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008)
404#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c)
405#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010)
406#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014)
407#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018)
408#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024)
409#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028)
410#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c)
411#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040)
412#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044)
413#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048)
414#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048)
415#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050)
416#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054)
417#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058)
418#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060)
419#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064)
420#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068)
421#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070)
422#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070)
423#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080)
424#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084)
425#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088)
426#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c)
427#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090)
428#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094)
429#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098)
430#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c)
431#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0)
432#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4)
433#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8)
434#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000)
435#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400)
436
437
395#endif /* _IXP2000_H_ */ 438#endif /* _IXP2000_H_ */
diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h
index fc012a39e2cb..cab8ad0adf09 100644
--- a/include/asm-arm/arch-l7200/io.h
+++ b/include/asm-arm/arch-l7200/io.h
@@ -10,7 +10,7 @@
10#ifndef __ASM_ARM_ARCH_IO_H 10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H 11#define __ASM_ARM_ARCH_IO_H
12 12
13#include <asm/arch/hardware.h> 13#include <asm/hardware.h>
14 14
15#define IO_SPACE_LIMIT 0xffffffff 15#define IO_SPACE_LIMIT 0xffffffff
16 16
diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h
index c13bdd9add92..bbcd4335f441 100644
--- a/include/asm-arm/arch-lh7a40x/io.h
+++ b/include/asm-arm/arch-lh7a40x/io.h
@@ -11,6 +11,8 @@
11#ifndef __ASM_ARCH_IO_H 11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H 12#define __ASM_ARCH_IO_H
13 13
14#include <asm/hardware.h>
15
14#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
15 17
16/* No ISA or PCI bus on this machine. */ 18/* No ISA or PCI bus on this machine. */
diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h
index 11fbf629bf75..3d5bcd545082 100644
--- a/include/asm-arm/arch-omap/io.h
+++ b/include/asm-arm/arch-omap/io.h
@@ -34,6 +34,8 @@
34#ifndef __ASM_ARM_ARCH_IO_H 34#ifndef __ASM_ARM_ARCH_IO_H
35#define __ASM_ARM_ARCH_IO_H 35#define __ASM_ARM_ARCH_IO_H
36 36
37#include <asm/hardware.h>
38
37#define IO_SPACE_LIMIT 0xffffffff 39#define IO_SPACE_LIMIT 0xffffffff
38 40
39/* 41/*
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index cf35721cfa45..3e70bd95472c 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -44,12 +44,12 @@
44 44
45#ifndef __ASSEMBLY__ 45#ifndef __ASSEMBLY__
46 46
47# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 47# define __REG(x) (*((volatile u32 *)io_p2v(x)))
48 48
49/* With indexed regs we don't want to feed the index through io_p2v() 49/* With indexed regs we don't want to feed the index through io_p2v()
50 especially if it is a variable, otherwise horrible code will result. */ 50 especially if it is a variable, otherwise horrible code will result. */
51# define __REG2(x,y) \ 51# define __REG2(x,y) \
52 (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y))) 52 (*(volatile u32 *)((u32)&__REG(x) + (y)))
53 53
54# define __PREG(x) (io_v2p((u32)&(x))) 54# define __PREG(x) (io_v2p((u32)&(x)))
55 55
diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h
index c3bdbe44e21f..eb2dd58d397f 100644
--- a/include/asm-arm/arch-pxa/io.h
+++ b/include/asm-arm/arch-pxa/io.h
@@ -6,6 +6,8 @@
6#ifndef __ASM_ARM_ARCH_IO_H 6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H 7#define __ASM_ARM_ARCH_IO_H
8 8
9#include <asm/hardware.h>
10
9#define IO_SPACE_LIMIT 0xffffffff 11#define IO_SPACE_LIMIT 0xffffffff
10 12
11/* 13/*
diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h
new file mode 100644
index 000000000000..748406f384c2
--- /dev/null
+++ b/include/asm-arm/arch-pxa/irda.h
@@ -0,0 +1,17 @@
1#ifndef ASMARM_ARCH_IRDA_H
2#define ASMARM_ARCH_IRDA_H
3
4/* board specific transceiver capabilities */
5
6#define IR_OFF 1
7#define IR_SIRMODE 2
8#define IR_FIRMODE 4
9
10struct pxaficp_platform_data {
11 int transceiver_cap;
12 void (*transceiver_mode)(struct device *dev, int mode);
13};
14
15extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
16
17#endif
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 3af7165ab0d7..a75a2470f4f5 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -326,6 +326,25 @@
326#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ 326#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
327#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ 327#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
328 328
329/* Hardware UART (HWUART) */
330#define HWUART HWRBR
331#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */
332#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */
333#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */
334#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */
335#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */
336#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
337#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */
338#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
339#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */
340#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */
341#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */
342#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */
343#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */
344#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */
345#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
346#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
347
329#define IER_DMAE (1 << 7) /* DMA Requests Enable */ 348#define IER_DMAE (1 << 7) /* DMA Requests Enable */
330#define IER_UUE (1 << 6) /* UART Unit Enable */ 349#define IER_UUE (1 << 6) /* UART Unit Enable */
331#define IER_NRZE (1 << 5) /* NRZ coding Enable */ 350#define IER_NRZE (1 << 5) /* NRZ coding Enable */
@@ -1013,14 +1032,12 @@
1013#define ICCR0_LBM (1 << 1) /* Loopback mode */ 1032#define ICCR0_LBM (1 << 1) /* Loopback mode */
1014#define ICCR0_ITR (1 << 0) /* IrDA transmission */ 1033#define ICCR0_ITR (1 << 0) /* IrDA transmission */
1015 1034
1016#ifdef CONFIG_PXA27x
1017#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ 1035#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
1018#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ 1036#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
1019#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ 1037#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
1020#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ 1038#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
1021#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ 1039#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
1022#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ 1040#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
1023#endif
1024 1041
1025#ifdef CONFIG_PXA27x 1042#ifdef CONFIG_PXA27x
1026#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ 1043#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
@@ -1250,9 +1267,13 @@
1250#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ 1267#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
1251#define GPIO41_FFRTS 41 /* FFUART request to send */ 1268#define GPIO41_FFRTS 41 /* FFUART request to send */
1252#define GPIO42_BTRXD 42 /* BTUART receive data */ 1269#define GPIO42_BTRXD 42 /* BTUART receive data */
1270#define GPIO42_HWRXD 42 /* HWUART receive data */
1253#define GPIO43_BTTXD 43 /* BTUART transmit data */ 1271#define GPIO43_BTTXD 43 /* BTUART transmit data */
1272#define GPIO43_HWTXD 43 /* HWUART transmit data */
1254#define GPIO44_BTCTS 44 /* BTUART clear to send */ 1273#define GPIO44_BTCTS 44 /* BTUART clear to send */
1274#define GPIO44_HWCTS 44 /* HWUART clear to send */
1255#define GPIO45_BTRTS 45 /* BTUART request to send */ 1275#define GPIO45_BTRTS 45 /* BTUART request to send */
1276#define GPIO45_HWRTS 45 /* HWUART request to send */
1256#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */ 1277#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
1257#define GPIO46_ICPRXD 46 /* ICP receive data */ 1278#define GPIO46_ICPRXD 46 /* ICP receive data */
1258#define GPIO46_STRXD 46 /* STD_UART receive data */ 1279#define GPIO46_STRXD 46 /* STD_UART receive data */
@@ -1378,17 +1399,26 @@
1378#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) 1399#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
1379#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) 1400#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
1380#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) 1401#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
1402#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
1381#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) 1403#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
1404#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
1382#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) 1405#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
1406#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
1383#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) 1407#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
1408#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
1384#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT) 1409#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
1385#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) 1410#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
1386#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) 1411#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
1387#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) 1412#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
1388#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) 1413#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
1389#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) 1414#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
1415#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
1416#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
1417#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
1390#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) 1418#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
1391#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) 1419#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
1420#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
1421#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
1392#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) 1422#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
1393#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) 1423#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
1394#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) 1424#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
@@ -1763,6 +1793,7 @@
1763#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ 1793#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */
1764#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ 1794#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */
1765#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ 1795#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */
1796#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */
1766#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ 1797#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */
1767#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ 1798#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */
1768#define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */ 1799#define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */
@@ -2282,4 +2313,11 @@
2282 2313
2283#endif 2314#endif
2284 2315
2316/* PWRMODE register M field values */
2317
2318#define PWRMODE_IDLE 0x1
2319#define PWRMODE_STANDBY 0x2
2320#define PWRMODE_SLEEP 0x3
2321#define PWRMODE_DEEPSLEEP 0x7
2322
2285#endif 2323#endif
diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h
index 4428d3eb7432..fe38090444e0 100644
--- a/include/asm-arm/arch-pxa/uncompress.h
+++ b/include/asm-arm/arch-pxa/uncompress.h
@@ -12,6 +12,7 @@
12#define FFUART ((volatile unsigned long *)0x40100000) 12#define FFUART ((volatile unsigned long *)0x40100000)
13#define BTUART ((volatile unsigned long *)0x40200000) 13#define BTUART ((volatile unsigned long *)0x40200000)
14#define STUART ((volatile unsigned long *)0x40700000) 14#define STUART ((volatile unsigned long *)0x40700000)
15#define HWUART ((volatile unsigned long *)0x41600000)
15 16
16#define UART FFUART 17#define UART FFUART
17 18
diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h
index 24453c405a87..b4da08d7a336 100644
--- a/include/asm-arm/arch-rpc/io.h
+++ b/include/asm-arm/arch-rpc/io.h
@@ -13,6 +13,8 @@
13#ifndef __ASM_ARM_ARCH_IO_H 13#ifndef __ASM_ARM_ARCH_IO_H
14#define __ASM_ARM_ARCH_IO_H 14#define __ASM_ARM_ARCH_IO_H
15 15
16#include <asm/hardware.h>
17
16#define IO_SPACE_LIMIT 0xffffffff 18#define IO_SPACE_LIMIT 0xffffffff
17 19
18/* 20/*
diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h
index ac57bc887d82..4790491ba9d0 100644
--- a/include/asm-arm/arch-s3c2410/fb.h
+++ b/include/asm-arm/arch-s3c2410/fb.h
@@ -13,6 +13,7 @@
13 * 07-Sep-2004 RTP Created file 13 * 07-Sep-2004 RTP Created file
14 * 03-Nov-2004 BJD Updated and minor cleanups 14 * 03-Nov-2004 BJD Updated and minor cleanups
15 * 03-Aug-2005 RTP Renamed to fb.h 15 * 03-Aug-2005 RTP Renamed to fb.h
16 * 26-Oct-2005 BJD Changed name of platdata init
16*/ 17*/
17 18
18#ifndef __ASM_ARM_FB_H 19#ifndef __ASM_ARM_FB_H
@@ -64,6 +65,6 @@ struct s3c2410fb_mach_info {
64 unsigned long lpcsel; 65 unsigned long lpcsel;
65}; 66};
66 67
67void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info); 68extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
68 69
69#endif /* __ASM_ARM_FB_H */ 70#endif /* __ASM_ARM_FB_H */
diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h
index 4bf272ed9add..16fbc8afffd9 100644
--- a/include/asm-arm/arch-s3c2410/io.h
+++ b/include/asm-arm/arch-s3c2410/io.h
@@ -15,6 +15,8 @@
15#ifndef __ASM_ARM_ARCH_IO_H 15#ifndef __ASM_ARM_ARCH_IO_H
16#define __ASM_ARM_ARCH_IO_H 16#define __ASM_ARM_ARCH_IO_H
17 17
18#include <asm/hardware.h>
19
18#define IO_SPACE_LIMIT 0xffffffff 20#define IO_SPACE_LIMIT 0xffffffff
19 21
20/* 22/*
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index 2053cbacffc3..cb33d57c146c 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -20,6 +20,7 @@
20 * 18-11-2004 BJD Added S3C2440 AC97 controls 20 * 18-11-2004 BJD Added S3C2440 AC97 controls
21 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 21 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
22 * 28-Mar-2005 LCVR Fixed definition of GPB10 22 * 28-Mar-2005 LCVR Fixed definition of GPB10
23 * 26-Oct-2005 BJD Added generic configuration types
23*/ 24*/
24 25
25 26
@@ -43,6 +44,11 @@
43/* general configuration options */ 44/* general configuration options */
44 45
45#define S3C2410_GPIO_LEAVE (0xFFFFFFFF) 46#define S3C2410_GPIO_LEAVE (0xFFFFFFFF)
47#define S3C2410_GPIO_INPUT (0xFFFFFFF0)
48#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1)
49#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */
50#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */
51#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */
46 52
47/* configure GPIO ports A..G */ 53/* configure GPIO ports A..G */
48 54
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 19c3b1e186bb..28711aaa4968 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -22,13 +22,6 @@
22 22
23 23
24/* 24/*
25 * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for
26 * in*()/out*() macros to be usable for all cases.
27 */
28#define PCIO_BASE 0
29
30
31/*
32 * SA1100 internal I/O mappings 25 * SA1100 internal I/O mappings
33 * 26 *
34 * We have the following mapping: 27 * We have the following mapping:
diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h
index 7d969ffbd3bb..9d4fe6cf205b 100644
--- a/include/asm-arm/arch-sa1100/io.h
+++ b/include/asm-arm/arch-sa1100/io.h
@@ -10,13 +10,19 @@
10#ifndef __ASM_ARM_ARCH_IO_H 10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H 11#define __ASM_ARM_ARCH_IO_H
12 12
13#include <asm/hardware.h>
14
13#define IO_SPACE_LIMIT 0xffffffff 15#define IO_SPACE_LIMIT 0xffffffff
14 16
15/* 17/*
16 * We don't actually have real ISA nor PCI buses, but there is so many 18 * We don't actually have real ISA nor PCI buses, but there is so many
17 * drivers out there that might just work if we fake them... 19 * drivers out there that might just work if we fake them...
18 */ 20 */
19#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) 21static inline void __iomem *__io(unsigned long addr)
22{
23 return (void __iomem *)addr;
24}
25#define __io(a) __io(a)
20#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
21#define __mem_isa(a) (a) 27#define __mem_isa(a) (a)
22 28
diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h
index 6f52118ba1a4..0f0612f79b2b 100644
--- a/include/asm-arm/arch-sa1100/system.h
+++ b/include/asm-arm/arch-sa1100/system.h
@@ -4,6 +4,7 @@
4 * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> 4 * Copyright (c) 1999 Nicolas Pitre <nico@cam.org>
5 */ 5 */
6#include <linux/config.h> 6#include <linux/config.h>
7#include <asm/hardware.h>
7 8
8static inline void arch_idle(void) 9static inline void arch_idle(void)
9{ 10{
diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h
index 5e6ed0038b2b..87ffa27f2962 100644
--- a/include/asm-arm/arch-shark/io.h
+++ b/include/asm-arm/arch-shark/io.h
@@ -11,6 +11,8 @@
11#ifndef __ASM_ARM_ARCH_IO_H 11#ifndef __ASM_ARM_ARCH_IO_H
12#define __ASM_ARM_ARCH_IO_H 12#define __ASM_ARM_ARCH_IO_H
13 13
14#include <asm/hardware.h>
15
14#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
15 17
16/* 18/*
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 5c4ae8f5dbb0..2e6799632f12 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -26,7 +26,6 @@
26#include <linux/types.h> 26#include <linux/types.h>
27#include <asm/byteorder.h> 27#include <asm/byteorder.h>
28#include <asm/memory.h> 28#include <asm/memory.h>
29#include <asm/arch/hardware.h>
30 29
31/* 30/*
32 * ISA I/O bus memory addresses are 1:1 with the physical address. 31 * ISA I/O bus memory addresses are 1:1 with the physical address.
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index 4fa95084a8c0..7273c6fd95b5 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -48,10 +48,10 @@ struct machine_desc {
48 * Set of macros to define architecture features. This is built into 48 * Set of macros to define architecture features. This is built into
49 * a table by the linker. 49 * a table by the linker.
50 */ 50 */
51#define MACHINE_START(_type,_name) \ 51#define MACHINE_START(_type,_name) \
52const struct machine_desc __mach_desc_##_type \ 52static const struct machine_desc __mach_desc_##_type \
53 __attribute__((__section__(".arch.info.init"))) = { \ 53 __attribute__((__section__(".arch.info.init"))) = { \
54 .nr = MACH_TYPE_##_type, \ 54 .nr = MACH_TYPE_##_type, \
55 .name = _name, 55 .name = _name,
56 56
57#define MACHINE_END \ 57#define MACHINE_END \
diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h
index 9ac47cf8d2e4..0619522bd926 100644
--- a/include/asm-arm/mach/map.h
+++ b/include/asm-arm/mach/map.h
@@ -11,7 +11,7 @@
11 */ 11 */
12struct map_desc { 12struct map_desc {
13 unsigned long virtual; 13 unsigned long virtual;
14 unsigned long physical; 14 unsigned long pfn;
15 unsigned long length; 15 unsigned long length;
16 unsigned int type; 16 unsigned int type;
17}; 17};
@@ -27,6 +27,9 @@ struct meminfo;
27#define MT_ROM 6 27#define MT_ROM 6
28#define MT_IXP2000_DEVICE 7 28#define MT_IXP2000_DEVICE 7
29 29
30#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT)
31#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT)
32
30extern void create_memmap_holes(struct meminfo *); 33extern void create_memmap_holes(struct meminfo *);
31extern void memtable_init(struct meminfo *); 34extern void memtable_init(struct meminfo *);
32extern void iotable_init(struct map_desc *, int); 35extern void iotable_init(struct map_desc *, int);
diff --git a/sound/arm/aaci.c b/sound/arm/aaci.c
index b2d5db20ec8c..559ead6367da 100644
--- a/sound/arm/aaci.c
+++ b/sound/arm/aaci.c
@@ -20,6 +20,7 @@
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/sizes.h>
23#include <asm/hardware/amba.h> 24#include <asm/hardware/amba.h>
24 25
25#include <sound/driver.h> 26#include <sound/driver.h>