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-rw-r--r--arch/x86/kernel/tsc_32.c5
-rw-r--r--arch/x86/kernel/tsc_64.c5
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
index 00bb4c1c0593..2a7b95bd8509 100644
--- a/arch/x86/kernel/tsc_32.c
+++ b/arch/x86/kernel/tsc_32.c
@@ -354,6 +354,11 @@ __cpuinit int unsynchronized_tsc(void)
354{ 354{
355 if (!cpu_has_tsc || tsc_unstable) 355 if (!cpu_has_tsc || tsc_unstable)
356 return 1; 356 return 1;
357
358 /* Anything with constant TSC should be synchronized */
359 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
360 return 0;
361
357 /* 362 /*
358 * Intel systems are normally all synchronized. 363 * Intel systems are normally all synchronized.
359 * Exceptions must mark TSC as unstable: 364 * Exceptions must mark TSC as unstable:
diff --git a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
index 2cc55b726c22..322b38c68198 100644
--- a/arch/x86/kernel/tsc_64.c
+++ b/arch/x86/kernel/tsc_64.c
@@ -272,9 +272,8 @@ __cpuinit int unsynchronized_tsc(void)
272 if (apic_is_clustered_box()) 272 if (apic_is_clustered_box())
273 return 1; 273 return 1;
274#endif 274#endif
275 /* Most intel systems have synchronized TSCs except for 275
276 multi node systems */ 276 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
277 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
278#ifdef CONFIG_ACPI 277#ifdef CONFIG_ACPI
279 /* But TSC doesn't tick in C3 so don't use it there */ 278 /* But TSC doesn't tick in C3 so don't use it there */
280 if (acpi_gbl_FADT.header.length > 0 && 279 if (acpi_gbl_FADT.header.length > 0 &&