diff options
-rw-r--r-- | drivers/usb/host/uhci-debug.c | 320 | ||||
-rw-r--r-- | drivers/usb/host/uhci-hcd.c | 65 | ||||
-rw-r--r-- | drivers/usb/host/uhci-hcd.h | 177 | ||||
-rw-r--r-- | drivers/usb/host/uhci-q.c | 985 |
4 files changed, 685 insertions, 862 deletions
diff --git a/drivers/usb/host/uhci-debug.c b/drivers/usb/host/uhci-debug.c index 5832953086f8..3faccbd68547 100644 --- a/drivers/usb/host/uhci-debug.c +++ b/drivers/usb/host/uhci-debug.c | |||
@@ -90,13 +90,60 @@ static int uhci_show_td(struct uhci_td *td, char *buf, int len, int space) | |||
90 | return out - buf; | 90 | return out - buf; |
91 | } | 91 | } |
92 | 92 | ||
93 | static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space) | 93 | static int uhci_show_urbp(struct urb_priv *urbp, char *buf, int len, int space) |
94 | { | 94 | { |
95 | char *out = buf; | 95 | char *out = buf; |
96 | struct urb_priv *urbp; | ||
97 | struct list_head *head, *tmp; | ||
98 | struct uhci_td *td; | 96 | struct uhci_td *td; |
99 | int i = 0, checked = 0, prevactive = 0; | 97 | int i, nactive, ninactive; |
98 | |||
99 | if (len < 200) | ||
100 | return 0; | ||
101 | |||
102 | out += sprintf(out, "urb_priv [%p] ", urbp); | ||
103 | out += sprintf(out, "urb [%p] ", urbp->urb); | ||
104 | out += sprintf(out, "qh [%p] ", urbp->qh); | ||
105 | out += sprintf(out, "Dev=%d ", usb_pipedevice(urbp->urb->pipe)); | ||
106 | out += sprintf(out, "EP=%x(%s) ", usb_pipeendpoint(urbp->urb->pipe), | ||
107 | (usb_pipein(urbp->urb->pipe) ? "IN" : "OUT")); | ||
108 | |||
109 | switch (usb_pipetype(urbp->urb->pipe)) { | ||
110 | case PIPE_ISOCHRONOUS: out += sprintf(out, "ISO"); break; | ||
111 | case PIPE_INTERRUPT: out += sprintf(out, "INT"); break; | ||
112 | case PIPE_BULK: out += sprintf(out, "BLK"); break; | ||
113 | case PIPE_CONTROL: out += sprintf(out, "CTL"); break; | ||
114 | } | ||
115 | |||
116 | out += sprintf(out, "%s", (urbp->fsbr ? " FSBR" : "")); | ||
117 | out += sprintf(out, "%s", (urbp->fsbr_timeout ? " FSBR_TO" : "")); | ||
118 | |||
119 | if (urbp->urb->status != -EINPROGRESS) | ||
120 | out += sprintf(out, " Status=%d", urbp->urb->status); | ||
121 | out += sprintf(out, "\n"); | ||
122 | |||
123 | i = nactive = ninactive = 0; | ||
124 | list_for_each_entry(td, &urbp->td_list, list) { | ||
125 | if (++i <= 10 || debug > 2) { | ||
126 | out += sprintf(out, "%*s%d: ", space + 2, "", i); | ||
127 | out += uhci_show_td(td, out, len - (out - buf), 0); | ||
128 | } else { | ||
129 | if (td_status(td) & TD_CTRL_ACTIVE) | ||
130 | ++nactive; | ||
131 | else | ||
132 | ++ninactive; | ||
133 | } | ||
134 | } | ||
135 | if (nactive + ninactive > 0) | ||
136 | out += sprintf(out, "%*s[skipped %d inactive and %d active " | ||
137 | "TDs]\n", | ||
138 | space, "", ninactive, nactive); | ||
139 | |||
140 | return out - buf; | ||
141 | } | ||
142 | |||
143 | static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space) | ||
144 | { | ||
145 | char *out = buf; | ||
146 | int i, nurbs; | ||
100 | __le32 element = qh_element(qh); | 147 | __le32 element = qh_element(qh); |
101 | 148 | ||
102 | /* Try to make sure there's enough memory */ | 149 | /* Try to make sure there's enough memory */ |
@@ -118,86 +165,36 @@ static int uhci_show_qh(struct uhci_qh *qh, char *buf, int len, int space) | |||
118 | if (!(element & ~(UHCI_PTR_QH | UHCI_PTR_DEPTH))) | 165 | if (!(element & ~(UHCI_PTR_QH | UHCI_PTR_DEPTH))) |
119 | out += sprintf(out, "%*s Element is NULL (bug?)\n", space, ""); | 166 | out += sprintf(out, "%*s Element is NULL (bug?)\n", space, ""); |
120 | 167 | ||
121 | if (!qh->urbp) { | 168 | if (list_empty(&qh->queue)) { |
122 | out += sprintf(out, "%*s urbp == NULL\n", space, ""); | 169 | out += sprintf(out, "%*s queue is empty\n", space, ""); |
123 | goto out; | 170 | } else { |
124 | } | 171 | struct urb_priv *urbp = list_entry(qh->queue.next, |
125 | 172 | struct urb_priv, node); | |
126 | urbp = qh->urbp; | 173 | struct uhci_td *td = list_entry(urbp->td_list.next, |
127 | 174 | struct uhci_td, list); | |
128 | head = &urbp->td_list; | 175 | |
129 | tmp = head->next; | 176 | if (cpu_to_le32(td->dma_handle) != (element & ~UHCI_PTR_BITS)) |
130 | 177 | out += sprintf(out, "%*s Element != First TD\n", | |
131 | td = list_entry(tmp, struct uhci_td, list); | 178 | space, ""); |
132 | 179 | i = nurbs = 0; | |
133 | if (cpu_to_le32(td->dma_handle) != (element & ~UHCI_PTR_BITS)) | 180 | list_for_each_entry(urbp, &qh->queue, node) { |
134 | out += sprintf(out, "%*s Element != First TD\n", space, ""); | 181 | if (++i <= 10) |
135 | 182 | out += uhci_show_urbp(urbp, out, | |
136 | while (tmp != head) { | 183 | len - (out - buf), space + 2); |
137 | struct uhci_td *td = list_entry(tmp, struct uhci_td, list); | 184 | else |
138 | 185 | ++nurbs; | |
139 | tmp = tmp->next; | ||
140 | |||
141 | out += sprintf(out, "%*s%d: ", space + 2, "", i++); | ||
142 | out += uhci_show_td(td, out, len - (out - buf), 0); | ||
143 | |||
144 | if (i > 10 && !checked && prevactive && tmp != head && | ||
145 | debug <= 2) { | ||
146 | struct list_head *ntmp = tmp; | ||
147 | struct uhci_td *ntd = td; | ||
148 | int active = 1, ni = i; | ||
149 | |||
150 | checked = 1; | ||
151 | |||
152 | while (ntmp != head && ntmp->next != head && active) { | ||
153 | ntd = list_entry(ntmp, struct uhci_td, list); | ||
154 | |||
155 | ntmp = ntmp->next; | ||
156 | |||
157 | active = td_status(ntd) & TD_CTRL_ACTIVE; | ||
158 | |||
159 | ni++; | ||
160 | } | ||
161 | |||
162 | if (active && ni > i) { | ||
163 | out += sprintf(out, "%*s[skipped %d active TDs]\n", space, "", ni - i); | ||
164 | tmp = ntmp; | ||
165 | td = ntd; | ||
166 | i = ni; | ||
167 | } | ||
168 | } | 186 | } |
169 | 187 | if (nurbs > 0) | |
170 | prevactive = td_status(td) & TD_CTRL_ACTIVE; | 188 | out += sprintf(out, "%*s Skipped %d URBs\n", |
171 | } | 189 | space, "", nurbs); |
172 | |||
173 | if (list_empty(&urbp->queue_list) || urbp->queued) | ||
174 | goto out; | ||
175 | |||
176 | out += sprintf(out, "%*sQueued QHs:\n", -space, "--"); | ||
177 | |||
178 | head = &urbp->queue_list; | ||
179 | tmp = head->next; | ||
180 | |||
181 | while (tmp != head) { | ||
182 | struct urb_priv *nurbp = list_entry(tmp, struct urb_priv, | ||
183 | queue_list); | ||
184 | tmp = tmp->next; | ||
185 | |||
186 | out += uhci_show_qh(nurbp->qh, out, len - (out - buf), space); | ||
187 | } | 190 | } |
188 | 191 | ||
189 | out: | ||
190 | return out - buf; | 192 | return out - buf; |
191 | } | 193 | } |
192 | 194 | ||
193 | #define show_frame_num() \ | ||
194 | if (!shown) { \ | ||
195 | shown = 1; \ | ||
196 | out += sprintf(out, "- Frame %d\n", i); \ | ||
197 | } | ||
198 | |||
199 | #ifdef CONFIG_PROC_FS | 195 | #ifdef CONFIG_PROC_FS |
200 | static const char * const qh_names[] = { | 196 | static const char * const qh_names[] = { |
197 | "skel_unlink_qh", "skel_iso_qh", | ||
201 | "skel_int128_qh", "skel_int64_qh", | 198 | "skel_int128_qh", "skel_int64_qh", |
202 | "skel_int32_qh", "skel_int16_qh", | 199 | "skel_int32_qh", "skel_int16_qh", |
203 | "skel_int8_qh", "skel_int4_qh", | 200 | "skel_int8_qh", "skel_int4_qh", |
@@ -206,12 +203,6 @@ static const char * const qh_names[] = { | |||
206 | "skel_bulk_qh", "skel_term_qh" | 203 | "skel_bulk_qh", "skel_term_qh" |
207 | }; | 204 | }; |
208 | 205 | ||
209 | #define show_qh_name() \ | ||
210 | if (!shown) { \ | ||
211 | shown = 1; \ | ||
212 | out += sprintf(out, "- %s\n", qh_names[i]); \ | ||
213 | } | ||
214 | |||
215 | static int uhci_show_sc(int port, unsigned short status, char *buf, int len) | 206 | static int uhci_show_sc(int port, unsigned short status, char *buf, int len) |
216 | { | 207 | { |
217 | char *out = buf; | 208 | char *out = buf; |
@@ -321,139 +312,29 @@ static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len) | |||
321 | return out - buf; | 312 | return out - buf; |
322 | } | 313 | } |
323 | 314 | ||
324 | static int uhci_show_urbp(struct uhci_hcd *uhci, struct urb_priv *urbp, char *buf, int len) | ||
325 | { | ||
326 | struct list_head *tmp; | ||
327 | char *out = buf; | ||
328 | int count = 0; | ||
329 | |||
330 | if (len < 200) | ||
331 | return 0; | ||
332 | |||
333 | out += sprintf(out, "urb_priv [%p] ", urbp); | ||
334 | out += sprintf(out, "urb [%p] ", urbp->urb); | ||
335 | out += sprintf(out, "qh [%p] ", urbp->qh); | ||
336 | out += sprintf(out, "Dev=%d ", usb_pipedevice(urbp->urb->pipe)); | ||
337 | out += sprintf(out, "EP=%x(%s) ", usb_pipeendpoint(urbp->urb->pipe), (usb_pipein(urbp->urb->pipe) ? "IN" : "OUT")); | ||
338 | |||
339 | switch (usb_pipetype(urbp->urb->pipe)) { | ||
340 | case PIPE_ISOCHRONOUS: out += sprintf(out, "ISO "); break; | ||
341 | case PIPE_INTERRUPT: out += sprintf(out, "INT "); break; | ||
342 | case PIPE_BULK: out += sprintf(out, "BLK "); break; | ||
343 | case PIPE_CONTROL: out += sprintf(out, "CTL "); break; | ||
344 | } | ||
345 | |||
346 | out += sprintf(out, "%s", (urbp->fsbr ? "FSBR " : "")); | ||
347 | out += sprintf(out, "%s", (urbp->fsbr_timeout ? "FSBR_TO " : "")); | ||
348 | |||
349 | if (urbp->urb->status != -EINPROGRESS) | ||
350 | out += sprintf(out, "Status=%d ", urbp->urb->status); | ||
351 | //out += sprintf(out, "FSBRtime=%lx ",urbp->fsbrtime); | ||
352 | |||
353 | count = 0; | ||
354 | list_for_each(tmp, &urbp->td_list) | ||
355 | count++; | ||
356 | out += sprintf(out, "TDs=%d ",count); | ||
357 | |||
358 | if (urbp->queued) | ||
359 | out += sprintf(out, "queued\n"); | ||
360 | else { | ||
361 | count = 0; | ||
362 | list_for_each(tmp, &urbp->queue_list) | ||
363 | count++; | ||
364 | out += sprintf(out, "queued URBs=%d\n", count); | ||
365 | } | ||
366 | |||
367 | return out - buf; | ||
368 | } | ||
369 | |||
370 | static int uhci_show_lists(struct uhci_hcd *uhci, char *buf, int len) | ||
371 | { | ||
372 | char *out = buf; | ||
373 | struct list_head *head, *tmp; | ||
374 | int count; | ||
375 | |||
376 | out += sprintf(out, "Main list URBs:"); | ||
377 | if (list_empty(&uhci->urb_list)) | ||
378 | out += sprintf(out, " Empty\n"); | ||
379 | else { | ||
380 | out += sprintf(out, "\n"); | ||
381 | count = 0; | ||
382 | head = &uhci->urb_list; | ||
383 | tmp = head->next; | ||
384 | while (tmp != head) { | ||
385 | struct urb_priv *urbp = list_entry(tmp, struct urb_priv, urb_list); | ||
386 | |||
387 | out += sprintf(out, " %d: ", ++count); | ||
388 | out += uhci_show_urbp(uhci, urbp, out, len - (out - buf)); | ||
389 | tmp = tmp->next; | ||
390 | } | ||
391 | } | ||
392 | |||
393 | out += sprintf(out, "Remove list URBs:"); | ||
394 | if (list_empty(&uhci->urb_remove_list)) | ||
395 | out += sprintf(out, " Empty\n"); | ||
396 | else { | ||
397 | out += sprintf(out, "\n"); | ||
398 | count = 0; | ||
399 | head = &uhci->urb_remove_list; | ||
400 | tmp = head->next; | ||
401 | while (tmp != head) { | ||
402 | struct urb_priv *urbp = list_entry(tmp, struct urb_priv, urb_list); | ||
403 | |||
404 | out += sprintf(out, " %d: ", ++count); | ||
405 | out += uhci_show_urbp(uhci, urbp, out, len - (out - buf)); | ||
406 | tmp = tmp->next; | ||
407 | } | ||
408 | } | ||
409 | |||
410 | out += sprintf(out, "Complete list URBs:"); | ||
411 | if (list_empty(&uhci->complete_list)) | ||
412 | out += sprintf(out, " Empty\n"); | ||
413 | else { | ||
414 | out += sprintf(out, "\n"); | ||
415 | count = 0; | ||
416 | head = &uhci->complete_list; | ||
417 | tmp = head->next; | ||
418 | while (tmp != head) { | ||
419 | struct urb_priv *urbp = list_entry(tmp, struct urb_priv, urb_list); | ||
420 | |||
421 | out += sprintf(out, " %d: ", ++count); | ||
422 | out += uhci_show_urbp(uhci, urbp, out, len - (out - buf)); | ||
423 | tmp = tmp->next; | ||
424 | } | ||
425 | } | ||
426 | |||
427 | return out - buf; | ||
428 | } | ||
429 | |||
430 | static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) | 315 | static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) |
431 | { | 316 | { |
432 | unsigned long flags; | ||
433 | char *out = buf; | 317 | char *out = buf; |
434 | int i, j; | 318 | int i, j; |
435 | struct uhci_qh *qh; | 319 | struct uhci_qh *qh; |
436 | struct uhci_td *td; | 320 | struct uhci_td *td; |
437 | struct list_head *tmp, *head; | 321 | struct list_head *tmp, *head; |
438 | 322 | ||
439 | spin_lock_irqsave(&uhci->lock, flags); | ||
440 | |||
441 | out += uhci_show_root_hub_state(uhci, out, len - (out - buf)); | 323 | out += uhci_show_root_hub_state(uhci, out, len - (out - buf)); |
442 | out += sprintf(out, "HC status\n"); | 324 | out += sprintf(out, "HC status\n"); |
443 | out += uhci_show_status(uhci, out, len - (out - buf)); | 325 | out += uhci_show_status(uhci, out, len - (out - buf)); |
326 | if (debug <= 1) | ||
327 | return out - buf; | ||
444 | 328 | ||
445 | out += sprintf(out, "Frame List\n"); | 329 | out += sprintf(out, "Frame List\n"); |
446 | for (i = 0; i < UHCI_NUMFRAMES; ++i) { | 330 | for (i = 0; i < UHCI_NUMFRAMES; ++i) { |
447 | int shown = 0; | ||
448 | td = uhci->frame_cpu[i]; | 331 | td = uhci->frame_cpu[i]; |
449 | if (!td) | 332 | if (!td) |
450 | continue; | 333 | continue; |
451 | 334 | ||
452 | if (td->dma_handle != (dma_addr_t)uhci->frame[i]) { | 335 | out += sprintf(out, "- Frame %d\n", i); \ |
453 | show_frame_num(); | 336 | if (td->dma_handle != (dma_addr_t)uhci->frame[i]) |
454 | out += sprintf(out, " frame list does not match td->dma_handle!\n"); | 337 | out += sprintf(out, " frame list does not match td->dma_handle!\n"); |
455 | } | ||
456 | show_frame_num(); | ||
457 | 338 | ||
458 | head = &td->fl_list; | 339 | head = &td->fl_list; |
459 | tmp = head; | 340 | tmp = head; |
@@ -467,14 +348,11 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) | |||
467 | out += sprintf(out, "Skeleton QHs\n"); | 348 | out += sprintf(out, "Skeleton QHs\n"); |
468 | 349 | ||
469 | for (i = 0; i < UHCI_NUM_SKELQH; ++i) { | 350 | for (i = 0; i < UHCI_NUM_SKELQH; ++i) { |
470 | int shown = 0; | 351 | int cnt = 0; |
471 | 352 | ||
472 | qh = uhci->skelqh[i]; | 353 | qh = uhci->skelqh[i]; |
473 | 354 | out += sprintf(out, "- %s\n", qh_names[i]); \ | |
474 | if (debug > 1) { | 355 | out += uhci_show_qh(qh, out, len - (out - buf), 4); |
475 | show_qh_name(); | ||
476 | out += uhci_show_qh(qh, out, len - (out - buf), 4); | ||
477 | } | ||
478 | 356 | ||
479 | /* Last QH is the Terminating QH, it's different */ | 357 | /* Last QH is the Terminating QH, it's different */ |
480 | if (i == UHCI_NUM_SKELQH - 1) { | 358 | if (i == UHCI_NUM_SKELQH - 1) { |
@@ -487,44 +365,27 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len) | |||
487 | continue; | 365 | continue; |
488 | } | 366 | } |
489 | 367 | ||
490 | j = (i < 7) ? 7 : i+1; /* Next skeleton */ | 368 | j = (i < 9) ? 9 : i+1; /* Next skeleton */ |
491 | if (list_empty(&qh->list)) { | 369 | head = &qh->node; |
492 | if (i < UHCI_NUM_SKELQH - 1) { | ||
493 | if (qh->link != | ||
494 | (cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH)) { | ||
495 | show_qh_name(); | ||
496 | out += sprintf(out, " skeleton QH not linked to next skeleton QH!\n"); | ||
497 | } | ||
498 | } | ||
499 | |||
500 | continue; | ||
501 | } | ||
502 | |||
503 | show_qh_name(); | ||
504 | |||
505 | head = &qh->list; | ||
506 | tmp = head->next; | 370 | tmp = head->next; |
507 | 371 | ||
508 | while (tmp != head) { | 372 | while (tmp != head) { |
509 | qh = list_entry(tmp, struct uhci_qh, list); | 373 | qh = list_entry(tmp, struct uhci_qh, node); |
510 | |||
511 | tmp = tmp->next; | 374 | tmp = tmp->next; |
512 | 375 | if (++cnt <= 10) | |
513 | out += uhci_show_qh(qh, out, len - (out - buf), 4); | 376 | out += uhci_show_qh(qh, out, |
377 | len - (out - buf), 4); | ||
514 | } | 378 | } |
379 | if ((cnt -= 10) > 0) | ||
380 | out += sprintf(out, " Skipped %d QHs\n", cnt); | ||
515 | 381 | ||
516 | if (i < UHCI_NUM_SKELQH - 1) { | 382 | if (i > 1 && i < UHCI_NUM_SKELQH - 1) { |
517 | if (qh->link != | 383 | if (qh->link != |
518 | (cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH)) | 384 | (cpu_to_le32(uhci->skelqh[j]->dma_handle) | UHCI_PTR_QH)) |
519 | out += sprintf(out, " last QH not linked to next skeleton!\n"); | 385 | out += sprintf(out, " last QH not linked to next skeleton!\n"); |
520 | } | 386 | } |
521 | } | 387 | } |
522 | 388 | ||
523 | if (debug > 2) | ||
524 | out += uhci_show_lists(uhci, out, len - (out - buf)); | ||
525 | |||
526 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
527 | |||
528 | return out - buf; | 389 | return out - buf; |
529 | } | 390 | } |
530 | 391 | ||
@@ -541,6 +402,7 @@ static int uhci_debug_open(struct inode *inode, struct file *file) | |||
541 | struct uhci_hcd *uhci = inode->u.generic_ip; | 402 | struct uhci_hcd *uhci = inode->u.generic_ip; |
542 | struct uhci_debug *up; | 403 | struct uhci_debug *up; |
543 | int ret = -ENOMEM; | 404 | int ret = -ENOMEM; |
405 | unsigned long flags; | ||
544 | 406 | ||
545 | lock_kernel(); | 407 | lock_kernel(); |
546 | up = kmalloc(sizeof(*up), GFP_KERNEL); | 408 | up = kmalloc(sizeof(*up), GFP_KERNEL); |
@@ -553,7 +415,9 @@ static int uhci_debug_open(struct inode *inode, struct file *file) | |||
553 | goto out; | 415 | goto out; |
554 | } | 416 | } |
555 | 417 | ||
418 | spin_lock_irqsave(&uhci->lock, flags); | ||
556 | up->size = uhci_sprint_schedule(uhci, up->data, MAX_OUTPUT); | 419 | up->size = uhci_sprint_schedule(uhci, up->data, MAX_OUTPUT); |
420 | spin_unlock_irqrestore(&uhci->lock, flags); | ||
557 | 421 | ||
558 | file->private_data = up; | 422 | file->private_data = up; |
559 | 423 | ||
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c index dfe121d35887..1ff4b8806372 100644 --- a/drivers/usb/host/uhci-hcd.c +++ b/drivers/usb/host/uhci-hcd.c | |||
@@ -54,7 +54,7 @@ | |||
54 | /* | 54 | /* |
55 | * Version Information | 55 | * Version Information |
56 | */ | 56 | */ |
57 | #define DRIVER_VERSION "v2.3" | 57 | #define DRIVER_VERSION "v3.0" |
58 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ | 58 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ |
59 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ | 59 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ |
60 | Alan Stern" | 60 | Alan Stern" |
@@ -489,15 +489,11 @@ static int uhci_start(struct usb_hcd *hcd) | |||
489 | uhci->fsbrtimeout = 0; | 489 | uhci->fsbrtimeout = 0; |
490 | 490 | ||
491 | spin_lock_init(&uhci->lock); | 491 | spin_lock_init(&uhci->lock); |
492 | INIT_LIST_HEAD(&uhci->qh_remove_list); | ||
493 | 492 | ||
494 | INIT_LIST_HEAD(&uhci->td_remove_list); | 493 | INIT_LIST_HEAD(&uhci->td_remove_list); |
495 | |||
496 | INIT_LIST_HEAD(&uhci->urb_remove_list); | ||
497 | |||
498 | INIT_LIST_HEAD(&uhci->urb_list); | 494 | INIT_LIST_HEAD(&uhci->urb_list); |
499 | |||
500 | INIT_LIST_HEAD(&uhci->complete_list); | 495 | INIT_LIST_HEAD(&uhci->complete_list); |
496 | INIT_LIST_HEAD(&uhci->idle_qh_list); | ||
501 | 497 | ||
502 | init_waitqueue_head(&uhci->waitqh); | 498 | init_waitqueue_head(&uhci->waitqh); |
503 | 499 | ||
@@ -540,7 +536,7 @@ static int uhci_start(struct usb_hcd *hcd) | |||
540 | } | 536 | } |
541 | 537 | ||
542 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { | 538 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { |
543 | uhci->skelqh[i] = uhci_alloc_qh(uhci); | 539 | uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); |
544 | if (!uhci->skelqh[i]) { | 540 | if (!uhci->skelqh[i]) { |
545 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); | 541 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); |
546 | goto err_alloc_skelqh; | 542 | goto err_alloc_skelqh; |
@@ -557,13 +553,17 @@ static int uhci_start(struct usb_hcd *hcd) | |||
557 | uhci->skel_int16_qh->link = | 553 | uhci->skel_int16_qh->link = |
558 | uhci->skel_int8_qh->link = | 554 | uhci->skel_int8_qh->link = |
559 | uhci->skel_int4_qh->link = | 555 | uhci->skel_int4_qh->link = |
560 | uhci->skel_int2_qh->link = | 556 | uhci->skel_int2_qh->link = UHCI_PTR_QH | |
561 | cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH; | 557 | cpu_to_le32(uhci->skel_int1_qh->dma_handle); |
562 | uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH; | 558 | |
563 | 559 | uhci->skel_int1_qh->link = UHCI_PTR_QH | | |
564 | uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH; | 560 | cpu_to_le32(uhci->skel_ls_control_qh->dma_handle); |
565 | uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH; | 561 | uhci->skel_ls_control_qh->link = UHCI_PTR_QH | |
566 | uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH; | 562 | cpu_to_le32(uhci->skel_fs_control_qh->dma_handle); |
563 | uhci->skel_fs_control_qh->link = UHCI_PTR_QH | | ||
564 | cpu_to_le32(uhci->skel_bulk_qh->dma_handle); | ||
565 | uhci->skel_bulk_qh->link = UHCI_PTR_QH | | ||
566 | cpu_to_le32(uhci->skel_term_qh->dma_handle); | ||
567 | 567 | ||
568 | /* This dummy TD is to work around a bug in Intel PIIX controllers */ | 568 | /* This dummy TD is to work around a bug in Intel PIIX controllers */ |
569 | uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | | 569 | uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | |
@@ -589,15 +589,15 @@ static int uhci_start(struct usb_hcd *hcd) | |||
589 | 589 | ||
590 | /* | 590 | /* |
591 | * ffs (Find First bit Set) does exactly what we need: | 591 | * ffs (Find First bit Set) does exactly what we need: |
592 | * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6], | 592 | * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8], |
593 | * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc. | 593 | * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc. |
594 | * ffs > 6 => not on any high-period queue, so use | 594 | * ffs >= 7 => not on any high-period queue, so use |
595 | * skel_int1_qh = skelqh[7]. | 595 | * skel_int1_qh = skelqh[9]. |
596 | * Add UHCI_NUMFRAMES to insure at least one bit is set. | 596 | * Add UHCI_NUMFRAMES to insure at least one bit is set. |
597 | */ | 597 | */ |
598 | irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES); | 598 | irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES); |
599 | if (irq < 0) | 599 | if (irq <= 1) |
600 | irq = 7; | 600 | irq = 9; |
601 | 601 | ||
602 | /* Only place we don't use the frame list routines */ | 602 | /* Only place we don't use the frame list routines */ |
603 | uhci->frame[i] = UHCI_PTR_QH | | 603 | uhci->frame[i] = UHCI_PTR_QH | |
@@ -767,13 +767,30 @@ static int uhci_resume(struct usb_hcd *hcd) | |||
767 | } | 767 | } |
768 | #endif | 768 | #endif |
769 | 769 | ||
770 | /* Wait until all the URBs for a particular device/endpoint are gone */ | 770 | /* Wait until a particular device/endpoint's QH is idle, and free it */ |
771 | static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, | 771 | static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, |
772 | struct usb_host_endpoint *ep) | 772 | struct usb_host_endpoint *hep) |
773 | { | 773 | { |
774 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 774 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
775 | struct uhci_qh *qh; | ||
776 | |||
777 | spin_lock_irq(&uhci->lock); | ||
778 | qh = (struct uhci_qh *) hep->hcpriv; | ||
779 | if (qh == NULL) | ||
780 | goto done; | ||
775 | 781 | ||
776 | wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list)); | 782 | while (qh->state != QH_STATE_IDLE) { |
783 | ++uhci->num_waiting; | ||
784 | spin_unlock_irq(&uhci->lock); | ||
785 | wait_event_interruptible(uhci->waitqh, | ||
786 | qh->state == QH_STATE_IDLE); | ||
787 | spin_lock_irq(&uhci->lock); | ||
788 | --uhci->num_waiting; | ||
789 | } | ||
790 | |||
791 | uhci_free_qh(uhci, qh); | ||
792 | done: | ||
793 | spin_unlock_irq(&uhci->lock); | ||
777 | } | 794 | } |
778 | 795 | ||
779 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) | 796 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) |
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h index 8b4b887a7d41..7a9481c09a05 100644 --- a/drivers/usb/host/uhci-hcd.h +++ b/drivers/usb/host/uhci-hcd.h | |||
@@ -28,8 +28,9 @@ | |||
28 | #define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */ | 28 | #define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */ |
29 | #define USBSTS_ERROR 0x0002 /* Interrupt due to error */ | 29 | #define USBSTS_ERROR 0x0002 /* Interrupt due to error */ |
30 | #define USBSTS_RD 0x0004 /* Resume Detect */ | 30 | #define USBSTS_RD 0x0004 /* Resume Detect */ |
31 | #define USBSTS_HSE 0x0008 /* Host System Error - basically PCI problems */ | 31 | #define USBSTS_HSE 0x0008 /* Host System Error: PCI problems */ |
32 | #define USBSTS_HCPE 0x0010 /* Host Controller Process Error - the scripts were buggy */ | 32 | #define USBSTS_HCPE 0x0010 /* Host Controller Process Error: |
33 | * the schedule is buggy */ | ||
33 | #define USBSTS_HCH 0x0020 /* HC Halted */ | 34 | #define USBSTS_HCH 0x0020 /* HC Halted */ |
34 | 35 | ||
35 | /* Interrupt enable register */ | 36 | /* Interrupt enable register */ |
@@ -47,7 +48,8 @@ | |||
47 | /* USB port status and control registers */ | 48 | /* USB port status and control registers */ |
48 | #define USBPORTSC1 16 | 49 | #define USBPORTSC1 16 |
49 | #define USBPORTSC2 18 | 50 | #define USBPORTSC2 18 |
50 | #define USBPORTSC_CCS 0x0001 /* Current Connect Status ("device present") */ | 51 | #define USBPORTSC_CCS 0x0001 /* Current Connect Status |
52 | * ("device present") */ | ||
51 | #define USBPORTSC_CSC 0x0002 /* Connect Status Change */ | 53 | #define USBPORTSC_CSC 0x0002 /* Connect Status Change */ |
52 | #define USBPORTSC_PE 0x0004 /* Port Enable */ | 54 | #define USBPORTSC_PE 0x0004 /* Port Enable */ |
53 | #define USBPORTSC_PEC 0x0008 /* Port Enable Change */ | 55 | #define USBPORTSC_PEC 0x0008 /* Port Enable Change */ |
@@ -71,15 +73,16 @@ | |||
71 | #define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */ | 73 | #define USBLEGSUP_RWC 0x8f00 /* the R/WC bits */ |
72 | #define USBLEGSUP_RO 0x5040 /* R/O and reserved bits */ | 74 | #define USBLEGSUP_RO 0x5040 /* R/O and reserved bits */ |
73 | 75 | ||
74 | #define UHCI_PTR_BITS cpu_to_le32(0x000F) | 76 | #define UHCI_PTR_BITS __constant_cpu_to_le32(0x000F) |
75 | #define UHCI_PTR_TERM cpu_to_le32(0x0001) | 77 | #define UHCI_PTR_TERM __constant_cpu_to_le32(0x0001) |
76 | #define UHCI_PTR_QH cpu_to_le32(0x0002) | 78 | #define UHCI_PTR_QH __constant_cpu_to_le32(0x0002) |
77 | #define UHCI_PTR_DEPTH cpu_to_le32(0x0004) | 79 | #define UHCI_PTR_DEPTH __constant_cpu_to_le32(0x0004) |
78 | #define UHCI_PTR_BREADTH cpu_to_le32(0x0000) | 80 | #define UHCI_PTR_BREADTH __constant_cpu_to_le32(0x0000) |
79 | 81 | ||
80 | #define UHCI_NUMFRAMES 1024 /* in the frame list [array] */ | 82 | #define UHCI_NUMFRAMES 1024 /* in the frame list [array] */ |
81 | #define UHCI_MAX_SOF_NUMBER 2047 /* in an SOF packet */ | 83 | #define UHCI_MAX_SOF_NUMBER 2047 /* in an SOF packet */ |
82 | #define CAN_SCHEDULE_FRAMES 1000 /* how far future frames can be scheduled */ | 84 | #define CAN_SCHEDULE_FRAMES 1000 /* how far in the future frames |
85 | * can be scheduled */ | ||
83 | 86 | ||
84 | 87 | ||
85 | /* | 88 | /* |
@@ -87,38 +90,54 @@ | |||
87 | */ | 90 | */ |
88 | 91 | ||
89 | /* | 92 | /* |
90 | * One role of a QH is to hold a queue of TDs for some endpoint. Each QH is | 93 | * One role of a QH is to hold a queue of TDs for some endpoint. One QH goes |
91 | * used with one URB, and qh->element (updated by the HC) is either: | 94 | * with each endpoint, and qh->element (updated by the HC) is either: |
92 | * - the next unprocessed TD for the URB, or | 95 | * - the next unprocessed TD in the endpoint's queue, or |
93 | * - UHCI_PTR_TERM (when there's no more traffic for this endpoint), or | 96 | * - UHCI_PTR_TERM (when there's no more traffic for this endpoint). |
94 | * - the QH for the next URB queued to the same endpoint. | ||
95 | * | 97 | * |
96 | * The other role of a QH is to serve as a "skeleton" framelist entry, so we | 98 | * The other role of a QH is to serve as a "skeleton" framelist entry, so we |
97 | * can easily splice a QH for some endpoint into the schedule at the right | 99 | * can easily splice a QH for some endpoint into the schedule at the right |
98 | * place. Then qh->element is UHCI_PTR_TERM. | 100 | * place. Then qh->element is UHCI_PTR_TERM. |
99 | * | 101 | * |
100 | * In the frame list, qh->link maintains a list of QHs seen by the HC: | 102 | * In the schedule, qh->link maintains a list of QHs seen by the HC: |
101 | * skel1 --> ep1-qh --> ep2-qh --> ... --> skel2 --> ... | 103 | * skel1 --> ep1-qh --> ep2-qh --> ... --> skel2 --> ... |
104 | * | ||
105 | * qh->node is the software equivalent of qh->link. The differences | ||
106 | * are that the software list is doubly-linked and QHs in the UNLINKING | ||
107 | * state are on the software list but not the hardware schedule. | ||
108 | * | ||
109 | * For bookkeeping purposes we maintain QHs even for Isochronous endpoints, | ||
110 | * but they never get added to the hardware schedule. | ||
102 | */ | 111 | */ |
112 | #define QH_STATE_IDLE 1 /* QH is not being used */ | ||
113 | #define QH_STATE_UNLINKING 2 /* QH has been removed from the | ||
114 | * schedule but the hardware may | ||
115 | * still be using it */ | ||
116 | #define QH_STATE_ACTIVE 3 /* QH is on the schedule */ | ||
117 | |||
103 | struct uhci_qh { | 118 | struct uhci_qh { |
104 | /* Hardware fields */ | 119 | /* Hardware fields */ |
105 | __le32 link; /* Next queue */ | 120 | __le32 link; /* Next QH in the schedule */ |
106 | __le32 element; /* Queue element pointer */ | 121 | __le32 element; /* Queue element (TD) pointer */ |
107 | 122 | ||
108 | /* Software fields */ | 123 | /* Software fields */ |
109 | dma_addr_t dma_handle; | 124 | dma_addr_t dma_handle; |
110 | 125 | ||
111 | struct urb_priv *urbp; | 126 | struct list_head node; /* Node in the list of QHs */ |
127 | struct usb_host_endpoint *hep; /* Endpoint information */ | ||
128 | struct usb_device *udev; | ||
129 | struct list_head queue; /* Queue of urbps for this QH */ | ||
130 | struct uhci_qh *skel; /* Skeleton for this QH */ | ||
112 | 131 | ||
113 | struct list_head list; | 132 | unsigned int unlink_frame; /* When the QH was unlinked */ |
114 | struct list_head remove_list; | 133 | int state; /* QH_STATE_xxx; see above */ |
115 | } __attribute__((aligned(16))); | 134 | } __attribute__((aligned(16))); |
116 | 135 | ||
117 | /* | 136 | /* |
118 | * We need a special accessor for the element pointer because it is | 137 | * We need a special accessor for the element pointer because it is |
119 | * subject to asynchronous updates by the controller. | 138 | * subject to asynchronous updates by the controller. |
120 | */ | 139 | */ |
121 | static __le32 inline qh_element(struct uhci_qh *qh) { | 140 | static inline __le32 qh_element(struct uhci_qh *qh) { |
122 | __le32 element = qh->element; | 141 | __le32 element = qh->element; |
123 | 142 | ||
124 | barrier(); | 143 | barrier(); |
@@ -149,11 +168,13 @@ static __le32 inline qh_element(struct uhci_qh *qh) { | |||
149 | #define TD_CTRL_ACTLEN_MASK 0x7FF /* actual length, encoded as n - 1 */ | 168 | #define TD_CTRL_ACTLEN_MASK 0x7FF /* actual length, encoded as n - 1 */ |
150 | 169 | ||
151 | #define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \ | 170 | #define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \ |
152 | TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF) | 171 | TD_CTRL_BABBLE | TD_CTRL_CRCTIME | \ |
172 | TD_CTRL_BITSTUFF) | ||
153 | 173 | ||
154 | #define uhci_maxerr(err) ((err) << TD_CTRL_C_ERR_SHIFT) | 174 | #define uhci_maxerr(err) ((err) << TD_CTRL_C_ERR_SHIFT) |
155 | #define uhci_status_bits(ctrl_sts) ((ctrl_sts) & 0xF60000) | 175 | #define uhci_status_bits(ctrl_sts) ((ctrl_sts) & 0xF60000) |
156 | #define uhci_actual_length(ctrl_sts) (((ctrl_sts) + 1) & TD_CTRL_ACTLEN_MASK) /* 1-based */ | 176 | #define uhci_actual_length(ctrl_sts) (((ctrl_sts) + 1) & \ |
177 | TD_CTRL_ACTLEN_MASK) /* 1-based */ | ||
157 | 178 | ||
158 | /* | 179 | /* |
159 | * for TD <info>: (a.k.a. Token) | 180 | * for TD <info>: (a.k.a. Token) |
@@ -163,7 +184,7 @@ static __le32 inline qh_element(struct uhci_qh *qh) { | |||
163 | #define TD_TOKEN_TOGGLE_SHIFT 19 | 184 | #define TD_TOKEN_TOGGLE_SHIFT 19 |
164 | #define TD_TOKEN_TOGGLE (1 << 19) | 185 | #define TD_TOKEN_TOGGLE (1 << 19) |
165 | #define TD_TOKEN_EXPLEN_SHIFT 21 | 186 | #define TD_TOKEN_EXPLEN_SHIFT 21 |
166 | #define TD_TOKEN_EXPLEN_MASK 0x7FF /* expected length, encoded as n - 1 */ | 187 | #define TD_TOKEN_EXPLEN_MASK 0x7FF /* expected length, encoded as n-1 */ |
167 | #define TD_TOKEN_PID_MASK 0xFF | 188 | #define TD_TOKEN_PID_MASK 0xFF |
168 | 189 | ||
169 | #define uhci_explen(len) ((((len) - 1) & TD_TOKEN_EXPLEN_MASK) << \ | 190 | #define uhci_explen(len) ((((len) - 1) & TD_TOKEN_EXPLEN_MASK) << \ |
@@ -187,7 +208,7 @@ static __le32 inline qh_element(struct uhci_qh *qh) { | |||
187 | * sw space after the TD entry. | 208 | * sw space after the TD entry. |
188 | * | 209 | * |
189 | * td->link points to either another TD (not necessarily for the same urb or | 210 | * td->link points to either another TD (not necessarily for the same urb or |
190 | * even the same endpoint), or nothing (PTR_TERM), or a QH (for queued urbs). | 211 | * even the same endpoint), or nothing (PTR_TERM), or a QH. |
191 | */ | 212 | */ |
192 | struct uhci_td { | 213 | struct uhci_td { |
193 | /* Hardware fields */ | 214 | /* Hardware fields */ |
@@ -210,7 +231,7 @@ struct uhci_td { | |||
210 | * We need a special accessor for the control/status word because it is | 231 | * We need a special accessor for the control/status word because it is |
211 | * subject to asynchronous updates by the controller. | 232 | * subject to asynchronous updates by the controller. |
212 | */ | 233 | */ |
213 | static u32 inline td_status(struct uhci_td *td) { | 234 | static inline u32 td_status(struct uhci_td *td) { |
214 | __le32 status = td->status; | 235 | __le32 status = td->status; |
215 | 236 | ||
216 | barrier(); | 237 | barrier(); |
@@ -223,17 +244,14 @@ static u32 inline td_status(struct uhci_td *td) { | |||
223 | */ | 244 | */ |
224 | 245 | ||
225 | /* | 246 | /* |
226 | * The UHCI driver places Interrupt, Control and Bulk into QHs both | 247 | * The UHCI driver uses QHs with Interrupt, Control and Bulk URBs for |
227 | * to group together TDs for one transfer, and also to facilitate queuing | 248 | * automatic queuing. To make it easy to insert entries into the schedule, |
228 | * of URBs. To make it easy to insert entries into the schedule, we have | 249 | * we have a skeleton of QHs for each predefined Interrupt latency, |
229 | * a skeleton of QHs for each predefined Interrupt latency, low-speed | 250 | * low-speed control, full-speed control, bulk, and terminating QH |
230 | * control, full-speed control and terminating QH (see explanation for | 251 | * (see explanation for the terminating QH below). |
231 | * the terminating QH below). | ||
232 | * | 252 | * |
233 | * When we want to add a new QH, we add it to the end of the list for the | 253 | * When we want to add a new QH, we add it to the end of the list for the |
234 | * skeleton QH. | 254 | * skeleton QH. For instance, the schedule list can look like this: |
235 | * | ||
236 | * For instance, the queue can look like this: | ||
237 | * | 255 | * |
238 | * skel int128 QH | 256 | * skel int128 QH |
239 | * dev 1 interrupt QH | 257 | * dev 1 interrupt QH |
@@ -256,26 +274,31 @@ static u32 inline td_status(struct uhci_td *td) { | |||
256 | * - To loop back to the full-speed control queue for full-speed bandwidth | 274 | * - To loop back to the full-speed control queue for full-speed bandwidth |
257 | * reclamation. | 275 | * reclamation. |
258 | * | 276 | * |
259 | * Isochronous transfers are stored before the start of the skeleton | 277 | * There's a special skeleton QH for Isochronous QHs. It never appears |
260 | * schedule and don't use QHs. While the UHCI spec doesn't forbid the | 278 | * on the schedule, and Isochronous TDs go on the schedule before the |
261 | * use of QHs for Isochronous, it doesn't use them either. And the spec | 279 | * the skeleton QHs. The hardware accesses them directly rather than |
262 | * says that queues never advance on an error completion status, which | 280 | * through their QH, which is used only for bookkeeping purposes. |
263 | * makes them totally unsuitable for Isochronous transfers. | 281 | * While the UHCI spec doesn't forbid the use of QHs for Isochronous, |
282 | * it doesn't use them either. And the spec says that queues never | ||
283 | * advance on an error completion status, which makes them totally | ||
284 | * unsuitable for Isochronous transfers. | ||
264 | */ | 285 | */ |
265 | 286 | ||
266 | #define UHCI_NUM_SKELQH 12 | 287 | #define UHCI_NUM_SKELQH 14 |
267 | #define skel_int128_qh skelqh[0] | 288 | #define skel_unlink_qh skelqh[0] |
268 | #define skel_int64_qh skelqh[1] | 289 | #define skel_iso_qh skelqh[1] |
269 | #define skel_int32_qh skelqh[2] | 290 | #define skel_int128_qh skelqh[2] |
270 | #define skel_int16_qh skelqh[3] | 291 | #define skel_int64_qh skelqh[3] |
271 | #define skel_int8_qh skelqh[4] | 292 | #define skel_int32_qh skelqh[4] |
272 | #define skel_int4_qh skelqh[5] | 293 | #define skel_int16_qh skelqh[5] |
273 | #define skel_int2_qh skelqh[6] | 294 | #define skel_int8_qh skelqh[6] |
274 | #define skel_int1_qh skelqh[7] | 295 | #define skel_int4_qh skelqh[7] |
275 | #define skel_ls_control_qh skelqh[8] | 296 | #define skel_int2_qh skelqh[8] |
276 | #define skel_fs_control_qh skelqh[9] | 297 | #define skel_int1_qh skelqh[9] |
277 | #define skel_bulk_qh skelqh[10] | 298 | #define skel_ls_control_qh skelqh[10] |
278 | #define skel_term_qh skelqh[11] | 299 | #define skel_fs_control_qh skelqh[11] |
300 | #define skel_bulk_qh skelqh[12] | ||
301 | #define skel_term_qh skelqh[13] | ||
279 | 302 | ||
280 | /* | 303 | /* |
281 | * Search tree for determining where <interval> fits in the skelqh[] | 304 | * Search tree for determining where <interval> fits in the skelqh[] |
@@ -293,21 +316,21 @@ static inline int __interval_to_skel(int interval) | |||
293 | if (interval < 16) { | 316 | if (interval < 16) { |
294 | if (interval < 4) { | 317 | if (interval < 4) { |
295 | if (interval < 2) | 318 | if (interval < 2) |
296 | return 7; /* int1 for 0-1 ms */ | 319 | return 9; /* int1 for 0-1 ms */ |
297 | return 6; /* int2 for 2-3 ms */ | 320 | return 8; /* int2 for 2-3 ms */ |
298 | } | 321 | } |
299 | if (interval < 8) | 322 | if (interval < 8) |
300 | return 5; /* int4 for 4-7 ms */ | 323 | return 7; /* int4 for 4-7 ms */ |
301 | return 4; /* int8 for 8-15 ms */ | 324 | return 6; /* int8 for 8-15 ms */ |
302 | } | 325 | } |
303 | if (interval < 64) { | 326 | if (interval < 64) { |
304 | if (interval < 32) | 327 | if (interval < 32) |
305 | return 3; /* int16 for 16-31 ms */ | 328 | return 5; /* int16 for 16-31 ms */ |
306 | return 2; /* int32 for 32-63 ms */ | 329 | return 4; /* int32 for 32-63 ms */ |
307 | } | 330 | } |
308 | if (interval < 128) | 331 | if (interval < 128) |
309 | return 1; /* int64 for 64-127 ms */ | 332 | return 3; /* int64 for 64-127 ms */ |
310 | return 0; /* int128 for 128-255 ms (Max.) */ | 333 | return 2; /* int128 for 128-255 ms (Max.) */ |
311 | } | 334 | } |
312 | 335 | ||
313 | 336 | ||
@@ -363,12 +386,12 @@ struct uhci_hcd { | |||
363 | 386 | ||
364 | spinlock_t lock; | 387 | spinlock_t lock; |
365 | 388 | ||
366 | dma_addr_t frame_dma_handle; /* Hardware frame list */ | 389 | dma_addr_t frame_dma_handle; /* Hardware frame list */ |
367 | __le32 *frame; | 390 | __le32 *frame; |
368 | void **frame_cpu; /* CPU's frame list */ | 391 | void **frame_cpu; /* CPU's frame list */ |
369 | 392 | ||
370 | int fsbr; /* Full-speed bandwidth reclamation */ | 393 | int fsbr; /* Full-speed bandwidth reclamation */ |
371 | unsigned long fsbrtimeout; /* FSBR delay */ | 394 | unsigned long fsbrtimeout; /* FSBR delay */ |
372 | 395 | ||
373 | enum uhci_rh_state rh_state; | 396 | enum uhci_rh_state rh_state; |
374 | unsigned long auto_stop_time; /* When to AUTO_STOP */ | 397 | unsigned long auto_stop_time; /* When to AUTO_STOP */ |
@@ -392,24 +415,19 @@ struct uhci_hcd { | |||
392 | /* Main list of URBs currently controlled by this HC */ | 415 | /* Main list of URBs currently controlled by this HC */ |
393 | struct list_head urb_list; | 416 | struct list_head urb_list; |
394 | 417 | ||
395 | /* List of QHs that are done, but waiting to be unlinked (race) */ | ||
396 | struct list_head qh_remove_list; | ||
397 | unsigned int qh_remove_age; /* Age in frames */ | ||
398 | |||
399 | /* List of TDs that are done, but waiting to be freed (race) */ | 418 | /* List of TDs that are done, but waiting to be freed (race) */ |
400 | struct list_head td_remove_list; | 419 | struct list_head td_remove_list; |
401 | unsigned int td_remove_age; /* Age in frames */ | 420 | unsigned int td_remove_age; /* Age in frames */ |
402 | 421 | ||
403 | /* List of asynchronously unlinked URBs */ | ||
404 | struct list_head urb_remove_list; | ||
405 | unsigned int urb_remove_age; /* Age in frames */ | ||
406 | |||
407 | /* List of URBs awaiting completion callback */ | 422 | /* List of URBs awaiting completion callback */ |
408 | struct list_head complete_list; | 423 | struct list_head complete_list; |
409 | 424 | ||
425 | struct list_head idle_qh_list; /* Where the idle QHs live */ | ||
426 | |||
410 | int rh_numports; /* Number of root-hub ports */ | 427 | int rh_numports; /* Number of root-hub ports */ |
411 | 428 | ||
412 | wait_queue_head_t waitqh; /* endpoint_disable waiters */ | 429 | wait_queue_head_t waitqh; /* endpoint_disable waiters */ |
430 | int num_waiting; /* Number of waiters */ | ||
413 | }; | 431 | }; |
414 | 432 | ||
415 | /* Convert between a usb_hcd pointer and the corresponding uhci_hcd */ | 433 | /* Convert between a usb_hcd pointer and the corresponding uhci_hcd */ |
@@ -430,22 +448,19 @@ static inline struct usb_hcd *uhci_to_hcd(struct uhci_hcd *uhci) | |||
430 | */ | 448 | */ |
431 | struct urb_priv { | 449 | struct urb_priv { |
432 | struct list_head urb_list; | 450 | struct list_head urb_list; |
451 | struct list_head node; /* Node in the QH's urbp list */ | ||
433 | 452 | ||
434 | struct urb *urb; | 453 | struct urb *urb; |
435 | 454 | ||
436 | struct uhci_qh *qh; /* QH for this URB */ | 455 | struct uhci_qh *qh; /* QH for this URB */ |
437 | struct list_head td_list; | 456 | struct list_head td_list; |
438 | 457 | ||
439 | unsigned fsbr : 1; /* URB turned on FSBR */ | ||
440 | unsigned fsbr_timeout : 1; /* URB timed out on FSBR */ | ||
441 | unsigned queued : 1; /* QH was queued (not linked in) */ | ||
442 | unsigned short_control_packet : 1; /* If we get a short packet during */ | ||
443 | /* a control transfer, retrigger */ | ||
444 | /* the status phase */ | ||
445 | |||
446 | unsigned long fsbrtime; /* In jiffies */ | 458 | unsigned long fsbrtime; /* In jiffies */ |
447 | 459 | ||
448 | struct list_head queue_list; | 460 | unsigned fsbr : 1; /* URB turned on FSBR */ |
461 | unsigned fsbr_timeout : 1; /* URB timed out on FSBR */ | ||
462 | unsigned short_transfer : 1; /* URB got a short transfer, no | ||
463 | * need to rescan */ | ||
449 | }; | 464 | }; |
450 | 465 | ||
451 | 466 | ||
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c index 782398045f9f..b1b551a3d14e 100644 --- a/drivers/usb/host/uhci-q.c +++ b/drivers/usb/host/uhci-q.c | |||
@@ -13,13 +13,9 @@ | |||
13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface | 13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface |
14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). | 14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). |
15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) | 15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) |
16 | * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu | 16 | * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu |
17 | */ | 17 | */ |
18 | 18 | ||
19 | static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb); | ||
20 | static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb); | ||
21 | static void uhci_remove_pending_urbps(struct uhci_hcd *uhci); | ||
22 | static void uhci_free_pending_qhs(struct uhci_hcd *uhci); | ||
23 | static void uhci_free_pending_tds(struct uhci_hcd *uhci); | 19 | static void uhci_free_pending_tds(struct uhci_hcd *uhci); |
24 | 20 | ||
25 | /* | 21 | /* |
@@ -30,7 +26,7 @@ static void uhci_free_pending_tds(struct uhci_hcd *uhci); | |||
30 | * games with the FSBR code to make sure we get the correct order in all | 26 | * games with the FSBR code to make sure we get the correct order in all |
31 | * the cases. I don't think it's worth the effort | 27 | * the cases. I don't think it's worth the effort |
32 | */ | 28 | */ |
33 | static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci) | 29 | static void uhci_set_next_interrupt(struct uhci_hcd *uhci) |
34 | { | 30 | { |
35 | if (uhci->is_stopped) | 31 | if (uhci->is_stopped) |
36 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); | 32 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); |
@@ -42,12 +38,6 @@ static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci) | |||
42 | uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC); | 38 | uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC); |
43 | } | 39 | } |
44 | 40 | ||
45 | static inline void uhci_moveto_complete(struct uhci_hcd *uhci, | ||
46 | struct urb_priv *urbp) | ||
47 | { | ||
48 | list_move_tail(&urbp->urb_list, &uhci->complete_list); | ||
49 | } | ||
50 | |||
51 | static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) | 41 | static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) |
52 | { | 42 | { |
53 | dma_addr_t dma_handle; | 43 | dma_addr_t dma_handle; |
@@ -71,6 +61,18 @@ static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci) | |||
71 | return td; | 61 | return td; |
72 | } | 62 | } |
73 | 63 | ||
64 | static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td) | ||
65 | { | ||
66 | if (!list_empty(&td->list)) | ||
67 | dev_warn(uhci_dev(uhci), "td %p still in list!\n", td); | ||
68 | if (!list_empty(&td->remove_list)) | ||
69 | dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td); | ||
70 | if (!list_empty(&td->fl_list)) | ||
71 | dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td); | ||
72 | |||
73 | dma_pool_free(uhci->td_pool, td, td->dma_handle); | ||
74 | } | ||
75 | |||
74 | static inline void uhci_fill_td(struct uhci_td *td, u32 status, | 76 | static inline void uhci_fill_td(struct uhci_td *td, u32 status, |
75 | u32 token, u32 buffer) | 77 | u32 token, u32 buffer) |
76 | { | 78 | { |
@@ -82,7 +84,8 @@ static inline void uhci_fill_td(struct uhci_td *td, u32 status, | |||
82 | /* | 84 | /* |
83 | * We insert Isochronous URBs directly into the frame list at the beginning | 85 | * We insert Isochronous URBs directly into the frame list at the beginning |
84 | */ | 86 | */ |
85 | static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum) | 87 | static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci, |
88 | struct uhci_td *td, unsigned framenum) | ||
86 | { | 89 | { |
87 | framenum &= (UHCI_NUMFRAMES - 1); | 90 | framenum &= (UHCI_NUMFRAMES - 1); |
88 | 91 | ||
@@ -108,7 +111,7 @@ static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, | |||
108 | } | 111 | } |
109 | } | 112 | } |
110 | 113 | ||
111 | static inline void uhci_remove_td_frame_list(struct uhci_hcd *uhci, | 114 | static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci, |
112 | struct uhci_td *td) | 115 | struct uhci_td *td) |
113 | { | 116 | { |
114 | /* If it's not inserted, don't remove it */ | 117 | /* If it's not inserted, don't remove it */ |
@@ -139,48 +142,68 @@ static inline void uhci_remove_td_frame_list(struct uhci_hcd *uhci, | |||
139 | td->frame = -1; | 142 | td->frame = -1; |
140 | } | 143 | } |
141 | 144 | ||
142 | static void unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb) | 145 | /* |
146 | * Remove all the TDs for an Isochronous URB from the frame list | ||
147 | */ | ||
148 | static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb) | ||
143 | { | 149 | { |
144 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | 150 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
145 | struct uhci_td *td; | 151 | struct uhci_td *td; |
146 | 152 | ||
147 | list_for_each_entry(td, &urbp->td_list, list) | 153 | list_for_each_entry(td, &urbp->td_list, list) |
148 | uhci_remove_td_frame_list(uhci, td); | 154 | uhci_remove_td_from_frame_list(uhci, td); |
149 | wmb(); | 155 | wmb(); |
150 | } | 156 | } |
151 | 157 | ||
152 | /* | 158 | /* |
153 | * Inserts a td list into qh. | 159 | * Remove an URB's TDs from the hardware schedule |
154 | */ | 160 | */ |
155 | static void uhci_insert_tds_in_qh(struct uhci_qh *qh, struct urb *urb, __le32 breadth) | 161 | static void uhci_remove_tds_from_schedule(struct uhci_hcd *uhci, |
162 | struct urb *urb, int status) | ||
156 | { | 163 | { |
157 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 164 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
158 | struct uhci_td *td; | ||
159 | __le32 *plink; | ||
160 | 165 | ||
161 | /* Ordering isn't important here yet since the QH hasn't been */ | 166 | /* Isochronous TDs get unlinked directly from the frame list */ |
162 | /* inserted into the schedule yet */ | 167 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { |
163 | plink = &qh->element; | 168 | uhci_unlink_isochronous_tds(uhci, urb); |
164 | list_for_each_entry(td, &urbp->td_list, list) { | 169 | return; |
165 | *plink = cpu_to_le32(td->dma_handle) | breadth; | ||
166 | plink = &td->link; | ||
167 | } | 170 | } |
168 | *plink = UHCI_PTR_TERM; | ||
169 | } | ||
170 | 171 | ||
171 | static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td) | 172 | /* If the URB isn't first on its queue, adjust the link pointer |
172 | { | 173 | * of the last TD in the previous URB. */ |
173 | if (!list_empty(&td->list)) | 174 | if (urbp->node.prev != &urbp->qh->queue) { |
174 | dev_warn(uhci_dev(uhci), "td %p still in list!\n", td); | 175 | struct urb_priv *purbp; |
175 | if (!list_empty(&td->remove_list)) | 176 | struct uhci_td *ptd, *ltd; |
176 | dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td); | 177 | |
177 | if (!list_empty(&td->fl_list)) | 178 | if (status == -EINPROGRESS) |
178 | dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td); | 179 | status = 0; |
180 | purbp = list_entry(urbp->node.prev, struct urb_priv, node); | ||
181 | ptd = list_entry(purbp->td_list.prev, struct uhci_td, | ||
182 | list); | ||
183 | ltd = list_entry(urbp->td_list.prev, struct uhci_td, | ||
184 | list); | ||
185 | ptd->link = ltd->link; | ||
186 | } | ||
179 | 187 | ||
180 | dma_pool_free(uhci->td_pool, td, td->dma_handle); | 188 | /* If the URB completed with an error, then the QH element certainly |
189 | * points to one of the URB's TDs. If it completed normally then | ||
190 | * the QH element has certainly moved on to the next URB. And if | ||
191 | * the URB is still in progress then it must have been dequeued. | ||
192 | * The QH element either hasn't reached it yet or is somewhere in | ||
193 | * the middle. If the URB wasn't first we can assume that it | ||
194 | * hasn't started yet (see above): Otherwise all the preceding URBs | ||
195 | * would have completed and been removed from the queue, so this one | ||
196 | * _would_ be first. | ||
197 | * | ||
198 | * If the QH element is inside this URB, clear it. It will be | ||
199 | * set properly when the QH is activated. | ||
200 | */ | ||
201 | if (status < 0) | ||
202 | urbp->qh->element = UHCI_PTR_TERM; | ||
181 | } | 203 | } |
182 | 204 | ||
183 | static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci) | 205 | static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, |
206 | struct usb_device *udev, struct usb_host_endpoint *hep) | ||
184 | { | 207 | { |
185 | dma_addr_t dma_handle; | 208 | dma_addr_t dma_handle; |
186 | struct uhci_qh *qh; | 209 | struct uhci_qh *qh; |
@@ -194,256 +217,120 @@ static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci) | |||
194 | qh->element = UHCI_PTR_TERM; | 217 | qh->element = UHCI_PTR_TERM; |
195 | qh->link = UHCI_PTR_TERM; | 218 | qh->link = UHCI_PTR_TERM; |
196 | 219 | ||
197 | qh->urbp = NULL; | 220 | INIT_LIST_HEAD(&qh->queue); |
221 | INIT_LIST_HEAD(&qh->node); | ||
198 | 222 | ||
199 | INIT_LIST_HEAD(&qh->list); | 223 | if (udev) { /* Normal QH */ |
200 | INIT_LIST_HEAD(&qh->remove_list); | 224 | qh->state = QH_STATE_IDLE; |
225 | qh->hep = hep; | ||
226 | qh->udev = udev; | ||
227 | hep->hcpriv = qh; | ||
228 | usb_get_dev(udev); | ||
201 | 229 | ||
230 | } else { /* Skeleton QH */ | ||
231 | qh->state = QH_STATE_ACTIVE; | ||
232 | qh->udev = NULL; | ||
233 | } | ||
202 | return qh; | 234 | return qh; |
203 | } | 235 | } |
204 | 236 | ||
205 | static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) | 237 | static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) |
206 | { | 238 | { |
207 | if (!list_empty(&qh->list)) | 239 | WARN_ON(qh->state != QH_STATE_IDLE && qh->udev); |
240 | if (!list_empty(&qh->queue)) | ||
208 | dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh); | 241 | dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh); |
209 | if (!list_empty(&qh->remove_list)) | ||
210 | dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh); | ||
211 | 242 | ||
243 | list_del(&qh->node); | ||
244 | if (qh->udev) { | ||
245 | qh->hep->hcpriv = NULL; | ||
246 | usb_put_dev(qh->udev); | ||
247 | } | ||
212 | dma_pool_free(uhci->qh_pool, qh, qh->dma_handle); | 248 | dma_pool_free(uhci->qh_pool, qh, qh->dma_handle); |
213 | } | 249 | } |
214 | 250 | ||
215 | /* | 251 | /* |
216 | * Append this urb's qh after the last qh in skelqh->list | 252 | * Put a QH on the schedule in both hardware and software |
217 | * | ||
218 | * Note that urb_priv.queue_list doesn't have a separate queue head; | ||
219 | * it's a ring with every element "live". | ||
220 | */ | 253 | */ |
221 | static void uhci_insert_qh(struct uhci_hcd *uhci, struct uhci_qh *skelqh, struct urb *urb) | 254 | static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) |
222 | { | 255 | { |
223 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 256 | struct uhci_qh *pqh; |
224 | struct urb_priv *turbp; | ||
225 | struct uhci_qh *lqh; | ||
226 | 257 | ||
227 | /* Grab the last QH */ | 258 | WARN_ON(list_empty(&qh->queue)); |
228 | lqh = list_entry(skelqh->list.prev, struct uhci_qh, list); | ||
229 | 259 | ||
230 | /* Point to the next skelqh */ | 260 | /* Set the element pointer if it isn't set already. |
231 | urbp->qh->link = lqh->link; | 261 | * This isn't needed for Isochronous queues, but it doesn't hurt. */ |
232 | wmb(); /* Ordering is important */ | 262 | if (qh_element(qh) == UHCI_PTR_TERM) { |
263 | struct urb_priv *urbp = list_entry(qh->queue.next, | ||
264 | struct urb_priv, node); | ||
265 | struct uhci_td *td = list_entry(urbp->td_list.next, | ||
266 | struct uhci_td, list); | ||
233 | 267 | ||
234 | /* | 268 | qh->element = cpu_to_le32(td->dma_handle); |
235 | * Patch QHs for previous endpoint's queued URBs? HC goes | ||
236 | * here next, not to the next skelqh it now points to. | ||
237 | * | ||
238 | * lqh --> td ... --> qh ... --> td --> qh ... --> td | ||
239 | * | | | | ||
240 | * v v v | ||
241 | * +<----------------+-----------------+ | ||
242 | * v | ||
243 | * newqh --> td ... --> td | ||
244 | * | | ||
245 | * v | ||
246 | * ... | ||
247 | * | ||
248 | * The HC could see (and use!) any of these as we write them. | ||
249 | */ | ||
250 | lqh->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH; | ||
251 | if (lqh->urbp) { | ||
252 | list_for_each_entry(turbp, &lqh->urbp->queue_list, queue_list) | ||
253 | turbp->qh->link = lqh->link; | ||
254 | } | 269 | } |
255 | 270 | ||
256 | list_add_tail(&urbp->qh->list, &skelqh->list); | 271 | if (qh->state == QH_STATE_ACTIVE) |
272 | return; | ||
273 | qh->state = QH_STATE_ACTIVE; | ||
274 | |||
275 | /* Move the QH from its old list to the end of the appropriate | ||
276 | * skeleton's list */ | ||
277 | list_move_tail(&qh->node, &qh->skel->node); | ||
278 | |||
279 | /* Link it into the schedule */ | ||
280 | pqh = list_entry(qh->node.prev, struct uhci_qh, node); | ||
281 | qh->link = pqh->link; | ||
282 | wmb(); | ||
283 | pqh->link = UHCI_PTR_QH | cpu_to_le32(qh->dma_handle); | ||
257 | } | 284 | } |
258 | 285 | ||
259 | /* | 286 | /* |
260 | * Start removal of QH from schedule; it finishes next frame. | 287 | * Take a QH off the hardware schedule |
261 | * TDs should be unlinked before this is called. | ||
262 | */ | 288 | */ |
263 | static void uhci_remove_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) | 289 | static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh) |
264 | { | 290 | { |
265 | struct uhci_qh *pqh; | 291 | struct uhci_qh *pqh; |
266 | __le32 newlink; | ||
267 | 292 | ||
268 | if (!qh) | 293 | if (qh->state == QH_STATE_UNLINKING) |
269 | return; | 294 | return; |
295 | WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev); | ||
296 | qh->state = QH_STATE_UNLINKING; | ||
270 | 297 | ||
271 | /* | 298 | /* Unlink the QH from the schedule and record when we did it */ |
272 | * Only go through the hoops if it's actually linked in | 299 | pqh = list_entry(qh->node.prev, struct uhci_qh, node); |
273 | */ | 300 | pqh->link = qh->link; |
274 | if (!list_empty(&qh->list)) { | 301 | mb(); |
275 | |||
276 | /* If our queue is nonempty, make the next URB the head */ | ||
277 | if (!list_empty(&qh->urbp->queue_list)) { | ||
278 | struct urb_priv *nurbp; | ||
279 | |||
280 | nurbp = list_entry(qh->urbp->queue_list.next, | ||
281 | struct urb_priv, queue_list); | ||
282 | nurbp->queued = 0; | ||
283 | list_add(&nurbp->qh->list, &qh->list); | ||
284 | newlink = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH; | ||
285 | } else | ||
286 | newlink = qh->link; | ||
287 | |||
288 | /* Fix up the previous QH's queue to link to either | ||
289 | * the new head of this queue or the start of the | ||
290 | * next endpoint's queue. */ | ||
291 | pqh = list_entry(qh->list.prev, struct uhci_qh, list); | ||
292 | pqh->link = newlink; | ||
293 | if (pqh->urbp) { | ||
294 | struct urb_priv *turbp; | ||
295 | |||
296 | list_for_each_entry(turbp, &pqh->urbp->queue_list, | ||
297 | queue_list) | ||
298 | turbp->qh->link = newlink; | ||
299 | } | ||
300 | wmb(); | ||
301 | |||
302 | /* Leave qh->link in case the HC is on the QH now, it will */ | ||
303 | /* continue the rest of the schedule */ | ||
304 | qh->element = UHCI_PTR_TERM; | ||
305 | |||
306 | list_del_init(&qh->list); | ||
307 | } | ||
308 | |||
309 | list_del_init(&qh->urbp->queue_list); | ||
310 | qh->urbp = NULL; | ||
311 | 302 | ||
312 | uhci_get_current_frame_number(uhci); | 303 | uhci_get_current_frame_number(uhci); |
313 | if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) { | 304 | qh->unlink_frame = uhci->frame_number; |
314 | uhci_free_pending_qhs(uhci); | ||
315 | uhci->qh_remove_age = uhci->frame_number; | ||
316 | } | ||
317 | 305 | ||
318 | /* Check to see if the remove list is empty. Set the IOC bit */ | 306 | /* Force an interrupt so we know when the QH is fully unlinked */ |
319 | /* to force an interrupt so we can remove the QH */ | 307 | if (list_empty(&uhci->skel_unlink_qh->node)) |
320 | if (list_empty(&uhci->qh_remove_list)) | ||
321 | uhci_set_next_interrupt(uhci); | 308 | uhci_set_next_interrupt(uhci); |
322 | 309 | ||
323 | list_add(&qh->remove_list, &uhci->qh_remove_list); | 310 | /* Move the QH from its old list to the end of the unlinking list */ |
311 | list_move_tail(&qh->node, &uhci->skel_unlink_qh->node); | ||
324 | } | 312 | } |
325 | 313 | ||
326 | static int uhci_fixup_toggle(struct urb *urb, unsigned int toggle) | 314 | /* |
327 | { | 315 | * When we and the controller are through with a QH, it becomes IDLE. |
328 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 316 | * This happens when a QH has been off the schedule (on the unlinking |
329 | struct uhci_td *td; | 317 | * list) for more than one frame, or when an error occurs while adding |
330 | 318 | * the first URB onto a new QH. | |
331 | list_for_each_entry(td, &urbp->td_list, list) { | 319 | */ |
332 | if (toggle) | 320 | static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh) |
333 | td->token |= cpu_to_le32(TD_TOKEN_TOGGLE); | ||
334 | else | ||
335 | td->token &= ~cpu_to_le32(TD_TOKEN_TOGGLE); | ||
336 | |||
337 | toggle ^= 1; | ||
338 | } | ||
339 | |||
340 | return toggle; | ||
341 | } | ||
342 | |||
343 | /* This function will append one URB's QH to another URB's QH. This is for */ | ||
344 | /* queuing interrupt, control or bulk transfers */ | ||
345 | static void uhci_append_queued_urb(struct uhci_hcd *uhci, struct urb *eurb, struct urb *urb) | ||
346 | { | ||
347 | struct urb_priv *eurbp, *urbp, *furbp, *lurbp; | ||
348 | struct uhci_td *lltd; | ||
349 | |||
350 | eurbp = eurb->hcpriv; | ||
351 | urbp = urb->hcpriv; | ||
352 | |||
353 | /* Find the first URB in the queue */ | ||
354 | furbp = eurbp; | ||
355 | if (eurbp->queued) { | ||
356 | list_for_each_entry(furbp, &eurbp->queue_list, queue_list) | ||
357 | if (!furbp->queued) | ||
358 | break; | ||
359 | } | ||
360 | |||
361 | lurbp = list_entry(furbp->queue_list.prev, struct urb_priv, queue_list); | ||
362 | |||
363 | lltd = list_entry(lurbp->td_list.prev, struct uhci_td, list); | ||
364 | |||
365 | /* Control transfers always start with toggle 0 */ | ||
366 | if (!usb_pipecontrol(urb->pipe)) | ||
367 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), | ||
368 | usb_pipeout(urb->pipe), | ||
369 | uhci_fixup_toggle(urb, | ||
370 | uhci_toggle(td_token(lltd)) ^ 1)); | ||
371 | |||
372 | /* All qhs in the queue need to link to the next queue */ | ||
373 | urbp->qh->link = eurbp->qh->link; | ||
374 | |||
375 | wmb(); /* Make sure we flush everything */ | ||
376 | |||
377 | lltd->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH; | ||
378 | |||
379 | list_add_tail(&urbp->queue_list, &furbp->queue_list); | ||
380 | |||
381 | urbp->queued = 1; | ||
382 | } | ||
383 | |||
384 | static void uhci_delete_queued_urb(struct uhci_hcd *uhci, struct urb *urb) | ||
385 | { | 321 | { |
386 | struct urb_priv *urbp, *nurbp, *purbp, *turbp; | 322 | WARN_ON(qh->state == QH_STATE_ACTIVE); |
387 | struct uhci_td *pltd; | ||
388 | unsigned int toggle; | ||
389 | |||
390 | urbp = urb->hcpriv; | ||
391 | |||
392 | if (list_empty(&urbp->queue_list)) | ||
393 | return; | ||
394 | |||
395 | nurbp = list_entry(urbp->queue_list.next, struct urb_priv, queue_list); | ||
396 | |||
397 | /* | ||
398 | * Fix up the toggle for the following URBs in the queue. | ||
399 | * Only needed for bulk and interrupt: control and isochronous | ||
400 | * endpoints don't propagate toggles between messages. | ||
401 | */ | ||
402 | if (usb_pipebulk(urb->pipe) || usb_pipeint(urb->pipe)) { | ||
403 | if (!urbp->queued) | ||
404 | /* We just set the toggle in uhci_unlink_generic */ | ||
405 | toggle = usb_gettoggle(urb->dev, | ||
406 | usb_pipeendpoint(urb->pipe), | ||
407 | usb_pipeout(urb->pipe)); | ||
408 | else { | ||
409 | /* If we're in the middle of the queue, grab the */ | ||
410 | /* toggle from the TD previous to us */ | ||
411 | purbp = list_entry(urbp->queue_list.prev, | ||
412 | struct urb_priv, queue_list); | ||
413 | pltd = list_entry(purbp->td_list.prev, | ||
414 | struct uhci_td, list); | ||
415 | toggle = uhci_toggle(td_token(pltd)) ^ 1; | ||
416 | } | ||
417 | |||
418 | list_for_each_entry(turbp, &urbp->queue_list, queue_list) { | ||
419 | if (!turbp->queued) | ||
420 | break; | ||
421 | toggle = uhci_fixup_toggle(turbp->urb, toggle); | ||
422 | } | ||
423 | 323 | ||
424 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 324 | list_move(&qh->node, &uhci->idle_qh_list); |
425 | usb_pipeout(urb->pipe), toggle); | 325 | qh->state = QH_STATE_IDLE; |
426 | } | ||
427 | |||
428 | if (urbp->queued) { | ||
429 | /* We're somewhere in the middle (or end). The case where | ||
430 | * we're at the head is handled in uhci_remove_qh(). */ | ||
431 | purbp = list_entry(urbp->queue_list.prev, struct urb_priv, | ||
432 | queue_list); | ||
433 | |||
434 | pltd = list_entry(purbp->td_list.prev, struct uhci_td, list); | ||
435 | if (nurbp->queued) | ||
436 | pltd->link = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH; | ||
437 | else | ||
438 | /* The next URB happens to be the beginning, so */ | ||
439 | /* we're the last, end the chain */ | ||
440 | pltd->link = UHCI_PTR_TERM; | ||
441 | } | ||
442 | 326 | ||
443 | /* urbp->queue_list is handled in uhci_remove_qh() */ | 327 | /* If anyone is waiting for a QH to become idle, wake them up */ |
328 | if (uhci->num_waiting) | ||
329 | wake_up_all(&uhci->waitqh); | ||
444 | } | 330 | } |
445 | 331 | ||
446 | static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | 332 | static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, |
333 | struct urb *urb) | ||
447 | { | 334 | { |
448 | struct urb_priv *urbp; | 335 | struct urb_priv *urbp; |
449 | 336 | ||
@@ -453,17 +340,14 @@ static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *u | |||
453 | 340 | ||
454 | memset((void *)urbp, 0, sizeof(*urbp)); | 341 | memset((void *)urbp, 0, sizeof(*urbp)); |
455 | 342 | ||
456 | urbp->fsbrtime = jiffies; | ||
457 | urbp->urb = urb; | 343 | urbp->urb = urb; |
344 | urb->hcpriv = urbp; | ||
345 | urbp->fsbrtime = jiffies; | ||
458 | 346 | ||
347 | INIT_LIST_HEAD(&urbp->node); | ||
459 | INIT_LIST_HEAD(&urbp->td_list); | 348 | INIT_LIST_HEAD(&urbp->td_list); |
460 | INIT_LIST_HEAD(&urbp->queue_list); | ||
461 | INIT_LIST_HEAD(&urbp->urb_list); | 349 | INIT_LIST_HEAD(&urbp->urb_list); |
462 | 350 | ||
463 | list_add_tail(&urbp->urb_list, &uhci->urb_list); | ||
464 | |||
465 | urb->hcpriv = urbp; | ||
466 | |||
467 | return urbp; | 351 | return urbp; |
468 | } | 352 | } |
469 | 353 | ||
@@ -482,18 +366,17 @@ static void uhci_remove_td_from_urb(struct uhci_td *td) | |||
482 | list_del_init(&td->list); | 366 | list_del_init(&td->list); |
483 | } | 367 | } |
484 | 368 | ||
485 | static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | 369 | static void uhci_free_urb_priv(struct uhci_hcd *uhci, |
370 | struct urb_priv *urbp) | ||
486 | { | 371 | { |
487 | struct uhci_td *td, *tmp; | 372 | struct uhci_td *td, *tmp; |
488 | struct urb_priv *urbp; | ||
489 | |||
490 | urbp = (struct urb_priv *)urb->hcpriv; | ||
491 | if (!urbp) | ||
492 | return; | ||
493 | 373 | ||
494 | if (!list_empty(&urbp->urb_list)) | 374 | if (!list_empty(&urbp->urb_list)) |
495 | dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list " | 375 | dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list!\n", |
496 | "or uhci->remove_list!\n", urb); | 376 | urbp->urb); |
377 | if (!list_empty(&urbp->node)) | ||
378 | dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n", | ||
379 | urbp->urb); | ||
497 | 380 | ||
498 | uhci_get_current_frame_number(uhci); | 381 | uhci_get_current_frame_number(uhci); |
499 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) { | 382 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) { |
@@ -502,7 +385,7 @@ static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | |||
502 | } | 385 | } |
503 | 386 | ||
504 | /* Check to see if the remove list is empty. Set the IOC bit */ | 387 | /* Check to see if the remove list is empty. Set the IOC bit */ |
505 | /* to force an interrupt so we can remove the TDs*/ | 388 | /* to force an interrupt so we can remove the TDs. */ |
506 | if (list_empty(&uhci->td_remove_list)) | 389 | if (list_empty(&uhci->td_remove_list)) |
507 | uhci_set_next_interrupt(uhci); | 390 | uhci_set_next_interrupt(uhci); |
508 | 391 | ||
@@ -511,7 +394,7 @@ static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) | |||
511 | list_add(&td->remove_list, &uhci->td_remove_list); | 394 | list_add(&td->remove_list, &uhci->td_remove_list); |
512 | } | 395 | } |
513 | 396 | ||
514 | urb->hcpriv = NULL; | 397 | urbp->urb->hcpriv = NULL; |
515 | kmem_cache_free(uhci_up_cachep, urbp); | 398 | kmem_cache_free(uhci_up_cachep, urbp); |
516 | } | 399 | } |
517 | 400 | ||
@@ -568,17 +451,82 @@ static int uhci_map_status(int status, int dir_out) | |||
568 | } | 451 | } |
569 | 452 | ||
570 | /* | 453 | /* |
454 | * Fix up the data toggles for URBs in a queue, when one of them | ||
455 | * terminates early (short transfer, error, or dequeued). | ||
456 | */ | ||
457 | static void uhci_fixup_toggles(struct urb *urb) | ||
458 | { | ||
459 | struct list_head *head; | ||
460 | struct uhci_td *td; | ||
461 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | ||
462 | int prevactive = 0; | ||
463 | unsigned int toggle = 0; | ||
464 | struct urb_priv *turbp, *list_end; | ||
465 | |||
466 | /* | ||
467 | * We need to find out what the last successful toggle was so | ||
468 | * we can update the data toggles for the following transfers. | ||
469 | * | ||
470 | * There are 2 ways the last successful completed TD is found: | ||
471 | * | ||
472 | * 1) The TD is NOT active and the actual length < expected length | ||
473 | * 2) The TD is NOT active and it's the last TD in the chain | ||
474 | * | ||
475 | * and a third way the first uncompleted TD is found: | ||
476 | * | ||
477 | * 3) The TD is active and the previous TD is NOT active | ||
478 | */ | ||
479 | head = &urbp->td_list; | ||
480 | list_for_each_entry(td, head, list) { | ||
481 | unsigned int ctrlstat = td_status(td); | ||
482 | |||
483 | if (!(ctrlstat & TD_CTRL_ACTIVE) && | ||
484 | (uhci_actual_length(ctrlstat) < | ||
485 | uhci_expected_length(td_token(td)) || | ||
486 | td->list.next == head)) | ||
487 | toggle = uhci_toggle(td_token(td)) ^ 1; | ||
488 | else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive) | ||
489 | toggle = uhci_toggle(td_token(td)); | ||
490 | |||
491 | prevactive = ctrlstat & TD_CTRL_ACTIVE; | ||
492 | } | ||
493 | |||
494 | /* | ||
495 | * Fix up the toggle for the following URBs in the queue. | ||
496 | * | ||
497 | * We can stop as soon as we find an URB with toggles set correctly, | ||
498 | * because then all the following URBs will be correct also. | ||
499 | */ | ||
500 | list_end = list_entry(&urbp->qh->queue, struct urb_priv, node); | ||
501 | turbp = urbp; | ||
502 | while ((turbp = list_entry(turbp->node.next, struct urb_priv, node)) | ||
503 | != list_end) { | ||
504 | td = list_entry(turbp->td_list.next, struct uhci_td, list); | ||
505 | if (uhci_toggle(td_token(td)) == toggle) | ||
506 | return; | ||
507 | |||
508 | list_for_each_entry(td, &turbp->td_list, list) { | ||
509 | td->token ^= __constant_cpu_to_le32(TD_TOKEN_TOGGLE); | ||
510 | toggle ^= 1; | ||
511 | } | ||
512 | } | ||
513 | |||
514 | usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), | ||
515 | usb_pipeout(urb->pipe), toggle); | ||
516 | } | ||
517 | |||
518 | /* | ||
571 | * Control transfers | 519 | * Control transfers |
572 | */ | 520 | */ |
573 | static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb) | 521 | static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, |
522 | struct uhci_qh *qh) | ||
574 | { | 523 | { |
575 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
576 | struct uhci_td *td; | 524 | struct uhci_td *td; |
577 | struct uhci_qh *qh, *skelqh; | ||
578 | unsigned long destination, status; | 525 | unsigned long destination, status; |
579 | int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); | 526 | int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize); |
580 | int len = urb->transfer_buffer_length; | 527 | int len = urb->transfer_buffer_length; |
581 | dma_addr_t data = urb->transfer_dma; | 528 | dma_addr_t data = urb->transfer_dma; |
529 | __le32 *plink; | ||
582 | 530 | ||
583 | /* The "pipe" thing contains the destination in bits 8--18 */ | 531 | /* The "pipe" thing contains the destination in bits 8--18 */ |
584 | destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; | 532 | destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP; |
@@ -597,7 +545,8 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
597 | 545 | ||
598 | uhci_add_td_to_urb(urb, td); | 546 | uhci_add_td_to_urb(urb, td); |
599 | uhci_fill_td(td, status, destination | uhci_explen(8), | 547 | uhci_fill_td(td, status, destination | uhci_explen(8), |
600 | urb->setup_dma); | 548 | urb->setup_dma); |
549 | plink = &td->link; | ||
601 | 550 | ||
602 | /* | 551 | /* |
603 | * If direction is "send", change the packet ID from SETUP (0x2D) | 552 | * If direction is "send", change the packet ID from SETUP (0x2D) |
@@ -615,21 +564,20 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
615 | * Build the DATA TDs | 564 | * Build the DATA TDs |
616 | */ | 565 | */ |
617 | while (len > 0) { | 566 | while (len > 0) { |
618 | int pktsze = len; | 567 | int pktsze = min(len, maxsze); |
619 | |||
620 | if (pktsze > maxsze) | ||
621 | pktsze = maxsze; | ||
622 | 568 | ||
623 | td = uhci_alloc_td(uhci); | 569 | td = uhci_alloc_td(uhci); |
624 | if (!td) | 570 | if (!td) |
625 | return -ENOMEM; | 571 | return -ENOMEM; |
572 | *plink = cpu_to_le32(td->dma_handle); | ||
626 | 573 | ||
627 | /* Alternate Data0/1 (start with Data1) */ | 574 | /* Alternate Data0/1 (start with Data1) */ |
628 | destination ^= TD_TOKEN_TOGGLE; | 575 | destination ^= TD_TOKEN_TOGGLE; |
629 | 576 | ||
630 | uhci_add_td_to_urb(urb, td); | 577 | uhci_add_td_to_urb(urb, td); |
631 | uhci_fill_td(td, status, destination | uhci_explen(pktsze), | 578 | uhci_fill_td(td, status, destination | uhci_explen(pktsze), |
632 | data); | 579 | data); |
580 | plink = &td->link; | ||
633 | 581 | ||
634 | data += pktsze; | 582 | data += pktsze; |
635 | len -= pktsze; | 583 | len -= pktsze; |
@@ -641,6 +589,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
641 | td = uhci_alloc_td(uhci); | 589 | td = uhci_alloc_td(uhci); |
642 | if (!td) | 590 | if (!td) |
643 | return -ENOMEM; | 591 | return -ENOMEM; |
592 | *plink = cpu_to_le32(td->dma_handle); | ||
644 | 593 | ||
645 | /* | 594 | /* |
646 | * It's IN if the pipe is an output pipe or we're not expecting | 595 | * It's IN if the pipe is an output pipe or we're not expecting |
@@ -658,16 +607,7 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
658 | 607 | ||
659 | uhci_add_td_to_urb(urb, td); | 608 | uhci_add_td_to_urb(urb, td); |
660 | uhci_fill_td(td, status | TD_CTRL_IOC, | 609 | uhci_fill_td(td, status | TD_CTRL_IOC, |
661 | destination | uhci_explen(0), 0); | 610 | destination | uhci_explen(0), 0); |
662 | |||
663 | qh = uhci_alloc_qh(uhci); | ||
664 | if (!qh) | ||
665 | return -ENOMEM; | ||
666 | |||
667 | urbp->qh = qh; | ||
668 | qh->urbp = urbp; | ||
669 | |||
670 | uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH); | ||
671 | 611 | ||
672 | /* Low-speed transfers get a different queue, and won't hog the bus. | 612 | /* Low-speed transfers get a different queue, and won't hog the bus. |
673 | * Also, some devices enumerate better without FSBR; the easiest way | 613 | * Also, some devices enumerate better without FSBR; the easiest way |
@@ -675,18 +615,13 @@ static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct ur | |||
675 | * isn't in the CONFIGURED state. */ | 615 | * isn't in the CONFIGURED state. */ |
676 | if (urb->dev->speed == USB_SPEED_LOW || | 616 | if (urb->dev->speed == USB_SPEED_LOW || |
677 | urb->dev->state != USB_STATE_CONFIGURED) | 617 | urb->dev->state != USB_STATE_CONFIGURED) |
678 | skelqh = uhci->skel_ls_control_qh; | 618 | qh->skel = uhci->skel_ls_control_qh; |
679 | else { | 619 | else { |
680 | skelqh = uhci->skel_fs_control_qh; | 620 | qh->skel = uhci->skel_fs_control_qh; |
681 | uhci_inc_fsbr(uhci, urb); | 621 | uhci_inc_fsbr(uhci, urb); |
682 | } | 622 | } |
683 | 623 | ||
684 | if (eurb) | 624 | return 0; |
685 | uhci_append_queued_urb(uhci, eurb, urb); | ||
686 | else | ||
687 | uhci_insert_qh(uhci, skelqh, urb); | ||
688 | |||
689 | return -EINPROGRESS; | ||
690 | } | 625 | } |
691 | 626 | ||
692 | /* | 627 | /* |
@@ -703,7 +638,7 @@ static int usb_control_retrigger_status(struct uhci_hcd *uhci, struct urb *urb) | |||
703 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | 638 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; |
704 | struct uhci_td *td; | 639 | struct uhci_td *td; |
705 | 640 | ||
706 | urbp->short_control_packet = 1; | 641 | urbp->short_transfer = 1; |
707 | 642 | ||
708 | td = list_entry(urbp->td_list.prev, struct uhci_td, list); | 643 | td = list_entry(urbp->td_list.prev, struct uhci_td, list); |
709 | urbp->qh->element = cpu_to_le32(td->dma_handle); | 644 | urbp->qh->element = cpu_to_le32(td->dma_handle); |
@@ -720,16 +655,14 @@ static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb) | |||
720 | unsigned int status; | 655 | unsigned int status; |
721 | int ret = 0; | 656 | int ret = 0; |
722 | 657 | ||
723 | if (list_empty(&urbp->td_list)) | ||
724 | return -EINVAL; | ||
725 | |||
726 | head = &urbp->td_list; | 658 | head = &urbp->td_list; |
727 | 659 | if (urbp->short_transfer) { | |
728 | if (urbp->short_control_packet) { | ||
729 | tmp = head->prev; | 660 | tmp = head->prev; |
730 | goto status_stage; | 661 | goto status_stage; |
731 | } | 662 | } |
732 | 663 | ||
664 | urb->actual_length = 0; | ||
665 | |||
733 | tmp = head->next; | 666 | tmp = head->next; |
734 | td = list_entry(tmp, struct uhci_td, list); | 667 | td = list_entry(tmp, struct uhci_td, list); |
735 | 668 | ||
@@ -742,8 +675,6 @@ static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb) | |||
742 | if (status) | 675 | if (status) |
743 | goto td_error; | 676 | goto td_error; |
744 | 677 | ||
745 | urb->actual_length = 0; | ||
746 | |||
747 | /* The rest of the TDs (but the last) are data */ | 678 | /* The rest of the TDs (but the last) are data */ |
748 | tmp = tmp->next; | 679 | tmp = tmp->next; |
749 | while (tmp != head && tmp->next != head) { | 680 | while (tmp != head && tmp->next != head) { |
@@ -770,10 +701,7 @@ static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb) | |||
770 | goto err; | 701 | goto err; |
771 | } | 702 | } |
772 | 703 | ||
773 | if (uhci_packetid(td_token(td)) == USB_PID_IN) | 704 | return usb_control_retrigger_status(uhci, urb); |
774 | return usb_control_retrigger_status(uhci, urb); | ||
775 | else | ||
776 | return 0; | ||
777 | } | 705 | } |
778 | } | 706 | } |
779 | 707 | ||
@@ -825,15 +753,15 @@ err: | |||
825 | /* | 753 | /* |
826 | * Common submit for bulk and interrupt | 754 | * Common submit for bulk and interrupt |
827 | */ | 755 | */ |
828 | static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb, struct uhci_qh *skelqh) | 756 | static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, |
757 | struct uhci_qh *qh) | ||
829 | { | 758 | { |
830 | struct uhci_td *td; | 759 | struct uhci_td *td; |
831 | struct uhci_qh *qh; | ||
832 | unsigned long destination, status; | 760 | unsigned long destination, status; |
833 | int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); | 761 | int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize); |
834 | int len = urb->transfer_buffer_length; | 762 | int len = urb->transfer_buffer_length; |
835 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
836 | dma_addr_t data = urb->transfer_dma; | 763 | dma_addr_t data = urb->transfer_dma; |
764 | __le32 *plink, fake_link; | ||
837 | 765 | ||
838 | if (len < 0) | 766 | if (len < 0) |
839 | return -EINVAL; | 767 | return -EINVAL; |
@@ -841,7 +769,8 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
841 | /* The "pipe" thing contains the destination in bits 8--18 */ | 769 | /* The "pipe" thing contains the destination in bits 8--18 */ |
842 | destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); | 770 | destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); |
843 | 771 | ||
844 | status = uhci_maxerr(3) | TD_CTRL_ACTIVE; | 772 | /* 3 errors */ |
773 | status = TD_CTRL_ACTIVE | uhci_maxerr(3); | ||
845 | if (urb->dev->speed == USB_SPEED_LOW) | 774 | if (urb->dev->speed == USB_SPEED_LOW) |
846 | status |= TD_CTRL_LS; | 775 | status |= TD_CTRL_LS; |
847 | if (usb_pipein(urb->pipe)) | 776 | if (usb_pipein(urb->pipe)) |
@@ -850,10 +779,11 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
850 | /* | 779 | /* |
851 | * Build the DATA TDs | 780 | * Build the DATA TDs |
852 | */ | 781 | */ |
782 | plink = &fake_link; | ||
853 | do { /* Allow zero length packets */ | 783 | do { /* Allow zero length packets */ |
854 | int pktsze = maxsze; | 784 | int pktsze = maxsze; |
855 | 785 | ||
856 | if (pktsze >= len) { | 786 | if (len <= pktsze) { /* The last packet */ |
857 | pktsze = len; | 787 | pktsze = len; |
858 | if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) | 788 | if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) |
859 | status &= ~TD_CTRL_SPD; | 789 | status &= ~TD_CTRL_SPD; |
@@ -862,12 +792,15 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
862 | td = uhci_alloc_td(uhci); | 792 | td = uhci_alloc_td(uhci); |
863 | if (!td) | 793 | if (!td) |
864 | return -ENOMEM; | 794 | return -ENOMEM; |
795 | *plink = cpu_to_le32(td->dma_handle); | ||
865 | 796 | ||
866 | uhci_add_td_to_urb(urb, td); | 797 | uhci_add_td_to_urb(urb, td); |
867 | uhci_fill_td(td, status, destination | uhci_explen(pktsze) | | 798 | uhci_fill_td(td, status, |
799 | destination | uhci_explen(pktsze) | | ||
868 | (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), | 800 | (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), |
869 | usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT), | 801 | usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT), |
870 | data); | 802 | data); |
803 | plink = &td->link; | ||
871 | 804 | ||
872 | data += pktsze; | 805 | data += pktsze; |
873 | len -= maxsze; | 806 | len -= maxsze; |
@@ -883,11 +816,13 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
883 | * however, if transfer_length == 0, the zero packet was already | 816 | * however, if transfer_length == 0, the zero packet was already |
884 | * prepared above. | 817 | * prepared above. |
885 | */ | 818 | */ |
886 | if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) && | 819 | if ((urb->transfer_flags & URB_ZERO_PACKET) && |
887 | !len && urb->transfer_buffer_length) { | 820 | usb_pipeout(urb->pipe) && len == 0 && |
821 | urb->transfer_buffer_length > 0) { | ||
888 | td = uhci_alloc_td(uhci); | 822 | td = uhci_alloc_td(uhci); |
889 | if (!td) | 823 | if (!td) |
890 | return -ENOMEM; | 824 | return -ENOMEM; |
825 | *plink = cpu_to_le32(td->dma_handle); | ||
891 | 826 | ||
892 | uhci_add_td_to_urb(urb, td); | 827 | uhci_add_td_to_urb(urb, td); |
893 | uhci_fill_td(td, status, destination | uhci_explen(0) | | 828 | uhci_fill_td(td, status, destination | uhci_explen(0) | |
@@ -905,24 +840,9 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb | |||
905 | * fast side but not enough to justify delaying an interrupt | 840 | * fast side but not enough to justify delaying an interrupt |
906 | * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT | 841 | * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT |
907 | * flag setting. */ | 842 | * flag setting. */ |
908 | td->status |= cpu_to_le32(TD_CTRL_IOC); | 843 | td->status |= __constant_cpu_to_le32(TD_CTRL_IOC); |
909 | |||
910 | qh = uhci_alloc_qh(uhci); | ||
911 | if (!qh) | ||
912 | return -ENOMEM; | ||
913 | |||
914 | urbp->qh = qh; | ||
915 | qh->urbp = urbp; | ||
916 | 844 | ||
917 | /* Always breadth first */ | 845 | return 0; |
918 | uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH); | ||
919 | |||
920 | if (eurb) | ||
921 | uhci_append_queued_urb(uhci, eurb, urb); | ||
922 | else | ||
923 | uhci_insert_qh(uhci, skelqh, urb); | ||
924 | |||
925 | return -EINPROGRESS; | ||
926 | } | 846 | } |
927 | 847 | ||
928 | /* | 848 | /* |
@@ -954,8 +874,24 @@ static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb) | |||
954 | if (urb->transfer_flags & URB_SHORT_NOT_OK) { | 874 | if (urb->transfer_flags & URB_SHORT_NOT_OK) { |
955 | ret = -EREMOTEIO; | 875 | ret = -EREMOTEIO; |
956 | goto err; | 876 | goto err; |
957 | } else | 877 | } |
958 | return 0; | 878 | |
879 | /* | ||
880 | * This URB stopped short of its end. We have to | ||
881 | * fix up the toggles of the following URBs on the | ||
882 | * queue and restart the queue. | ||
883 | * | ||
884 | * Do this only the first time we encounter the | ||
885 | * short URB. | ||
886 | */ | ||
887 | if (!urbp->short_transfer) { | ||
888 | urbp->short_transfer = 1; | ||
889 | uhci_fixup_toggles(urb); | ||
890 | td = list_entry(urbp->td_list.prev, | ||
891 | struct uhci_td, list); | ||
892 | urbp->qh->element = td->link; | ||
893 | } | ||
894 | break; | ||
959 | } | 895 | } |
960 | } | 896 | } |
961 | 897 | ||
@@ -988,7 +924,8 @@ err: | |||
988 | return ret; | 924 | return ret; |
989 | } | 925 | } |
990 | 926 | ||
991 | static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb) | 927 | static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, |
928 | struct uhci_qh *qh) | ||
992 | { | 929 | { |
993 | int ret; | 930 | int ret; |
994 | 931 | ||
@@ -996,21 +933,22 @@ static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struc | |||
996 | if (urb->dev->speed == USB_SPEED_LOW) | 933 | if (urb->dev->speed == USB_SPEED_LOW) |
997 | return -EINVAL; | 934 | return -EINVAL; |
998 | 935 | ||
999 | ret = uhci_submit_common(uhci, urb, eurb, uhci->skel_bulk_qh); | 936 | qh->skel = uhci->skel_bulk_qh; |
1000 | if (ret == -EINPROGRESS) | 937 | ret = uhci_submit_common(uhci, urb, qh); |
938 | if (ret == 0) | ||
1001 | uhci_inc_fsbr(uhci, urb); | 939 | uhci_inc_fsbr(uhci, urb); |
1002 | |||
1003 | return ret; | 940 | return ret; |
1004 | } | 941 | } |
1005 | 942 | ||
1006 | static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb) | 943 | static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, |
944 | struct uhci_qh *qh) | ||
1007 | { | 945 | { |
1008 | /* USB 1.1 interrupt transfers only involve one packet per interval; | 946 | /* USB 1.1 interrupt transfers only involve one packet per interval. |
1009 | * that's the uhci_submit_common() "breadth first" policy. Drivers | 947 | * Drivers can submit URBs of any length, but longer ones will need |
1010 | * can submit urbs of any length, but longer ones might need many | 948 | * multiple intervals to complete. |
1011 | * intervals to complete. | ||
1012 | */ | 949 | */ |
1013 | return uhci_submit_common(uhci, urb, eurb, uhci->skelqh[__interval_to_skel(urb->interval)]); | 950 | qh->skel = uhci->skelqh[__interval_to_skel(urb->interval)]; |
951 | return uhci_submit_common(uhci, urb, qh); | ||
1014 | } | 952 | } |
1015 | 953 | ||
1016 | /* | 954 | /* |
@@ -1072,11 +1010,12 @@ static int isochronous_find_start(struct uhci_hcd *uhci, struct urb *urb) | |||
1072 | /* | 1010 | /* |
1073 | * Isochronous transfers | 1011 | * Isochronous transfers |
1074 | */ | 1012 | */ |
1075 | static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb) | 1013 | static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb, |
1014 | struct uhci_qh *qh) | ||
1076 | { | 1015 | { |
1077 | struct uhci_td *td; | 1016 | struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */ |
1078 | int i, ret, frame; | 1017 | int i, ret, frame; |
1079 | int status, destination; | 1018 | unsigned long destination, status; |
1080 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | 1019 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; |
1081 | 1020 | ||
1082 | status = TD_CTRL_ACTIVE | TD_CTRL_IOS; | 1021 | status = TD_CTRL_ACTIVE | TD_CTRL_IOS; |
@@ -1092,20 +1031,25 @@ static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb) | |||
1092 | return -ENOMEM; | 1031 | return -ENOMEM; |
1093 | 1032 | ||
1094 | uhci_add_td_to_urb(urb, td); | 1033 | uhci_add_td_to_urb(urb, td); |
1095 | uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length), | 1034 | uhci_fill_td(td, status, destination | |
1096 | urb->transfer_dma + urb->iso_frame_desc[i].offset); | 1035 | uhci_explen(urb->iso_frame_desc[i].length), |
1097 | 1036 | urb->transfer_dma + | |
1098 | if (i + 1 >= urb->number_of_packets) | 1037 | urb->iso_frame_desc[i].offset); |
1099 | td->status |= cpu_to_le32(TD_CTRL_IOC); | ||
1100 | } | 1038 | } |
1101 | 1039 | ||
1040 | /* Set the interrupt-on-completion flag on the last packet. */ | ||
1041 | td->status |= __constant_cpu_to_le32(TD_CTRL_IOC); | ||
1042 | |||
1043 | qh->skel = uhci->skel_iso_qh; | ||
1044 | |||
1045 | /* Add the TDs to the frame list */ | ||
1102 | frame = urb->start_frame; | 1046 | frame = urb->start_frame; |
1103 | list_for_each_entry(td, &urbp->td_list, list) { | 1047 | list_for_each_entry(td, &urbp->td_list, list) { |
1104 | uhci_insert_td_frame_list(uhci, td, frame); | 1048 | uhci_insert_td_in_frame_list(uhci, td, frame); |
1105 | frame += urb->interval; | 1049 | frame += urb->interval; |
1106 | } | 1050 | } |
1107 | 1051 | ||
1108 | return -EINPROGRESS; | 1052 | return 0; |
1109 | } | 1053 | } |
1110 | 1054 | ||
1111 | static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) | 1055 | static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) |
@@ -1139,80 +1083,67 @@ static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb) | |||
1139 | 1083 | ||
1140 | i++; | 1084 | i++; |
1141 | } | 1085 | } |
1142 | unlink_isochronous_tds(uhci, urb); | ||
1143 | 1086 | ||
1144 | return ret; | 1087 | return ret; |
1145 | } | 1088 | } |
1146 | 1089 | ||
1147 | static struct urb *uhci_find_urb_ep(struct uhci_hcd *uhci, struct urb *urb) | ||
1148 | { | ||
1149 | struct urb_priv *up; | ||
1150 | |||
1151 | /* We don't match Isoc transfers since they are special */ | ||
1152 | if (usb_pipeisoc(urb->pipe)) | ||
1153 | return NULL; | ||
1154 | |||
1155 | list_for_each_entry(up, &uhci->urb_list, urb_list) { | ||
1156 | struct urb *u = up->urb; | ||
1157 | |||
1158 | if (u->dev == urb->dev && u->status == -EINPROGRESS) { | ||
1159 | /* For control, ignore the direction */ | ||
1160 | if (usb_pipecontrol(urb->pipe) && | ||
1161 | (u->pipe & ~USB_DIR_IN) == (urb->pipe & ~USB_DIR_IN)) | ||
1162 | return u; | ||
1163 | else if (u->pipe == urb->pipe) | ||
1164 | return u; | ||
1165 | } | ||
1166 | } | ||
1167 | |||
1168 | return NULL; | ||
1169 | } | ||
1170 | |||
1171 | static int uhci_urb_enqueue(struct usb_hcd *hcd, | 1090 | static int uhci_urb_enqueue(struct usb_hcd *hcd, |
1172 | struct usb_host_endpoint *ep, | 1091 | struct usb_host_endpoint *hep, |
1173 | struct urb *urb, gfp_t mem_flags) | 1092 | struct urb *urb, gfp_t mem_flags) |
1174 | { | 1093 | { |
1175 | int ret; | 1094 | int ret; |
1176 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 1095 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
1177 | unsigned long flags; | 1096 | unsigned long flags; |
1178 | struct urb *eurb; | 1097 | struct urb_priv *urbp; |
1098 | struct uhci_qh *qh; | ||
1179 | int bustime; | 1099 | int bustime; |
1180 | 1100 | ||
1181 | spin_lock_irqsave(&uhci->lock, flags); | 1101 | spin_lock_irqsave(&uhci->lock, flags); |
1182 | 1102 | ||
1183 | ret = urb->status; | 1103 | ret = urb->status; |
1184 | if (ret != -EINPROGRESS) /* URB already unlinked! */ | 1104 | if (ret != -EINPROGRESS) /* URB already unlinked! */ |
1185 | goto out; | 1105 | goto done; |
1186 | 1106 | ||
1187 | eurb = uhci_find_urb_ep(uhci, urb); | 1107 | ret = -ENOMEM; |
1108 | urbp = uhci_alloc_urb_priv(uhci, urb); | ||
1109 | if (!urbp) | ||
1110 | goto done; | ||
1188 | 1111 | ||
1189 | if (!uhci_alloc_urb_priv(uhci, urb)) { | 1112 | if (hep->hcpriv) |
1190 | ret = -ENOMEM; | 1113 | qh = (struct uhci_qh *) hep->hcpriv; |
1191 | goto out; | 1114 | else { |
1115 | qh = uhci_alloc_qh(uhci, urb->dev, hep); | ||
1116 | if (!qh) | ||
1117 | goto err_no_qh; | ||
1192 | } | 1118 | } |
1119 | urbp->qh = qh; | ||
1193 | 1120 | ||
1194 | switch (usb_pipetype(urb->pipe)) { | 1121 | switch (usb_pipetype(urb->pipe)) { |
1195 | case PIPE_CONTROL: | 1122 | case PIPE_CONTROL: |
1196 | ret = uhci_submit_control(uhci, urb, eurb); | 1123 | ret = uhci_submit_control(uhci, urb, qh); |
1124 | break; | ||
1125 | case PIPE_BULK: | ||
1126 | ret = uhci_submit_bulk(uhci, urb, qh); | ||
1197 | break; | 1127 | break; |
1198 | case PIPE_INTERRUPT: | 1128 | case PIPE_INTERRUPT: |
1199 | if (!eurb) { | 1129 | if (list_empty(&qh->queue)) { |
1200 | bustime = usb_check_bandwidth(urb->dev, urb); | 1130 | bustime = usb_check_bandwidth(urb->dev, urb); |
1201 | if (bustime < 0) | 1131 | if (bustime < 0) |
1202 | ret = bustime; | 1132 | ret = bustime; |
1203 | else { | 1133 | else { |
1204 | ret = uhci_submit_interrupt(uhci, urb, eurb); | 1134 | ret = uhci_submit_interrupt(uhci, urb, qh); |
1205 | if (ret == -EINPROGRESS) | 1135 | if (ret == 0) |
1206 | usb_claim_bandwidth(urb->dev, urb, bustime, 0); | 1136 | usb_claim_bandwidth(urb->dev, urb, bustime, 0); |
1207 | } | 1137 | } |
1208 | } else { /* inherit from parent */ | 1138 | } else { /* inherit from parent */ |
1209 | urb->bandwidth = eurb->bandwidth; | 1139 | struct urb_priv *eurbp; |
1210 | ret = uhci_submit_interrupt(uhci, urb, eurb); | 1140 | |
1141 | eurbp = list_entry(qh->queue.prev, struct urb_priv, | ||
1142 | node); | ||
1143 | urb->bandwidth = eurbp->urb->bandwidth; | ||
1144 | ret = uhci_submit_interrupt(uhci, urb, qh); | ||
1211 | } | 1145 | } |
1212 | break; | 1146 | break; |
1213 | case PIPE_BULK: | ||
1214 | ret = uhci_submit_bulk(uhci, urb, eurb); | ||
1215 | break; | ||
1216 | case PIPE_ISOCHRONOUS: | 1147 | case PIPE_ISOCHRONOUS: |
1217 | bustime = usb_check_bandwidth(urb->dev, urb); | 1148 | bustime = usb_check_bandwidth(urb->dev, urb); |
1218 | if (bustime < 0) { | 1149 | if (bustime < 0) { |
@@ -1220,22 +1151,59 @@ static int uhci_urb_enqueue(struct usb_hcd *hcd, | |||
1220 | break; | 1151 | break; |
1221 | } | 1152 | } |
1222 | 1153 | ||
1223 | ret = uhci_submit_isochronous(uhci, urb); | 1154 | ret = uhci_submit_isochronous(uhci, urb, qh); |
1224 | if (ret == -EINPROGRESS) | 1155 | if (ret == 0) |
1225 | usb_claim_bandwidth(urb->dev, urb, bustime, 1); | 1156 | usb_claim_bandwidth(urb->dev, urb, bustime, 1); |
1226 | break; | 1157 | break; |
1227 | } | 1158 | } |
1159 | if (ret != 0) | ||
1160 | goto err_submit_failed; | ||
1228 | 1161 | ||
1229 | if (ret != -EINPROGRESS) { | 1162 | /* Add this URB to the QH */ |
1230 | /* Submit failed, so delete it from the urb_list */ | 1163 | urbp->qh = qh; |
1231 | struct urb_priv *urbp = urb->hcpriv; | 1164 | list_add_tail(&urbp->node, &qh->queue); |
1165 | list_add_tail(&urbp->urb_list, &uhci->urb_list); | ||
1232 | 1166 | ||
1233 | list_del_init(&urbp->urb_list); | 1167 | /* If the new URB is the first and only one on this QH then either |
1234 | uhci_destroy_urb_priv(uhci, urb); | 1168 | * the QH is new and idle or else it's unlinked and waiting to |
1235 | } else | 1169 | * become idle, so we can activate it right away. */ |
1236 | ret = 0; | 1170 | if (qh->queue.next == &urbp->node) |
1171 | uhci_activate_qh(uhci, qh); | ||
1172 | |||
1173 | /* If the QH is already active, we have a race with the hardware. | ||
1174 | * This won't get fixed until dummy TDs are added. */ | ||
1175 | else if (qh->state == QH_STATE_ACTIVE) { | ||
1176 | |||
1177 | /* If the URB isn't first on its queue, adjust the link pointer | ||
1178 | * of the last TD in the previous URB. */ | ||
1179 | if (urbp->node.prev != &urbp->qh->queue) { | ||
1180 | struct urb_priv *purbp = list_entry(urbp->node.prev, | ||
1181 | struct urb_priv, node); | ||
1182 | struct uhci_td *ptd = list_entry(purbp->td_list.prev, | ||
1183 | struct uhci_td, list); | ||
1184 | struct uhci_td *td = list_entry(urbp->td_list.next, | ||
1185 | struct uhci_td, list); | ||
1186 | |||
1187 | ptd->link = cpu_to_le32(td->dma_handle); | ||
1188 | |||
1189 | } | ||
1190 | if (qh_element(qh) == UHCI_PTR_TERM) { | ||
1191 | struct uhci_td *td = list_entry(urbp->td_list.next, | ||
1192 | struct uhci_td, list); | ||
1193 | |||
1194 | qh->element = cpu_to_le32(td->dma_handle); | ||
1195 | } | ||
1196 | } | ||
1197 | goto done; | ||
1198 | |||
1199 | err_submit_failed: | ||
1200 | if (qh->state == QH_STATE_IDLE) | ||
1201 | uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */ | ||
1237 | 1202 | ||
1238 | out: | 1203 | err_no_qh: |
1204 | uhci_free_urb_priv(uhci, urbp); | ||
1205 | |||
1206 | done: | ||
1239 | spin_unlock_irqrestore(&uhci->lock, flags); | 1207 | spin_unlock_irqrestore(&uhci->lock, flags); |
1240 | return ret; | 1208 | return ret; |
1241 | } | 1209 | } |
@@ -1245,119 +1213,115 @@ out: | |||
1245 | */ | 1213 | */ |
1246 | static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb) | 1214 | static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb) |
1247 | { | 1215 | { |
1248 | int ret = -EINPROGRESS; | 1216 | int status; |
1249 | struct urb_priv *urbp; | 1217 | int okay_to_giveback = 0; |
1250 | 1218 | struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv; | |
1251 | spin_lock(&urb->lock); | ||
1252 | |||
1253 | urbp = (struct urb_priv *)urb->hcpriv; | ||
1254 | |||
1255 | if (urb->status != -EINPROGRESS) /* URB already dequeued */ | ||
1256 | goto out; | ||
1257 | 1219 | ||
1258 | switch (usb_pipetype(urb->pipe)) { | 1220 | switch (usb_pipetype(urb->pipe)) { |
1259 | case PIPE_CONTROL: | 1221 | case PIPE_CONTROL: |
1260 | ret = uhci_result_control(uhci, urb); | 1222 | status = uhci_result_control(uhci, urb); |
1261 | break; | ||
1262 | case PIPE_BULK: | ||
1263 | case PIPE_INTERRUPT: | ||
1264 | ret = uhci_result_common(uhci, urb); | ||
1265 | break; | 1223 | break; |
1266 | case PIPE_ISOCHRONOUS: | 1224 | case PIPE_ISOCHRONOUS: |
1267 | ret = uhci_result_isochronous(uhci, urb); | 1225 | status = uhci_result_isochronous(uhci, urb); |
1226 | break; | ||
1227 | default: /* PIPE_BULK or PIPE_INTERRUPT */ | ||
1228 | status = uhci_result_common(uhci, urb); | ||
1268 | break; | 1229 | break; |
1269 | } | 1230 | } |
1270 | 1231 | ||
1271 | if (ret == -EINPROGRESS) | 1232 | spin_lock(&urb->lock); |
1272 | goto out; | 1233 | if (urb->status == -EINPROGRESS) { /* Not yet dequeued */ |
1273 | urb->status = ret; | 1234 | if (status != -EINPROGRESS) { /* URB has completed */ |
1235 | urb->status = status; | ||
1236 | |||
1237 | /* If the URB got a real error (as opposed to | ||
1238 | * simply being dequeued), we don't have to | ||
1239 | * unlink the QH. Fix this later... */ | ||
1240 | if (status < 0) | ||
1241 | uhci_unlink_qh(uhci, urbp->qh); | ||
1242 | else | ||
1243 | okay_to_giveback = 1; | ||
1244 | } | ||
1245 | } else { /* Already dequeued */ | ||
1246 | if (urbp->qh->state == QH_STATE_UNLINKING && | ||
1247 | uhci->frame_number + uhci->is_stopped != | ||
1248 | urbp->qh->unlink_frame) | ||
1249 | okay_to_giveback = 1; | ||
1250 | } | ||
1251 | spin_unlock(&urb->lock); | ||
1252 | if (!okay_to_giveback) | ||
1253 | return; | ||
1274 | 1254 | ||
1275 | switch (usb_pipetype(urb->pipe)) { | 1255 | switch (usb_pipetype(urb->pipe)) { |
1276 | case PIPE_CONTROL: | ||
1277 | case PIPE_BULK: | ||
1278 | case PIPE_ISOCHRONOUS: | 1256 | case PIPE_ISOCHRONOUS: |
1279 | /* Release bandwidth for Interrupt or Isoc. transfers */ | 1257 | /* Release bandwidth for Interrupt or Isoc. transfers */ |
1280 | if (urb->bandwidth) | 1258 | if (urb->bandwidth) |
1281 | usb_release_bandwidth(urb->dev, urb, 1); | 1259 | usb_release_bandwidth(urb->dev, urb, 1); |
1282 | uhci_unlink_generic(uhci, urb); | ||
1283 | break; | 1260 | break; |
1284 | case PIPE_INTERRUPT: | 1261 | case PIPE_INTERRUPT: |
1285 | /* Release bandwidth for Interrupt or Isoc. transfers */ | 1262 | /* Release bandwidth for Interrupt or Isoc. transfers */ |
1286 | /* Make sure we don't release if we have a queued URB */ | 1263 | /* Make sure we don't release if we have a queued URB */ |
1287 | if (list_empty(&urbp->queue_list) && urb->bandwidth) | 1264 | if (list_empty(&urbp->qh->queue) && urb->bandwidth) |
1288 | usb_release_bandwidth(urb->dev, urb, 0); | 1265 | usb_release_bandwidth(urb->dev, urb, 0); |
1289 | else | 1266 | else |
1290 | /* bandwidth was passed on to queued URB, */ | 1267 | /* bandwidth was passed on to queued URB, */ |
1291 | /* so don't let usb_unlink_urb() release it */ | 1268 | /* so don't let usb_unlink_urb() release it */ |
1292 | urb->bandwidth = 0; | 1269 | urb->bandwidth = 0; |
1293 | uhci_unlink_generic(uhci, urb); | 1270 | /* Falls through */ |
1271 | case PIPE_BULK: | ||
1272 | if (status < 0) | ||
1273 | uhci_fixup_toggles(urb); | ||
1274 | break; | ||
1275 | default: /* PIPE_CONTROL */ | ||
1294 | break; | 1276 | break; |
1295 | default: | ||
1296 | dev_info(uhci_dev(uhci), "%s: unknown pipe type %d " | ||
1297 | "for urb %p\n", | ||
1298 | __FUNCTION__, usb_pipetype(urb->pipe), urb); | ||
1299 | } | 1277 | } |
1300 | 1278 | ||
1301 | /* Move it from uhci->urb_list to uhci->complete_list */ | 1279 | /* Take the URB's TDs off the hardware schedule */ |
1302 | uhci_moveto_complete(uhci, urbp); | 1280 | uhci_remove_tds_from_schedule(uhci, urb, status); |
1303 | 1281 | ||
1304 | out: | 1282 | /* Take the URB off the QH's queue and see if the QH is now unused */ |
1305 | spin_unlock(&urb->lock); | 1283 | list_del_init(&urbp->node); |
1306 | } | 1284 | if (list_empty(&urbp->qh->queue)) |
1307 | 1285 | uhci_unlink_qh(uhci, urbp->qh); | |
1308 | static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb) | ||
1309 | { | ||
1310 | struct list_head *head; | ||
1311 | struct uhci_td *td; | ||
1312 | struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; | ||
1313 | int prevactive = 0; | ||
1314 | 1286 | ||
1315 | uhci_dec_fsbr(uhci, urb); /* Safe since it checks */ | 1287 | uhci_dec_fsbr(uhci, urb); /* Safe since it checks */ |
1316 | 1288 | ||
1317 | /* | 1289 | /* Queue it for giving back */ |
1318 | * Now we need to find out what the last successful toggle was | 1290 | list_move_tail(&urbp->urb_list, &uhci->complete_list); |
1319 | * so we can update the local data toggle for the next transfer | 1291 | } |
1320 | * | ||
1321 | * There are 2 ways the last successful completed TD is found: | ||
1322 | * | ||
1323 | * 1) The TD is NOT active and the actual length < expected length | ||
1324 | * 2) The TD is NOT active and it's the last TD in the chain | ||
1325 | * | ||
1326 | * and a third way the first uncompleted TD is found: | ||
1327 | * | ||
1328 | * 3) The TD is active and the previous TD is NOT active | ||
1329 | * | ||
1330 | * Control and Isochronous ignore the toggle, so this is safe | ||
1331 | * for all types | ||
1332 | * | ||
1333 | * FIXME: The toggle fixups won't be 100% reliable until we | ||
1334 | * change over to using a single queue for each endpoint and | ||
1335 | * stop the queue before unlinking. | ||
1336 | */ | ||
1337 | head = &urbp->td_list; | ||
1338 | list_for_each_entry(td, head, list) { | ||
1339 | unsigned int ctrlstat = td_status(td); | ||
1340 | 1292 | ||
1341 | if (!(ctrlstat & TD_CTRL_ACTIVE) && | 1293 | /* |
1342 | (uhci_actual_length(ctrlstat) < | 1294 | * Check out the QHs waiting to be fully unlinked |
1343 | uhci_expected_length(td_token(td)) || | 1295 | */ |
1344 | td->list.next == head)) | 1296 | static void uhci_scan_unlinking_qhs(struct uhci_hcd *uhci) |
1345 | usb_settoggle(urb->dev, uhci_endpoint(td_token(td)), | 1297 | { |
1346 | uhci_packetout(td_token(td)), | 1298 | struct uhci_qh *qh, *tmp; |
1347 | uhci_toggle(td_token(td)) ^ 1); | ||
1348 | else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive) | ||
1349 | usb_settoggle(urb->dev, uhci_endpoint(td_token(td)), | ||
1350 | uhci_packetout(td_token(td)), | ||
1351 | uhci_toggle(td_token(td))); | ||
1352 | 1299 | ||
1353 | prevactive = ctrlstat & TD_CTRL_ACTIVE; | 1300 | list_for_each_entry_safe(qh, tmp, &uhci->skel_unlink_qh->node, node) { |
1354 | } | ||
1355 | 1301 | ||
1356 | uhci_delete_queued_urb(uhci, urb); | 1302 | /* If the queue is empty and the QH is fully unlinked then |
1303 | * it can become IDLE. */ | ||
1304 | if (list_empty(&qh->queue)) { | ||
1305 | if (uhci->frame_number + uhci->is_stopped != | ||
1306 | qh->unlink_frame) | ||
1307 | uhci_make_qh_idle(uhci, qh); | ||
1357 | 1308 | ||
1358 | /* The interrupt loop will reclaim the QHs */ | 1309 | /* If none of the QH's URBs have been dequeued then the QH |
1359 | uhci_remove_qh(uhci, urbp->qh); | 1310 | * should be re-activated. */ |
1360 | urbp->qh = NULL; | 1311 | } else { |
1312 | struct urb_priv *urbp; | ||
1313 | int any_dequeued = 0; | ||
1314 | |||
1315 | list_for_each_entry(urbp, &qh->queue, node) { | ||
1316 | if (urbp->urb->status != -EINPROGRESS) { | ||
1317 | any_dequeued = 1; | ||
1318 | break; | ||
1319 | } | ||
1320 | } | ||
1321 | if (!any_dequeued) | ||
1322 | uhci_activate_qh(uhci, qh); | ||
1323 | } | ||
1324 | } | ||
1361 | } | 1325 | } |
1362 | 1326 | ||
1363 | static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) | 1327 | static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) |
@@ -1370,22 +1334,11 @@ static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) | |||
1370 | urbp = urb->hcpriv; | 1334 | urbp = urb->hcpriv; |
1371 | if (!urbp) /* URB was never linked! */ | 1335 | if (!urbp) /* URB was never linked! */ |
1372 | goto done; | 1336 | goto done; |
1373 | list_del_init(&urbp->urb_list); | ||
1374 | 1337 | ||
1338 | /* Remove Isochronous TDs from the frame list ASAP */ | ||
1375 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) | 1339 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) |
1376 | unlink_isochronous_tds(uhci, urb); | 1340 | uhci_unlink_isochronous_tds(uhci, urb); |
1377 | uhci_unlink_generic(uhci, urb); | 1341 | uhci_unlink_qh(uhci, urbp->qh); |
1378 | |||
1379 | uhci_get_current_frame_number(uhci); | ||
1380 | if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) { | ||
1381 | uhci_remove_pending_urbps(uhci); | ||
1382 | uhci->urb_remove_age = uhci->frame_number; | ||
1383 | } | ||
1384 | |||
1385 | /* If we're the first, set the next interrupt bit */ | ||
1386 | if (list_empty(&uhci->urb_remove_list)) | ||
1387 | uhci_set_next_interrupt(uhci); | ||
1388 | list_add_tail(&urbp->urb_list, &uhci->urb_remove_list); | ||
1389 | 1342 | ||
1390 | done: | 1343 | done: |
1391 | spin_unlock_irqrestore(&uhci->lock, flags); | 1344 | spin_unlock_irqrestore(&uhci->lock, flags); |
@@ -1426,17 +1379,6 @@ static int uhci_fsbr_timeout(struct uhci_hcd *uhci, struct urb *urb) | |||
1426 | return 0; | 1379 | return 0; |
1427 | } | 1380 | } |
1428 | 1381 | ||
1429 | static void uhci_free_pending_qhs(struct uhci_hcd *uhci) | ||
1430 | { | ||
1431 | struct uhci_qh *qh, *tmp; | ||
1432 | |||
1433 | list_for_each_entry_safe(qh, tmp, &uhci->qh_remove_list, remove_list) { | ||
1434 | list_del_init(&qh->remove_list); | ||
1435 | |||
1436 | uhci_free_qh(uhci, qh); | ||
1437 | } | ||
1438 | } | ||
1439 | |||
1440 | static void uhci_free_pending_tds(struct uhci_hcd *uhci) | 1382 | static void uhci_free_pending_tds(struct uhci_hcd *uhci) |
1441 | { | 1383 | { |
1442 | struct uhci_td *td, *tmp; | 1384 | struct uhci_td *td, *tmp; |
@@ -1455,7 +1397,7 @@ __acquires(uhci->lock) | |||
1455 | { | 1397 | { |
1456 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | 1398 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); |
1457 | 1399 | ||
1458 | uhci_destroy_urb_priv(uhci, urb); | 1400 | uhci_free_urb_priv(uhci, (struct urb_priv *) (urb->hcpriv)); |
1459 | 1401 | ||
1460 | spin_unlock(&uhci->lock); | 1402 | spin_unlock(&uhci->lock); |
1461 | usb_hcd_giveback_urb(hcd, urb, regs); | 1403 | usb_hcd_giveback_urb(hcd, urb, regs); |
@@ -1474,13 +1416,6 @@ static void uhci_finish_completion(struct uhci_hcd *uhci, struct pt_regs *regs) | |||
1474 | } | 1416 | } |
1475 | } | 1417 | } |
1476 | 1418 | ||
1477 | static void uhci_remove_pending_urbps(struct uhci_hcd *uhci) | ||
1478 | { | ||
1479 | |||
1480 | /* Splice the urb_remove_list onto the end of the complete_list */ | ||
1481 | list_splice_init(&uhci->urb_remove_list, uhci->complete_list.prev); | ||
1482 | } | ||
1483 | |||
1484 | /* Process events in the schedule, but only in one thread at a time */ | 1419 | /* Process events in the schedule, but only in one thread at a time */ |
1485 | static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) | 1420 | static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) |
1486 | { | 1421 | { |
@@ -1498,12 +1433,8 @@ static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) | |||
1498 | uhci_clear_next_interrupt(uhci); | 1433 | uhci_clear_next_interrupt(uhci); |
1499 | uhci_get_current_frame_number(uhci); | 1434 | uhci_get_current_frame_number(uhci); |
1500 | 1435 | ||
1501 | if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) | ||
1502 | uhci_free_pending_qhs(uhci); | ||
1503 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) | 1436 | if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) |
1504 | uhci_free_pending_tds(uhci); | 1437 | uhci_free_pending_tds(uhci); |
1505 | if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) | ||
1506 | uhci_remove_pending_urbps(uhci); | ||
1507 | 1438 | ||
1508 | /* Walk the list of pending URBs to see which ones completed | 1439 | /* Walk the list of pending URBs to see which ones completed |
1509 | * (must be _safe because uhci_transfer_result() dequeues URBs) */ | 1440 | * (must be _safe because uhci_transfer_result() dequeues URBs) */ |
@@ -1516,25 +1447,21 @@ static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs) | |||
1516 | uhci_finish_completion(uhci, regs); | 1447 | uhci_finish_completion(uhci, regs); |
1517 | 1448 | ||
1518 | /* If the controller is stopped, we can finish these off right now */ | 1449 | /* If the controller is stopped, we can finish these off right now */ |
1519 | if (uhci->is_stopped) { | 1450 | if (uhci->is_stopped) |
1520 | uhci_free_pending_qhs(uhci); | ||
1521 | uhci_free_pending_tds(uhci); | 1451 | uhci_free_pending_tds(uhci); |
1522 | uhci_remove_pending_urbps(uhci); | ||
1523 | } | ||
1524 | 1452 | ||
1525 | if (uhci->need_rescan) | 1453 | if (uhci->need_rescan) |
1526 | goto rescan; | 1454 | goto rescan; |
1527 | uhci->scan_in_progress = 0; | 1455 | uhci->scan_in_progress = 0; |
1528 | 1456 | ||
1529 | if (list_empty(&uhci->urb_remove_list) && | 1457 | /* Check out the QHs waiting for unlinking */ |
1530 | list_empty(&uhci->td_remove_list) && | 1458 | uhci_scan_unlinking_qhs(uhci); |
1531 | list_empty(&uhci->qh_remove_list)) | 1459 | |
1460 | if (list_empty(&uhci->td_remove_list) && | ||
1461 | list_empty(&uhci->skel_unlink_qh->node)) | ||
1532 | uhci_clear_next_interrupt(uhci); | 1462 | uhci_clear_next_interrupt(uhci); |
1533 | else | 1463 | else |
1534 | uhci_set_next_interrupt(uhci); | 1464 | uhci_set_next_interrupt(uhci); |
1535 | |||
1536 | /* Wake up anyone waiting for an URB to complete */ | ||
1537 | wake_up_all(&uhci->waitqh); | ||
1538 | } | 1465 | } |
1539 | 1466 | ||
1540 | static void check_fsbr(struct uhci_hcd *uhci) | 1467 | static void check_fsbr(struct uhci_hcd *uhci) |