diff options
39 files changed, 40 insertions, 97 deletions
diff --git a/Documentation/mips/time.README b/Documentation/mips/time.README index 70bc0dd43d6d..69ddc5c14b79 100644 --- a/Documentation/mips/time.README +++ b/Documentation/mips/time.README | |||
@@ -65,7 +65,7 @@ the following functions or values: | |||
65 | 1. (optional) set up RTC routines | 65 | 1. (optional) set up RTC routines |
66 | 2. (optional) calibrate and set the mips_counter_frequency | 66 | 2. (optional) calibrate and set the mips_counter_frequency |
67 | 67 | ||
68 | b) board_timer_setup - a function pointer. Invoked at the end of time_init() | 68 | b) plat_timer_setup - a function pointer. Invoked at the end of time_init() |
69 | 1. (optional) over-ride any decisions made in time_init() | 69 | 1. (optional) over-ride any decisions made in time_init() |
70 | 2. set up the irqaction for timer interrupt. | 70 | 2. set up the irqaction for timer interrupt. |
71 | 3. enable the timer interrupt | 71 | 3. enable the timer interrupt |
@@ -116,19 +116,17 @@ Step 2: the machine setup() function | |||
116 | 116 | ||
117 | If you supply board_time_init(), set the function poointer. | 117 | If you supply board_time_init(), set the function poointer. |
118 | 118 | ||
119 | Set the function pointer board_timer_setup() (mandatory) | ||
120 | 119 | ||
121 | 120 | Step 3: implement rtc routines, board_time_init() and plat_timer_setup() | |
122 | Step 3: implement rtc routines, board_time_init() and board_timer_setup() | ||
123 | if needed. | 121 | if needed. |
124 | 122 | ||
125 | board_time_init() - | 123 | board_time_init() - |
126 | a) (optional) set up RTC routines, | 124 | a) (optional) set up RTC routines, |
127 | b) (optional) calibrate and set the mips_counter_frequency | 125 | b) (optional) calibrate and set the mips_counter_frequency |
128 | (only needed if you intended to use fixed_rate_gettimeoffset | 126 | (only needed if you intended to use fixed_rate_gettimeoffset |
129 | or use cpu counter as timer interrupt source) | 127 | or use cpu counter as timer interrupt source) |
130 | 128 | ||
131 | board_timer_setup() - | 129 | plat_timer_setup() - |
132 | a) (optional) over-write any choices made above by time_init(). | 130 | a) (optional) over-write any choices made above by time_init(). |
133 | b) machine specific code should setup the timer irqaction. | 131 | b) machine specific code should setup the timer irqaction. |
134 | c) enable the timer interrupt | 132 | c) enable the timer interrupt |
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index cc5138ce9c95..377ae0d8ff00 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c | |||
@@ -51,7 +51,6 @@ extern void au1000_power_off(void); | |||
51 | extern void au1x_time_init(void); | 51 | extern void au1x_time_init(void); |
52 | extern void au1x_timer_setup(struct irqaction *irq); | 52 | extern void au1x_timer_setup(struct irqaction *irq); |
53 | extern void au1xxx_time_init(void); | 53 | extern void au1xxx_time_init(void); |
54 | extern void au1xxx_timer_setup(struct irqaction *irq); | ||
55 | extern void set_cpuspec(void); | 54 | extern void set_cpuspec(void); |
56 | 55 | ||
57 | void __init plat_mem_setup(void) | 56 | void __init plat_mem_setup(void) |
@@ -123,7 +122,6 @@ void __init plat_mem_setup(void) | |||
123 | _machine_halt = au1000_halt; | 122 | _machine_halt = au1000_halt; |
124 | pm_power_off = au1000_power_off; | 123 | pm_power_off = au1000_power_off; |
125 | board_time_init = au1xxx_time_init; | 124 | board_time_init = au1xxx_time_init; |
126 | board_timer_setup = au1xxx_timer_setup; | ||
127 | 125 | ||
128 | /* IO/MEM resources. */ | 126 | /* IO/MEM resources. */ |
129 | set_io_port_base(0); | 127 | set_io_port_base(0); |
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index 7e988b0b0130..7fbea1bf7b48 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c | |||
@@ -383,7 +383,7 @@ static unsigned long do_fast_pm_gettimeoffset(void) | |||
383 | } | 383 | } |
384 | #endif | 384 | #endif |
385 | 385 | ||
386 | void __init au1xxx_timer_setup(struct irqaction *irq) | 386 | void __init plat_timer_setup(struct irqaction *irq) |
387 | { | 387 | { |
388 | unsigned int est_freq; | 388 | unsigned int est_freq; |
389 | 389 | ||
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index e1d6ad296c98..a1ce4580058d 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c | |||
@@ -78,7 +78,7 @@ static void excite_timer_init(void) | |||
78 | mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2; | 78 | mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2; |
79 | } | 79 | } |
80 | 80 | ||
81 | static void excite_timer_setup(struct irqaction *irq) | 81 | void __init plat_timer_setup(struct irqaction *irq) |
82 | { | 82 | { |
83 | /* The eXcite platform uses the alternate timer interrupt */ | 83 | /* The eXcite platform uses the alternate timer interrupt */ |
84 | set_c0_intcontrol(0x80); | 84 | set_c0_intcontrol(0x80); |
@@ -262,7 +262,6 @@ void __init plat_mem_setup(void) | |||
262 | 262 | ||
263 | /* Set up timer initialization hooks */ | 263 | /* Set up timer initialization hooks */ |
264 | board_time_init = excite_timer_init; | 264 | board_time_init = excite_timer_init; |
265 | board_timer_setup = excite_timer_setup; | ||
266 | 265 | ||
267 | /* Set up the peripheral address map */ | 266 | /* Set up the peripheral address map */ |
268 | *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; | 267 | *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; |
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index c99714587ce8..c01a0170e590 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c | |||
@@ -49,7 +49,7 @@ const char *get_system_type(void) | |||
49 | return "MIPS Cobalt"; | 49 | return "MIPS Cobalt"; |
50 | } | 50 | } |
51 | 51 | ||
52 | static void __init cobalt_timer_setup(struct irqaction *irq) | 52 | void __init plat_timer_setup(struct irqaction *irq) |
53 | { | 53 | { |
54 | /* Load timer value for 1KHz (TCLK is 50MHz) */ | 54 | /* Load timer value for 1KHz (TCLK is 50MHz) */ |
55 | GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS); | 55 | GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS); |
@@ -129,8 +129,6 @@ void __init plat_mem_setup(void) | |||
129 | _machine_halt = cobalt_machine_halt; | 129 | _machine_halt = cobalt_machine_halt; |
130 | pm_power_off = cobalt_machine_power_off; | 130 | pm_power_off = cobalt_machine_power_off; |
131 | 131 | ||
132 | board_timer_setup = cobalt_timer_setup; | ||
133 | |||
134 | set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE)); | 132 | set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE)); |
135 | 133 | ||
136 | /* I/O port resource must include UART and LCD/buttons */ | 134 | /* I/O port resource must include UART and LCD/buttons */ |
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c index 904c8f4f3c4c..f0cc0e8a8afa 100644 --- a/arch/mips/ddb5xxx/ddb5477/setup.c +++ b/arch/mips/ddb5xxx/ddb5477/setup.c | |||
@@ -147,7 +147,7 @@ static void __init ddb_time_init(void) | |||
147 | mips_hpt_frequency = bus_frequency*(i+4)/4; | 147 | mips_hpt_frequency = bus_frequency*(i+4)/4; |
148 | } | 148 | } |
149 | 149 | ||
150 | static void __init ddb_timer_setup(struct irqaction *irq) | 150 | void __init plat_timer_setup(struct irqaction *irq) |
151 | { | 151 | { |
152 | #if defined(USE_CPU_COUNTER_TIMER) | 152 | #if defined(USE_CPU_COUNTER_TIMER) |
153 | 153 | ||
@@ -177,7 +177,6 @@ void __init plat_mem_setup(void) | |||
177 | set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); | 177 | set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); |
178 | 178 | ||
179 | board_time_init = ddb_time_init; | 179 | board_time_init = ddb_time_init; |
180 | board_timer_setup = ddb_timer_setup; | ||
181 | 180 | ||
182 | _machine_restart = ddb_machine_restart; | 181 | _machine_restart = ddb_machine_restart; |
183 | _machine_halt = ddb_machine_halt; | 182 | _machine_halt = ddb_machine_halt; |
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 2684f121784b..d43241c2f541 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c | |||
@@ -145,13 +145,11 @@ static void __init dec_be_init(void) | |||
145 | 145 | ||
146 | 146 | ||
147 | extern void dec_time_init(void); | 147 | extern void dec_time_init(void); |
148 | extern void dec_timer_setup(struct irqaction *); | ||
149 | 148 | ||
150 | void __init plat_mem_setup(void) | 149 | void __init plat_mem_setup(void) |
151 | { | 150 | { |
152 | board_be_init = dec_be_init; | 151 | board_be_init = dec_be_init; |
153 | board_time_init = dec_time_init; | 152 | board_time_init = dec_time_init; |
154 | board_timer_setup = dec_timer_setup; | ||
155 | 153 | ||
156 | wbflush_setup(); | 154 | wbflush_setup(); |
157 | 155 | ||
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 76e4d09ff4d2..57294740c2dd 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c | |||
@@ -186,7 +186,7 @@ void __init dec_time_init(void) | |||
186 | 186 | ||
187 | EXPORT_SYMBOL(do_settimeofday); | 187 | EXPORT_SYMBOL(do_settimeofday); |
188 | 188 | ||
189 | void __init dec_timer_setup(struct irqaction *irq) | 189 | void __init plat_timer_setup(struct irqaction *irq) |
190 | { | 190 | { |
191 | setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); | 191 | setup_irq(dec_interrupt[DEC_IRQ_RTC], irq); |
192 | 192 | ||
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c index 25da5bc20998..b29a44739230 100644 --- a/arch/mips/emma2rh/markeins/setup.c +++ b/arch/mips/emma2rh/markeins/setup.c | |||
@@ -104,7 +104,7 @@ static void __init emma2rh_time_init(void) | |||
104 | mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2; | 104 | mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2; |
105 | } | 105 | } |
106 | 106 | ||
107 | static void __init emma2rh_timer_setup(struct irqaction *irq) | 107 | void __init plat_timer_setup(struct irqaction *irq) |
108 | { | 108 | { |
109 | /* we are using the cpu counter for timer interrupts */ | 109 | /* we are using the cpu counter for timer interrupts */ |
110 | setup_irq(CPU_IRQ_BASE + 7, irq); | 110 | setup_irq(CPU_IRQ_BASE + 7, irq); |
@@ -149,7 +149,6 @@ void __init plat_mem_setup(void) | |||
149 | set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); | 149 | set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); |
150 | 150 | ||
151 | board_time_init = emma2rh_time_init; | 151 | board_time_init = emma2rh_time_init; |
152 | board_timer_setup = emma2rh_timer_setup; | ||
153 | 152 | ||
154 | _machine_restart = markeins_machine_restart; | 153 | _machine_restart = markeins_machine_restart; |
155 | _machine_halt = markeins_machine_halt; | 154 | _machine_halt = markeins_machine_halt; |
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 221d8087c493..429afc400cb4 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c | |||
@@ -127,7 +127,6 @@ static void wrppmc_setup_serial(void) | |||
127 | void __init plat_mem_setup(void) | 127 | void __init plat_mem_setup(void) |
128 | { | 128 | { |
129 | extern void wrppmc_time_init(void); | 129 | extern void wrppmc_time_init(void); |
130 | extern void wrppmc_timer_setup(struct irqaction *); | ||
131 | extern void wrppmc_machine_restart(char *command); | 130 | extern void wrppmc_machine_restart(char *command); |
132 | extern void wrppmc_machine_halt(void); | 131 | extern void wrppmc_machine_halt(void); |
133 | extern void wrppmc_machine_power_off(void); | 132 | extern void wrppmc_machine_power_off(void); |
@@ -138,7 +137,6 @@ void __init plat_mem_setup(void) | |||
138 | 137 | ||
139 | /* Use MIPS Count/Compare Timer */ | 138 | /* Use MIPS Count/Compare Timer */ |
140 | board_time_init = wrppmc_time_init; | 139 | board_time_init = wrppmc_time_init; |
141 | board_timer_setup = wrppmc_timer_setup; | ||
142 | 140 | ||
143 | /* This makes the operations of 'in/out[bwl]' to the | 141 | /* This makes the operations of 'in/out[bwl]' to the |
144 | * physical address ( < KSEG0) can work via KSEG1 | 142 | * physical address ( < KSEG0) can work via KSEG1 |
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c index c8ed57e1b771..5b440859bcee 100644 --- a/arch/mips/gt64120/wrppmc/time.c +++ b/arch/mips/gt64120/wrppmc/time.c | |||
@@ -26,7 +26,7 @@ | |||
26 | 26 | ||
27 | #define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ | 27 | #define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ |
28 | 28 | ||
29 | void __init wrppmc_timer_setup(struct irqaction *irq) | 29 | void __init plat_timer_setup(struct irqaction *irq) |
30 | { | 30 | { |
31 | /* Install ISR for timer interrupt */ | 31 | /* Install ISR for timer interrupt */ |
32 | setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); | 32 | setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); |
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c index 0c657b4efaee..07faf3cacff2 100644 --- a/arch/mips/ite-boards/generic/it8172_setup.c +++ b/arch/mips/ite-boards/generic/it8172_setup.c | |||
@@ -60,7 +60,6 @@ extern void it8172_halt(void); | |||
60 | extern void it8172_power_off(void); | 60 | extern void it8172_power_off(void); |
61 | 61 | ||
62 | extern void it8172_time_init(void); | 62 | extern void it8172_time_init(void); |
63 | extern void it8172_timer_setup(struct irqaction *irq); | ||
64 | 63 | ||
65 | #ifdef CONFIG_IT8172_REVC | 64 | #ifdef CONFIG_IT8172_REVC |
66 | struct { | 65 | struct { |
@@ -168,7 +167,6 @@ void __init plat_mem_setup(void) | |||
168 | clear_c0_status(ST0_FR); | 167 | clear_c0_status(ST0_FR); |
169 | 168 | ||
170 | board_time_init = it8172_time_init; | 169 | board_time_init = it8172_time_init; |
171 | board_timer_setup = it8172_timer_setup; | ||
172 | 170 | ||
173 | _machine_restart = it8172_restart; | 171 | _machine_restart = it8172_restart; |
174 | _machine_halt = it8172_halt; | 172 | _machine_halt = it8172_halt; |
diff --git a/arch/mips/ite-boards/generic/time.c b/arch/mips/ite-boards/generic/time.c index dee497a91807..3dc55569ff7f 100644 --- a/arch/mips/ite-boards/generic/time.c +++ b/arch/mips/ite-boards/generic/time.c | |||
@@ -233,7 +233,8 @@ void __init it8172_time_init(void) | |||
233 | } | 233 | } |
234 | 234 | ||
235 | #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) | 235 | #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) |
236 | void __init it8172_timer_setup(struct irqaction *irq) | 236 | |
237 | void __init plat_timer_setup(struct irqaction *irq) | ||
237 | { | 238 | { |
238 | puts("timer_setup\n"); | 239 | puts("timer_setup\n"); |
239 | put32(NR_IRQS); | 240 | put32(NR_IRQS); |
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c index 385413e30fdd..487a9ea1ef00 100644 --- a/arch/mips/jazz/setup.c +++ b/arch/mips/jazz/setup.c | |||
@@ -37,7 +37,7 @@ extern void jazz_machine_restart(char *command); | |||
37 | extern void jazz_machine_halt(void); | 37 | extern void jazz_machine_halt(void); |
38 | extern void jazz_machine_power_off(void); | 38 | extern void jazz_machine_power_off(void); |
39 | 39 | ||
40 | static void __init jazz_time_init(struct irqaction *irq) | 40 | void __init plat_time_init(struct irqaction *irq) |
41 | { | 41 | { |
42 | /* set the clock to 100 Hz */ | 42 | /* set the clock to 100 Hz */ |
43 | r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); | 43 | r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); |
@@ -75,7 +75,6 @@ void __init plat_mem_setup(void) | |||
75 | for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++) | 75 | for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++) |
76 | request_resource(&ioport_resource, jazz_io_resources + i); | 76 | request_resource(&ioport_resource, jazz_io_resources + i); |
77 | 77 | ||
78 | board_timer_setup = jazz_time_init; | ||
79 | /* The RTC is outside the port address space */ | 78 | /* The RTC is outside the port address space */ |
80 | 79 | ||
81 | _machine_restart = jazz_machine_restart; | 80 | _machine_restart = jazz_machine_restart; |
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 36d22b9413b8..025434054ed0 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -185,7 +185,7 @@ static void __init jmr3927_time_init(void) | |||
185 | 185 | ||
186 | unsigned long jmr3927_do_gettimeoffset(void); | 186 | unsigned long jmr3927_do_gettimeoffset(void); |
187 | 187 | ||
188 | static void __init jmr3927_timer_setup(struct irqaction *irq) | 188 | void __init plat_timer_setup(struct irqaction *irq) |
189 | { | 189 | { |
190 | do_gettimeoffset = jmr3927_do_gettimeoffset; | 190 | do_gettimeoffset = jmr3927_do_gettimeoffset; |
191 | 191 | ||
@@ -244,7 +244,6 @@ void __init plat_mem_setup(void) | |||
244 | set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); | 244 | set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); |
245 | 245 | ||
246 | board_time_init = jmr3927_time_init; | 246 | board_time_init = jmr3927_time_init; |
247 | board_timer_setup = jmr3927_timer_setup; | ||
248 | 247 | ||
249 | _machine_restart = jmr3927_machine_restart; | 248 | _machine_restart = jmr3927_machine_restart; |
250 | _machine_halt = jmr3927_machine_halt; | 249 | _machine_halt = jmr3927_machine_halt; |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 5b17a3d6ae4f..604bcc5cb7c8 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -577,7 +577,7 @@ void smtc_init_secondary(void) | |||
577 | { | 577 | { |
578 | /* | 578 | /* |
579 | * Start timer on secondary VPEs if necessary. | 579 | * Start timer on secondary VPEs if necessary. |
580 | * mips_timer_setup should already have been invoked by init/main | 580 | * plat_timer_setup has already have been invoked by init/main |
581 | * on "boot" TC. Like per_cpu_trap_init() hack, this assumes that | 581 | * on "boot" TC. Like per_cpu_trap_init() hack, this assumes that |
582 | * SMTC init code assigns TCs consdecutively and in ascending order | 582 | * SMTC init code assigns TCs consdecutively and in ascending order |
583 | * to across available VPEs. | 583 | * to across available VPEs. |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 2393c11d5a20..170cb67f4ede 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
@@ -566,14 +566,13 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs) | |||
566 | * 2) setup xtime based on rtc_mips_get_time(). | 566 | * 2) setup xtime based on rtc_mips_get_time(). |
567 | * 3) choose a appropriate gettimeoffset routine. | 567 | * 3) choose a appropriate gettimeoffset routine. |
568 | * 4) calculate a couple of cached variables for later usage | 568 | * 4) calculate a couple of cached variables for later usage |
569 | * 5) board_timer_setup() - | 569 | * 5) plat_timer_setup() - |
570 | * a) (optional) over-write any choices made above by time_init(). | 570 | * a) (optional) over-write any choices made above by time_init(). |
571 | * b) machine specific code should setup the timer irqaction. | 571 | * b) machine specific code should setup the timer irqaction. |
572 | * c) enable the timer interrupt | 572 | * c) enable the timer interrupt |
573 | */ | 573 | */ |
574 | 574 | ||
575 | void (*board_time_init)(void); | 575 | void (*board_time_init)(void); |
576 | void (*board_timer_setup)(struct irqaction *irq); | ||
577 | 576 | ||
578 | unsigned int mips_hpt_frequency; | 577 | unsigned int mips_hpt_frequency; |
579 | 578 | ||
@@ -718,7 +717,7 @@ void __init time_init(void) | |||
718 | * to be NULL function so that we are sure the high-level code | 717 | * to be NULL function so that we are sure the high-level code |
719 | * is not invoked accidentally. | 718 | * is not invoked accidentally. |
720 | */ | 719 | */ |
721 | board_timer_setup(&timer_irqaction); | 720 | plat_timer_setup(&timer_irqaction); |
722 | } | 721 | } |
723 | 722 | ||
724 | #define FEBRUARY 2 | 723 | #define FEBRUARY 2 |
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c index 2187e63c6d88..0ffc43c600d9 100644 --- a/arch/mips/lasat/setup.c +++ b/arch/mips/lasat/setup.c | |||
@@ -115,12 +115,9 @@ static void lasat_time_init(void) | |||
115 | mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2; | 115 | mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2; |
116 | } | 116 | } |
117 | 117 | ||
118 | static void lasat_timer_setup(struct irqaction *irq) | 118 | void __init plat_timer_setup(struct irqaction *irq) |
119 | { | 119 | { |
120 | 120 | write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ); | |
121 | write_c0_compare( | ||
122 | read_c0_count() + | ||
123 | mips_hpt_frequency / HZ); | ||
124 | change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5); | 121 | change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5); |
125 | } | 122 | } |
126 | 123 | ||
@@ -170,7 +167,6 @@ void __init plat_mem_setup(void) | |||
170 | lasat_reboot_setup(); | 167 | lasat_reboot_setup(); |
171 | 168 | ||
172 | board_time_init = lasat_time_init; | 169 | board_time_init = lasat_time_init; |
173 | board_timer_setup = lasat_timer_setup; | ||
174 | 170 | ||
175 | #ifdef CONFIG_DS1603 | 171 | #ifdef CONFIG_DS1603 |
176 | ds1603 = &ds_defs[mips_machtype]; | 172 | ds1603 = &ds_defs[mips_machtype]; |
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c index 3a7c3d28aa0d..9871a91fdb07 100644 --- a/arch/mips/mips-boards/atlas/atlas_setup.c +++ b/arch/mips/mips-boards/atlas/atlas_setup.c | |||
@@ -35,7 +35,6 @@ | |||
35 | 35 | ||
36 | extern void mips_reboot_setup(void); | 36 | extern void mips_reboot_setup(void); |
37 | extern void mips_time_init(void); | 37 | extern void mips_time_init(void); |
38 | extern void mips_timer_setup(struct irqaction *irq); | ||
39 | extern unsigned long mips_rtc_get_time(void); | 38 | extern unsigned long mips_rtc_get_time(void); |
40 | 39 | ||
41 | #ifdef CONFIG_KGDB | 40 | #ifdef CONFIG_KGDB |
@@ -63,7 +62,6 @@ void __init plat_mem_setup(void) | |||
63 | mips_reboot_setup(); | 62 | mips_reboot_setup(); |
64 | 63 | ||
65 | board_time_init = mips_time_init; | 64 | board_time_init = mips_time_init; |
66 | board_timer_setup = mips_timer_setup; | ||
67 | rtc_mips_get_time = mips_rtc_get_time; | 65 | rtc_mips_get_time = mips_rtc_get_time; |
68 | } | 66 | } |
69 | 67 | ||
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 5e207760826b..8e846d175ee1 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -245,7 +245,7 @@ void __init mips_time_init(void) | |||
245 | local_irq_restore(flags); | 245 | local_irq_restore(flags); |
246 | } | 246 | } |
247 | 247 | ||
248 | void __init mips_timer_setup(struct irqaction *irq) | 248 | void __init plat_timer_setup(struct irqaction *irq) |
249 | { | 249 | { |
250 | if (cpu_has_veic) { | 250 | if (cpu_has_veic) { |
251 | set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); | 251 | set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); |
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index 7a54195c78fb..ab460f805bef 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c | |||
@@ -44,7 +44,6 @@ | |||
44 | 44 | ||
45 | extern void mips_reboot_setup(void); | 45 | extern void mips_reboot_setup(void); |
46 | extern void mips_time_init(void); | 46 | extern void mips_time_init(void); |
47 | extern void mips_timer_setup(struct irqaction *irq); | ||
48 | extern unsigned long mips_rtc_get_time(void); | 47 | extern unsigned long mips_rtc_get_time(void); |
49 | 48 | ||
50 | #ifdef CONFIG_KGDB | 49 | #ifdef CONFIG_KGDB |
@@ -223,6 +222,5 @@ void __init plat_mem_setup(void) | |||
223 | mips_reboot_setup(); | 222 | mips_reboot_setup(); |
224 | 223 | ||
225 | board_time_init = mips_time_init; | 224 | board_time_init = mips_time_init; |
226 | board_timer_setup = mips_timer_setup; | ||
227 | rtc_mips_get_time = mips_rtc_get_time; | 225 | rtc_mips_get_time = mips_rtc_get_time; |
228 | } | 226 | } |
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c index a856bd664879..a189dec7c7bc 100644 --- a/arch/mips/mips-boards/sead/sead_setup.c +++ b/arch/mips/mips-boards/sead/sead_setup.c | |||
@@ -35,7 +35,6 @@ | |||
35 | 35 | ||
36 | extern void mips_reboot_setup(void); | 36 | extern void mips_reboot_setup(void); |
37 | extern void mips_time_init(void); | 37 | extern void mips_time_init(void); |
38 | extern void mips_timer_setup(struct irqaction *irq); | ||
39 | 38 | ||
40 | static void __init serial_init(void); | 39 | static void __init serial_init(void); |
41 | 40 | ||
@@ -51,7 +50,6 @@ void __init plat_mem_setup(void) | |||
51 | serial_init (); | 50 | serial_init (); |
52 | 51 | ||
53 | board_time_init = mips_time_init; | 52 | board_time_init = mips_time_init; |
54 | board_timer_setup = mips_timer_setup; | ||
55 | 53 | ||
56 | mips_reboot_setup(); | 54 | mips_reboot_setup(); |
57 | } | 55 | } |
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index 3d4a785b565a..2659c1c3b78d 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c | |||
@@ -37,7 +37,6 @@ | |||
37 | 37 | ||
38 | 38 | ||
39 | extern void sim_time_init(void); | 39 | extern void sim_time_init(void); |
40 | extern void sim_timer_setup(struct irqaction *irq); | ||
41 | static void __init serial_init(void); | 40 | static void __init serial_init(void); |
42 | unsigned int _isbonito = 0; | 41 | unsigned int _isbonito = 0; |
43 | 42 | ||
@@ -56,7 +55,6 @@ void __init plat_mem_setup(void) | |||
56 | serial_init(); | 55 | serial_init(); |
57 | 56 | ||
58 | board_time_init = sim_time_init; | 57 | board_time_init = sim_time_init; |
59 | board_timer_setup = sim_timer_setup; | ||
60 | prom_printf("Linux started...\n"); | 58 | prom_printf("Linux started...\n"); |
61 | 59 | ||
62 | #ifdef CONFIG_MT_SMP | 60 | #ifdef CONFIG_MT_SMP |
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index b08e6a0456c1..e6fe2992227d 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c | |||
@@ -212,7 +212,7 @@ int m48t37y_set_time(unsigned long sec) | |||
212 | return 0; | 212 | return 0; |
213 | } | 213 | } |
214 | 214 | ||
215 | void momenco_timer_setup(struct irqaction *irq) | 215 | void __init plat_timer_setup(struct irqaction *irq) |
216 | { | 216 | { |
217 | setup_irq(8, irq); | 217 | setup_irq(8, irq); |
218 | } | 218 | } |
@@ -226,7 +226,6 @@ void momenco_time_init(void) | |||
226 | wire_stupidity_into_tlb(); | 226 | wire_stupidity_into_tlb(); |
227 | 227 | ||
228 | mips_hpt_frequency = cpu_clock / 2; | 228 | mips_hpt_frequency = cpu_clock / 2; |
229 | board_timer_setup = momenco_timer_setup; | ||
230 | 229 | ||
231 | rtc_mips_get_time = m48t37y_get_time; | 230 | rtc_mips_get_time = m48t37y_get_time; |
232 | rtc_mips_set_time = m48t37y_set_time; | 231 | rtc_mips_set_time = m48t37y_set_time; |
diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c index 8c53490ba6f1..435d0787329e 100644 --- a/arch/mips/momentum/ocelot_3/setup.c +++ b/arch/mips/momentum/ocelot_3/setup.c | |||
@@ -197,7 +197,7 @@ int m48t37y_set_time(unsigned long sec) | |||
197 | return 0; | 197 | return 0; |
198 | } | 198 | } |
199 | 199 | ||
200 | void momenco_timer_setup(struct irqaction *irq) | 200 | void __init plat_timer_setup(struct irqaction *irq) |
201 | { | 201 | { |
202 | setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */ | 202 | setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */ |
203 | } | 203 | } |
@@ -211,7 +211,6 @@ void momenco_time_init(void) | |||
211 | * the Rm7900 and the Rm7065C | 211 | * the Rm7900 and the Rm7065C |
212 | */ | 212 | */ |
213 | mips_hpt_frequency = cpu_clock / 2; | 213 | mips_hpt_frequency = cpu_clock / 2; |
214 | board_timer_setup = momenco_timer_setup; | ||
215 | 214 | ||
216 | rtc_mips_get_time = m48t37y_get_time; | 215 | rtc_mips_get_time = m48t37y_get_time; |
217 | rtc_mips_set_time = m48t37y_set_time; | 216 | rtc_mips_set_time = m48t37y_set_time; |
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 6a4519936ee9..36f570ecc6fb 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c | |||
@@ -209,7 +209,7 @@ int m48t37y_set_time(unsigned long sec) | |||
209 | return 0; | 209 | return 0; |
210 | } | 210 | } |
211 | 211 | ||
212 | void momenco_timer_setup(struct irqaction *irq) | 212 | void __init plat_timer_setup(struct irqaction *irq) |
213 | { | 213 | { |
214 | setup_irq(7, irq); | 214 | setup_irq(7, irq); |
215 | } | 215 | } |
@@ -224,7 +224,6 @@ void momenco_time_init(void) | |||
224 | #error Unknown CPU for this board | 224 | #error Unknown CPU for this board |
225 | #endif | 225 | #endif |
226 | printk("momenco_time_init cpu_clock=%d\n", cpu_clock); | 226 | printk("momenco_time_init cpu_clock=%d\n", cpu_clock); |
227 | board_timer_setup = momenco_timer_setup; | ||
228 | 227 | ||
229 | rtc_mips_get_time = m48t37y_get_time; | 228 | rtc_mips_get_time = m48t37y_get_time; |
230 | rtc_mips_set_time = m48t37y_set_time; | 229 | rtc_mips_set_time = m48t37y_set_time; |
diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c index 57fc5938c919..36b0c8bc6c06 100644 --- a/arch/mips/philips/pnx8550/common/setup.c +++ b/arch/mips/philips/pnx8550/common/setup.c | |||
@@ -50,7 +50,6 @@ extern void pnx8550_machine_power_off(void); | |||
50 | extern struct resource ioport_resource; | 50 | extern struct resource ioport_resource; |
51 | extern struct resource iomem_resource; | 51 | extern struct resource iomem_resource; |
52 | extern void pnx8550_time_init(void); | 52 | extern void pnx8550_time_init(void); |
53 | extern void pnx8550_timer_setup(struct irqaction *irq); | ||
54 | extern void rs_kgdb_hook(int tty_no); | 53 | extern void rs_kgdb_hook(int tty_no); |
55 | extern void prom_printf(char *fmt, ...); | 54 | extern void prom_printf(char *fmt, ...); |
56 | extern char *prom_getcmdline(void); | 55 | extern char *prom_getcmdline(void); |
@@ -109,7 +108,6 @@ void __init plat_mem_setup(void) | |||
109 | pm_power_off = pnx8550_machine_power_off; | 108 | pm_power_off = pnx8550_machine_power_off; |
110 | 109 | ||
111 | board_time_init = pnx8550_time_init; | 110 | board_time_init = pnx8550_time_init; |
112 | board_timer_setup = pnx8550_timer_setup; | ||
113 | 111 | ||
114 | /* Clear the Global 2 Register, PCI Inta Output Enable Registers | 112 | /* Clear the Global 2 Register, PCI Inta Output Enable Registers |
115 | Bit 1:Enable DAC Powerdown | 113 | Bit 1:Enable DAC Powerdown |
diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c index 70664ea96b92..0af655b1f330 100644 --- a/arch/mips/philips/pnx8550/common/time.c +++ b/arch/mips/philips/pnx8550/common/time.c | |||
@@ -70,16 +70,7 @@ void pnx8550_time_init(void) | |||
70 | mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p)); | 70 | mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p)); |
71 | } | 71 | } |
72 | 72 | ||
73 | /* | 73 | void __init plat_timer_setup(struct irqaction *irq) |
74 | * pnx8550_timer_setup() - it does the following things: | ||
75 | * | ||
76 | * 5) board_timer_setup() - | ||
77 | * a) (optional) over-write any choices made above by time_init(). | ||
78 | * b) machine specific code should setup the timer irqaction. | ||
79 | * c) enable the timer interrupt | ||
80 | */ | ||
81 | |||
82 | void __init pnx8550_timer_setup(struct irqaction *irq) | ||
83 | { | 74 | { |
84 | int configPR; | 75 | int configPR; |
85 | 76 | ||
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index aa0d6ff3c6ec..0a6ee8e5eec2 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c | |||
@@ -133,14 +133,13 @@ int m48t37y_set_time(unsigned long sec) | |||
133 | return 0; | 133 | return 0; |
134 | } | 134 | } |
135 | 135 | ||
136 | void yosemite_timer_setup(struct irqaction *irq) | 136 | void __init plat_timer_setup(struct irqaction *irq) |
137 | { | 137 | { |
138 | setup_irq(7, irq); | 138 | setup_irq(7, irq); |
139 | } | 139 | } |
140 | 140 | ||
141 | void yosemite_time_init(void) | 141 | void yosemite_time_init(void) |
142 | { | 142 | { |
143 | board_timer_setup = yosemite_timer_setup; | ||
144 | mips_hpt_frequency = cpu_clock / 2; | 143 | mips_hpt_frequency = cpu_clock / 2; |
145 | mips_hpt_frequency = 33000000 * 3 * 5; | 144 | mips_hpt_frequency = 33000000 * 3 * 5; |
146 | } | 145 | } |
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c index e100d6072e31..841394336f00 100644 --- a/arch/mips/qemu/q-setup.c +++ b/arch/mips/qemu/q-setup.c | |||
@@ -11,7 +11,7 @@ const char *get_system_type(void) | |||
11 | return "Qemu"; | 11 | return "Qemu"; |
12 | } | 12 | } |
13 | 13 | ||
14 | static void __init qemu_timer_setup(struct irqaction *irq) | 14 | void __init plat_timer_setup(struct irqaction *irq) |
15 | { | 15 | { |
16 | /* set the clock to 100 Hz */ | 16 | /* set the clock to 100 Hz */ |
17 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ | 17 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ |
@@ -23,7 +23,5 @@ static void __init qemu_timer_setup(struct irqaction *irq) | |||
23 | void __init plat_mem_setup(void) | 23 | void __init plat_mem_setup(void) |
24 | { | 24 | { |
25 | set_io_port_base(QEMU_PORT_BASE); | 25 | set_io_port_base(QEMU_PORT_BASE); |
26 | board_timer_setup = qemu_timer_setup; | ||
27 | |||
28 | qemu_reboot_setup(); | 26 | qemu_reboot_setup(); |
29 | } | 27 | } |
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c index 0bae605201c4..4aeb4c55e184 100644 --- a/arch/mips/sgi-ip22/ip22-time.c +++ b/arch/mips/sgi-ip22/ip22-time.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure) | 7 | * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure) |
8 | * | 8 | * |
9 | * Copyright (C) 2001 by Ladislav Michl | 9 | * Copyright (C) 2001 by Ladislav Michl |
10 | * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) | 10 | * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org) |
11 | */ | 11 | */ |
12 | #include <linux/bcd.h> | 12 | #include <linux/bcd.h> |
13 | #include <linux/ds1286.h> | 13 | #include <linux/ds1286.h> |
@@ -199,7 +199,7 @@ void indy_r4k_timer_interrupt(struct pt_regs *regs) | |||
199 | irq_exit(); | 199 | irq_exit(); |
200 | } | 200 | } |
201 | 201 | ||
202 | static void indy_timer_setup(struct irqaction *irq) | 202 | void __init plat_timer_setup(struct irqaction *irq) |
203 | { | 203 | { |
204 | /* over-write the handler, we use our own way */ | 204 | /* over-write the handler, we use our own way */ |
205 | irq->handler = no_action; | 205 | irq->handler = no_action; |
@@ -215,5 +215,4 @@ void __init ip22_time_init(void) | |||
215 | rtc_mips_set_time = indy_rtc_set_time; | 215 | rtc_mips_set_time = indy_rtc_set_time; |
216 | 216 | ||
217 | board_time_init = indy_time_init; | 217 | board_time_init = indy_time_init; |
218 | board_timer_setup = indy_timer_setup; | ||
219 | } | 218 | } |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index 04522faada96..b029ba79c27a 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copytight (C) 1999, 2000, 05 Ralf Baechle (ralf@linux-mips.org) | 2 | * Copytight (C) 1999, 2000, 05, 06 Ralf Baechle (ralf@linux-mips.org) |
3 | * Copytight (C) 1999, 2000 Silicon Graphics, Inc. | 3 | * Copytight (C) 1999, 2000 Silicon Graphics, Inc. |
4 | */ | 4 | */ |
5 | #include <linux/bcd.h> | 5 | #include <linux/bcd.h> |
@@ -225,7 +225,7 @@ static struct irqaction rt_irqaction = { | |||
225 | 225 | ||
226 | extern int allocate_irqno(void); | 226 | extern int allocate_irqno(void); |
227 | 227 | ||
228 | static void ip27_timer_setup(struct irqaction *irq) | 228 | void __init plat_timer_setup(struct irqaction *irq) |
229 | { | 229 | { |
230 | int irqno = allocate_irqno(); | 230 | int irqno = allocate_irqno(); |
231 | 231 | ||
@@ -256,8 +256,6 @@ void __init ip27_time_init(void) | |||
256 | xtime.tv_nsec = 0; | 256 | xtime.tv_nsec = 0; |
257 | 257 | ||
258 | do_gettimeoffset = ip27_do_gettimeoffset; | 258 | do_gettimeoffset = ip27_do_gettimeoffset; |
259 | |||
260 | board_timer_setup = ip27_timer_setup; | ||
261 | } | 259 | } |
262 | 260 | ||
263 | void __init cpu_time_init(void) | 261 | void __init cpu_time_init(void) |
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 240a2f981d08..57708fe28bd7 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c | |||
@@ -7,6 +7,7 @@ | |||
7 | * | 7 | * |
8 | * Copyright (C) 2000 Harald Koerfgen | 8 | * Copyright (C) 2000 Harald Koerfgen |
9 | * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets | 9 | * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets |
10 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> | ||
10 | */ | 11 | */ |
11 | #include <linux/console.h> | 12 | #include <linux/console.h> |
12 | #include <linux/init.h> | 13 | #include <linux/init.h> |
@@ -80,7 +81,7 @@ void __init ip32_time_init(void) | |||
80 | printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000); | 81 | printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000); |
81 | } | 82 | } |
82 | 83 | ||
83 | void __init ip32_timer_setup(struct irqaction *irq) | 84 | void __init plat_timer_setup(struct irqaction *irq) |
84 | { | 85 | { |
85 | irq->handler = no_action; | 86 | irq->handler = no_action; |
86 | setup_irq(IP32_R4K_TIMER_IRQ, irq); | 87 | setup_irq(IP32_R4K_TIMER_IRQ, irq); |
@@ -94,7 +95,6 @@ void __init plat_mem_setup(void) | |||
94 | rtc_mips_set_mmss = mc146818_set_rtc_mmss; | 95 | rtc_mips_set_mmss = mc146818_set_rtc_mmss; |
95 | 96 | ||
96 | board_time_init = ip32_time_init; | 97 | board_time_init = ip32_time_init; |
97 | board_timer_setup = ip32_timer_setup; | ||
98 | 98 | ||
99 | #ifdef CONFIG_SERIAL_8250 | 99 | #ifdef CONFIG_SERIAL_8250 |
100 | { | 100 | { |
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 2996e338cfbd..ac342f5643c9 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c | |||
@@ -77,7 +77,7 @@ void __init swarm_time_init(void) | |||
77 | #endif | 77 | #endif |
78 | } | 78 | } |
79 | 79 | ||
80 | void __init swarm_timer_setup(struct irqaction *irq) | 80 | void __init plat_timer_setup(struct irqaction *irq) |
81 | { | 81 | { |
82 | /* | 82 | /* |
83 | * we don't set up irqaction, because we will deliver timer | 83 | * we don't set up irqaction, because we will deliver timer |
@@ -117,7 +117,6 @@ void __init plat_mem_setup(void) | |||
117 | panic_timeout = 5; /* For debug. */ | 117 | panic_timeout = 5; /* For debug. */ |
118 | 118 | ||
119 | board_time_init = swarm_time_init; | 119 | board_time_init = swarm_time_init; |
120 | board_timer_setup = swarm_timer_setup; | ||
121 | board_be_handler = swarm_be_handler; | 120 | board_be_handler = swarm_be_handler; |
122 | 121 | ||
123 | if (xicor_probe()) { | 122 | if (xicor_probe()) { |
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c index e5646b027f72..4e98feb15410 100644 --- a/arch/mips/sni/setup.c +++ b/arch/mips/sni/setup.c | |||
@@ -41,7 +41,7 @@ extern void sni_machine_restart(char *command); | |||
41 | extern void sni_machine_halt(void); | 41 | extern void sni_machine_halt(void); |
42 | extern void sni_machine_power_off(void); | 42 | extern void sni_machine_power_off(void); |
43 | 43 | ||
44 | static void __init sni_rm200_pci_timer_setup(struct irqaction *irq) | 44 | void __init plat_timer_setup(struct irqaction *irq) |
45 | { | 45 | { |
46 | /* set the clock to 100 Hz */ | 46 | /* set the clock to 100 Hz */ |
47 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ | 47 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ |
@@ -270,7 +270,6 @@ void __init plat_mem_setup(void) | |||
270 | #endif | 270 | #endif |
271 | 271 | ||
272 | sni_resource_init(); | 272 | sni_resource_init(); |
273 | board_timer_setup = sni_rm200_pci_timer_setup; | ||
274 | 273 | ||
275 | _machine_restart = sni_machine_restart; | 274 | _machine_restart = sni_machine_restart; |
276 | _machine_halt = sni_machine_halt; | 275 | _machine_halt = sni_machine_halt; |
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c index 64a1b394b252..3ace4037343e 100644 --- a/arch/mips/tx4927/common/tx4927_setup.c +++ b/arch/mips/tx4927/common/tx4927_setup.c | |||
@@ -50,7 +50,6 @@ | |||
50 | #undef DEBUG | 50 | #undef DEBUG |
51 | 51 | ||
52 | void __init tx4927_time_init(void); | 52 | void __init tx4927_time_init(void); |
53 | void __init tx4927_timer_setup(struct irqaction *irq); | ||
54 | void dump_cp0(char *key); | 53 | void dump_cp0(char *key); |
55 | 54 | ||
56 | 55 | ||
@@ -66,7 +65,6 @@ static void tx4927_write_buffer_flush(void) | |||
66 | void __init plat_mem_setup(void) | 65 | void __init plat_mem_setup(void) |
67 | { | 66 | { |
68 | board_time_init = tx4927_time_init; | 67 | board_time_init = tx4927_time_init; |
69 | board_timer_setup = tx4927_timer_setup; | ||
70 | __wbflush = tx4927_write_buffer_flush; | 68 | __wbflush = tx4927_write_buffer_flush; |
71 | 69 | ||
72 | #ifdef CONFIG_TOSHIBA_RBTX4927 | 70 | #ifdef CONFIG_TOSHIBA_RBTX4927 |
@@ -91,7 +89,7 @@ void __init tx4927_time_init(void) | |||
91 | } | 89 | } |
92 | 90 | ||
93 | 91 | ||
94 | void __init tx4927_timer_setup(struct irqaction *irq) | 92 | void __init plat_timer_setup(struct irqaction *irq) |
95 | { | 93 | { |
96 | u32 count; | 94 | u32 count; |
97 | u32 c1; | 95 | u32 c1; |
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c index ef59a5cffc69..71859c4fee84 100644 --- a/arch/mips/tx4938/common/setup.c +++ b/arch/mips/tx4938/common/setup.c | |||
@@ -39,7 +39,6 @@ extern void rbtx4938_time_init(void); | |||
39 | 39 | ||
40 | void __init tx4938_setup(void); | 40 | void __init tx4938_setup(void); |
41 | void __init tx4938_time_init(void); | 41 | void __init tx4938_time_init(void); |
42 | void __init tx4938_timer_setup(struct irqaction *irq); | ||
43 | void dump_cp0(char *key); | 42 | void dump_cp0(char *key); |
44 | 43 | ||
45 | void (*__wbflush) (void); | 44 | void (*__wbflush) (void); |
@@ -64,7 +63,6 @@ void __init | |||
64 | plat_mem_setup(void) | 63 | plat_mem_setup(void) |
65 | { | 64 | { |
66 | board_time_init = tx4938_time_init; | 65 | board_time_init = tx4938_time_init; |
67 | board_timer_setup = tx4938_timer_setup; | ||
68 | __wbflush = tx4938_write_buffer_flush; | 66 | __wbflush = tx4938_write_buffer_flush; |
69 | toshiba_rbtx4938_setup(); | 67 | toshiba_rbtx4938_setup(); |
70 | } | 68 | } |
@@ -75,8 +73,7 @@ tx4938_time_init(void) | |||
75 | rbtx4938_time_init(); | 73 | rbtx4938_time_init(); |
76 | } | 74 | } |
77 | 75 | ||
78 | void __init | 76 | void __init plat_timer_setup(struct irqaction *irq) |
79 | tx4938_timer_setup(struct irqaction *irq) | ||
80 | { | 77 | { |
81 | u32 count; | 78 | u32 count; |
82 | u32 c1; | 79 | u32 c1; |
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 915bfa5c0719..625f22f00384 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c | |||
@@ -47,7 +47,7 @@ static void __init setup_timer_frequency(void) | |||
47 | mips_hpt_frequency = tclock / 4; | 47 | mips_hpt_frequency = tclock / 4; |
48 | } | 48 | } |
49 | 49 | ||
50 | static void __init setup_timer_irq(struct irqaction *irq) | 50 | void __init plat_timer_setup(struct irqaction *irq) |
51 | { | 51 | { |
52 | setup_irq(TIMER_IRQ, irq); | 52 | setup_irq(TIMER_IRQ, irq); |
53 | } | 53 | } |
@@ -55,7 +55,6 @@ static void __init setup_timer_irq(struct irqaction *irq) | |||
55 | static void __init timer_init(void) | 55 | static void __init timer_init(void) |
56 | { | 56 | { |
57 | board_time_init = setup_timer_frequency; | 57 | board_time_init = setup_timer_frequency; |
58 | board_timer_setup = setup_timer_irq; | ||
59 | } | 58 | } |
60 | 59 | ||
61 | void __init plat_mem_setup(void) | 60 | void __init plat_mem_setup(void) |
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index d897c8bb554d..2d543735668b 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h | |||
@@ -83,11 +83,11 @@ extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs); | |||
83 | /* | 83 | /* |
84 | * board specific routines required by time_init(). | 84 | * board specific routines required by time_init(). |
85 | * board_time_init is defaulted to NULL and can remain so. | 85 | * board_time_init is defaulted to NULL and can remain so. |
86 | * board_timer_setup must be setup properly in machine setup routine. | 86 | * plat_timer_setup must be setup properly in machine setup routine. |
87 | */ | 87 | */ |
88 | struct irqaction; | 88 | struct irqaction; |
89 | extern void (*board_time_init)(void); | 89 | extern void (*board_time_init)(void); |
90 | extern void (*board_timer_setup)(struct irqaction *irq); | 90 | extern void plat_timer_setup(struct irqaction *irq); |
91 | 91 | ||
92 | /* | 92 | /* |
93 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible | 93 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible |