4 files changed, 175 insertions, 2 deletions

diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index 3ec76586877e..8f37a14e6378 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -185,6 +185,27 @@ config CMDLINE
 
 endmenu
 
+menu "Power managment options"
+
+menu "CPU Frequency scaling"
+
+source "drivers/cpufreq/Kconfig"
+
+config CPU_FREQ_AT32AP
+        bool "CPU frequency driver for AT32AP"
+        depends on CPU_FREQ && PLATFORM_AT32AP
+        default n
+        help
+          This enables the CPU frequency driver for AT32AP processors.
+
+          For details, take a look in <file:Documentation/cpu-freq>.
+
+          If in doubt, say N.
+
+endmenu
+
+endmenu
+
 menu "Bus options"
 
 config PCI
diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
index f1d395724ac6..a8b445046e3e 100644
--- a/arch/avr32/mach-at32ap/Makefile
+++ b/arch/avr32/mach-at32ap/Makefile
@@ -1,3 +1,4 @@
 obj-y                           += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
 obj-$(CONFIG_CPU_AT32AP7000)    += at32ap7000.o
 obj-$(CONFIG_CPU_AT32AP7000)    += time-tc.o
+obj-$(CONFIG_CPU_FREQ_AT32AP)   += cpufreq.o
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 5faa97e5ab16..c74f3715f3f1 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -219,6 +219,41 @@ static unsigned long cpu_clk_get_rate(struct clk *clk)
         return bus_clk_get_rate(clk, shift);
 }
 
+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+{
+        u32 control;
+        unsigned long parent_rate, child_div, actual_rate, div;
+
+        parent_rate = clk->parent->get_rate(clk->parent);
+        control = pm_readl(CKSEL);
+
+        if (control & PM_BIT(HSBDIV))
+                child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+        else
+                child_div = 1;
+
+        if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+                actual_rate = parent_rate;
+                control &= ~PM_BIT(CPUDIV);
+        } else {
+                unsigned int cpusel;
+                div = (parent_rate + rate / 2) / rate;
+                if (div > child_div)
+                        div = child_div;
+                cpusel = (div > 1) ? (fls(div) - 2) : 0;
+                control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+                actual_rate = parent_rate / (1 << (cpusel + 1));
+        }
+
+        pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+                        clk->name, rate, actual_rate);
+
+        if (apply)
+                pm_writel(CKSEL, control);
+
+        return actual_rate;
+}
+
 static void hsb_clk_mode(struct clk *clk, int enabled)
 {
         unsigned long flags;
@@ -300,6 +335,7 @@ static unsigned long pbb_clk_get_rate(struct clk *clk)
 static struct clk cpu_clk = {
         .name           = "cpu",
         .get_rate       = cpu_clk_get_rate,
+        .set_rate       = cpu_clk_set_rate,
         .users          = 1,
 };
 static struct clk hsb_clk = {
@@ -1152,10 +1188,13 @@ void __init at32_clock_init(void)
         u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
         int i;
 
-        if (pm_readl(MCCTRL) & PM_BIT(PLLSEL))
+        if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
                 main_clock = &pll0;
-        else
+                cpu_clk.parent = &pll0;
+        } else {
                 main_clock = &osc0;
+                cpu_clk.parent = &osc0;
+        }
 
         if (pm_readl(PLL0) & PM_BIT(PLLOSC))
                 pll0.parent = &osc1;
diff --git a/arch/avr32/mach-at32ap/cpufreq.c b/arch/avr32/mach-at32ap/cpufreq.c
new file mode 100644
index 000000000000..235524b79193
--- /dev/null
+++ b/arch/avr32/mach-at32ap/cpufreq.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright (C) 2004-2007 Atmel Corporation
+ *
+ * Based on MIPS implementation arch/mips/kernel/time.c
+ *   Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*#define DEBUG*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <asm/system.h>
+
+static struct clk *cpuclk;
+
+static int at32_verify_speed(struct cpufreq_policy *policy)
+{
+        if (policy->cpu != 0)
+                return -EINVAL;
+
+        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+                        policy->cpuinfo.max_freq);
+        return 0;
+}
+
+static unsigned int at32_get_speed(unsigned int cpu)
+{
+        /* No SMP support */
+        if (cpu)
+                return 0;
+        return (unsigned int)((clk_get_rate(cpuclk) + 500) / 1000);
+}
+
+static int at32_set_target(struct cpufreq_policy *policy,
+                          unsigned int target_freq,
+                          unsigned int relation)
+{
+        struct cpufreq_freqs freqs;
+        long freq;
+
+        /* Convert target_freq from kHz to Hz */
+        freq = clk_round_rate(cpuclk, target_freq * 1000);
+
+        /* Check if policy->min <= new_freq <= policy->max */
+        if(freq < (policy->min * 1000) || freq > (policy->max * 1000))
+                return -EINVAL;
+
+        pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
+
+        freqs.old = at32_get_speed(0);
+        freqs.new = (freq + 500) / 1000;
+        freqs.cpu = 0;
+        freqs.flags = 0;
+
+        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+        clk_set_rate(cpuclk, freq);
+        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+        pr_debug("cpufreq: set frequency %lu Hz\n", freq);
+
+        return 0;
+}
+
+static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy)
+{
+        if (policy->cpu != 0)
+                return -EINVAL;
+
+        cpuclk = clk_get(NULL, "cpu");
+        if (IS_ERR(cpuclk)) {
+                pr_debug("cpufreq: could not get CPU clk\n");
+                return PTR_ERR(cpuclk);
+        }
+
+        policy->cpuinfo.min_freq = (clk_round_rate(cpuclk, 1) + 500) / 1000;
+        policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
+        policy->cpuinfo.transition_latency = 0;
+        policy->cur = at32_get_speed(0);
+        policy->min = policy->cpuinfo.min_freq;
+        policy->max = policy->cpuinfo.max_freq;
+        policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+
+        printk("cpufreq: AT32AP CPU frequency driver\n");
+
+        return 0;
+}
+
+static struct cpufreq_driver at32_driver = {
+        .name           = "at32ap",
+        .owner          = THIS_MODULE,
+        .init           = at32_cpufreq_driver_init,
+        .verify         = at32_verify_speed,
+        .target         = at32_set_target,
+        .get            = at32_get_speed,
+        .flags          = CPUFREQ_STICKY,
+};
+
+static int __init at32_cpufreq_init(void)
+{
+        return cpufreq_register_driver(&at32_driver);
+}
+
+arch_initcall(at32_cpufreq_init);