aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--include/asm-cris/dma-mapping.h170
-rw-r--r--include/asm-cris/dma.h8
-rw-r--r--include/asm-cris/io.h103
-rw-r--r--include/asm-cris/pci.h102
4 files changed, 298 insertions, 85 deletions
diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h
index 0d770f60127a..0b5c3fdaefe1 100644
--- a/include/asm-cris/dma-mapping.h
+++ b/include/asm-cris/dma-mapping.h
@@ -1,125 +1,179 @@
1/* DMA mapping. Nothing tricky here, just virt_to_phys */
2
1#ifndef _ASM_CRIS_DMA_MAPPING_H 3#ifndef _ASM_CRIS_DMA_MAPPING_H
2#define _ASM_CRIS_DMA_MAPPING_H 4#define _ASM_CRIS_DMA_MAPPING_H
3 5
4#include "scatterlist.h" 6#include <linux/mm.h>
7#include <linux/kernel.h>
5 8
6static inline int 9#include <asm/cache.h>
7dma_supported(struct device *dev, u64 mask) 10#include <asm/io.h>
8{ 11#include <asm/scatterlist.h>
9 BUG();
10 return 0;
11}
12 12
13static inline int 13#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
14dma_set_mask(struct device *dev, u64 dma_mask) 14#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
15{ 15
16 BUG(); 16#ifdef CONFIG_PCI
17 return 1; 17void *dma_alloc_coherent(struct device *dev, size_t size,
18} 18 dma_addr_t *dma_handle, int flag);
19 19
20void dma_free_coherent(struct device *dev, size_t size,
21 void *vaddr, dma_addr_t dma_handle);
22#else
20static inline void * 23static inline void *
21dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 24dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
22 int flag) 25 int flag)
23{ 26{
24 BUG(); 27 BUG();
25 return NULL; 28 return NULL;
26} 29}
27 30
28static inline void 31static inline void
29dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 32dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
30 dma_addr_t dma_handle) 33 dma_addr_t dma_handle)
31{ 34{
32 BUG(); 35 BUG();
33} 36}
34 37#endif
35static inline dma_addr_t 38static inline dma_addr_t
36dma_map_single(struct device *dev, void *cpu_addr, size_t size, 39dma_map_single(struct device *dev, void *ptr, size_t size,
37 enum dma_data_direction direction) 40 enum dma_data_direction direction)
38{ 41{
39 BUG(); 42 BUG_ON(direction == DMA_NONE);
40 return 0; 43 return virt_to_phys(ptr);
41} 44}
42 45
43static inline void 46static inline void
44dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 47dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
45 enum dma_data_direction direction) 48 enum dma_data_direction direction)
46{ 49{
47 BUG(); 50 BUG_ON(direction == DMA_NONE);
51}
52
53static inline int
54dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
55 enum dma_data_direction direction)
56{
57 printk("Map sg\n");
58 return nents;
48} 59}
49 60
50static inline dma_addr_t 61static inline dma_addr_t
51dma_map_page(struct device *dev, struct page *page, 62dma_map_page(struct device *dev, struct page *page, unsigned long offset,
52 unsigned long offset, size_t size, 63 size_t size, enum dma_data_direction direction)
53 enum dma_data_direction direction)
54{ 64{
55 BUG(); 65 BUG_ON(direction == DMA_NONE);
56 return 0; 66 return page_to_phys(page) + offset;
57} 67}
58 68
59static inline void 69static inline void
60dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, 70dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
61 enum dma_data_direction direction) 71 enum dma_data_direction direction)
62{ 72{
63 BUG(); 73 BUG_ON(direction == DMA_NONE);
64} 74}
65 75
66static inline int
67dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
68 enum dma_data_direction direction)
69{
70 BUG();
71 return 1;
72}
73 76
74static inline void 77static inline void
75dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, 78dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
76 enum dma_data_direction direction) 79 enum dma_data_direction direction)
77{ 80{
78 BUG(); 81 BUG_ON(direction == DMA_NONE);
79} 82}
80 83
81static inline void 84static inline void
82dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size, 85dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
83 enum dma_data_direction direction) 86 enum dma_data_direction direction)
84{ 87{
85 BUG();
86} 88}
87 89
88static inline void 90static inline void
89dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, 91dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
90 enum dma_data_direction direction) 92 enum dma_data_direction direction)
91{ 93{
92 BUG();
93} 94}
94 95
95/* Now for the API extensions over the pci_ one */ 96static inline void
97dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
98 unsigned long offset, size_t size,
99 enum dma_data_direction direction)
100{
101}
96 102
97#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 103static inline void
98#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 104dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
99#define dma_is_consistent(d) (1) 105 unsigned long offset, size_t size,
106 enum dma_data_direction direction)
107{
108}
100 109
101static inline int 110static inline void
102dma_get_cache_alignment(void) 111dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
112 enum dma_data_direction direction)
103{ 113{
104 /* no easy way to get cache size on all processors, so return
105 * the maximum possible, to be safe */
106 return (1 << L1_CACHE_SHIFT_MAX);
107} 114}
108 115
109static inline void 116static inline void
110dma_sync_single_range(struct device *dev, dma_addr_t dma_handle, 117dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
111 unsigned long offset, size_t size, 118 enum dma_data_direction direction)
112 enum dma_data_direction direction)
113{ 119{
114 BUG();
115} 120}
116 121
122static inline int
123dma_mapping_error(dma_addr_t dma_addr)
124{
125 return 0;
126}
127
128static inline int
129dma_supported(struct device *dev, u64 mask)
130{
131 /*
132 * we fall back to GFP_DMA when the mask isn't all 1s,
133 * so we can't guarantee allocations that must be
134 * within a tighter range than GFP_DMA..
135 */
136 if(mask < 0x00ffffff)
137 return 0;
138
139 return 1;
140}
141
142static inline int
143dma_set_mask(struct device *dev, u64 mask)
144{
145 if(!dev->dma_mask || !dma_supported(dev, mask))
146 return -EIO;
147
148 *dev->dma_mask = mask;
149
150 return 0;
151}
152
153static inline int
154dma_get_cache_alignment(void)
155{
156 return (1 << L1_CACHE_SHIFT_MAX);
157}
158
159#define dma_is_consistent(d) (1)
160
117static inline void 161static inline void
118dma_cache_sync(void *vaddr, size_t size, 162dma_cache_sync(void *vaddr, size_t size,
119 enum dma_data_direction direction) 163 enum dma_data_direction direction)
120{ 164{
121 BUG();
122} 165}
123 166
124#endif 167#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
168extern int
169dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
170 dma_addr_t device_addr, size_t size, int flags);
171
172extern void
173dma_release_declared_memory(struct device *dev);
125 174
175extern void *
176dma_mark_declared_memory_occupied(struct device *dev,
177 dma_addr_t device_addr, size_t size);
178
179#endif
diff --git a/include/asm-cris/dma.h b/include/asm-cris/dma.h
index c229fac35cdc..6f188dc56138 100644
--- a/include/asm-cris/dma.h
+++ b/include/asm-cris/dma.h
@@ -10,4 +10,12 @@
10 10
11#define MAX_DMA_ADDRESS PAGE_OFFSET 11#define MAX_DMA_ADDRESS PAGE_OFFSET
12 12
13/* From PCI */
14
15#ifdef CONFIG_PCI
16extern int isa_dma_bridge_buggy;
17#else
18#define isa_dma_bridge_buggy (0)
19#endif
20
13#endif /* _ASM_DMA_H */ 21#endif /* _ASM_DMA_H */
diff --git a/include/asm-cris/io.h b/include/asm-cris/io.h
index 1d2b51701e8d..16e791b3c721 100644
--- a/include/asm-cris/io.h
+++ b/include/asm-cris/io.h
@@ -3,6 +3,21 @@
3 3
4#include <asm/page.h> /* for __va, __pa */ 4#include <asm/page.h> /* for __va, __pa */
5#include <asm/arch/io.h> 5#include <asm/arch/io.h>
6#include <linux/kernel.h>
7
8struct cris_io_operations
9{
10 u32 (*read_mem)(void *addr, int size);
11 void (*write_mem)(u32 val, int size, void *addr);
12 u32 (*read_io)(u32 port, void *addr, int size, int count);
13 void (*write_io)(u32 port, void *addr, int size, int count);
14};
15
16#ifdef CONFIG_PCI
17extern struct cris_io_operations *cris_iops;
18#else
19#define cris_iops ((struct cris_io_operations*)NULL)
20#endif
6 21
7/* 22/*
8 * Change virtual addresses to physical addresses and vv. 23 * Change virtual addresses to physical addresses and vv.
@@ -18,14 +33,17 @@ extern inline void * phys_to_virt(unsigned long address)
18 return __va(address); 33 return __va(address);
19} 34}
20 35
21extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); 36extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
37extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot);
22 38
23extern inline void * ioremap (unsigned long offset, unsigned long size) 39extern inline void __iomem * ioremap (unsigned long offset, unsigned long size)
24{ 40{
25 return __ioremap(offset, size, 0); 41 return __ioremap(offset, size, 0);
26} 42}
27 43
28extern void iounmap(void *addr); 44extern void iounmap(volatile void * __iomem addr);
45
46extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
29 47
30/* 48/*
31 * IO bus memory addresses are also 1:1 with the physical address 49 * IO bus memory addresses are also 1:1 with the physical address
@@ -39,9 +57,32 @@ extern void iounmap(void *addr);
39 * differently. On the CRIS architecture, we just read/write the 57 * differently. On the CRIS architecture, we just read/write the
40 * memory location directly. 58 * memory location directly.
41 */ 59 */
42#define readb(addr) (*(volatile unsigned char *) (addr)) 60#ifdef CONFIG_PCI
43#define readw(addr) (*(volatile unsigned short *) (addr)) 61#define PCI_SPACE(x) ((((unsigned)(x)) & 0x10000000) == 0x10000000)
44#define readl(addr) (*(volatile unsigned int *) (addr)) 62#else
63#define PCI_SPACE(x) 0
64#endif
65static inline unsigned char readb(const volatile void __iomem *addr)
66{
67 if (PCI_SPACE(addr) && cris_iops)
68 return cris_iops->read_mem((void*)addr, 1);
69 else
70 return *(volatile unsigned char __force *) addr;
71}
72static inline unsigned short readw(const volatile void __iomem *addr)
73{
74 if (PCI_SPACE(addr) && cris_iops)
75 return cris_iops->read_mem((void*)addr, 2);
76 else
77 return *(volatile unsigned short __force *) addr;
78}
79static inline unsigned int readl(const volatile void __iomem *addr)
80{
81 if (PCI_SPACE(addr) && cris_iops)
82 return cris_iops->read_mem((void*)addr, 4);
83 else
84 return *(volatile unsigned int __force *) addr;
85}
45#define readb_relaxed(addr) readb(addr) 86#define readb_relaxed(addr) readb(addr)
46#define readw_relaxed(addr) readw(addr) 87#define readw_relaxed(addr) readw(addr)
47#define readl_relaxed(addr) readl(addr) 88#define readl_relaxed(addr) readl(addr)
@@ -49,9 +90,27 @@ extern void iounmap(void *addr);
49#define __raw_readw readw 90#define __raw_readw readw
50#define __raw_readl readl 91#define __raw_readl readl
51 92
52#define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b)) 93static inline void writeb(unsigned char b, volatile void __iomem *addr)
53#define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b)) 94{
54#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) 95 if (PCI_SPACE(addr) && cris_iops)
96 cris_iops->write_mem(b, 1, (void*)addr);
97 else
98 *(volatile unsigned char __force *) addr = b;
99}
100static inline void writew(unsigned short b, volatile void __iomem *addr)
101{
102 if (PCI_SPACE(addr) && cris_iops)
103 cris_iops->write_mem(b, 2, (void*)addr);
104 else
105 *(volatile unsigned short __force *) addr = b;
106}
107static inline void writel(unsigned int b, volatile void __iomem *addr)
108{
109 if (PCI_SPACE(addr) && cris_iops)
110 cris_iops->write_mem(b, 4, (void*)addr);
111 else
112 *(volatile unsigned int __force *) addr = b;
113}
55#define __raw_writeb writeb 114#define __raw_writeb writeb
56#define __raw_writew writew 115#define __raw_writew writew
57#define __raw_writel writel 116#define __raw_writel writel
@@ -66,25 +125,25 @@ extern void iounmap(void *addr);
66 * Again, CRIS does not require mem IO specific function. 125 * Again, CRIS does not require mem IO specific function.
67 */ 126 */
68 127
69#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d)) 128#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
70 129
71/* The following is junk needed for the arch-independent code but which 130/* The following is junk needed for the arch-independent code but which
72 * we never use in the CRIS port 131 * we never use in the CRIS port
73 */ 132 */
74 133
75#define IO_SPACE_LIMIT 0xffff 134#define IO_SPACE_LIMIT 0xffff
76#define inb(x) (0) 135#define inb(port) (cris_iops ? cris_iops->read_io(port,NULL,1,1) : 0)
77#define inw(x) (0) 136#define inw(port) (cris_iops ? cris_iops->read_io(port,NULL,2,1) : 0)
78#define inl(x) (0) 137#define inl(port) (cris_iops ? cris_iops->read_io(port,NULL,4,1) : 0)
79#define outb(x,y) 138#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0)
80#define outw(x,y) 139#define insw(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,2,count) : 0)
81#define outl(x,y) 140#define insl(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,4,count) : 0)
82#define insb(x,y,z) 141#define outb(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,1,1)
83#define insw(x,y,z) 142#define outw(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,2,1)
84#define insl(x,y,z) 143#define outl(data,port) if (cris_iops) cris_iops->write_io(port,(void*)(unsigned)data,4,1)
85#define outsb(x,y,z) 144#define outsb(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,1,count)
86#define outsw(x,y,z) 145#define outsw(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,2,count)
87#define outsl(x,y,z) 146#define outsl(port,addr,count) if(cris_iops) cris_iops->write_io(port,(void*)addr,3,count)
88 147
89/* 148/*
90 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 149 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
diff --git a/include/asm-cris/pci.h b/include/asm-cris/pci.h
index c61041531889..2064bc1de074 100644
--- a/include/asm-cris/pci.h
+++ b/include/asm-cris/pci.h
@@ -1,13 +1,105 @@
1#ifndef __ASM_CRIS_PCI_H 1#ifndef __ASM_CRIS_PCI_H
2#define __ASM_CRIS_PCI_H 2#define __ASM_CRIS_PCI_H
3 3
4#include <linux/config.h>
5
6#ifdef __KERNEL__
7#include <linux/mm.h> /* for struct page */
8
9/* Can be used to override the logic in pci_scan_bus for skipping
10 already-configured bus numbers - to be used for buggy BIOSes
11 or architectures with incomplete PCI setup by the loader */
12
13#define pcibios_assign_all_busses(void) 1
14
15extern unsigned long pci_mem_start;
16#define PCIBIOS_MIN_IO 0x1000
17#define PCIBIOS_MIN_MEM 0x10000000
18
19#define PCIBIOS_MIN_CARDBUS_IO 0x4000
20
21void pcibios_config_init(void);
22struct pci_bus * pcibios_scan_root(int bus);
23int pcibios_assign_resources(void);
24
25void pcibios_set_master(struct pci_dev *dev);
26void pcibios_penalize_isa_irq(int irq);
27struct irq_routing_table *pcibios_get_irq_routing_table(void);
28int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
29
30/* Dynamic DMA mapping stuff.
31 * i386 has everything mapped statically.
32 */
33
34#include <linux/types.h>
35#include <linux/slab.h>
4#include <asm/scatterlist.h> 36#include <asm/scatterlist.h>
5#include <asm-generic/pci-dma-compat.h> 37#include <linux/string.h>
38#include <asm/io.h>
6 39
7/* ETRAX chips don't have a PCI bus. This file is just here because some stupid .c code 40struct pci_dev;
8 * includes it even if CONFIG_PCI is not set. 41
42/* The PCI address space does equal the physical memory
43 * address space. The networking and block device layers use
44 * this boolean for bounce buffer decisions.
9 */ 45 */
10#define PCI_DMA_BUS_IS_PHYS (1) 46#define PCI_DMA_BUS_IS_PHYS (1)
11 47
12#endif /* __ASM_CRIS_PCI_H */ 48/* pci_unmap_{page,single} is a nop so... */
49#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
50#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
51#define pci_unmap_addr(PTR, ADDR_NAME) (0)
52#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
53#define pci_unmap_len(PTR, LEN_NAME) (0)
54#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
55
56/* This is always fine. */
57#define pci_dac_dma_supported(pci_dev, mask) (1)
13 58
59static inline dma64_addr_t
60pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
61{
62 return ((dma64_addr_t) page_to_phys(page) +
63 (dma64_addr_t) offset);
64}
65
66static inline struct page *
67pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
68{
69 return pfn_to_page(dma_addr >> PAGE_SHIFT);
70}
71
72static inline unsigned long
73pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
74{
75 return (dma_addr & ~PAGE_MASK);
76}
77
78static inline void
79pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
80{
81}
82
83static inline void
84pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
85{
86}
87
88#define HAVE_PCI_MMAP
89extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
90 enum pci_mmap_state mmap_state, int write_combine);
91
92
93static inline void pcibios_add_platform_entries(struct pci_dev *dev)
94{
95}
96
97#endif /* __KERNEL__ */
98
99/* implement the pci_ DMA API in terms of the generic device dma_ one */
100#include <asm-generic/pci-dma-compat.h>
101
102/* generic pci stuff */
103#include <asm-generic/pci.h>
104
105#endif /* __ASM_CRIS_PCI_H */