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-rw-r--r--arch/mips/kernel/cpu-probe.c3
-rw-r--r--arch/mips/kernel/proc.c1
-rw-r--r--arch/mips/mm/tlbex.c1
-rw-r--r--include/asm-mips/addrspace.h2
-rw-r--r--include/asm-mips/cpu.h4
5 files changed, 9 insertions, 2 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f7a841573b84..a263fb7a3971 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -623,6 +623,9 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
623 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); 623 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
624#endif 624#endif
625 break; 625 break;
626 case PRID_IMP_SB1A:
627 c->cputype = CPU_SB1A;
628 break;
626 } 629 }
627} 630}
628 631
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index f2b0446e44bc..86fe15b273cd 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -56,6 +56,7 @@ static const char *cpu_name[] = {
56 [CPU_5KC] = "MIPS 5Kc", 56 [CPU_5KC] = "MIPS 5Kc",
57 [CPU_R4310] = "R4310", 57 [CPU_R4310] = "R4310",
58 [CPU_SB1] = "SiByte SB1", 58 [CPU_SB1] = "SiByte SB1",
59 [CPU_SB1A] = "SiByte SB1A",
59 [CPU_TX3912] = "TX3912", 60 [CPU_TX3912] = "TX3912",
60 [CPU_TX3922] = "TX3922", 61 [CPU_TX3922] = "TX3922",
61 [CPU_TX3927] = "TX3927", 62 [CPU_TX3927] = "TX3927",
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 240537d263ff..0f9485806bac 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -854,6 +854,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
854 case CPU_R12000: 854 case CPU_R12000:
855 case CPU_4KC: 855 case CPU_4KC:
856 case CPU_SB1: 856 case CPU_SB1:
857 case CPU_SB1A:
857 case CPU_4KSC: 858 case CPU_4KSC:
858 case CPU_20KC: 859 case CPU_20KC:
859 case CPU_25KF: 860 case CPU_25KF:
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 16c1c08d0a03..42520cc84b0f 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -162,7 +162,7 @@
162#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ 162#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
163#endif 163#endif
164 164
165#if defined(CONFIG_CPU_SB1) 165#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
166#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ 166#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
167#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */ 167#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */
168#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */ 168#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 46b2a8dc2ee0..48eac296060f 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -93,6 +93,7 @@
93 */ 93 */
94 94
95#define PRID_IMP_SB1 0x0100 95#define PRID_IMP_SB1 0x0100
96#define PRID_IMP_SB1A 0x1100
96 97
97/* 98/*
98 * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT 99 * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
@@ -194,7 +195,8 @@
194#define CPU_AU1200 59 195#define CPU_AU1200 59
195#define CPU_34K 60 196#define CPU_34K 60
196#define CPU_PR4450 61 197#define CPU_PR4450 61
197#define CPU_LAST 61 198#define CPU_SB1A 62
199#define CPU_LAST 62
198 200
199/* 201/*
200 * ISA Level encodings 202 * ISA Level encodings