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-rw-r--r--arch/arm/mach-ixp2000/core.c85
-rw-r--r--arch/arm/mach-ixp4xx/common.c8
-rw-r--r--arch/arm/mm/proc-v6.S6
-rw-r--r--drivers/i2c/busses/i2c-ixp2000.c3
-rw-r--r--fs/qnx4/dir.c2
-rw-r--r--fs/qnx4/inode.c4
-rw-r--r--include/asm-arm/arch-ixp2000/gpio.h31
-rw-r--r--include/asm-arm/arch-ixp2000/io.h76
-rw-r--r--include/asm-arm/arch-ixp2000/platform.h22
-rw-r--r--include/asm-arm/arch-ixp4xx/debug-macro.S1
-rw-r--r--include/asm-arm/arch-ixp4xx/ixp4xx-regs.h10
-rw-r--r--include/asm-arm/io.h2
-rw-r--r--include/asm-i386/string.h32
-rw-r--r--include/linux/qnx4_fs.h18
-rw-r--r--include/linux/qnxtypes.h16
15 files changed, 222 insertions, 94 deletions
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index fc0555596d6d..0ee34acb8d7b 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -40,6 +40,8 @@
40#include <asm/mach/time.h> 40#include <asm/mach/time.h>
41#include <asm/mach/irq.h> 41#include <asm/mach/irq.h>
42 42
43#include <asm/arch/gpio.h>
44
43static DEFINE_SPINLOCK(ixp2000_slowport_lock); 45static DEFINE_SPINLOCK(ixp2000_slowport_lock);
44static unsigned long ixp2000_slowport_irq_flags; 46static unsigned long ixp2000_slowport_irq_flags;
45 47
@@ -179,7 +181,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
179 181
180 /* clear timer 1 */ 182 /* clear timer 1 */
181 ixp2000_reg_write(IXP2000_T1_CLR, 1); 183 ixp2000_reg_write(IXP2000_T1_CLR, 1);
182 184
183 while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) { 185 while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) {
184 timer_tick(regs); 186 timer_tick(regs);
185 next_jiffy_time -= ticks_per_jiffy; 187 next_jiffy_time -= ticks_per_jiffy;
@@ -238,35 +240,40 @@ void __init ixp2000_init_time(unsigned long tick_rate)
238/************************************************************************* 240/*************************************************************************
239 * GPIO helpers 241 * GPIO helpers
240 *************************************************************************/ 242 *************************************************************************/
241static unsigned long GPIO_IRQ_rising_edge;
242static unsigned long GPIO_IRQ_falling_edge; 243static unsigned long GPIO_IRQ_falling_edge;
244static unsigned long GPIO_IRQ_rising_edge;
243static unsigned long GPIO_IRQ_level_low; 245static unsigned long GPIO_IRQ_level_low;
244static unsigned long GPIO_IRQ_level_high; 246static unsigned long GPIO_IRQ_level_high;
245 247
246void gpio_line_config(int line, int style) 248static void update_gpio_int_csrs(void)
249{
250 ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge);
251 ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge);
252 ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low);
253 ixp2000_reg_write(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high);
254}
255
256void gpio_line_config(int line, int direction)
247{ 257{
248 unsigned long flags; 258 unsigned long flags;
249 259
250 local_irq_save(flags); 260 local_irq_save(flags);
261 if (direction == GPIO_OUT) {
262 irq_desc[line + IRQ_IXP2000_GPIO0].valid = 0;
251 263
252 if(style == GPIO_OUT) {
253 /* if it's an output, it ain't an interrupt anymore */ 264 /* if it's an output, it ain't an interrupt anymore */
254 ixp2000_reg_write(IXP2000_GPIO_PDSR, (1 << line));
255 GPIO_IRQ_falling_edge &= ~(1 << line); 265 GPIO_IRQ_falling_edge &= ~(1 << line);
256 GPIO_IRQ_rising_edge &= ~(1 << line); 266 GPIO_IRQ_rising_edge &= ~(1 << line);
257 GPIO_IRQ_level_low &= ~(1 << line); 267 GPIO_IRQ_level_low &= ~(1 << line);
258 GPIO_IRQ_level_high &= ~(1 << line); 268 GPIO_IRQ_level_high &= ~(1 << line);
259 ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge); 269 update_gpio_int_csrs();
260 ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge); 270
261 ixp2000_reg_write(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high); 271 ixp2000_reg_write(IXP2000_GPIO_PDSR, 1 << line);
262 ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low); 272 } else if (direction == GPIO_IN) {
263 irq_desc[line+IRQ_IXP2000_GPIO0].valid = 0; 273 ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line);
264 } else if(style == GPIO_IN) {
265 ixp2000_reg_write(IXP2000_GPIO_PDCR, (1 << line));
266 } 274 }
267
268 local_irq_restore(flags); 275 local_irq_restore(flags);
269} 276}
270 277
271 278
272/************************************************************************* 279/*************************************************************************
@@ -285,9 +292,50 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc, str
285 } 292 }
286} 293}
287 294
295static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
296{
297 int line = irq - IRQ_IXP2000_GPIO0;
298
299 /*
300 * First, configure this GPIO line as an input.
301 */
302 ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line);
303
304 /*
305 * Then, set the proper trigger type.
306 */
307 if (type & IRQT_FALLING)
308 GPIO_IRQ_falling_edge |= 1 << line;
309 else
310 GPIO_IRQ_falling_edge &= ~(1 << line);
311 if (type & IRQT_RISING)
312 GPIO_IRQ_rising_edge |= 1 << line;
313 else
314 GPIO_IRQ_rising_edge &= ~(1 << line);
315 if (type & IRQT_LOW)
316 GPIO_IRQ_level_low |= 1 << line;
317 else
318 GPIO_IRQ_level_low &= ~(1 << line);
319 if (type & IRQT_HIGH)
320 GPIO_IRQ_level_high |= 1 << line;
321 else
322 GPIO_IRQ_level_high &= ~(1 << line);
323 update_gpio_int_csrs();
324
325 /*
326 * Finally, mark the corresponding IRQ as valid.
327 */
328 irq_desc[irq].valid = 1;
329
330 return 0;
331}
332
288static void ixp2000_GPIO_irq_mask_ack(unsigned int irq) 333static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
289{ 334{
290 ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); 335 ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
336
337 ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
338 ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
291 ixp2000_reg_write(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0))); 339 ixp2000_reg_write(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
292} 340}
293 341
@@ -302,6 +350,7 @@ static void ixp2000_GPIO_irq_unmask(unsigned int irq)
302} 350}
303 351
304static struct irqchip ixp2000_GPIO_irq_chip = { 352static struct irqchip ixp2000_GPIO_irq_chip = {
353 .type = ixp2000_GPIO_irq_type,
305 .ack = ixp2000_GPIO_irq_mask_ack, 354 .ack = ixp2000_GPIO_irq_mask_ack,
306 .mask = ixp2000_GPIO_irq_mask, 355 .mask = ixp2000_GPIO_irq_mask,
307 .unmask = ixp2000_GPIO_irq_unmask 356 .unmask = ixp2000_GPIO_irq_unmask
@@ -338,7 +387,7 @@ static void ixp2000_irq_mask(unsigned int irq)
338 387
339static void ixp2000_irq_unmask(unsigned int irq) 388static void ixp2000_irq_unmask(unsigned int irq)
340{ 389{
341 ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq)); 390 ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq));
342} 391}
343 392
344static struct irqchip ixp2000_irq_chip = { 393static struct irqchip ixp2000_irq_chip = {
@@ -375,16 +424,16 @@ void __init ixp2000_init_irq(void)
375 * our mask/unmask code much simpler. 424 * our mask/unmask code much simpler.
376 */ 425 */
377 for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { 426 for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) {
378 if((1 << irq) & IXP2000_VALID_IRQ_MASK) { 427 if ((1 << irq) & IXP2000_VALID_IRQ_MASK) {
379 set_irq_chip(irq, &ixp2000_irq_chip); 428 set_irq_chip(irq, &ixp2000_irq_chip);
380 set_irq_handler(irq, do_level_IRQ); 429 set_irq_handler(irq, do_level_IRQ);
381 set_irq_flags(irq, IRQF_VALID); 430 set_irq_flags(irq, IRQF_VALID);
382 } else set_irq_flags(irq, 0); 431 } else set_irq_flags(irq, 0);
383 } 432 }
384 433
385 /* 434 /*
386 * GPIO IRQs are invalid until someone sets the interrupt mode 435 * GPIO IRQs are invalid until someone sets the interrupt mode
387 * by calling gpio_line_set(); 436 * by calling set_irq_type().
388 */ 437 */
389 for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { 438 for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) {
390 set_irq_chip(irq, &ixp2000_GPIO_irq_chip); 439 set_irq_chip(irq, &ixp2000_GPIO_irq_chip);
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 267ba02d77dc..f39e8408488f 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -141,7 +141,15 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
141 .physical = IXP4XX_PCI_CFG_BASE_PHYS, 141 .physical = IXP4XX_PCI_CFG_BASE_PHYS,
142 .length = IXP4XX_PCI_CFG_REGION_SIZE, 142 .length = IXP4XX_PCI_CFG_REGION_SIZE,
143 .type = MT_DEVICE 143 .type = MT_DEVICE
144 },
145#ifdef CONFIG_DEBUG_LL
146 { /* Debug UART mapping */
147 .virtual = IXP4XX_DEBUG_UART_BASE_VIRT,
148 .physical = IXP4XX_DEBUG_UART_BASE_PHYS,
149 .length = IXP4XX_DEBUG_UART_REGION_SIZE,
150 .type = MT_DEVICE
144 } 151 }
152#endif
145}; 153};
146 154
147void __init ixp4xx_map_io(void) 155void __init ixp4xx_map_io(void)
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 0aa73d414783..e3d8510f4340 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -132,8 +132,8 @@ ENTRY(cpu_v6_switch_mm)
132 * 100x 1 0 1 r/o no acc 132 * 100x 1 0 1 r/o no acc
133 * 10x0 1 0 1 r/o no acc 133 * 10x0 1 0 1 r/o no acc
134 * 1011 0 0 1 r/w no acc 134 * 1011 0 0 1 r/w no acc
135 * 110x 1 1 0 r/o r/o 135 * 110x 0 1 0 r/w r/o
136 * 11x0 1 1 0 r/o r/o 136 * 11x0 0 1 0 r/w r/o
137 * 1111 0 1 1 r/w r/w 137 * 1111 0 1 1 r/w r/w
138 */ 138 */
139ENTRY(cpu_v6_set_pte) 139ENTRY(cpu_v6_set_pte)
@@ -150,7 +150,7 @@ ENTRY(cpu_v6_set_pte)
150 tst r1, #L_PTE_USER 150 tst r1, #L_PTE_USER
151 orrne r2, r2, #AP1 | nG 151 orrne r2, r2, #AP1 | nG
152 tstne r2, #APX 152 tstne r2, #APX
153 eorne r2, r2, #AP0 153 bicne r2, r2, #APX | AP0
154 154
155 tst r1, #L_PTE_YOUNG 155 tst r1, #L_PTE_YOUNG
156 biceq r2, r2, #APX | AP1 | AP0 156 biceq r2, r2, #APX | AP1 | AP0
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index ec943cad2314..1956af382cd8 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -33,7 +33,8 @@
33#include <linux/i2c.h> 33#include <linux/i2c.h>
34#include <linux/i2c-algo-bit.h> 34#include <linux/i2c-algo-bit.h>
35 35
36#include <asm/hardware.h> /* Pick up IXP42000-specific bits */ 36#include <asm/hardware.h> /* Pick up IXP2000-specific bits */
37#include <asm/arch/gpio.h>
37 38
38static inline int ixp2000_scl_pin(void *data) 39static inline int ixp2000_scl_pin(void *data)
39{ 40{
diff --git a/fs/qnx4/dir.c b/fs/qnx4/dir.c
index cd66147cca04..7a8f5595c26f 100644
--- a/fs/qnx4/dir.c
+++ b/fs/qnx4/dir.c
@@ -61,7 +61,7 @@ static int qnx4_readdir(struct file *filp, void *dirent, filldir_t filldir)
61 ino = blknum * QNX4_INODES_PER_BLOCK + ix - 1; 61 ino = blknum * QNX4_INODES_PER_BLOCK + ix - 1;
62 else { 62 else {
63 le = (struct qnx4_link_info*)de; 63 le = (struct qnx4_link_info*)de;
64 ino = ( le->dl_inode_blk - 1 ) * 64 ino = ( le32_to_cpu(le->dl_inode_blk) - 1 ) *
65 QNX4_INODES_PER_BLOCK + 65 QNX4_INODES_PER_BLOCK +
66 le->dl_inode_ndx; 66 le->dl_inode_ndx;
67 } 67 }
diff --git a/fs/qnx4/inode.c b/fs/qnx4/inode.c
index aa92d6b76a9a..b79162a35478 100644
--- a/fs/qnx4/inode.c
+++ b/fs/qnx4/inode.c
@@ -236,7 +236,7 @@ unsigned long qnx4_block_map( struct inode *inode, long iblock )
236 struct buffer_head *bh = NULL; 236 struct buffer_head *bh = NULL;
237 struct qnx4_xblk *xblk = NULL; 237 struct qnx4_xblk *xblk = NULL;
238 struct qnx4_inode_entry *qnx4_inode = qnx4_raw_inode(inode); 238 struct qnx4_inode_entry *qnx4_inode = qnx4_raw_inode(inode);
239 qnx4_nxtnt_t nxtnt = le16_to_cpu(qnx4_inode->di_num_xtnts); 239 u16 nxtnt = le16_to_cpu(qnx4_inode->di_num_xtnts);
240 240
241 if ( iblock < le32_to_cpu(qnx4_inode->di_first_xtnt.xtnt_size) ) { 241 if ( iblock < le32_to_cpu(qnx4_inode->di_first_xtnt.xtnt_size) ) {
242 // iblock is in the first extent. This is easy. 242 // iblock is in the first extent. This is easy.
@@ -372,7 +372,7 @@ static int qnx4_fill_super(struct super_block *s, void *data, int silent)
372 printk("qnx4: unable to read the superblock\n"); 372 printk("qnx4: unable to read the superblock\n");
373 goto outnobh; 373 goto outnobh;
374 } 374 }
375 if ( le32_to_cpu( *(__u32*)bh->b_data ) != QNX4_SUPER_MAGIC ) { 375 if ( le32_to_cpup((__le32*) bh->b_data) != QNX4_SUPER_MAGIC ) {
376 if (!silent) 376 if (!silent)
377 printk("qnx4: wrong fsid in superblock.\n"); 377 printk("qnx4: wrong fsid in superblock.\n");
378 goto out; 378 goto out;
diff --git a/include/asm-arm/arch-ixp2000/gpio.h b/include/asm-arm/arch-ixp2000/gpio.h
index 84634af5cc64..03cbbe1fd9d8 100644
--- a/include/asm-arm/arch-ixp2000/gpio.h
+++ b/include/asm-arm/arch-ixp2000/gpio.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-arm/arch-ixp2000/ixp2000-gpio.h 2 * include/asm-arm/arch-ixp2000/gpio.h
3 * 3 *
4 * Copyright (C) 2002 Intel Corporation. 4 * Copyright (C) 2002 Intel Corporation.
5 * 5 *
@@ -16,26 +16,18 @@
16 * Use this instead of directly setting the GPIO registers. 16 * Use this instead of directly setting the GPIO registers.
17 * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) 17 * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb)
18 */ 18 */
19#ifndef _ASM_ARCH_IXP2000_GPIO_H_ 19#ifndef __ASM_ARCH_GPIO_H
20#define _ASM_ARCH_IXP2000_GPIO_H_ 20#define __ASM_ARCH_GPIO_H
21 21
22#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
23#define GPIO_OUT 0x0 23
24#define GPIO_IN 0x80 24#define GPIO_IN 0
25#define GPIO_OUT 1
25 26
26#define IXP2000_GPIO_LOW 0 27#define IXP2000_GPIO_LOW 0
27#define IXP2000_GPIO_HIGH 1 28#define IXP2000_GPIO_HIGH 1
28 29
29#define GPIO_NO_EDGES 0 30extern void gpio_line_config(int line, int direction);
30#define GPIO_FALLING_EDGE 1
31#define GPIO_RISING_EDGE 2
32#define GPIO_BOTH_EDGES 3
33#define GPIO_LEVEL_LOW 4
34#define GPIO_LEVEL_HIGH 8
35
36extern void set_GPIO_IRQ_edge(int gpio_nr, int edge);
37extern void set_GPIO_IRQ_level(int gpio_nr, int level);
38extern void gpio_line_config(int line, int style);
39 31
40static inline int gpio_line_get(int line) 32static inline int gpio_line_get(int line)
41{ 33{
@@ -45,11 +37,12 @@ static inline int gpio_line_get(int line)
45static inline void gpio_line_set(int line, int value) 37static inline void gpio_line_set(int line, int value)
46{ 38{
47 if (value == IXP2000_GPIO_HIGH) { 39 if (value == IXP2000_GPIO_HIGH) {
48 ixp_reg_write(IXP2000_GPIO_POSR, BIT(line)); 40 ixp2000_reg_write(IXP2000_GPIO_POSR, 1 << line);
49 } else if (value == IXP2000_GPIO_LOW) 41 } else if (value == IXP2000_GPIO_LOW) {
50 ixp_reg_write(IXP2000_GPIO_POCR, BIT(line)); 42 ixp2000_reg_write(IXP2000_GPIO_POCR, 1 << line);
43 }
51} 44}
52 45
53#endif /* !__ASSEMBLY__ */ 46#endif /* !__ASSEMBLY__ */
54#endif /* ASM_ARCH_IXP2000_GPIO_H_ */
55 47
48#endif /* ASM_ARCH_IXP2000_GPIO_H_ */
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index 083462668e18..5e56b47446e0 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -27,8 +27,8 @@
27 * since that isn't available on the A? revisions we just keep doing 27 * since that isn't available on the A? revisions we just keep doing
28 * things manually. 28 * things manually.
29 */ 29 */
30#define alignb(addr) (void __iomem *)((unsigned long)addr ^ 3) 30#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3)
31#define alignw(addr) (void __iomem *)((unsigned long)addr ^ 2) 31#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2)
32 32
33#define outb(v,p) __raw_writeb((v),alignb(___io(p))) 33#define outb(v,p) __raw_writeb((v),alignb(___io(p)))
34#define outw(v,p) __raw_writew((v),alignw(___io(p))) 34#define outw(v,p) __raw_writew((v),alignw(___io(p)))
@@ -48,6 +48,78 @@
48#define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) 48#define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l)
49#define insl(p,d,l) __raw_readsl(___io(p),d,l) 49#define insl(p,d,l) __raw_readsl(___io(p),d,l)
50 50
51#define __is_io_address(p) ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE)
52
53#define ioread8(p) \
54 ({ \
55 unsigned int __v; \
56 \
57 if (__is_io_address(p)) { \
58 __v = __raw_readb(alignb(p)); \
59 } else { \
60 __v = __raw_readb(p); \
61 } \
62 \
63 __v; \
64 }) \
65
66#define ioread16(p) \
67 ({ \
68 unsigned int __v; \
69 \
70 if (__is_io_address(p)) { \
71 __v = __raw_readw(alignw(p)); \
72 } else { \
73 __v = le16_to_cpu(__raw_readw(p)); \
74 } \
75 \
76 __v; \
77 })
78
79#define ioread32(p) \
80 ({ \
81 unsigned int __v; \
82 \
83 if (__is_io_address(p)) { \
84 __v = __raw_readl(p); \
85 } else { \
86 __v = le32_to_cpu(__raw_readl(p)); \
87 } \
88 \
89 __v; \
90 })
91
92#define iowrite8(v,p) \
93 ({ \
94 if (__is_io_address(p)) { \
95 __raw_writeb((v), alignb(p)); \
96 } else { \
97 __raw_writeb((v), p); \
98 } \
99 })
100
101#define iowrite16(v,p) \
102 ({ \
103 if (__is_io_address(p)) { \
104 __raw_writew((v), alignw(p)); \
105 } else { \
106 __raw_writew(cpu_to_le16(v), p); \
107 } \
108 })
109
110#define iowrite32(v,p) \
111 ({ \
112 if (__is_io_address(p)) { \
113 __raw_writel((v), p); \
114 } else { \
115 __raw_writel(cpu_to_le32(v), p); \
116 } \
117 })
118
119#define ioport_map(port, nr) ___io(port)
120
121#define ioport_unmap(addr)
122
51 123
52#ifdef CONFIG_ARCH_IXDP2X01 124#ifdef CONFIG_ARCH_IXDP2X01
53/* 125/*
diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h
index 901bba6d02b4..52ded516ea5c 100644
--- a/include/asm-arm/arch-ixp2000/platform.h
+++ b/include/asm-arm/arch-ixp2000/platform.h
@@ -138,30 +138,10 @@ struct ixp2000_flash_data {
138 unsigned long (*bank_setup)(unsigned long); 138 unsigned long (*bank_setup)(unsigned long);
139}; 139};
140 140
141/*
142 * GPIO helper functions
143 */
144#define GPIO_IN 0
145#define GPIO_OUT 1
146
147extern void gpio_line_config(int line, int style);
148
149static inline int gpio_line_get(int line)
150{
151 return (((*IXP2000_GPIO_PLR) >> line) & 1);
152}
153
154static inline void gpio_line_set(int line, int value)
155{
156 if (value)
157 ixp2000_reg_write(IXP2000_GPIO_POSR, (1 << line));
158 else
159 ixp2000_reg_write(IXP2000_GPIO_POCR, (1 << line));
160}
161
162struct ixp2000_i2c_pins { 141struct ixp2000_i2c_pins {
163 unsigned long sda_pin; 142 unsigned long sda_pin;
164 unsigned long scl_pin; 143 unsigned long scl_pin;
165}; 144};
166 145
146
167#endif /* !__ASSEMBLY__ */ 147#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/arch-ixp4xx/debug-macro.S b/include/asm-arm/arch-ixp4xx/debug-macro.S
index 4499ae8e4b44..45a6c6cc29d5 100644
--- a/include/asm-arm/arch-ixp4xx/debug-macro.S
+++ b/include/asm-arm/arch-ixp4xx/debug-macro.S
@@ -14,6 +14,7 @@
14 mrc p15, 0, \rx, c1, c0 14 mrc p15, 0, \rx, c1, c0
15 tst \rx, #1 @ MMU enabled? 15 tst \rx, #1 @ MMU enabled?
16 moveq \rx, #0xc8000000 16 moveq \rx, #0xc8000000
17 orrne \rx, \rx, #0x00b00000
17 movne \rx, #0xff000000 18 movne \rx, #0xff000000
18 add \rx,\rx,#3 @ Uart regs are at off set of 3 if 19 add \rx,\rx,#3 @ Uart regs are at off set of 3 if
19 @ byte writes used - Big Endian. 20 @ byte writes used - Big Endian.
diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
index 8eeb1db6309d..004696a95bdb 100644
--- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
@@ -69,6 +69,16 @@
69#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000) 69#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000)
70#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000) 70#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000)
71 71
72/*
73 * Debug UART
74 *
75 * This is basically a remap of UART1 into a region that is section
76 * aligned so that it * can be used with the low-level debug code.
77 */
78#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000)
79#define IXP4XX_DEBUG_UART_BASE_VIRT (0xffb00000)
80#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000)
81
72#define IXP4XX_EXP_CS0_OFFSET 0x00 82#define IXP4XX_EXP_CS0_OFFSET 0x00
73#define IXP4XX_EXP_CS1_OFFSET 0x04 83#define IXP4XX_EXP_CS1_OFFSET 0x04
74#define IXP4XX_EXP_CS2_OFFSET 0x08 84#define IXP4XX_EXP_CS2_OFFSET 0x08
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 08a46302d265..cc4b5f5dbfcf 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -275,6 +275,7 @@ extern void __iounmap(void __iomem *addr);
275/* 275/*
276 * io{read,write}{8,16,32} macros 276 * io{read,write}{8,16,32} macros
277 */ 277 */
278#ifndef ioread8
278#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) 279#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
279#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; }) 280#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
280#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; }) 281#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
@@ -293,6 +294,7 @@ extern void __iounmap(void __iomem *addr);
293 294
294extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 295extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
295extern void ioport_unmap(void __iomem *addr); 296extern void ioport_unmap(void __iomem *addr);
297#endif
296 298
297struct pci_dev; 299struct pci_dev;
298 300
diff --git a/include/asm-i386/string.h b/include/asm-i386/string.h
index 6a78ac58c194..02c8f5d22065 100644
--- a/include/asm-i386/string.h
+++ b/include/asm-i386/string.h
@@ -116,7 +116,8 @@ __asm__ __volatile__(
116 "orb $1,%%al\n" 116 "orb $1,%%al\n"
117 "3:" 117 "3:"
118 :"=a" (__res), "=&S" (d0), "=&D" (d1) 118 :"=a" (__res), "=&S" (d0), "=&D" (d1)
119 :"1" (cs),"2" (ct)); 119 :"1" (cs),"2" (ct)
120 :"memory");
120return __res; 121return __res;
121} 122}
122 123
@@ -138,8 +139,9 @@ __asm__ __volatile__(
138 "3:\tsbbl %%eax,%%eax\n\t" 139 "3:\tsbbl %%eax,%%eax\n\t"
139 "orb $1,%%al\n" 140 "orb $1,%%al\n"
140 "4:" 141 "4:"
141 :"=a" (__res), "=&S" (d0), "=&D" (d1), "=&c" (d2) 142 :"=a" (__res), "=&S" (d0), "=&D" (d1), "=&c" (d2)
142 :"1" (cs),"2" (ct),"3" (count)); 143 :"1" (cs),"2" (ct),"3" (count)
144 :"memory");
143return __res; 145return __res;
144} 146}
145 147
@@ -158,7 +160,9 @@ __asm__ __volatile__(
158 "movl $1,%1\n" 160 "movl $1,%1\n"
159 "2:\tmovl %1,%0\n\t" 161 "2:\tmovl %1,%0\n\t"
160 "decl %0" 162 "decl %0"
161 :"=a" (__res), "=&S" (d0) : "1" (s),"0" (c)); 163 :"=a" (__res), "=&S" (d0)
164 :"1" (s),"0" (c)
165 :"memory");
162return __res; 166return __res;
163} 167}
164 168
@@ -175,7 +179,9 @@ __asm__ __volatile__(
175 "leal -1(%%esi),%0\n" 179 "leal -1(%%esi),%0\n"
176 "2:\ttestb %%al,%%al\n\t" 180 "2:\ttestb %%al,%%al\n\t"
177 "jne 1b" 181 "jne 1b"
178 :"=g" (__res), "=&S" (d0), "=&a" (d1) :"0" (0),"1" (s),"2" (c)); 182 :"=g" (__res), "=&S" (d0), "=&a" (d1)
183 :"0" (0),"1" (s),"2" (c)
184 :"memory");
179return __res; 185return __res;
180} 186}
181 187
@@ -189,7 +195,9 @@ __asm__ __volatile__(
189 "scasb\n\t" 195 "scasb\n\t"
190 "notl %0\n\t" 196 "notl %0\n\t"
191 "decl %0" 197 "decl %0"
192 :"=c" (__res), "=&D" (d0) :"1" (s),"a" (0), "0" (0xffffffffu)); 198 :"=c" (__res), "=&D" (d0)
199 :"1" (s),"a" (0), "0" (0xffffffffu)
200 :"memory");
193return __res; 201return __res;
194} 202}
195 203
@@ -333,7 +341,9 @@ __asm__ __volatile__(
333 "je 1f\n\t" 341 "je 1f\n\t"
334 "movl $1,%0\n" 342 "movl $1,%0\n"
335 "1:\tdecl %0" 343 "1:\tdecl %0"
336 :"=D" (__res), "=&c" (d0) : "a" (c),"0" (cs),"1" (count)); 344 :"=D" (__res), "=&c" (d0)
345 :"a" (c),"0" (cs),"1" (count)
346 :"memory");
337return __res; 347return __res;
338} 348}
339 349
@@ -369,7 +379,7 @@ __asm__ __volatile__(
369 "je 2f\n\t" 379 "je 2f\n\t"
370 "stosb\n" 380 "stosb\n"
371 "2:" 381 "2:"
372 : "=&c" (d0), "=&D" (d1) 382 :"=&c" (d0), "=&D" (d1)
373 :"a" (c), "q" (count), "0" (count/4), "1" ((long) s) 383 :"a" (c), "q" (count), "0" (count/4), "1" ((long) s)
374 :"memory"); 384 :"memory");
375return (s); 385return (s);
@@ -392,7 +402,8 @@ __asm__ __volatile__(
392 "jne 1b\n" 402 "jne 1b\n"
393 "3:\tsubl %2,%0" 403 "3:\tsubl %2,%0"
394 :"=a" (__res), "=&d" (d0) 404 :"=a" (__res), "=&d" (d0)
395 :"c" (s),"1" (count)); 405 :"c" (s),"1" (count)
406 :"memory");
396return __res; 407return __res;
397} 408}
398/* end of additional stuff */ 409/* end of additional stuff */
@@ -473,7 +484,8 @@ static inline void * memscan(void * addr, int c, size_t size)
473 "dec %%edi\n" 484 "dec %%edi\n"
474 "1:" 485 "1:"
475 : "=D" (addr), "=c" (size) 486 : "=D" (addr), "=c" (size)
476 : "0" (addr), "1" (size), "a" (c)); 487 : "0" (addr), "1" (size), "a" (c)
488 : "memory");
477 return addr; 489 return addr;
478} 490}
479 491
diff --git a/include/linux/qnx4_fs.h b/include/linux/qnx4_fs.h
index 22ba580b0ae8..fc610bb0f733 100644
--- a/include/linux/qnx4_fs.h
+++ b/include/linux/qnx4_fs.h
@@ -46,11 +46,11 @@ struct qnx4_inode_entry {
46 char di_fname[QNX4_SHORT_NAME_MAX]; 46 char di_fname[QNX4_SHORT_NAME_MAX];
47 qnx4_off_t di_size; 47 qnx4_off_t di_size;
48 qnx4_xtnt_t di_first_xtnt; 48 qnx4_xtnt_t di_first_xtnt;
49 __u32 di_xblk; 49 __le32 di_xblk;
50 __s32 di_ftime; 50 __le32 di_ftime;
51 __s32 di_mtime; 51 __le32 di_mtime;
52 __s32 di_atime; 52 __le32 di_atime;
53 __s32 di_ctime; 53 __le32 di_ctime;
54 qnx4_nxtnt_t di_num_xtnts; 54 qnx4_nxtnt_t di_num_xtnts;
55 qnx4_mode_t di_mode; 55 qnx4_mode_t di_mode;
56 qnx4_muid_t di_uid; 56 qnx4_muid_t di_uid;
@@ -63,18 +63,18 @@ struct qnx4_inode_entry {
63 63
64struct qnx4_link_info { 64struct qnx4_link_info {
65 char dl_fname[QNX4_NAME_MAX]; 65 char dl_fname[QNX4_NAME_MAX];
66 __u32 dl_inode_blk; 66 __le32 dl_inode_blk;
67 __u8 dl_inode_ndx; 67 __u8 dl_inode_ndx;
68 __u8 dl_spare[10]; 68 __u8 dl_spare[10];
69 __u8 dl_status; 69 __u8 dl_status;
70}; 70};
71 71
72struct qnx4_xblk { 72struct qnx4_xblk {
73 __u32 xblk_next_xblk; 73 __le32 xblk_next_xblk;
74 __u32 xblk_prev_xblk; 74 __le32 xblk_prev_xblk;
75 __u8 xblk_num_xtnts; 75 __u8 xblk_num_xtnts;
76 __u8 xblk_spare[3]; 76 __u8 xblk_spare[3];
77 __s32 xblk_num_blocks; 77 __le32 xblk_num_blocks;
78 qnx4_xtnt_t xblk_xtnts[QNX4_MAX_XTNTS_PER_XBLK]; 78 qnx4_xtnt_t xblk_xtnts[QNX4_MAX_XTNTS_PER_XBLK];
79 char xblk_signature[8]; 79 char xblk_signature[8];
80 qnx4_xtnt_t xblk_first_xtnt; 80 qnx4_xtnt_t xblk_first_xtnt;
diff --git a/include/linux/qnxtypes.h b/include/linux/qnxtypes.h
index fb518e318c7c..a3eb1137857b 100644
--- a/include/linux/qnxtypes.h
+++ b/include/linux/qnxtypes.h
@@ -12,18 +12,18 @@
12#ifndef _QNX4TYPES_H 12#ifndef _QNX4TYPES_H
13#define _QNX4TYPES_H 13#define _QNX4TYPES_H
14 14
15typedef __u16 qnx4_nxtnt_t; 15typedef __le16 qnx4_nxtnt_t;
16typedef __u8 qnx4_ftype_t; 16typedef __u8 qnx4_ftype_t;
17 17
18typedef struct { 18typedef struct {
19 __u32 xtnt_blk; 19 __le32 xtnt_blk;
20 __u32 xtnt_size; 20 __le32 xtnt_size;
21} qnx4_xtnt_t; 21} qnx4_xtnt_t;
22 22
23typedef __u16 qnx4_mode_t; 23typedef __le16 qnx4_mode_t;
24typedef __u16 qnx4_muid_t; 24typedef __le16 qnx4_muid_t;
25typedef __u16 qnx4_mgid_t; 25typedef __le16 qnx4_mgid_t;
26typedef __u32 qnx4_off_t; 26typedef __le32 qnx4_off_t;
27typedef __u16 qnx4_nlink_t; 27typedef __le16 qnx4_nlink_t;
28 28
29#endif 29#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 23:09:08 -0500