diff options
| -rw-r--r-- | arch/arm/mach-omap1/Makefile | 11 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/io.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/irq.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/serial.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/io.c | 21 | ||||
| -rw-r--r-- | arch/arm/plat-omap/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 345 | ||||
| -rw-r--r-- | arch/arm/plat-omap/ocpi.c | 3 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/aic23.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/dsp.h | 6 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/dsp_common.h | 13 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/gpioexpander.h | 24 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/irda.h | 36 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/irqs.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/keypad.h | 36 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/mcbsp.h | 65 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/mcspi.h | 16 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/menelaus.h | 2 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap/omap-alsa.h | 124 |
20 files changed, 681 insertions, 70 deletions
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index b0b00156faae..9ea719550ad3 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
| @@ -3,7 +3,13 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # Common support | 5 | # Common support |
| 6 | obj-y := io.o id.o clock.o irq.o time.o mux.o serial.o devices.o | 6 | obj-y := io.o id.o clock.o irq.o mux.o serial.o devices.o |
| 7 | |||
| 8 | obj-$(CONFIG_OMAP_MPU_TIMER) += time.o | ||
| 9 | |||
| 10 | # Power Management | ||
| 11 | obj-$(CONFIG_PM) += pm.o sleep.o | ||
| 12 | |||
| 7 | led-y := leds.o | 13 | led-y := leds.o |
| 8 | 14 | ||
| 9 | # Specific board support | 15 | # Specific board support |
| @@ -14,8 +20,9 @@ obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o | |||
| 14 | obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o | 20 | obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o |
| 15 | obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o | 21 | obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o |
| 16 | obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o | 22 | obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o |
| 17 | obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o | ||
| 18 | obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o | 23 | obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o |
| 24 | obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o | ||
| 25 | obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o | ||
| 19 | 26 | ||
| 20 | ifeq ($(CONFIG_ARCH_OMAP15XX),y) | 27 | ifeq ($(CONFIG_ARCH_OMAP15XX),y) |
| 21 | # Innovator-1510 FPGA | 28 | # Innovator-1510 FPGA |
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 82d556be79c5..be3a2a4ee2b8 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | #include <asm/io.h> | 18 | #include <asm/io.h> |
| 19 | #include <asm/arch/mux.h> | 19 | #include <asm/arch/mux.h> |
| 20 | #include <asm/arch/tc.h> | 20 | #include <asm/arch/tc.h> |
| 21 | #include <asm/arch/omapfb.h> | ||
| 21 | 22 | ||
| 22 | extern int omap1_clk_init(void); | 23 | extern int omap1_clk_init(void); |
| 23 | extern void omap_check_revision(void); | 24 | extern void omap_check_revision(void); |
| @@ -110,7 +111,7 @@ void __init omap1_map_common_io(void) | |||
| 110 | } | 111 | } |
| 111 | #endif | 112 | #endif |
| 112 | #ifdef CONFIG_ARCH_OMAP15XX | 113 | #ifdef CONFIG_ARCH_OMAP15XX |
| 113 | if (cpu_is_omap1510()) { | 114 | if (cpu_is_omap15xx()) { |
| 114 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); | 115 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); |
| 115 | } | 116 | } |
| 116 | #endif | 117 | #endif |
| @@ -121,6 +122,7 @@ void __init omap1_map_common_io(void) | |||
| 121 | #endif | 122 | #endif |
| 122 | 123 | ||
| 123 | omap_sram_init(); | 124 | omap_sram_init(); |
| 125 | omapfb_reserve_mem(); | ||
| 124 | } | 126 | } |
| 125 | 127 | ||
| 126 | /* | 128 | /* |
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index ed65a7d2e941..a0431c00fa81 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
| @@ -60,7 +60,7 @@ struct omap_irq_bank { | |||
| 60 | unsigned long wake_enable; | 60 | unsigned long wake_enable; |
| 61 | }; | 61 | }; |
| 62 | 62 | ||
| 63 | static unsigned int irq_bank_count = 0; | 63 | static unsigned int irq_bank_count; |
| 64 | static struct omap_irq_bank *irq_banks; | 64 | static struct omap_irq_bank *irq_banks; |
| 65 | 65 | ||
| 66 | static inline unsigned int irq_bank_readl(int bank, int offset) | 66 | static inline unsigned int irq_bank_readl(int bank, int offset) |
| @@ -142,28 +142,28 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger) | |||
| 142 | 142 | ||
| 143 | #ifdef CONFIG_ARCH_OMAP730 | 143 | #ifdef CONFIG_ARCH_OMAP730 |
| 144 | static struct omap_irq_bank omap730_irq_banks[] = { | 144 | static struct omap_irq_bank omap730_irq_banks[] = { |
| 145 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, | 145 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, |
| 146 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, | 146 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, |
| 147 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, | 147 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, |
| 148 | }; | 148 | }; |
| 149 | #endif | 149 | #endif |
| 150 | 150 | ||
| 151 | #ifdef CONFIG_ARCH_OMAP15XX | 151 | #ifdef CONFIG_ARCH_OMAP15XX |
| 152 | static struct omap_irq_bank omap1510_irq_banks[] = { | 152 | static struct omap_irq_bank omap1510_irq_banks[] = { |
| 153 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, | 153 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, |
| 154 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed }, | 154 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed }, |
| 155 | }; | 155 | }; |
| 156 | static struct omap_irq_bank omap310_irq_banks[] = { | 156 | static struct omap_irq_bank omap310_irq_banks[] = { |
| 157 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 }, | 157 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 }, |
| 158 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 }, | 158 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 }, |
| 159 | }; | 159 | }; |
| 160 | #endif | 160 | #endif |
| 161 | 161 | ||
| 162 | #if defined(CONFIG_ARCH_OMAP16XX) | 162 | #if defined(CONFIG_ARCH_OMAP16XX) |
| 163 | 163 | ||
| 164 | static struct omap_irq_bank omap1610_irq_banks[] = { | 164 | static struct omap_irq_bank omap1610_irq_banks[] = { |
| 165 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f }, | 165 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f }, |
| 166 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd }, | 166 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd }, |
| 167 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff }, | 167 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff }, |
| 168 | { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff }, | 168 | { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff }, |
| 169 | }; | 169 | }; |
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index e924e0c6a4ce..9b4cd698bec8 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
| @@ -30,9 +30,9 @@ | |||
| 30 | #include <asm/arch/pm.h> | 30 | #include <asm/arch/pm.h> |
| 31 | #endif | 31 | #endif |
| 32 | 32 | ||
| 33 | static struct clk * uart1_ck = NULL; | 33 | static struct clk * uart1_ck; |
| 34 | static struct clk * uart2_ck = NULL; | 34 | static struct clk * uart2_ck; |
| 35 | static struct clk * uart3_ck = NULL; | 35 | static struct clk * uart3_ck; |
| 36 | 36 | ||
| 37 | static inline unsigned int omap_serial_in(struct plat_serial8250_port *up, | 37 | static inline unsigned int omap_serial_in(struct plat_serial8250_port *up, |
| 38 | int offset) | 38 | int offset) |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 42041166435c..111eaa64258f 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -3,11 +3,15 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # Common support | 5 | # Common support |
| 6 | obj-y := irq.o id.o io.o sram-fn.o clock.o mux.o devices.o serial.o | 6 | obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o serial.o |
| 7 | 7 | ||
| 8 | obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o | 8 | obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o |
| 9 | 9 | ||
| 10 | # Power Management | ||
| 11 | obj-$(CONFIG_PM) += pm.o sleep.o | ||
| 12 | |||
| 10 | # Specific board support | 13 | # Specific board support |
| 11 | obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o | 14 | obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o |
| 12 | obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o | 15 | obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o |
| 16 | obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o | ||
| 13 | 17 | ||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 8ea67bf196a5..7d5711611f2f 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
| @@ -16,9 +16,13 @@ | |||
| 16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | 18 | ||
| 19 | #include <asm/mach/map.h> | 19 | #include <asm/tlb.h> |
| 20 | #include <asm/io.h> | 20 | #include <asm/io.h> |
| 21 | |||
| 22 | #include <asm/mach/map.h> | ||
| 23 | |||
| 21 | #include <asm/arch/mux.h> | 24 | #include <asm/arch/mux.h> |
| 25 | #include <asm/arch/omapfb.h> | ||
| 22 | 26 | ||
| 23 | extern void omap_sram_init(void); | 27 | extern void omap_sram_init(void); |
| 24 | extern int omap2_clk_init(void); | 28 | extern int omap2_clk_init(void); |
| @@ -43,11 +47,24 @@ static struct map_desc omap2_io_desc[] __initdata = { | |||
| 43 | } | 47 | } |
| 44 | }; | 48 | }; |
| 45 | 49 | ||
| 46 | void __init omap_map_common_io(void) | 50 | void __init omap2_map_common_io(void) |
| 47 | { | 51 | { |
| 48 | iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc)); | 52 | iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc)); |
| 53 | |||
| 54 | /* Normally devicemaps_init() would flush caches and tlb after | ||
| 55 | * mdesc->map_io(), but we must also do it here because of the CPU | ||
| 56 | * revision check below. | ||
| 57 | */ | ||
| 58 | local_flush_tlb_all(); | ||
| 59 | flush_cache_all(); | ||
| 60 | |||
| 49 | omap2_check_revision(); | 61 | omap2_check_revision(); |
| 50 | omap_sram_init(); | 62 | omap_sram_init(); |
| 63 | omapfb_reserve_mem(); | ||
| 64 | } | ||
| 65 | |||
| 66 | void __init omap2_init_common_hw(void) | ||
| 67 | { | ||
| 51 | omap2_mux_init(); | 68 | omap2_mux_init(); |
| 52 | omap2_clk_init(); | 69 | omap2_clk_init(); |
| 53 | } | 70 | } |
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 9ccf1943fc94..2896b4546411 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
| @@ -3,16 +3,16 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # Common support | 5 | # Common support |
| 6 | obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o mcbsp.o usb.o | 6 | obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o mcbsp.o usb.o fb.o |
| 7 | obj-m := | 7 | obj-m := |
| 8 | obj-n := | 8 | obj-n := |
| 9 | obj- := | 9 | obj- := |
| 10 | 10 | ||
| 11 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o | ||
| 12 | |||
| 11 | # OCPI interconnect support for 1710, 1610 and 5912 | 13 | # OCPI interconnect support for 1710, 1610 and 5912 |
| 12 | obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o | 14 | obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o |
| 13 | 15 | ||
| 14 | # Power Management | ||
| 15 | obj-$(CONFIG_PM) += pm.o sleep.o | ||
| 16 | 16 | ||
| 17 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o | 17 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o |
| 18 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o | 18 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 1cd2cace7e1b..196aac3ac329 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | #ifdef CONFIG_MCBSP_DEBUG | 34 | #ifdef CONFIG_MCBSP_DEBUG |
| 35 | #define DBG(x...) printk(x) | 35 | #define DBG(x...) printk(x) |
| 36 | #else | 36 | #else |
| 37 | #define DBG(x...) do { } while (0) | 37 | #define DBG(x...) do { } while (0) |
| 38 | #endif | 38 | #endif |
| 39 | 39 | ||
| 40 | struct omap_mcbsp { | 40 | struct omap_mcbsp { |
| @@ -44,6 +44,7 @@ struct omap_mcbsp { | |||
| 44 | omap_mcbsp_word_length rx_word_length; | 44 | omap_mcbsp_word_length rx_word_length; |
| 45 | omap_mcbsp_word_length tx_word_length; | 45 | omap_mcbsp_word_length tx_word_length; |
| 46 | 46 | ||
| 47 | omap_mcbsp_io_type_t io_type; /* IRQ or poll */ | ||
| 47 | /* IRQ based TX/RX */ | 48 | /* IRQ based TX/RX */ |
| 48 | int rx_irq; | 49 | int rx_irq; |
| 49 | int tx_irq; | 50 | int tx_irq; |
| @@ -64,10 +65,19 @@ struct omap_mcbsp { | |||
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 66 | static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; | 67 | static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; |
| 68 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 67 | static struct clk *mcbsp_dsp_ck = 0; | 69 | static struct clk *mcbsp_dsp_ck = 0; |
| 68 | static struct clk *mcbsp_api_ck = 0; | 70 | static struct clk *mcbsp_api_ck = 0; |
| 69 | static struct clk *mcbsp_dspxor_ck = 0; | 71 | static struct clk *mcbsp_dspxor_ck = 0; |
| 70 | 72 | #endif | |
| 73 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 74 | static struct clk *mcbsp1_ick = 0; | ||
| 75 | static struct clk *mcbsp1_fck = 0; | ||
| 76 | static struct clk *mcbsp2_ick = 0; | ||
| 77 | static struct clk *mcbsp2_fck = 0; | ||
| 78 | static struct clk *sys_ck = 0; | ||
| 79 | static struct clk *sys_clkout = 0; | ||
| 80 | #endif | ||
| 71 | 81 | ||
| 72 | static void omap_mcbsp_dump_reg(u8 id) | 82 | static void omap_mcbsp_dump_reg(u8 id) |
| 73 | { | 83 | { |
| @@ -88,7 +98,6 @@ static void omap_mcbsp_dump_reg(u8 id) | |||
| 88 | DBG("***********************\n"); | 98 | DBG("***********************\n"); |
| 89 | } | 99 | } |
| 90 | 100 | ||
| 91 | |||
| 92 | static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_regs *regs) | 101 | static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_regs *regs) |
| 93 | { | 102 | { |
| 94 | struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id); | 103 | struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id); |
| @@ -109,7 +118,6 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id, struct pt_re | |||
| 109 | return IRQ_HANDLED; | 118 | return IRQ_HANDLED; |
| 110 | } | 119 | } |
| 111 | 120 | ||
| 112 | |||
| 113 | static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) | 121 | static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) |
| 114 | { | 122 | { |
| 115 | struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data); | 123 | struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data); |
| @@ -176,7 +184,7 @@ static int omap_mcbsp_check(unsigned int id) | |||
| 176 | return 0; | 184 | return 0; |
| 177 | } | 185 | } |
| 178 | 186 | ||
| 179 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { | 187 | if (cpu_is_omap15xx() || cpu_is_omap16xx() || cpu_is_omap24xx()) { |
| 180 | if (id > OMAP_MAX_MCBSP_COUNT) { | 188 | if (id > OMAP_MAX_MCBSP_COUNT) { |
| 181 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); | 189 | printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); |
| 182 | return -1; | 190 | return -1; |
| @@ -187,9 +195,10 @@ static int omap_mcbsp_check(unsigned int id) | |||
| 187 | return -1; | 195 | return -1; |
| 188 | } | 196 | } |
| 189 | 197 | ||
| 198 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 190 | static void omap_mcbsp_dsp_request(void) | 199 | static void omap_mcbsp_dsp_request(void) |
| 191 | { | 200 | { |
| 192 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { | 201 | if (cpu_is_omap15xx() || cpu_is_omap16xx()) { |
| 193 | clk_enable(mcbsp_dsp_ck); | 202 | clk_enable(mcbsp_dsp_ck); |
| 194 | clk_enable(mcbsp_api_ck); | 203 | clk_enable(mcbsp_api_ck); |
| 195 | 204 | ||
| @@ -207,12 +216,49 @@ static void omap_mcbsp_dsp_request(void) | |||
| 207 | 216 | ||
| 208 | static void omap_mcbsp_dsp_free(void) | 217 | static void omap_mcbsp_dsp_free(void) |
| 209 | { | 218 | { |
| 210 | if (cpu_is_omap1510() || cpu_is_omap16xx()) { | 219 | if (cpu_is_omap15xx() || cpu_is_omap16xx()) { |
| 211 | clk_disable(mcbsp_dspxor_ck); | 220 | clk_disable(mcbsp_dspxor_ck); |
| 212 | clk_disable(mcbsp_dsp_ck); | 221 | clk_disable(mcbsp_dsp_ck); |
| 213 | clk_disable(mcbsp_api_ck); | 222 | clk_disable(mcbsp_api_ck); |
| 214 | } | 223 | } |
| 215 | } | 224 | } |
| 225 | #endif | ||
| 226 | |||
| 227 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 228 | static void omap2_mcbsp2_mux_setup(void) | ||
| 229 | { | ||
| 230 | omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); | ||
| 231 | omap_cfg_reg(R14_24XX_MCBSP2_FSX); | ||
| 232 | omap_cfg_reg(W15_24XX_MCBSP2_DR); | ||
| 233 | omap_cfg_reg(V15_24XX_MCBSP2_DX); | ||
| 234 | omap_cfg_reg(V14_24XX_GPIO117); | ||
| 235 | omap_cfg_reg(W14_24XX_SYS_CLKOUT); | ||
| 236 | } | ||
| 237 | #endif | ||
| 238 | |||
| 239 | /* | ||
| 240 | * We can choose between IRQ based or polled IO. | ||
| 241 | * This needs to be called before omap_mcbsp_request(). | ||
| 242 | */ | ||
| 243 | int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) | ||
| 244 | { | ||
| 245 | if (omap_mcbsp_check(id) < 0) | ||
| 246 | return -EINVAL; | ||
| 247 | |||
| 248 | spin_lock(&mcbsp[id].lock); | ||
| 249 | |||
| 250 | if (!mcbsp[id].free) { | ||
| 251 | printk (KERN_ERR "OMAP-McBSP: McBSP%d is currently in use\n", id + 1); | ||
| 252 | spin_unlock(&mcbsp[id].lock); | ||
| 253 | return -EINVAL; | ||
| 254 | } | ||
| 255 | |||
| 256 | mcbsp[id].io_type = io_type; | ||
| 257 | |||
| 258 | spin_unlock(&mcbsp[id].lock); | ||
| 259 | |||
| 260 | return 0; | ||
| 261 | } | ||
| 216 | 262 | ||
| 217 | int omap_mcbsp_request(unsigned int id) | 263 | int omap_mcbsp_request(unsigned int id) |
| 218 | { | 264 | { |
| @@ -221,12 +267,26 @@ int omap_mcbsp_request(unsigned int id) | |||
| 221 | if (omap_mcbsp_check(id) < 0) | 267 | if (omap_mcbsp_check(id) < 0) |
| 222 | return -EINVAL; | 268 | return -EINVAL; |
| 223 | 269 | ||
| 270 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 224 | /* | 271 | /* |
| 225 | * On 1510, 1610 and 1710, McBSP1 and McBSP3 | 272 | * On 1510, 1610 and 1710, McBSP1 and McBSP3 |
| 226 | * are DSP public peripherals. | 273 | * are DSP public peripherals. |
| 227 | */ | 274 | */ |
| 228 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) | 275 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) |
| 229 | omap_mcbsp_dsp_request(); | 276 | omap_mcbsp_dsp_request(); |
| 277 | #endif | ||
| 278 | |||
| 279 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 280 | if (cpu_is_omap24xx()) { | ||
| 281 | if (id == OMAP_MCBSP1) { | ||
| 282 | clk_enable(mcbsp1_ick); | ||
| 283 | clk_enable(mcbsp1_fck); | ||
| 284 | } else { | ||
| 285 | clk_enable(mcbsp2_ick); | ||
| 286 | clk_enable(mcbsp2_fck); | ||
| 287 | } | ||
| 288 | } | ||
| 289 | #endif | ||
| 230 | 290 | ||
| 231 | spin_lock(&mcbsp[id].lock); | 291 | spin_lock(&mcbsp[id].lock); |
| 232 | if (!mcbsp[id].free) { | 292 | if (!mcbsp[id].free) { |
| @@ -238,30 +298,33 @@ int omap_mcbsp_request(unsigned int id) | |||
| 238 | mcbsp[id].free = 0; | 298 | mcbsp[id].free = 0; |
| 239 | spin_unlock(&mcbsp[id].lock); | 299 | spin_unlock(&mcbsp[id].lock); |
| 240 | 300 | ||
| 241 | /* We need to get IRQs here */ | 301 | if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { |
| 242 | err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, 0, | 302 | /* We need to get IRQs here */ |
| 243 | "McBSP", | 303 | err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, 0, |
| 244 | (void *) (&mcbsp[id])); | 304 | "McBSP", |
| 245 | if (err != 0) { | 305 | (void *) (&mcbsp[id])); |
| 246 | printk(KERN_ERR "OMAP-McBSP: Unable to request TX IRQ %d for McBSP%d\n", | 306 | if (err != 0) { |
| 247 | mcbsp[id].tx_irq, mcbsp[id].id); | 307 | printk(KERN_ERR "OMAP-McBSP: Unable to request TX IRQ %d for McBSP%d\n", |
| 248 | return err; | 308 | mcbsp[id].tx_irq, mcbsp[id].id); |
| 249 | } | 309 | return err; |
| 310 | } | ||
| 250 | 311 | ||
| 251 | init_completion(&(mcbsp[id].tx_irq_completion)); | 312 | init_completion(&(mcbsp[id].tx_irq_completion)); |
| 252 | 313 | ||
| 253 | 314 | ||
| 254 | err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, 0, | 315 | err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, 0, |
| 255 | "McBSP", | 316 | "McBSP", |
| 256 | (void *) (&mcbsp[id])); | 317 | (void *) (&mcbsp[id])); |
| 257 | if (err != 0) { | 318 | if (err != 0) { |
| 258 | printk(KERN_ERR "OMAP-McBSP: Unable to request RX IRQ %d for McBSP%d\n", | 319 | printk(KERN_ERR "OMAP-McBSP: Unable to request RX IRQ %d for McBSP%d\n", |
| 259 | mcbsp[id].rx_irq, mcbsp[id].id); | 320 | mcbsp[id].rx_irq, mcbsp[id].id); |
| 260 | free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); | 321 | free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); |
| 261 | return err; | 322 | return err; |
| 323 | } | ||
| 324 | |||
| 325 | init_completion(&(mcbsp[id].rx_irq_completion)); | ||
| 262 | } | 326 | } |
| 263 | 327 | ||
| 264 | init_completion(&(mcbsp[id].rx_irq_completion)); | ||
| 265 | return 0; | 328 | return 0; |
| 266 | 329 | ||
| 267 | } | 330 | } |
| @@ -271,8 +334,24 @@ void omap_mcbsp_free(unsigned int id) | |||
| 271 | if (omap_mcbsp_check(id) < 0) | 334 | if (omap_mcbsp_check(id) < 0) |
| 272 | return; | 335 | return; |
| 273 | 336 | ||
| 274 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) | 337 | #ifdef CONFIG_ARCH_OMAP1 |
| 275 | omap_mcbsp_dsp_free(); | 338 | if (cpu_class_is_omap1()) { |
| 339 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) | ||
| 340 | omap_mcbsp_dsp_free(); | ||
| 341 | } | ||
| 342 | #endif | ||
| 343 | |||
| 344 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 345 | if (cpu_is_omap24xx()) { | ||
| 346 | if (id == OMAP_MCBSP1) { | ||
| 347 | clk_disable(mcbsp1_ick); | ||
| 348 | clk_disable(mcbsp1_fck); | ||
| 349 | } else { | ||
| 350 | clk_disable(mcbsp2_ick); | ||
| 351 | clk_disable(mcbsp2_fck); | ||
| 352 | } | ||
| 353 | } | ||
| 354 | #endif | ||
| 276 | 355 | ||
| 277 | spin_lock(&mcbsp[id].lock); | 356 | spin_lock(&mcbsp[id].lock); |
| 278 | if (mcbsp[id].free) { | 357 | if (mcbsp[id].free) { |
| @@ -284,9 +363,11 @@ void omap_mcbsp_free(unsigned int id) | |||
| 284 | mcbsp[id].free = 1; | 363 | mcbsp[id].free = 1; |
| 285 | spin_unlock(&mcbsp[id].lock); | 364 | spin_unlock(&mcbsp[id].lock); |
| 286 | 365 | ||
| 287 | /* Free IRQs */ | 366 | if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { |
| 288 | free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id])); | 367 | /* Free IRQs */ |
| 289 | free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); | 368 | free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id])); |
| 369 | free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); | ||
| 370 | } | ||
| 290 | } | 371 | } |
| 291 | 372 | ||
| 292 | /* | 373 | /* |
| @@ -461,6 +542,115 @@ u32 omap_mcbsp_recv_word(unsigned int id) | |||
| 461 | } | 542 | } |
| 462 | 543 | ||
| 463 | 544 | ||
| 545 | int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) | ||
| 546 | { | ||
| 547 | u32 io_base = mcbsp[id].io_base; | ||
| 548 | omap_mcbsp_word_length tx_word_length = mcbsp[id].tx_word_length; | ||
| 549 | omap_mcbsp_word_length rx_word_length = mcbsp[id].rx_word_length; | ||
| 550 | u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; | ||
| 551 | |||
| 552 | if (tx_word_length != rx_word_length) | ||
| 553 | return -EINVAL; | ||
| 554 | |||
| 555 | /* First we wait for the transmitter to be ready */ | ||
| 556 | spcr2 = OMAP_MCBSP_READ(io_base, SPCR2); | ||
| 557 | while (!(spcr2 & XRDY)) { | ||
| 558 | spcr2 = OMAP_MCBSP_READ(io_base, SPCR2); | ||
| 559 | if (attempts++ > 1000) { | ||
| 560 | /* We must reset the transmitter */ | ||
| 561 | OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST)); | ||
| 562 | udelay(10); | ||
| 563 | OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); | ||
| 564 | udelay(10); | ||
| 565 | printk("McBSP transmitter not ready\n"); | ||
| 566 | return -EAGAIN; | ||
| 567 | } | ||
| 568 | } | ||
| 569 | |||
| 570 | /* Now we can push the data */ | ||
| 571 | if (tx_word_length > OMAP_MCBSP_WORD_16) | ||
| 572 | OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16); | ||
| 573 | OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff); | ||
| 574 | |||
| 575 | /* We wait for the receiver to be ready */ | ||
| 576 | spcr1 = OMAP_MCBSP_READ(io_base, SPCR1); | ||
| 577 | while (!(spcr1 & RRDY)) { | ||
| 578 | spcr1 = OMAP_MCBSP_READ(io_base, SPCR1); | ||
| 579 | if (attempts++ > 1000) { | ||
| 580 | /* We must reset the receiver */ | ||
| 581 | OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST)); | ||
| 582 | udelay(10); | ||
| 583 | OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); | ||
| 584 | udelay(10); | ||
| 585 | printk("McBSP receiver not ready\n"); | ||
| 586 | return -EAGAIN; | ||
| 587 | } | ||
| 588 | } | ||
| 589 | |||
| 590 | /* Receiver is ready, let's read the dummy data */ | ||
| 591 | if (rx_word_length > OMAP_MCBSP_WORD_16) | ||
| 592 | word_msb = OMAP_MCBSP_READ(io_base, DRR2); | ||
| 593 | word_lsb = OMAP_MCBSP_READ(io_base, DRR1); | ||
| 594 | |||
| 595 | return 0; | ||
| 596 | } | ||
| 597 | |||
| 598 | int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word) | ||
| 599 | { | ||
| 600 | u32 io_base = mcbsp[id].io_base, clock_word = 0; | ||
| 601 | omap_mcbsp_word_length tx_word_length = mcbsp[id].tx_word_length; | ||
| 602 | omap_mcbsp_word_length rx_word_length = mcbsp[id].rx_word_length; | ||
| 603 | u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; | ||
| 604 | |||
| 605 | if (tx_word_length != rx_word_length) | ||
| 606 | return -EINVAL; | ||
| 607 | |||
| 608 | /* First we wait for the transmitter to be ready */ | ||
| 609 | spcr2 = OMAP_MCBSP_READ(io_base, SPCR2); | ||
| 610 | while (!(spcr2 & XRDY)) { | ||
| 611 | spcr2 = OMAP_MCBSP_READ(io_base, SPCR2); | ||
| 612 | if (attempts++ > 1000) { | ||
| 613 | /* We must reset the transmitter */ | ||
| 614 | OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST)); | ||
| 615 | udelay(10); | ||
| 616 | OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); | ||
| 617 | udelay(10); | ||
| 618 | printk("McBSP transmitter not ready\n"); | ||
| 619 | return -EAGAIN; | ||
| 620 | } | ||
| 621 | } | ||
| 622 | |||
| 623 | /* We first need to enable the bus clock */ | ||
| 624 | if (tx_word_length > OMAP_MCBSP_WORD_16) | ||
| 625 | OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16); | ||
| 626 | OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff); | ||
| 627 | |||
| 628 | /* We wait for the receiver to be ready */ | ||
| 629 | spcr1 = OMAP_MCBSP_READ(io_base, SPCR1); | ||
| 630 | while (!(spcr1 & RRDY)) { | ||
| 631 | spcr1 = OMAP_MCBSP_READ(io_base, SPCR1); | ||
| 632 | if (attempts++ > 1000) { | ||
| 633 | /* We must reset the receiver */ | ||
| 634 | OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST)); | ||
| 635 | udelay(10); | ||
| 636 | OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); | ||
| 637 | udelay(10); | ||
| 638 | printk("McBSP receiver not ready\n"); | ||
| 639 | return -EAGAIN; | ||
| 640 | } | ||
| 641 | } | ||
| 642 | |||
| 643 | /* Receiver is ready, there is something for us */ | ||
| 644 | if (rx_word_length > OMAP_MCBSP_WORD_16) | ||
| 645 | word_msb = OMAP_MCBSP_READ(io_base, DRR2); | ||
| 646 | word_lsb = OMAP_MCBSP_READ(io_base, DRR1); | ||
| 647 | |||
| 648 | word[0] = (word_lsb | (word_msb << 16)); | ||
| 649 | |||
| 650 | return 0; | ||
| 651 | } | ||
| 652 | |||
| 653 | |||
| 464 | /* | 654 | /* |
| 465 | * Simple DMA based buffer rx/tx routines. | 655 | * Simple DMA based buffer rx/tx routines. |
| 466 | * Nothing fancy, just a single buffer tx/rx through DMA. | 656 | * Nothing fancy, just a single buffer tx/rx through DMA. |
| @@ -471,6 +661,9 @@ u32 omap_mcbsp_recv_word(unsigned int id) | |||
| 471 | int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) | 661 | int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) |
| 472 | { | 662 | { |
| 473 | int dma_tx_ch; | 663 | int dma_tx_ch; |
| 664 | int src_port = 0; | ||
| 665 | int dest_port = 0; | ||
| 666 | int sync_dev = 0; | ||
| 474 | 667 | ||
| 475 | if (omap_mcbsp_check(id) < 0) | 668 | if (omap_mcbsp_check(id) < 0) |
| 476 | return -EINVAL; | 669 | return -EINVAL; |
| @@ -487,20 +680,27 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng | |||
| 487 | 680 | ||
| 488 | init_completion(&(mcbsp[id].tx_dma_completion)); | 681 | init_completion(&(mcbsp[id].tx_dma_completion)); |
| 489 | 682 | ||
| 683 | if (cpu_class_is_omap1()) { | ||
| 684 | src_port = OMAP_DMA_PORT_TIPB; | ||
| 685 | dest_port = OMAP_DMA_PORT_EMIFF; | ||
| 686 | } | ||
| 687 | if (cpu_is_omap24xx()) | ||
| 688 | sync_dev = mcbsp[id].dma_tx_sync; | ||
| 689 | |||
| 490 | omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch, | 690 | omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch, |
| 491 | OMAP_DMA_DATA_TYPE_S16, | 691 | OMAP_DMA_DATA_TYPE_S16, |
| 492 | length >> 1, 1, | 692 | length >> 1, 1, |
| 493 | OMAP_DMA_SYNC_ELEMENT, | 693 | OMAP_DMA_SYNC_ELEMENT, |
| 494 | 0, 0); | 694 | sync_dev, 0); |
| 495 | 695 | ||
| 496 | omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, | 696 | omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, |
| 497 | OMAP_DMA_PORT_TIPB, | 697 | src_port, |
| 498 | OMAP_DMA_AMODE_CONSTANT, | 698 | OMAP_DMA_AMODE_CONSTANT, |
| 499 | mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1, | 699 | mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1, |
| 500 | 0, 0); | 700 | 0, 0); |
| 501 | 701 | ||
| 502 | omap_set_dma_src_params(mcbsp[id].dma_tx_lch, | 702 | omap_set_dma_src_params(mcbsp[id].dma_tx_lch, |
| 503 | OMAP_DMA_PORT_EMIFF, | 703 | dest_port, |
| 504 | OMAP_DMA_AMODE_POST_INC, | 704 | OMAP_DMA_AMODE_POST_INC, |
| 505 | buffer, | 705 | buffer, |
| 506 | 0, 0); | 706 | 0, 0); |
| @@ -514,6 +714,9 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng | |||
| 514 | int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) | 714 | int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) |
| 515 | { | 715 | { |
| 516 | int dma_rx_ch; | 716 | int dma_rx_ch; |
| 717 | int src_port = 0; | ||
| 718 | int dest_port = 0; | ||
| 719 | int sync_dev = 0; | ||
| 517 | 720 | ||
| 518 | if (omap_mcbsp_check(id) < 0) | 721 | if (omap_mcbsp_check(id) < 0) |
| 519 | return -EINVAL; | 722 | return -EINVAL; |
| @@ -530,20 +733,27 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng | |||
| 530 | 733 | ||
| 531 | init_completion(&(mcbsp[id].rx_dma_completion)); | 734 | init_completion(&(mcbsp[id].rx_dma_completion)); |
| 532 | 735 | ||
| 736 | if (cpu_class_is_omap1()) { | ||
| 737 | src_port = OMAP_DMA_PORT_TIPB; | ||
| 738 | dest_port = OMAP_DMA_PORT_EMIFF; | ||
| 739 | } | ||
| 740 | if (cpu_is_omap24xx()) | ||
| 741 | sync_dev = mcbsp[id].dma_rx_sync; | ||
| 742 | |||
| 533 | omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch, | 743 | omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch, |
| 534 | OMAP_DMA_DATA_TYPE_S16, | 744 | OMAP_DMA_DATA_TYPE_S16, |
| 535 | length >> 1, 1, | 745 | length >> 1, 1, |
| 536 | OMAP_DMA_SYNC_ELEMENT, | 746 | OMAP_DMA_SYNC_ELEMENT, |
| 537 | 0, 0); | 747 | sync_dev, 0); |
| 538 | 748 | ||
| 539 | omap_set_dma_src_params(mcbsp[id].dma_rx_lch, | 749 | omap_set_dma_src_params(mcbsp[id].dma_rx_lch, |
| 540 | OMAP_DMA_PORT_TIPB, | 750 | src_port, |
| 541 | OMAP_DMA_AMODE_CONSTANT, | 751 | OMAP_DMA_AMODE_CONSTANT, |
| 542 | mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1, | 752 | mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1, |
| 543 | 0, 0); | 753 | 0, 0); |
| 544 | 754 | ||
| 545 | omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, | 755 | omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, |
| 546 | OMAP_DMA_PORT_EMIFF, | 756 | dest_port, |
| 547 | OMAP_DMA_AMODE_POST_INC, | 757 | OMAP_DMA_AMODE_POST_INC, |
| 548 | buffer, | 758 | buffer, |
| 549 | 0, 0); | 759 | 0, 0); |
| @@ -688,6 +898,23 @@ static const struct omap_mcbsp_info mcbsp_1610[] = { | |||
| 688 | }; | 898 | }; |
| 689 | #endif | 899 | #endif |
| 690 | 900 | ||
| 901 | #if defined(CONFIG_ARCH_OMAP24XX) | ||
| 902 | static const struct omap_mcbsp_info mcbsp_24xx[] = { | ||
| 903 | [0] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), | ||
| 904 | .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, | ||
| 905 | .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, | ||
| 906 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | ||
| 907 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | ||
| 908 | }, | ||
| 909 | [1] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), | ||
| 910 | .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, | ||
| 911 | .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, | ||
| 912 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | ||
| 913 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | ||
| 914 | }, | ||
| 915 | }; | ||
| 916 | #endif | ||
| 917 | |||
| 691 | static int __init omap_mcbsp_init(void) | 918 | static int __init omap_mcbsp_init(void) |
| 692 | { | 919 | { |
| 693 | int mcbsp_count = 0, i; | 920 | int mcbsp_count = 0, i; |
| @@ -695,6 +922,7 @@ static int __init omap_mcbsp_init(void) | |||
| 695 | 922 | ||
| 696 | printk("Initializing OMAP McBSP system\n"); | 923 | printk("Initializing OMAP McBSP system\n"); |
| 697 | 924 | ||
| 925 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 698 | mcbsp_dsp_ck = clk_get(0, "dsp_ck"); | 926 | mcbsp_dsp_ck = clk_get(0, "dsp_ck"); |
| 699 | if (IS_ERR(mcbsp_dsp_ck)) { | 927 | if (IS_ERR(mcbsp_dsp_ck)) { |
| 700 | printk(KERN_ERR "mcbsp: could not acquire dsp_ck handle.\n"); | 928 | printk(KERN_ERR "mcbsp: could not acquire dsp_ck handle.\n"); |
| @@ -710,6 +938,29 @@ static int __init omap_mcbsp_init(void) | |||
| 710 | printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n"); | 938 | printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n"); |
| 711 | return PTR_ERR(mcbsp_dspxor_ck); | 939 | return PTR_ERR(mcbsp_dspxor_ck); |
| 712 | } | 940 | } |
| 941 | #endif | ||
| 942 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 943 | mcbsp1_ick = clk_get(0, "mcbsp1_ick"); | ||
| 944 | if (IS_ERR(mcbsp1_ick)) { | ||
| 945 | printk(KERN_ERR "mcbsp: could not acquire mcbsp1_ick handle.\n"); | ||
| 946 | return PTR_ERR(mcbsp1_ick); | ||
| 947 | } | ||
| 948 | mcbsp1_fck = clk_get(0, "mcbsp1_fck"); | ||
| 949 | if (IS_ERR(mcbsp1_fck)) { | ||
| 950 | printk(KERN_ERR "mcbsp: could not acquire mcbsp1_fck handle.\n"); | ||
| 951 | return PTR_ERR(mcbsp1_fck); | ||
| 952 | } | ||
| 953 | mcbsp2_ick = clk_get(0, "mcbsp2_ick"); | ||
| 954 | if (IS_ERR(mcbsp2_ick)) { | ||
| 955 | printk(KERN_ERR "mcbsp: could not acquire mcbsp2_ick handle.\n"); | ||
| 956 | return PTR_ERR(mcbsp2_ick); | ||
| 957 | } | ||
| 958 | mcbsp2_fck = clk_get(0, "mcbsp2_fck"); | ||
| 959 | if (IS_ERR(mcbsp2_fck)) { | ||
| 960 | printk(KERN_ERR "mcbsp: could not acquire mcbsp2_fck handle.\n"); | ||
| 961 | return PTR_ERR(mcbsp2_fck); | ||
| 962 | } | ||
| 963 | #endif | ||
| 713 | 964 | ||
| 714 | #ifdef CONFIG_ARCH_OMAP730 | 965 | #ifdef CONFIG_ARCH_OMAP730 |
| 715 | if (cpu_is_omap730()) { | 966 | if (cpu_is_omap730()) { |
| @@ -718,7 +969,7 @@ static int __init omap_mcbsp_init(void) | |||
| 718 | } | 969 | } |
| 719 | #endif | 970 | #endif |
| 720 | #ifdef CONFIG_ARCH_OMAP15XX | 971 | #ifdef CONFIG_ARCH_OMAP15XX |
| 721 | if (cpu_is_omap1510()) { | 972 | if (cpu_is_omap15xx()) { |
| 722 | mcbsp_info = mcbsp_1510; | 973 | mcbsp_info = mcbsp_1510; |
| 723 | mcbsp_count = ARRAY_SIZE(mcbsp_1510); | 974 | mcbsp_count = ARRAY_SIZE(mcbsp_1510); |
| 724 | } | 975 | } |
| @@ -729,6 +980,19 @@ static int __init omap_mcbsp_init(void) | |||
| 729 | mcbsp_count = ARRAY_SIZE(mcbsp_1610); | 980 | mcbsp_count = ARRAY_SIZE(mcbsp_1610); |
| 730 | } | 981 | } |
| 731 | #endif | 982 | #endif |
| 983 | #if defined(CONFIG_ARCH_OMAP24XX) | ||
| 984 | if (cpu_is_omap24xx()) { | ||
| 985 | mcbsp_info = mcbsp_24xx; | ||
| 986 | mcbsp_count = ARRAY_SIZE(mcbsp_24xx); | ||
| 987 | |||
| 988 | /* REVISIT: where's the right place? */ | ||
| 989 | omap2_mcbsp2_mux_setup(); | ||
| 990 | sys_ck = clk_get(0, "sys_ck"); | ||
| 991 | sys_clkout = clk_get(0, "sys_clkout"); | ||
| 992 | clk_set_parent(sys_clkout, sys_ck); | ||
| 993 | clk_enable(sys_clkout); | ||
| 994 | } | ||
| 995 | #endif | ||
| 732 | for (i = 0; i < OMAP_MAX_MCBSP_COUNT ; i++) { | 996 | for (i = 0; i < OMAP_MAX_MCBSP_COUNT ; i++) { |
| 733 | if (i >= mcbsp_count) { | 997 | if (i >= mcbsp_count) { |
| 734 | mcbsp[i].io_base = 0; | 998 | mcbsp[i].io_base = 0; |
| @@ -741,6 +1005,7 @@ static int __init omap_mcbsp_init(void) | |||
| 741 | mcbsp[i].dma_rx_lch = -1; | 1005 | mcbsp[i].dma_rx_lch = -1; |
| 742 | 1006 | ||
| 743 | mcbsp[i].io_base = mcbsp_info[i].virt_base; | 1007 | mcbsp[i].io_base = mcbsp_info[i].virt_base; |
| 1008 | mcbsp[i].io_type = OMAP_MCBSP_IRQ_IO; /* Default I/O is IRQ based */ | ||
| 744 | mcbsp[i].tx_irq = mcbsp_info[i].tx_irq; | 1009 | mcbsp[i].tx_irq = mcbsp_info[i].tx_irq; |
| 745 | mcbsp[i].rx_irq = mcbsp_info[i].rx_irq; | 1010 | mcbsp[i].rx_irq = mcbsp_info[i].rx_irq; |
| 746 | mcbsp[i].dma_rx_sync = mcbsp_info[i].dma_rx_sync; | 1011 | mcbsp[i].dma_rx_sync = mcbsp_info[i].dma_rx_sync; |
| @@ -751,11 +1016,11 @@ static int __init omap_mcbsp_init(void) | |||
| 751 | return 0; | 1016 | return 0; |
| 752 | } | 1017 | } |
| 753 | 1018 | ||
| 754 | |||
| 755 | arch_initcall(omap_mcbsp_init); | 1019 | arch_initcall(omap_mcbsp_init); |
| 756 | 1020 | ||
| 757 | EXPORT_SYMBOL(omap_mcbsp_config); | 1021 | EXPORT_SYMBOL(omap_mcbsp_config); |
| 758 | EXPORT_SYMBOL(omap_mcbsp_request); | 1022 | EXPORT_SYMBOL(omap_mcbsp_request); |
| 1023 | EXPORT_SYMBOL(omap_mcbsp_set_io_type); | ||
| 759 | EXPORT_SYMBOL(omap_mcbsp_free); | 1024 | EXPORT_SYMBOL(omap_mcbsp_free); |
| 760 | EXPORT_SYMBOL(omap_mcbsp_start); | 1025 | EXPORT_SYMBOL(omap_mcbsp_start); |
| 761 | EXPORT_SYMBOL(omap_mcbsp_stop); | 1026 | EXPORT_SYMBOL(omap_mcbsp_stop); |
| @@ -763,4 +1028,6 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_word); | |||
| 763 | EXPORT_SYMBOL(omap_mcbsp_recv_word); | 1028 | EXPORT_SYMBOL(omap_mcbsp_recv_word); |
| 764 | EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); | 1029 | EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); |
| 765 | EXPORT_SYMBOL(omap_mcbsp_recv_buffer); | 1030 | EXPORT_SYMBOL(omap_mcbsp_recv_buffer); |
| 1031 | EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll); | ||
| 1032 | EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll); | ||
| 766 | EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); | 1033 | EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); |
diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c index 5cc6775c789c..37792d43738b 100644 --- a/arch/arm/plat-omap/ocpi.c +++ b/arch/arm/plat-omap/ocpi.c | |||
| @@ -62,9 +62,6 @@ int ocpi_enable(void) | |||
| 62 | if (!cpu_is_omap16xx()) | 62 | if (!cpu_is_omap16xx()) |
| 63 | return -ENODEV; | 63 | return -ENODEV; |
| 64 | 64 | ||
| 65 | /* Make sure there's clock for OCPI */ | ||
| 66 | clk_enable(ocpi_ck); | ||
| 67 | |||
| 68 | /* Enable access for OHCI in OCPI */ | 65 | /* Enable access for OHCI in OCPI */ |
| 69 | val = omap_readl(OCPI_PROT); | 66 | val = omap_readl(OCPI_PROT); |
| 70 | val &= ~0xff; | 67 | val &= ~0xff; |
diff --git a/include/asm-arm/arch-omap/aic23.h b/include/asm-arm/arch-omap/aic23.h index 590bac25b7c4..6513065941d0 100644 --- a/include/asm-arm/arch-omap/aic23.h +++ b/include/asm-arm/arch-omap/aic23.h | |||
| @@ -57,6 +57,7 @@ | |||
| 57 | #define LHV_MIN 0x0000 | 57 | #define LHV_MIN 0x0000 |
| 58 | 58 | ||
| 59 | // Analog audio path control register | 59 | // Analog audio path control register |
| 60 | #define STA_REG(x) ((x)<<6) | ||
| 60 | #define STE_ENABLED 0x0020 | 61 | #define STE_ENABLED 0x0020 |
| 61 | #define DAC_SELECTED 0x0010 | 62 | #define DAC_SELECTED 0x0010 |
| 62 | #define BYPASS_ON 0x0008 | 63 | #define BYPASS_ON 0x0008 |
| @@ -109,4 +110,7 @@ | |||
| 109 | #define TLV320AIC23ID1 (0x1a) // cs low | 110 | #define TLV320AIC23ID1 (0x1a) // cs low |
| 110 | #define TLV320AIC23ID2 (0x1b) // cs high | 111 | #define TLV320AIC23ID2 (0x1b) // cs high |
| 111 | 112 | ||
| 113 | void tlv320aic23_power_up(void); | ||
| 114 | void tlv320aic23_power_down(void); | ||
| 115 | |||
| 112 | #endif /* __ASM_ARCH_AIC23_H */ | 116 | #endif /* __ASM_ARCH_AIC23_H */ |
diff --git a/include/asm-arm/arch-omap/dsp.h b/include/asm-arm/arch-omap/dsp.h index 57bf4f39ca58..06dad83dd41f 100644 --- a/include/asm-arm/arch-omap/dsp.h +++ b/include/asm-arm/arch-omap/dsp.h | |||
| @@ -181,10 +181,16 @@ struct omap_dsp_varinfo { | |||
| 181 | #define OMAP_DSP_MBCMD_PM_ENABLE 0x01 | 181 | #define OMAP_DSP_MBCMD_PM_ENABLE 0x01 |
| 182 | 182 | ||
| 183 | #define OMAP_DSP_MBCMD_KFUNC_FBCTL 0x00 | 183 | #define OMAP_DSP_MBCMD_KFUNC_FBCTL 0x00 |
| 184 | #define OMAP_DSP_MBCMD_KFUNC_AUDIO_PWR 0x01 | ||
| 184 | 185 | ||
| 186 | #define OMAP_DSP_MBCMD_FBCTL_UPD 0x0000 | ||
| 185 | #define OMAP_DSP_MBCMD_FBCTL_ENABLE 0x0002 | 187 | #define OMAP_DSP_MBCMD_FBCTL_ENABLE 0x0002 |
| 186 | #define OMAP_DSP_MBCMD_FBCTL_DISABLE 0x0003 | 188 | #define OMAP_DSP_MBCMD_FBCTL_DISABLE 0x0003 |
| 187 | 189 | ||
| 190 | #define OMAP_DSP_MBCMD_AUDIO_PWR_UP 0x0000 | ||
| 191 | #define OMAP_DSP_MBCMD_AUDIO_PWR_DOWN1 0x0001 | ||
| 192 | #define OMAP_DSP_MBCMD_AUDIO_PWR_DOWN2 0x0002 | ||
| 193 | |||
| 188 | #define OMAP_DSP_MBCMD_TDEL_SAFE 0x0000 | 194 | #define OMAP_DSP_MBCMD_TDEL_SAFE 0x0000 |
| 189 | #define OMAP_DSP_MBCMD_TDEL_KILL 0x0001 | 195 | #define OMAP_DSP_MBCMD_TDEL_KILL 0x0001 |
| 190 | 196 | ||
diff --git a/include/asm-arm/arch-omap/dsp_common.h b/include/asm-arm/arch-omap/dsp_common.h index 4fcce6944056..16a459dfa714 100644 --- a/include/asm-arm/arch-omap/dsp_common.h +++ b/include/asm-arm/arch-omap/dsp_common.h | |||
| @@ -27,11 +27,12 @@ | |||
| 27 | #ifndef ASM_ARCH_DSP_COMMON_H | 27 | #ifndef ASM_ARCH_DSP_COMMON_H |
| 28 | #define ASM_ARCH_DSP_COMMON_H | 28 | #define ASM_ARCH_DSP_COMMON_H |
| 29 | 29 | ||
| 30 | void omap_dsp_pm_suspend(void); | 30 | extern void omap_dsp_request_mpui(void); |
| 31 | void omap_dsp_pm_resume(void); | 31 | extern void omap_dsp_release_mpui(void); |
| 32 | void omap_dsp_request_mpui(void); | 32 | extern int omap_dsp_request_mem(void); |
| 33 | void omap_dsp_release_mpui(void); | 33 | extern int omap_dsp_release_mem(void); |
| 34 | int omap_dsp_request_mem(void); | 34 | |
| 35 | int omap_dsp_release_mem(void); | 35 | extern void (*omap_dsp_audio_pwr_up_request)(int stage); |
| 36 | extern void (*omap_dsp_audio_pwr_down_request)(int stage); | ||
| 36 | 37 | ||
| 37 | #endif /* ASM_ARCH_DSP_COMMON_H */ | 38 | #endif /* ASM_ARCH_DSP_COMMON_H */ |
diff --git a/include/asm-arm/arch-omap/gpioexpander.h b/include/asm-arm/arch-omap/gpioexpander.h new file mode 100644 index 000000000000..7a43b0a912e4 --- /dev/null +++ b/include/asm-arm/arch-omap/gpioexpander.h | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/gpioexpander.h | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
| 6 | * | ||
| 7 | * This package is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR | ||
| 12 | * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED | ||
| 13 | * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __ASM_ARCH_OMAP_GPIOEXPANDER_H | ||
| 17 | #define __ASM_ARCH_OMAP_GPIOEXPANDER_H | ||
| 18 | |||
| 19 | /* Function Prototypes for GPIO Expander functions */ | ||
| 20 | |||
| 21 | int read_gpio_expa(u8 *, int); | ||
| 22 | int write_gpio_expa(u8 , int); | ||
| 23 | |||
| 24 | #endif /* __ASM_ARCH_OMAP_GPIOEXPANDER_H */ | ||
diff --git a/include/asm-arm/arch-omap/irda.h b/include/asm-arm/arch-omap/irda.h new file mode 100644 index 000000000000..805ae3575e44 --- /dev/null +++ b/include/asm-arm/arch-omap/irda.h | |||
| @@ -0,0 +1,36 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/irda.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2005-2006 Komal Shah <komal_shah802003@yahoo.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | #ifndef ASMARM_ARCH_IRDA_H | ||
| 11 | #define ASMARM_ARCH_IRDA_H | ||
| 12 | |||
| 13 | /* board specific transceiver capabilities */ | ||
| 14 | |||
| 15 | #define IR_SEL 1 /* Selects IrDA */ | ||
| 16 | #define IR_SIRMODE 2 | ||
| 17 | #define IR_FIRMODE 4 | ||
| 18 | #define IR_MIRMODE 8 | ||
| 19 | |||
| 20 | struct omap_irda_config { | ||
| 21 | int transceiver_cap; | ||
| 22 | int (*transceiver_mode)(struct device *dev, int mode); | ||
| 23 | int (*select_irda)(struct device *dev, int state); | ||
| 24 | /* Very specific to the needs of some platforms (h3,h4) | ||
| 25 | * having calls which can sleep in irda_set_speed. | ||
| 26 | */ | ||
| 27 | struct work_struct gpio_expa; | ||
| 28 | int rx_channel; | ||
| 29 | int tx_channel; | ||
| 30 | unsigned long dest_start; | ||
| 31 | unsigned long src_start; | ||
| 32 | int tx_trigger; | ||
| 33 | int rx_trigger; | ||
| 34 | }; | ||
| 35 | |||
| 36 | #endif | ||
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 4ffce1d77759..42098d99f302 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h | |||
| @@ -242,6 +242,11 @@ | |||
| 242 | #define INT_24XX_GPIO_BANK2 30 | 242 | #define INT_24XX_GPIO_BANK2 30 |
| 243 | #define INT_24XX_GPIO_BANK3 31 | 243 | #define INT_24XX_GPIO_BANK3 31 |
| 244 | #define INT_24XX_GPIO_BANK4 32 | 244 | #define INT_24XX_GPIO_BANK4 32 |
| 245 | #define INT_24XX_MCBSP1_IRQ_TX 59 | ||
| 246 | #define INT_24XX_MCBSP1_IRQ_RX 60 | ||
| 247 | #define INT_24XX_MCBSP2_IRQ_TX 62 | ||
| 248 | #define INT_24XX_MCBSP2_IRQ_RX 63 | ||
| 249 | #define INT_24XX_UART3_IRQ 74 | ||
| 245 | 250 | ||
| 246 | /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and | 251 | /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and |
| 247 | * 16 MPUIO lines */ | 252 | * 16 MPUIO lines */ |
diff --git a/include/asm-arm/arch-omap/keypad.h b/include/asm-arm/arch-omap/keypad.h new file mode 100644 index 000000000000..8a023a984acb --- /dev/null +++ b/include/asm-arm/arch-omap/keypad.h | |||
| @@ -0,0 +1,36 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/keypad.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | #ifndef ASMARM_ARCH_KEYPAD_H | ||
| 11 | #define ASMARM_ARCH_KEYPAD_H | ||
| 12 | |||
| 13 | struct omap_kp_platform_data { | ||
| 14 | int rows; | ||
| 15 | int cols; | ||
| 16 | int *keymap; | ||
| 17 | unsigned int rep:1; | ||
| 18 | /* specific to OMAP242x*/ | ||
| 19 | unsigned int *row_gpios; | ||
| 20 | unsigned int *col_gpios; | ||
| 21 | }; | ||
| 22 | |||
| 23 | /* Group (0..3) -- when multiple keys are pressed, only the | ||
| 24 | * keys pressed in the same group are considered as pressed. This is | ||
| 25 | * in order to workaround certain crappy HW designs that produce ghost | ||
| 26 | * keypresses. */ | ||
| 27 | #define GROUP_0 (0 << 16) | ||
| 28 | #define GROUP_1 (1 << 16) | ||
| 29 | #define GROUP_2 (2 << 16) | ||
| 30 | #define GROUP_3 (3 << 16) | ||
| 31 | #define GROUP_MASK GROUP_3 | ||
| 32 | |||
| 33 | #define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val)) | ||
| 34 | |||
| 35 | #endif | ||
| 36 | |||
diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h index e79d98ab2ab6..ed0dde4f7219 100644 --- a/include/asm-arm/arch-omap/mcbsp.h +++ b/include/asm-arm/arch-omap/mcbsp.h | |||
| @@ -37,6 +37,11 @@ | |||
| 37 | #define OMAP1610_MCBSP2_BASE 0xfffb1000 | 37 | #define OMAP1610_MCBSP2_BASE 0xfffb1000 |
| 38 | #define OMAP1610_MCBSP3_BASE 0xe1017000 | 38 | #define OMAP1610_MCBSP3_BASE 0xe1017000 |
| 39 | 39 | ||
| 40 | #define OMAP24XX_MCBSP1_BASE 0x48074000 | ||
| 41 | #define OMAP24XX_MCBSP2_BASE 0x48076000 | ||
| 42 | |||
| 43 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) | ||
| 44 | |||
| 40 | #define OMAP_MCBSP_REG_DRR2 0x00 | 45 | #define OMAP_MCBSP_REG_DRR2 0x00 |
| 41 | #define OMAP_MCBSP_REG_DRR1 0x02 | 46 | #define OMAP_MCBSP_REG_DRR1 0x02 |
| 42 | #define OMAP_MCBSP_REG_DXR2 0x04 | 47 | #define OMAP_MCBSP_REG_DXR2 0x04 |
| @@ -71,9 +76,62 @@ | |||
| 71 | 76 | ||
| 72 | #define OMAP_MAX_MCBSP_COUNT 3 | 77 | #define OMAP_MAX_MCBSP_COUNT 3 |
| 73 | 78 | ||
| 79 | #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) | ||
| 80 | #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) | ||
| 81 | |||
| 82 | #define AUDIO_MCBSP OMAP_MCBSP1 | ||
| 83 | #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX | ||
| 84 | #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX | ||
| 85 | |||
| 86 | #elif defined(CONFIG_ARCH_OMAP24XX) | ||
| 87 | |||
| 88 | #define OMAP_MCBSP_REG_DRR2 0x00 | ||
| 89 | #define OMAP_MCBSP_REG_DRR1 0x04 | ||
| 90 | #define OMAP_MCBSP_REG_DXR2 0x08 | ||
| 91 | #define OMAP_MCBSP_REG_DXR1 0x0C | ||
| 92 | #define OMAP_MCBSP_REG_SPCR2 0x10 | ||
| 93 | #define OMAP_MCBSP_REG_SPCR1 0x14 | ||
| 94 | #define OMAP_MCBSP_REG_RCR2 0x18 | ||
| 95 | #define OMAP_MCBSP_REG_RCR1 0x1C | ||
| 96 | #define OMAP_MCBSP_REG_XCR2 0x20 | ||
| 97 | #define OMAP_MCBSP_REG_XCR1 0x24 | ||
| 98 | #define OMAP_MCBSP_REG_SRGR2 0x28 | ||
| 99 | #define OMAP_MCBSP_REG_SRGR1 0x2C | ||
| 100 | #define OMAP_MCBSP_REG_MCR2 0x30 | ||
| 101 | #define OMAP_MCBSP_REG_MCR1 0x34 | ||
| 102 | #define OMAP_MCBSP_REG_RCERA 0x38 | ||
| 103 | #define OMAP_MCBSP_REG_RCERB 0x3C | ||
| 104 | #define OMAP_MCBSP_REG_XCERA 0x40 | ||
| 105 | #define OMAP_MCBSP_REG_XCERB 0x44 | ||
| 106 | #define OMAP_MCBSP_REG_PCR0 0x48 | ||
| 107 | #define OMAP_MCBSP_REG_RCERC 0x4C | ||
| 108 | #define OMAP_MCBSP_REG_RCERD 0x50 | ||
| 109 | #define OMAP_MCBSP_REG_XCERC 0x54 | ||
| 110 | #define OMAP_MCBSP_REG_XCERD 0x58 | ||
| 111 | #define OMAP_MCBSP_REG_RCERE 0x5C | ||
| 112 | #define OMAP_MCBSP_REG_RCERF 0x60 | ||
| 113 | #define OMAP_MCBSP_REG_XCERE 0x64 | ||
| 114 | #define OMAP_MCBSP_REG_XCERF 0x68 | ||
| 115 | #define OMAP_MCBSP_REG_RCERG 0x6C | ||
| 116 | #define OMAP_MCBSP_REG_RCERH 0x70 | ||
| 117 | #define OMAP_MCBSP_REG_XCERG 0x74 | ||
| 118 | #define OMAP_MCBSP_REG_XCERH 0x78 | ||
| 119 | |||
| 120 | #define OMAP_MAX_MCBSP_COUNT 2 | ||
| 121 | |||
| 122 | #define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) | ||
| 123 | #define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) | ||
| 124 | |||
| 125 | #define AUDIO_MCBSP OMAP_MCBSP2 | ||
| 126 | #define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX | ||
| 127 | #define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX | ||
| 128 | |||
| 129 | #endif | ||
| 130 | |||
| 74 | #define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) | 131 | #define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) |
| 75 | #define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) | 132 | #define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) |
| 76 | 133 | ||
| 134 | |||
| 77 | /************************** McBSP SPCR1 bit definitions ***********************/ | 135 | /************************** McBSP SPCR1 bit definitions ***********************/ |
| 78 | #define RRST 0x0001 | 136 | #define RRST 0x0001 |
| 79 | #define RRDY 0x0002 | 137 | #define RRDY 0x0002 |
| @@ -195,6 +253,10 @@ typedef enum { | |||
| 195 | OMAP_MCBSP3, | 253 | OMAP_MCBSP3, |
| 196 | } omap_mcbsp_id; | 254 | } omap_mcbsp_id; |
| 197 | 255 | ||
| 256 | typedef int __bitwise omap_mcbsp_io_type_t; | ||
| 257 | #define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) | ||
| 258 | #define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) | ||
| 259 | |||
| 198 | typedef enum { | 260 | typedef enum { |
| 199 | OMAP_MCBSP_WORD_8 = 0, | 261 | OMAP_MCBSP_WORD_8 = 0, |
| 200 | OMAP_MCBSP_WORD_12, | 262 | OMAP_MCBSP_WORD_12, |
| @@ -246,6 +308,9 @@ u32 omap_mcbsp_recv_word(unsigned int id); | |||
| 246 | 308 | ||
| 247 | int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); | 309 | int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); |
| 248 | int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); | 310 | int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); |
| 311 | int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); | ||
| 312 | int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); | ||
| 313 | |||
| 249 | 314 | ||
| 250 | /* SPI specific API */ | 315 | /* SPI specific API */ |
| 251 | void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); | 316 | void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); |
diff --git a/include/asm-arm/arch-omap/mcspi.h b/include/asm-arm/arch-omap/mcspi.h new file mode 100644 index 000000000000..9e7f40a88e1b --- /dev/null +++ b/include/asm-arm/arch-omap/mcspi.h | |||
| @@ -0,0 +1,16 @@ | |||
| 1 | #ifndef _OMAP2_MCSPI_H | ||
| 2 | #define _OMAP2_MCSPI_H | ||
| 3 | |||
| 4 | struct omap2_mcspi_platform_config { | ||
| 5 | unsigned long base; | ||
| 6 | unsigned short num_cs; | ||
| 7 | }; | ||
| 8 | |||
| 9 | struct omap2_mcspi_device_config { | ||
| 10 | unsigned turbo_mode:1; | ||
| 11 | |||
| 12 | /* Do we want one channel enabled at the same time? */ | ||
| 13 | unsigned single_channel:1; | ||
| 14 | }; | ||
| 15 | |||
| 16 | #endif | ||
diff --git a/include/asm-arm/arch-omap/menelaus.h b/include/asm-arm/arch-omap/menelaus.h index 46be8b8d6346..88cd4c87f0de 100644 --- a/include/asm-arm/arch-omap/menelaus.h +++ b/include/asm-arm/arch-omap/menelaus.h | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | #ifndef __ASM_ARCH_MENELAUS_H | 7 | #ifndef __ASM_ARCH_MENELAUS_H |
| 8 | #define __ASM_ARCH_MENELAUS_H | 8 | #define __ASM_ARCH_MENELAUS_H |
| 9 | 9 | ||
| 10 | extern void menelaus_mmc_register(void (*callback)(u8 card_mask), | 10 | extern void menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask), |
| 11 | unsigned long data); | 11 | unsigned long data); |
| 12 | extern void menelaus_mmc_remove(void); | 12 | extern void menelaus_mmc_remove(void); |
| 13 | extern void menelaus_mmc_opendrain(int enable); | 13 | extern void menelaus_mmc_opendrain(int enable); |
diff --git a/include/asm-arm/arch-omap/omap-alsa.h b/include/asm-arm/arch-omap/omap-alsa.h new file mode 100644 index 000000000000..df4695474e3d --- /dev/null +++ b/include/asm-arm/arch-omap/omap-alsa.h | |||
| @@ -0,0 +1,124 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/omap-alsa.h | ||
| 3 | * | ||
| 4 | * Alsa Driver for AIC23 and TSC2101 codecs on OMAP platform boards. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2006 Mika Laitio <lamikr@cc.jyu.fi> | ||
| 7 | * | ||
| 8 | * Copyright (C) 2005 Instituto Nokia de Tecnologia - INdT - Manaus Brazil | ||
| 9 | * Written by Daniel Petrini, David Cohen, Anderson Briglia | ||
| 10 | * {daniel.petrini, david.cohen, anderson.briglia}@indt.org.br | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify it | ||
| 13 | * under the terms of the GNU General Public License as published by the | ||
| 14 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 15 | * option) any later version. | ||
| 16 | * | ||
| 17 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
| 18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
| 19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
| 20 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
| 24 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 27 | * | ||
| 28 | * You should have received a copy of the GNU General Public License along | ||
| 29 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 31 | * | ||
| 32 | * History | ||
| 33 | * ------- | ||
| 34 | * | ||
| 35 | * 2005/07/25 INdT-10LE Kernel Team - Alsa driver for omap osk, | ||
| 36 | * original version based in sa1100 driver | ||
| 37 | * and omap oss driver. | ||
| 38 | */ | ||
| 39 | |||
| 40 | #ifndef __OMAP_ALSA_H | ||
| 41 | #define __OMAP_ALSA_H | ||
| 42 | |||
| 43 | #include <sound/driver.h> | ||
| 44 | #include <asm/arch/dma.h> | ||
| 45 | #include <sound/core.h> | ||
| 46 | #include <sound/pcm.h> | ||
| 47 | #include <asm/arch/mcbsp.h> | ||
| 48 | #include <linux/platform_device.h> | ||
| 49 | |||
| 50 | #define DMA_BUF_SIZE (1024 * 8) | ||
| 51 | |||
| 52 | /* | ||
| 53 | * Buffer management for alsa and dma | ||
| 54 | */ | ||
| 55 | struct audio_stream { | ||
| 56 | char *id; /* identification string */ | ||
| 57 | int stream_id; /* numeric identification */ | ||
| 58 | int dma_dev; /* dma number of that device */ | ||
| 59 | int *lch; /* Chain of channels this stream is linked to */ | ||
| 60 | char started; /* to store if the chain was started or not */ | ||
| 61 | int dma_q_head; /* DMA Channel Q Head */ | ||
| 62 | int dma_q_tail; /* DMA Channel Q Tail */ | ||
| 63 | char dma_q_count; /* DMA Channel Q Count */ | ||
| 64 | int active:1; /* we are using this stream for transfer now */ | ||
| 65 | int period; /* current transfer period */ | ||
| 66 | int periods; /* current count of periods registerd in the DMA engine */ | ||
| 67 | spinlock_t dma_lock; /* for locking in DMA operations */ | ||
| 68 | snd_pcm_substream_t *stream; /* the pcm stream */ | ||
| 69 | unsigned linked:1; /* dma channels linked */ | ||
| 70 | int offset; /* store start position of the last period in the alsa buffer */ | ||
| 71 | int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */ | ||
| 72 | int (*hw_stop)(void); /* interface to stop HW interface, e.g. McBSP */ | ||
| 73 | }; | ||
| 74 | |||
| 75 | /* | ||
| 76 | * Alsa card structure for aic23 | ||
| 77 | */ | ||
| 78 | struct snd_card_omap_codec { | ||
| 79 | snd_card_t *card; | ||
| 80 | snd_pcm_t *pcm; | ||
| 81 | long samplerate; | ||
| 82 | struct audio_stream s[2]; /* playback & capture */ | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* Codec specific information and function pointers. | ||
| 86 | * Codec (omap-alsa-aic23.c and omap-alsa-tsc2101.c) | ||
| 87 | * are responsible for defining the function pointers. | ||
| 88 | */ | ||
| 89 | struct omap_alsa_codec_config { | ||
| 90 | char *name; | ||
| 91 | struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa; | ||
| 92 | snd_pcm_hw_constraint_list_t *hw_constraints_rates; | ||
| 93 | snd_pcm_hardware_t *snd_omap_alsa_playback; | ||
| 94 | snd_pcm_hardware_t *snd_omap_alsa_capture; | ||
| 95 | void (*codec_configure_dev)(void); | ||
| 96 | void (*codec_set_samplerate)(long); | ||
| 97 | void (*codec_clock_setup)(void); | ||
| 98 | int (*codec_clock_on)(void); | ||
| 99 | int (*codec_clock_off)(void); | ||
| 100 | int (*get_default_samplerate)(void); | ||
| 101 | }; | ||
| 102 | |||
| 103 | /*********** Mixer function prototypes *************************/ | ||
| 104 | int snd_omap_mixer(struct snd_card_omap_codec *); | ||
| 105 | void snd_omap_init_mixer(void); | ||
| 106 | |||
| 107 | #ifdef CONFIG_PM | ||
| 108 | void snd_omap_suspend_mixer(void); | ||
| 109 | void snd_omap_resume_mixer(void); | ||
| 110 | #endif | ||
| 111 | |||
| 112 | int snd_omap_alsa_post_probe(struct platform_device *pdev, struct omap_alsa_codec_config *config); | ||
| 113 | int snd_omap_alsa_remove(struct platform_device *pdev); | ||
| 114 | #ifdef CONFIG_PM | ||
| 115 | int snd_omap_alsa_suspend(struct platform_device *pdev, pm_message_t state); | ||
| 116 | int snd_omap_alsa_resume(struct platform_device *pdev); | ||
| 117 | #else | ||
| 118 | #define snd_omap_alsa_suspend NULL | ||
| 119 | #define snd_omap_alsa_resume NULL | ||
| 120 | #endif | ||
| 121 | |||
| 122 | void callback_omap_alsa_sound_dma(void *); | ||
| 123 | |||
| 124 | #endif | ||
