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-rw-r--r--arch/powerpc/boot/dts/digsy_mtc.dts12
-rw-r--r--arch/powerpc/boot/dts/virtex440-ml507.dts124
-rw-r--r--arch/powerpc/configs/mpc5200_defconfig71
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_common.c3
4 files changed, 184 insertions, 26 deletions
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
index 0e85ebf7e4c8..4c36186ef946 100644
--- a/arch/powerpc/boot/dts/digsy_mtc.dts
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -155,18 +155,18 @@
155 reg = <0x1f00 0x100>; 155 reg = <0x1f00 0x100>;
156 }; 156 };
157 157
158 serial@2400 { // PSC3
159 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
160 reg = <0x2400 0x100>;
161 interrupts = <2 3 0>;
162 };
163
164 serial@2600 { // PSC4 158 serial@2600 { // PSC4
165 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 159 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
166 reg = <0x2600 0x100>; 160 reg = <0x2600 0x100>;
167 interrupts = <2 11 0>; 161 interrupts = <2 11 0>;
168 }; 162 };
169 163
164 serial@2800 { // PSC5
165 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
166 reg = <0x2800 0x100>;
167 interrupts = <2 12 0>;
168 };
169
170 ethernet@3000 { 170 ethernet@3000 {
171 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 171 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
172 reg = <0x3000 0x400>; 172 reg = <0x3000 0x400>;
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
index dc8e78e2dceb..52d8c1ad26a1 100644
--- a/arch/powerpc/boot/dts/virtex440-ml507.dts
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -7,6 +7,15 @@
7 * This file is licensed under the terms of the GNU General Public License 7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any 8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 *
11 * ---
12 *
13 * Device Tree Generator version: 1.1
14 *
15 * CAUTION: This file is automatically generated by libgen.
16 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
17 *
18 * XPS project directory: ml507_ppc440_emb_ref
10 */ 19 */
11 20
12/dts-v1/; 21/dts-v1/;
@@ -22,8 +31,8 @@
22 reg = < 0 0x10000000 >; 31 reg = < 0 0x10000000 >;
23 } ; 32 } ;
24 chosen { 33 chosen {
25 bootargs = "console=ttyS0 ip=on root=/dev/ram"; 34 bootargs = "console=ttyS0 root=/dev/ram";
26 linux,stdout-path = "/plb@0/serial@83e00000"; 35 linux,stdout-path = &RS232_Uart_1;
27 } ; 36 } ;
28 cpus { 37 cpus {
29 #address-cells = <1>; 38 #address-cells = <1>;
@@ -136,19 +145,19 @@
136 compatible = "xlnx,ll-dma-1.00.a"; 145 compatible = "xlnx,ll-dma-1.00.a";
137 dcr-reg = < 0x80 0x11 >; 146 dcr-reg = < 0x80 0x11 >;
138 interrupt-parent = <&xps_intc_0>; 147 interrupt-parent = <&xps_intc_0>;
139 interrupts = < 9 2 0xa 2 >; 148 interrupts = < 10 2 11 2 >;
140 } ; 149 } ;
141 } ; 150 } ;
142 } ; 151 } ;
143 plb_v46_0: plb@0 { 152 plb_v46_0: plb@0 {
144 #address-cells = <1>; 153 #address-cells = <1>;
145 #size-cells = <1>; 154 #size-cells = <1>;
146 compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; 155 compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
147 ranges ; 156 ranges ;
148 DIP_Switches_8Bit: gpio@81460000 { 157 DIP_Switches_8Bit: gpio@81460000 {
149 compatible = "xlnx,xps-gpio-1.00.a"; 158 compatible = "xlnx,xps-gpio-1.00.a";
150 interrupt-parent = <&xps_intc_0>; 159 interrupt-parent = <&xps_intc_0>;
151 interrupts = < 6 2 >; 160 interrupts = < 7 2 >;
152 reg = < 0x81460000 0x10000 >; 161 reg = < 0x81460000 0x10000 >;
153 xlnx,all-inputs = <1>; 162 xlnx,all-inputs = <1>;
154 xlnx,all-inputs-2 = <0>; 163 xlnx,all-inputs-2 = <0>;
@@ -163,6 +172,86 @@
163 xlnx,tri-default = <0xffffffff>; 172 xlnx,tri-default = <0xffffffff>;
164 xlnx,tri-default-2 = <0xffffffff>; 173 xlnx,tri-default-2 = <0xffffffff>;
165 } ; 174 } ;
175 FLASH: flash@fc000000 {
176 bank-width = <2>;
177 compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
178 reg = < 0xfc000000 0x2000000 >;
179 xlnx,family = "virtex5";
180 xlnx,include-datawidth-matching-0 = <0x1>;
181 xlnx,include-datawidth-matching-1 = <0x0>;
182 xlnx,include-datawidth-matching-2 = <0x0>;
183 xlnx,include-datawidth-matching-3 = <0x0>;
184 xlnx,include-negedge-ioregs = <0x0>;
185 xlnx,include-plb-ipif = <0x1>;
186 xlnx,include-wrbuf = <0x1>;
187 xlnx,max-mem-width = <0x10>;
188 xlnx,mch-native-dwidth = <0x20>;
189 xlnx,mch-plb-clk-period-ps = <0x2710>;
190 xlnx,mch-splb-awidth = <0x20>;
191 xlnx,mch0-accessbuf-depth = <0x10>;
192 xlnx,mch0-protocol = <0x0>;
193 xlnx,mch0-rddatabuf-depth = <0x10>;
194 xlnx,mch1-accessbuf-depth = <0x10>;
195 xlnx,mch1-protocol = <0x0>;
196 xlnx,mch1-rddatabuf-depth = <0x10>;
197 xlnx,mch2-accessbuf-depth = <0x10>;
198 xlnx,mch2-protocol = <0x0>;
199 xlnx,mch2-rddatabuf-depth = <0x10>;
200 xlnx,mch3-accessbuf-depth = <0x10>;
201 xlnx,mch3-protocol = <0x0>;
202 xlnx,mch3-rddatabuf-depth = <0x10>;
203 xlnx,mem0-width = <0x10>;
204 xlnx,mem1-width = <0x20>;
205 xlnx,mem2-width = <0x20>;
206 xlnx,mem3-width = <0x20>;
207 xlnx,num-banks-mem = <0x1>;
208 xlnx,num-channels = <0x2>;
209 xlnx,priority-mode = <0x0>;
210 xlnx,synch-mem-0 = <0x0>;
211 xlnx,synch-mem-1 = <0x0>;
212 xlnx,synch-mem-2 = <0x0>;
213 xlnx,synch-mem-3 = <0x0>;
214 xlnx,synch-pipedelay-0 = <0x2>;
215 xlnx,synch-pipedelay-1 = <0x2>;
216 xlnx,synch-pipedelay-2 = <0x2>;
217 xlnx,synch-pipedelay-3 = <0x2>;
218 xlnx,tavdv-ps-mem-0 = <0x1adb0>;
219 xlnx,tavdv-ps-mem-1 = <0x3a98>;
220 xlnx,tavdv-ps-mem-2 = <0x3a98>;
221 xlnx,tavdv-ps-mem-3 = <0x3a98>;
222 xlnx,tcedv-ps-mem-0 = <0x1adb0>;
223 xlnx,tcedv-ps-mem-1 = <0x3a98>;
224 xlnx,tcedv-ps-mem-2 = <0x3a98>;
225 xlnx,tcedv-ps-mem-3 = <0x3a98>;
226 xlnx,thzce-ps-mem-0 = <0x88b8>;
227 xlnx,thzce-ps-mem-1 = <0x1b58>;
228 xlnx,thzce-ps-mem-2 = <0x1b58>;
229 xlnx,thzce-ps-mem-3 = <0x1b58>;
230 xlnx,thzoe-ps-mem-0 = <0x1b58>;
231 xlnx,thzoe-ps-mem-1 = <0x1b58>;
232 xlnx,thzoe-ps-mem-2 = <0x1b58>;
233 xlnx,thzoe-ps-mem-3 = <0x1b58>;
234 xlnx,tlzwe-ps-mem-0 = <0x88b8>;
235 xlnx,tlzwe-ps-mem-1 = <0x0>;
236 xlnx,tlzwe-ps-mem-2 = <0x0>;
237 xlnx,tlzwe-ps-mem-3 = <0x0>;
238 xlnx,twc-ps-mem-0 = <0x2af8>;
239 xlnx,twc-ps-mem-1 = <0x3a98>;
240 xlnx,twc-ps-mem-2 = <0x3a98>;
241 xlnx,twc-ps-mem-3 = <0x3a98>;
242 xlnx,twp-ps-mem-0 = <0x11170>;
243 xlnx,twp-ps-mem-1 = <0x2ee0>;
244 xlnx,twp-ps-mem-2 = <0x2ee0>;
245 xlnx,twp-ps-mem-3 = <0x2ee0>;
246 xlnx,xcl0-linesize = <0x4>;
247 xlnx,xcl0-writexfer = <0x1>;
248 xlnx,xcl1-linesize = <0x4>;
249 xlnx,xcl1-writexfer = <0x1>;
250 xlnx,xcl2-linesize = <0x4>;
251 xlnx,xcl2-writexfer = <0x1>;
252 xlnx,xcl3-linesize = <0x4>;
253 xlnx,xcl3-writexfer = <0x1>;
254 } ;
166 Hard_Ethernet_MAC: xps-ll-temac@81c00000 { 255 Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
167 #address-cells = <1>; 256 #address-cells = <1>;
168 #size-cells = <1>; 257 #size-cells = <1>;
@@ -185,6 +274,19 @@
185 xlnx,txfifo = <0x1000>; 274 xlnx,txfifo = <0x1000>;
186 } ; 275 } ;
187 } ; 276 } ;
277 IIC_EEPROM: i2c@81600000 {
278 compatible = "xlnx,xps-iic-2.00.a";
279 interrupt-parent = <&xps_intc_0>;
280 interrupts = < 6 2 >;
281 reg = < 0x81600000 0x10000 >;
282 xlnx,clk-freq = <0x5f5e100>;
283 xlnx,family = "virtex5";
284 xlnx,gpo-width = <0x1>;
285 xlnx,iic-freq = <0x186a0>;
286 xlnx,scl-inertial-delay = <0x0>;
287 xlnx,sda-inertial-delay = <0x0>;
288 xlnx,ten-bit-adr = <0x0>;
289 } ;
188 LEDs_8Bit: gpio@81400000 { 290 LEDs_8Bit: gpio@81400000 {
189 compatible = "xlnx,xps-gpio-1.00.a"; 291 compatible = "xlnx,xps-gpio-1.00.a";
190 reg = < 0x81400000 0x10000 >; 292 reg = < 0x81400000 0x10000 >;
@@ -220,7 +322,7 @@
220 Push_Buttons_5Bit: gpio@81440000 { 322 Push_Buttons_5Bit: gpio@81440000 {
221 compatible = "xlnx,xps-gpio-1.00.a"; 323 compatible = "xlnx,xps-gpio-1.00.a";
222 interrupt-parent = <&xps_intc_0>; 324 interrupt-parent = <&xps_intc_0>;
223 interrupts = < 7 2 >; 325 interrupts = < 8 2 >;
224 reg = < 0x81440000 0x10000 >; 326 reg = < 0x81440000 0x10000 >;
225 xlnx,all-inputs = <1>; 327 xlnx,all-inputs = <1>;
226 xlnx,all-inputs-2 = <0>; 328 xlnx,all-inputs-2 = <0>;
@@ -237,13 +339,13 @@
237 } ; 339 } ;
238 RS232_Uart_1: serial@83e00000 { 340 RS232_Uart_1: serial@83e00000 {
239 clock-frequency = <100000000>; 341 clock-frequency = <100000000>;
240 compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; 342 compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
241 current-speed = <0x2580>; 343 current-speed = <9600>;
242 device_type = "serial"; 344 device_type = "serial";
243 interrupt-parent = <&xps_intc_0>; 345 interrupt-parent = <&xps_intc_0>;
244 interrupts = < 8 2 >; 346 interrupts = < 9 2 >;
245 reg = < 0x83e00000 0x10000 >; 347 reg = < 0x83e00000 0x10000 >;
246 reg-offset = <3>; 348 reg-offset = <0x1003>;
247 reg-shift = <2>; 349 reg-shift = <2>;
248 xlnx,family = "virtex5"; 350 xlnx,family = "virtex5";
249 xlnx,has-external-rclk = <0>; 351 xlnx,has-external-rclk = <0>;
@@ -268,7 +370,7 @@
268 compatible = "xlnx,xps-intc-1.00.a"; 370 compatible = "xlnx,xps-intc-1.00.a";
269 interrupt-controller ; 371 interrupt-controller ;
270 reg = < 0x81800000 0x10000 >; 372 reg = < 0x81800000 0x10000 >;
271 xlnx,num-intr-inputs = <0xb>; 373 xlnx,num-intr-inputs = <0xc>;
272 } ; 374 } ;
273 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { 375 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
274 compatible = "xlnx,xps-timebase-wdt-1.00.b"; 376 compatible = "xlnx,xps-timebase-wdt-1.00.b";
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 81afc8b373d7..af0cd55605d0 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc2 3# Linux kernel version: 2.6.29-rc3
4# Mon Jan 26 21:40:44 2009 4# Fri Feb 6 09:48:53 2009
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -388,7 +388,10 @@ CONFIG_MTD=y
388CONFIG_MTD_CONCAT=y 388CONFIG_MTD_CONCAT=y
389CONFIG_MTD_PARTITIONS=y 389CONFIG_MTD_PARTITIONS=y
390# CONFIG_MTD_TESTS is not set 390# CONFIG_MTD_TESTS is not set
391# CONFIG_MTD_REDBOOT_PARTS is not set 391CONFIG_MTD_REDBOOT_PARTS=y
392CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
393# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
394# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
392CONFIG_MTD_CMDLINE_PARTS=y 395CONFIG_MTD_CMDLINE_PARTS=y
393# CONFIG_MTD_OF_PARTS is not set 396# CONFIG_MTD_OF_PARTS is not set
394# CONFIG_MTD_AR7_PARTS is not set 397# CONFIG_MTD_AR7_PARTS is not set
@@ -502,7 +505,7 @@ CONFIG_MISC_DEVICES=y
502# 505#
503# EEPROM support 506# EEPROM support
504# 507#
505# CONFIG_EEPROM_AT24 is not set 508CONFIG_EEPROM_AT24=y
506# CONFIG_EEPROM_LEGACY is not set 509# CONFIG_EEPROM_LEGACY is not set
507# CONFIG_EEPROM_93CX6 is not set 510# CONFIG_EEPROM_93CX6 is not set
508CONFIG_HAVE_IDE=y 511CONFIG_HAVE_IDE=y
@@ -678,7 +681,7 @@ CONFIG_PHYLIB=y
678# CONFIG_MARVELL_PHY is not set 681# CONFIG_MARVELL_PHY is not set
679# CONFIG_DAVICOM_PHY is not set 682# CONFIG_DAVICOM_PHY is not set
680# CONFIG_QSEMI_PHY is not set 683# CONFIG_QSEMI_PHY is not set
681# CONFIG_LXT_PHY is not set 684CONFIG_LXT_PHY=y
682# CONFIG_CICADA_PHY is not set 685# CONFIG_CICADA_PHY is not set
683# CONFIG_VITESSE_PHY is not set 686# CONFIG_VITESSE_PHY is not set
684# CONFIG_SMSC_PHY is not set 687# CONFIG_SMSC_PHY is not set
@@ -815,8 +818,6 @@ CONFIG_LEGACY_PTY_COUNT=256
815# CONFIG_IPMI_HANDLER is not set 818# CONFIG_IPMI_HANDLER is not set
816# CONFIG_HW_RANDOM is not set 819# CONFIG_HW_RANDOM is not set
817# CONFIG_NVRAM is not set 820# CONFIG_NVRAM is not set
818CONFIG_GEN_RTC=y
819# CONFIG_GEN_RTC_X is not set
820# CONFIG_R3964 is not set 821# CONFIG_R3964 is not set
821# CONFIG_APPLICOM is not set 822# CONFIG_APPLICOM is not set
822# CONFIG_RAW_DRIVER is not set 823# CONFIG_RAW_DRIVER is not set
@@ -1281,7 +1282,61 @@ CONFIG_NEW_LEDS=y
1281# CONFIG_ACCESSIBILITY is not set 1282# CONFIG_ACCESSIBILITY is not set
1282# CONFIG_INFINIBAND is not set 1283# CONFIG_INFINIBAND is not set
1283# CONFIG_EDAC is not set 1284# CONFIG_EDAC is not set
1284# CONFIG_RTC_CLASS is not set 1285CONFIG_RTC_LIB=y
1286CONFIG_RTC_CLASS=y
1287CONFIG_RTC_HCTOSYS=y
1288CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1289# CONFIG_RTC_DEBUG is not set
1290
1291#
1292# RTC interfaces
1293#
1294CONFIG_RTC_INTF_SYSFS=y
1295CONFIG_RTC_INTF_PROC=y
1296CONFIG_RTC_INTF_DEV=y
1297# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1298# CONFIG_RTC_DRV_TEST is not set
1299
1300#
1301# I2C RTC drivers
1302#
1303CONFIG_RTC_DRV_DS1307=y
1304# CONFIG_RTC_DRV_DS1374 is not set
1305# CONFIG_RTC_DRV_DS1672 is not set
1306# CONFIG_RTC_DRV_MAX6900 is not set
1307# CONFIG_RTC_DRV_RS5C372 is not set
1308# CONFIG_RTC_DRV_ISL1208 is not set
1309# CONFIG_RTC_DRV_X1205 is not set
1310# CONFIG_RTC_DRV_PCF8563 is not set
1311# CONFIG_RTC_DRV_PCF8583 is not set
1312# CONFIG_RTC_DRV_M41T80 is not set
1313# CONFIG_RTC_DRV_S35390A is not set
1314# CONFIG_RTC_DRV_FM3130 is not set
1315# CONFIG_RTC_DRV_RX8581 is not set
1316
1317#
1318# SPI RTC drivers
1319#
1320
1321#
1322# Platform RTC drivers
1323#
1324# CONFIG_RTC_DRV_CMOS is not set
1325# CONFIG_RTC_DRV_DS1286 is not set
1326# CONFIG_RTC_DRV_DS1511 is not set
1327# CONFIG_RTC_DRV_DS1553 is not set
1328# CONFIG_RTC_DRV_DS1742 is not set
1329# CONFIG_RTC_DRV_STK17TA8 is not set
1330# CONFIG_RTC_DRV_M48T86 is not set
1331# CONFIG_RTC_DRV_M48T35 is not set
1332# CONFIG_RTC_DRV_M48T59 is not set
1333# CONFIG_RTC_DRV_BQ4802 is not set
1334# CONFIG_RTC_DRV_V3020 is not set
1335
1336#
1337# on-CPU RTC drivers
1338#
1339# CONFIG_RTC_DRV_PPC is not set
1285# CONFIG_DMADEVICES is not set 1340# CONFIG_DMADEVICES is not set
1286# CONFIG_UIO is not set 1341# CONFIG_UIO is not set
1287# CONFIG_STAGING is not set 1342# CONFIG_STAGING is not set
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 98367a0255f3..e9d2cf632eeb 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -28,9 +28,10 @@ static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
28static struct of_device_id mpc52xx_bus_ids[] __initdata = { 28static struct of_device_id mpc52xx_bus_ids[] __initdata = {
29 { .compatible = "fsl,mpc5200-immr", }, 29 { .compatible = "fsl,mpc5200-immr", },
30 { .compatible = "fsl,mpc5200b-immr", }, 30 { .compatible = "fsl,mpc5200b-immr", },
31 { .compatible = "fsl,lpb", }, 31 { .compatible = "simple-bus", },
32 32
33 /* depreciated matches; shouldn't be used in new device trees */ 33 /* depreciated matches; shouldn't be used in new device trees */
34 { .compatible = "fsl,lpb", },
34 { .type = "builtin", .compatible = "mpc5200", }, /* efika */ 35 { .type = "builtin", .compatible = "mpc5200", }, /* efika */
35 { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */ 36 { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
36 {} 37 {}