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-rw-r--r--drivers/hwmon/w83627hf.c85
1 files changed, 42 insertions, 43 deletions
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index d67407d045bd..b257c7223733 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -59,6 +59,11 @@ static struct platform_device *pdev;
59#define DRVNAME "w83627hf" 59#define DRVNAME "w83627hf"
60enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; 60enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61 61
62struct w83627hf_sio_data {
63 enum chips type;
64 int sioaddr;
65};
66
62static u8 force_i2c = 0x1f; 67static u8 force_i2c = 0x1f;
63module_param(force_i2c, byte, 0); 68module_param(force_i2c, byte, 0);
64MODULE_PARM_DESC(force_i2c, 69MODULE_PARM_DESC(force_i2c,
@@ -73,9 +78,7 @@ module_param(force_id, ushort, 0);
73MODULE_PARM_DESC(force_id, "Override the detected device ID"); 78MODULE_PARM_DESC(force_id, "Override the detected device ID");
74 79
75/* modified from kernel/include/traps.c */ 80/* modified from kernel/include/traps.c */
76static int REG; /* The register to read/write */
77#define DEV 0x07 /* Register: Logical device select */ 81#define DEV 0x07 /* Register: Logical device select */
78static int VAL; /* The value to read/write */
79 82
80/* logical device numbers for superio_select (below) */ 83/* logical device numbers for superio_select (below) */
81#define W83627HF_LD_FDC 0x00 84#define W83627HF_LD_FDC 0x00
@@ -105,37 +108,37 @@ static int VAL; /* The value to read/write */
105#define W83687THF_VID_DATA 0xF1 /* w83687thf only */ 108#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
106 109
107static inline void 110static inline void
108superio_outb(int reg, int val) 111superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
109{ 112{
110 outb(reg, REG); 113 outb(reg, sio->sioaddr);
111 outb(val, VAL); 114 outb(val, sio->sioaddr + 1);
112} 115}
113 116
114static inline int 117static inline int
115superio_inb(int reg) 118superio_inb(struct w83627hf_sio_data *sio, int reg)
116{ 119{
117 outb(reg, REG); 120 outb(reg, sio->sioaddr);
118 return inb(VAL); 121 return inb(sio->sioaddr + 1);
119} 122}
120 123
121static inline void 124static inline void
122superio_select(int ld) 125superio_select(struct w83627hf_sio_data *sio, int ld)
123{ 126{
124 outb(DEV, REG); 127 outb(DEV, sio->sioaddr);
125 outb(ld, VAL); 128 outb(ld, sio->sioaddr + 1);
126} 129}
127 130
128static inline void 131static inline void
129superio_enter(void) 132superio_enter(struct w83627hf_sio_data *sio)
130{ 133{
131 outb(0x87, REG); 134 outb(0x87, sio->sioaddr);
132 outb(0x87, REG); 135 outb(0x87, sio->sioaddr);
133} 136}
134 137
135static inline void 138static inline void
136superio_exit(void) 139superio_exit(struct w83627hf_sio_data *sio)
137{ 140{
138 outb(0xAA, REG); 141 outb(0xAA, sio->sioaddr);
139} 142}
140 143
141#define W627_DEVID 0x52 144#define W627_DEVID 0x52
@@ -376,10 +379,6 @@ struct w83627hf_data {
376 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ 379 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
377}; 380};
378 381
379struct w83627hf_sio_data {
380 enum chips type;
381};
382
383 382
384static int w83627hf_probe(struct platform_device *pdev); 383static int w83627hf_probe(struct platform_device *pdev);
385static int __devexit w83627hf_remove(struct platform_device *pdev); 384static int __devexit w83627hf_remove(struct platform_device *pdev);
@@ -1136,11 +1135,8 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1136 "W83687THF", 1135 "W83687THF",
1137 }; 1136 };
1138 1137
1139 REG = sioaddr; 1138 superio_enter(sio_data);
1140 VAL = sioaddr + 1; 1139 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1141
1142 superio_enter();
1143 val = force_id ? force_id : superio_inb(DEVID);
1144 switch (val) { 1140 switch (val) {
1145 case W627_DEVID: 1141 case W627_DEVID:
1146 sio_data->type = w83627hf; 1142 sio_data->type = w83627hf;
@@ -1164,9 +1160,9 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1164 goto exit; 1160 goto exit;
1165 } 1161 }
1166 1162
1167 superio_select(W83627HF_LD_HWM); 1163 superio_select(sio_data, W83627HF_LD_HWM);
1168 val = (superio_inb(WINB_BASE_REG) << 8) | 1164 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1169 superio_inb(WINB_BASE_REG + 1); 1165 superio_inb(sio_data, WINB_BASE_REG + 1);
1170 *addr = val & WINB_ALIGNMENT; 1166 *addr = val & WINB_ALIGNMENT;
1171 if (*addr == 0) { 1167 if (*addr == 0) {
1172 printk(KERN_WARNING DRVNAME ": Base address not set, " 1168 printk(KERN_WARNING DRVNAME ": Base address not set, "
@@ -1174,18 +1170,19 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1174 goto exit; 1170 goto exit;
1175 } 1171 }
1176 1172
1177 val = superio_inb(WINB_ACT_REG); 1173 val = superio_inb(sio_data, WINB_ACT_REG);
1178 if (!(val & 0x01)) { 1174 if (!(val & 0x01)) {
1179 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n"); 1175 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1180 superio_outb(WINB_ACT_REG, val | 0x01); 1176 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1181 } 1177 }
1182 1178
1183 err = 0; 1179 err = 0;
1180 sio_data->sioaddr = sioaddr;
1184 pr_info(DRVNAME ": Found %s chip at %#x\n", 1181 pr_info(DRVNAME ": Found %s chip at %#x\n",
1185 names[sio_data->type], *addr); 1182 names[sio_data->type], *addr);
1186 1183
1187 exit: 1184 exit:
1188 superio_exit(); 1185 superio_exit(sio_data);
1189 return err; 1186 return err;
1190} 1187}
1191 1188
@@ -1500,20 +1497,21 @@ static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1500 1497
1501static int __devinit w83627thf_read_gpio5(struct platform_device *pdev) 1498static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1502{ 1499{
1500 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1503 int res = 0xff, sel; 1501 int res = 0xff, sel;
1504 1502
1505 superio_enter(); 1503 superio_enter(sio_data);
1506 superio_select(W83627HF_LD_GPIO5); 1504 superio_select(sio_data, W83627HF_LD_GPIO5);
1507 1505
1508 /* Make sure these GPIO pins are enabled */ 1506 /* Make sure these GPIO pins are enabled */
1509 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { 1507 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1510 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); 1508 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1511 goto exit; 1509 goto exit;
1512 } 1510 }
1513 1511
1514 /* Make sure the pins are configured for input 1512 /* Make sure the pins are configured for input
1515 There must be at least five (VRM 9), and possibly 6 (VRM 10) */ 1513 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1516 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; 1514 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1517 if ((sel & 0x1f) != 0x1f) { 1515 if ((sel & 0x1f) != 0x1f) {
1518 dev_dbg(&pdev->dev, "GPIO5 not configured for VID " 1516 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1519 "function\n"); 1517 "function\n");
@@ -1521,37 +1519,38 @@ static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1521 } 1519 }
1522 1520
1523 dev_info(&pdev->dev, "Reading VID from GPIO5\n"); 1521 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1524 res = superio_inb(W83627THF_GPIO5_DR) & sel; 1522 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1525 1523
1526exit: 1524exit:
1527 superio_exit(); 1525 superio_exit(sio_data);
1528 return res; 1526 return res;
1529} 1527}
1530 1528
1531static int __devinit w83687thf_read_vid(struct platform_device *pdev) 1529static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1532{ 1530{
1531 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1533 int res = 0xff; 1532 int res = 0xff;
1534 1533
1535 superio_enter(); 1534 superio_enter(sio_data);
1536 superio_select(W83627HF_LD_HWM); 1535 superio_select(sio_data, W83627HF_LD_HWM);
1537 1536
1538 /* Make sure these GPIO pins are enabled */ 1537 /* Make sure these GPIO pins are enabled */
1539 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { 1538 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1540 dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); 1539 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1541 goto exit; 1540 goto exit;
1542 } 1541 }
1543 1542
1544 /* Make sure the pins are configured for input */ 1543 /* Make sure the pins are configured for input */
1545 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { 1544 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1546 dev_dbg(&pdev->dev, "VID configured as output, " 1545 dev_dbg(&pdev->dev, "VID configured as output, "
1547 "no VID function\n"); 1546 "no VID function\n");
1548 goto exit; 1547 goto exit;
1549 } 1548 }
1550 1549
1551 res = superio_inb(W83687THF_VID_DATA) & 0x3f; 1550 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1552 1551
1553exit: 1552exit:
1554 superio_exit(); 1553 superio_exit(sio_data);
1555 return res; 1554 return res;
1556} 1555}
1557 1556