diff options
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 44 |
1 files changed, 25 insertions, 19 deletions
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 52885ac5bb5d..5366a10d8597 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -145,25 +145,29 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |||
145 | */ | 145 | */ |
146 | static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) | 146 | static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) |
147 | { | 147 | { |
148 | u32 v; | 148 | u32 bits, v; |
149 | 149 | ||
150 | if (cpu_is_omap24xx()) { | 150 | if (cpu_is_omap24xx()) { |
151 | if (enable) | 151 | if (enable) |
152 | v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | 152 | bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; |
153 | else | 153 | else |
154 | v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | 154 | bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; |
155 | } else if (cpu_is_omap34xx()) { | 155 | } else if (cpu_is_omap34xx()) { |
156 | if (enable) | 156 | if (enable) |
157 | v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | 157 | bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; |
158 | else | 158 | else |
159 | v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; | 159 | bits = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; |
160 | } else { | 160 | } else { |
161 | BUG(); | 161 | BUG(); |
162 | } | 162 | } |
163 | 163 | ||
164 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | 164 | bits = bits << __ffs(clkdm->clktrctrl_mask); |
165 | v << __ffs(clkdm->clktrctrl_mask), | 165 | |
166 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_CM_CLKSTCTRL); | 166 | v = __raw_readl(clkdm->clkstctrl_reg); |
167 | v &= ~(clkdm->clktrctrl_mask); | ||
168 | v |= bits; | ||
169 | __raw_writel(v, clkdm->clkstctrl_reg); | ||
170 | |||
167 | } | 171 | } |
168 | 172 | ||
169 | static struct clockdomain *_clkdm_lookup(const char *name) | 173 | static struct clockdomain *_clkdm_lookup(const char *name) |
@@ -381,7 +385,7 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) | |||
381 | if (!clkdm) | 385 | if (!clkdm) |
382 | return -EINVAL; | 386 | return -EINVAL; |
383 | 387 | ||
384 | v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, OMAP2_CM_CLKSTCTRL); | 388 | v = __raw_readl(clkdm->clkstctrl_reg); |
385 | v &= clkdm->clktrctrl_mask; | 389 | v &= clkdm->clktrctrl_mask; |
386 | v >>= __ffs(clkdm->clktrctrl_mask); | 390 | v >>= __ffs(clkdm->clktrctrl_mask); |
387 | 391 | ||
@@ -417,12 +421,13 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) | |||
417 | 421 | ||
418 | } else if (cpu_is_omap34xx()) { | 422 | } else if (cpu_is_omap34xx()) { |
419 | 423 | ||
420 | u32 v = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << | 424 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << |
421 | __ffs(clkdm->clktrctrl_mask)); | 425 | __ffs(clkdm->clktrctrl_mask)); |
422 | 426 | ||
423 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, | 427 | u32 v = __raw_readl(clkdm->clkstctrl_reg); |
424 | clkdm->pwrdm.ptr->prcm_offs, | 428 | v &= ~(clkdm->clktrctrl_mask); |
425 | OMAP2_CM_CLKSTCTRL); | 429 | v |= bits; |
430 | __raw_writel(v, clkdm->clkstctrl_reg); | ||
426 | 431 | ||
427 | } else { | 432 | } else { |
428 | BUG(); | 433 | BUG(); |
@@ -460,12 +465,13 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |||
460 | 465 | ||
461 | } else if (cpu_is_omap34xx()) { | 466 | } else if (cpu_is_omap34xx()) { |
462 | 467 | ||
463 | u32 v = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << | 468 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << |
464 | __ffs(clkdm->clktrctrl_mask)); | 469 | __ffs(clkdm->clktrctrl_mask)); |
465 | 470 | ||
466 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, | 471 | u32 v = __raw_readl(clkdm->clkstctrl_reg); |
467 | clkdm->pwrdm.ptr->prcm_offs, | 472 | v &= ~(clkdm->clktrctrl_mask); |
468 | OMAP2_CM_CLKSTCTRL); | 473 | v |= bits; |
474 | __raw_writel(v, clkdm->clkstctrl_reg); | ||
469 | 475 | ||
470 | } else { | 476 | } else { |
471 | BUG(); | 477 | BUG(); |
@@ -561,7 +567,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
561 | * downstream clocks for debugging purposes? | 567 | * downstream clocks for debugging purposes? |
562 | */ | 568 | */ |
563 | 569 | ||
564 | if (!clkdm || !clk || !clkdm->clktrctrl_mask) | 570 | if (!clkdm || !clk || !clkdm->clkstctrl_reg) |
565 | return -EINVAL; | 571 | return -EINVAL; |
566 | 572 | ||
567 | if (atomic_inc_return(&clkdm->usecount) > 1) | 573 | if (atomic_inc_return(&clkdm->usecount) > 1) |
@@ -612,7 +618,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
612 | * downstream clocks for debugging purposes? | 618 | * downstream clocks for debugging purposes? |
613 | */ | 619 | */ |
614 | 620 | ||
615 | if (!clkdm || !clk || !clkdm->clktrctrl_mask) | 621 | if (!clkdm || !clk || !clkdm->clkstctrl_reg) |
616 | return -EINVAL; | 622 | return -EINVAL; |
617 | 623 | ||
618 | #ifdef DEBUG | 624 | #ifdef DEBUG |