diff options
-rw-r--r-- | arch/arm/mach-ux500/devices-db8500.c | 4 | ||||
-rw-r--r-- | arch/arm/plat-nomadik/include/plat/ste_dma40.h | 9 | ||||
-rw-r--r-- | drivers/dma/ste_dma40.c | 4 | ||||
-rw-r--r-- | drivers/dma/ste_dma40_ll.c | 6 |
4 files changed, 8 insertions, 15 deletions
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index d9ceddc22fc2..c04bf2b61dcd 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c | |||
@@ -135,12 +135,10 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = { | |||
135 | .mode = STEDMA40_MODE_PHYSICAL, | 135 | .mode = STEDMA40_MODE_PHYSICAL, |
136 | .dir = STEDMA40_MEM_TO_MEM, | 136 | .dir = STEDMA40_MEM_TO_MEM, |
137 | 137 | ||
138 | .src_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
139 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | 138 | .src_info.data_width = STEDMA40_BYTE_WIDTH, |
140 | .src_info.psize = STEDMA40_PSIZE_PHY_1, | 139 | .src_info.psize = STEDMA40_PSIZE_PHY_1, |
141 | .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, | 140 | .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, |
142 | 141 | ||
143 | .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
144 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | 142 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, |
145 | .dst_info.psize = STEDMA40_PSIZE_PHY_1, | 143 | .dst_info.psize = STEDMA40_PSIZE_PHY_1, |
146 | .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, | 144 | .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, |
@@ -149,12 +147,10 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = { | |||
149 | struct stedma40_chan_cfg dma40_memcpy_conf_log = { | 147 | struct stedma40_chan_cfg dma40_memcpy_conf_log = { |
150 | .dir = STEDMA40_MEM_TO_MEM, | 148 | .dir = STEDMA40_MEM_TO_MEM, |
151 | 149 | ||
152 | .src_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
153 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | 150 | .src_info.data_width = STEDMA40_BYTE_WIDTH, |
154 | .src_info.psize = STEDMA40_PSIZE_LOG_1, | 151 | .src_info.psize = STEDMA40_PSIZE_LOG_1, |
155 | .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, | 152 | .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, |
156 | 153 | ||
157 | .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
158 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | 154 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, |
159 | .dst_info.psize = STEDMA40_PSIZE_LOG_1, | 155 | .dst_info.psize = STEDMA40_PSIZE_LOG_1, |
160 | .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, | 156 | .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, |
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h index d57f37e1b7b3..07339f10d445 100644 --- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h | |||
@@ -69,11 +69,6 @@ enum stedma40_flow_ctrl { | |||
69 | STEDMA40_FLOW_CTRL, | 69 | STEDMA40_FLOW_CTRL, |
70 | }; | 70 | }; |
71 | 71 | ||
72 | enum stedma40_endianess { | ||
73 | STEDMA40_LITTLE_ENDIAN, | ||
74 | STEDMA40_BIG_ENDIAN | ||
75 | }; | ||
76 | |||
77 | enum stedma40_periph_data_width { | 72 | enum stedma40_periph_data_width { |
78 | STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT, | 73 | STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT, |
79 | STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT, | 74 | STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT, |
@@ -92,13 +87,13 @@ enum stedma40_xfer_dir { | |||
92 | /** | 87 | /** |
93 | * struct stedma40_chan_cfg - dst/src channel configuration | 88 | * struct stedma40_chan_cfg - dst/src channel configuration |
94 | * | 89 | * |
95 | * @endianess: Endianess of the src/dst hardware | 90 | * @big_endian: true if the src/dst should be read as big endian |
96 | * @data_width: Data width of the src/dst hardware | 91 | * @data_width: Data width of the src/dst hardware |
97 | * @p_size: Burst size | 92 | * @p_size: Burst size |
98 | * @flow_ctrl: Flow control on/off. | 93 | * @flow_ctrl: Flow control on/off. |
99 | */ | 94 | */ |
100 | struct stedma40_half_channel_info { | 95 | struct stedma40_half_channel_info { |
101 | enum stedma40_endianess endianess; | 96 | bool big_endian; |
102 | enum stedma40_periph_data_width data_width; | 97 | enum stedma40_periph_data_width data_width; |
103 | int psize; | 98 | int psize; |
104 | enum stedma40_flow_ctrl flow_ctrl; | 99 | enum stedma40_flow_ctrl flow_ctrl; |
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 31f7e97c29b5..d82f431b55f0 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c | |||
@@ -2239,11 +2239,11 @@ static void d40_set_runtime_config(struct dma_chan *chan, | |||
2239 | /* Set up all the endpoint configs */ | 2239 | /* Set up all the endpoint configs */ |
2240 | cfg->src_info.data_width = addr_width; | 2240 | cfg->src_info.data_width = addr_width; |
2241 | cfg->src_info.psize = psize; | 2241 | cfg->src_info.psize = psize; |
2242 | cfg->src_info.endianess = STEDMA40_LITTLE_ENDIAN; | 2242 | cfg->src_info.big_endian = false; |
2243 | cfg->src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL; | 2243 | cfg->src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL; |
2244 | cfg->dst_info.data_width = addr_width; | 2244 | cfg->dst_info.data_width = addr_width; |
2245 | cfg->dst_info.psize = psize; | 2245 | cfg->dst_info.psize = psize; |
2246 | cfg->dst_info.endianess = STEDMA40_LITTLE_ENDIAN; | 2246 | cfg->dst_info.big_endian = false; |
2247 | cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL; | 2247 | cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL; |
2248 | 2248 | ||
2249 | /* Fill in register values */ | 2249 | /* Fill in register values */ |
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index cfc86a56d66f..8557cb88b255 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c | |||
@@ -113,8 +113,10 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, | |||
113 | dst |= 1 << D40_SREG_CFG_PRI_POS; | 113 | dst |= 1 << D40_SREG_CFG_PRI_POS; |
114 | } | 114 | } |
115 | 115 | ||
116 | src |= cfg->src_info.endianess << D40_SREG_CFG_LBE_POS; | 116 | if (cfg->src_info.big_endian) |
117 | dst |= cfg->dst_info.endianess << D40_SREG_CFG_LBE_POS; | 117 | src |= 1 << D40_SREG_CFG_LBE_POS; |
118 | if (cfg->dst_info.big_endian) | ||
119 | dst |= 1 << D40_SREG_CFG_LBE_POS; | ||
118 | 120 | ||
119 | *src_cfg = src; | 121 | *src_cfg = src; |
120 | *dst_cfg = dst; | 122 | *dst_cfg = dst; |