diff options
| -rw-r--r-- | arch/powerpc/boot/dts/mpc8568mds.dts | 125 |
1 files changed, 70 insertions, 55 deletions
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 6923e42af4fd..b064a2ff2306 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
| @@ -52,7 +52,7 @@ | |||
| 52 | #size-cells = <1>; | 52 | #size-cells = <1>; |
| 53 | device_type = "soc"; | 53 | device_type = "soc"; |
| 54 | ranges = <0 e0000000 00100000>; | 54 | ranges = <0 e0000000 00100000>; |
| 55 | reg = <e0000000 00100000>; | 55 | reg = <e0000000 00001000>; |
| 56 | bus-frequency = <0>; | 56 | bus-frequency = <0>; |
| 57 | 57 | ||
| 58 | memory-controller@2000 { | 58 | memory-controller@2000 { |
| @@ -183,60 +183,6 @@ | |||
| 183 | fsl,has-rstcr; | 183 | fsl,has-rstcr; |
| 184 | }; | 184 | }; |
| 185 | 185 | ||
| 186 | pci@8000 { | ||
| 187 | interrupt-map-mask = <f800 0 0 7>; | ||
| 188 | interrupt-map = < | ||
| 189 | /* IDSEL 0x12 AD18 */ | ||
| 190 | 9000 0 0 1 &mpic 5 1 | ||
| 191 | 9000 0 0 2 &mpic 6 1 | ||
| 192 | 9000 0 0 3 &mpic 7 1 | ||
| 193 | 9000 0 0 4 &mpic 4 1 | ||
| 194 | |||
| 195 | /* IDSEL 0x13 AD19 */ | ||
| 196 | 9800 0 0 1 &mpic 6 1 | ||
| 197 | 9800 0 0 2 &mpic 7 1 | ||
| 198 | 9800 0 0 3 &mpic 4 1 | ||
| 199 | 9800 0 0 4 &mpic 5 1>; | ||
| 200 | |||
| 201 | interrupt-parent = <&mpic>; | ||
| 202 | interrupts = <18 2>; | ||
| 203 | bus-range = <0 ff>; | ||
| 204 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
| 205 | 01000000 0 00000000 e2000000 0 00800000>; | ||
| 206 | clock-frequency = <3f940aa>; | ||
| 207 | #interrupt-cells = <1>; | ||
| 208 | #size-cells = <2>; | ||
| 209 | #address-cells = <3>; | ||
| 210 | reg = <8000 1000>; | ||
| 211 | compatible = "fsl,mpc8540-pci"; | ||
| 212 | device_type = "pci"; | ||
| 213 | }; | ||
| 214 | |||
| 215 | /* PCI Express */ | ||
| 216 | pcie@a000 { | ||
| 217 | interrupt-map-mask = <f800 0 0 7>; | ||
| 218 | interrupt-map = < | ||
| 219 | |||
| 220 | /* IDSEL 0x0 (PEX) */ | ||
| 221 | 00000 0 0 1 &mpic 0 1 | ||
| 222 | 00000 0 0 2 &mpic 1 1 | ||
| 223 | 00000 0 0 3 &mpic 2 1 | ||
| 224 | 00000 0 0 4 &mpic 3 1>; | ||
| 225 | |||
| 226 | interrupt-parent = <&mpic>; | ||
| 227 | interrupts = <1a 2>; | ||
| 228 | bus-range = <0 ff>; | ||
| 229 | ranges = <02000000 0 a0000000 a0000000 0 10000000 | ||
| 230 | 01000000 0 00000000 e2800000 0 00800000>; | ||
| 231 | clock-frequency = <1fca055>; | ||
| 232 | #interrupt-cells = <1>; | ||
| 233 | #size-cells = <2>; | ||
| 234 | #address-cells = <3>; | ||
| 235 | reg = <a000 1000>; | ||
| 236 | compatible = "fsl,mpc8548-pcie"; | ||
| 237 | device_type = "pci"; | ||
| 238 | }; | ||
| 239 | |||
| 240 | serial@4600 { | 186 | serial@4600 { |
| 241 | device_type = "serial"; | 187 | device_type = "serial"; |
| 242 | compatible = "ns16550"; | 188 | compatible = "ns16550"; |
| @@ -269,6 +215,7 @@ | |||
| 269 | device_type = "open-pic"; | 215 | device_type = "open-pic"; |
| 270 | big-endian; | 216 | big-endian; |
| 271 | }; | 217 | }; |
| 218 | |||
| 272 | par_io@e0100 { | 219 | par_io@e0100 { |
| 273 | reg = <e0100 100>; | 220 | reg = <e0100 100>; |
| 274 | device_type = "par_io"; | 221 | device_type = "par_io"; |
| @@ -301,6 +248,7 @@ | |||
| 301 | 4 13 1 0 2 0 /* GTX_CLK */ | 248 | 4 13 1 0 2 0 /* GTX_CLK */ |
| 302 | 1 1f 2 0 3 0>; /* GTX125 */ | 249 | 1 1f 2 0 3 0>; /* GTX125 */ |
| 303 | }; | 250 | }; |
| 251 | |||
| 304 | pio2: ucc_pin@02 { | 252 | pio2: ucc_pin@02 { |
| 305 | pio-map = < | 253 | pio-map = < |
| 306 | /* port pin dir open_drain assignment has_irq */ | 254 | /* port pin dir open_drain assignment has_irq */ |
| @@ -461,4 +409,71 @@ | |||
| 461 | }; | 409 | }; |
| 462 | 410 | ||
| 463 | }; | 411 | }; |
| 412 | |||
| 413 | pci@e0008000 { | ||
| 414 | interrupt-map-mask = <f800 0 0 7>; | ||
| 415 | interrupt-map = < | ||
| 416 | /* IDSEL 0x12 AD18 */ | ||
| 417 | 9000 0 0 1 &mpic 5 1 | ||
| 418 | 9000 0 0 2 &mpic 6 1 | ||
| 419 | 9000 0 0 3 &mpic 7 1 | ||
| 420 | 9000 0 0 4 &mpic 4 1 | ||
| 421 | |||
| 422 | /* IDSEL 0x13 AD19 */ | ||
| 423 | 9800 0 0 1 &mpic 6 1 | ||
| 424 | 9800 0 0 2 &mpic 7 1 | ||
| 425 | 9800 0 0 3 &mpic 4 1 | ||
| 426 | 9800 0 0 4 &mpic 5 1>; | ||
| 427 | |||
| 428 | interrupt-parent = <&mpic>; | ||
| 429 | interrupts = <18 2>; | ||
| 430 | bus-range = <0 ff>; | ||
| 431 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
| 432 | 01000000 0 00000000 e2000000 0 00800000>; | ||
| 433 | clock-frequency = <3f940aa>; | ||
| 434 | #interrupt-cells = <1>; | ||
| 435 | #size-cells = <2>; | ||
| 436 | #address-cells = <3>; | ||
| 437 | reg = <e0008000 1000>; | ||
| 438 | compatible = "fsl,mpc8540-pci"; | ||
| 439 | device_type = "pci"; | ||
| 440 | }; | ||
| 441 | |||
| 442 | /* PCI Express */ | ||
| 443 | pcie@e000a000 { | ||
| 444 | interrupt-map-mask = <f800 0 0 7>; | ||
| 445 | interrupt-map = < | ||
| 446 | |||
| 447 | /* IDSEL 0x0 (PEX) */ | ||
| 448 | 00000 0 0 1 &mpic 0 1 | ||
| 449 | 00000 0 0 2 &mpic 1 1 | ||
| 450 | 00000 0 0 3 &mpic 2 1 | ||
| 451 | 00000 0 0 4 &mpic 3 1>; | ||
| 452 | |||
| 453 | interrupt-parent = <&mpic>; | ||
| 454 | interrupts = <1a 2>; | ||
| 455 | bus-range = <0 ff>; | ||
| 456 | ranges = <02000000 0 a0000000 a0000000 0 10000000 | ||
| 457 | 01000000 0 00000000 e2800000 0 00800000>; | ||
| 458 | clock-frequency = <1fca055>; | ||
| 459 | #interrupt-cells = <1>; | ||
| 460 | #size-cells = <2>; | ||
| 461 | #address-cells = <3>; | ||
| 462 | reg = <e000a000 1000>; | ||
| 463 | compatible = "fsl,mpc8548-pcie"; | ||
| 464 | device_type = "pci"; | ||
| 465 | pcie@0 { | ||
| 466 | reg = <0 0 0 0 0>; | ||
| 467 | #size-cells = <2>; | ||
| 468 | #address-cells = <3>; | ||
| 469 | device_type = "pci"; | ||
| 470 | ranges = <02000000 0 a0000000 | ||
| 471 | 02000000 0 a0000000 | ||
| 472 | 0 10000000 | ||
| 473 | |||
| 474 | 01000000 0 00000000 | ||
| 475 | 01000000 0 00000000 | ||
| 476 | 0 00800000>; | ||
| 477 | }; | ||
| 478 | }; | ||
| 464 | }; | 479 | }; |