diff options
-rw-r--r-- | drivers/ieee1394/ohci1394.c | 92 |
1 files changed, 78 insertions, 14 deletions
diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c index eae97d8dcf03..b98b9934b92d 100644 --- a/drivers/ieee1394/ohci1394.c +++ b/drivers/ieee1394/ohci1394.c | |||
@@ -3531,6 +3531,9 @@ static void ohci1394_pci_remove(struct pci_dev *pdev) | |||
3531 | #ifdef CONFIG_PM | 3531 | #ifdef CONFIG_PM |
3532 | static int ohci1394_pci_resume (struct pci_dev *pdev) | 3532 | static int ohci1394_pci_resume (struct pci_dev *pdev) |
3533 | { | 3533 | { |
3534 | int err; | ||
3535 | struct ti_ohci *ohci; | ||
3536 | |||
3534 | /* PowerMac resume code comes first */ | 3537 | /* PowerMac resume code comes first */ |
3535 | #ifdef CONFIG_PPC_PMAC | 3538 | #ifdef CONFIG_PPC_PMAC |
3536 | if (machine_is(powermac)) { | 3539 | if (machine_is(powermac)) { |
@@ -3545,28 +3548,89 @@ static int ohci1394_pci_resume (struct pci_dev *pdev) | |||
3545 | 3548 | ||
3546 | pci_set_power_state(pdev, PCI_D0); | 3549 | pci_set_power_state(pdev, PCI_D0); |
3547 | pci_restore_state(pdev); | 3550 | pci_restore_state(pdev); |
3548 | return pci_enable_device(pdev); | 3551 | err = pci_enable_device(pdev); |
3552 | if (err) | ||
3553 | return err; | ||
3554 | |||
3555 | ohci = pci_get_drvdata(pdev); | ||
3556 | if (!ohci) | ||
3557 | return -1; /* or which exit status to use? */ | ||
3558 | |||
3559 | PRINT(KERN_DEBUG, "resume called"); | ||
3560 | |||
3561 | /* The following lines are copied from ohci1394_pci_probe(): */ | ||
3562 | |||
3563 | /* Start off with a soft reset, to clear everything to a sane | ||
3564 | * state. */ | ||
3565 | ohci_soft_reset(ohci); | ||
3566 | |||
3567 | /* Now enable LPS, which we need in order to start accessing | ||
3568 | * most of the registers. In fact, on some cards (ALI M5251), | ||
3569 | * accessing registers in the SClk domain without LPS enabled | ||
3570 | * will lock up the machine. Wait 50msec to make sure we have | ||
3571 | * full link enabled. */ | ||
3572 | reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS); | ||
3573 | |||
3574 | /* Disable and clear interrupts */ | ||
3575 | reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); | ||
3576 | reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff); | ||
3577 | |||
3578 | mdelay(50); | ||
3579 | |||
3580 | ohci_initialize(ohci); | ||
3581 | |||
3582 | return 0; | ||
3549 | } | 3583 | } |
3550 | 3584 | ||
3551 | static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state) | 3585 | static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state) |
3552 | { | 3586 | { |
3553 | int err; | 3587 | int err; |
3588 | struct ti_ohci *ohci; | ||
3589 | |||
3590 | ohci = pci_get_drvdata(pdev); | ||
3591 | if (!ohci) | ||
3592 | return -1; /* Not sure if this is the correct return code */ | ||
3593 | |||
3594 | PRINT(KERN_DEBUG, "suspend called"); | ||
3595 | |||
3596 | /* clear the async DMA contexts and stop using the controller: */ | ||
3597 | hpsb_bus_reset(ohci->host); | ||
3598 | |||
3599 | /* The following calls are from ohci1394_pci_remove(): */ | ||
3554 | 3600 | ||
3555 | printk(KERN_INFO "%s does not fully support suspend and resume yet\n", | 3601 | /* Clear out BUS Options */ |
3556 | OHCI1394_DRIVER_NAME); | 3602 | reg_write(ohci, OHCI1394_ConfigROMhdr, 0); |
3603 | reg_write(ohci, OHCI1394_BusOptions, | ||
3604 | (reg_read(ohci, OHCI1394_BusOptions) & 0x0000f007) | | ||
3605 | 0x00ff0000); | ||
3606 | |||
3607 | /* Clear interrupt registers */ | ||
3608 | reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff); | ||
3609 | reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); | ||
3610 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff); | ||
3611 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff); | ||
3612 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff); | ||
3613 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff); | ||
3614 | |||
3615 | /* Disable IRM Contender */ | ||
3616 | set_phy_reg(ohci, 4, ~0xc0 & get_phy_reg(ohci, 4)); | ||
3617 | |||
3618 | /* Clear link control register */ | ||
3619 | reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff); | ||
3620 | |||
3621 | /* Let all other nodes know to ignore us */ | ||
3622 | ohci_devctl(ohci->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT); | ||
3623 | |||
3624 | /* This stops all DMA contexts, disables interrupts, | ||
3625 | * and clears linkEnable and LPS: */ | ||
3626 | ohci_soft_reset(ohci); | ||
3557 | 3627 | ||
3558 | err = pci_save_state(pdev); | 3628 | err = pci_save_state(pdev); |
3559 | if (err) { | 3629 | if (err) |
3560 | printk(KERN_ERR "%s: pci_save_state failed with %d\n", | 3630 | goto out; |
3561 | OHCI1394_DRIVER_NAME, err); | ||
3562 | return err; | ||
3563 | } | ||
3564 | err = pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 3631 | err = pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
3565 | #ifdef OHCI1394_DEBUG | ||
3566 | if (err) | 3632 | if (err) |
3567 | printk(KERN_DEBUG "%s: pci_set_power_state failed with %d\n", | 3633 | goto out; |
3568 | OHCI1394_DRIVER_NAME, err); | ||
3569 | #endif /* OHCI1394_DEBUG */ | ||
3570 | 3634 | ||
3571 | /* PowerMac suspend code comes last */ | 3635 | /* PowerMac suspend code comes last */ |
3572 | #ifdef CONFIG_PPC_PMAC | 3636 | #ifdef CONFIG_PPC_PMAC |
@@ -3579,8 +3643,8 @@ static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |||
3579 | pmac_call_feature(PMAC_FTR_1394_ENABLE, of_node, 0, 0); | 3643 | pmac_call_feature(PMAC_FTR_1394_ENABLE, of_node, 0, 0); |
3580 | } | 3644 | } |
3581 | #endif /* CONFIG_PPC_PMAC */ | 3645 | #endif /* CONFIG_PPC_PMAC */ |
3582 | 3646 | out: | |
3583 | return 0; | 3647 | return err; |
3584 | } | 3648 | } |
3585 | #endif /* CONFIG_PM */ | 3649 | #endif /* CONFIG_PM */ |
3586 | 3650 | ||