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-rw-r--r--crypto/async_tx/async_tx.c13
-rw-r--r--drivers/dma/dmaengine.c45
-rw-r--r--include/linux/async_tx.h23
3 files changed, 40 insertions, 41 deletions
diff --git a/crypto/async_tx/async_tx.c b/crypto/async_tx/async_tx.c
index 6e37ad3f4417..60615fedcf5e 100644
--- a/crypto/async_tx/async_tx.c
+++ b/crypto/async_tx/async_tx.c
@@ -77,8 +77,8 @@ static void
77async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, 77async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
78 struct dma_async_tx_descriptor *tx) 78 struct dma_async_tx_descriptor *tx)
79{ 79{
80 struct dma_chan *chan; 80 struct dma_chan *chan = depend_tx->chan;
81 struct dma_device *device; 81 struct dma_device *device = chan->device;
82 struct dma_async_tx_descriptor *intr_tx = (void *) ~0; 82 struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
83 83
84 /* first check to see if we can still append to depend_tx */ 84 /* first check to see if we can still append to depend_tx */
@@ -90,11 +90,11 @@ async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
90 } 90 }
91 spin_unlock_bh(&depend_tx->lock); 91 spin_unlock_bh(&depend_tx->lock);
92 92
93 if (!intr_tx) 93 /* attached dependency, flush the parent channel */
94 if (!intr_tx) {
95 device->device_issue_pending(chan);
94 return; 96 return;
95 97 }
96 chan = depend_tx->chan;
97 device = chan->device;
98 98
99 /* see if we can schedule an interrupt 99 /* see if we can schedule an interrupt
100 * otherwise poll for completion 100 * otherwise poll for completion
@@ -128,6 +128,7 @@ async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
128 intr_tx->tx_submit(intr_tx); 128 intr_tx->tx_submit(intr_tx);
129 async_tx_ack(intr_tx); 129 async_tx_ack(intr_tx);
130 } 130 }
131 device->device_issue_pending(chan);
131 } else { 132 } else {
132 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR) 133 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
133 panic("%s: DMA_ERROR waiting for depend_tx\n", 134 panic("%s: DMA_ERROR waiting for depend_tx\n",
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 6781e8f3c064..e002e0e0d055 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -934,49 +934,24 @@ EXPORT_SYMBOL(dma_async_tx_descriptor_init);
934 934
935/* dma_wait_for_async_tx - spin wait for a transaction to complete 935/* dma_wait_for_async_tx - spin wait for a transaction to complete
936 * @tx: in-flight transaction to wait on 936 * @tx: in-flight transaction to wait on
937 *
938 * This routine assumes that tx was obtained from a call to async_memcpy,
939 * async_xor, async_memset, etc which ensures that tx is "in-flight" (prepped
940 * and submitted). Walking the parent chain is only meant to cover for DMA
941 * drivers that do not implement the DMA_INTERRUPT capability and may race with
942 * the driver's descriptor cleanup routine.
943 */ 937 */
944enum dma_status 938enum dma_status
945dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) 939dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
946{ 940{
947 enum dma_status status; 941 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
948 struct dma_async_tx_descriptor *iter;
949 struct dma_async_tx_descriptor *parent;
950 942
951 if (!tx) 943 if (!tx)
952 return DMA_SUCCESS; 944 return DMA_SUCCESS;
953 945
954 WARN_ONCE(tx->parent, "%s: speculatively walking dependency chain for" 946 while (tx->cookie == -EBUSY) {
955 " %s\n", __func__, dma_chan_name(tx->chan)); 947 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
956 948 pr_err("%s timeout waiting for descriptor submission\n",
957 /* poll through the dependency chain, return when tx is complete */ 949 __func__);
958 do { 950 return DMA_ERROR;
959 iter = tx; 951 }
960 952 cpu_relax();
961 /* find the root of the unsubmitted dependency chain */ 953 }
962 do { 954 return dma_sync_wait(tx->chan, tx->cookie);
963 parent = iter->parent;
964 if (!parent)
965 break;
966 else
967 iter = parent;
968 } while (parent);
969
970 /* there is a small window for ->parent == NULL and
971 * ->cookie == -EBUSY
972 */
973 while (iter->cookie == -EBUSY)
974 cpu_relax();
975
976 status = dma_sync_wait(iter->chan, iter->cookie);
977 } while (status == DMA_IN_PROGRESS || (iter != tx));
978
979 return status;
980} 955}
981EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); 956EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
982 957
diff --git a/include/linux/async_tx.h b/include/linux/async_tx.h
index 3d21a2517518..12a2efcbd565 100644
--- a/include/linux/async_tx.h
+++ b/include/linux/async_tx.h
@@ -83,6 +83,24 @@ struct async_submit_ctl {
83 83
84#ifdef CONFIG_DMA_ENGINE 84#ifdef CONFIG_DMA_ENGINE
85#define async_tx_issue_pending_all dma_issue_pending_all 85#define async_tx_issue_pending_all dma_issue_pending_all
86
87/**
88 * async_tx_issue_pending - send pending descriptor to the hardware channel
89 * @tx: descriptor handle to retrieve hardware context
90 *
91 * Note: any dependent operations will have already been issued by
92 * async_tx_channel_switch, or (in the case of no channel switch) will
93 * be already pending on this channel.
94 */
95static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
96{
97 if (likely(tx)) {
98 struct dma_chan *chan = tx->chan;
99 struct dma_device *dma = chan->device;
100
101 dma->device_issue_pending(chan);
102 }
103}
86#ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL 104#ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
87#include <asm/async_tx.h> 105#include <asm/async_tx.h>
88#else 106#else
@@ -98,6 +116,11 @@ static inline void async_tx_issue_pending_all(void)
98 do { } while (0); 116 do { } while (0);
99} 117}
100 118
119static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
120{
121 do { } while (0);
122}
123
101static inline struct dma_chan * 124static inline struct dma_chan *
102async_tx_find_channel(struct async_submit_ctl *submit, 125async_tx_find_channel(struct async_submit_ctl *submit,
103 enum dma_transaction_type tx_type, struct page **dst, 126 enum dma_transaction_type tx_type, struct page **dst,