diff options
-rw-r--r-- | arch/x86/kernel/apic_64.c | 4 | ||||
-rw-r--r-- | arch/x86/kernel/vsmp_64.c | 27 | ||||
-rw-r--r-- | include/asm-x86/apic.h | 5 |
3 files changed, 28 insertions, 8 deletions
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c index ac2405ed504d..f6eb01d8923a 100644 --- a/arch/x86/kernel/apic_64.c +++ b/arch/x86/kernel/apic_64.c | |||
@@ -1182,9 +1182,9 @@ __cpuinit int apic_is_clustered_box(void) | |||
1182 | * there is not this kind of box with AMD CPU yet. | 1182 | * there is not this kind of box with AMD CPU yet. |
1183 | * Some AMD box with quadcore cpu and 8 sockets apicid | 1183 | * Some AMD box with quadcore cpu and 8 sockets apicid |
1184 | * will be [4, 0x23] or [8, 0x27] could be thought to | 1184 | * will be [4, 0x23] or [8, 0x27] could be thought to |
1185 | * have three apic_clusters. So go out early. | 1185 | * vsmp box still need checking... |
1186 | */ | 1186 | */ |
1187 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) | 1187 | if (!is_vsmp_box() && (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) |
1188 | return 0; | 1188 | return 0; |
1189 | 1189 | ||
1190 | bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr; | 1190 | bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr; |
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c index 54202b1805da..a00961d42e75 100644 --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c | |||
@@ -72,19 +72,34 @@ static unsigned __init vsmp_patch(u8 type, u16 clobbers, void *ibuf, | |||
72 | 72 | ||
73 | } | 73 | } |
74 | 74 | ||
75 | static int vsmp = -1; | ||
76 | |||
77 | int is_vsmp_box(void) | ||
78 | { | ||
79 | if (vsmp != -1) | ||
80 | return vsmp; | ||
81 | |||
82 | vsmp = 0; | ||
83 | if (!early_pci_allowed()) | ||
84 | return vsmp; | ||
85 | |||
86 | /* Check if we are running on a ScaleMP vSMP box */ | ||
87 | if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) == | ||
88 | (PCI_VENDOR_ID_SCALEMP || (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16))) | ||
89 | vsmp = 1; | ||
90 | |||
91 | return vsmp; | ||
92 | } | ||
93 | |||
75 | void __init vsmp_init(void) | 94 | void __init vsmp_init(void) |
76 | { | 95 | { |
77 | void *address; | 96 | void *address; |
78 | unsigned int cap, ctl, cfg; | 97 | unsigned int cap, ctl, cfg; |
79 | 98 | ||
80 | if (!early_pci_allowed()) | 99 | if (!is_vsmp_box()) |
81 | return; | 100 | return; |
82 | 101 | ||
83 | /* Check if we are running on a ScaleMP vSMP box */ | 102 | if (!early_pci_allowed()) |
84 | if ((read_pci_config_16(0, 0x1f, 0, PCI_VENDOR_ID) != | ||
85 | PCI_VENDOR_ID_SCALEMP) || | ||
86 | (read_pci_config_16(0, 0x1f, 0, PCI_DEVICE_ID) != | ||
87 | PCI_DEVICE_ID_SCALEMP_VSMP_CTL)) | ||
88 | return; | 103 | return; |
89 | 104 | ||
90 | /* If we are, use the distinguished irq functions */ | 105 | /* If we are, use the distinguished irq functions */ |
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h index bcfc07fd3661..f0321a427e16 100644 --- a/include/asm-x86/apic.h +++ b/include/asm-x86/apic.h | |||
@@ -51,12 +51,17 @@ extern unsigned boot_cpu_id; | |||
51 | */ | 51 | */ |
52 | #ifdef CONFIG_PARAVIRT | 52 | #ifdef CONFIG_PARAVIRT |
53 | #include <asm/paravirt.h> | 53 | #include <asm/paravirt.h> |
54 | extern int is_vsmp_box(void); | ||
54 | #else | 55 | #else |
55 | #define apic_write native_apic_write | 56 | #define apic_write native_apic_write |
56 | #define apic_write_atomic native_apic_write_atomic | 57 | #define apic_write_atomic native_apic_write_atomic |
57 | #define apic_read native_apic_read | 58 | #define apic_read native_apic_read |
58 | #define setup_boot_clock setup_boot_APIC_clock | 59 | #define setup_boot_clock setup_boot_APIC_clock |
59 | #define setup_secondary_clock setup_secondary_APIC_clock | 60 | #define setup_secondary_clock setup_secondary_APIC_clock |
61 | static int inline is_vsmp_box(void) | ||
62 | { | ||
63 | return 0; | ||
64 | } | ||
60 | #endif | 65 | #endif |
61 | 66 | ||
62 | static inline void native_apic_write(unsigned long reg, u32 v) | 67 | static inline void native_apic_write(unsigned long reg, u32 v) |