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-rw-r--r--MAINTAINERS14
-rw-r--r--arch/arm/Kconfig21
-rw-r--r--arch/arm/Kconfig.debug8
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/common/dmabounce.c21
-rw-r--r--arch/arm/configs/at91rm9200dk_defconfig1
-rw-r--r--arch/arm/configs/u8500_defconfig680
-rw-r--r--arch/arm/include/asm/cacheflush.h22
-rw-r--r--arch/arm/include/asm/dma-mapping.h26
-rw-r--r--arch/arm/include/asm/hardware/coresight.h165
-rw-r--r--arch/arm/include/asm/memory.h16
-rw-r--r--arch/arm/include/asm/pgtable.h14
-rw-r--r--arch/arm/include/asm/swab.h19
-rw-r--r--arch/arm/include/asm/system.h19
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/etm.c641
-rw-r--r--arch/arm/mach-at91/Kconfig5
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c56
-rw-r--r--arch/arm/mach-at91/board-eco920.c158
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c1
-rw-r--r--arch/arm/mach-at91/cpuidle.c94
-rw-r--r--arch/arm/mach-at91/include/mach/board.h1
-rw-r--r--arch/arm/mach-at91/pm.c62
-rw-r--r--arch/arm/mach-at91/pm.h67
-rw-r--r--arch/arm/mach-bcmring/include/mach/io.h35
-rw-r--r--arch/arm/mach-ep93xx/core.c77
-rw-r--r--arch/arm/mach-ep93xx/include/mach/clkdev.h4
-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h4
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/io.h1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h4
-rw-r--r--arch/arm/mach-iop13xx/include/mach/memory.h2
-rw-r--r--arch/arm/mach-ks8695/include/mach/memory.h7
-rw-r--r--arch/arm/mach-nomadik/Kconfig2
-rw-r--r--arch/arm/mach-nomadik/Makefile2
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c27
-rw-r--r--arch/arm/mach-nomadik/include/mach/setup.h2
-rw-r--r--arch/arm/mach-omap2/Kconfig8
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/clock34xx.c8
-rw-r--r--arch/arm/mach-omap2/emu.c66
-rw-r--r--arch/arm/mach-u300/Makefile1
-rw-r--r--arch/arm/mach-u300/i2c.c249
-rw-r--r--arch/arm/mach-u300/mmc.c64
-rw-r--r--arch/arm/mach-u300/regulator.c88
-rw-r--r--arch/arm/mach-ux500/Kconfig15
-rw-r--r--arch/arm/mach-ux500/Makefile8
-rw-r--r--arch/arm/mach-ux500/Makefile.boot4
-rw-r--r--arch/arm/mach-ux500/board-mop500.c158
-rw-r--r--arch/arm/mach-ux500/clock.c95
-rw-r--r--arch/arm/mach-ux500/cpu-u8500.c64
-rw-r--r--arch/arm/mach-ux500/headsmp.S38
-rw-r--r--arch/arm/mach-ux500/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-ux500/include/mach/debug-macro.S19
-rw-r--r--arch/arm/mach-ux500/include/mach/entry-macro.S89
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h131
-rw-r--r--arch/arm/mach-ux500/include/mach/io.h22
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs.h71
-rw-r--r--arch/arm/mach-ux500/include/mach/memory.h18
-rw-r--r--arch/arm/mach-ux500/include/mach/setup.h23
-rw-r--r--arch/arm/mach-ux500/include/mach/smp.h32
-rw-r--r--arch/arm/mach-ux500/include/mach/system.h25
-rw-r--r--arch/arm/mach-ux500/include/mach/timex.h6
-rw-r--r--arch/arm/mach-ux500/include/mach/uncompress.h58
-rw-r--r--arch/arm/mach-ux500/include/mach/vmalloc.h18
-rw-r--r--arch/arm/mach-ux500/localtimer.c28
-rw-r--r--arch/arm/mach-ux500/platsmp.c177
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/Makefile2
-rw-r--r--arch/arm/mm/cache-l2x0.c25
-rw-r--r--arch/arm/mm/copypage-v6.c8
-rw-r--r--arch/arm/mm/dma-mapping.c497
-rw-r--r--arch/arm/mm/fault-armv.c9
-rw-r--r--arch/arm/mm/flush.c49
-rw-r--r--arch/arm/mm/mm.h2
-rw-r--r--arch/arm/mm/mmu.c2
-rw-r--r--arch/arm/mm/vmregion.c131
-rw-r--r--arch/arm/mm/vmregion.h29
-rw-r--r--arch/arm/plat-nomadik/Kconfig22
-rw-r--r--arch/arm/plat-nomadik/Makefile5
-rw-r--r--arch/arm/plat-nomadik/include/plat/mtu.h (renamed from arch/arm/mach-nomadik/include/mach/mtu.h)9
-rw-r--r--arch/arm/plat-nomadik/timer.c (renamed from arch/arm/mach-nomadik/timer.c)35
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h7
-rw-r--r--drivers/dma/Kconfig2
-rw-r--r--drivers/mmc/host/mmci.c2
87 files changed, 4143 insertions, 574 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 16129e67678a..6150c80bccf6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -771,6 +771,14 @@ ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
771M: Michael Petchkovsky <mkpetch@internode.on.net> 771M: Michael Petchkovsky <mkpetch@internode.on.net>
772S: Maintained 772S: Maintained
773 773
774ARM/NOMADIK ARCHITECTURE
775M: Alessandro Rubini <rubini@unipv.it>
776M: STEricsson <STEricsson_nomadik_linux@list.st.com>
777L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
778S: Maintained
779F: arch/arm/mach-nomadik/
780F: arch/arm/plat-nomadik/
781
774ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT 782ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT
775M: Nelson Castillo <arhuaco@freaks-unidos.net> 783M: Nelson Castillo <arhuaco@freaks-unidos.net>
776L: openmoko-kernel@lists.openmoko.org (subscribers-only) 784L: openmoko-kernel@lists.openmoko.org (subscribers-only)
@@ -915,6 +923,12 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
915W: http://www.mcuos.com 923W: http://www.mcuos.com
916S: Maintained 924S: Maintained
917 925
926ARM/U8500 ARM ARCHITECTURE
927M: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
928L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
929S: Maintained
930F: arch/arm/mach-ux500/
931
918ARM/VFP SUPPORT 932ARM/VFP SUPPORT
919M: Russell King <linux@arm.linux.org.uk> 933M: Russell King <linux@arm.linux.org.uk>
920L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 934L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1c4119c60040..1ae18d879e12 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -702,6 +702,16 @@ config ARCH_BCMRING
702 help 702 help
703 Support for Broadcom's BCMRing platform. 703 Support for Broadcom's BCMRing platform.
704 704
705config ARCH_U8500
706 bool "ST-Ericsson U8500 Series"
707 select CPU_V7
708 select ARM_AMBA
709 select GENERIC_TIME
710 select GENERIC_CLOCKEVENTS
711 select COMMON_CLKDEV
712 help
713 Support for ST-Ericsson's Ux500 architecture
714
705endchoice 715endchoice
706 716
707source "arch/arm/mach-clps711x/Kconfig" 717source "arch/arm/mach-clps711x/Kconfig"
@@ -787,6 +797,7 @@ source "arch/arm/mach-at91/Kconfig"
787source "arch/arm/plat-mxc/Kconfig" 797source "arch/arm/plat-mxc/Kconfig"
788 798
789source "arch/arm/mach-nomadik/Kconfig" 799source "arch/arm/mach-nomadik/Kconfig"
800source "arch/arm/plat-nomadik/Kconfig"
790 801
791source "arch/arm/mach-netx/Kconfig" 802source "arch/arm/mach-netx/Kconfig"
792 803
@@ -804,6 +815,8 @@ source "arch/arm/mach-w90x900/Kconfig"
804 815
805source "arch/arm/mach-bcmring/Kconfig" 816source "arch/arm/mach-bcmring/Kconfig"
806 817
818source "arch/arm/mach-ux500/Kconfig"
819
807# Definitions to make life easier 820# Definitions to make life easier
808config ARCH_ACORN 821config ARCH_ACORN
809 bool 822 bool
@@ -955,10 +968,10 @@ source "kernel/time/Kconfig"
955config SMP 968config SMP
956 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 969 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
957 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ 970 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
958 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4) 971 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500)
959 depends on GENERIC_CLOCKEVENTS 972 depends on GENERIC_CLOCKEVENTS
960 select USE_GENERIC_SMP_HELPERS 973 select USE_GENERIC_SMP_HELPERS
961 select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4) 974 select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500)
962 help 975 help
963 This enables support for systems with more than one CPU. If you have 976 This enables support for systems with more than one CPU. If you have
964 a system with only one CPU, like most personal computers, say N. If 977 a system with only one CPU, like most personal computers, say N. If
@@ -1027,9 +1040,9 @@ config HOTPLUG_CPU
1027config LOCAL_TIMERS 1040config LOCAL_TIMERS
1028 bool "Use local timer interrupts" 1041 bool "Use local timer interrupts"
1029 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ 1042 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1030 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4) 1043 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500)
1031 default y 1044 default y
1032 select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4) 1045 select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500)
1033 help 1046 help
1034 Enable support for local timers on SMP platforms, rather then the 1047 Enable support for local timers on SMP platforms, rather then the
1035 legacy IPI broadcast method. Local timers allows the system 1048 legacy IPI broadcast method. Local timers allows the system
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 1a6f70e52921..ff54c23d085e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -83,6 +83,14 @@ config DEBUG_ICEDCC
83 It does include a timeout to ensure that the system does not 83 It does include a timeout to ensure that the system does not
84 totally freeze when there is nothing connected to read. 84 totally freeze when there is nothing connected to read.
85 85
86config OC_ETM
87 bool "On-chip ETM and ETB"
88 select ARM_AMBA
89 help
90 Enables the on-chip embedded trace macrocell and embedded trace
91 buffer driver that will allow you to collect traces of the
92 kernel code.
93
86config DEBUG_DC21285_PORT 94config DEBUG_DC21285_PORT
87 bool "Kernel low-level debugging messages via footbridge serial port" 95 bool "Kernel low-level debugging messages via footbridge serial port"
88 depends on DEBUG_LL && FOOTBRIDGE 96 depends on DEBUG_LL && FOOTBRIDGE
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a73caaf66763..7603eba7c0cd 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -166,6 +166,7 @@ machine-$(CONFIG_ARCH_SHARK) := shark
166machine-$(CONFIG_ARCH_STMP378X) := stmp378x 166machine-$(CONFIG_ARCH_STMP378X) := stmp378x
167machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx 167machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
168machine-$(CONFIG_ARCH_U300) := u300 168machine-$(CONFIG_ARCH_U300) := u300
169machine-$(CONFIG_ARCH_U8500) := ux500
169machine-$(CONFIG_ARCH_VERSATILE) := versatile 170machine-$(CONFIG_ARCH_VERSATILE) := versatile
170machine-$(CONFIG_ARCH_W90X900) := w90x900 171machine-$(CONFIG_ARCH_W90X900) := w90x900
171machine-$(CONFIG_FOOTBRIDGE) := footbridge 172machine-$(CONFIG_FOOTBRIDGE) := footbridge
@@ -176,6 +177,7 @@ machine-$(CONFIG_ARCH_MXC91231) := mxc91231
176plat-$(CONFIG_ARCH_MXC) := mxc 177plat-$(CONFIG_ARCH_MXC) := mxc
177plat-$(CONFIG_ARCH_OMAP) := omap 178plat-$(CONFIG_ARCH_OMAP) := omap
178plat-$(CONFIG_PLAT_IOP) := iop 179plat-$(CONFIG_PLAT_IOP) := iop
180plat-$(CONFIG_PLAT_NOMADIK) := nomadik
179plat-$(CONFIG_PLAT_ORION) := orion 181plat-$(CONFIG_PLAT_ORION) := orion
180plat-$(CONFIG_PLAT_PXA) := pxa 182plat-$(CONFIG_PLAT_PXA) := pxa
181plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c 183plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 734ac9135998..5a375e5fef21 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -342,6 +342,22 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
342} 342}
343EXPORT_SYMBOL(dma_map_single); 343EXPORT_SYMBOL(dma_map_single);
344 344
345/*
346 * see if a mapped address was really a "safe" buffer and if so, copy
347 * the data from the safe buffer back to the unsafe buffer and free up
348 * the safe buffer. (basically return things back to the way they
349 * should be)
350 */
351void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
352 enum dma_data_direction dir)
353{
354 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
355 __func__, (void *) dma_addr, size, dir);
356
357 unmap_single(dev, dma_addr, size, dir);
358}
359EXPORT_SYMBOL(dma_unmap_single);
360
345dma_addr_t dma_map_page(struct device *dev, struct page *page, 361dma_addr_t dma_map_page(struct device *dev, struct page *page,
346 unsigned long offset, size_t size, enum dma_data_direction dir) 362 unsigned long offset, size_t size, enum dma_data_direction dir)
347{ 363{
@@ -366,8 +382,7 @@ EXPORT_SYMBOL(dma_map_page);
366 * the safe buffer. (basically return things back to the way they 382 * the safe buffer. (basically return things back to the way they
367 * should be) 383 * should be)
368 */ 384 */
369 385void dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
370void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
371 enum dma_data_direction dir) 386 enum dma_data_direction dir)
372{ 387{
373 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", 388 dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
@@ -375,7 +390,7 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
375 390
376 unmap_single(dev, dma_addr, size, dir); 391 unmap_single(dev, dma_addr, size, dir);
377} 392}
378EXPORT_SYMBOL(dma_unmap_single); 393EXPORT_SYMBOL(dma_unmap_page);
379 394
380int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr, 395int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
381 unsigned long off, size_t sz, enum dma_data_direction dir) 396 unsigned long off, size_t sz, enum dma_data_direction dir)
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig
index 238b218394e3..c97e1022ada1 100644
--- a/arch/arm/configs/at91rm9200dk_defconfig
+++ b/arch/arm/configs/at91rm9200dk_defconfig
@@ -120,6 +120,7 @@ CONFIG_ARCH_AT91RM9200DK=y
120# CONFIG_MACH_CARMEVA is not set 120# CONFIG_MACH_CARMEVA is not set
121# CONFIG_MACH_KB9200 is not set 121# CONFIG_MACH_KB9200 is not set
122# CONFIG_MACH_ATEB9200 is not set 122# CONFIG_MACH_ATEB9200 is not set
123CONFIG_MACH_ECO920=y
123 124
124# 125#
125# AT91RM9200 Feature Selections 126# AT91RM9200 Feature Selections
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
new file mode 100644
index 000000000000..15fde22ce3f3
--- /dev/null
+++ b/arch/arm/configs/u8500_defconfig
@@ -0,0 +1,680 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.32-rc8
4# Mon Nov 30 11:11:29 2009
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_TIME=y
9CONFIG_GENERIC_CLOCKEVENTS=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_LOCKDEP_SUPPORT=y
13CONFIG_TRACE_IRQFLAGS_SUPPORT=y
14CONFIG_HARDIRQS_SW_RESEND=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_LOCKBREAK=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_LOCK_KERNEL=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33# CONFIG_SWAP is not set
34CONFIG_SYSVIPC=y
35CONFIG_SYSVIPC_SYSCTL=y
36# CONFIG_BSD_PROCESS_ACCT is not set
37
38#
39# RCU Subsystem
40#
41CONFIG_TREE_RCU=y
42# CONFIG_TREE_PREEMPT_RCU is not set
43# CONFIG_RCU_TRACE is not set
44CONFIG_RCU_FANOUT=32
45# CONFIG_RCU_FANOUT_EXACT is not set
46# CONFIG_TREE_RCU_TRACE is not set
47# CONFIG_IKCONFIG is not set
48CONFIG_LOG_BUF_SHIFT=17
49CONFIG_GROUP_SCHED=y
50CONFIG_FAIR_GROUP_SCHED=y
51CONFIG_RT_GROUP_SCHED=y
52CONFIG_USER_SCHED=y
53# CONFIG_CGROUP_SCHED is not set
54# CONFIG_CGROUPS is not set
55CONFIG_SYSFS_DEPRECATED=y
56CONFIG_SYSFS_DEPRECATED_V2=y
57# CONFIG_RELAY is not set
58CONFIG_NAMESPACES=y
59# CONFIG_UTS_NS is not set
60# CONFIG_IPC_NS is not set
61# CONFIG_USER_NS is not set
62# CONFIG_PID_NS is not set
63CONFIG_BLK_DEV_INITRD=y
64CONFIG_INITRAMFS_SOURCE=""
65CONFIG_RD_GZIP=y
66CONFIG_RD_BZIP2=y
67CONFIG_RD_LZMA=y
68CONFIG_CC_OPTIMIZE_FOR_SIZE=y
69CONFIG_SYSCTL=y
70CONFIG_ANON_INODES=y
71# CONFIG_EMBEDDED is not set
72CONFIG_UID16=y
73CONFIG_SYSCTL_SYSCALL=y
74CONFIG_KALLSYMS=y
75CONFIG_KALLSYMS_ALL=y
76# CONFIG_KALLSYMS_EXTRA_PASS is not set
77CONFIG_HOTPLUG=y
78CONFIG_PRINTK=y
79CONFIG_BUG=y
80CONFIG_ELF_CORE=y
81CONFIG_BASE_FULL=y
82CONFIG_FUTEX=y
83CONFIG_EPOLL=y
84CONFIG_SIGNALFD=y
85CONFIG_TIMERFD=y
86CONFIG_EVENTFD=y
87CONFIG_SHMEM=y
88CONFIG_AIO=y
89
90#
91# Kernel Performance Events And Counters
92#
93CONFIG_VM_EVENT_COUNTERS=y
94CONFIG_SLUB_DEBUG=y
95CONFIG_COMPAT_BRK=y
96# CONFIG_SLAB is not set
97CONFIG_SLUB=y
98# CONFIG_SLOB is not set
99# CONFIG_PROFILING is not set
100CONFIG_HAVE_OPROFILE=y
101# CONFIG_KPROBES is not set
102CONFIG_HAVE_KPROBES=y
103CONFIG_HAVE_KRETPROBES=y
104CONFIG_USE_GENERIC_SMP_HELPERS=y
105
106#
107# GCOV-based kernel profiling
108#
109# CONFIG_SLOW_WORK is not set
110CONFIG_HAVE_GENERIC_DMA_COHERENT=y
111CONFIG_SLABINFO=y
112CONFIG_RT_MUTEXES=y
113CONFIG_BASE_SMALL=0
114CONFIG_MODULES=y
115# CONFIG_MODULE_FORCE_LOAD is not set
116CONFIG_MODULE_UNLOAD=y
117# CONFIG_MODULE_FORCE_UNLOAD is not set
118# CONFIG_MODVERSIONS is not set
119# CONFIG_MODULE_SRCVERSION_ALL is not set
120CONFIG_STOP_MACHINE=y
121CONFIG_BLOCK=y
122# CONFIG_LBDAF is not set
123# CONFIG_BLK_DEV_BSG is not set
124# CONFIG_BLK_DEV_INTEGRITY is not set
125
126#
127# IO Schedulers
128#
129CONFIG_IOSCHED_NOOP=y
130CONFIG_IOSCHED_AS=y
131CONFIG_IOSCHED_DEADLINE=y
132CONFIG_IOSCHED_CFQ=y
133# CONFIG_DEFAULT_AS is not set
134# CONFIG_DEFAULT_DEADLINE is not set
135CONFIG_DEFAULT_CFQ=y
136# CONFIG_DEFAULT_NOOP is not set
137CONFIG_DEFAULT_IOSCHED="cfq"
138# CONFIG_FREEZER is not set
139
140#
141# System Type
142#
143CONFIG_MMU=y
144# CONFIG_ARCH_AAEC2000 is not set
145# CONFIG_ARCH_INTEGRATOR is not set
146# CONFIG_ARCH_REALVIEW is not set
147# CONFIG_ARCH_VERSATILE is not set
148# CONFIG_ARCH_AT91 is not set
149# CONFIG_ARCH_CLPS711X is not set
150# CONFIG_ARCH_GEMINI is not set
151# CONFIG_ARCH_EBSA110 is not set
152# CONFIG_ARCH_EP93XX is not set
153# CONFIG_ARCH_FOOTBRIDGE is not set
154# CONFIG_ARCH_MXC is not set
155# CONFIG_ARCH_STMP3XXX is not set
156# CONFIG_ARCH_NETX is not set
157# CONFIG_ARCH_H720X is not set
158# CONFIG_ARCH_NOMADIK is not set
159# CONFIG_ARCH_IOP13XX is not set
160# CONFIG_ARCH_IOP32X is not set
161# CONFIG_ARCH_IOP33X is not set
162# CONFIG_ARCH_IXP23XX is not set
163# CONFIG_ARCH_IXP2000 is not set
164# CONFIG_ARCH_IXP4XX is not set
165# CONFIG_ARCH_L7200 is not set
166# CONFIG_ARCH_KIRKWOOD is not set
167# CONFIG_ARCH_LOKI is not set
168# CONFIG_ARCH_MV78XX0 is not set
169# CONFIG_ARCH_ORION5X is not set
170# CONFIG_ARCH_MMP is not set
171# CONFIG_ARCH_KS8695 is not set
172# CONFIG_ARCH_NS9XXX is not set
173# CONFIG_ARCH_W90X900 is not set
174# CONFIG_ARCH_PNX4008 is not set
175# CONFIG_ARCH_PXA is not set
176# CONFIG_ARCH_MSM is not set
177# CONFIG_ARCH_RPC is not set
178# CONFIG_ARCH_SA1100 is not set
179# CONFIG_ARCH_S3C2410 is not set
180# CONFIG_ARCH_S3C64XX is not set
181# CONFIG_ARCH_S5PC1XX is not set
182# CONFIG_ARCH_SHARK is not set
183# CONFIG_ARCH_LH7A40X is not set
184# CONFIG_ARCH_U300 is not set
185# CONFIG_ARCH_DAVINCI is not set
186# CONFIG_ARCH_OMAP is not set
187# CONFIG_ARCH_BCMRING is not set
188CONFIG_ARCH_U8500=y
189CONFIG_PLAT_NOMADIK=y
190CONFIG_HAS_MTU=y
191
192#
193# ST-Ericsson platform type
194#
195
196#
197# ST-Ericsson Multicore Mobile Platforms
198#
199CONFIG_MACH_U8500_MOP=y
200
201#
202# Processor Type
203#
204CONFIG_CPU_32=y
205CONFIG_CPU_32v6K=y
206CONFIG_CPU_V7=y
207CONFIG_CPU_32v7=y
208CONFIG_CPU_ABRT_EV7=y
209CONFIG_CPU_PABRT_V7=y
210CONFIG_CPU_CACHE_V7=y
211CONFIG_CPU_CACHE_VIPT=y
212CONFIG_CPU_COPY_V6=y
213CONFIG_CPU_TLB_V7=y
214CONFIG_CPU_HAS_ASID=y
215CONFIG_CPU_CP15=y
216CONFIG_CPU_CP15_MMU=y
217
218#
219# Processor Features
220#
221CONFIG_ARM_THUMB=y
222# CONFIG_ARM_THUMBEE is not set
223# CONFIG_CPU_ICACHE_DISABLE is not set
224# CONFIG_CPU_DCACHE_DISABLE is not set
225# CONFIG_CPU_BPREDICT_DISABLE is not set
226CONFIG_HAS_TLS_REG=y
227CONFIG_ARM_L1_CACHE_SHIFT=5
228# CONFIG_ARM_ERRATA_430973 is not set
229# CONFIG_ARM_ERRATA_458693 is not set
230# CONFIG_ARM_ERRATA_460075 is not set
231CONFIG_ARM_GIC=y
232CONFIG_COMMON_CLKDEV=y
233
234#
235# Bus support
236#
237CONFIG_ARM_AMBA=y
238# CONFIG_PCI_SYSCALL is not set
239# CONFIG_ARCH_SUPPORTS_MSI is not set
240# CONFIG_PCCARD is not set
241
242#
243# Kernel Features
244#
245# CONFIG_NO_HZ is not set
246# CONFIG_HIGH_RES_TIMERS is not set
247CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
248CONFIG_SMP=y
249CONFIG_HAVE_ARM_SCU=y
250CONFIG_HAVE_ARM_TWD=y
251CONFIG_VMSPLIT_3G=y
252# CONFIG_VMSPLIT_2G is not set
253# CONFIG_VMSPLIT_1G is not set
254CONFIG_PAGE_OFFSET=0xC0000000
255CONFIG_NR_CPUS=2
256# CONFIG_HOTPLUG_CPU is not set
257CONFIG_LOCAL_TIMERS=y
258# CONFIG_PREEMPT_NONE is not set
259# CONFIG_PREEMPT_VOLUNTARY is not set
260CONFIG_PREEMPT=y
261CONFIG_HZ=100
262# CONFIG_THUMB2_KERNEL is not set
263CONFIG_AEABI=y
264CONFIG_OABI_COMPAT=y
265# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
266# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
267# CONFIG_HIGHMEM is not set
268CONFIG_SELECT_MEMORY_MODEL=y
269CONFIG_FLATMEM_MANUAL=y
270# CONFIG_DISCONTIGMEM_MANUAL is not set
271# CONFIG_SPARSEMEM_MANUAL is not set
272CONFIG_FLATMEM=y
273CONFIG_FLAT_NODE_MEM_MAP=y
274CONFIG_PAGEFLAGS_EXTENDED=y
275CONFIG_SPLIT_PTLOCK_CPUS=4
276# CONFIG_PHYS_ADDR_T_64BIT is not set
277CONFIG_ZONE_DMA_FLAG=0
278CONFIG_VIRT_TO_BUS=y
279CONFIG_HAVE_MLOCK=y
280CONFIG_HAVE_MLOCKED_PAGE_BIT=y
281# CONFIG_KSM is not set
282CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
283CONFIG_ALIGNMENT_TRAP=y
284# CONFIG_UACCESS_WITH_MEMCPY is not set
285
286#
287# Boot options
288#
289CONFIG_ZBOOT_ROM_TEXT=0
290CONFIG_ZBOOT_ROM_BSS=0
291CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
292# CONFIG_XIP_KERNEL is not set
293# CONFIG_KEXEC is not set
294
295#
296# CPU Power Management
297#
298# CONFIG_CPU_IDLE is not set
299
300#
301# Floating point emulation
302#
303
304#
305# At least one emulation must be selected
306#
307# CONFIG_FPE_NWFPE is not set
308# CONFIG_FPE_FASTFPE is not set
309CONFIG_VFP=y
310CONFIG_VFPv3=y
311CONFIG_NEON=y
312
313#
314# Userspace binary formats
315#
316CONFIG_BINFMT_ELF=y
317# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
318CONFIG_HAVE_AOUT=y
319# CONFIG_BINFMT_AOUT is not set
320# CONFIG_BINFMT_MISC is not set
321
322#
323# Power management options
324#
325# CONFIG_PM is not set
326CONFIG_ARCH_SUSPEND_POSSIBLE=y
327# CONFIG_NET is not set
328
329#
330# Device Drivers
331#
332
333#
334# Generic Driver Options
335#
336CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
337# CONFIG_DEVTMPFS is not set
338CONFIG_STANDALONE=y
339CONFIG_PREVENT_FIRMWARE_BUILD=y
340CONFIG_FW_LOADER=y
341CONFIG_FIRMWARE_IN_KERNEL=y
342CONFIG_EXTRA_FIRMWARE=""
343# CONFIG_DEBUG_DRIVER is not set
344# CONFIG_DEBUG_DEVRES is not set
345# CONFIG_SYS_HYPERVISOR is not set
346# CONFIG_MTD is not set
347# CONFIG_PARPORT is not set
348CONFIG_BLK_DEV=y
349# CONFIG_BLK_DEV_COW_COMMON is not set
350# CONFIG_BLK_DEV_LOOP is not set
351CONFIG_BLK_DEV_RAM=y
352CONFIG_BLK_DEV_RAM_COUNT=16
353CONFIG_BLK_DEV_RAM_SIZE=65536
354# CONFIG_BLK_DEV_XIP is not set
355# CONFIG_CDROM_PKTCDVD is not set
356# CONFIG_MISC_DEVICES is not set
357CONFIG_HAVE_IDE=y
358# CONFIG_IDE is not set
359
360#
361# SCSI device support
362#
363# CONFIG_RAID_ATTRS is not set
364# CONFIG_SCSI is not set
365# CONFIG_SCSI_DMA is not set
366# CONFIG_SCSI_NETLINK is not set
367# CONFIG_ATA is not set
368# CONFIG_MD is not set
369# CONFIG_PHONE is not set
370
371#
372# Input device support
373#
374CONFIG_INPUT=y
375# CONFIG_INPUT_FF_MEMLESS is not set
376# CONFIG_INPUT_POLLDEV is not set
377
378#
379# Userland interfaces
380#
381CONFIG_INPUT_MOUSEDEV=y
382# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
383CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
384CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
385# CONFIG_INPUT_JOYDEV is not set
386CONFIG_INPUT_EVDEV=y
387# CONFIG_INPUT_EVBUG is not set
388
389#
390# Input Device Drivers
391#
392# CONFIG_INPUT_KEYBOARD is not set
393# CONFIG_INPUT_MOUSE is not set
394# CONFIG_INPUT_JOYSTICK is not set
395# CONFIG_INPUT_TABLET is not set
396# CONFIG_INPUT_TOUCHSCREEN is not set
397# CONFIG_INPUT_MISC is not set
398
399#
400# Hardware I/O ports
401#
402# CONFIG_SERIO is not set
403# CONFIG_GAMEPORT is not set
404
405#
406# Character devices
407#
408CONFIG_VT=y
409CONFIG_CONSOLE_TRANSLATIONS=y
410CONFIG_VT_CONSOLE=y
411CONFIG_HW_CONSOLE=y
412CONFIG_VT_HW_CONSOLE_BINDING=y
413CONFIG_DEVKMEM=y
414# CONFIG_SERIAL_NONSTANDARD is not set
415
416#
417# Serial drivers
418#
419# CONFIG_SERIAL_8250 is not set
420
421#
422# Non-8250 serial port support
423#
424# CONFIG_SERIAL_AMBA_PL010 is not set
425CONFIG_SERIAL_AMBA_PL011=y
426CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
427# CONFIG_SERIAL_MAX3100 is not set
428CONFIG_SERIAL_CORE=y
429CONFIG_SERIAL_CORE_CONSOLE=y
430CONFIG_UNIX98_PTYS=y
431# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
432# CONFIG_LEGACY_PTYS is not set
433# CONFIG_IPMI_HANDLER is not set
434# CONFIG_HW_RANDOM is not set
435# CONFIG_R3964 is not set
436# CONFIG_RAW_DRIVER is not set
437# CONFIG_TCG_TPM is not set
438# CONFIG_I2C is not set
439CONFIG_SPI=y
440# CONFIG_SPI_DEBUG is not set
441CONFIG_SPI_MASTER=y
442
443#
444# SPI Master Controller Drivers
445#
446# CONFIG_SPI_BITBANG is not set
447CONFIG_SPI_PL022=y
448
449#
450# SPI Protocol Masters
451#
452# CONFIG_SPI_SPIDEV is not set
453# CONFIG_SPI_TLE62X0 is not set
454
455#
456# PPS support
457#
458# CONFIG_PPS is not set
459# CONFIG_W1 is not set
460# CONFIG_POWER_SUPPLY is not set
461# CONFIG_HWMON is not set
462# CONFIG_THERMAL is not set
463# CONFIG_WATCHDOG is not set
464CONFIG_SSB_POSSIBLE=y
465
466#
467# Sonics Silicon Backplane
468#
469# CONFIG_SSB is not set
470
471#
472# Multifunction device drivers
473#
474# CONFIG_MFD_CORE is not set
475# CONFIG_MFD_SM501 is not set
476# CONFIG_HTC_PASIC3 is not set
477# CONFIG_MFD_TMIO is not set
478# CONFIG_MFD_MC13783 is not set
479# CONFIG_EZX_PCAP is not set
480# CONFIG_REGULATOR is not set
481# CONFIG_MEDIA_SUPPORT is not set
482
483#
484# Graphics support
485#
486# CONFIG_VGASTATE is not set
487# CONFIG_VIDEO_OUTPUT_CONTROL is not set
488# CONFIG_FB is not set
489# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
490
491#
492# Display device support
493#
494# CONFIG_DISPLAY_SUPPORT is not set
495
496#
497# Console display driver support
498#
499# CONFIG_VGA_CONSOLE is not set
500CONFIG_DUMMY_CONSOLE=y
501# CONFIG_SOUND is not set
502# CONFIG_HID_SUPPORT is not set
503# CONFIG_USB_SUPPORT is not set
504# CONFIG_MMC is not set
505# CONFIG_MEMSTICK is not set
506# CONFIG_NEW_LEDS is not set
507# CONFIG_ACCESSIBILITY is not set
508CONFIG_RTC_LIB=y
509# CONFIG_RTC_CLASS is not set
510# CONFIG_DMADEVICES is not set
511# CONFIG_AUXDISPLAY is not set
512# CONFIG_UIO is not set
513
514#
515# TI VLYNQ
516#
517# CONFIG_STAGING is not set
518
519#
520# File systems
521#
522CONFIG_EXT2_FS=y
523CONFIG_EXT2_FS_XATTR=y
524CONFIG_EXT2_FS_POSIX_ACL=y
525CONFIG_EXT2_FS_SECURITY=y
526# CONFIG_EXT2_FS_XIP is not set
527# CONFIG_EXT3_FS is not set
528# CONFIG_EXT4_FS is not set
529CONFIG_FS_MBCACHE=y
530# CONFIG_REISERFS_FS is not set
531# CONFIG_JFS_FS is not set
532CONFIG_FS_POSIX_ACL=y
533# CONFIG_XFS_FS is not set
534# CONFIG_BTRFS_FS is not set
535# CONFIG_NILFS2_FS is not set
536CONFIG_FILE_LOCKING=y
537CONFIG_FSNOTIFY=y
538CONFIG_DNOTIFY=y
539CONFIG_INOTIFY=y
540CONFIG_INOTIFY_USER=y
541# CONFIG_QUOTA is not set
542# CONFIG_AUTOFS_FS is not set
543# CONFIG_AUTOFS4_FS is not set
544# CONFIG_FUSE_FS is not set
545CONFIG_GENERIC_ACL=y
546
547#
548# Caches
549#
550# CONFIG_FSCACHE is not set
551
552#
553# CD-ROM/DVD Filesystems
554#
555# CONFIG_ISO9660_FS is not set
556# CONFIG_UDF_FS is not set
557
558#
559# DOS/FAT/NT Filesystems
560#
561# CONFIG_MSDOS_FS is not set
562# CONFIG_VFAT_FS is not set
563# CONFIG_NTFS_FS is not set
564
565#
566# Pseudo filesystems
567#
568CONFIG_PROC_FS=y
569CONFIG_PROC_SYSCTL=y
570CONFIG_PROC_PAGE_MONITOR=y
571CONFIG_SYSFS=y
572CONFIG_TMPFS=y
573CONFIG_TMPFS_POSIX_ACL=y
574# CONFIG_HUGETLB_PAGE is not set
575CONFIG_CONFIGFS_FS=m
576# CONFIG_MISC_FILESYSTEMS is not set
577
578#
579# Partition Types
580#
581# CONFIG_PARTITION_ADVANCED is not set
582CONFIG_MSDOS_PARTITION=y
583# CONFIG_NLS is not set
584
585#
586# Kernel hacking
587#
588# CONFIG_PRINTK_TIME is not set
589CONFIG_ENABLE_WARN_DEPRECATED=y
590CONFIG_ENABLE_MUST_CHECK=y
591CONFIG_FRAME_WARN=1024
592CONFIG_MAGIC_SYSRQ=y
593# CONFIG_STRIP_ASM_SYMS is not set
594# CONFIG_UNUSED_SYMBOLS is not set
595# CONFIG_DEBUG_FS is not set
596# CONFIG_HEADERS_CHECK is not set
597CONFIG_DEBUG_KERNEL=y
598# CONFIG_DEBUG_SHIRQ is not set
599CONFIG_DETECT_SOFTLOCKUP=y
600# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
601CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
602CONFIG_DETECT_HUNG_TASK=y
603# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
604CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
605# CONFIG_SCHED_DEBUG is not set
606# CONFIG_SCHEDSTATS is not set
607# CONFIG_TIMER_STATS is not set
608# CONFIG_DEBUG_OBJECTS is not set
609# CONFIG_SLUB_DEBUG_ON is not set
610# CONFIG_SLUB_STATS is not set
611# CONFIG_DEBUG_KMEMLEAK is not set
612# CONFIG_DEBUG_PREEMPT is not set
613# CONFIG_DEBUG_RT_MUTEXES is not set
614# CONFIG_RT_MUTEX_TESTER is not set
615# CONFIG_DEBUG_SPINLOCK is not set
616# CONFIG_DEBUG_MUTEXES is not set
617# CONFIG_DEBUG_LOCK_ALLOC is not set
618# CONFIG_PROVE_LOCKING is not set
619# CONFIG_LOCK_STAT is not set
620# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
621# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
622# CONFIG_DEBUG_KOBJECT is not set
623CONFIG_DEBUG_BUGVERBOSE=y
624CONFIG_DEBUG_INFO=y
625# CONFIG_DEBUG_VM is not set
626# CONFIG_DEBUG_WRITECOUNT is not set
627CONFIG_DEBUG_MEMORY_INIT=y
628# CONFIG_DEBUG_LIST is not set
629# CONFIG_DEBUG_SG is not set
630# CONFIG_DEBUG_NOTIFIERS is not set
631# CONFIG_DEBUG_CREDENTIALS is not set
632# CONFIG_BOOT_PRINTK_DELAY is not set
633# CONFIG_RCU_TORTURE_TEST is not set
634# CONFIG_RCU_CPU_STALL_DETECTOR is not set
635# CONFIG_BACKTRACE_SELF_TEST is not set
636# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
637# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
638# CONFIG_FAULT_INJECTION is not set
639# CONFIG_SYSCTL_SYSCALL_CHECK is not set
640# CONFIG_PAGE_POISONING is not set
641CONFIG_HAVE_FUNCTION_TRACER=y
642CONFIG_TRACING_SUPPORT=y
643# CONFIG_FTRACE is not set
644# CONFIG_SAMPLES is not set
645CONFIG_HAVE_ARCH_KGDB=y
646# CONFIG_KGDB is not set
647CONFIG_ARM_UNWIND=y
648CONFIG_DEBUG_USER=y
649CONFIG_DEBUG_ERRORS=y
650# CONFIG_DEBUG_STACK_USAGE is not set
651# CONFIG_DEBUG_LL is not set
652
653#
654# Security options
655#
656# CONFIG_KEYS is not set
657# CONFIG_SECURITY is not set
658# CONFIG_SECURITYFS is not set
659# CONFIG_SECURITY_FILE_CAPABILITIES is not set
660# CONFIG_CRYPTO is not set
661# CONFIG_BINARY_PRINTF is not set
662
663#
664# Library routines
665#
666CONFIG_GENERIC_FIND_LAST_BIT=y
667# CONFIG_CRC_CCITT is not set
668# CONFIG_CRC16 is not set
669CONFIG_CRC_T10DIF=m
670# CONFIG_CRC_ITU_T is not set
671# CONFIG_CRC32 is not set
672# CONFIG_CRC7 is not set
673# CONFIG_LIBCRC32C is not set
674CONFIG_ZLIB_INFLATE=y
675CONFIG_DECOMPRESS_GZIP=y
676CONFIG_DECOMPRESS_BZIP2=y
677CONFIG_DECOMPRESS_LZMA=y
678CONFIG_HAS_IOMEM=y
679CONFIG_HAS_IOPORT=y
680CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 3d0cdd21b882..9fd6d3ab68c0 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -331,15 +331,15 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
331 * Convert calls to our calling convention. 331 * Convert calls to our calling convention.
332 */ 332 */
333#define flush_cache_all() __cpuc_flush_kern_all() 333#define flush_cache_all() __cpuc_flush_kern_all()
334#ifndef CONFIG_CPU_CACHE_VIPT 334
335static inline void flush_cache_mm(struct mm_struct *mm) 335static inline void vivt_flush_cache_mm(struct mm_struct *mm)
336{ 336{
337 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) 337 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)))
338 __cpuc_flush_user_all(); 338 __cpuc_flush_user_all();
339} 339}
340 340
341static inline void 341static inline void
342flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) 342vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
343{ 343{
344 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) 344 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)))
345 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), 345 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
@@ -347,7 +347,7 @@ flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long
347} 347}
348 348
349static inline void 349static inline void
350flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) 350vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
351{ 351{
352 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 352 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
353 unsigned long addr = user_addr & PAGE_MASK; 353 unsigned long addr = user_addr & PAGE_MASK;
@@ -356,7 +356,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned l
356} 356}
357 357
358static inline void 358static inline void
359flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 359vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
360 unsigned long uaddr, void *kaddr, 360 unsigned long uaddr, void *kaddr,
361 unsigned long len, int write) 361 unsigned long len, int write)
362{ 362{
@@ -365,6 +365,16 @@ flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
365 __cpuc_coherent_kern_range(addr, addr + len); 365 __cpuc_coherent_kern_range(addr, addr + len);
366 } 366 }
367} 367}
368
369#ifndef CONFIG_CPU_CACHE_VIPT
370#define flush_cache_mm(mm) \
371 vivt_flush_cache_mm(mm)
372#define flush_cache_range(vma,start,end) \
373 vivt_flush_cache_range(vma,start,end)
374#define flush_cache_page(vma,addr,pfn) \
375 vivt_flush_cache_page(vma,addr,pfn)
376#define flush_ptrace_access(vma,page,ua,ka,len,write) \
377 vivt_flush_ptrace_access(vma,page,ua,ka,len,write)
368#else 378#else
369extern void flush_cache_mm(struct mm_struct *mm); 379extern void flush_cache_mm(struct mm_struct *mm);
370extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); 380extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
@@ -410,8 +420,6 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
410 */ 420 */
411extern void flush_dcache_page(struct page *); 421extern void flush_dcache_page(struct page *);
412 422
413extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
414
415static inline void __flush_icache_all(void) 423static inline void __flush_icache_all(void)
416{ 424{
417#ifdef CONFIG_ARM_ERRATA_411920 425#ifdef CONFIG_ARM_ERRATA_411920
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index ff46dfa68a97..a96300bf83fd 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -15,20 +15,15 @@
15 * must not be used by drivers. 15 * must not be used by drivers.
16 */ 16 */
17#ifndef __arch_page_to_dma 17#ifndef __arch_page_to_dma
18
19#if !defined(CONFIG_HIGHMEM)
20static inline dma_addr_t page_to_dma(struct device *dev, struct page *page) 18static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
21{ 19{
22 return (dma_addr_t)__virt_to_bus((unsigned long)page_address(page)); 20 return (dma_addr_t)__pfn_to_bus(page_to_pfn(page));
23} 21}
24#elif defined(__pfn_to_bus) 22
25static inline dma_addr_t page_to_dma(struct device *dev, struct page *page) 23static inline struct page *dma_to_page(struct device *dev, dma_addr_t addr)
26{ 24{
27 return (dma_addr_t)__pfn_to_bus(page_to_pfn(page)); 25 return pfn_to_page(__bus_to_pfn(addr));
28} 26}
29#else
30#error "this machine class needs to define __arch_page_to_dma to use HIGHMEM"
31#endif
32 27
33static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) 28static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
34{ 29{
@@ -45,6 +40,11 @@ static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
45 return __arch_page_to_dma(dev, page); 40 return __arch_page_to_dma(dev, page);
46} 41}
47 42
43static inline struct page *dma_to_page(struct device *dev, dma_addr_t addr)
44{
45 return __arch_dma_to_page(dev, addr);
46}
47
48static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) 48static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
49{ 49{
50 return __arch_dma_to_virt(dev, addr); 50 return __arch_dma_to_virt(dev, addr);
@@ -257,9 +257,11 @@ extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
257 */ 257 */
258extern dma_addr_t dma_map_single(struct device *, void *, size_t, 258extern dma_addr_t dma_map_single(struct device *, void *, size_t,
259 enum dma_data_direction); 259 enum dma_data_direction);
260extern void dma_unmap_single(struct device *, dma_addr_t, size_t,
261 enum dma_data_direction);
260extern dma_addr_t dma_map_page(struct device *, struct page *, 262extern dma_addr_t dma_map_page(struct device *, struct page *,
261 unsigned long, size_t, enum dma_data_direction); 263 unsigned long, size_t, enum dma_data_direction);
262extern void dma_unmap_single(struct device *, dma_addr_t, size_t, 264extern void dma_unmap_page(struct device *, dma_addr_t, size_t,
263 enum dma_data_direction); 265 enum dma_data_direction);
264 266
265/* 267/*
@@ -352,7 +354,6 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
352{ 354{
353 /* nothing to do */ 355 /* nothing to do */
354} 356}
355#endif /* CONFIG_DMABOUNCE */
356 357
357/** 358/**
358 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() 359 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
@@ -371,8 +372,9 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
371static inline void dma_unmap_page(struct device *dev, dma_addr_t handle, 372static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
372 size_t size, enum dma_data_direction dir) 373 size_t size, enum dma_data_direction dir)
373{ 374{
374 dma_unmap_single(dev, handle, size, dir); 375 /* nothing to do */
375} 376}
377#endif /* CONFIG_DMABOUNCE */
376 378
377/** 379/**
378 * dma_sync_single_range_for_cpu 380 * dma_sync_single_range_for_cpu
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
new file mode 100644
index 000000000000..f82b25d4f73e
--- /dev/null
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -0,0 +1,165 @@
1/*
2 * linux/arch/arm/include/asm/hardware/coresight.h
3 *
4 * CoreSight components' registers
5 *
6 * Copyright (C) 2009 Nokia Corporation.
7 * Alexander Shishkin
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_HARDWARE_CORESIGHT_H
15#define __ASM_HARDWARE_CORESIGHT_H
16
17#define TRACER_ACCESSED_BIT 0
18#define TRACER_RUNNING_BIT 1
19#define TRACER_CYCLE_ACC_BIT 2
20#define TRACER_ACCESSED BIT(TRACER_ACCESSED_BIT)
21#define TRACER_RUNNING BIT(TRACER_RUNNING_BIT)
22#define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT)
23
24struct tracectx {
25 unsigned int etb_bufsz;
26 void __iomem *etb_regs;
27 void __iomem *etm_regs;
28 unsigned long flags;
29 int ncmppairs;
30 int etm_portsz;
31 struct device *dev;
32 struct clk *emu_clk;
33 struct mutex mutex;
34};
35
36#define TRACER_TIMEOUT 10000
37
38#define etm_writel(t, v, x) \
39 (__raw_writel((v), (t)->etm_regs + (x)))
40#define etm_readl(t, x) (__raw_readl((t)->etm_regs + (x)))
41
42/* CoreSight Management Registers */
43#define CSMR_LOCKACCESS 0xfb0
44#define CSMR_LOCKSTATUS 0xfb4
45#define CSMR_AUTHSTATUS 0xfb8
46#define CSMR_DEVID 0xfc8
47#define CSMR_DEVTYPE 0xfcc
48/* CoreSight Component Registers */
49#define CSCR_CLASS 0xff4
50
51#define CSCR_PRSR 0x314
52
53#define UNLOCK_MAGIC 0xc5acce55
54
55/* ETM control register, "ETM Architecture", 3.3.1 */
56#define ETMR_CTRL 0
57#define ETMCTRL_POWERDOWN 1
58#define ETMCTRL_PROGRAM (1 << 10)
59#define ETMCTRL_PORTSEL (1 << 11)
60#define ETMCTRL_DO_CONTEXTID (3 << 14)
61#define ETMCTRL_PORTMASK1 (7 << 4)
62#define ETMCTRL_PORTMASK2 (1 << 21)
63#define ETMCTRL_PORTMASK (ETMCTRL_PORTMASK1 | ETMCTRL_PORTMASK2)
64#define ETMCTRL_PORTSIZE(x) ((((x) & 7) << 4) | (!!((x) & 8)) << 21)
65#define ETMCTRL_DO_CPRT (1 << 1)
66#define ETMCTRL_DATAMASK (3 << 2)
67#define ETMCTRL_DATA_DO_DATA (1 << 2)
68#define ETMCTRL_DATA_DO_ADDR (1 << 3)
69#define ETMCTRL_DATA_DO_BOTH (ETMCTRL_DATA_DO_DATA | ETMCTRL_DATA_DO_ADDR)
70#define ETMCTRL_BRANCH_OUTPUT (1 << 8)
71#define ETMCTRL_CYCLEACCURATE (1 << 12)
72
73/* ETM configuration code register */
74#define ETMR_CONFCODE (0x04)
75
76/* ETM trace start/stop resource control register */
77#define ETMR_TRACESSCTRL (0x18)
78
79/* ETM trigger event register */
80#define ETMR_TRIGEVT (0x08)
81
82/* address access type register bits, "ETM architecture",
83 * table 3-27 */
84/* - access type */
85#define ETMAAT_IFETCH 0
86#define ETMAAT_IEXEC 1
87#define ETMAAT_IEXECPASS 2
88#define ETMAAT_IEXECFAIL 3
89#define ETMAAT_DLOADSTORE 4
90#define ETMAAT_DLOAD 5
91#define ETMAAT_DSTORE 6
92/* - comparison access size */
93#define ETMAAT_JAVA (0 << 3)
94#define ETMAAT_THUMB (1 << 3)
95#define ETMAAT_ARM (3 << 3)
96/* - data value comparison control */
97#define ETMAAT_NOVALCMP (0 << 5)
98#define ETMAAT_VALMATCH (1 << 5)
99#define ETMAAT_VALNOMATCH (3 << 5)
100/* - exact match */
101#define ETMAAT_EXACTMATCH (1 << 7)
102/* - context id comparator control */
103#define ETMAAT_IGNCONTEXTID (0 << 8)
104#define ETMAAT_VALUE1 (1 << 8)
105#define ETMAAT_VALUE2 (2 << 8)
106#define ETMAAT_VALUE3 (3 << 8)
107/* - security level control */
108#define ETMAAT_IGNSECURITY (0 << 10)
109#define ETMAAT_NSONLY (1 << 10)
110#define ETMAAT_SONLY (2 << 10)
111
112#define ETMR_COMP_VAL(x) (0x40 + (x) * 4)
113#define ETMR_COMP_ACC_TYPE(x) (0x80 + (x) * 4)
114
115/* ETM status register, "ETM Architecture", 3.3.2 */
116#define ETMR_STATUS (0x10)
117#define ETMST_OVERFLOW (1 << 0)
118#define ETMST_PROGBIT (1 << 1)
119#define ETMST_STARTSTOP (1 << 2)
120#define ETMST_TRIGGER (1 << 3)
121
122#define etm_progbit(t) (etm_readl((t), ETMR_STATUS) & ETMST_PROGBIT)
123#define etm_started(t) (etm_readl((t), ETMR_STATUS) & ETMST_STARTSTOP)
124#define etm_triggered(t) (etm_readl((t), ETMR_STATUS) & ETMST_TRIGGER)
125
126#define ETMR_TRACEENCTRL2 0x1c
127#define ETMR_TRACEENCTRL 0x24
128#define ETMTE_INCLEXCL (1 << 24)
129#define ETMR_TRACEENEVT 0x20
130#define ETMCTRL_OPTS (ETMCTRL_DO_CPRT | \
131 ETMCTRL_DATA_DO_ADDR | \
132 ETMCTRL_BRANCH_OUTPUT | \
133 ETMCTRL_DO_CONTEXTID)
134
135/* ETB registers, "CoreSight Components TRM", 9.3 */
136#define ETBR_DEPTH 0x04
137#define ETBR_STATUS 0x0c
138#define ETBR_READMEM 0x10
139#define ETBR_READADDR 0x14
140#define ETBR_WRITEADDR 0x18
141#define ETBR_TRIGGERCOUNT 0x1c
142#define ETBR_CTRL 0x20
143#define ETBR_FORMATTERCTRL 0x304
144#define ETBFF_ENFTC 1
145#define ETBFF_ENFCONT (1 << 1)
146#define ETBFF_FONFLIN (1 << 4)
147#define ETBFF_MANUAL_FLUSH (1 << 6)
148#define ETBFF_TRIGIN (1 << 8)
149#define ETBFF_TRIGEVT (1 << 9)
150#define ETBFF_TRIGFL (1 << 10)
151
152#define etb_writel(t, v, x) \
153 (__raw_writel((v), (t)->etb_regs + (x)))
154#define etb_readl(t, x) (__raw_readl((t)->etb_regs + (x)))
155
156#define etm_lock(t) do { etm_writel((t), 0, CSMR_LOCKACCESS); } while (0)
157#define etm_unlock(t) \
158 do { etm_writel((t), UNLOCK_MAGIC, CSMR_LOCKACCESS); } while (0)
159
160#define etb_lock(t) do { etb_writel((t), 0, CSMR_LOCKACCESS); } while (0)
161#define etb_unlock(t) \
162 do { etb_writel((t), UNLOCK_MAGIC, CSMR_LOCKACCESS); } while (0)
163
164#endif /* __ASM_HARDWARE_CORESIGHT_H */
165
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index cefedf062138..5421d82a2572 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -125,8 +125,10 @@
125 * private definitions which should NOT be used outside memory.h 125 * private definitions which should NOT be used outside memory.h
126 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 126 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
127 */ 127 */
128#ifndef __virt_to_phys
128#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) 129#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
129#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) 130#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
131#endif
130 132
131/* 133/*
132 * Convert a physical address to a Page Frame Number and back 134 * Convert a physical address to a Page Frame Number and back
@@ -134,6 +136,12 @@
134#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) 136#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT)
135#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) 137#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT)
136 138
139/*
140 * Convert a page to/from a physical address
141 */
142#define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
143#define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
144
137#ifndef __ASSEMBLY__ 145#ifndef __ASSEMBLY__
138 146
139/* 147/*
@@ -194,7 +202,8 @@ static inline void *phys_to_virt(unsigned long x)
194#ifndef __virt_to_bus 202#ifndef __virt_to_bus
195#define __virt_to_bus __virt_to_phys 203#define __virt_to_bus __virt_to_phys
196#define __bus_to_virt __phys_to_virt 204#define __bus_to_virt __phys_to_virt
197#define __pfn_to_bus(x) ((x) << PAGE_SHIFT) 205#define __pfn_to_bus(x) __pfn_to_phys(x)
206#define __bus_to_pfn(x) __phys_to_pfn(x)
198#endif 207#endif
199 208
200static inline __deprecated unsigned long virt_to_bus(void *x) 209static inline __deprecated unsigned long virt_to_bus(void *x)
@@ -293,11 +302,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
293#endif /* !CONFIG_DISCONTIGMEM */ 302#endif /* !CONFIG_DISCONTIGMEM */
294 303
295/* 304/*
296 * For BIO. "will die". Kill me when bio_to_phys() and bvec_to_phys() die.
297 */
298#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
299
300/*
301 * Optional coherency support. Currently used only by selected 305 * Optional coherency support. Currently used only by selected
302 * Intel XSC3-based systems. 306 * Intel XSC3-based systems.
303 */ 307 */
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 201ccaa11f61..11397687f42c 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -304,13 +304,23 @@ PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG);
304 304
305static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 305static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
306 306
307#define __pgprot_modify(prot,mask,bits) \
308 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
309
307/* 310/*
308 * Mark the prot value as uncacheable and unbufferable. 311 * Mark the prot value as uncacheable and unbufferable.
309 */ 312 */
310#define pgprot_noncached(prot) \ 313#define pgprot_noncached(prot) \
311 __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED) 314 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
312#define pgprot_writecombine(prot) \ 315#define pgprot_writecombine(prot) \
313 __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE) 316 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
317#if __LINUX_ARM_ARCH__ >= 7
318#define pgprot_dmacoherent(prot) \
319 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE)
320#else
321#define pgprot_dmacoherent(prot) \
322 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED)
323#endif
314 324
315#define pmd_none(pmd) (!pmd_val(pmd)) 325#define pmd_none(pmd) (!pmd_val(pmd))
316#define pmd_present(pmd) (pmd_val(pmd)) 326#define pmd_present(pmd) (pmd_val(pmd))
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index ca2bf2f6d6ea..9997ad20eff1 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -22,6 +22,24 @@
22# define __SWAB_64_THRU_32__ 22# define __SWAB_64_THRU_32__
23#endif 23#endif
24 24
25#if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6
26
27static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
28{
29 __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x));
30 return x;
31}
32#define __arch_swab16 __arch_swab16
33
34static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
35{
36 __asm__ ("rev %0, %1" : "=r" (x) : "r" (x));
37 return x;
38}
39#define __arch_swab32 __arch_swab32
40
41#else
42
25static inline __attribute_const__ __u32 __arch_swab32(__u32 x) 43static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
26{ 44{
27 __u32 t; 45 __u32 t;
@@ -48,3 +66,4 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
48 66
49#endif 67#endif
50 68
69#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index d65b2f5bf41f..058e7e90881d 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -138,21 +138,26 @@ extern unsigned int user_debug;
138#define dmb() __asm__ __volatile__ ("" : : : "memory") 138#define dmb() __asm__ __volatile__ ("" : : : "memory")
139#endif 139#endif
140 140
141#ifndef CONFIG_SMP 141#if __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
142#define mb() dmb()
143#define rmb() dmb()
144#define wmb() dmb()
145#else
142#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) 146#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
143#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) 147#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
144#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) 148#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
149#endif
150
151#ifndef CONFIG_SMP
145#define smp_mb() barrier() 152#define smp_mb() barrier()
146#define smp_rmb() barrier() 153#define smp_rmb() barrier()
147#define smp_wmb() barrier() 154#define smp_wmb() barrier()
148#else 155#else
149#define mb() dmb() 156#define smp_mb() mb()
150#define rmb() dmb() 157#define smp_rmb() rmb()
151#define wmb() dmb() 158#define smp_wmb() wmb()
152#define smp_mb() dmb()
153#define smp_rmb() dmb()
154#define smp_wmb() dmb()
155#endif 159#endif
160
156#define read_barrier_depends() do { } while(0) 161#define read_barrier_depends() do { } while(0)
157#define smp_read_barrier_depends() do { } while(0) 162#define smp_read_barrier_depends() do { } while(0)
158 163
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 79087dd6d869..e7ccf7e697ce 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -17,6 +17,8 @@ obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \
17 process.o ptrace.o return_address.o setup.o signal.o \ 17 process.o ptrace.o return_address.o setup.o signal.o \
18 sys_arm.o stacktrace.o time.o traps.o 18 sys_arm.o stacktrace.o time.o traps.o
19 19
20obj-$(CONFIG_OC_ETM) += etm.o
21
20obj-$(CONFIG_ISA_DMA_API) += dma.o 22obj-$(CONFIG_ISA_DMA_API) += dma.o
21obj-$(CONFIG_ARCH_ACORN) += ecard.o 23obj-$(CONFIG_ARCH_ACORN) += ecard.o
22obj-$(CONFIG_FIQ) += fiq.o 24obj-$(CONFIG_FIQ) += fiq.o
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
new file mode 100644
index 000000000000..827753966301
--- /dev/null
+++ b/arch/arm/kernel/etm.c
@@ -0,0 +1,641 @@
1/*
2 * linux/arch/arm/kernel/etm.c
3 *
4 * Driver for ARM's Embedded Trace Macrocell and Embedded Trace Buffer.
5 *
6 * Copyright (C) 2009 Nokia Corporation.
7 * Alexander Shishkin
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/types.h>
17#include <linux/io.h>
18#include <linux/sysrq.h>
19#include <linux/device.h>
20#include <linux/clk.h>
21#include <linux/amba/bus.h>
22#include <linux/fs.h>
23#include <linux/uaccess.h>
24#include <linux/miscdevice.h>
25#include <linux/vmalloc.h>
26#include <linux/mutex.h>
27#include <asm/hardware/coresight.h>
28#include <asm/sections.h>
29
30MODULE_LICENSE("GPL");
31MODULE_AUTHOR("Alexander Shishkin");
32
33static struct tracectx tracer;
34
35static inline bool trace_isrunning(struct tracectx *t)
36{
37 return !!(t->flags & TRACER_RUNNING);
38}
39
40static int etm_setup_address_range(struct tracectx *t, int n,
41 unsigned long start, unsigned long end, int exclude, int data)
42{
43 u32 flags = ETMAAT_ARM | ETMAAT_IGNCONTEXTID | ETMAAT_NSONLY | \
44 ETMAAT_NOVALCMP;
45
46 if (n < 1 || n > t->ncmppairs)
47 return -EINVAL;
48
49 /* comparators and ranges are numbered starting with 1 as opposed
50 * to bits in a word */
51 n--;
52
53 if (data)
54 flags |= ETMAAT_DLOADSTORE;
55 else
56 flags |= ETMAAT_IEXEC;
57
58 /* first comparator for the range */
59 etm_writel(t, flags, ETMR_COMP_ACC_TYPE(n * 2));
60 etm_writel(t, start, ETMR_COMP_VAL(n * 2));
61
62 /* second comparator is right next to it */
63 etm_writel(t, flags, ETMR_COMP_ACC_TYPE(n * 2 + 1));
64 etm_writel(t, end, ETMR_COMP_VAL(n * 2 + 1));
65
66 flags = exclude ? ETMTE_INCLEXCL : 0;
67 etm_writel(t, flags | (1 << n), ETMR_TRACEENCTRL);
68
69 return 0;
70}
71
72static int trace_start(struct tracectx *t)
73{
74 u32 v;
75 unsigned long timeout = TRACER_TIMEOUT;
76
77 etb_unlock(t);
78
79 etb_writel(t, 0, ETBR_FORMATTERCTRL);
80 etb_writel(t, 1, ETBR_CTRL);
81
82 etb_lock(t);
83
84 /* configure etm */
85 v = ETMCTRL_OPTS | ETMCTRL_PROGRAM | ETMCTRL_PORTSIZE(t->etm_portsz);
86
87 if (t->flags & TRACER_CYCLE_ACC)
88 v |= ETMCTRL_CYCLEACCURATE;
89
90 etm_unlock(t);
91
92 etm_writel(t, v, ETMR_CTRL);
93
94 while (!(etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM) && --timeout)
95 ;
96 if (!timeout) {
97 dev_dbg(t->dev, "Waiting for progbit to assert timed out\n");
98 etm_lock(t);
99 return -EFAULT;
100 }
101
102 etm_setup_address_range(t, 1, (unsigned long)_stext,
103 (unsigned long)_etext, 0, 0);
104 etm_writel(t, 0, ETMR_TRACEENCTRL2);
105 etm_writel(t, 0, ETMR_TRACESSCTRL);
106 etm_writel(t, 0x6f, ETMR_TRACEENEVT);
107
108 v &= ~ETMCTRL_PROGRAM;
109 v |= ETMCTRL_PORTSEL;
110
111 etm_writel(t, v, ETMR_CTRL);
112
113 timeout = TRACER_TIMEOUT;
114 while (etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM && --timeout)
115 ;
116 if (!timeout) {
117 dev_dbg(t->dev, "Waiting for progbit to deassert timed out\n");
118 etm_lock(t);
119 return -EFAULT;
120 }
121
122 etm_lock(t);
123
124 t->flags |= TRACER_RUNNING;
125
126 return 0;
127}
128
129static int trace_stop(struct tracectx *t)
130{
131 unsigned long timeout = TRACER_TIMEOUT;
132
133 etm_unlock(t);
134
135 etm_writel(t, 0x440, ETMR_CTRL);
136 while (!(etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM) && --timeout)
137 ;
138 if (!timeout) {
139 dev_dbg(t->dev, "Waiting for progbit to assert timed out\n");
140 etm_lock(t);
141 return -EFAULT;
142 }
143
144 etm_lock(t);
145
146 etb_unlock(t);
147 etb_writel(t, ETBFF_MANUAL_FLUSH, ETBR_FORMATTERCTRL);
148
149 timeout = TRACER_TIMEOUT;
150 while (etb_readl(t, ETBR_FORMATTERCTRL) &
151 ETBFF_MANUAL_FLUSH && --timeout)
152 ;
153 if (!timeout) {
154 dev_dbg(t->dev, "Waiting for formatter flush to commence "
155 "timed out\n");
156 etb_lock(t);
157 return -EFAULT;
158 }
159
160 etb_writel(t, 0, ETBR_CTRL);
161
162 etb_lock(t);
163
164 t->flags &= ~TRACER_RUNNING;
165
166 return 0;
167}
168
169static int etb_getdatalen(struct tracectx *t)
170{
171 u32 v;
172 int rp, wp;
173
174 v = etb_readl(t, ETBR_STATUS);
175
176 if (v & 1)
177 return t->etb_bufsz;
178
179 rp = etb_readl(t, ETBR_READADDR);
180 wp = etb_readl(t, ETBR_WRITEADDR);
181
182 if (rp > wp) {
183 etb_writel(t, 0, ETBR_READADDR);
184 etb_writel(t, 0, ETBR_WRITEADDR);
185
186 return 0;
187 }
188
189 return wp - rp;
190}
191
192/* sysrq+v will always stop the running trace and leave it at that */
193static void etm_dump(void)
194{
195 struct tracectx *t = &tracer;
196 u32 first = 0;
197 int length;
198
199 if (!t->etb_regs) {
200 printk(KERN_INFO "No tracing hardware found\n");
201 return;
202 }
203
204 if (trace_isrunning(t))
205 trace_stop(t);
206
207 etb_unlock(t);
208
209 length = etb_getdatalen(t);
210
211 if (length == t->etb_bufsz)
212 first = etb_readl(t, ETBR_WRITEADDR);
213
214 etb_writel(t, first, ETBR_READADDR);
215
216 printk(KERN_INFO "Trace buffer contents length: %d\n", length);
217 printk(KERN_INFO "--- ETB buffer begin ---\n");
218 for (; length; length--)
219 printk("%08x", cpu_to_be32(etb_readl(t, ETBR_READMEM)));
220 printk(KERN_INFO "\n--- ETB buffer end ---\n");
221
222 /* deassert the overflow bit */
223 etb_writel(t, 1, ETBR_CTRL);
224 etb_writel(t, 0, ETBR_CTRL);
225
226 etb_writel(t, 0, ETBR_TRIGGERCOUNT);
227 etb_writel(t, 0, ETBR_READADDR);
228 etb_writel(t, 0, ETBR_WRITEADDR);
229
230 etb_lock(t);
231}
232
233static void sysrq_etm_dump(int key, struct tty_struct *tty)
234{
235 dev_dbg(tracer.dev, "Dumping ETB buffer\n");
236 etm_dump();
237}
238
239static struct sysrq_key_op sysrq_etm_op = {
240 .handler = sysrq_etm_dump,
241 .help_msg = "ETM buffer dump",
242 .action_msg = "etm",
243};
244
245static int etb_open(struct inode *inode, struct file *file)
246{
247 if (!tracer.etb_regs)
248 return -ENODEV;
249
250 file->private_data = &tracer;
251
252 return nonseekable_open(inode, file);
253}
254
255static ssize_t etb_read(struct file *file, char __user *data,
256 size_t len, loff_t *ppos)
257{
258 int total, i;
259 long length;
260 struct tracectx *t = file->private_data;
261 u32 first = 0;
262 u32 *buf;
263
264 mutex_lock(&t->mutex);
265
266 if (trace_isrunning(t)) {
267 length = 0;
268 goto out;
269 }
270
271 etb_unlock(t);
272
273 total = etb_getdatalen(t);
274 if (total == t->etb_bufsz)
275 first = etb_readl(t, ETBR_WRITEADDR);
276
277 etb_writel(t, first, ETBR_READADDR);
278
279 length = min(total * 4, (int)len);
280 buf = vmalloc(length);
281
282 dev_dbg(t->dev, "ETB buffer length: %d\n", total);
283 dev_dbg(t->dev, "ETB status reg: %x\n", etb_readl(t, ETBR_STATUS));
284 for (i = 0; i < length / 4; i++)
285 buf[i] = etb_readl(t, ETBR_READMEM);
286
287 /* the only way to deassert overflow bit in ETB status is this */
288 etb_writel(t, 1, ETBR_CTRL);
289 etb_writel(t, 0, ETBR_CTRL);
290
291 etb_writel(t, 0, ETBR_WRITEADDR);
292 etb_writel(t, 0, ETBR_READADDR);
293 etb_writel(t, 0, ETBR_TRIGGERCOUNT);
294
295 etb_lock(t);
296
297 length -= copy_to_user(data, buf, length);
298 vfree(buf);
299
300out:
301 mutex_unlock(&t->mutex);
302
303 return length;
304}
305
306static int etb_release(struct inode *inode, struct file *file)
307{
308 /* there's nothing to do here, actually */
309 return 0;
310}
311
312static const struct file_operations etb_fops = {
313 .owner = THIS_MODULE,
314 .read = etb_read,
315 .open = etb_open,
316 .release = etb_release,
317};
318
319static struct miscdevice etb_miscdev = {
320 .name = "tracebuf",
321 .minor = 0,
322 .fops = &etb_fops,
323};
324
325static int __init etb_probe(struct amba_device *dev, struct amba_id *id)
326{
327 struct tracectx *t = &tracer;
328 int ret = 0;
329
330 ret = amba_request_regions(dev, NULL);
331 if (ret)
332 goto out;
333
334 t->etb_regs = ioremap_nocache(dev->res.start, resource_size(&dev->res));
335 if (!t->etb_regs) {
336 ret = -ENOMEM;
337 goto out_release;
338 }
339
340 amba_set_drvdata(dev, t);
341
342 etb_miscdev.parent = &dev->dev;
343
344 ret = misc_register(&etb_miscdev);
345 if (ret)
346 goto out_unmap;
347
348 t->emu_clk = clk_get(&dev->dev, "emu_src_ck");
349 if (IS_ERR(t->emu_clk)) {
350 dev_dbg(&dev->dev, "Failed to obtain emu_src_ck.\n");
351 return -EFAULT;
352 }
353
354 clk_enable(t->emu_clk);
355
356 etb_unlock(t);
357 t->etb_bufsz = etb_readl(t, ETBR_DEPTH);
358 dev_dbg(&dev->dev, "Size: %x\n", t->etb_bufsz);
359
360 /* make sure trace capture is disabled */
361 etb_writel(t, 0, ETBR_CTRL);
362 etb_writel(t, 0x1000, ETBR_FORMATTERCTRL);
363 etb_lock(t);
364
365 dev_dbg(&dev->dev, "ETB AMBA driver initialized.\n");
366
367out:
368 return ret;
369
370out_unmap:
371 amba_set_drvdata(dev, NULL);
372 iounmap(t->etb_regs);
373
374out_release:
375 amba_release_regions(dev);
376
377 return ret;
378}
379
380static int etb_remove(struct amba_device *dev)
381{
382 struct tracectx *t = amba_get_drvdata(dev);
383
384 amba_set_drvdata(dev, NULL);
385
386 iounmap(t->etb_regs);
387 t->etb_regs = NULL;
388
389 clk_disable(t->emu_clk);
390 clk_put(t->emu_clk);
391
392 amba_release_regions(dev);
393
394 return 0;
395}
396
397static struct amba_id etb_ids[] = {
398 {
399 .id = 0x0003b907,
400 .mask = 0x0007ffff,
401 },
402 { 0, 0 },
403};
404
405static struct amba_driver etb_driver = {
406 .drv = {
407 .name = "etb",
408 .owner = THIS_MODULE,
409 },
410 .probe = etb_probe,
411 .remove = etb_remove,
412 .id_table = etb_ids,
413};
414
415/* use a sysfs file "trace_running" to start/stop tracing */
416static ssize_t trace_running_show(struct kobject *kobj,
417 struct kobj_attribute *attr,
418 char *buf)
419{
420 return sprintf(buf, "%x\n", trace_isrunning(&tracer));
421}
422
423static ssize_t trace_running_store(struct kobject *kobj,
424 struct kobj_attribute *attr,
425 const char *buf, size_t n)
426{
427 unsigned int value;
428 int ret;
429
430 if (sscanf(buf, "%u", &value) != 1)
431 return -EINVAL;
432
433 mutex_lock(&tracer.mutex);
434 ret = value ? trace_start(&tracer) : trace_stop(&tracer);
435 mutex_unlock(&tracer.mutex);
436
437 return ret ? : n;
438}
439
440static struct kobj_attribute trace_running_attr =
441 __ATTR(trace_running, 0644, trace_running_show, trace_running_store);
442
443static ssize_t trace_info_show(struct kobject *kobj,
444 struct kobj_attribute *attr,
445 char *buf)
446{
447 u32 etb_wa, etb_ra, etb_st, etb_fc, etm_ctrl, etm_st;
448 int datalen;
449
450 etb_unlock(&tracer);
451 datalen = etb_getdatalen(&tracer);
452 etb_wa = etb_readl(&tracer, ETBR_WRITEADDR);
453 etb_ra = etb_readl(&tracer, ETBR_READADDR);
454 etb_st = etb_readl(&tracer, ETBR_STATUS);
455 etb_fc = etb_readl(&tracer, ETBR_FORMATTERCTRL);
456 etb_lock(&tracer);
457
458 etm_unlock(&tracer);
459 etm_ctrl = etm_readl(&tracer, ETMR_CTRL);
460 etm_st = etm_readl(&tracer, ETMR_STATUS);
461 etm_lock(&tracer);
462
463 return sprintf(buf, "Trace buffer len: %d\nComparator pairs: %d\n"
464 "ETBR_WRITEADDR:\t%08x\n"
465 "ETBR_READADDR:\t%08x\n"
466 "ETBR_STATUS:\t%08x\n"
467 "ETBR_FORMATTERCTRL:\t%08x\n"
468 "ETMR_CTRL:\t%08x\n"
469 "ETMR_STATUS:\t%08x\n",
470 datalen,
471 tracer.ncmppairs,
472 etb_wa,
473 etb_ra,
474 etb_st,
475 etb_fc,
476 etm_ctrl,
477 etm_st
478 );
479}
480
481static struct kobj_attribute trace_info_attr =
482 __ATTR(trace_info, 0444, trace_info_show, NULL);
483
484static ssize_t trace_mode_show(struct kobject *kobj,
485 struct kobj_attribute *attr,
486 char *buf)
487{
488 return sprintf(buf, "%d %d\n",
489 !!(tracer.flags & TRACER_CYCLE_ACC),
490 tracer.etm_portsz);
491}
492
493static ssize_t trace_mode_store(struct kobject *kobj,
494 struct kobj_attribute *attr,
495 const char *buf, size_t n)
496{
497 unsigned int cycacc, portsz;
498
499 if (sscanf(buf, "%u %u", &cycacc, &portsz) != 2)
500 return -EINVAL;
501
502 mutex_lock(&tracer.mutex);
503 if (cycacc)
504 tracer.flags |= TRACER_CYCLE_ACC;
505 else
506 tracer.flags &= ~TRACER_CYCLE_ACC;
507
508 tracer.etm_portsz = portsz & 0x0f;
509 mutex_unlock(&tracer.mutex);
510
511 return n;
512}
513
514static struct kobj_attribute trace_mode_attr =
515 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
516
517static int __init etm_probe(struct amba_device *dev, struct amba_id *id)
518{
519 struct tracectx *t = &tracer;
520 int ret = 0;
521
522 if (t->etm_regs) {
523 dev_dbg(&dev->dev, "ETM already initialized\n");
524 ret = -EBUSY;
525 goto out;
526 }
527
528 ret = amba_request_regions(dev, NULL);
529 if (ret)
530 goto out;
531
532 t->etm_regs = ioremap_nocache(dev->res.start, resource_size(&dev->res));
533 if (!t->etm_regs) {
534 ret = -ENOMEM;
535 goto out_release;
536 }
537
538 amba_set_drvdata(dev, t);
539
540 mutex_init(&t->mutex);
541 t->dev = &dev->dev;
542 t->flags = TRACER_CYCLE_ACC;
543 t->etm_portsz = 1;
544
545 etm_unlock(t);
546 ret = etm_readl(t, CSCR_PRSR);
547
548 t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf;
549 etm_writel(t, 0x440, ETMR_CTRL);
550 etm_lock(t);
551
552 ret = sysfs_create_file(&dev->dev.kobj,
553 &trace_running_attr.attr);
554 if (ret)
555 goto out_unmap;
556
557 /* failing to create any of these two is not fatal */
558 ret = sysfs_create_file(&dev->dev.kobj, &trace_info_attr.attr);
559 if (ret)
560 dev_dbg(&dev->dev, "Failed to create trace_info in sysfs\n");
561
562 ret = sysfs_create_file(&dev->dev.kobj, &trace_mode_attr.attr);
563 if (ret)
564 dev_dbg(&dev->dev, "Failed to create trace_mode in sysfs\n");
565
566 dev_dbg(t->dev, "ETM AMBA driver initialized.\n");
567
568out:
569 return ret;
570
571out_unmap:
572 amba_set_drvdata(dev, NULL);
573 iounmap(t->etm_regs);
574
575out_release:
576 amba_release_regions(dev);
577
578 return ret;
579}
580
581static int etm_remove(struct amba_device *dev)
582{
583 struct tracectx *t = amba_get_drvdata(dev);
584
585 amba_set_drvdata(dev, NULL);
586
587 iounmap(t->etm_regs);
588 t->etm_regs = NULL;
589
590 amba_release_regions(dev);
591
592 sysfs_remove_file(&dev->dev.kobj, &trace_running_attr.attr);
593 sysfs_remove_file(&dev->dev.kobj, &trace_info_attr.attr);
594 sysfs_remove_file(&dev->dev.kobj, &trace_mode_attr.attr);
595
596 return 0;
597}
598
599static struct amba_id etm_ids[] = {
600 {
601 .id = 0x0003b921,
602 .mask = 0x0007ffff,
603 },
604 { 0, 0 },
605};
606
607static struct amba_driver etm_driver = {
608 .drv = {
609 .name = "etm",
610 .owner = THIS_MODULE,
611 },
612 .probe = etm_probe,
613 .remove = etm_remove,
614 .id_table = etm_ids,
615};
616
617static int __init etm_init(void)
618{
619 int retval;
620
621 retval = amba_driver_register(&etb_driver);
622 if (retval) {
623 printk(KERN_ERR "Failed to register etb\n");
624 return retval;
625 }
626
627 retval = amba_driver_register(&etm_driver);
628 if (retval) {
629 amba_driver_unregister(&etb_driver);
630 printk(KERN_ERR "Failed to probe etm\n");
631 return retval;
632 }
633
634 /* not being able to install this handler is not fatal */
635 (void)register_sysrq_key('v', &sysrq_etm_op);
636
637 return 0;
638}
639
640device_initcall(etm_init);
641
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2fd88437348b..c71e39ed092f 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -163,6 +163,11 @@ config MACH_CPUAT91
163 Select this if you are using the Eukrea Electromatique's 163 Select this if you are using the Eukrea Electromatique's
164 CPUAT91 board <http://www.eukrea.com/>. 164 CPUAT91 board <http://www.eukrea.com/>.
165 165
166config MACH_ECO920
167 bool "eco920"
168 help
169 Select this if you are using the eco920 board
170
166endif 171endif
167 172
168# ---------------------------------------------------------- 173# ----------------------------------------------------------
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index ada440aab0c5..709fbad4a3ee 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
35obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o 35obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
36obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o 36obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
37obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o 37obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o
38obj-$(CONFIG_MACH_ECO920) += board-eco920.o
38 39
39# AT91SAM9260 board-specific support 40# AT91SAM9260 board-specific support
40obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o 41obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
@@ -77,6 +78,7 @@ obj-y += leds.o
77# Power Management 78# Power Management
78obj-$(CONFIG_PM) += pm.o 79obj-$(CONFIG_PM) += pm.o
79obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o 80obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
81obj-$(CONFIG_CPU_IDLE) += cpuidle.o
80 82
81ifeq ($(CONFIG_PM_DEBUG),y) 83ifeq ($(CONFIG_PM_DEBUG),y)
82CFLAGS_pm.o += -DDEBUG 84CFLAGS_pm.o += -DDEBUG
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 332b784050b2..a57af3e99c7c 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -131,6 +131,62 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
131 131
132 132
133/* -------------------------------------------------------------------- 133/* --------------------------------------------------------------------
134 * USB Host HS (EHCI)
135 * Needs an OHCI host for low and full speed management
136 * -------------------------------------------------------------------- */
137
138#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
139static u64 ehci_dmamask = DMA_BIT_MASK(32);
140static struct at91_usbh_data usbh_ehci_data;
141
142static struct resource usbh_ehci_resources[] = {
143 [0] = {
144 .start = AT91SAM9G45_EHCI_BASE,
145 .end = AT91SAM9G45_EHCI_BASE + SZ_1M - 1,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = AT91SAM9G45_ID_UHPHS,
150 .end = AT91SAM9G45_ID_UHPHS,
151 .flags = IORESOURCE_IRQ,
152 },
153};
154
155static struct platform_device at91_usbh_ehci_device = {
156 .name = "atmel-ehci",
157 .id = -1,
158 .dev = {
159 .dma_mask = &ehci_dmamask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 .platform_data = &usbh_ehci_data,
162 },
163 .resource = usbh_ehci_resources,
164 .num_resources = ARRAY_SIZE(usbh_ehci_resources),
165};
166
167void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
168{
169 int i;
170
171 if (!data)
172 return;
173
174 /* Enable VBus control for UHP ports */
175 for (i = 0; i < data->ports; i++) {
176 if (data->vbus_pin[i])
177 at91_set_gpio_output(data->vbus_pin[i], 0);
178 }
179
180 usbh_ehci_data = *data;
181 at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk");
182 platform_device_register(&at91_usbh_ehci_device);
183}
184#else
185void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
186#endif
187
188
189/* --------------------------------------------------------------------
134 * USB HS Device (Gadget) 190 * USB HS Device (Gadget)
135 * -------------------------------------------------------------------- */ 191 * -------------------------------------------------------------------- */
136 192
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
new file mode 100644
index 000000000000..295a96609e71
--- /dev/null
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -0,0 +1,158 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
15 */
16
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/mtd/physmap.h>
20#include <linux/gpio.h>
21
22#include <asm/mach-types.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26
27#include <mach/board.h>
28#include <mach/at91rm9200_mc.h>
29#include "generic.h"
30
31static void __init eco920_map_io(void)
32{
33 at91rm9200_initialize(18432000, AT91RM9200_PQFP);
34
35 /* Setup the LEDs */
36 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
37
38 /* DBGU on ttyS0. (Rx & Tx only */
39 at91_register_uart(0, 0, 0);
40
41 /* set serial console to ttyS0 (ie, DBGU) */
42 at91_set_serial_console(0);
43}
44
45static void __init eco920_init_irq(void)
46{
47 at91rm9200_init_interrupts(NULL);
48}
49
50static struct at91_eth_data __initdata eco920_eth_data = {
51 .phy_irq_pin = AT91_PIN_PC2,
52 .is_rmii = 1,
53};
54
55static struct at91_usbh_data __initdata eco920_usbh_data = {
56 .ports = 1,
57};
58
59static struct at91_udc_data __initdata eco920_udc_data = {
60 .vbus_pin = AT91_PIN_PB12,
61 .pullup_pin = AT91_PIN_PB13,
62};
63
64static struct at91_mmc_data __initdata eco920_mmc_data = {
65 .slot_b = 0,
66 .wire4 = 0,
67};
68
69static struct physmap_flash_data eco920_flash_data = {
70 .width = 2,
71};
72
73static struct resource eco920_flash_resource = {
74 .start = 0x11000000,
75 .end = 0x11ffffff,
76 .flags = IORESOURCE_MEM,
77};
78
79static struct platform_device eco920_flash = {
80 .name = "physmap-flash",
81 .id = 0,
82 .dev = {
83 .platform_data = &eco920_flash_data,
84 },
85 .resource = &eco920_flash_resource,
86 .num_resources = 1,
87};
88
89static struct resource at91_beeper_resources[] = {
90 [0] = {
91 .start = AT91RM9200_BASE_TC3,
92 .end = AT91RM9200_BASE_TC3 + 0x39,
93 .flags = IORESOURCE_MEM,
94 },
95};
96
97static struct platform_device at91_beeper = {
98 .name = "at91_beeper",
99 .id = 0,
100 .resource = at91_beeper_resources,
101 .num_resources = ARRAY_SIZE(at91_beeper_resources),
102};
103
104static struct spi_board_info eco920_spi_devices[] = {
105 { /* CAN controller */
106 .modalias = "tlv5638",
107 .chip_select = 3,
108 .max_speed_hz = 20 * 1000 * 1000,
109 .mode = SPI_CPHA,
110 },
111};
112
113static void __init eco920_board_init(void)
114{
115 at91_add_device_serial();
116 at91_add_device_eth(&eco920_eth_data);
117 at91_add_device_usbh(&eco920_usbh_data);
118 at91_add_device_udc(&eco920_udc_data);
119
120 at91_add_device_mmc(0, &eco920_mmc_data);
121 platform_device_register(&eco920_flash);
122
123 at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
124 | AT91_SMC_RWSETUP_(1)
125 | AT91_SMC_DBW_8
126 | AT91_SMC_WSEN
127 | AT91_SMC_NWS_(15));
128
129 at91_set_A_periph(AT91_PIN_PC6, 1);
130
131 at91_set_gpio_input(AT91_PIN_PA23, 0);
132 at91_set_deglitch(AT91_PIN_PA23, 1);
133
134/* Initialization of the Static Memory Controller for Chip Select 3 */
135 at91_sys_write(AT91_SMC_CSR(3),
136 AT91_SMC_DBW_16 | /* 16 bit */
137 AT91_SMC_WSEN |
138 AT91_SMC_NWS_(5) | /* wait states */
139 AT91_SMC_TDF_(1) /* float time */
140 );
141
142 at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper");
143 at91_set_B_periph(AT91_PIN_PB6, 0);
144 platform_device_register(&at91_beeper);
145
146 at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices));
147}
148
149MACHINE_START(ECO920, "eco920")
150 /* Maintainer: Sascha Hauer */
151 .phys_io = AT91_BASE_SYS,
152 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
153 .boot_params = AT91_SDRAM_BASE + 0x100,
154 .timer = &at91rm9200_timer,
155 .map_io = eco920_map_io,
156 .init_irq = eco920_init_irq,
157 .init_machine = eco920_board_init,
158MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 64c3843f323d..1cf4d8681078 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -366,6 +366,7 @@ static void __init ek_board_init(void)
366 at91_add_device_serial(); 366 at91_add_device_serial();
367 /* USB HS Host */ 367 /* USB HS Host */
368 at91_add_device_usbh_ohci(&ek_usbh_hs_data); 368 at91_add_device_usbh_ohci(&ek_usbh_hs_data);
369 at91_add_device_usbh_ehci(&ek_usbh_hs_data);
369 /* USB HS Device */ 370 /* USB HS Device */
370 at91_add_device_usba(&ek_usba_udc_data); 371 at91_add_device_usba(&ek_usba_udc_data);
371 /* SPI */ 372 /* SPI */
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
new file mode 100644
index 000000000000..1cfeac1483d6
--- /dev/null
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -0,0 +1,94 @@
1/*
2 * based on arch/arm/mach-kirkwood/cpuidle.c
3 *
4 * CPU idle support for AT91 SoC
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 *
10 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
11 * to implement two idle states -
12 * #1 wait-for-interrupt
13 * #2 wait-for-interrupt and RAM self refresh
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/cpuidle.h>
20#include <asm/proc-fns.h>
21#include <linux/io.h>
22
23#include "pm.h"
24
25#define AT91_MAX_STATES 2
26
27static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
28
29static struct cpuidle_driver at91_idle_driver = {
30 .name = "at91_idle",
31 .owner = THIS_MODULE,
32};
33
34/* Actual code that puts the SoC in different idle states */
35static int at91_enter_idle(struct cpuidle_device *dev,
36 struct cpuidle_state *state)
37{
38 struct timeval before, after;
39 int idle_time;
40 u32 saved_lpr;
41
42 local_irq_disable();
43 do_gettimeofday(&before);
44 if (state == &dev->states[0])
45 /* Wait for interrupt state */
46 cpu_do_idle();
47 else if (state == &dev->states[1]) {
48 asm("b 1f; .align 5; 1:");
49 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
50 saved_lpr = sdram_selfrefresh_enable();
51 cpu_do_idle();
52 sdram_selfrefresh_disable(saved_lpr);
53 }
54 do_gettimeofday(&after);
55 local_irq_enable();
56 idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
57 (after.tv_usec - before.tv_usec);
58 return idle_time;
59}
60
61/* Initialize CPU idle by registering the idle states */
62static int at91_init_cpuidle(void)
63{
64 struct cpuidle_device *device;
65
66 cpuidle_register_driver(&at91_idle_driver);
67
68 device = &per_cpu(at91_cpuidle_device, smp_processor_id());
69 device->state_count = AT91_MAX_STATES;
70
71 /* Wait for interrupt state */
72 device->states[0].enter = at91_enter_idle;
73 device->states[0].exit_latency = 1;
74 device->states[0].target_residency = 10000;
75 device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
76 strcpy(device->states[0].name, "WFI");
77 strcpy(device->states[0].desc, "Wait for interrupt");
78
79 /* Wait for interrupt and RAM self refresh state */
80 device->states[1].enter = at91_enter_idle;
81 device->states[1].exit_latency = 10;
82 device->states[1].target_residency = 10000;
83 device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
84 strcpy(device->states[1].name, "RAM_SR");
85 strcpy(device->states[1].desc, "WFI and RAM Self Refresh");
86
87 if (cpuidle_register_device(device)) {
88 printk(KERN_ERR "at91_init_cpuidle: Failed registering\n");
89 return -EIO;
90 }
91 return 0;
92}
93
94device_initcall(at91_init_cpuidle);
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 2f4fcedc02ba..2295d80dd893 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -98,6 +98,7 @@ struct at91_usbh_data {
98}; 98};
99extern void __init at91_add_device_usbh(struct at91_usbh_data *data); 99extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
100extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); 100extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
101extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
101 102
102 /* NAND / SmartMedia */ 103 /* NAND / SmartMedia */
103struct atmel_nand_data { 104struct atmel_nand_data {
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 4028724d490d..615668986480 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -29,62 +29,7 @@
29#include <mach/cpu.h> 29#include <mach/cpu.h>
30 30
31#include "generic.h" 31#include "generic.h"
32 32#include "pm.h"
33#ifdef CONFIG_ARCH_AT91RM9200
34#include <mach/at91rm9200_mc.h>
35
36/*
37 * The AT91RM9200 goes into self-refresh mode with this command, and will
38 * terminate self-refresh automatically on the next SDRAM access.
39 */
40#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1)
41#define sdram_selfrefresh_disable() do {} while (0)
42
43#elif defined(CONFIG_ARCH_AT91CAP9)
44#include <mach/at91cap9_ddrsdr.h>
45
46static u32 saved_lpr;
47
48static inline void sdram_selfrefresh_enable(void)
49{
50 u32 lpr;
51
52 saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
53
54 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
55 at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
56}
57
58#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
59
60#else
61#include <mach/at91sam9_sdramc.h>
62
63#ifdef CONFIG_ARCH_AT91SAM9263
64/*
65 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
66 * handle those cases both here and in the Suspend-To-RAM support.
67 */
68#define AT91_SDRAMC AT91_SDRAMC0
69#warning Assuming EB1 SDRAM controller is *NOT* used
70#endif
71
72static u32 saved_lpr;
73
74static inline void sdram_selfrefresh_enable(void)
75{
76 u32 lpr;
77
78 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
79
80 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
81 at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
82}
83
84#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
85
86#endif
87
88 33
89/* 34/*
90 * Show the reason for the previous system reset. 35 * Show the reason for the previous system reset.
@@ -260,6 +205,7 @@ extern u32 at91_slow_clock_sz;
260 205
261static int at91_pm_enter(suspend_state_t state) 206static int at91_pm_enter(suspend_state_t state)
262{ 207{
208 u32 saved_lpr;
263 at91_gpio_suspend(); 209 at91_gpio_suspend();
264 at91_irq_suspend(); 210 at91_irq_suspend();
265 211
@@ -315,9 +261,9 @@ static int at91_pm_enter(suspend_state_t state)
315 */ 261 */
316 asm("b 1f; .align 5; 1:"); 262 asm("b 1f; .align 5; 1:");
317 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ 263 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
318 sdram_selfrefresh_enable(); 264 saved_lpr = sdram_selfrefresh_enable();
319 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ 265 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
320 sdram_selfrefresh_disable(); 266 sdram_selfrefresh_disable(saved_lpr);
321 break; 267 break;
322 268
323 case PM_SUSPEND_ON: 269 case PM_SUSPEND_ON:
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
new file mode 100644
index 000000000000..08322c44df1a
--- /dev/null
+++ b/arch/arm/mach-at91/pm.h
@@ -0,0 +1,67 @@
1#ifdef CONFIG_ARCH_AT91RM9200
2#include <mach/at91rm9200_mc.h>
3
4/*
5 * The AT91RM9200 goes into self-refresh mode with this command, and will
6 * terminate self-refresh automatically on the next SDRAM access.
7 *
8 * Self-refresh mode is exited as soon as a memory access is made, but we don't
9 * know for sure when that happens. However, we need to restore the low-power
10 * mode if it was enabled before going idle. Restoring low-power mode while
11 * still in self-refresh is "not recommended", but seems to work.
12 */
13
14static inline u32 sdram_selfrefresh_enable(void)
15{
16 u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
17
18 at91_sys_write(AT91_SDRAMC_LPR, 0);
19 at91_sys_write(AT91_SDRAMC_SRR, 1);
20 return saved_lpr;
21}
22
23#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
24
25#elif defined(CONFIG_ARCH_AT91CAP9)
26#include <mach/at91cap9_ddrsdr.h>
27
28
29static inline u32 sdram_selfrefresh_enable(void)
30{
31 u32 saved_lpr, lpr;
32
33 saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
34
35 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
36 at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
37 return saved_lpr;
38}
39
40#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
41
42#else
43#include <mach/at91sam9_sdramc.h>
44
45#ifdef CONFIG_ARCH_AT91SAM9263
46/*
47 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
48 * handle those cases both here and in the Suspend-To-RAM support.
49 */
50#define AT91_SDRAMC AT91_SDRAMC0
51#warning Assuming EB1 SDRAM controller is *NOT* used
52#endif
53
54static inline u32 sdram_selfrefresh_enable(void)
55{
56 u32 saved_lpr, lpr;
57
58 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
59
60 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
61 at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
62 return saved_lpr;
63}
64
65#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
66
67#endif
diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h
index 4db0eff90357..dae5e9b166ea 100644
--- a/arch/arm/mach-bcmring/include/mach/io.h
+++ b/arch/arm/mach-bcmring/include/mach/io.h
@@ -23,34 +23,11 @@
23 23
24#define IO_SPACE_LIMIT 0xffffffff 24#define IO_SPACE_LIMIT 0xffffffff
25 25
26#define __io(a) ((void __iomem *)HW_IO_PHYS_TO_VIRT(a)) 26/*
27 27 * We don't actually have real ISA nor PCI buses, but there is so many
28/* Do not enable mem_pci for a big endian arm architecture or unexpected byteswaps will */ 28 * drivers out there that might just work if we fake them...
29/* happen in readw/writew etc. */ 29 */
30 30#define __io(a) __typesafe_io(a)
31#define readb(c) __raw_readb(c) 31#define __mem_pci(a) (a)
32#define readw(c) __raw_readw(c)
33#define readl(c) __raw_readl(c)
34#define readb_relaxed(addr) readb(addr)
35#define readw_relaxed(addr) readw(addr)
36#define readl_relaxed(addr) readl(addr)
37
38#define readsb(p, d, l) __raw_readsb(p, d, l)
39#define readsw(p, d, l) __raw_readsw(p, d, l)
40#define readsl(p, d, l) __raw_readsl(p, d, l)
41
42#define writeb(v, c) __raw_writeb(v, c)
43#define writew(v, c) __raw_writew(v, c)
44#define writel(v, c) __raw_writel(v, c)
45
46#define writesb(p, d, l) __raw_writesb(p, d, l)
47#define writesw(p, d, l) __raw_writesw(p, d, l)
48#define writesl(p, d, l) __raw_writesl(p, d, l)
49
50#define memset_io(c, v, l) _memset_io((c), (v), (l))
51#define memcpy_fromio(a, c, l) _memcpy_fromio((a), (c), (l))
52#define memcpy_toio(c, a, l) _memcpy_toio((c), (a), (l))
53
54#define eth_io_copy_and_sum(s, c, l, b) eth_copy_and_sum((s), (c), (l), (b))
55 32
56#endif 33#endif
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index b4357c388d2e..1f0d66561bbe 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -31,6 +31,7 @@
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/fb.h> 33#include <mach/fb.h>
34#include <mach/ep93xx_keypad.h>
34 35
35#include <asm/mach/map.h> 36#include <asm/mach/map.h>
36#include <asm/mach/time.h> 37#include <asm/mach/time.h>
@@ -728,6 +729,82 @@ void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
728 platform_device_register(&ep93xx_fb_device); 729 platform_device_register(&ep93xx_fb_device);
729} 730}
730 731
732
733/*************************************************************************
734 * EP93xx matrix keypad peripheral handling
735 *************************************************************************/
736static struct resource ep93xx_keypad_resource[] = {
737 {
738 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
739 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
740 .flags = IORESOURCE_MEM,
741 }, {
742 .start = IRQ_EP93XX_KEY,
743 .end = IRQ_EP93XX_KEY,
744 .flags = IORESOURCE_IRQ,
745 },
746};
747
748static struct platform_device ep93xx_keypad_device = {
749 .name = "ep93xx-keypad",
750 .id = -1,
751 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
752 .resource = ep93xx_keypad_resource,
753};
754
755void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
756{
757 ep93xx_keypad_device.dev.platform_data = data;
758 platform_device_register(&ep93xx_keypad_device);
759}
760
761int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
762{
763 int err;
764 int i;
765
766 for (i = 0; i < 8; i++) {
767 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
768 if (err)
769 goto fail_gpio_c;
770 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
771 if (err)
772 goto fail_gpio_d;
773 }
774
775 /* Enable the keypad controller; GPIO ports C and D used for keypad */
776 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
777 EP93XX_SYSCON_DEVCFG_GONK);
778
779 return 0;
780
781fail_gpio_d:
782 gpio_free(EP93XX_GPIO_LINE_C(i));
783fail_gpio_c:
784 for ( ; i >= 0; --i) {
785 gpio_free(EP93XX_GPIO_LINE_C(i));
786 gpio_free(EP93XX_GPIO_LINE_D(i));
787 }
788 return err;
789}
790EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
791
792void ep93xx_keypad_release_gpio(struct platform_device *pdev)
793{
794 int i;
795
796 for (i = 0; i < 8; i++) {
797 gpio_free(EP93XX_GPIO_LINE_C(i));
798 gpio_free(EP93XX_GPIO_LINE_D(i));
799 }
800
801 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
802 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
803 EP93XX_SYSCON_DEVCFG_GONK);
804}
805EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
806
807
731extern void ep93xx_gpio_init(void); 808extern void ep93xx_gpio_init(void);
732 809
733void __init ep93xx_init_devices(void) 810void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h
index 04b37a89801c..50cb991eadeb 100644
--- a/arch/arm/mach-ep93xx/include/mach/clkdev.h
+++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h
@@ -1,3 +1,7 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/clkdev.h
3 */
4
1#ifndef __ASM_MACH_CLKDEV_H 5#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H 6#define __ASM_MACH_CLKDEV_H
3 7
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
index ef6bd9d13148..3a5961d3f3b1 100644
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -1,3 +1,7 @@
1/*
2 * arch/arm/mach-ep93xx/include/mach/dma.h
3 */
4
1#ifndef __ASM_ARCH_DMA_H 5#ifndef __ASM_ARCH_DMA_H
2#define __ASM_ARCH_DMA_H 6#define __ASM_ARCH_DMA_H
3 7
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index b1f937eda29c..d55194a4c093 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -134,6 +134,7 @@
134#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) 134#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
135#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) 135#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
136 136
137#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000)
137#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) 138#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
138 139
139#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) 140#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h
index 349fa7cb72d5..5a3ce024b593 100644
--- a/arch/arm/mach-ep93xx/include/mach/hardware.h
+++ b/arch/arm/mach-ep93xx/include/mach/hardware.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ep93xx/include/mach/hardware.h 2 * arch/arm/mach-ep93xx/include/mach/hardware.h
3 */ 3 */
4
4#ifndef __ASM_ARCH_HARDWARE_H 5#ifndef __ASM_ARCH_HARDWARE_H
5#define __ASM_ARCH_HARDWARE_H 6#define __ASM_ARCH_HARDWARE_H
6 7
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
index cebcc1c53d63..594b77f21054 100644
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ b/arch/arm/mach-ep93xx/include/mach/io.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ep93xx/include/mach/io.h 2 * arch/arm/mach-ep93xx/include/mach/io.h
3 */ 3 */
4
4#ifndef __ASM_MACH_IO_H 5#ifndef __ASM_MACH_IO_H
5#define __ASM_MACH_IO_H 6#define __ASM_MACH_IO_H
6 7
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 469fd968d517..c6dc14dbca18 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -8,6 +8,7 @@ struct i2c_gpio_platform_data;
8struct i2c_board_info; 8struct i2c_board_info;
9struct platform_device; 9struct platform_device;
10struct ep93xxfb_mach_info; 10struct ep93xxfb_mach_info;
11struct ep93xx_keypad_platform_data;
11 12
12struct ep93xx_eth_data 13struct ep93xx_eth_data
13{ 14{
@@ -39,6 +40,9 @@ void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
39void ep93xx_register_pwm(int pwm0, int pwm1); 40void ep93xx_register_pwm(int pwm0, int pwm1);
40int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); 41int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
41void ep93xx_pwm_release_gpio(struct platform_device *pdev); 42void ep93xx_pwm_release_gpio(struct platform_device *pdev);
43void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
44int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
45void ep93xx_keypad_release_gpio(struct platform_device *pdev);
42 46
43void ep93xx_init_devices(void); 47void ep93xx_init_devices(void);
44extern struct sys_timer ep93xx_timer; 48extern struct sys_timer ep93xx_timer;
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index 42ae29b288a1..25b1da9a5035 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -64,6 +64,8 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
64 (dma_addr_t)page_to_phys(page); \ 64 (dma_addr_t)page_to_phys(page); \
65 }) 65 })
66 66
67#define __arch_dma_to_page(dev, addr) phys_to_page(addr)
68
67#endif /* CONFIG_ARCH_IOP13XX */ 69#endif /* CONFIG_ARCH_IOP13XX */
68#endif /* !ASSEMBLY */ 70#endif /* !ASSEMBLY */
69 71
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h
index 76e5308685a4..ffa19aae6e05 100644
--- a/arch/arm/mach-ks8695/include/mach/memory.h
+++ b/arch/arm/mach-ks8695/include/mach/memory.h
@@ -41,6 +41,13 @@ extern struct bus_type platform_bus_type;
41 __dma = __dma - PHYS_OFFSET + KS8695_PCIMEM_PA; \ 41 __dma = __dma - PHYS_OFFSET + KS8695_PCIMEM_PA; \
42 __dma; }) 42 __dma; })
43 43
44#define __arch_dma_to_page(dev, x) \
45 ({ dma_addr_t __dma = x; \
46 if (!is_lbus_device(dev)) \
47 __dma += PHYS_OFFSET - KS8695_PCIMEM_PA; \
48 phys_to_page(__dma); \
49 })
50
44#endif 51#endif
45 52
46#endif 53#endif
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index 2a02b49c40f0..3c5e0f522e9c 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -5,13 +5,13 @@ menu "Nomadik boards"
5config MACH_NOMADIK_8815NHK 5config MACH_NOMADIK_8815NHK
6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)" 6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
7 select NOMADIK_8815 7 select NOMADIK_8815
8 select HAS_MTU
8 9
9endmenu 10endmenu
10 11
11config NOMADIK_8815 12config NOMADIK_8815
12 bool 13 bool
13 14
14
15config I2C_BITBANG_8815NHK 15config I2C_BITBANG_8815NHK
16 tristate "Driver for bit-bang busses found on the 8815 NHK" 16 tristate "Driver for bit-bang busses found on the 8815 NHK"
17 depends on I2C && MACH_NOMADIK_8815NHK 17 depends on I2C && MACH_NOMADIK_8815NHK
diff --git a/arch/arm/mach-nomadik/Makefile b/arch/arm/mach-nomadik/Makefile
index 412040982a40..36f67fb207d2 100644
--- a/arch/arm/mach-nomadik/Makefile
+++ b/arch/arm/mach-nomadik/Makefile
@@ -7,7 +7,7 @@
7 7
8# Object file lists. 8# Object file lists.
9 9
10obj-y += clock.o timer.o gpio.o 10obj-y += clock.o gpio.o
11 11
12# Cpu revision 12# Cpu revision
13obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o 13obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 6bfd537d5afb..116394484e71 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -25,11 +25,18 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
27#include <asm/mach/flash.h> 27#include <asm/mach/flash.h>
28
29#include <plat/mtu.h>
30
28#include <mach/setup.h> 31#include <mach/setup.h>
29#include <mach/nand.h> 32#include <mach/nand.h>
30#include <mach/fsmc.h> 33#include <mach/fsmc.h>
31#include "clock.h" 34#include "clock.h"
32 35
36/* Initial value for SRC control register: all timers use MXTAL/8 source */
37#define SRC_CR_INIT_MASK 0x00007fff
38#define SRC_CR_INIT_VAL 0x2aaa8000
39
33/* These adresses span 16MB, so use three individual pages */ 40/* These adresses span 16MB, so use three individual pages */
34static struct resource nhk8815_nand_resources[] = { 41static struct resource nhk8815_nand_resources[] = {
35 { 42 {
@@ -239,6 +246,26 @@ static struct platform_device *nhk8815_platform_devices[] __initdata = {
239 /* will add more devices */ 246 /* will add more devices */
240}; 247};
241 248
249static void __init nomadik_timer_init(void)
250{
251 u32 src_cr;
252
253 /* Configure timer sources in "system reset controller" ctrl reg */
254 src_cr = readl(io_p2v(NOMADIK_SRC_BASE));
255 src_cr &= SRC_CR_INIT_MASK;
256 src_cr |= SRC_CR_INIT_VAL;
257 writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
258
259 /* Save global pointer to mtu, used by platform timer code */
260 mtu_base = io_p2v(NOMADIK_MTU0_BASE);
261
262 nmdk_timer_init();
263}
264
265static struct sys_timer nomadik_timer = {
266 .init = nomadik_timer_init,
267};
268
242static void __init nhk8815_platform_init(void) 269static void __init nhk8815_platform_init(void)
243{ 270{
244 int i; 271 int i;
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h
index a4e468cf63da..b7897edf1f35 100644
--- a/arch/arm/mach-nomadik/include/mach/setup.h
+++ b/arch/arm/mach-nomadik/include/mach/setup.h
@@ -15,7 +15,7 @@
15extern void cpu8815_map_io(void); 15extern void cpu8815_map_io(void);
16extern void cpu8815_platform_init(void); 16extern void cpu8815_platform_init(void);
17extern void cpu8815_init_irq(void); 17extern void cpu8815_init_irq(void);
18extern struct sys_timer nomadik_timer; 18extern void nmdk_timer_init(void);
19 19
20#endif /* NOMADIK_8815 */ 20#endif /* NOMADIK_8815 */
21 21
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index aad194f61a33..6f1bbbc4d15f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -100,3 +100,11 @@ config MACH_OMAP_ZOOM2
100config MACH_OMAP_4430SDP 100config MACH_OMAP_4430SDP
101 bool "OMAP 4430 SDP board" 101 bool "OMAP 4430 SDP board"
102 depends on ARCH_OMAP4 102 depends on ARCH_OMAP4
103
104config OMAP3_EMU
105 bool "OMAP3 debugging peripherals"
106 depends on ARCH_OMAP3
107 select OC_ETM
108 help
109 Say Y here to enable debugging hardware of omap3
110
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8cb16777661a..e141cabcfcce 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -44,6 +44,9 @@ obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o
44obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o 44obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o
45obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o 45obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o
46 46
47# EMU peripherals
48obj-$(CONFIG_OMAP3_EMU) += emu.o
49
47iommu-y += iommu2.o 50iommu-y += iommu2.o
48iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o 51iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o
49 52
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 7c5c00df3c70..066e88a18824 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -119,7 +119,7 @@ static struct omap_clk omap34xx_clks[] = {
119 CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X), 119 CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X),
120 CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X), 120 CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X),
121 CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X), 121 CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X),
122 CLK(NULL, "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), 122 CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X),
123 CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X), 123 CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X),
124 CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X), 124 CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X),
125 CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X), 125 CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X),
@@ -138,7 +138,7 @@ static struct omap_clk omap34xx_clks[] = {
138 CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X), 138 CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X),
139 CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X), 139 CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X),
140 CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X), 140 CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X),
141 CLK(NULL, "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), 141 CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X),
142 CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2), 142 CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2),
143 CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2), 143 CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2),
144 CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X), 144 CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X),
@@ -147,7 +147,7 @@ static struct omap_clk omap34xx_clks[] = {
147 CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X), 147 CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X),
148 CLK(NULL, "mpu_ck", &mpu_ck, CK_343X), 148 CLK(NULL, "mpu_ck", &mpu_ck, CK_343X),
149 CLK(NULL, "arm_fck", &arm_fck, CK_343X), 149 CLK(NULL, "arm_fck", &arm_fck, CK_343X),
150 CLK(NULL, "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), 150 CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X),
151 CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X), 151 CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X),
152 CLK(NULL, "iva2_ck", &iva2_ck, CK_343X), 152 CLK(NULL, "iva2_ck", &iva2_ck, CK_343X),
153 CLK(NULL, "l3_ick", &l3_ick, CK_343X), 153 CLK(NULL, "l3_ick", &l3_ick, CK_343X),
@@ -302,7 +302,7 @@ static struct omap_clk omap34xx_clks[] = {
302 CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X), 302 CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X),
303 CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X), 303 CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X),
304 CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X), 304 CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X),
305 CLK(NULL, "emu_src_ck", &emu_src_ck, CK_343X), 305 CLK("etb", "emu_src_ck", &emu_src_ck, CK_343X),
306 CLK(NULL, "pclk_fck", &pclk_fck, CK_343X), 306 CLK(NULL, "pclk_fck", &pclk_fck, CK_343X),
307 CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X), 307 CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X),
308 CLK(NULL, "atclk_fck", &atclk_fck, CK_343X), 308 CLK(NULL, "atclk_fck", &atclk_fck, CK_343X),
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
new file mode 100644
index 000000000000..ec0d984a26fc
--- /dev/null
+++ b/arch/arm/mach-omap2/emu.c
@@ -0,0 +1,66 @@
1/*
2 * emu.c
3 *
4 * ETM and ETB CoreSight components' resources as found in OMAP3xxx.
5 *
6 * Copyright (C) 2009 Nokia Corporation.
7 * Alexander Shishkin
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/types.h>
17#include <linux/module.h>
18#include <linux/device.h>
19#include <linux/amba/bus.h>
20#include <linux/io.h>
21#include <linux/clk.h>
22#include <linux/err.h>
23
24MODULE_LICENSE("GPL");
25MODULE_AUTHOR("Alexander Shishkin");
26
27/* Cortex CoreSight components within omap3xxx EMU */
28#define ETM_BASE (L4_EMU_34XX_PHYS + 0x10000)
29#define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000)
30#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
31#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
32
33static struct amba_device omap3_etb_device = {
34 .dev = {
35 .init_name = "etb",
36 },
37 .res = {
38 .start = ETB_BASE,
39 .end = ETB_BASE + SZ_4K - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 .periphid = 0x000bb907,
43};
44
45static struct amba_device omap3_etm_device = {
46 .dev = {
47 .init_name = "etm",
48 },
49 .res = {
50 .start = ETM_BASE,
51 .end = ETM_BASE + SZ_4K - 1,
52 .flags = IORESOURCE_MEM,
53 },
54 .periphid = 0x102bb921,
55};
56
57static int __init emu_init(void)
58{
59 amba_device_register(&omap3_etb_device, &iomem_resource);
60 amba_device_register(&omap3_etm_device, &iomem_resource);
61
62 return 0;
63}
64
65subsys_initcall(emu_init);
66
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile
index 885b5c027c1e..fab46fe9a71f 100644
--- a/arch/arm/mach-u300/Makefile
+++ b/arch/arm/mach-u300/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_MMC) += mmc.o
12obj-$(CONFIG_SPI_PL022) += spi.o 12obj-$(CONFIG_SPI_PL022) += spi.o
13obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o 13obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o
14obj-$(CONFIG_I2C_STU300) += i2c.o 14obj-$(CONFIG_I2C_STU300) += i2c.o
15obj-$(CONFIG_REGULATOR_AB3100) += regulator.o
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
index 10be1f888b27..c73ed06b6065 100644
--- a/arch/arm/mach-u300/i2c.c
+++ b/arch/arm/mach-u300/i2c.c
@@ -9,13 +9,257 @@
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/i2c.h> 11#include <linux/i2c.h>
12#include <linux/mfd/ab3100.h>
13#include <linux/regulator/machine.h>
14#include <linux/amba/bus.h>
12#include <mach/irqs.h> 15#include <mach/irqs.h>
13 16
17/*
18 * Initial settings of ab3100 registers.
19 * Common for below LDO regulator settings are that
20 * bit 7-5 controls voltage. Bit 4 turns regulator ON(1) or OFF(0).
21 * Bit 3-2 controls sleep enable and bit 1-0 controls sleep mode.
22 */
23
24/* LDO_A 0x16: 2.75V, ON, SLEEP_A, SLEEP OFF GND */
25#define LDO_A_SETTING 0x16
26/* LDO_C 0x10: 2.65V, ON, SLEEP_A or B, SLEEP full power */
27#define LDO_C_SETTING 0x10
28/* LDO_D 0x10: 2.65V, ON, sleep mode not used */
29#define LDO_D_SETTING 0x10
30/* LDO_E 0x10: 1.8V, ON, SLEEP_A or B, SLEEP full power */
31#define LDO_E_SETTING 0x10
32/* LDO_E SLEEP 0x00: 1.8V, not used, SLEEP_A or B, not used */
33#define LDO_E_SLEEP_SETTING 0x00
34/* LDO_F 0xD0: 2.5V, ON, SLEEP_A or B, SLEEP full power */
35#define LDO_F_SETTING 0xD0
36/* LDO_G 0x00: 2.85V, OFF, SLEEP_A or B, SLEEP full power */
37#define LDO_G_SETTING 0x00
38/* LDO_H 0x18: 2.75V, ON, SLEEP_B, SLEEP full power */
39#define LDO_H_SETTING 0x18
40/* LDO_K 0x00: 2.75V, OFF, SLEEP_A or B, SLEEP full power */
41#define LDO_K_SETTING 0x00
42/* LDO_EXT 0x00: Voltage not set, OFF, not used, not used */
43#define LDO_EXT_SETTING 0x00
44/* BUCK 0x7D: 1.2V, ON, SLEEP_A and B, SLEEP low power */
45#define BUCK_SETTING 0x7D
46/* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */
47#define BUCK_SLEEP_SETTING 0xAC
48
49static struct regulator_consumer_supply supply_ldo_c[] = {
50 {
51 .dev_name = "ab3100-codec",
52 .supply = "vaudio", /* Powers the codec */
53 },
54};
55
56/*
57 * This one needs to be a supply so we can turn it off
58 * in order to shut down the system.
59 */
60static struct regulator_consumer_supply supply_ldo_d[] = {
61 {
62 .dev = NULL,
63 .supply = "vana15", /* Powers the SoC (CPU etc) */
64 },
65};
66
67static struct regulator_consumer_supply supply_ldo_g[] = {
68 {
69 .dev_name = "mmci",
70 .supply = "vmmc", /* Powers MMC/SD card */
71 },
72};
73
74static struct regulator_consumer_supply supply_ldo_h[] = {
75 {
76 .dev_name = "xgam_pdi",
77 .supply = "vdisp", /* Powers camera, display etc */
78 },
79};
80
81static struct regulator_consumer_supply supply_ldo_k[] = {
82 {
83 .dev_name = "irda",
84 .supply = "vir", /* Power IrDA */
85 },
86};
87
88/*
89 * This is a placeholder for whoever wish to use the
90 * external power.
91 */
92static struct regulator_consumer_supply supply_ldo_ext[] = {
93 {
94 .dev = NULL,
95 .supply = "vext", /* External power */
96 },
97};
98
99/* Preset (hardware defined) voltages for these regulators */
100#define LDO_A_VOLTAGE 2750000
101#define LDO_C_VOLTAGE 2650000
102#define LDO_D_VOLTAGE 2650000
103
104static struct ab3100_platform_data ab3100_plf_data = {
105 .reg_constraints = {
106 /* LDO A routing and constraints */
107 {
108 .constraints = {
109 .name = "vrad",
110 .min_uV = LDO_A_VOLTAGE,
111 .max_uV = LDO_A_VOLTAGE,
112 .valid_modes_mask = REGULATOR_MODE_NORMAL,
113 .always_on = 1,
114 .boot_on = 1,
115 },
116 },
117 /* LDO C routing and constraints */
118 {
119 .constraints = {
120 .min_uV = LDO_C_VOLTAGE,
121 .max_uV = LDO_C_VOLTAGE,
122 .valid_modes_mask = REGULATOR_MODE_NORMAL,
123 },
124 .num_consumer_supplies = ARRAY_SIZE(supply_ldo_c),
125 .consumer_supplies = supply_ldo_c,
126 },
127 /* LDO D routing and constraints */
128 {
129 .constraints = {
130 .min_uV = LDO_D_VOLTAGE,
131 .max_uV = LDO_D_VOLTAGE,
132 .valid_modes_mask = REGULATOR_MODE_NORMAL,
133 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
134 /*
135 * Actually this is boot_on but we need
136 * to reference count it externally to
137 * be able to shut down the system.
138 */
139 },
140 .num_consumer_supplies = ARRAY_SIZE(supply_ldo_d),
141 .consumer_supplies = supply_ldo_d,
142 },
143 /* LDO E routing and constraints */
144 {
145 .constraints = {
146 .name = "vio",
147 .min_uV = 1800000,
148 .max_uV = 1800000,
149 .valid_modes_mask = REGULATOR_MODE_NORMAL,
150 .valid_ops_mask =
151 REGULATOR_CHANGE_VOLTAGE |
152 REGULATOR_CHANGE_STATUS,
153 .always_on = 1,
154 .boot_on = 1,
155 },
156 },
157 /* LDO F routing and constraints */
158 {
159 .constraints = {
160 .name = "vana25",
161 .min_uV = 2500000,
162 .max_uV = 2500000,
163 .valid_modes_mask = REGULATOR_MODE_NORMAL,
164 .valid_ops_mask =
165 REGULATOR_CHANGE_VOLTAGE |
166 REGULATOR_CHANGE_STATUS,
167 .always_on = 1,
168 .boot_on = 1,
169 },
170 },
171 /* LDO G routing and constraints */
172 {
173 .constraints = {
174 .min_uV = 1500000,
175 .max_uV = 2850000,
176 .valid_modes_mask = REGULATOR_MODE_NORMAL,
177 .valid_ops_mask =
178 REGULATOR_CHANGE_VOLTAGE |
179 REGULATOR_CHANGE_STATUS,
180 },
181 .num_consumer_supplies = ARRAY_SIZE(supply_ldo_g),
182 .consumer_supplies = supply_ldo_g,
183 },
184 /* LDO H routing and constraints */
185 {
186 .constraints = {
187 .min_uV = 1200000,
188 .max_uV = 2750000,
189 .valid_modes_mask = REGULATOR_MODE_NORMAL,
190 .valid_ops_mask =
191 REGULATOR_CHANGE_VOLTAGE |
192 REGULATOR_CHANGE_STATUS,
193 },
194 .num_consumer_supplies = ARRAY_SIZE(supply_ldo_h),
195 .consumer_supplies = supply_ldo_h,
196 },
197 /* LDO K routing and constraints */
198 {
199 .constraints = {
200 .min_uV = 1800000,
201 .max_uV = 2750000,
202 .valid_modes_mask = REGULATOR_MODE_NORMAL,
203 .valid_ops_mask =
204 REGULATOR_CHANGE_VOLTAGE |
205 REGULATOR_CHANGE_STATUS,
206 },
207 .num_consumer_supplies = ARRAY_SIZE(supply_ldo_k),
208 .consumer_supplies = supply_ldo_k,
209 },
210 /* External regulator interface. No fixed voltage specified.
211 * If we knew the voltage of the external regulator and it
212 * was connected on the board, we could add the (fixed)
213 * voltage for it here.
214 */
215 {
216 .constraints = {
217 .min_uV = 0,
218 .max_uV = 0,
219 .valid_modes_mask = REGULATOR_MODE_NORMAL,
220 .valid_ops_mask =
221 REGULATOR_CHANGE_STATUS,
222 },
223 .num_consumer_supplies = ARRAY_SIZE(supply_ldo_ext),
224 .consumer_supplies = supply_ldo_ext,
225 },
226 /* Buck converter routing and constraints */
227 {
228 .constraints = {
229 .name = "vcore",
230 .min_uV = 1200000,
231 .max_uV = 1800000,
232 .valid_modes_mask = REGULATOR_MODE_NORMAL,
233 .valid_ops_mask =
234 REGULATOR_CHANGE_VOLTAGE |
235 REGULATOR_CHANGE_STATUS,
236 .always_on = 1,
237 .boot_on = 1,
238 },
239 },
240 },
241 .reg_initvals = {
242 LDO_A_SETTING,
243 LDO_C_SETTING,
244 LDO_E_SETTING,
245 LDO_E_SLEEP_SETTING,
246 LDO_F_SETTING,
247 LDO_G_SETTING,
248 LDO_H_SETTING,
249 LDO_K_SETTING,
250 LDO_EXT_SETTING,
251 BUCK_SETTING,
252 BUCK_SLEEP_SETTING,
253 LDO_D_SETTING,
254 },
255};
256
14static struct i2c_board_info __initdata bus0_i2c_board_info[] = { 257static struct i2c_board_info __initdata bus0_i2c_board_info[] = {
15 { 258 {
16 .type = "ab3100", 259 .type = "ab3100",
17 .addr = 0x48, 260 .addr = 0x48,
18 .irq = IRQ_U300_IRQ0_EXT, 261 .irq = IRQ_U300_IRQ0_EXT,
262 .platform_data = &ab3100_plf_data,
19 }, 263 },
20}; 264};
21 265
@@ -38,6 +282,11 @@ void __init u300_i2c_register_board_devices(void)
38{ 282{
39 i2c_register_board_info(0, bus0_i2c_board_info, 283 i2c_register_board_info(0, bus0_i2c_board_info,
40 ARRAY_SIZE(bus0_i2c_board_info)); 284 ARRAY_SIZE(bus0_i2c_board_info));
285 /*
286 * This makes the core shut down all unused regulators
287 * after all the initcalls have completed.
288 */
289 regulator_has_full_constraints();
41 i2c_register_board_info(1, bus1_i2c_board_info, 290 i2c_register_board_info(1, bus1_i2c_board_info,
42 ARRAY_SIZE(bus1_i2c_board_info)); 291 ARRAY_SIZE(bus1_i2c_board_info));
43} 292}
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 7b6b016786bb..109f5a6e71c7 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -40,64 +40,6 @@ static unsigned int mmc_status(struct device *dev)
40 return mmci_card->mmc_inserted; 40 return mmci_card->mmc_inserted;
41} 41}
42 42
43/*
44 * Here follows a large chunk of code which will only be enabled if you
45 * have both the AB3100 chip mounted and the MMC subsystem activated.
46 */
47
48static u32 mmc_translate_vdd(struct device *dev, unsigned int voltage)
49{
50 int v;
51
52 /*
53 * MMC Spec:
54 * bit 7: 1.70 - 1.95V
55 * bit 8 - 14: 2.0 - 2.6V
56 * bit 15 - 23: 2.7 - 3.6V
57 *
58 * ab3100 voltages:
59 * 000 - 2.85V
60 * 001 - 2.75V
61 * 010 - 1.8V
62 * 011 - 1.5V
63 */
64 switch (voltage) {
65 case 8:
66 v = 3;
67 break;
68 case 9:
69 case 10:
70 case 11:
71 case 12:
72 case 13:
73 case 14:
74 case 15:
75 v = 1;
76 break;
77 case 16:
78 v = 1;
79 break;
80 case 17:
81 case 18:
82 case 19:
83 case 20:
84 case 21:
85 case 22:
86 case 23:
87 case 24:
88 v = 0;
89 break;
90 default:
91 v = 0;
92 break;
93 }
94
95 /* PL180 voltage register bits */
96 return v << 2;
97}
98
99
100
101static int mmci_callback(void *data) 43static int mmci_callback(void *data)
102{ 44{
103 struct mmci_card_event *mmci_card = data; 45 struct mmci_card_event *mmci_card = data;
@@ -154,9 +96,11 @@ int __devinit mmc_init(struct amba_device *adev)
154 if (!mmci_card) 96 if (!mmci_card)
155 return -ENOMEM; 97 return -ENOMEM;
156 98
99 /*
100 * Do not set ocr_mask or voltage translation function,
101 * we have a regulator we can control instead.
102 */
157 /* Nominally 2.85V on our platform */ 103 /* Nominally 2.85V on our platform */
158 mmci_card->mmc0_plat_data.ocr_mask = MMC_VDD_28_29;
159 mmci_card->mmc0_plat_data.translate_vdd = mmc_translate_vdd;
160 mmci_card->mmc0_plat_data.status = mmc_status; 104 mmci_card->mmc0_plat_data.status = mmc_status;
161 mmci_card->mmc0_plat_data.gpio_wp = -1; 105 mmci_card->mmc0_plat_data.gpio_wp = -1;
162 mmci_card->mmc0_plat_data.gpio_cd = -1; 106 mmci_card->mmc0_plat_data.gpio_cd = -1;
diff --git a/arch/arm/mach-u300/regulator.c b/arch/arm/mach-u300/regulator.c
new file mode 100644
index 000000000000..9c53f01c62eb
--- /dev/null
+++ b/arch/arm/mach-u300/regulator.c
@@ -0,0 +1,88 @@
1/*
2 * arch/arm/mach-u300/regulator.c
3 *
4 * Copyright (C) 2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 * Handle board-bound regulators and board power not related
7 * to any devices.
8 * Author: Linus Walleij <linus.walleij@stericsson.com>
9 */
10#include <linux/device.h>
11#include <linux/signal.h>
12#include <linux/err.h>
13#include <linux/regulator/consumer.h>
14/* Those are just for writing in syscon */
15#include <linux/io.h>
16#include <mach/hardware.h>
17#include <mach/syscon.h>
18
19/*
20 * Regulators that power the board and chip and which are
21 * not copuled to specific drivers are hogged in these
22 * instances.
23 */
24static struct regulator *main_power_15;
25
26/*
27 * This function is used from pm.h to shut down the system by
28 * resetting all regulators in turn and then disable regulator
29 * LDO D (main power).
30 */
31void u300_pm_poweroff(void)
32{
33 sigset_t old, all;
34
35 sigfillset(&all);
36 if (!sigprocmask(SIG_BLOCK, &all, &old)) {
37 /* Disable LDO D to shut down the system */
38 if (main_power_15)
39 regulator_disable(main_power_15);
40 else
41 pr_err("regulator not available to shut down system\n");
42 (void) sigprocmask(SIG_SETMASK, &old, NULL);
43 }
44 return;
45}
46
47/*
48 * Hog the regulators needed to power up the board.
49 */
50static int __init u300_init_boardpower(void)
51{
52 int err;
53 u32 val;
54
55 pr_info("U300: setting up board power\n");
56 main_power_15 = regulator_get(NULL, "vana15");
57 if (IS_ERR(main_power_15)) {
58 pr_err("could not get vana15");
59 return PTR_ERR(main_power_15);
60 }
61 err = regulator_enable(main_power_15);
62 if (err) {
63 pr_err("could not enable vana15\n");
64 return err;
65 }
66
67 /*
68 * On U300 a special system controller register pulls up the DC
69 * until the vana15 (LDO D) regulator comes up. At this point, all
70 * regulators are set and we do not need power control via
71 * DC ON anymore. This function will likely be moved whenever
72 * the rest of the U300 power management is implemented.
73 */
74 pr_info("U300: disable system controller pull-up\n");
75 val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMCR);
76 val &= ~U300_SYSCON_PMCR_DCON_ENABLE;
77 writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMCR);
78
79 /* Register globally exported PM poweroff hook */
80 pm_power_off = u300_pm_poweroff;
81
82 return 0;
83}
84
85/*
86 * So at module init time we hog the regulator!
87 */
88module_init(u300_init_boardpower);
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
new file mode 100644
index 000000000000..03625d744857
--- /dev/null
+++ b/arch/arm/mach-ux500/Kconfig
@@ -0,0 +1,15 @@
1menu "ST-Ericsson platform type"
2 depends on ARCH_U8500
3
4comment "ST-Ericsson Multicore Mobile Platforms"
5
6config MACH_U8500_MOP
7 bool "U8500 Early Development platform"
8 default y
9 select ARM_GIC
10 select HAS_MTU
11 help
12 Include support for mop500 development platform
13 based on U8500 architecture. The platform is based
14 on early drop silicon version of 8500.
15endmenu
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
new file mode 100644
index 000000000000..95e6e24c0042
--- /dev/null
+++ b/arch/arm/mach-ux500/Makefile
@@ -0,0 +1,8 @@
1#
2# Makefile for the linux kernel, U8500 machine.
3#
4
5obj-y := clock.o
6obj-$(CONFIG_ARCH_U8500) += cpu-u8500.o
7obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o
8obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot
new file mode 100644
index 000000000000..c7e75acfe6c9
--- /dev/null
+++ b/arch/arm/mach-ux500/Makefile.boot
@@ -0,0 +1,4 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
4
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
new file mode 100644
index 000000000000..aa5afbcc90f9
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -0,0 +1,158 @@
1/*
2 * Copyright (C) 2008-2009 ST-Ericsson
3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/amba/bus.h>
17#include <linux/amba/pl022.h>
18#include <linux/spi/spi.h>
19
20#include <asm/localtimer.h>
21#include <asm/mach-types.h>
22#include <asm/mach/arch.h>
23
24#include <plat/mtu.h>
25
26#include <mach/hardware.h>
27#include <mach/setup.h>
28
29#define __MEM_4K_RESOURCE(x) \
30 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
31
32/* These are active devices on this board */
33static struct amba_device uart0_device = {
34 .dev = { .init_name = "uart0" },
35 __MEM_4K_RESOURCE(U8500_UART0_BASE),
36 .irq = {IRQ_UART0, NO_IRQ},
37};
38
39static struct amba_device uart1_device = {
40 .dev = { .init_name = "uart1" },
41 __MEM_4K_RESOURCE(U8500_UART1_BASE),
42 .irq = {IRQ_UART1, NO_IRQ},
43};
44
45static struct amba_device uart2_device = {
46 .dev = { .init_name = "uart2" },
47 __MEM_4K_RESOURCE(U8500_UART2_BASE),
48 .irq = {IRQ_UART2, NO_IRQ},
49};
50
51static void ab4500_spi_cs_control(u32 command)
52{
53 /* set the FRM signal, which is CS - TODO */
54}
55
56struct pl022_config_chip ab4500_chip_info = {
57 .lbm = LOOPBACK_DISABLED,
58 .com_mode = INTERRUPT_TRANSFER,
59 .iface = SSP_INTERFACE_MOTOROLA_SPI,
60 /* we can act as master only */
61 .hierarchy = SSP_MASTER,
62 .slave_tx_disable = 0,
63 .endian_rx = SSP_RX_MSB,
64 .endian_tx = SSP_TX_MSB,
65 .data_size = SSP_DATA_BITS_24,
66 .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
67 .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
68 .clk_phase = SSP_CLK_SECOND_EDGE,
69 .clk_pol = SSP_CLK_POL_IDLE_HIGH,
70 .cs_control = ab4500_spi_cs_control,
71};
72
73static struct spi_board_info u8500_spi_devices[] = {
74 {
75 .modalias = "ab4500",
76 .controller_data = &ab4500_chip_info,
77 .max_speed_hz = 12000000,
78 .bus_num = 0,
79 .chip_select = 0,
80 .mode = SPI_MODE_0,
81 .irq = IRQ_AB4500,
82 },
83};
84
85static struct pl022_ssp_controller ssp0_platform_data = {
86 .bus_id = 0,
87 /* pl022 not yet supports dma */
88 .enable_dma = 0,
89 /* on this platform, gpio 31,142,144,214 &
90 * 224 are connected as chip selects
91 */
92 .num_chipselect = 5,
93};
94
95static struct amba_device pl022_device = {
96 .dev = {
97 .coherent_dma_mask = ~0,
98 .init_name = "pl022",
99 .platform_data = &ssp0_platform_data,
100 },
101 .res = {
102 .start = U8500_SSP0_BASE,
103 .end = U8500_SSP0_BASE + SZ_4K - 1,
104 .flags = IORESOURCE_MEM,
105 },
106 .irq = {IRQ_SSP0, NO_IRQ },
107 /* ST-Ericsson modified id */
108 .periphid = SSP_PER_ID,
109};
110
111static struct amba_device *amba_devs[] __initdata = {
112 &uart0_device,
113 &uart1_device,
114 &uart2_device,
115 &pl022_device,
116};
117
118static void __init u8500_timer_init(void)
119{
120#ifdef CONFIG_LOCAL_TIMERS
121 /* Setup the local timer base */
122 twd_base = __io_address(U8500_TWD_BASE);
123#endif
124 /* Setup the MTU base */
125 mtu_base = __io_address(U8500_MTU0_BASE);
126
127 nmdk_timer_init();
128}
129
130static struct sys_timer u8500_timer = {
131 .init = u8500_timer_init,
132};
133
134static void __init u8500_init_machine(void)
135{
136 int i;
137
138 /* Register the active AMBA devices on this board */
139 for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
140 amba_device_register(amba_devs[i], &iomem_resource);
141
142 spi_register_board_info(u8500_spi_devices,
143 ARRAY_SIZE(u8500_spi_devices));
144
145 u8500_init_devices();
146}
147
148MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
149 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
150 .phys_io = U8500_UART2_BASE,
151 .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc,
152 .boot_params = 0x100,
153 .map_io = u8500_map_io,
154 .init_irq = u8500_init_irq,
155 /* we re-use nomadik timer here */
156 .timer = &u8500_timer,
157 .init_machine = u8500_init_machine,
158MACHINE_END
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
new file mode 100644
index 000000000000..20b6ebb6783a
--- /dev/null
+++ b/arch/arm/mach-ux500/clock.c
@@ -0,0 +1,95 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 * heavily based on realview platform
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/list.h>
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/mutex.h>
16
17#include <asm/clkdev.h>
18
19/* currently the clk structure
20 * just supports rate. This would
21 * be extended as and when new devices are
22 * added - TODO
23 */
24struct clk {
25 unsigned long rate;
26};
27
28int clk_enable(struct clk *clk)
29{
30 return 0;
31}
32EXPORT_SYMBOL(clk_enable);
33
34void clk_disable(struct clk *clk)
35{
36}
37EXPORT_SYMBOL(clk_disable);
38
39unsigned long clk_get_rate(struct clk *clk)
40{
41 return clk->rate;
42}
43EXPORT_SYMBOL(clk_get_rate);
44
45long clk_round_rate(struct clk *clk, unsigned long rate)
46{
47 /*TODO*/
48 return rate;
49}
50EXPORT_SYMBOL(clk_round_rate);
51
52int clk_set_rate(struct clk *clk, unsigned long rate)
53{
54 clk->rate = rate;
55 return 0;
56}
57EXPORT_SYMBOL(clk_set_rate);
58
59/* ssp clock */
60static struct clk ssp_clk = {
61 .rate = 48000000,
62};
63
64/* fixed clock */
65static struct clk f38_clk = {
66 .rate = 38400000,
67};
68
69static struct clk_lookup lookups[] = {
70 {
71 /* UART0 */
72 .dev_id = "uart0",
73 .clk = &f38_clk,
74 }, { /* UART1 */
75 .dev_id = "uart1",
76 .clk = &f38_clk,
77 }, { /* UART2 */
78 .dev_id = "uart2",
79 .clk = &f38_clk,
80 }, { /* SSP */
81 .dev_id = "pl022",
82 .clk = &ssp_clk,
83 }
84};
85
86static int __init clk_init(void)
87{
88 int i;
89
90 /* register the clock lookups */
91 for (i = 0; i < ARRAY_SIZE(lookups); i++)
92 clkdev_add(&lookups[i]);
93 return 0;
94}
95arch_initcall(clk_init);
diff --git a/arch/arm/mach-ux500/cpu-u8500.c b/arch/arm/mach-ux500/cpu-u8500.c
new file mode 100644
index 000000000000..5f05e5850f71
--- /dev/null
+++ b/arch/arm/mach-ux500/cpu-u8500.c
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 2008-2009 ST-Ericsson
3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/amba/bus.h>
15#include <linux/irq.h>
16#include <linux/platform_device.h>
17
18#include <asm/hardware/gic.h>
19#include <asm/mach/map.h>
20#include <mach/hardware.h>
21
22/* add any platform devices here - TODO */
23static struct platform_device *platform_devs[] __initdata = {
24 /* yet to be added, add i2c0, gpio.. */
25};
26
27#define __IO_DEV_DESC(x, sz) { \
28 .virtual = IO_ADDRESS(x), \
29 .pfn = __phys_to_pfn(x), \
30 .length = sz, \
31 .type = MT_DEVICE, \
32}
33
34/* minimum static i/o mapping required to boot U8500 platforms */
35static struct map_desc u8500_io_desc[] __initdata = {
36 __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
37 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
38 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
39 __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
40 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
41 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
42};
43
44void __init u8500_map_io(void)
45{
46 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
47}
48
49void __init u8500_init_irq(void)
50{
51 gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29);
52 gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE));
53}
54
55/*
56 * This function is called from the board init
57 */
58void __init u8500_init_devices(void)
59{
60 /* Register the platform devices */
61 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
62
63 return ;
64}
diff --git a/arch/arm/mach-ux500/headsmp.S b/arch/arm/mach-ux500/headsmp.S
new file mode 100644
index 000000000000..a6be2cdf2b2f
--- /dev/null
+++ b/arch/arm/mach-ux500/headsmp.S
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2009 ST-Ericsson
3 * This file is based ARM Realview platform
4 * Copyright (c) 2003 ARM Limited
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13
14 __INIT
15
16/*
17 * U8500 specific entry point for secondary CPUs.
18 */
19ENTRY(u8500_secondary_startup)
20 mrc p15, 0, r0, c0, c0, 5
21 and r0, r0, #15
22 adr r4, 1f
23 ldmia r4, {r5, r6}
24 sub r4, r4, r5
25 add r6, r6, r4
26 dsb
27pen: ldr r7, [r6]
28 cmp r7, r0
29 bne pen
30
31 /*
32 * we've been released from the holding pen: secondary_stack
33 * should now contain the SVC stack for this core
34 */
35 b secondary_startup
36
371: .long .
38 .long pen_release
diff --git a/arch/arm/mach-ux500/include/mach/clkdev.h b/arch/arm/mach-ux500/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S
new file mode 100644
index 000000000000..8f21b6a95dce
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/debug-macro.S
@@ -0,0 +1,19 @@
1/*
2 * Debugging macro include header
3 *
4 * Copyright (C) 2009 ST-Ericsson
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11 .macro addruart,rx
12 mrc p15, 0, \rx, c1, c0
13 tst \rx, #1 @MMU enabled?
14 moveq \rx, #0x80000000 @MMU off, Physical address
15 movne \rx, #0xF0000000 @MMU on, Virtual address
16 orr \rx, \rx, #0x7000
17 .endm
18
19#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
new file mode 100644
index 000000000000..eece3301fef7
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -0,0 +1,89 @@
1/*
2 * Low-level IRQ helper macros for U8500 platforms
3 *
4 * Copyright (C) 2009 ST-Ericsson.
5 *
6 * This file is a copy of ARM Realview platform.
7 * -just satisfied checkpatch script.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13#include <mach/hardware.h>
14#include <asm/hardware/gic.h>
15
16 .macro disable_fiq
17 .endm
18
19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =IO_ADDRESS(U8500_GIC_CPU_BASE)
21 .endm
22
23 .macro arch_ret_to_user, tmp1, tmp2
24 .endm
25
26 /*
27 * The interrupt numbering scheme is defined in the
28 * interrupt controller spec. To wit:
29 *
30 * Interrupts 0-15 are IPI
31 * 16-28 are reserved
32 * 29-31 are local. We allow 30 to be used for the watchdog.
33 * 32-1020 are global
34 * 1021-1022 are reserved
35 * 1023 is "spurious" (no interrupt)
36 *
37 * For now, we ignore all local interrupts so only return an
38 * interrupt if it's between 30 and 1020. The test_for_ipi
39 * routine below will pick up on IPIs.
40 *
41 * A simple read from the controller will tell us the number
42 * of the highest priority enabled interrupt. We then just
43 * need to check whether it is in the valid range for an
44 * IRQ (30-1020 inclusive).
45 */
46
47 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
48
49 /* bits 12-10 = src CPU, 9-0 = int # */
50 ldr \irqstat, [\base, #GIC_CPU_INTACK]
51
52 ldr \tmp, =1021
53
54 bic \irqnr, \irqstat, #0x1c00
55
56 cmp \irqnr, #29
57 cmpcc \irqnr, \irqnr
58 cmpne \irqnr, \tmp
59 cmpcs \irqnr, \irqnr
60
61 .endm
62
63 /* We assume that irqstat (the raw value of the IRQ
64 * acknowledge register) is preserved from the macro above.
65 * If there is an IPI, we immediately signal end of
66 * interrupt on the controller, since this requires the
67 * original irqstat value which we won't easily be able
68 * to recreate later.
69 */
70
71 .macro test_for_ipi, irqnr, irqstat, base, tmp
72 bic \irqnr, \irqstat, #0x1c00
73 cmp \irqnr, #16
74 strcc \irqstat, [\base, #GIC_CPU_EOI]
75 cmpcs \irqnr, \irqnr
76 .endm
77
78 /* As above, this assumes that irqstat and base
79 * are preserved..
80 */
81
82 .macro test_for_ltirq, irqnr, irqstat, base, tmp
83 bic \irqnr, \irqstat, #0x1c00
84 mov \tmp, #0
85 cmp \irqnr, #29
86 moveq \tmp, #1
87 streq \irqstat, [\base, #GIC_CPU_EOI]
88 cmp \tmp, #0
89 .endm
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
new file mode 100644
index 000000000000..6da650202dc7
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -0,0 +1,131 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson.
3 *
4 * U8500 hardware definitions
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#ifndef __MACH_HARDWARE_H
11#define __MACH_HARDWARE_H
12
13/* macros to get at IO space when running virtually
14 * We dont map all the peripherals, let ioremap do
15 * this for us. We map only very basic peripherals here.
16 */
17#define U8500_IO_VIRTUAL 0xf0000000
18#define U8500_IO_PHYSICAL 0xa0000000
19
20/* this macro is used in assembly, so no cast */
21#define IO_ADDRESS(x) \
22 (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
23
24/* typesafe io address */
25#define __io_address(n) __io(IO_ADDRESS(n))
26
27/*
28 * Base address definitions for U8500 Onchip IPs. All the
29 * peripherals are contained in a single 1 Mbyte region, with
30 * AHB peripherals at the bottom and APB peripherals at the
31 * top of the region. PER stands for PERIPHERAL region which
32 * itself divided into sub regions.
33 */
34#define U8500_PER3_BASE 0x80000000
35#define U8500_PER2_BASE 0x80110000
36#define U8500_PER1_BASE 0x80120000
37#define U8500_PER4_BASE 0x80150000
38
39#define U8500_PER6_BASE 0xa03c0000
40#define U8500_PER5_BASE 0xa03e0000
41#define U8500_PER7_BASE 0xa03d0000
42
43#define U8500_SVA_BASE 0xa0100000
44#define U8500_SIA_BASE 0xa0200000
45
46#define U8500_SGA_BASE 0xa0300000
47#define U8500_MCDE_BASE 0xa0350000
48#define U8500_DMA_BASE 0xa0362000
49
50#define U8500_SCU_BASE 0xa0410000
51#define U8500_GIC_CPU_BASE 0xa0410100
52#define U8500_TWD_BASE 0xa0410600
53#define U8500_GIC_DIST_BASE 0xa0411000
54#define U8500_L2CC_BASE 0xa0412000
55
56#define U8500_TWD_SIZE 0x100
57
58/* per7 base addressess */
59#define U8500_CR_BASE (U8500_PER7_BASE + 0x8000)
60#define U8500_MTU0_BASE (U8500_PER7_BASE + 0xa000)
61#define U8500_MTU1_BASE (U8500_PER7_BASE + 0xb000)
62#define U8500_TZPC0_BASE (U8500_PER7_BASE + 0xc000)
63#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000)
64
65/* per6 base addressess */
66#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
67#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
68#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
69#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
70#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
71#define U8500_CLKRST6_BASE (U8500_PER7_BASE + 0xf000)
72
73/* per5 base addressess */
74#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
75#define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000)
76#define U8500_CLKRST5_BASE (U8500_PER7_BASE + 0x1f000)
77
78/* per4 base addressess */
79#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000)
80#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x1000)
81#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x2000)
82#define U8500_RTT1_BASE (U8500_PER4_BASE + 0x3000)
83#define U8500_RTC_BASE (U8500_PER4_BASE + 0x4000)
84#define U8500_SCR_BASE (U8500_PER4_BASE + 0x5000)
85#define U8500_DMC_BASE (U8500_PER4_BASE + 0x6000)
86#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x7000)
87
88/* per3 base addressess */
89#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
90#define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000)
91#define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000)
92#define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000)
93#define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000)
94#define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000)
95#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
96#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
97#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000)
98#define U8500_CLKRST3_BASE (U8500_PER7_BASE + 0xf000)
99
100/* per2 base addressess */
101#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
102#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
103#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
104#define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000)
105#define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000)
106#define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000)
107#define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000)
108#define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000)
109#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000)
110#define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000)
111#define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000)
112#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xe000)
113#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000)
114
115/* per1 base addresses */
116#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
117#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
118#define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000)
119#define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000)
120#define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000)
121#define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000)
122#define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000)
123#define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000)
124#define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000)
125#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000)
126#define U8500_CLKRST1_BASE (U8500_PER2_BASE + 0xf000)
127
128/* ST-Ericsson modified pl022 id */
129#define SSP_PER_ID 0x01080022
130
131#endif /* __MACH_HARDWARE_H */
diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h
new file mode 100644
index 000000000000..1cf3f44ce5b2
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/io.h
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/mach-u8500/include/mach/io.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * Modifications:
7 * 06-12-1997 RMK Created.
8 * 07-04-1999 RMK Major cleanup
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#define IO_SPACE_LIMIT 0xffffffff
14
15/*
16 * We don't actually have real ISA nor PCI buses, but there is so many
17 * drivers out there that might just work if we fake them...
18 */
19#define __io(a) __typesafe_io(a)
20#define __mem_pci(a) (a)
21
22#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
new file mode 100644
index 000000000000..394b5dd2200f
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -0,0 +1,71 @@
1/*
2 * Copyright (C) 2008 STMicroelectronics
3 * Copyright (C) 2009 ST-Ericsson.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10#ifndef ASM_ARCH_IRQS_H
11#define ASM_ARCH_IRQS_H
12
13#include <mach/hardware.h>
14
15#define IRQ_LOCALTIMER 29
16#define IRQ_LOCALWDOG 30
17
18/* Shared Peripheral Interrupt (SHPI) */
19#define IRQ_SHPI_START 32
20
21/* Interrupt numbers generic for shared peripheral */
22#define IRQ_MTU0 (IRQ_SHPI_START + 4)
23#define IRQ_SPI2 (IRQ_SHPI_START + 6)
24#define IRQ_SPI0 (IRQ_SHPI_START + 8)
25#define IRQ_UART0 (IRQ_SHPI_START + 11)
26#define IRQ_I2C3 (IRQ_SHPI_START + 12)
27#define IRQ_SSP0 (IRQ_SHPI_START + 14)
28#define IRQ_MTU1 (IRQ_SHPI_START + 17)
29#define IRQ_RTC_RTT (IRQ_SHPI_START + 18)
30#define IRQ_UART1 (IRQ_SHPI_START + 19)
31#define IRQ_I2C0 (IRQ_SHPI_START + 21)
32#define IRQ_I2C1 (IRQ_SHPI_START + 22)
33#define IRQ_USBOTG (IRQ_SHPI_START + 23)
34#define IRQ_DMA (IRQ_SHPI_START + 25)
35#define IRQ_UART2 (IRQ_SHPI_START + 26)
36#define IRQ_HSIR_EXCEP (IRQ_SHPI_START + 29)
37#define IRQ_MSP0 (IRQ_SHPI_START + 31)
38#define IRQ_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32)
39#define IRQ_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33)
40#define IRQ_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34)
41#define IRQ_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35)
42#define IRQ_AB4500 (IRQ_SHPI_START + 40)
43#define IRQ_DISP (IRQ_SHPI_START + 48)
44#define IRQ_SiPI3 (IRQ_SHPI_START + 49)
45#define IRQ_SSP1 (IRQ_SHPI_START + 52)
46#define IRQ_I2C2 (IRQ_SHPI_START + 55)
47#define IRQ_SDMMC0 (IRQ_SHPI_START + 60)
48#define IRQ_MSP1 (IRQ_SHPI_START + 62)
49#define IRQ_SPI1 (IRQ_SHPI_START + 96)
50#define IRQ_MSP2 (IRQ_SHPI_START + 98)
51#define IRQ_SDMMC4 (IRQ_SHPI_START + 99)
52#define IRQ_HSIRD0 (IRQ_SHPI_START + 104)
53#define IRQ_HSIRD1 (IRQ_SHPI_START + 105)
54#define IRQ_HSITD0 (IRQ_SHPI_START + 106)
55#define IRQ_HSITD1 (IRQ_SHPI_START + 107)
56#define IRQ_GPIO0 (IRQ_SHPI_START + 119)
57#define IRQ_GPIO1 (IRQ_SHPI_START + 120)
58#define IRQ_GPIO2 (IRQ_SHPI_START + 121)
59#define IRQ_GPIO3 (IRQ_SHPI_START + 122)
60#define IRQ_GPIO4 (IRQ_SHPI_START + 123)
61#define IRQ_GPIO5 (IRQ_SHPI_START + 124)
62#define IRQ_GPIO6 (IRQ_SHPI_START + 125)
63#define IRQ_GPIO7 (IRQ_SHPI_START + 126)
64#define IRQ_GPIO8 (IRQ_SHPI_START + 127)
65
66/* There are 128 shared peripheral interrupts assigned to
67 * INTID[160:32]. The first 32 interrupts are reserved.
68 */
69#define NR_IRQS 161
70
71#endif /*ASM_ARCH_IRQS_H*/
diff --git a/arch/arm/mach-ux500/include/mach/memory.h b/arch/arm/mach-ux500/include/mach/memory.h
new file mode 100644
index 000000000000..510571a59e25
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/memory.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9#ifndef __ASM_ARCH_MEMORY_H
10#define __ASM_ARCH_MEMORY_H
11
12/*
13 * Physical DRAM offset.
14 */
15#define PHYS_OFFSET UL(0x00000000)
16#define BUS_OFFSET UL(0x00000000)
17
18#endif
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
new file mode 100644
index 000000000000..cf0ce1687f24
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -0,0 +1,23 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * These symbols are needed for board-specific files to call their
9 * own cpu-specific files
10 */
11#ifndef __ASM_ARCH_SETUP_H
12#define __ASM_ARCH_SETUP_H
13
14#include <asm/mach/time.h>
15#include <linux/init.h>
16
17extern void u8500_map_io(void);
18extern void u8500_init_devices(void);
19extern void u8500_init_irq(void);
20/* We re-use nomadik_timer for this platform */
21extern void nmdk_timer_init(void);
22
23#endif /* __ASM_ARCH_SETUP_H */
diff --git a/arch/arm/mach-ux500/include/mach/smp.h b/arch/arm/mach-ux500/include/mach/smp.h
new file mode 100644
index 000000000000..b59f7bc9725d
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/smp.h
@@ -0,0 +1,32 @@
1/*
2 * This file is based ARM realview platform.
3 * Copyright (C) ARM Limited.
4 *
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 */
9#ifndef ASMARM_ARCH_SMP_H
10#define ASMARM_ARCH_SMP_H
11
12#include <asm/hardware/gic.h>
13
14/* This is required to wakeup the secondary core */
15extern void u8500_secondary_startup(void);
16
17#define hard_smp_processor_id() \
18 ({ \
19 unsigned int cpunum; \
20 __asm__("mrc p15, 0, %0, c0, c0, 5" \
21 : "=r" (cpunum)); \
22 cpunum &= 0x0F; \
23 })
24
25/*
26 * We use IRQ1 as the IPI
27 */
28static inline void smp_cross_call(const struct cpumask *mask)
29{
30 gic_raise_softirq(mask, 1);
31}
32#endif
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
new file mode 100644
index 000000000000..c0cd8006f1a2
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/system.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson.
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8#ifndef __ASM_ARCH_SYSTEM_H
9#define __ASM_ARCH_SYSTEM_H
10
11static inline void arch_idle(void)
12{
13 /*
14 * This should do all the clock switching
15 * and wait for interrupt tricks
16 */
17 cpu_do_idle();
18}
19
20static inline void arch_reset(char mode, const char *cmd)
21{
22 /* yet to be implemented - TODO */
23}
24
25#endif
diff --git a/arch/arm/mach-ux500/include/mach/timex.h b/arch/arm/mach-ux500/include/mach/timex.h
new file mode 100644
index 000000000000..d0942c174018
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/timex.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_ARCH_TIMEX_H
2#define __ASM_ARCH_TIMEX_H
3
4#define CLOCK_TICK_RATE 110000000
5
6#endif
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h
new file mode 100644
index 000000000000..8552eb188b50
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/uncompress.h
@@ -0,0 +1,58 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#ifndef __ASM_ARCH_UNCOMPRESS_H
19#define __ASM_ARCH_UNCOMPRESS_H
20
21#include <asm/setup.h>
22#include <linux/io.h>
23#include <mach/hardware.h>
24
25#define U8500_UART_DR 0x80007000
26#define U8500_UART_LCRH 0x8000702c
27#define U8500_UART_CR 0x80007030
28#define U8500_UART_FR 0x80007018
29
30static void putc(const char c)
31{
32 /* Do nothing if the UART is not enabled. */
33 if (!(readb(U8500_UART_CR) & 0x1))
34 return;
35
36 if (c == '\n')
37 putc('\r');
38
39 while (readb(U8500_UART_FR) & (1 << 5))
40 barrier();
41 writeb(c, U8500_UART_DR);
42}
43
44static void flush(void)
45{
46 if (!(readb(U8500_UART_CR) & 0x1))
47 return;
48 while (readb(U8500_UART_FR) & (1 << 3))
49 barrier();
50}
51
52static inline void arch_decomp_setup(void)
53{
54}
55
56#define arch_decomp_wdog() /* nothing to do here */
57
58#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h
new file mode 100644
index 000000000000..86cdbbce1842
--- /dev/null
+++ b/arch/arm/mach-ux500/include/mach/vmalloc.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright (C) 2009 ST-Ericsson
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#define VMALLOC_END 0xf0000000
diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c
new file mode 100644
index 000000000000..2288f6a7c518
--- /dev/null
+++ b/arch/arm/mach-ux500/localtimer.c
@@ -0,0 +1,28 @@
1/*
2 * Copyright (C) 2008-2009 ST-Ericsson
3 * Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
4 *
5 * This file is heavily based on relaview platform, almost a copy.
6 *
7 * Copyright (C) 2002 ARM Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/init.h>
14#include <linux/smp.h>
15#include <linux/clockchips.h>
16
17#include <asm/irq.h>
18#include <asm/smp_twd.h>
19#include <asm/localtimer.h>
20
21/*
22 * Setup the local clock events for a CPU.
23 */
24void __cpuinit local_timer_setup(struct clock_event_device *evt)
25{
26 evt->irq = IRQ_LOCALTIMER;
27 twd_timer_setup(evt);
28}
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
new file mode 100644
index 000000000000..8dfe7ca245d8
--- /dev/null
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -0,0 +1,177 @@
1/*
2 * Copyright (C) 2002 ARM Ltd.
3 * Copyright (C) 2008 STMicroelctronics.
4 * Copyright (C) 2009 ST-Ericsson.
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 *
7 * This file is based on arm realview platform
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/init.h>
14#include <linux/errno.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/smp.h>
18#include <linux/io.h>
19
20#include <asm/cacheflush.h>
21#include <asm/localtimer.h>
22#include <asm/smp_scu.h>
23#include <mach/hardware.h>
24
25/*
26 * control for which core is the next to come out of the secondary
27 * boot "holding pen"
28 */
29volatile int __cpuinitdata pen_release = -1;
30
31static unsigned int __init get_core_count(void)
32{
33 return scu_get_core_count(__io_address(U8500_SCU_BASE));
34}
35
36static DEFINE_SPINLOCK(boot_lock);
37
38void __cpuinit platform_secondary_init(unsigned int cpu)
39{
40 trace_hardirqs_off();
41
42 /*
43 * if any interrupts are already enabled for the primary
44 * core (e.g. timer irq), then they will not have been enabled
45 * for us: do so
46 */
47 gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE));
48
49 /*
50 * let the primary processor know we're out of the
51 * pen, then head off into the C entry point
52 */
53 pen_release = -1;
54
55 /*
56 * Synchronise with the boot thread.
57 */
58 spin_lock(&boot_lock);
59 spin_unlock(&boot_lock);
60}
61
62int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
63{
64 unsigned long timeout;
65
66 /*
67 * set synchronisation state between this boot processor
68 * and the secondary one
69 */
70 spin_lock(&boot_lock);
71
72 /*
73 * The secondary processor is waiting to be released from
74 * the holding pen - release it, then wait for it to flag
75 * that it has been released by resetting pen_release.
76 */
77 pen_release = cpu;
78 flush_cache_all();
79
80 timeout = jiffies + (1 * HZ);
81 while (time_before(jiffies, timeout)) {
82 if (pen_release == -1)
83 break;
84 }
85
86 /*
87 * now the secondary core is starting up let it run its
88 * calibrations, then wait for it to finish
89 */
90 spin_unlock(&boot_lock);
91
92 return pen_release != -1 ? -ENOSYS : 0;
93}
94
95static void __init wakeup_secondary(void)
96{
97 /* nobody is to be released from the pen yet */
98 pen_release = -1;
99
100 /*
101 * write the address of secondary startup into the backup ram register
102 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the
103 * backup ram register at offset 0x1FF0, which is what boot rom code
104 * is waiting for. This would wake up the secondary core from WFE
105 */
106#define U8500_CPU1_JUMPADDR_OFFSET 0x1FF4
107 __raw_writel(virt_to_phys(u8500_secondary_startup),
108 (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) +
109 U8500_CPU1_JUMPADDR_OFFSET);
110
111#define U8500_CPU1_WAKEMAGIC_OFFSET 0x1FF0
112 __raw_writel(0xA1FEED01,
113 (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) +
114 U8500_CPU1_WAKEMAGIC_OFFSET);
115
116 /* make sure write buffer is drained */
117 mb();
118}
119
120/*
121 * Initialise the CPU possible map early - this describes the CPUs
122 * which may be present or become present in the system.
123 */
124void __init smp_init_cpus(void)
125{
126 unsigned int i, ncores = get_core_count();
127
128 for (i = 0; i < ncores; i++)
129 set_cpu_possible(i, true);
130}
131
132void __init smp_prepare_cpus(unsigned int max_cpus)
133{
134 unsigned int ncores = get_core_count();
135 unsigned int cpu = smp_processor_id();
136 int i;
137
138 /* sanity check */
139 if (ncores == 0) {
140 printk(KERN_ERR
141 "U8500: strange CM count of 0? Default to 1\n");
142 ncores = 1;
143 }
144
145 if (ncores > num_possible_cpus()) {
146 printk(KERN_WARNING
147 "U8500: no. of cores (%d) greater than configured "
148 "maximum of %d - clipping\n",
149 ncores, num_possible_cpus());
150 ncores = num_possible_cpus();
151 }
152
153 smp_store_cpu_info(cpu);
154
155 /*
156 * are we trying to boot more cores than exist?
157 */
158 if (max_cpus > ncores)
159 max_cpus = ncores;
160
161 /*
162 * Initialise the present map, which describes the set of CPUs
163 * actually populated at the present time.
164 */
165 for (i = 0; i < max_cpus; i++)
166 set_cpu_present(i, true);
167
168 if (max_cpus > 1) {
169 /*
170 * Enable the local timer or broadcast device for the
171 * boot CPU, but only if we have more than one CPU.
172 */
173 percpu_timer_setup();
174 scu_enable(__io_address(U8500_SCU_BASE));
175 wakeup_secondary();
176 }
177}
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9264d814cd7a..7b7d4c36c11c 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -774,5 +774,5 @@ config CACHE_XSC3L2
774 774
775config ARM_L1_CACHE_SHIFT 775config ARM_L1_CACHE_SHIFT
776 int 776 int
777 default 6 if ARCH_OMAP3 777 default 6 if ARCH_OMAP3 || ARCH_S5PC1XX
778 default 5 778 default 5
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 055cb2aa8134..42352e75742b 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -6,7 +6,7 @@ obj-y := dma-mapping.o extable.o fault.o init.o \
6 iomap.o 6 iomap.o
7 7
8obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ 8obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \
9 pgd.o mmu.o 9 pgd.o mmu.o vmregion.o
10 10
11ifneq ($(CONFIG_MMU),y) 11ifneq ($(CONFIG_MMU),y)
12obj-y += nommu.o 12obj-y += nommu.o
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b480f1d3591f..747f9a9021bb 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -99,18 +99,25 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
99 99
100 l2x0_base = base; 100 l2x0_base = base;
101 101
102 /* disable L2X0 */ 102 /*
103 writel(0, l2x0_base + L2X0_CTRL); 103 * Check if l2x0 controller is already enabled.
104 * If you are booting from non-secure mode
105 * accessing the below registers will fault.
106 */
107 if (!(readl(l2x0_base + L2X0_CTRL) & 1)) {
104 108
105 aux = readl(l2x0_base + L2X0_AUX_CTRL); 109 /* l2x0 controller is disabled */
106 aux &= aux_mask;
107 aux |= aux_val;
108 writel(aux, l2x0_base + L2X0_AUX_CTRL);
109 110
110 l2x0_inv_all(); 111 aux = readl(l2x0_base + L2X0_AUX_CTRL);
112 aux &= aux_mask;
113 aux |= aux_val;
114 writel(aux, l2x0_base + L2X0_AUX_CTRL);
111 115
112 /* enable L2X0 */ 116 l2x0_inv_all();
113 writel(1, l2x0_base + L2X0_CTRL); 117
118 /* enable L2X0 */
119 writel(1, l2x0_base + L2X0_CTRL);
120 }
114 121
115 outer_cache.inv_range = l2x0_inv_range; 122 outer_cache.inv_range = l2x0_inv_range;
116 outer_cache.clean_range = l2x0_clean_range; 123 outer_cache.clean_range = l2x0_clean_range;
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 4127a7bddfe5..841f355319bf 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -41,6 +41,14 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to,
41 kfrom = kmap_atomic(from, KM_USER0); 41 kfrom = kmap_atomic(from, KM_USER0);
42 kto = kmap_atomic(to, KM_USER1); 42 kto = kmap_atomic(to, KM_USER1);
43 copy_page(kto, kfrom); 43 copy_page(kto, kfrom);
44#ifdef CONFIG_HIGHMEM
45 /*
46 * kmap_atomic() doesn't set the page virtual address, and
47 * kunmap_atomic() takes care of cache flushing already.
48 */
49 if (page_address(to) != NULL)
50#endif
51 __cpuc_flush_dcache_page(kto);
44 kunmap_atomic(kto, KM_USER1); 52 kunmap_atomic(kto, KM_USER1);
45 kunmap_atomic(kfrom, KM_USER0); 53 kunmap_atomic(kfrom, KM_USER0);
46} 54}
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index b9590a7085ca..26325cb5d368 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -63,194 +63,152 @@ static u64 get_coherent_dma_mask(struct device *dev)
63 return mask; 63 return mask;
64} 64}
65 65
66#ifdef CONFIG_MMU
67/* 66/*
68 * These are the page tables (2MB each) covering uncached, DMA consistent allocations 67 * Allocate a DMA buffer for 'dev' of size 'size' using the
68 * specified gfp mask. Note that 'size' must be page aligned.
69 */ 69 */
70static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; 70static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
71static DEFINE_SPINLOCK(consistent_lock); 71{
72 unsigned long order = get_order(size);
73 struct page *page, *p, *e;
74 void *ptr;
75 u64 mask = get_coherent_dma_mask(dev);
72 76
73/* 77#ifdef CONFIG_DMA_API_DEBUG
74 * VM region handling support. 78 u64 limit = (mask + 1) & ~mask;
75 * 79 if (limit && size >= limit) {
76 * This should become something generic, handling VM region allocations for 80 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
77 * vmalloc and similar (ioremap, module space, etc). 81 size, mask);
78 * 82 return NULL;
79 * I envisage vmalloc()'s supporting vm_struct becoming: 83 }
80 * 84#endif
81 * struct vm_struct {
82 * struct vm_region region;
83 * unsigned long flags;
84 * struct page **pages;
85 * unsigned int nr_pages;
86 * unsigned long phys_addr;
87 * };
88 *
89 * get_vm_area() would then call vm_region_alloc with an appropriate
90 * struct vm_region head (eg):
91 *
92 * struct vm_region vmalloc_head = {
93 * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
94 * .vm_start = VMALLOC_START,
95 * .vm_end = VMALLOC_END,
96 * };
97 *
98 * However, vmalloc_head.vm_start is variable (typically, it is dependent on
99 * the amount of RAM found at boot time.) I would imagine that get_vm_area()
100 * would have to initialise this each time prior to calling vm_region_alloc().
101 */
102struct arm_vm_region {
103 struct list_head vm_list;
104 unsigned long vm_start;
105 unsigned long vm_end;
106 struct page *vm_pages;
107 int vm_active;
108};
109 85
110static struct arm_vm_region consistent_head = { 86 if (!mask)
111 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), 87 return NULL;
112 .vm_start = CONSISTENT_BASE,
113 .vm_end = CONSISTENT_END,
114};
115 88
116static struct arm_vm_region * 89 if (mask < 0xffffffffULL)
117arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp) 90 gfp |= GFP_DMA;
118{ 91
119 unsigned long addr = head->vm_start, end = head->vm_end - size; 92 page = alloc_pages(gfp, order);
120 unsigned long flags; 93 if (!page)
121 struct arm_vm_region *c, *new; 94 return NULL;
122
123 new = kmalloc(sizeof(struct arm_vm_region), gfp);
124 if (!new)
125 goto out;
126
127 spin_lock_irqsave(&consistent_lock, flags);
128
129 list_for_each_entry(c, &head->vm_list, vm_list) {
130 if ((addr + size) < addr)
131 goto nospc;
132 if ((addr + size) <= c->vm_start)
133 goto found;
134 addr = c->vm_end;
135 if (addr > end)
136 goto nospc;
137 }
138 95
139 found:
140 /* 96 /*
141 * Insert this entry _before_ the one we found. 97 * Now split the huge page and free the excess pages
142 */ 98 */
143 list_add_tail(&new->vm_list, &c->vm_list); 99 split_page(page, order);
144 new->vm_start = addr; 100 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
145 new->vm_end = addr + size; 101 __free_page(p);
146 new->vm_active = 1; 102
147 103 /*
148 spin_unlock_irqrestore(&consistent_lock, flags); 104 * Ensure that the allocated pages are zeroed, and that any data
149 return new; 105 * lurking in the kernel direct-mapped region is invalidated.
150 106 */
151 nospc: 107 ptr = page_address(page);
152 spin_unlock_irqrestore(&consistent_lock, flags); 108 memset(ptr, 0, size);
153 kfree(new); 109 dmac_flush_range(ptr, ptr + size);
154 out: 110 outer_flush_range(__pa(ptr), __pa(ptr) + size);
155 return NULL; 111
112 return page;
156} 113}
157 114
158static struct arm_vm_region *arm_vm_region_find(struct arm_vm_region *head, unsigned long addr) 115/*
116 * Free a DMA buffer. 'size' must be page aligned.
117 */
118static void __dma_free_buffer(struct page *page, size_t size)
159{ 119{
160 struct arm_vm_region *c; 120 struct page *e = page + (size >> PAGE_SHIFT);
161 121
162 list_for_each_entry(c, &head->vm_list, vm_list) { 122 while (page < e) {
163 if (c->vm_active && c->vm_start == addr) 123 __free_page(page);
164 goto out; 124 page++;
165 } 125 }
166 c = NULL;
167 out:
168 return c;
169} 126}
170 127
128#ifdef CONFIG_MMU
129/*
130 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
131 */
132static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
133
134#include "vmregion.h"
135
136static struct arm_vmregion_head consistent_head = {
137 .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
138 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
139 .vm_start = CONSISTENT_BASE,
140 .vm_end = CONSISTENT_END,
141};
142
171#ifdef CONFIG_HUGETLB_PAGE 143#ifdef CONFIG_HUGETLB_PAGE
172#error ARM Coherent DMA allocator does not (yet) support huge TLB 144#error ARM Coherent DMA allocator does not (yet) support huge TLB
173#endif 145#endif
174 146
175static void * 147/*
176__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, 148 * Initialise the consistent memory allocation.
177 pgprot_t prot) 149 */
150static int __init consistent_init(void)
178{ 151{
179 struct page *page; 152 int ret = 0;
180 struct arm_vm_region *c; 153 pgd_t *pgd;
181 unsigned long order; 154 pmd_t *pmd;
182 u64 mask = get_coherent_dma_mask(dev); 155 pte_t *pte;
183 u64 limit; 156 int i = 0;
157 u32 base = CONSISTENT_BASE;
184 158
185 if (!consistent_pte[0]) { 159 do {
186 printk(KERN_ERR "%s: not initialised\n", __func__); 160 pgd = pgd_offset(&init_mm, base);
187 dump_stack(); 161 pmd = pmd_alloc(&init_mm, pgd, base);
188 return NULL; 162 if (!pmd) {
189 } 163 printk(KERN_ERR "%s: no pmd tables\n", __func__);
164 ret = -ENOMEM;
165 break;
166 }
167 WARN_ON(!pmd_none(*pmd));
190 168
191 if (!mask) 169 pte = pte_alloc_kernel(pmd, base);
192 goto no_page; 170 if (!pte) {
171 printk(KERN_ERR "%s: no pte tables\n", __func__);
172 ret = -ENOMEM;
173 break;
174 }
193 175
194 /* 176 consistent_pte[i++] = pte;
195 * Sanity check the allocation size. 177 base += (1 << PGDIR_SHIFT);
196 */ 178 } while (base < CONSISTENT_END);
197 size = PAGE_ALIGN(size);
198 limit = (mask + 1) & ~mask;
199 if ((limit && size >= limit) ||
200 size >= (CONSISTENT_END - CONSISTENT_BASE)) {
201 printk(KERN_WARNING "coherent allocation too big "
202 "(requested %#x mask %#llx)\n", size, mask);
203 goto no_page;
204 }
205 179
206 order = get_order(size); 180 return ret;
181}
207 182
208 if (mask < 0xffffffffULL) 183core_initcall(consistent_init);
209 gfp |= GFP_DMA;
210 184
211 page = alloc_pages(gfp, order); 185static void *
212 if (!page) 186__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
213 goto no_page; 187{
188 struct arm_vmregion *c;
214 189
215 /* 190 if (!consistent_pte[0]) {
216 * Invalidate any data that might be lurking in the 191 printk(KERN_ERR "%s: not initialised\n", __func__);
217 * kernel direct-mapped region for device DMA. 192 dump_stack();
218 */ 193 return NULL;
219 {
220 void *ptr = page_address(page);
221 memset(ptr, 0, size);
222 dmac_flush_range(ptr, ptr + size);
223 outer_flush_range(__pa(ptr), __pa(ptr) + size);
224 } 194 }
225 195
226 /* 196 /*
227 * Allocate a virtual address in the consistent mapping region. 197 * Allocate a virtual address in the consistent mapping region.
228 */ 198 */
229 c = arm_vm_region_alloc(&consistent_head, size, 199 c = arm_vmregion_alloc(&consistent_head, size,
230 gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); 200 gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
231 if (c) { 201 if (c) {
232 pte_t *pte; 202 pte_t *pte;
233 struct page *end = page + (1 << order);
234 int idx = CONSISTENT_PTE_INDEX(c->vm_start); 203 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
235 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); 204 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
236 205
237 pte = consistent_pte[idx] + off; 206 pte = consistent_pte[idx] + off;
238 c->vm_pages = page; 207 c->vm_pages = page;
239 208
240 split_page(page, order);
241
242 /*
243 * Set the "dma handle"
244 */
245 *handle = page_to_dma(dev, page);
246
247 do { 209 do {
248 BUG_ON(!pte_none(*pte)); 210 BUG_ON(!pte_none(*pte));
249 211
250 /*
251 * x86 does not mark the pages reserved...
252 */
253 SetPageReserved(page);
254 set_pte_ext(pte, mk_pte(page, prot), 0); 212 set_pte_ext(pte, mk_pte(page, prot), 0);
255 page++; 213 page++;
256 pte++; 214 pte++;
@@ -261,48 +219,90 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
261 } 219 }
262 } while (size -= PAGE_SIZE); 220 } while (size -= PAGE_SIZE);
263 221
264 /*
265 * Free the otherwise unused pages.
266 */
267 while (page < end) {
268 __free_page(page);
269 page++;
270 }
271
272 return (void *)c->vm_start; 222 return (void *)c->vm_start;
273 } 223 }
274
275 if (page)
276 __free_pages(page, order);
277 no_page:
278 *handle = ~0;
279 return NULL; 224 return NULL;
280} 225}
226
227static void __dma_free_remap(void *cpu_addr, size_t size)
228{
229 struct arm_vmregion *c;
230 unsigned long addr;
231 pte_t *ptep;
232 int idx;
233 u32 off;
234
235 c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
236 if (!c) {
237 printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
238 __func__, cpu_addr);
239 dump_stack();
240 return;
241 }
242
243 if ((c->vm_end - c->vm_start) != size) {
244 printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
245 __func__, c->vm_end - c->vm_start, size);
246 dump_stack();
247 size = c->vm_end - c->vm_start;
248 }
249
250 idx = CONSISTENT_PTE_INDEX(c->vm_start);
251 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
252 ptep = consistent_pte[idx] + off;
253 addr = c->vm_start;
254 do {
255 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
256
257 ptep++;
258 addr += PAGE_SIZE;
259 off++;
260 if (off >= PTRS_PER_PTE) {
261 off = 0;
262 ptep = consistent_pte[++idx];
263 }
264
265 if (pte_none(pte) || !pte_present(pte))
266 printk(KERN_CRIT "%s: bad page in kernel page table\n",
267 __func__);
268 } while (size -= PAGE_SIZE);
269
270 flush_tlb_kernel_range(c->vm_start, c->vm_end);
271
272 arm_vmregion_free(&consistent_head, c);
273}
274
281#else /* !CONFIG_MMU */ 275#else /* !CONFIG_MMU */
276
277#define __dma_alloc_remap(page, size, gfp, prot) page_address(page)
278#define __dma_free_remap(addr, size) do { } while (0)
279
280#endif /* CONFIG_MMU */
281
282static void * 282static void *
283__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, 283__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
284 pgprot_t prot) 284 pgprot_t prot)
285{ 285{
286 void *virt; 286 struct page *page;
287 u64 mask = get_coherent_dma_mask(dev); 287 void *addr;
288 288
289 if (!mask) 289 *handle = ~0;
290 goto error; 290 size = PAGE_ALIGN(size);
291 291
292 if (mask < 0xffffffffULL) 292 page = __dma_alloc_buffer(dev, size, gfp);
293 gfp |= GFP_DMA; 293 if (!page)
294 virt = kmalloc(size, gfp); 294 return NULL;
295 if (!virt)
296 goto error;
297 295
298 *handle = virt_to_dma(dev, virt); 296 if (!arch_is_coherent())
299 return virt; 297 addr = __dma_alloc_remap(page, size, gfp, prot);
298 else
299 addr = page_address(page);
300 300
301error: 301 if (addr)
302 *handle = ~0; 302 *handle = page_to_dma(dev, page);
303 return NULL; 303
304 return addr;
304} 305}
305#endif /* CONFIG_MMU */
306 306
307/* 307/*
308 * Allocate DMA-coherent memory space and return both the kernel remapped 308 * Allocate DMA-coherent memory space and return both the kernel remapped
@@ -316,19 +316,8 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf
316 if (dma_alloc_from_coherent(dev, size, handle, &memory)) 316 if (dma_alloc_from_coherent(dev, size, handle, &memory))
317 return memory; 317 return memory;
318 318
319 if (arch_is_coherent()) {
320 void *virt;
321
322 virt = kmalloc(size, gfp);
323 if (!virt)
324 return NULL;
325 *handle = virt_to_dma(dev, virt);
326
327 return virt;
328 }
329
330 return __dma_alloc(dev, size, handle, gfp, 319 return __dma_alloc(dev, size, handle, gfp,
331 pgprot_noncached(pgprot_kernel)); 320 pgprot_dmacoherent(pgprot_kernel));
332} 321}
333EXPORT_SYMBOL(dma_alloc_coherent); 322EXPORT_SYMBOL(dma_alloc_coherent);
334 323
@@ -349,15 +338,12 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
349{ 338{
350 int ret = -ENXIO; 339 int ret = -ENXIO;
351#ifdef CONFIG_MMU 340#ifdef CONFIG_MMU
352 unsigned long flags, user_size, kern_size; 341 unsigned long user_size, kern_size;
353 struct arm_vm_region *c; 342 struct arm_vmregion *c;
354 343
355 user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 344 user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
356 345
357 spin_lock_irqsave(&consistent_lock, flags); 346 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
358 c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr);
359 spin_unlock_irqrestore(&consistent_lock, flags);
360
361 if (c) { 347 if (c) {
362 unsigned long off = vma->vm_pgoff; 348 unsigned long off = vma->vm_pgoff;
363 349
@@ -379,7 +365,7 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
379int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, 365int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
380 void *cpu_addr, dma_addr_t dma_addr, size_t size) 366 void *cpu_addr, dma_addr_t dma_addr, size_t size)
381{ 367{
382 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 368 vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
383 return dma_mmap(dev, vma, cpu_addr, dma_addr, size); 369 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
384} 370}
385EXPORT_SYMBOL(dma_mmap_coherent); 371EXPORT_SYMBOL(dma_mmap_coherent);
@@ -396,144 +382,23 @@ EXPORT_SYMBOL(dma_mmap_writecombine);
396 * free a page as defined by the above mapping. 382 * free a page as defined by the above mapping.
397 * Must not be called with IRQs disabled. 383 * Must not be called with IRQs disabled.
398 */ 384 */
399#ifdef CONFIG_MMU
400void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) 385void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
401{ 386{
402 struct arm_vm_region *c;
403 unsigned long flags, addr;
404 pte_t *ptep;
405 int idx;
406 u32 off;
407
408 WARN_ON(irqs_disabled()); 387 WARN_ON(irqs_disabled());
409 388
410 if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) 389 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
411 return; 390 return;
412 391
413 if (arch_is_coherent()) {
414 kfree(cpu_addr);
415 return;
416 }
417
418 size = PAGE_ALIGN(size); 392 size = PAGE_ALIGN(size);
419 393
420 spin_lock_irqsave(&consistent_lock, flags); 394 if (!arch_is_coherent())
421 c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); 395 __dma_free_remap(cpu_addr, size);
422 if (!c)
423 goto no_area;
424
425 c->vm_active = 0;
426 spin_unlock_irqrestore(&consistent_lock, flags);
427
428 if ((c->vm_end - c->vm_start) != size) {
429 printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
430 __func__, c->vm_end - c->vm_start, size);
431 dump_stack();
432 size = c->vm_end - c->vm_start;
433 }
434
435 idx = CONSISTENT_PTE_INDEX(c->vm_start);
436 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
437 ptep = consistent_pte[idx] + off;
438 addr = c->vm_start;
439 do {
440 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
441 unsigned long pfn;
442
443 ptep++;
444 addr += PAGE_SIZE;
445 off++;
446 if (off >= PTRS_PER_PTE) {
447 off = 0;
448 ptep = consistent_pte[++idx];
449 }
450
451 if (!pte_none(pte) && pte_present(pte)) {
452 pfn = pte_pfn(pte);
453
454 if (pfn_valid(pfn)) {
455 struct page *page = pfn_to_page(pfn);
456
457 /*
458 * x86 does not mark the pages reserved...
459 */
460 ClearPageReserved(page);
461
462 __free_page(page);
463 continue;
464 }
465 }
466
467 printk(KERN_CRIT "%s: bad page in kernel page table\n",
468 __func__);
469 } while (size -= PAGE_SIZE);
470
471 flush_tlb_kernel_range(c->vm_start, c->vm_end);
472
473 spin_lock_irqsave(&consistent_lock, flags);
474 list_del(&c->vm_list);
475 spin_unlock_irqrestore(&consistent_lock, flags);
476
477 kfree(c);
478 return;
479 396
480 no_area: 397 __dma_free_buffer(dma_to_page(dev, handle), size);
481 spin_unlock_irqrestore(&consistent_lock, flags);
482 printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
483 __func__, cpu_addr);
484 dump_stack();
485} 398}
486#else /* !CONFIG_MMU */
487void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
488{
489 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
490 return;
491 kfree(cpu_addr);
492}
493#endif /* CONFIG_MMU */
494EXPORT_SYMBOL(dma_free_coherent); 399EXPORT_SYMBOL(dma_free_coherent);
495 400
496/* 401/*
497 * Initialise the consistent memory allocation.
498 */
499static int __init consistent_init(void)
500{
501 int ret = 0;
502#ifdef CONFIG_MMU
503 pgd_t *pgd;
504 pmd_t *pmd;
505 pte_t *pte;
506 int i = 0;
507 u32 base = CONSISTENT_BASE;
508
509 do {
510 pgd = pgd_offset(&init_mm, base);
511 pmd = pmd_alloc(&init_mm, pgd, base);
512 if (!pmd) {
513 printk(KERN_ERR "%s: no pmd tables\n", __func__);
514 ret = -ENOMEM;
515 break;
516 }
517 WARN_ON(!pmd_none(*pmd));
518
519 pte = pte_alloc_kernel(pmd, base);
520 if (!pte) {
521 printk(KERN_ERR "%s: no pte tables\n", __func__);
522 ret = -ENOMEM;
523 break;
524 }
525
526 consistent_pte[i++] = pte;
527 base += (1 << PGDIR_SHIFT);
528 } while (base < CONSISTENT_END);
529#endif /* !CONFIG_MMU */
530
531 return ret;
532}
533
534core_initcall(consistent_init);
535
536/*
537 * Make an area consistent for devices. 402 * Make an area consistent for devices.
538 * Note: Drivers should NOT use this function directly, as it will break 403 * Note: Drivers should NOT use this function directly, as it will break
539 * platforms with CONFIG_DMABOUNCE. 404 * platforms with CONFIG_DMABOUNCE.
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index d0d17b6a3703..729602291958 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -23,6 +23,8 @@
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/tlbflush.h> 24#include <asm/tlbflush.h>
25 25
26#include "mm.h"
27
26static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE; 28static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
27 29
28/* 30/*
@@ -151,7 +153,14 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
151 if (!pfn_valid(pfn)) 153 if (!pfn_valid(pfn))
152 return; 154 return;
153 155
156 /*
157 * The zero page is never written to, so never has any dirty
158 * cache lines, and therefore never needs to be flushed.
159 */
154 page = pfn_to_page(pfn); 160 page = pfn_to_page(pfn);
161 if (page == ZERO_PAGE(0))
162 return;
163
155 mapping = page_mapping(page); 164 mapping = page_mapping(page);
156#ifndef CONFIG_SMP 165#ifndef CONFIG_SMP
157 if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) 166 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 7f294f307c83..329594e760cd 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -35,14 +35,12 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
35 : 35 :
36 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) 36 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
37 : "cc"); 37 : "cc");
38 __flush_icache_all();
39} 38}
40 39
41void flush_cache_mm(struct mm_struct *mm) 40void flush_cache_mm(struct mm_struct *mm)
42{ 41{
43 if (cache_is_vivt()) { 42 if (cache_is_vivt()) {
44 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) 43 vivt_flush_cache_mm(mm);
45 __cpuc_flush_user_all();
46 return; 44 return;
47 } 45 }
48 46
@@ -52,16 +50,13 @@ void flush_cache_mm(struct mm_struct *mm)
52 : 50 :
53 : "r" (0) 51 : "r" (0)
54 : "cc"); 52 : "cc");
55 __flush_icache_all();
56 } 53 }
57} 54}
58 55
59void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) 56void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
60{ 57{
61 if (cache_is_vivt()) { 58 if (cache_is_vivt()) {
62 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) 59 vivt_flush_cache_range(vma, start, end);
63 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
64 vma->vm_flags);
65 return; 60 return;
66 } 61 }
67 62
@@ -71,22 +66,26 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
71 : 66 :
72 : "r" (0) 67 : "r" (0)
73 : "cc"); 68 : "cc");
74 __flush_icache_all();
75 } 69 }
70
71 if (vma->vm_flags & VM_EXEC)
72 __flush_icache_all();
76} 73}
77 74
78void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) 75void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
79{ 76{
80 if (cache_is_vivt()) { 77 if (cache_is_vivt()) {
81 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 78 vivt_flush_cache_page(vma, user_addr, pfn);
82 unsigned long addr = user_addr & PAGE_MASK;
83 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
84 }
85 return; 79 return;
86 } 80 }
87 81
88 if (cache_is_vipt_aliasing()) 82 if (cache_is_vipt_aliasing()) {
89 flush_pfn_alias(pfn, user_addr); 83 flush_pfn_alias(pfn, user_addr);
84 __flush_icache_all();
85 }
86
87 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
88 __flush_icache_all();
90} 89}
91 90
92void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 91void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
@@ -94,15 +93,13 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
94 unsigned long len, int write) 93 unsigned long len, int write)
95{ 94{
96 if (cache_is_vivt()) { 95 if (cache_is_vivt()) {
97 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 96 vivt_flush_ptrace_access(vma, page, uaddr, kaddr, len, write);
98 unsigned long addr = (unsigned long)kaddr;
99 __cpuc_coherent_kern_range(addr, addr + len);
100 }
101 return; 97 return;
102 } 98 }
103 99
104 if (cache_is_vipt_aliasing()) { 100 if (cache_is_vipt_aliasing()) {
105 flush_pfn_alias(page_to_pfn(page), uaddr); 101 flush_pfn_alias(page_to_pfn(page), uaddr);
102 __flush_icache_all();
106 return; 103 return;
107 } 104 }
108 105
@@ -120,6 +117,8 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
120 117
121void __flush_dcache_page(struct address_space *mapping, struct page *page) 118void __flush_dcache_page(struct address_space *mapping, struct page *page)
122{ 119{
120 void *addr = page_address(page);
121
123 /* 122 /*
124 * Writeback any data associated with the kernel mapping of this 123 * Writeback any data associated with the kernel mapping of this
125 * page. This ensures that data in the physical page is mutually 124 * page. This ensures that data in the physical page is mutually
@@ -130,9 +129,9 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page)
130 * kmap_atomic() doesn't set the page virtual address, and 129 * kmap_atomic() doesn't set the page virtual address, and
131 * kunmap_atomic() takes care of cache flushing already. 130 * kunmap_atomic() takes care of cache flushing already.
132 */ 131 */
133 if (page_address(page)) 132 if (addr)
134#endif 133#endif
135 __cpuc_flush_dcache_page(page_address(page)); 134 __cpuc_flush_dcache_page(addr);
136 135
137 /* 136 /*
138 * If this is a page cache page, and we have an aliasing VIPT cache, 137 * If this is a page cache page, and we have an aliasing VIPT cache,
@@ -196,7 +195,16 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p
196 */ 195 */
197void flush_dcache_page(struct page *page) 196void flush_dcache_page(struct page *page)
198{ 197{
199 struct address_space *mapping = page_mapping(page); 198 struct address_space *mapping;
199
200 /*
201 * The zero page is never written to, so never has any dirty
202 * cache lines, and therefore never needs to be flushed.
203 */
204 if (page == ZERO_PAGE(0))
205 return;
206
207 mapping = page_mapping(page);
200 208
201#ifndef CONFIG_SMP 209#ifndef CONFIG_SMP
202 if (!PageHighMem(page) && mapping && !mapping_mapped(mapping)) 210 if (!PageHighMem(page) && mapping && !mapping_mapped(mapping))
@@ -242,6 +250,7 @@ void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned l
242 * userspace address only. 250 * userspace address only.
243 */ 251 */
244 flush_pfn_alias(pfn, vmaddr); 252 flush_pfn_alias(pfn, vmaddr);
253 __flush_icache_all();
245 } 254 }
246 255
247 /* 256 /*
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index c4f6f05198e0..a888363398f8 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -24,6 +24,8 @@ struct mem_type {
24 24
25const struct mem_type *get_mem_type(unsigned int type); 25const struct mem_type *get_mem_type(unsigned int type);
26 26
27extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
28
27#endif 29#endif
28 30
29struct map_desc; 31struct map_desc;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index ea67be0223ac..2427cdcd9098 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1036,7 +1036,7 @@ void __init paging_init(struct machine_desc *mdesc)
1036 */ 1036 */
1037 zero_page = alloc_bootmem_low_pages(PAGE_SIZE); 1037 zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
1038 empty_zero_page = virt_to_page(zero_page); 1038 empty_zero_page = virt_to_page(zero_page);
1039 flush_dcache_page(empty_zero_page); 1039 __flush_dcache_page(NULL, empty_zero_page);
1040} 1040}
1041 1041
1042/* 1042/*
diff --git a/arch/arm/mm/vmregion.c b/arch/arm/mm/vmregion.c
new file mode 100644
index 000000000000..19e09bdb1b8a
--- /dev/null
+++ b/arch/arm/mm/vmregion.c
@@ -0,0 +1,131 @@
1#include <linux/spinlock.h>
2#include <linux/list.h>
3#include <linux/slab.h>
4
5#include "vmregion.h"
6
7/*
8 * VM region handling support.
9 *
10 * This should become something generic, handling VM region allocations for
11 * vmalloc and similar (ioremap, module space, etc).
12 *
13 * I envisage vmalloc()'s supporting vm_struct becoming:
14 *
15 * struct vm_struct {
16 * struct vmregion region;
17 * unsigned long flags;
18 * struct page **pages;
19 * unsigned int nr_pages;
20 * unsigned long phys_addr;
21 * };
22 *
23 * get_vm_area() would then call vmregion_alloc with an appropriate
24 * struct vmregion head (eg):
25 *
26 * struct vmregion vmalloc_head = {
27 * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
28 * .vm_start = VMALLOC_START,
29 * .vm_end = VMALLOC_END,
30 * };
31 *
32 * However, vmalloc_head.vm_start is variable (typically, it is dependent on
33 * the amount of RAM found at boot time.) I would imagine that get_vm_area()
34 * would have to initialise this each time prior to calling vmregion_alloc().
35 */
36
37struct arm_vmregion *
38arm_vmregion_alloc(struct arm_vmregion_head *head, size_t size, gfp_t gfp)
39{
40 unsigned long addr = head->vm_start, end = head->vm_end - size;
41 unsigned long flags;
42 struct arm_vmregion *c, *new;
43
44 if (head->vm_end - head->vm_start < size) {
45 printk(KERN_WARNING "%s: allocation too big (requested %#x)\n",
46 __func__, size);
47 goto out;
48 }
49
50 new = kmalloc(sizeof(struct arm_vmregion), gfp);
51 if (!new)
52 goto out;
53
54 spin_lock_irqsave(&head->vm_lock, flags);
55
56 list_for_each_entry(c, &head->vm_list, vm_list) {
57 if ((addr + size) < addr)
58 goto nospc;
59 if ((addr + size) <= c->vm_start)
60 goto found;
61 addr = c->vm_end;
62 if (addr > end)
63 goto nospc;
64 }
65
66 found:
67 /*
68 * Insert this entry _before_ the one we found.
69 */
70 list_add_tail(&new->vm_list, &c->vm_list);
71 new->vm_start = addr;
72 new->vm_end = addr + size;
73 new->vm_active = 1;
74
75 spin_unlock_irqrestore(&head->vm_lock, flags);
76 return new;
77
78 nospc:
79 spin_unlock_irqrestore(&head->vm_lock, flags);
80 kfree(new);
81 out:
82 return NULL;
83}
84
85static struct arm_vmregion *__arm_vmregion_find(struct arm_vmregion_head *head, unsigned long addr)
86{
87 struct arm_vmregion *c;
88
89 list_for_each_entry(c, &head->vm_list, vm_list) {
90 if (c->vm_active && c->vm_start == addr)
91 goto out;
92 }
93 c = NULL;
94 out:
95 return c;
96}
97
98struct arm_vmregion *arm_vmregion_find(struct arm_vmregion_head *head, unsigned long addr)
99{
100 struct arm_vmregion *c;
101 unsigned long flags;
102
103 spin_lock_irqsave(&head->vm_lock, flags);
104 c = __arm_vmregion_find(head, addr);
105 spin_unlock_irqrestore(&head->vm_lock, flags);
106 return c;
107}
108
109struct arm_vmregion *arm_vmregion_find_remove(struct arm_vmregion_head *head, unsigned long addr)
110{
111 struct arm_vmregion *c;
112 unsigned long flags;
113
114 spin_lock_irqsave(&head->vm_lock, flags);
115 c = __arm_vmregion_find(head, addr);
116 if (c)
117 c->vm_active = 0;
118 spin_unlock_irqrestore(&head->vm_lock, flags);
119 return c;
120}
121
122void arm_vmregion_free(struct arm_vmregion_head *head, struct arm_vmregion *c)
123{
124 unsigned long flags;
125
126 spin_lock_irqsave(&head->vm_lock, flags);
127 list_del(&c->vm_list);
128 spin_unlock_irqrestore(&head->vm_lock, flags);
129
130 kfree(c);
131}
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h
new file mode 100644
index 000000000000..6b2cdbdf3a85
--- /dev/null
+++ b/arch/arm/mm/vmregion.h
@@ -0,0 +1,29 @@
1#ifndef VMREGION_H
2#define VMREGION_H
3
4#include <linux/spinlock.h>
5#include <linux/list.h>
6
7struct page;
8
9struct arm_vmregion_head {
10 spinlock_t vm_lock;
11 struct list_head vm_list;
12 unsigned long vm_start;
13 unsigned long vm_end;
14};
15
16struct arm_vmregion {
17 struct list_head vm_list;
18 unsigned long vm_start;
19 unsigned long vm_end;
20 struct page *vm_pages;
21 int vm_active;
22};
23
24struct arm_vmregion *arm_vmregion_alloc(struct arm_vmregion_head *, size_t, gfp_t);
25struct arm_vmregion *arm_vmregion_find(struct arm_vmregion_head *, unsigned long);
26struct arm_vmregion *arm_vmregion_find_remove(struct arm_vmregion_head *, unsigned long);
27void arm_vmregion_free(struct arm_vmregion_head *, struct arm_vmregion *);
28
29#endif
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
new file mode 100644
index 000000000000..159daf583f85
--- /dev/null
+++ b/arch/arm/plat-nomadik/Kconfig
@@ -0,0 +1,22 @@
1# We keep common IP's here for Nomadik and other similar
2# familiy of processors from ST-Ericsson. At the moment we have
3# just MTU, others to follow soon.
4
5config PLAT_NOMADIK
6 bool
7 depends on ARCH_NOMADIK || ARCH_U8500
8 default y
9 help
10 Common platform code for Nomadik and other ST-Ericsson
11 platforms.
12
13if PLAT_NOMADIK
14
15config HAS_MTU
16 bool
17 help
18 Support for Multi Timer Unit. MTU provides access
19 to multiple interrupt generating programmable
20 32-bit free running decrementing counters.
21
22endif
diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile
new file mode 100644
index 000000000000..37c7cdd0f8f0
--- /dev/null
+++ b/arch/arm/plat-nomadik/Makefile
@@ -0,0 +1,5 @@
1# arch/arm/plat-nomadik/Makefile
2# Copyright 2009 ST-Ericsson
3# Licensed under GPLv2
4
5obj-$(CONFIG_HAS_MTU) += timer.o
diff --git a/arch/arm/mach-nomadik/include/mach/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h
index 76da7f085330..42c907258b14 100644
--- a/arch/arm/mach-nomadik/include/mach/mtu.h
+++ b/arch/arm/plat-nomadik/include/plat/mtu.h
@@ -1,5 +1,8 @@
1#ifndef __ASM_ARCH_MTU_H 1#ifndef __PLAT_MTU_H
2#define __ASM_ARCH_MTU_H 2#define __PLAT_MTU_H
3
4/* should be set by the platform code */
5extern void __iomem *mtu_base;
3 6
4/* 7/*
5 * The MTU device hosts four different counters, with 4 set of 8 * The MTU device hosts four different counters, with 4 set of
@@ -41,5 +44,5 @@
41#define MTU_PCELL2 0xff8 44#define MTU_PCELL2 0xff8
42#define MTU_PCELL3 0xffC 45#define MTU_PCELL3 0xffC
43 46
44#endif /* __ASM_ARCH_MTU_H */ 47#endif /* __PLAT_MTU_H */
45 48
diff --git a/arch/arm/mach-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index d1738e7061d4..62f18ad43a28 100644
--- a/arch/arm/mach-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -15,19 +15,14 @@
15#include <linux/clockchips.h> 15#include <linux/clockchips.h>
16#include <linux/jiffies.h> 16#include <linux/jiffies.h>
17#include <asm/mach/time.h> 17#include <asm/mach/time.h>
18#include <mach/mtu.h>
19 18
20#define TIMER_CTRL 0x80 /* No divisor */ 19#include <plat/mtu.h>
21#define TIMER_PERIODIC 0x40
22#define TIMER_SZ32BIT 0x02
23
24/* Initial value for SRC control register: all timers use MXTAL/8 source */
25#define SRC_CR_INIT_MASK 0x00007fff
26#define SRC_CR_INIT_VAL 0x2aaa8000
27 20
28static u32 nmdk_count; /* accumulated count */ 21static u32 nmdk_count; /* accumulated count */
29static u32 nmdk_cycle; /* write-once */ 22static u32 nmdk_cycle; /* write-once */
30static __iomem void *mtu_base; 23
24/* setup by the platform code */
25void __iomem *mtu_base;
31 26
32/* 27/*
33 * clocksource: the MTU device is a decrementing counters, so we negate 28 * clocksource: the MTU device is a decrementing counters, so we negate
@@ -93,7 +88,7 @@ static struct clock_event_device nmdk_clkevt = {
93static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) 88static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
94{ 89{
95 /* ack: "interrupt clear register" */ 90 /* ack: "interrupt clear register" */
96 writel( 1 << 0, mtu_base + MTU_ICR); 91 writel(1 << 0, mtu_base + MTU_ICR);
97 92
98 /* we can't count lost ticks, unfortunately */ 93 /* we can't count lost ticks, unfortunately */
99 nmdk_count += nmdk_cycle; 94 nmdk_count += nmdk_cycle;
@@ -125,24 +120,14 @@ static void nmdk_timer_reset(void)
125 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); 120 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
126} 121}
127 122
128static void __init nmdk_timer_init(void) 123void __init nmdk_timer_init(void)
129{ 124{
130 u32 src_cr;
131 unsigned long rate; 125 unsigned long rate;
132 int bits; 126 int bits;
133 127
134 rate = CLOCK_TICK_RATE; /* 2.4MHz */ 128 rate = CLOCK_TICK_RATE; /* 2.4MHz */
135 nmdk_cycle = (rate + HZ/2) / HZ; 129 nmdk_cycle = (rate + HZ/2) / HZ;
136 130
137 /* Configure timer sources in "system reset controller" ctrl reg */
138 src_cr = readl(io_p2v(NOMADIK_SRC_BASE));
139 src_cr &= SRC_CR_INIT_MASK;
140 src_cr |= SRC_CR_INIT_VAL;
141 writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
142
143 /* Save global pointer to mtu, used by functions above */
144 mtu_base = io_p2v(NOMADIK_MTU0_BASE);
145
146 /* Init the timer and register clocksource */ 131 /* Init the timer and register clocksource */
147 nmdk_timer_reset(); 132 nmdk_timer_reset();
148 133
@@ -150,7 +135,9 @@ static void __init nmdk_timer_init(void)
150 bits = 8*sizeof(nmdk_count); 135 bits = 8*sizeof(nmdk_count);
151 nmdk_clksrc.mask = CLOCKSOURCE_MASK(bits); 136 nmdk_clksrc.mask = CLOCKSOURCE_MASK(bits);
152 137
153 clocksource_register(&nmdk_clksrc); 138 if (clocksource_register(&nmdk_clksrc))
139 printk(KERN_ERR "timer: failed to initialize clock "
140 "source %s\n", nmdk_clksrc.name);
154 141
155 /* Register irq and clockevents */ 142 /* Register irq and clockevents */
156 setup_irq(IRQ_MTU0, &nmdk_timer_irq); 143 setup_irq(IRQ_MTU0, &nmdk_timer_irq);
@@ -158,7 +145,3 @@ static void __init nmdk_timer_init(void)
158 nmdk_clkevt.cpumask = cpumask_of(0); 145 nmdk_clkevt.cpumask = cpumask_of(0);
159 clockevents_register_device(&nmdk_clkevt); 146 clockevents_register_device(&nmdk_clkevt);
160} 147}
161
162struct sys_timer nomadik_timer = {
163 .init = nmdk_timer_init,
164};
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index 9ad41dc484c1..3325f7b49eaa 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -68,6 +68,13 @@
68 __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ 68 __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \
69 __dma; }) 69 __dma; })
70 70
71#define __arch_dma_to_page(dev, addr) \
72 ({ dma_addr_t __dma = addr; \
73 if (is_lbus_device(dev)) \
74 __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \
75 phys_to_page(__dma); \
76 })
77
71#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ 78#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \
72 lbus_to_virt(addr) : \ 79 lbus_to_virt(addr) : \
73 __phys_to_virt(addr)); }) 80 __phys_to_virt(addr)); })
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index b401dadad4a8..eb140ff38c27 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -54,7 +54,7 @@ config DW_DMAC
54 54
55config AT_HDMAC 55config AT_HDMAC
56 tristate "Atmel AHB DMA support" 56 tristate "Atmel AHB DMA support"
57 depends on ARCH_AT91SAM9RL 57 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
58 select DMA_ENGINE 58 select DMA_ENGINE
59 help 59 help
60 Support the Atmel AHB DMA controller. This can be integrated in 60 Support the Atmel AHB DMA controller. This can be integrated in
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 705a5894a6bb..90d168ad03b6 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -56,7 +56,7 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
56 clk = 255; 56 clk = 255;
57 host->cclk = host->mclk / (2 * (clk + 1)); 57 host->cclk = host->mclk / (2 * (clk + 1));
58 } 58 }
59 if (host->hw_designer == 0x80) 59 if (host->hw_designer == AMBA_VENDOR_ST)
60 clk |= MCI_FCEN; /* Bug fix in ST IP block */ 60 clk |= MCI_FCEN; /* Bug fix in ST IP block */
61 clk |= MCI_CLK_ENABLE; 61 clk |= MCI_CLK_ENABLE;
62 /* This hasn't proven to be worthwhile */ 62 /* This hasn't proven to be worthwhile */
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-02 22:11:44 -0500