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-rw-r--r--Documentation/thermal/sysfs-api.txt389
-rw-r--r--arch/m32r/Kconfig3
-rw-r--r--arch/m32r/boot/compressed/Makefile16
-rw-r--r--arch/m32r/boot/compressed/misc.c143
-rw-r--r--arch/m32r/kernel/smp.c2
-rw-r--r--arch/m32r/kernel/time.c6
-rw-r--r--arch/m32r/kernel/vmlinux.lds.S2
-rw-r--r--arch/powerpc/Kconfig4
-rw-r--r--arch/powerpc/kernel/time.c15
-rw-r--r--arch/powerpc/kvm/timing.h4
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c4
-rw-r--r--arch/powerpc/platforms/pseries/msi.c2
-rw-r--r--arch/powerpc/platforms/pseries/xics.c9
-rw-r--r--arch/x86/include/asm/amd_iommu.h1
-rw-r--r--arch/x86/include/asm/desc.h2
-rw-r--r--arch/x86/include/asm/processor.h2
-rw-r--r--arch/x86/include/asm/topology.h2
-rw-r--r--arch/x86/kernel/amd_iommu.c2
-rw-r--r--arch/x86/kernel/amd_iommu_init.c24
-rw-r--r--arch/x86/kernel/cpu/mtrr/cleanup.c2
-rw-r--r--arch/x86/kernel/process_64.c5
-rw-r--r--arch/x86/kernel/reboot.c8
-rw-r--r--arch/x86/kvm/x86.c4
-rw-r--r--arch/x86/xen/enlighten.c11
-rw-r--r--block/cfq-iosched.c19
-rw-r--r--drivers/acpi/acpica/acconfig.h4
-rw-r--r--drivers/acpi/acpica/exregion.c35
-rw-r--r--drivers/acpi/power_meter.c6
-rw-r--r--drivers/acpi/proc.c2
-rw-r--r--drivers/acpi/processor_core.c2
-rw-r--r--drivers/acpi/processor_throttling.c6
-rw-r--r--drivers/acpi/sleep.c24
-rw-r--r--drivers/acpi/video.c8
-rw-r--r--drivers/ata/ahci.c40
-rw-r--r--drivers/ata/libata-core.c9
-rw-r--r--drivers/ata/sata_via.c1
-rw-r--r--drivers/char/hvc_xen.c25
-rw-r--r--drivers/edac/amd64_edac.c6
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h39
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h30
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c305
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c14
-rw-r--r--drivers/gpu/drm/i915/intel_display.c178
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c10
-rw-r--r--drivers/misc/sgi-gru/gruprocfs.c13
-rw-r--r--drivers/mtd/maps/Kconfig1
-rw-r--r--drivers/mtd/maps/gpio-addr-flash.c5
-rw-r--r--drivers/mtd/nand/nand_base.c6
-rw-r--r--drivers/platform/x86/eeepc-laptop.c30
-rw-r--r--drivers/thermal/thermal_sys.c10
-rw-r--r--fs/Kconfig2
-rw-r--r--fs/bio.c28
-rw-r--r--fs/compat.c2
-rw-r--r--fs/fuse/dir.c4
-rw-r--r--fs/fuse/file.c5
-rw-r--r--fs/sysfs/dir.c4
-rw-r--r--kernel/kthread.c23
-rw-r--r--kernel/sched.c40
-rw-r--r--kernel/sched_fair.c73
-rw-r--r--kernel/trace/ftrace.c6
-rw-r--r--kernel/trace/ring_buffer.c2
-rw-r--r--lib/dma-debug.c6
-rw-r--r--mm/backing-dev.c3
65 files changed, 1123 insertions, 570 deletions
diff --git a/Documentation/thermal/sysfs-api.txt b/Documentation/thermal/sysfs-api.txt
index 70d68ce8640a..a87dc277a5ca 100644
--- a/Documentation/thermal/sysfs-api.txt
+++ b/Documentation/thermal/sysfs-api.txt
@@ -1,5 +1,5 @@
1Generic Thermal Sysfs driver How To 1Generic Thermal Sysfs driver How To
2========================= 2===================================
3 3
4Written by Sujith Thomas <sujith.thomas@intel.com>, Zhang Rui <rui.zhang@intel.com> 4Written by Sujith Thomas <sujith.thomas@intel.com>, Zhang Rui <rui.zhang@intel.com>
5 5
@@ -10,20 +10,20 @@ Copyright (c) 2008 Intel Corporation
10 10
110. Introduction 110. Introduction
12 12
13The generic thermal sysfs provides a set of interfaces for thermal zone devices (sensors) 13The generic thermal sysfs provides a set of interfaces for thermal zone
14and thermal cooling devices (fan, processor...) to register with the thermal management 14devices (sensors) and thermal cooling devices (fan, processor...) to register
15solution and to be a part of it. 15with the thermal management solution and to be a part of it.
16 16
17This how-to focuses on enabling new thermal zone and cooling devices to participate 17This how-to focuses on enabling new thermal zone and cooling devices to
18in thermal management. 18participate in thermal management.
19This solution is platform independent and any type of thermal zone devices and 19This solution is platform independent and any type of thermal zone devices
20cooling devices should be able to make use of the infrastructure. 20and cooling devices should be able to make use of the infrastructure.
21 21
22The main task of the thermal sysfs driver is to expose thermal zone attributes as well 22The main task of the thermal sysfs driver is to expose thermal zone attributes
23as cooling device attributes to the user space. 23as well as cooling device attributes to the user space.
24An intelligent thermal management application can make decisions based on inputs 24An intelligent thermal management application can make decisions based on
25from thermal zone attributes (the current temperature and trip point temperature) 25inputs from thermal zone attributes (the current temperature and trip point
26and throttle appropriate devices. 26temperature) and throttle appropriate devices.
27 27
28[0-*] denotes any positive number starting from 0 28[0-*] denotes any positive number starting from 0
29[1-*] denotes any positive number starting from 1 29[1-*] denotes any positive number starting from 1
@@ -31,77 +31,77 @@ and throttle appropriate devices.
311. thermal sysfs driver interface functions 311. thermal sysfs driver interface functions
32 32
331.1 thermal zone device interface 331.1 thermal zone device interface
341.1.1 struct thermal_zone_device *thermal_zone_device_register(char *name, int trips, 341.1.1 struct thermal_zone_device *thermal_zone_device_register(char *name,
35 void *devdata, struct thermal_zone_device_ops *ops) 35 int trips, void *devdata, struct thermal_zone_device_ops *ops)
36 36
37 This interface function adds a new thermal zone device (sensor) to 37 This interface function adds a new thermal zone device (sensor) to
38 /sys/class/thermal folder as thermal_zone[0-*]. 38 /sys/class/thermal folder as thermal_zone[0-*]. It tries to bind all the
39 It tries to bind all the thermal cooling devices registered at the same time. 39 thermal cooling devices registered at the same time.
40 40
41 name: the thermal zone name. 41 name: the thermal zone name.
42 trips: the total number of trip points this thermal zone supports. 42 trips: the total number of trip points this thermal zone supports.
43 devdata: device private data 43 devdata: device private data
44 ops: thermal zone device call-backs. 44 ops: thermal zone device call-backs.
45 .bind: bind the thermal zone device with a thermal cooling device. 45 .bind: bind the thermal zone device with a thermal cooling device.
46 .unbind: unbind the thermal zone device with a thermal cooling device. 46 .unbind: unbind the thermal zone device with a thermal cooling device.
47 .get_temp: get the current temperature of the thermal zone. 47 .get_temp: get the current temperature of the thermal zone.
48 .get_mode: get the current mode (user/kernel) of the thermal zone. 48 .get_mode: get the current mode (user/kernel) of the thermal zone.
49 "kernel" means thermal management is done in kernel. 49 - "kernel" means thermal management is done in kernel.
50 "user" will prevent kernel thermal driver actions upon trip points 50 - "user" will prevent kernel thermal driver actions upon trip points
51 so that user applications can take charge of thermal management. 51 so that user applications can take charge of thermal management.
52 .set_mode: set the mode (user/kernel) of the thermal zone. 52 .set_mode: set the mode (user/kernel) of the thermal zone.
53 .get_trip_type: get the type of certain trip point. 53 .get_trip_type: get the type of certain trip point.
54 .get_trip_temp: get the temperature above which the certain trip point 54 .get_trip_temp: get the temperature above which the certain trip point
55 will be fired. 55 will be fired.
56 56
571.1.2 void thermal_zone_device_unregister(struct thermal_zone_device *tz) 571.1.2 void thermal_zone_device_unregister(struct thermal_zone_device *tz)
58 58
59 This interface function removes the thermal zone device. 59 This interface function removes the thermal zone device.
60 It deletes the corresponding entry form /sys/class/thermal folder and unbind all 60 It deletes the corresponding entry form /sys/class/thermal folder and
61 the thermal cooling devices it uses. 61 unbind all the thermal cooling devices it uses.
62 62
631.2 thermal cooling device interface 631.2 thermal cooling device interface
641.2.1 struct thermal_cooling_device *thermal_cooling_device_register(char *name, 641.2.1 struct thermal_cooling_device *thermal_cooling_device_register(char *name,
65 void *devdata, struct thermal_cooling_device_ops *) 65 void *devdata, struct thermal_cooling_device_ops *)
66 66
67 This interface function adds a new thermal cooling device (fan/processor/...) to 67 This interface function adds a new thermal cooling device (fan/processor/...)
68 /sys/class/thermal/ folder as cooling_device[0-*]. 68 to /sys/class/thermal/ folder as cooling_device[0-*]. It tries to bind itself
69 It tries to bind itself to all the thermal zone devices register at the same time. 69 to all the thermal zone devices register at the same time.
70 name: the cooling device name. 70 name: the cooling device name.
71 devdata: device private data. 71 devdata: device private data.
72 ops: thermal cooling devices call-backs. 72 ops: thermal cooling devices call-backs.
73 .get_max_state: get the Maximum throttle state of the cooling device. 73 .get_max_state: get the Maximum throttle state of the cooling device.
74 .get_cur_state: get the Current throttle state of the cooling device. 74 .get_cur_state: get the Current throttle state of the cooling device.
75 .set_cur_state: set the Current throttle state of the cooling device. 75 .set_cur_state: set the Current throttle state of the cooling device.
76 76
771.2.2 void thermal_cooling_device_unregister(struct thermal_cooling_device *cdev) 771.2.2 void thermal_cooling_device_unregister(struct thermal_cooling_device *cdev)
78 78
79 This interface function remove the thermal cooling device. 79 This interface function remove the thermal cooling device.
80 It deletes the corresponding entry form /sys/class/thermal folder and unbind 80 It deletes the corresponding entry form /sys/class/thermal folder and
81 itself from all the thermal zone devices using it. 81 unbind itself from all the thermal zone devices using it.
82 82
831.3 interface for binding a thermal zone device with a thermal cooling device 831.3 interface for binding a thermal zone device with a thermal cooling device
841.3.1 int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz, 841.3.1 int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz,
85 int trip, struct thermal_cooling_device *cdev); 85 int trip, struct thermal_cooling_device *cdev);
86 86
87 This interface function bind a thermal cooling device to the certain trip point 87 This interface function bind a thermal cooling device to the certain trip
88 of a thermal zone device. 88 point of a thermal zone device.
89 This function is usually called in the thermal zone device .bind callback. 89 This function is usually called in the thermal zone device .bind callback.
90 tz: the thermal zone device 90 tz: the thermal zone device
91 cdev: thermal cooling device 91 cdev: thermal cooling device
92 trip: indicates which trip point the cooling devices is associated with 92 trip: indicates which trip point the cooling devices is associated with
93 in this thermal zone. 93 in this thermal zone.
94 94
951.3.2 int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz, 951.3.2 int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz,
96 int trip, struct thermal_cooling_device *cdev); 96 int trip, struct thermal_cooling_device *cdev);
97 97
98 This interface function unbind a thermal cooling device from the certain trip point 98 This interface function unbind a thermal cooling device from the certain
99 of a thermal zone device. 99 trip point of a thermal zone device. This function is usually called in
100 This function is usually called in the thermal zone device .unbind callback. 100 the thermal zone device .unbind callback.
101 tz: the thermal zone device 101 tz: the thermal zone device
102 cdev: thermal cooling device 102 cdev: thermal cooling device
103 trip: indicates which trip point the cooling devices is associated with 103 trip: indicates which trip point the cooling devices is associated with
104 in this thermal zone. 104 in this thermal zone.
105 105
1062. sysfs attributes structure 1062. sysfs attributes structure
107 107
@@ -114,153 +114,166 @@ if hwmon is compiled in or built as a module.
114 114
115Thermal zone device sys I/F, created once it's registered: 115Thermal zone device sys I/F, created once it's registered:
116/sys/class/thermal/thermal_zone[0-*]: 116/sys/class/thermal/thermal_zone[0-*]:
117 |-----type: Type of the thermal zone 117 |---type: Type of the thermal zone
118 |-----temp: Current temperature 118 |---temp: Current temperature
119 |-----mode: Working mode of the thermal zone 119 |---mode: Working mode of the thermal zone
120 |-----trip_point_[0-*]_temp: Trip point temperature 120 |---trip_point_[0-*]_temp: Trip point temperature
121 |-----trip_point_[0-*]_type: Trip point type 121 |---trip_point_[0-*]_type: Trip point type
122 122
123Thermal cooling device sys I/F, created once it's registered: 123Thermal cooling device sys I/F, created once it's registered:
124/sys/class/thermal/cooling_device[0-*]: 124/sys/class/thermal/cooling_device[0-*]:
125 |-----type : Type of the cooling device(processor/fan/...) 125 |---type: Type of the cooling device(processor/fan/...)
126 |-----max_state: Maximum cooling state of the cooling device 126 |---max_state: Maximum cooling state of the cooling device
127 |-----cur_state: Current cooling state of the cooling device 127 |---cur_state: Current cooling state of the cooling device
128 128
129 129
130These two dynamic attributes are created/removed in pairs. 130Then next two dynamic attributes are created/removed in pairs. They represent
131They represent the relationship between a thermal zone and its associated cooling device. 131the relationship between a thermal zone and its associated cooling device.
132They are created/removed for each 132They are created/removed for each successful execution of
133thermal_zone_bind_cooling_device/thermal_zone_unbind_cooling_device successful execution. 133thermal_zone_bind_cooling_device/thermal_zone_unbind_cooling_device.
134 134
135/sys/class/thermal/thermal_zone[0-*] 135/sys/class/thermal/thermal_zone[0-*]:
136 |-----cdev[0-*]: The [0-*]th cooling device in the current thermal zone 136 |---cdev[0-*]: [0-*]th cooling device in current thermal zone
137 |-----cdev[0-*]_trip_point: Trip point that cdev[0-*] is associated with 137 |---cdev[0-*]_trip_point: Trip point that cdev[0-*] is associated with
138 138
139Besides the thermal zone device sysfs I/F and cooling device sysfs I/F, 139Besides the thermal zone device sysfs I/F and cooling device sysfs I/F,
140the generic thermal driver also creates a hwmon sysfs I/F for each _type_ of 140the generic thermal driver also creates a hwmon sysfs I/F for each _type_
141thermal zone device. E.g. the generic thermal driver registers one hwmon class device 141of thermal zone device. E.g. the generic thermal driver registers one hwmon
142and build the associated hwmon sysfs I/F for all the registered ACPI thermal zones. 142class device and build the associated hwmon sysfs I/F for all the registered
143ACPI thermal zones.
144
143/sys/class/hwmon/hwmon[0-*]: 145/sys/class/hwmon/hwmon[0-*]:
144 |-----name: The type of the thermal zone devices. 146 |---name: The type of the thermal zone devices
145 |-----temp[1-*]_input: The current temperature of thermal zone [1-*]. 147 |---temp[1-*]_input: The current temperature of thermal zone [1-*]
146 |-----temp[1-*]_critical: The critical trip point of thermal zone [1-*]. 148 |---temp[1-*]_critical: The critical trip point of thermal zone [1-*]
149
147Please read Documentation/hwmon/sysfs-interface for additional information. 150Please read Documentation/hwmon/sysfs-interface for additional information.
148 151
149*************************** 152***************************
150* Thermal zone attributes * 153* Thermal zone attributes *
151*************************** 154***************************
152 155
153type Strings which represent the thermal zone type. 156type
154 This is given by thermal zone driver as part of registration. 157 Strings which represent the thermal zone type.
155 Eg: "acpitz" indicates it's an ACPI thermal device. 158 This is given by thermal zone driver as part of registration.
156 In order to keep it consistent with hwmon sys attribute, 159 E.g: "acpitz" indicates it's an ACPI thermal device.
157 this should be a short, lowercase string, 160 In order to keep it consistent with hwmon sys attribute; this should
158 not containing spaces nor dashes. 161 be a short, lowercase string, not containing spaces nor dashes.
159 RO 162 RO, Required
160 Required 163
161 164temp
162temp Current temperature as reported by thermal zone (sensor) 165 Current temperature as reported by thermal zone (sensor).
163 Unit: millidegree Celsius 166 Unit: millidegree Celsius
164 RO 167 RO, Required
165 Required 168
166 169mode
167mode One of the predefined values in [kernel, user] 170 One of the predefined values in [kernel, user].
168 This file gives information about the algorithm 171 This file gives information about the algorithm that is currently
169 that is currently managing the thermal zone. 172 managing the thermal zone. It can be either default kernel based
170 It can be either default kernel based algorithm 173 algorithm or user space application.
171 or user space application. 174 kernel = Thermal management in kernel thermal zone driver.
172 RW 175 user = Preventing kernel thermal zone driver actions upon
173 Optional 176 trip points so that user application can take full
174 kernel = Thermal management in kernel thermal zone driver. 177 charge of the thermal management.
175 user = Preventing kernel thermal zone driver actions upon 178 RW, Optional
176 trip points so that user application can take full 179
177 charge of the thermal management. 180trip_point_[0-*]_temp
178 181 The temperature above which trip point will be fired.
179trip_point_[0-*]_temp The temperature above which trip point will be fired 182 Unit: millidegree Celsius
180 Unit: millidegree Celsius 183 RO, Optional
181 RO 184
182 Optional 185trip_point_[0-*]_type
183 186 Strings which indicate the type of the trip point.
184trip_point_[0-*]_type Strings which indicate the type of the trip point 187 E.g. it can be one of critical, hot, passive, active[0-*] for ACPI
185 E.g. it can be one of critical, hot, passive, 188 thermal zone.
186 active[0-*] for ACPI thermal zone. 189 RO, Optional
187 RO 190
188 Optional 191cdev[0-*]
189 192 Sysfs link to the thermal cooling device node where the sys I/F
190cdev[0-*] Sysfs link to the thermal cooling device node where the sys I/F 193 for cooling device throttling control represents.
191 for cooling device throttling control represents. 194 RO, Optional
192 RO 195
193 Optional 196cdev[0-*]_trip_point
194 197 The trip point with which cdev[0-*] is associated in this thermal
195cdev[0-*]_trip_point The trip point with which cdev[0-*] is associated in this thermal zone 198 zone; -1 means the cooling device is not associated with any trip
196 -1 means the cooling device is not associated with any trip point. 199 point.
197 RO 200 RO, Optional
198 Optional 201
199 202passive
200****************************** 203 Attribute is only present for zones in which the passive cooling
201* Cooling device attributes * 204 policy is not supported by native thermal driver. Default is zero
202****************************** 205 and can be set to a temperature (in millidegrees) to enable a
203 206 passive trip point for the zone. Activation is done by polling with
204type String which represents the type of device 207 an interval of 1 second.
205 eg: For generic ACPI: this should be "Fan", 208 Unit: millidegrees Celsius
206 "Processor" or "LCD" 209 RW, Optional
207 eg. For memory controller device on intel_menlow platform: 210
208 this should be "Memory controller" 211*****************************
209 RO 212* Cooling device attributes *
210 Required 213*****************************
211 214
212max_state The maximum permissible cooling state of this cooling device. 215type
213 RO 216 String which represents the type of device, e.g:
214 Required 217 - for generic ACPI: should be "Fan", "Processor" or "LCD"
215 218 - for memory controller device on intel_menlow platform:
216cur_state The current cooling state of this cooling device. 219 should be "Memory controller".
217 the value can any integer numbers between 0 and max_state, 220 RO, Required
218 cur_state == 0 means no cooling 221
219 cur_state == max_state means the maximum cooling. 222max_state
220 RW 223 The maximum permissible cooling state of this cooling device.
221 Required 224 RO, Required
225
226cur_state
227 The current cooling state of this cooling device.
228 The value can any integer numbers between 0 and max_state:
229 - cur_state == 0 means no cooling
230 - cur_state == max_state means the maximum cooling.
231 RW, Required
222 232
2233. A simple implementation 2333. A simple implementation
224 234
225ACPI thermal zone may support multiple trip points like critical/hot/passive/active. 235ACPI thermal zone may support multiple trip points like critical, hot,
226If an ACPI thermal zone supports critical, passive, active[0] and active[1] at the same time, 236passive, active. If an ACPI thermal zone supports critical, passive,
227it may register itself as a thermal_zone_device (thermal_zone1) with 4 trip points in all. 237active[0] and active[1] at the same time, it may register itself as a
228It has one processor and one fan, which are both registered as thermal_cooling_device. 238thermal_zone_device (thermal_zone1) with 4 trip points in all.
229If the processor is listed in _PSL method, and the fan is listed in _AL0 method, 239It has one processor and one fan, which are both registered as
230the sys I/F structure will be built like this: 240thermal_cooling_device.
241
242If the processor is listed in _PSL method, and the fan is listed in _AL0
243method, the sys I/F structure will be built like this:
231 244
232/sys/class/thermal: 245/sys/class/thermal:
233 246
234|thermal_zone1: 247|thermal_zone1:
235 |-----type: acpitz 248 |---type: acpitz
236 |-----temp: 37000 249 |---temp: 37000
237 |-----mode: kernel 250 |---mode: kernel
238 |-----trip_point_0_temp: 100000 251 |---trip_point_0_temp: 100000
239 |-----trip_point_0_type: critical 252 |---trip_point_0_type: critical
240 |-----trip_point_1_temp: 80000 253 |---trip_point_1_temp: 80000
241 |-----trip_point_1_type: passive 254 |---trip_point_1_type: passive
242 |-----trip_point_2_temp: 70000 255 |---trip_point_2_temp: 70000
243 |-----trip_point_2_type: active0 256 |---trip_point_2_type: active0
244 |-----trip_point_3_temp: 60000 257 |---trip_point_3_temp: 60000
245 |-----trip_point_3_type: active1 258 |---trip_point_3_type: active1
246 |-----cdev0: --->/sys/class/thermal/cooling_device0 259 |---cdev0: --->/sys/class/thermal/cooling_device0
247 |-----cdev0_trip_point: 1 /* cdev0 can be used for passive */ 260 |---cdev0_trip_point: 1 /* cdev0 can be used for passive */
248 |-----cdev1: --->/sys/class/thermal/cooling_device3 261 |---cdev1: --->/sys/class/thermal/cooling_device3
249 |-----cdev1_trip_point: 2 /* cdev1 can be used for active[0]*/ 262 |---cdev1_trip_point: 2 /* cdev1 can be used for active[0]*/
250 263
251|cooling_device0: 264|cooling_device0:
252 |-----type: Processor 265 |---type: Processor
253 |-----max_state: 8 266 |---max_state: 8
254 |-----cur_state: 0 267 |---cur_state: 0
255 268
256|cooling_device3: 269|cooling_device3:
257 |-----type: Fan 270 |---type: Fan
258 |-----max_state: 2 271 |---max_state: 2
259 |-----cur_state: 0 272 |---cur_state: 0
260 273
261/sys/class/hwmon: 274/sys/class/hwmon:
262 275
263|hwmon0: 276|hwmon0:
264 |-----name: acpitz 277 |---name: acpitz
265 |-----temp1_input: 37000 278 |---temp1_input: 37000
266 |-----temp1_crit: 100000 279 |---temp1_crit: 100000
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index c41234f1b825..3a9319f93e89 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -11,6 +11,9 @@ config M32R
11 select HAVE_IDE 11 select HAVE_IDE
12 select HAVE_OPROFILE 12 select HAVE_OPROFILE
13 select INIT_ALL_POSSIBLE 13 select INIT_ALL_POSSIBLE
14 select HAVE_KERNEL_GZIP
15 select HAVE_KERNEL_BZIP2
16 select HAVE_KERNEL_LZMA
14 17
15config SBUS 18config SBUS
16 bool 19 bool
diff --git a/arch/m32r/boot/compressed/Makefile b/arch/m32r/boot/compressed/Makefile
index 560484ae35ec..1003880d0dfd 100644
--- a/arch/m32r/boot/compressed/Makefile
+++ b/arch/m32r/boot/compressed/Makefile
@@ -4,8 +4,8 @@
4# create a compressed vmlinux image from the original vmlinux 4# create a compressed vmlinux image from the original vmlinux
5# 5#
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \
8 piggy.o vmlinux.lds 8 vmlinux.bin.lzma head.o misc.o piggy.o vmlinux.lds
9 9
10OBJECTS = $(obj)/head.o $(obj)/misc.o 10OBJECTS = $(obj)/head.o $(obj)/misc.o
11 11
@@ -27,6 +27,12 @@ $(obj)/vmlinux.bin: vmlinux FORCE
27$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 27$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
28 $(call if_changed,gzip) 28 $(call if_changed,gzip)
29 29
30$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
31 $(call if_changed,bzip2)
32
33$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
34 $(call if_changed,lzma)
35
30CFLAGS_misc.o += -fpic 36CFLAGS_misc.o += -fpic
31 37
32ifdef CONFIG_MMU 38ifdef CONFIG_MMU
@@ -37,5 +43,9 @@ endif
37 43
38OBJCOPYFLAGS += -R .empty_zero_page 44OBJCOPYFLAGS += -R .empty_zero_page
39 45
40$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE 46suffix_$(CONFIG_KERNEL_GZIP) = gz
47suffix_$(CONFIG_KERNEL_BZIP2) = bz2
48suffix_$(CONFIG_KERNEL_LZMA) = lzma
49
50$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE
41 $(call if_changed,ld) 51 $(call if_changed,ld)
diff --git a/arch/m32r/boot/compressed/misc.c b/arch/m32r/boot/compressed/misc.c
index d394292498c0..370d60881977 100644
--- a/arch/m32r/boot/compressed/misc.c
+++ b/arch/m32r/boot/compressed/misc.c
@@ -9,140 +9,49 @@
9 * Adapted for SH by Stuart Menefy, Aug 1999 9 * Adapted for SH by Stuart Menefy, Aug 1999
10 * 10 *
11 * 2003-02-12: Support M32R by Takeo Takahashi 11 * 2003-02-12: Support M32R by Takeo Takahashi
12 * This is based on arch/sh/boot/compressed/misc.c.
13 */ 12 */
14 13
15#include <linux/string.h>
16
17/* 14/*
18 * gzip declarations 15 * gzip declarations
19 */ 16 */
20
21#define OF(args) args
22#define STATIC static 17#define STATIC static
23 18
24#undef memset 19#undef memset
25#undef memcpy 20#undef memcpy
26#define memzero(s, n) memset ((s), 0, (n)) 21#define memzero(s, n) memset ((s), 0, (n))
27 22
28typedef unsigned char uch;
29typedef unsigned short ush;
30typedef unsigned long ulg;
31
32#define WSIZE 0x8000 /* Window size must be at least 32k, */
33 /* and a power of two */
34
35static uch *inbuf; /* input buffer */
36static uch window[WSIZE]; /* Sliding window buffer */
37
38static unsigned insize = 0; /* valid bytes in inbuf */
39static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
40static unsigned outcnt = 0; /* bytes in output buffer */
41
42/* gzip flag byte */
43#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
44#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
45#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
46#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
47#define COMMENT 0x10 /* bit 4 set: file comment present */
48#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
49#define RESERVED 0xC0 /* bit 6,7: reserved */
50
51#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
52
53/* Diagnostic functions */
54#ifdef DEBUG
55# define Assert(cond,msg) {if(!(cond)) error(msg);}
56# define Trace(x) fprintf x
57# define Tracev(x) {if (verbose) fprintf x ;}
58# define Tracevv(x) {if (verbose>1) fprintf x ;}
59# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
60# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
61#else
62# define Assert(cond,msg)
63# define Trace(x)
64# define Tracev(x)
65# define Tracevv(x)
66# define Tracec(c,x)
67# define Tracecv(c,x)
68#endif
69
70static int fill_inbuf(void);
71static void flush_window(void);
72static void error(char *m); 23static void error(char *m);
73 24
74static unsigned char *input_data;
75static int input_len;
76
77static long bytes_out = 0;
78static uch *output_data;
79static unsigned long output_ptr = 0;
80
81#include "m32r_sio.c" 25#include "m32r_sio.c"
82 26
83static unsigned long free_mem_ptr; 27static unsigned long free_mem_ptr;
84static unsigned long free_mem_end_ptr; 28static unsigned long free_mem_end_ptr;
85 29
86#define HEAP_SIZE 0x10000 30#ifdef CONFIG_KERNEL_BZIP2
87 31static void *memset(void *s, int c, size_t n)
88#include "../../../../lib/inflate.c"
89
90void* memset(void* s, int c, size_t n)
91{ 32{
92 int i; 33 char *ss = s;
93 char *ss = (char*)s;
94 34
95 for (i=0;i<n;i++) ss[i] = c; 35 while (n--)
36 *ss++ = c;
96 return s; 37 return s;
97} 38}
39#endif
98 40
99void* memcpy(void* __dest, __const void* __src, 41#ifdef CONFIG_KERNEL_GZIP
100 size_t __n) 42#define BOOT_HEAP_SIZE 0x10000
101{ 43#include "../../../../lib/decompress_inflate.c"
102 int i; 44#endif
103 char *d = (char *)__dest, *s = (char *)__src;
104
105 for (i=0;i<__n;i++) d[i] = s[i];
106 return __dest;
107}
108
109/* ===========================================================================
110 * Fill the input buffer. This is called only when the buffer is empty
111 * and at least one byte is really needed.
112 */
113static int fill_inbuf(void)
114{
115 if (insize != 0) {
116 error("ran out of input data");
117 }
118
119 inbuf = input_data;
120 insize = input_len;
121 inptr = 1;
122 return inbuf[0];
123}
124 45
125/* =========================================================================== 46#ifdef CONFIG_KERNEL_BZIP2
126 * Write the output window window[0..outcnt-1] and update crc and bytes_out. 47#define BOOT_HEAP_SIZE 0x400000
127 * (Used for the decompressed data only.) 48#include "../../../../lib/decompress_bunzip2.c"
128 */ 49#endif
129static void flush_window(void)
130{
131 ulg c = crc; /* temporary variable */
132 unsigned n;
133 uch *in, *out, ch;
134 50
135 in = window; 51#ifdef CONFIG_KERNEL_LZMA
136 out = &output_data[output_ptr]; 52#define BOOT_HEAP_SIZE 0x10000
137 for (n = 0; n < outcnt; n++) { 53#include "../../../../lib/decompress_unlzma.c"
138 ch = *out++ = *in++; 54#endif
139 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
140 }
141 crc = c;
142 bytes_out += (ulg)outcnt;
143 output_ptr += (ulg)outcnt;
144 outcnt = 0;
145}
146 55
147static void error(char *x) 56static void error(char *x)
148{ 57{
@@ -153,20 +62,20 @@ static void error(char *x)
153 while(1); /* Halt */ 62 while(1); /* Halt */
154} 63}
155 64
156/* return decompressed size */
157void 65void
158decompress_kernel(int mmu_on, unsigned char *zimage_data, 66decompress_kernel(int mmu_on, unsigned char *zimage_data,
159 unsigned int zimage_len, unsigned long heap) 67 unsigned int zimage_len, unsigned long heap)
160{ 68{
69 unsigned char *input_data = zimage_data;
70 int input_len = zimage_len;
71 unsigned char *output_data;
72
161 output_data = (unsigned char *)CONFIG_MEMORY_START + 0x2000 73 output_data = (unsigned char *)CONFIG_MEMORY_START + 0x2000
162 + (mmu_on ? 0x80000000 : 0); 74 + (mmu_on ? 0x80000000 : 0);
163 free_mem_ptr = heap; 75 free_mem_ptr = heap;
164 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; 76 free_mem_end_ptr = free_mem_ptr + BOOT_HEAP_SIZE;
165 input_data = zimage_data;
166 input_len = zimage_len;
167 77
168 makecrc(); 78 puts("\nDecompressing Linux... ");
169 puts("Uncompressing Linux... "); 79 decompress(input_data, input_len, NULL, NULL, output_data, NULL, error);
170 gunzip(); 80 puts("done.\nBooting the kernel.\n");
171 puts("Ok, booting the kernel.\n");
172} 81}
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c
index 8a88f1f0a3e2..31cef20b2996 100644
--- a/arch/m32r/kernel/smp.c
+++ b/arch/m32r/kernel/smp.c
@@ -806,7 +806,7 @@ unsigned long send_IPI_mask_phys(cpumask_t physid_mask, int ipi_num,
806 806
807 if (mask & ~physids_coerce(phys_cpu_present_map)) 807 if (mask & ~physids_coerce(phys_cpu_present_map))
808 BUG(); 808 BUG();
809 if (ipi_num >= NR_IPIS) 809 if (ipi_num >= NR_IPIS || ipi_num < 0)
810 BUG(); 810 BUG();
811 811
812 mask <<= IPI_SHIFT; 812 mask <<= IPI_SHIFT;
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index e7fee0f198d5..9cedcef11575 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -75,7 +75,7 @@ u32 arch_gettimeoffset(void)
75 count = 0; 75 count = 0;
76 76
77 count = (latch - count) * TICK_SIZE; 77 count = (latch - count) * TICK_SIZE;
78 elapsed_time = (count + latch / 2) / latch; 78 elapsed_time = DIV_ROUND_CLOSEST(count, latch);
79 /* NOTE: LATCH is equal to the "interval" value (= reload count). */ 79 /* NOTE: LATCH is equal to the "interval" value (= reload count). */
80 80
81#else /* CONFIG_SMP */ 81#else /* CONFIG_SMP */
@@ -93,7 +93,7 @@ u32 arch_gettimeoffset(void)
93 p_count = count; 93 p_count = count;
94 94
95 count = (latch - count) * TICK_SIZE; 95 count = (latch - count) * TICK_SIZE;
96 elapsed_time = (count + latch / 2) / latch; 96 elapsed_time = DIV_ROUND_CLOSEST(count, latch);
97 /* NOTE: LATCH is equal to the "interval" value (= reload count). */ 97 /* NOTE: LATCH is equal to the "interval" value (= reload count). */
98#endif /* CONFIG_SMP */ 98#endif /* CONFIG_SMP */
99#elif defined(CONFIG_CHIP_M32310) 99#elif defined(CONFIG_CHIP_M32310)
@@ -211,7 +211,7 @@ void __init time_init(void)
211 211
212 bus_clock = boot_cpu_data.bus_clock; 212 bus_clock = boot_cpu_data.bus_clock;
213 divide = boot_cpu_data.timer_divide; 213 divide = boot_cpu_data.timer_divide;
214 latch = (bus_clock/divide + HZ / 2) / HZ; 214 latch = DIV_ROUND_CLOSEST(bus_clock/divide, HZ);
215 215
216 printk("Timer start : latch = %ld\n", latch); 216 printk("Timer start : latch = %ld\n", latch);
217 217
diff --git a/arch/m32r/kernel/vmlinux.lds.S b/arch/m32r/kernel/vmlinux.lds.S
index 8ceb6181d805..7da94eaa082b 100644
--- a/arch/m32r/kernel/vmlinux.lds.S
+++ b/arch/m32r/kernel/vmlinux.lds.S
@@ -42,6 +42,8 @@ SECTIONS
42 _etext = .; /* End of text section */ 42 _etext = .; /* End of text section */
43 43
44 EXCEPTION_TABLE(16) 44 EXCEPTION_TABLE(16)
45 NOTES
46
45 RODATA 47 RODATA
46 RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE) 48 RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
47 _edata = .; /* End of data section */ 49 _edata = .; /* End of data section */
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 10a0a5488a44..2ba14e77296c 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -414,6 +414,10 @@ config ARCH_SPARSEMEM_DEFAULT
414config ARCH_POPULATES_NODE_MAP 414config ARCH_POPULATES_NODE_MAP
415 def_bool y 415 def_bool y
416 416
417config SYS_SUPPORTS_HUGETLBFS
418 def_bool y
419 depends on PPC_BOOK3S_64
420
417source "mm/Kconfig" 421source "mm/Kconfig"
418 422
419config ARCH_MEMORY_PROBE 423config ARCH_MEMORY_PROBE
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 92dc844299b6..a136a11c490d 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -777,7 +777,7 @@ int update_persistent_clock(struct timespec now)
777 return ppc_md.set_rtc_time(&tm); 777 return ppc_md.set_rtc_time(&tm);
778} 778}
779 779
780void read_persistent_clock(struct timespec *ts) 780static void __read_persistent_clock(struct timespec *ts)
781{ 781{
782 struct rtc_time tm; 782 struct rtc_time tm;
783 static int first = 1; 783 static int first = 1;
@@ -800,10 +800,23 @@ void read_persistent_clock(struct timespec *ts)
800 return; 800 return;
801 } 801 }
802 ppc_md.get_rtc_time(&tm); 802 ppc_md.get_rtc_time(&tm);
803
803 ts->tv_sec = mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday, 804 ts->tv_sec = mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
804 tm.tm_hour, tm.tm_min, tm.tm_sec); 805 tm.tm_hour, tm.tm_min, tm.tm_sec);
805} 806}
806 807
808void read_persistent_clock(struct timespec *ts)
809{
810 __read_persistent_clock(ts);
811
812 /* Sanitize it in case real time clock is set below EPOCH */
813 if (ts->tv_sec < 0) {
814 ts->tv_sec = 0;
815 ts->tv_nsec = 0;
816 }
817
818}
819
807/* clocksource code */ 820/* clocksource code */
808static cycle_t rtc_read(struct clocksource *cs) 821static cycle_t rtc_read(struct clocksource *cs)
809{ 822{
diff --git a/arch/powerpc/kvm/timing.h b/arch/powerpc/kvm/timing.h
index bb13b1f3cd5a..806ef67868bd 100644
--- a/arch/powerpc/kvm/timing.h
+++ b/arch/powerpc/kvm/timing.h
@@ -48,7 +48,11 @@ static inline void kvmppc_set_exit_type(struct kvm_vcpu *vcpu, int type) {}
48static inline void kvmppc_account_exit_stat(struct kvm_vcpu *vcpu, int type) 48static inline void kvmppc_account_exit_stat(struct kvm_vcpu *vcpu, int type)
49{ 49{
50 /* type has to be known at build time for optimization */ 50 /* type has to be known at build time for optimization */
51
52 /* The BUILD_BUG_ON below breaks in funny ways, commented out
53 * for now ... -BenH
51 BUILD_BUG_ON(__builtin_constant_p(type)); 54 BUILD_BUG_ON(__builtin_constant_p(type));
55 */
52 switch (type) { 56 switch (type) {
53 case EXT_INTR_EXITS: 57 case EXT_INTR_EXITS:
54 vcpu->stat.ext_intr_exits++; 58 vcpu->stat.ext_intr_exits++;
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index c2f93dc470e6..be4f34c30a0b 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -25,8 +25,8 @@
25 * also clear mm->cpu_vm_mask bits when processes are migrated 25 * also clear mm->cpu_vm_mask bits when processes are migrated
26 */ 26 */
27 27
28#define DEBUG_MAP_CONSISTENCY 28//#define DEBUG_MAP_CONSISTENCY
29#define DEBUG_CLAMP_LAST_CONTEXT 31 29//#define DEBUG_CLAMP_LAST_CONTEXT 31
30//#define DEBUG_HARDER 30//#define DEBUG_HARDER
31 31
32/* We don't use DEBUG because it tends to be compiled in always nowadays 32/* We don't use DEBUG because it tends to be compiled in always nowadays
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index bf2e1ac41308..1164c3430f2c 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -432,8 +432,6 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
432 /* Read config space back so we can restore after reset */ 432 /* Read config space back so we can restore after reset */
433 read_msi_msg(virq, &msg); 433 read_msi_msg(virq, &msg);
434 entry->msg = msg; 434 entry->msg = msg;
435
436 unmask_msi_irq(virq);
437 } 435 }
438 436
439 return 0; 437 return 0;
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 419f8a637ffe..b9bf0eedccf2 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/radix-tree.h> 19#include <linux/radix-tree.h>
20#include <linux/cpu.h> 20#include <linux/cpu.h>
21#include <linux/msi.h>
21#include <linux/of.h> 22#include <linux/of.h>
22 23
23#include <asm/firmware.h> 24#include <asm/firmware.h>
@@ -219,6 +220,14 @@ static void xics_unmask_irq(unsigned int virq)
219 220
220static unsigned int xics_startup(unsigned int virq) 221static unsigned int xics_startup(unsigned int virq)
221{ 222{
223 /*
224 * The generic MSI code returns with the interrupt disabled on the
225 * card, using the MSI mask bits. Firmware doesn't appear to unmask
226 * at that level, so we do it here by hand.
227 */
228 if (irq_to_desc(virq)->msi_desc)
229 unmask_msi_irq(virq);
230
222 /* unmask it */ 231 /* unmask it */
223 xics_unmask_irq(virq); 232 xics_unmask_irq(virq);
224 return 0; 233 return 0;
diff --git a/arch/x86/include/asm/amd_iommu.h b/arch/x86/include/asm/amd_iommu.h
index ac95995b7bad..4b180897e6b5 100644
--- a/arch/x86/include/asm/amd_iommu.h
+++ b/arch/x86/include/asm/amd_iommu.h
@@ -31,6 +31,7 @@ extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
31extern void amd_iommu_flush_all_domains(void); 31extern void amd_iommu_flush_all_domains(void);
32extern void amd_iommu_flush_all_devices(void); 32extern void amd_iommu_flush_all_devices(void);
33extern void amd_iommu_shutdown(void); 33extern void amd_iommu_shutdown(void);
34extern void amd_iommu_apply_erratum_63(u16 devid);
34#else 35#else
35static inline int amd_iommu_init(void) { return -ENODEV; } 36static inline int amd_iommu_init(void) { return -ENODEV; }
36static inline void amd_iommu_detect(void) { } 37static inline void amd_iommu_detect(void) { }
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index e8de2f6f5ca5..617bd56b3070 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -288,7 +288,7 @@ static inline void load_LDT(mm_context_t *pc)
288 288
289static inline unsigned long get_desc_base(const struct desc_struct *desc) 289static inline unsigned long get_desc_base(const struct desc_struct *desc)
290{ 290{
291 return desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24); 291 return (unsigned)(desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24));
292} 292}
293 293
294static inline void set_desc_base(struct desc_struct *desc, unsigned long base) 294static inline void set_desc_base(struct desc_struct *desc, unsigned long base)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index c3429e8b2424..c9786480f0fe 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -1000,7 +1000,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
1000#define thread_saved_pc(t) (*(unsigned long *)((t)->thread.sp - 8)) 1000#define thread_saved_pc(t) (*(unsigned long *)((t)->thread.sp - 8))
1001 1001
1002#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1) 1002#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
1003#define KSTK_ESP(tsk) -1 /* sorry. doesn't work for syscall. */ 1003extern unsigned long KSTK_ESP(struct task_struct *task);
1004#endif /* CONFIG_X86_64 */ 1004#endif /* CONFIG_X86_64 */
1005 1005
1006extern void start_thread(struct pt_regs *regs, unsigned long new_ip, 1006extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index d823c245f63b..40e37b10c6c0 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -143,7 +143,7 @@ extern unsigned long node_remap_size[];
143 | 1*SD_BALANCE_FORK \ 143 | 1*SD_BALANCE_FORK \
144 | 0*SD_BALANCE_WAKE \ 144 | 0*SD_BALANCE_WAKE \
145 | 1*SD_WAKE_AFFINE \ 145 | 1*SD_WAKE_AFFINE \
146 | 1*SD_PREFER_LOCAL \ 146 | 0*SD_PREFER_LOCAL \
147 | 0*SD_SHARE_CPUPOWER \ 147 | 0*SD_SHARE_CPUPOWER \
148 | 0*SD_POWERSAVINGS_BALANCE \ 148 | 0*SD_POWERSAVINGS_BALANCE \
149 | 0*SD_SHARE_PKG_RESOURCES \ 149 | 0*SD_SHARE_PKG_RESOURCES \
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 98f230f6a28d..0285521e0a99 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1220,6 +1220,8 @@ static void __detach_device(struct protection_domain *domain, u16 devid)
1220 amd_iommu_dev_table[devid].data[1] = 0; 1220 amd_iommu_dev_table[devid].data[1] = 0;
1221 amd_iommu_dev_table[devid].data[2] = 0; 1221 amd_iommu_dev_table[devid].data[2] = 0;
1222 1222
1223 amd_iommu_apply_erratum_63(devid);
1224
1223 /* decrease reference counter */ 1225 /* decrease reference counter */
1224 domain->dev_cnt -= 1; 1226 domain->dev_cnt -= 1;
1225 1227
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index b4b61d462dcc..c20001e4f556 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -240,7 +240,7 @@ static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
240 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); 240 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
241} 241}
242 242
243static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit) 243static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
244{ 244{
245 u32 ctrl; 245 u32 ctrl;
246 246
@@ -519,6 +519,26 @@ static void set_dev_entry_bit(u16 devid, u8 bit)
519 amd_iommu_dev_table[devid].data[i] |= (1 << _bit); 519 amd_iommu_dev_table[devid].data[i] |= (1 << _bit);
520} 520}
521 521
522static int get_dev_entry_bit(u16 devid, u8 bit)
523{
524 int i = (bit >> 5) & 0x07;
525 int _bit = bit & 0x1f;
526
527 return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit;
528}
529
530
531void amd_iommu_apply_erratum_63(u16 devid)
532{
533 int sysmgt;
534
535 sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) |
536 (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1);
537
538 if (sysmgt == 0x01)
539 set_dev_entry_bit(devid, DEV_ENTRY_IW);
540}
541
522/* Writes the specific IOMMU for a device into the rlookup table */ 542/* Writes the specific IOMMU for a device into the rlookup table */
523static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) 543static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid)
524{ 544{
@@ -547,6 +567,8 @@ static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu,
547 if (flags & ACPI_DEVFLAG_LINT1) 567 if (flags & ACPI_DEVFLAG_LINT1)
548 set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); 568 set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS);
549 569
570 amd_iommu_apply_erratum_63(devid);
571
550 set_iommu_for_device(iommu, devid); 572 set_iommu_for_device(iommu, devid);
551} 573}
552 574
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
index 315738c74aad..73c86db5acbe 100644
--- a/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -846,7 +846,7 @@ int __init mtrr_cleanup(unsigned address_bits)
846 sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL); 846 sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL);
847 847
848 range_sums = sum_ranges(range, nr_range); 848 range_sums = sum_ranges(range, nr_range);
849 printk(KERN_INFO "total RAM coverred: %ldM\n", 849 printk(KERN_INFO "total RAM covered: %ldM\n",
850 range_sums >> (20 - PAGE_SHIFT)); 850 range_sums >> (20 - PAGE_SHIFT));
851 851
852 if (mtrr_chunk_size && mtrr_gran_size) { 852 if (mtrr_chunk_size && mtrr_gran_size) {
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index ad535b683170..eb62cbcaa490 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -664,3 +664,8 @@ long sys_arch_prctl(int code, unsigned long addr)
664 return do_arch_prctl(current, code, addr); 664 return do_arch_prctl(current, code, addr);
665} 665}
666 666
667unsigned long KSTK_ESP(struct task_struct *task)
668{
669 return (test_tsk_thread_flag(task, TIF_IA32)) ?
670 (task_pt_regs(task)->sp) : ((task)->thread.usersp);
671}
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index a1a3cdda06e1..f93078746e00 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -436,6 +436,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
436 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 436 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"),
437 }, 437 },
438 }, 438 },
439 { /* Handle problems with rebooting on Apple Macmini3,1 */
440 .callback = set_pci_reboot,
441 .ident = "Apple Macmini3,1",
442 .matches = {
443 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
444 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"),
445 },
446 },
439 { } 447 { }
440}; 448};
441 449
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 9b9695322f56..ae07d261527c 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1692,7 +1692,7 @@ static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1692 unsigned bank_num = mcg_cap & 0xff, bank; 1692 unsigned bank_num = mcg_cap & 0xff, bank;
1693 1693
1694 r = -EINVAL; 1694 r = -EINVAL;
1695 if (!bank_num) 1695 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1696 goto out; 1696 goto out;
1697 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000)) 1697 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1698 goto out; 1698 goto out;
@@ -4051,7 +4051,7 @@ static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4051 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu); 4051 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4052} 4052}
4053 4053
4054static u32 get_tss_base_addr(struct kvm_vcpu *vcpu, 4054static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4055 struct desc_struct *seg_desc) 4055 struct desc_struct *seg_desc)
4056{ 4056{
4057 u32 base_addr = get_desc_base(seg_desc); 4057 u32 base_addr = get_desc_base(seg_desc);
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 23a4d80fb39e..dfbf70e65860 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -178,6 +178,7 @@ static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
178static void xen_cpuid(unsigned int *ax, unsigned int *bx, 178static void xen_cpuid(unsigned int *ax, unsigned int *bx,
179 unsigned int *cx, unsigned int *dx) 179 unsigned int *cx, unsigned int *dx)
180{ 180{
181 unsigned maskebx = ~0;
181 unsigned maskecx = ~0; 182 unsigned maskecx = ~0;
182 unsigned maskedx = ~0; 183 unsigned maskedx = ~0;
183 184
@@ -185,9 +186,16 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
185 * Mask out inconvenient features, to try and disable as many 186 * Mask out inconvenient features, to try and disable as many
186 * unsupported kernel subsystems as possible. 187 * unsupported kernel subsystems as possible.
187 */ 188 */
188 if (*ax == 1) { 189 switch (*ax) {
190 case 1:
189 maskecx = cpuid_leaf1_ecx_mask; 191 maskecx = cpuid_leaf1_ecx_mask;
190 maskedx = cpuid_leaf1_edx_mask; 192 maskedx = cpuid_leaf1_edx_mask;
193 break;
194
195 case 0xb:
196 /* Suppress extended topology stuff */
197 maskebx = 0;
198 break;
191 } 199 }
192 200
193 asm(XEN_EMULATE_PREFIX "cpuid" 201 asm(XEN_EMULATE_PREFIX "cpuid"
@@ -197,6 +205,7 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
197 "=d" (*dx) 205 "=d" (*dx)
198 : "0" (*ax), "2" (*cx)); 206 : "0" (*ax), "2" (*cx));
199 207
208 *bx &= maskebx;
200 *cx &= maskecx; 209 *cx &= maskecx;
201 *dx &= maskedx; 210 *dx &= maskedx;
202} 211}
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index 069a61017c02..aa1e9535e358 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -196,6 +196,7 @@ enum cfqq_state_flags {
196 CFQ_CFQQ_FLAG_slice_new, /* no requests dispatched in slice */ 196 CFQ_CFQQ_FLAG_slice_new, /* no requests dispatched in slice */
197 CFQ_CFQQ_FLAG_sync, /* synchronous queue */ 197 CFQ_CFQQ_FLAG_sync, /* synchronous queue */
198 CFQ_CFQQ_FLAG_coop, /* has done a coop jump of the queue */ 198 CFQ_CFQQ_FLAG_coop, /* has done a coop jump of the queue */
199 CFQ_CFQQ_FLAG_coop_preempt, /* coop preempt */
199}; 200};
200 201
201#define CFQ_CFQQ_FNS(name) \ 202#define CFQ_CFQQ_FNS(name) \
@@ -222,6 +223,7 @@ CFQ_CFQQ_FNS(prio_changed);
222CFQ_CFQQ_FNS(slice_new); 223CFQ_CFQQ_FNS(slice_new);
223CFQ_CFQQ_FNS(sync); 224CFQ_CFQQ_FNS(sync);
224CFQ_CFQQ_FNS(coop); 225CFQ_CFQQ_FNS(coop);
226CFQ_CFQQ_FNS(coop_preempt);
225#undef CFQ_CFQQ_FNS 227#undef CFQ_CFQQ_FNS
226 228
227#define cfq_log_cfqq(cfqd, cfqq, fmt, args...) \ 229#define cfq_log_cfqq(cfqd, cfqq, fmt, args...) \
@@ -945,10 +947,13 @@ static struct cfq_queue *cfq_set_active_queue(struct cfq_data *cfqd,
945{ 947{
946 if (!cfqq) { 948 if (!cfqq) {
947 cfqq = cfq_get_next_queue(cfqd); 949 cfqq = cfq_get_next_queue(cfqd);
948 if (cfqq) 950 if (cfqq && !cfq_cfqq_coop_preempt(cfqq))
949 cfq_clear_cfqq_coop(cfqq); 951 cfq_clear_cfqq_coop(cfqq);
950 } 952 }
951 953
954 if (cfqq)
955 cfq_clear_cfqq_coop_preempt(cfqq);
956
952 __cfq_set_active_queue(cfqd, cfqq); 957 __cfq_set_active_queue(cfqd, cfqq);
953 return cfqq; 958 return cfqq;
954} 959}
@@ -2051,7 +2056,7 @@ cfq_should_preempt(struct cfq_data *cfqd, struct cfq_queue *new_cfqq,
2051 * it's a metadata request and the current queue is doing regular IO. 2056 * it's a metadata request and the current queue is doing regular IO.
2052 */ 2057 */
2053 if (rq_is_meta(rq) && !cfqq->meta_pending) 2058 if (rq_is_meta(rq) && !cfqq->meta_pending)
2054 return false; 2059 return true;
2055 2060
2056 /* 2061 /*
2057 * Allow an RT request to pre-empt an ongoing non-RT cfqq timeslice. 2062 * Allow an RT request to pre-empt an ongoing non-RT cfqq timeslice.
@@ -2066,8 +2071,16 @@ cfq_should_preempt(struct cfq_data *cfqd, struct cfq_queue *new_cfqq,
2066 * if this request is as-good as one we would expect from the 2071 * if this request is as-good as one we would expect from the
2067 * current cfqq, let it preempt 2072 * current cfqq, let it preempt
2068 */ 2073 */
2069 if (cfq_rq_close(cfqd, rq)) 2074 if (cfq_rq_close(cfqd, rq) && (!cfq_cfqq_coop(new_cfqq) ||
2075 cfqd->busy_queues == 1)) {
2076 /*
2077 * Mark new queue coop_preempt, so its coop flag will not be
2078 * cleared when new queue gets scheduled at the very first time
2079 */
2080 cfq_mark_cfqq_coop_preempt(new_cfqq);
2081 cfq_mark_cfqq_coop(new_cfqq);
2070 return true; 2082 return true;
2083 }
2071 2084
2072 return false; 2085 return false;
2073} 2086}
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index 8e679ef5b231..a4471e3d3853 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -103,9 +103,9 @@
103 103
104#define ACPI_MAX_REFERENCE_COUNT 0x1000 104#define ACPI_MAX_REFERENCE_COUNT 0x1000
105 105
106/* Size of cached memory mapping for system memory operation region */ 106/* Default page size for use in mapping memory for operation regions */
107 107
108#define ACPI_SYSMEM_REGION_WINDOW_SIZE 4096 108#define ACPI_DEFAULT_PAGE_SIZE 4096 /* Must be power of 2 */
109 109
110/* owner_id tracking. 8 entries allows for 255 owner_ids */ 110/* owner_id tracking. 8 entries allows for 255 owner_ids */
111 111
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index 3a54b737d2da..2bd83ac57c3a 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -77,7 +77,8 @@ acpi_ex_system_memory_space_handler(u32 function,
77 void *logical_addr_ptr = NULL; 77 void *logical_addr_ptr = NULL;
78 struct acpi_mem_space_context *mem_info = region_context; 78 struct acpi_mem_space_context *mem_info = region_context;
79 u32 length; 79 u32 length;
80 acpi_size window_size; 80 acpi_size map_length;
81 acpi_size page_boundary_map_length;
81#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED 82#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED
82 u32 remainder; 83 u32 remainder;
83#endif 84#endif
@@ -144,25 +145,39 @@ acpi_ex_system_memory_space_handler(u32 function,
144 } 145 }
145 146
146 /* 147 /*
147 * Don't attempt to map memory beyond the end of the region, and 148 * Attempt to map from the requested address to the end of the region.
148 * constrain the maximum mapping size to something reasonable. 149 * However, we will never map more than one page, nor will we cross
150 * a page boundary.
149 */ 151 */
150 window_size = (acpi_size) 152 map_length = (acpi_size)
151 ((mem_info->address + mem_info->length) - address); 153 ((mem_info->address + mem_info->length) - address);
152 154
153 if (window_size > ACPI_SYSMEM_REGION_WINDOW_SIZE) { 155 /*
154 window_size = ACPI_SYSMEM_REGION_WINDOW_SIZE; 156 * If mapping the entire remaining portion of the region will cross
157 * a page boundary, just map up to the page boundary, do not cross.
158 * On some systems, crossing a page boundary while mapping regions
159 * can cause warnings if the pages have different attributes
160 * due to resource management
161 */
162 page_boundary_map_length =
163 ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address;
164
165 if (!page_boundary_map_length) {
166 page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE;
167 }
168
169 if (map_length > page_boundary_map_length) {
170 map_length = page_boundary_map_length;
155 } 171 }
156 172
157 /* Create a new mapping starting at the address given */ 173 /* Create a new mapping starting at the address given */
158 174
159 mem_info->mapped_logical_address = 175 mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length);
160 acpi_os_map_memory((acpi_physical_address) address, window_size);
161 if (!mem_info->mapped_logical_address) { 176 if (!mem_info->mapped_logical_address) {
162 ACPI_ERROR((AE_INFO, 177 ACPI_ERROR((AE_INFO,
163 "Could not map memory at %8.8X%8.8X, size %X", 178 "Could not map memory at %8.8X%8.8X, size %X",
164 ACPI_FORMAT_NATIVE_UINT(address), 179 ACPI_FORMAT_NATIVE_UINT(address),
165 (u32) window_size)); 180 (u32) map_length));
166 mem_info->mapped_length = 0; 181 mem_info->mapped_length = 0;
167 return_ACPI_STATUS(AE_NO_MEMORY); 182 return_ACPI_STATUS(AE_NO_MEMORY);
168 } 183 }
@@ -170,7 +185,7 @@ acpi_ex_system_memory_space_handler(u32 function,
170 /* Save the physical address and mapping size */ 185 /* Save the physical address and mapping size */
171 186
172 mem_info->mapped_physical_address = address; 187 mem_info->mapped_physical_address = address;
173 mem_info->mapped_length = window_size; 188 mem_info->mapped_length = map_length;
174 } 189 }
175 190
176 /* 191 /*
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c
index e6bfd77986b8..2ef7030a0c28 100644
--- a/drivers/acpi/power_meter.c
+++ b/drivers/acpi/power_meter.c
@@ -294,7 +294,11 @@ static int set_acpi_trip(struct acpi_power_meter_resource *resource)
294 return -EINVAL; 294 return -EINVAL;
295 } 295 }
296 296
297 return data; 297 /* _PTP returns 0 on success, nonzero otherwise */
298 if (data)
299 return -EINVAL;
300
301 return 0;
298} 302}
299 303
300static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, 304static ssize_t set_trip(struct device *dev, struct device_attribute *devattr,
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c
index f8b6f555ba52..d0d25e2e1ced 100644
--- a/drivers/acpi/proc.c
+++ b/drivers/acpi/proc.c
@@ -393,7 +393,7 @@ acpi_system_write_wakeup_device(struct file *file,
393 struct list_head *node, *next; 393 struct list_head *node, *next;
394 char strbuf[5]; 394 char strbuf[5];
395 char str[5] = ""; 395 char str[5] = "";
396 int len = count; 396 unsigned int len = count;
397 struct acpi_device *found_dev = NULL; 397 struct acpi_device *found_dev = NULL;
398 398
399 if (len > 4) 399 if (len > 4)
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index c567b46dfa0f..ec742a4e5635 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -770,7 +770,7 @@ static struct notifier_block acpi_cpu_notifier =
770 .notifier_call = acpi_cpu_soft_notify, 770 .notifier_call = acpi_cpu_soft_notify,
771}; 771};
772 772
773static int acpi_processor_add(struct acpi_device *device) 773static int __cpuinit acpi_processor_add(struct acpi_device *device)
774{ 774{
775 struct acpi_processor *pr = NULL; 775 struct acpi_processor *pr = NULL;
776 int result = 0; 776 int result = 0;
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 4c6c14c1e307..1c5d7a8b2fdf 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -1133,15 +1133,15 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr)
1133 int result = 0; 1133 int result = 0;
1134 struct acpi_processor_throttling *pthrottling; 1134 struct acpi_processor_throttling *pthrottling;
1135 1135
1136 if (!pr)
1137 return -EINVAL;
1138
1136 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1139 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1137 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", 1140 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n",
1138 pr->throttling.address, 1141 pr->throttling.address,
1139 pr->throttling.duty_offset, 1142 pr->throttling.duty_offset,
1140 pr->throttling.duty_width)); 1143 pr->throttling.duty_width));
1141 1144
1142 if (!pr)
1143 return -EINVAL;
1144
1145 /* 1145 /*
1146 * Evaluate _PTC, _TSS and _TPC 1146 * Evaluate _PTC, _TSS and _TPC
1147 * They must all be present or none of them can be used. 1147 * They must all be present or none of them can be used.
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index a90afcc723ab..4cc1b8116e76 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -413,6 +413,30 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
413 }, 413 },
414 }, 414 },
415 { 415 {
416 .callback = init_set_sci_en_on_resume,
417 .ident = "Hewlett-Packard Pavilion dv4",
418 .matches = {
419 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
420 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"),
421 },
422 },
423 {
424 .callback = init_set_sci_en_on_resume,
425 .ident = "Hewlett-Packard Pavilion dv7",
426 .matches = {
427 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
428 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"),
429 },
430 },
431 {
432 .callback = init_set_sci_en_on_resume,
433 .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC",
434 .matches = {
435 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
436 DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"),
437 },
438 },
439 {
416 .callback = init_old_suspend_ordering, 440 .callback = init_old_suspend_ordering,
417 .ident = "Panasonic CF51-2L", 441 .ident = "Panasonic CF51-2L",
418 .matches = { 442 .matches = {
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 64e3c581b7a9..05dff631591c 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -1223,7 +1223,7 @@ acpi_video_device_write_state(struct file *file,
1223 u32 state = 0; 1223 u32 state = 0;
1224 1224
1225 1225
1226 if (!dev || count + 1 > sizeof str) 1226 if (!dev || count >= sizeof(str))
1227 return -EINVAL; 1227 return -EINVAL;
1228 1228
1229 if (copy_from_user(str, buffer, count)) 1229 if (copy_from_user(str, buffer, count))
@@ -1280,7 +1280,7 @@ acpi_video_device_write_brightness(struct file *file,
1280 int i; 1280 int i;
1281 1281
1282 1282
1283 if (!dev || !dev->brightness || count + 1 > sizeof str) 1283 if (!dev || !dev->brightness || count >= sizeof(str))
1284 return -EINVAL; 1284 return -EINVAL;
1285 1285
1286 if (copy_from_user(str, buffer, count)) 1286 if (copy_from_user(str, buffer, count))
@@ -1562,7 +1562,7 @@ acpi_video_bus_write_POST(struct file *file,
1562 unsigned long long opt, options; 1562 unsigned long long opt, options;
1563 1563
1564 1564
1565 if (!video || count + 1 > sizeof str) 1565 if (!video || count >= sizeof(str))
1566 return -EINVAL; 1566 return -EINVAL;
1567 1567
1568 status = acpi_video_bus_POST_options(video, &options); 1568 status = acpi_video_bus_POST_options(video, &options);
@@ -1602,7 +1602,7 @@ acpi_video_bus_write_DOS(struct file *file,
1602 unsigned long opt; 1602 unsigned long opt;
1603 1603
1604 1604
1605 if (!video || count + 1 > sizeof str) 1605 if (!video || count >= sizeof(str))
1606 return -EINVAL; 1606 return -EINVAL;
1607 1607
1608 if (copy_from_user(str, buffer, count)) 1608 if (copy_from_user(str, buffer, count))
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a06f5d6375a8..a3241a1a710b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -2718,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2718 }, 2718 },
2719 .driver_data = "20071026", /* yyyymmdd */ 2719 .driver_data = "20071026", /* yyyymmdd */
2720 }, 2720 },
2721 /*
2722 * All BIOS versions for the MSI K9A2 Platinum (MS-7376)
2723 * support 64bit DMA.
2724 *
2725 * BIOS versions earlier than 1.5 had the Manufacturer DMI
2726 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD".
2727 * This spelling mistake was fixed in BIOS version 1.5, so
2728 * 1.5 and later have the Manufacturer as
2729 * "MICRO-STAR INTERNATIONAL CO.,LTD".
2730 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER".
2731 *
2732 * BIOS versions earlier than 1.9 had a Board Product Name
2733 * DMI field of "MS-7376". This was changed to be
2734 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still
2735 * match on DMI_BOARD_NAME of "MS-7376".
2736 */
2737 {
2738 .ident = "MSI K9A2 Platinum",
2739 .matches = {
2740 DMI_MATCH(DMI_BOARD_VENDOR,
2741 "MICRO-STAR INTER"),
2742 DMI_MATCH(DMI_BOARD_NAME, "MS-7376"),
2743 },
2744 },
2721 { } 2745 { }
2722 }; 2746 };
2723 const struct dmi_system_id *match; 2747 const struct dmi_system_id *match;
@@ -2729,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2729 !match) 2753 !match)
2730 return false; 2754 return false;
2731 2755
2756 if (!match->driver_data)
2757 goto enable_64bit;
2758
2732 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); 2759 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
2733 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); 2760 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
2734 2761
2735 if (strcmp(buf, match->driver_data) >= 0) { 2762 if (strcmp(buf, match->driver_data) >= 0)
2736 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", 2763 goto enable_64bit;
2737 match->ident); 2764 else {
2738 return true;
2739 } else {
2740 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " 2765 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, "
2741 "forcing 32bit DMA, update BIOS\n", match->ident); 2766 "forcing 32bit DMA, update BIOS\n", match->ident);
2742 return false; 2767 return false;
2743 } 2768 }
2769
2770enable_64bit:
2771 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n",
2772 match->ident);
2773 return true;
2744} 2774}
2745 2775
2746static bool ahci_broken_system_poweroff(struct pci_dev *pdev) 2776static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index d7f0f1b1ae3e..dc72690ed5db 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4919 */ 4919 */
4920void ata_qc_free(struct ata_queued_cmd *qc) 4920void ata_qc_free(struct ata_queued_cmd *qc)
4921{ 4921{
4922 struct ata_port *ap = qc->ap; 4922 struct ata_port *ap;
4923 unsigned int tag; 4923 unsigned int tag;
4924 4924
4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4926 ap = qc->ap;
4926 4927
4927 qc->flags = 0; 4928 qc->flags = 0;
4928 tag = qc->tag; 4929 tag = qc->tag;
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc)
4934 4935
4935void __ata_qc_complete(struct ata_queued_cmd *qc) 4936void __ata_qc_complete(struct ata_queued_cmd *qc)
4936{ 4937{
4937 struct ata_port *ap = qc->ap; 4938 struct ata_port *ap;
4938 struct ata_link *link = qc->dev->link; 4939 struct ata_link *link;
4939 4940
4940 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4941 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4941 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); 4942 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
4943 ap = qc->ap;
4944 link = qc->dev->link;
4942 4945
4943 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 4946 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4944 ata_sg_clean(qc); 4947 ata_sg_clean(qc);
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index bdd43c7f432e..02efd9a83d26 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = {
93 { PCI_VDEVICE(VIA, 0x7372), vt6420 }, 93 { PCI_VDEVICE(VIA, 0x7372), vt6420 },
94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ 94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
95 { PCI_VDEVICE(VIA, 0x9000), vt8251 }, 95 { PCI_VDEVICE(VIA, 0x9000), vt8251 },
96 { PCI_VDEVICE(VIA, 0x9040), vt8251 },
97 96
98 { } /* terminate list */ 97 { } /* terminate list */
99}; 98};
diff --git a/drivers/char/hvc_xen.c b/drivers/char/hvc_xen.c
index eba999f8598d..a6ee32b599a8 100644
--- a/drivers/char/hvc_xen.c
+++ b/drivers/char/hvc_xen.c
@@ -55,7 +55,7 @@ static inline void notify_daemon(void)
55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); 55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn);
56} 56}
57 57
58static int write_console(uint32_t vtermno, const char *data, int len) 58static int __write_console(const char *data, int len)
59{ 59{
60 struct xencons_interface *intf = xencons_interface(); 60 struct xencons_interface *intf = xencons_interface();
61 XENCONS_RING_IDX cons, prod; 61 XENCONS_RING_IDX cons, prod;
@@ -76,6 +76,29 @@ static int write_console(uint32_t vtermno, const char *data, int len)
76 return sent; 76 return sent;
77} 77}
78 78
79static int write_console(uint32_t vtermno, const char *data, int len)
80{
81 int ret = len;
82
83 /*
84 * Make sure the whole buffer is emitted, polling if
85 * necessary. We don't ever want to rely on the hvc daemon
86 * because the most interesting console output is when the
87 * kernel is crippled.
88 */
89 while (len) {
90 int sent = __write_console(data, len);
91
92 data += sent;
93 len -= sent;
94
95 if (unlikely(len))
96 HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
97 }
98
99 return ret;
100}
101
79static int read_console(uint32_t vtermno, char *buf, int len) 102static int read_console(uint32_t vtermno, char *buf, int len)
80{ 103{
81 struct xencons_interface *intf = xencons_interface(); 104 struct xencons_interface *intf = xencons_interface();
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index d4560d9d5a83..a38831c82649 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
2254{ 2254{
2255 u32 ec = ERROR_CODE(info->nbsl); 2255 u32 ec = ERROR_CODE(info->nbsl);
2256 u32 xec = EXT_ERROR_CODE(info->nbsl); 2256 u32 xec = EXT_ERROR_CODE(info->nbsl);
2257 int ecc_type = info->nbsh & (0x3 << 13); 2257 int ecc_type = (info->nbsh >> 13) & 0x3;
2258 2258
2259 /* Bail early out if this was an 'observed' error */ 2259 /* Bail early out if this was an 'observed' error */
2260 if (PP(ec) == K8_NBSL_PP_OBS) 2260 if (PP(ec) == K8_NBSL_PP_OBS)
@@ -3163,7 +3163,7 @@ static int __init amd64_edac_init(void)
3163 opstate_init(); 3163 opstate_init();
3164 3164
3165 if (cache_k8_northbridges() < 0) 3165 if (cache_k8_northbridges() < 0)
3166 goto err_exit; 3166 return err;
3167 3167
3168 err = pci_register_driver(&amd64_pci_driver); 3168 err = pci_register_driver(&amd64_pci_driver);
3169 if (err) 3169 if (err)
@@ -3189,8 +3189,6 @@ static int __init amd64_edac_init(void)
3189 3189
3190err_2nd_stage: 3190err_2nd_stage:
3191 debugf0("2nd stage failed\n"); 3191 debugf0("2nd stage failed\n");
3192
3193err_exit:
3194 pci_unregister_driver(&amd64_pci_driver); 3192 pci_unregister_driver(&amd64_pci_driver);
3195 3193
3196 return err; 3194 return err;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 92aeb918e0c0..e5b138be45fa 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
1227 goto out; 1227 goto out;
1228 1228
1229 /* Try to set up FBC with a reasonable compressed buffer size */ 1229 /* Try to set up FBC with a reasonable compressed buffer size */
1230 if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) && 1230 if (I915_HAS_FBC(dev) && i915_powersave) {
1231 i915_powersave) {
1232 int cfb_size; 1231 int cfb_size;
1233 1232
1234 /* Try to get an 8M buffer... */ 1233 /* Try to get an 8M buffer... */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c5df2234418d..57204e298975 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -296,6 +296,12 @@ typedef struct drm_i915_private {
296 u32 saveVBLANK_A; 296 u32 saveVBLANK_A;
297 u32 saveVSYNC_A; 297 u32 saveVSYNC_A;
298 u32 saveBCLRPAT_A; 298 u32 saveBCLRPAT_A;
299 u32 saveTRANS_HTOTAL_A;
300 u32 saveTRANS_HBLANK_A;
301 u32 saveTRANS_HSYNC_A;
302 u32 saveTRANS_VTOTAL_A;
303 u32 saveTRANS_VBLANK_A;
304 u32 saveTRANS_VSYNC_A;
299 u32 savePIPEASTAT; 305 u32 savePIPEASTAT;
300 u32 saveDSPASTRIDE; 306 u32 saveDSPASTRIDE;
301 u32 saveDSPASIZE; 307 u32 saveDSPASIZE;
@@ -304,8 +310,11 @@ typedef struct drm_i915_private {
304 u32 saveDSPASURF; 310 u32 saveDSPASURF;
305 u32 saveDSPATILEOFF; 311 u32 saveDSPATILEOFF;
306 u32 savePFIT_PGM_RATIOS; 312 u32 savePFIT_PGM_RATIOS;
313 u32 saveBLC_HIST_CTL;
307 u32 saveBLC_PWM_CTL; 314 u32 saveBLC_PWM_CTL;
308 u32 saveBLC_PWM_CTL2; 315 u32 saveBLC_PWM_CTL2;
316 u32 saveBLC_CPU_PWM_CTL;
317 u32 saveBLC_CPU_PWM_CTL2;
309 u32 saveFPB0; 318 u32 saveFPB0;
310 u32 saveFPB1; 319 u32 saveFPB1;
311 u32 saveDPLL_B; 320 u32 saveDPLL_B;
@@ -317,6 +326,12 @@ typedef struct drm_i915_private {
317 u32 saveVBLANK_B; 326 u32 saveVBLANK_B;
318 u32 saveVSYNC_B; 327 u32 saveVSYNC_B;
319 u32 saveBCLRPAT_B; 328 u32 saveBCLRPAT_B;
329 u32 saveTRANS_HTOTAL_B;
330 u32 saveTRANS_HBLANK_B;
331 u32 saveTRANS_HSYNC_B;
332 u32 saveTRANS_VTOTAL_B;
333 u32 saveTRANS_VBLANK_B;
334 u32 saveTRANS_VSYNC_B;
320 u32 savePIPEBSTAT; 335 u32 savePIPEBSTAT;
321 u32 saveDSPBSTRIDE; 336 u32 saveDSPBSTRIDE;
322 u32 saveDSPBSIZE; 337 u32 saveDSPBSIZE;
@@ -342,6 +357,7 @@ typedef struct drm_i915_private {
342 u32 savePFIT_CONTROL; 357 u32 savePFIT_CONTROL;
343 u32 save_palette_a[256]; 358 u32 save_palette_a[256];
344 u32 save_palette_b[256]; 359 u32 save_palette_b[256];
360 u32 saveDPFC_CB_BASE;
345 u32 saveFBC_CFB_BASE; 361 u32 saveFBC_CFB_BASE;
346 u32 saveFBC_LL_BASE; 362 u32 saveFBC_LL_BASE;
347 u32 saveFBC_CONTROL; 363 u32 saveFBC_CONTROL;
@@ -349,6 +365,12 @@ typedef struct drm_i915_private {
349 u32 saveIER; 365 u32 saveIER;
350 u32 saveIIR; 366 u32 saveIIR;
351 u32 saveIMR; 367 u32 saveIMR;
368 u32 saveDEIER;
369 u32 saveDEIMR;
370 u32 saveGTIER;
371 u32 saveGTIMR;
372 u32 saveFDI_RXA_IMR;
373 u32 saveFDI_RXB_IMR;
352 u32 saveCACHE_MODE_0; 374 u32 saveCACHE_MODE_0;
353 u32 saveD_STATE; 375 u32 saveD_STATE;
354 u32 saveDSPCLK_GATE_D; 376 u32 saveDSPCLK_GATE_D;
@@ -382,6 +404,16 @@ typedef struct drm_i915_private {
382 u32 savePIPEB_DP_LINK_M; 404 u32 savePIPEB_DP_LINK_M;
383 u32 savePIPEA_DP_LINK_N; 405 u32 savePIPEA_DP_LINK_N;
384 u32 savePIPEB_DP_LINK_N; 406 u32 savePIPEB_DP_LINK_N;
407 u32 saveFDI_RXA_CTL;
408 u32 saveFDI_TXA_CTL;
409 u32 saveFDI_RXB_CTL;
410 u32 saveFDI_TXB_CTL;
411 u32 savePFA_CTL_1;
412 u32 savePFB_CTL_1;
413 u32 savePFA_WIN_SZ;
414 u32 savePFB_WIN_SZ;
415 u32 savePFA_WIN_POS;
416 u32 savePFB_WIN_POS;
385 417
386 struct { 418 struct {
387 struct drm_mm gtt_space; 419 struct drm_mm gtt_space;
@@ -492,6 +524,8 @@ typedef struct drm_i915_private {
492 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; 524 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
493 } mm; 525 } mm;
494 struct sdvo_device_mapping sdvo_mappings[2]; 526 struct sdvo_device_mapping sdvo_mappings[2];
527 /* indicate whether the LVDS_BORDER should be enabled or not */
528 unsigned int lvds_border_bits;
495 529
496 /* Reclocking support */ 530 /* Reclocking support */
497 bool render_reclock_avail; 531 bool render_reclock_avail;
@@ -981,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
981 1015
982#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) 1016#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
983#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 1017#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
984#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) 1018#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
1019 (IS_I9XX(dev) || IS_GM45(dev)) && \
1020 !IS_IGD(dev) && \
1021 !IS_IGDNG(dev))
985 1022
986#define PRIMARY_RINGBUFFER_SIZE (128*1024) 1023#define PRIMARY_RINGBUFFER_SIZE (128*1024)
987 1024
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddbeba32..1687edf68795 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -968,6 +968,8 @@
968#define LVDS_PORT_EN (1 << 31) 968#define LVDS_PORT_EN (1 << 31)
969/* Selects pipe B for LVDS data. Must be set on pre-965. */ 969/* Selects pipe B for LVDS data. Must be set on pre-965. */
970#define LVDS_PIPEB_SELECT (1 << 30) 970#define LVDS_PIPEB_SELECT (1 << 30)
971/* Enable border for unscaled (or aspect-scaled) display */
972#define LVDS_BORDER_ENABLE (1 << 15)
971/* 973/*
972 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per 974 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
973 * pixel. 975 * pixel.
@@ -1078,6 +1080,8 @@
1078#define BACKLIGHT_DUTY_CYCLE_SHIFT (0) 1080#define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
1079#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) 1081#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)
1080 1082
1083#define BLC_HIST_CTL 0x61260
1084
1081/* TV port control */ 1085/* TV port control */
1082#define TV_CTL 0x68000 1086#define TV_CTL 0x68000
1083/** Enables the TV encoder */ 1087/** Enables the TV encoder */
@@ -1780,6 +1784,11 @@
1780#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ 1784#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
1781#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) 1785#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1)
1782#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) 1786#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0)
1787#define PIPE_BPC_MASK (7 << 5) /* Ironlake */
1788#define PIPE_8BPC (0 << 5)
1789#define PIPE_10BPC (1 << 5)
1790#define PIPE_6BPC (2 << 5)
1791#define PIPE_12BPC (3 << 5)
1783 1792
1784#define DSPARB 0x70030 1793#define DSPARB 0x70030
1785#define DSPARB_CSTART_MASK (0x7f << 7) 1794#define DSPARB_CSTART_MASK (0x7f << 7)
@@ -1790,17 +1799,29 @@
1790#define DSPARB_AEND_SHIFT 0 1799#define DSPARB_AEND_SHIFT 0
1791 1800
1792#define DSPFW1 0x70034 1801#define DSPFW1 0x70034
1802#define DSPFW_SR_SHIFT 23
1803#define DSPFW_CURSORB_SHIFT 16
1804#define DSPFW_PLANEB_SHIFT 8
1793#define DSPFW2 0x70038 1805#define DSPFW2 0x70038
1806#define DSPFW_CURSORA_MASK 0x00003f00
1807#define DSPFW_CURSORA_SHIFT 16
1794#define DSPFW3 0x7003c 1808#define DSPFW3 0x7003c
1809#define DSPFW_HPLL_SR_EN (1<<31)
1810#define DSPFW_CURSOR_SR_SHIFT 24
1795#define IGD_SELF_REFRESH_EN (1<<30) 1811#define IGD_SELF_REFRESH_EN (1<<30)
1796 1812
1797/* FIFO watermark sizes etc */ 1813/* FIFO watermark sizes etc */
1814#define G4X_FIFO_LINE_SIZE 64
1798#define I915_FIFO_LINE_SIZE 64 1815#define I915_FIFO_LINE_SIZE 64
1799#define I830_FIFO_LINE_SIZE 32 1816#define I830_FIFO_LINE_SIZE 32
1817
1818#define G4X_FIFO_SIZE 127
1800#define I945_FIFO_SIZE 127 /* 945 & 965 */ 1819#define I945_FIFO_SIZE 127 /* 945 & 965 */
1801#define I915_FIFO_SIZE 95 1820#define I915_FIFO_SIZE 95
1802#define I855GM_FIFO_SIZE 127 /* In cachelines */ 1821#define I855GM_FIFO_SIZE 127 /* In cachelines */
1803#define I830_FIFO_SIZE 95 1822#define I830_FIFO_SIZE 95
1823
1824#define G4X_MAX_WM 0x3f
1804#define I915_MAX_WM 0x3f 1825#define I915_MAX_WM 0x3f
1805 1826
1806#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */ 1827#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */
@@ -2030,6 +2051,11 @@
2030#define PFA_CTL_1 0x68080 2051#define PFA_CTL_1 0x68080
2031#define PFB_CTL_1 0x68880 2052#define PFB_CTL_1 0x68880
2032#define PF_ENABLE (1<<31) 2053#define PF_ENABLE (1<<31)
2054#define PF_FILTER_MASK (3<<23)
2055#define PF_FILTER_PROGRAMMED (0<<23)
2056#define PF_FILTER_MED_3x3 (1<<23)
2057#define PF_FILTER_EDGE_ENHANCE (2<<23)
2058#define PF_FILTER_EDGE_SOFTEN (3<<23)
2033#define PFA_WIN_SZ 0x68074 2059#define PFA_WIN_SZ 0x68074
2034#define PFB_WIN_SZ 0x68874 2060#define PFB_WIN_SZ 0x68874
2035#define PFA_WIN_POS 0x68070 2061#define PFA_WIN_POS 0x68070
@@ -2149,11 +2175,11 @@
2149#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) 2175#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13)
2150#define DREF_SSC_SOURCE_DISABLE (0<<11) 2176#define DREF_SSC_SOURCE_DISABLE (0<<11)
2151#define DREF_SSC_SOURCE_ENABLE (2<<11) 2177#define DREF_SSC_SOURCE_ENABLE (2<<11)
2152#define DREF_SSC_SOURCE_MASK (2<<11) 2178#define DREF_SSC_SOURCE_MASK (3<<11)
2153#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) 2179#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9)
2154#define DREF_NONSPREAD_CK505_ENABLE (1<<9) 2180#define DREF_NONSPREAD_CK505_ENABLE (1<<9)
2155#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) 2181#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9)
2156#define DREF_NONSPREAD_SOURCE_MASK (2<<9) 2182#define DREF_NONSPREAD_SOURCE_MASK (3<<9)
2157#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) 2183#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7)
2158#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) 2184#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7)
2159#define DREF_SSC4_DOWNSPREAD (0<<6) 2185#define DREF_SSC4_DOWNSPREAD (0<<6)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d91ca9f..992d5617e798 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -32,11 +32,15 @@
32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) 32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
33{ 33{
34 struct drm_i915_private *dev_priv = dev->dev_private; 34 struct drm_i915_private *dev_priv = dev->dev_private;
35 u32 dpll_reg;
35 36
36 if (pipe == PIPE_A) 37 if (IS_IGDNG(dev)) {
37 return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE); 38 dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
38 else 39 } else {
39 return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE); 40 dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
41 }
42
43 return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE);
40} 44}
41 45
42static void i915_save_palette(struct drm_device *dev, enum pipe pipe) 46static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
@@ -49,6 +53,9 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
49 if (!i915_pipe_enabled(dev, pipe)) 53 if (!i915_pipe_enabled(dev, pipe))
50 return; 54 return;
51 55
56 if (IS_IGDNG(dev))
57 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
58
52 if (pipe == PIPE_A) 59 if (pipe == PIPE_A)
53 array = dev_priv->save_palette_a; 60 array = dev_priv->save_palette_a;
54 else 61 else
@@ -68,6 +75,9 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
68 if (!i915_pipe_enabled(dev, pipe)) 75 if (!i915_pipe_enabled(dev, pipe))
69 return; 76 return;
70 77
78 if (IS_IGDNG(dev))
79 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
80
71 if (pipe == PIPE_A) 81 if (pipe == PIPE_A)
72 array = dev_priv->save_palette_a; 82 array = dev_priv->save_palette_a;
73 else 83 else
@@ -232,10 +242,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
232 /* Pipe & plane A info */ 242 /* Pipe & plane A info */
233 dev_priv->savePIPEACONF = I915_READ(PIPEACONF); 243 dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
234 dev_priv->savePIPEASRC = I915_READ(PIPEASRC); 244 dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
235 dev_priv->saveFPA0 = I915_READ(FPA0); 245 if (IS_IGDNG(dev)) {
236 dev_priv->saveFPA1 = I915_READ(FPA1); 246 dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
237 dev_priv->saveDPLL_A = I915_READ(DPLL_A); 247 dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
238 if (IS_I965G(dev)) 248 dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
249 } else {
250 dev_priv->saveFPA0 = I915_READ(FPA0);
251 dev_priv->saveFPA1 = I915_READ(FPA1);
252 dev_priv->saveDPLL_A = I915_READ(DPLL_A);
253 }
254 if (IS_I965G(dev) && !IS_IGDNG(dev))
239 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); 255 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
240 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); 256 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
241 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); 257 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -243,7 +259,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
243 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); 259 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
244 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); 260 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
245 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); 261 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
246 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 262 if (!IS_IGDNG(dev))
263 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
264
265 if (IS_IGDNG(dev)) {
266 dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL);
267 dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL);
268
269 dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1);
270 dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ);
271 dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS);
272
273 dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A);
274 dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A);
275 dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A);
276 dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A);
277 dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A);
278 dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A);
279 }
247 280
248 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); 281 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
249 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); 282 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
@@ -260,10 +293,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
260 /* Pipe & plane B info */ 293 /* Pipe & plane B info */
261 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); 294 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
262 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); 295 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
263 dev_priv->saveFPB0 = I915_READ(FPB0); 296 if (IS_IGDNG(dev)) {
264 dev_priv->saveFPB1 = I915_READ(FPB1); 297 dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
265 dev_priv->saveDPLL_B = I915_READ(DPLL_B); 298 dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
266 if (IS_I965G(dev)) 299 dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
300 } else {
301 dev_priv->saveFPB0 = I915_READ(FPB0);
302 dev_priv->saveFPB1 = I915_READ(FPB1);
303 dev_priv->saveDPLL_B = I915_READ(DPLL_B);
304 }
305 if (IS_I965G(dev) && !IS_IGDNG(dev))
267 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); 306 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
268 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); 307 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
269 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); 308 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -271,7 +310,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
271 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); 310 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
272 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); 311 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
273 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); 312 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
274 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 313 if (!IS_IGDNG(dev))
314 dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
315
316 if (IS_IGDNG(dev)) {
317 dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL);
318 dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL);
319
320 dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1);
321 dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ);
322 dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS);
323
324 dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B);
325 dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B);
326 dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B);
327 dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B);
328 dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B);
329 dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B);
330 }
275 331
276 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); 332 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
277 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); 333 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
@@ -290,23 +346,41 @@ static void i915_save_modeset_reg(struct drm_device *dev)
290static void i915_restore_modeset_reg(struct drm_device *dev) 346static void i915_restore_modeset_reg(struct drm_device *dev)
291{ 347{
292 struct drm_i915_private *dev_priv = dev->dev_private; 348 struct drm_i915_private *dev_priv = dev->dev_private;
349 int dpll_a_reg, fpa0_reg, fpa1_reg;
350 int dpll_b_reg, fpb0_reg, fpb1_reg;
293 351
294 if (drm_core_check_feature(dev, DRIVER_MODESET)) 352 if (drm_core_check_feature(dev, DRIVER_MODESET))
295 return; 353 return;
296 354
355 if (IS_IGDNG(dev)) {
356 dpll_a_reg = PCH_DPLL_A;
357 dpll_b_reg = PCH_DPLL_B;
358 fpa0_reg = PCH_FPA0;
359 fpb0_reg = PCH_FPB0;
360 fpa1_reg = PCH_FPA1;
361 fpb1_reg = PCH_FPB1;
362 } else {
363 dpll_a_reg = DPLL_A;
364 dpll_b_reg = DPLL_B;
365 fpa0_reg = FPA0;
366 fpb0_reg = FPB0;
367 fpa1_reg = FPA1;
368 fpb1_reg = FPB1;
369 }
370
297 /* Pipe & plane A info */ 371 /* Pipe & plane A info */
298 /* Prime the clock */ 372 /* Prime the clock */
299 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 373 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
300 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & 374 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A &
301 ~DPLL_VCO_ENABLE); 375 ~DPLL_VCO_ENABLE);
302 DRM_UDELAY(150); 376 DRM_UDELAY(150);
303 } 377 }
304 I915_WRITE(FPA0, dev_priv->saveFPA0); 378 I915_WRITE(fpa0_reg, dev_priv->saveFPA0);
305 I915_WRITE(FPA1, dev_priv->saveFPA1); 379 I915_WRITE(fpa1_reg, dev_priv->saveFPA1);
306 /* Actually enable it */ 380 /* Actually enable it */
307 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A); 381 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
308 DRM_UDELAY(150); 382 DRM_UDELAY(150);
309 if (IS_I965G(dev)) 383 if (IS_I965G(dev) && !IS_IGDNG(dev))
310 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); 384 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
311 DRM_UDELAY(150); 385 DRM_UDELAY(150);
312 386
@@ -317,7 +391,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
317 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); 391 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
318 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); 392 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
319 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); 393 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
320 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); 394 if (!IS_IGDNG(dev))
395 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
396
397 if (IS_IGDNG(dev)) {
398 I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL);
399 I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL);
400
401 I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1);
402 I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ);
403 I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS);
404
405 I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A);
406 I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A);
407 I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A);
408 I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A);
409 I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A);
410 I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A);
411 }
321 412
322 /* Restore plane info */ 413 /* Restore plane info */
323 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); 414 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
@@ -339,14 +430,14 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
339 430
340 /* Pipe & plane B info */ 431 /* Pipe & plane B info */
341 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { 432 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
342 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & 433 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B &
343 ~DPLL_VCO_ENABLE); 434 ~DPLL_VCO_ENABLE);
344 DRM_UDELAY(150); 435 DRM_UDELAY(150);
345 } 436 }
346 I915_WRITE(FPB0, dev_priv->saveFPB0); 437 I915_WRITE(fpb0_reg, dev_priv->saveFPB0);
347 I915_WRITE(FPB1, dev_priv->saveFPB1); 438 I915_WRITE(fpb1_reg, dev_priv->saveFPB1);
348 /* Actually enable it */ 439 /* Actually enable it */
349 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B); 440 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
350 DRM_UDELAY(150); 441 DRM_UDELAY(150);
351 if (IS_I965G(dev)) 442 if (IS_I965G(dev))
352 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); 443 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
@@ -359,7 +450,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
359 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); 450 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
360 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); 451 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
361 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); 452 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
362 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); 453 if (!IS_IGDNG(dev))
454 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
455
456 if (IS_IGDNG(dev)) {
457 I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL);
458 I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL);
459
460 I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1);
461 I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ);
462 I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS);
463
464 I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B);
465 I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B);
466 I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B);
467 I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B);
468 I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B);
469 I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B);
470 }
363 471
364 /* Restore plane info */ 472 /* Restore plane info */
365 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); 473 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
@@ -404,21 +512,43 @@ void i915_save_display(struct drm_device *dev)
404 dev_priv->saveCURSIZE = I915_READ(CURSIZE); 512 dev_priv->saveCURSIZE = I915_READ(CURSIZE);
405 513
406 /* CRT state */ 514 /* CRT state */
407 dev_priv->saveADPA = I915_READ(ADPA); 515 if (IS_IGDNG(dev)) {
516 dev_priv->saveADPA = I915_READ(PCH_ADPA);
517 } else {
518 dev_priv->saveADPA = I915_READ(ADPA);
519 }
408 520
409 /* LVDS state */ 521 /* LVDS state */
410 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); 522 if (IS_IGDNG(dev)) {
411 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); 523 dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
412 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); 524 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
413 if (IS_I965G(dev)) 525 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
414 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); 526 dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL);
415 if (IS_MOBILE(dev) && !IS_I830(dev)) 527 dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2);
416 dev_priv->saveLVDS = I915_READ(LVDS); 528 dev_priv->saveLVDS = I915_READ(PCH_LVDS);
417 if (!IS_I830(dev) && !IS_845G(dev)) 529 } else {
530 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
531 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
532 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
533 dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
534 if (IS_I965G(dev))
535 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
536 if (IS_MOBILE(dev) && !IS_I830(dev))
537 dev_priv->saveLVDS = I915_READ(LVDS);
538 }
539
540 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
418 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); 541 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
419 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); 542
420 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); 543 if (IS_IGDNG(dev)) {
421 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); 544 dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
545 dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
546 dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
547 } else {
548 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
549 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
550 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
551 }
422 552
423 /* Display Port state */ 553 /* Display Port state */
424 if (SUPPORTS_INTEGRATED_DP(dev)) { 554 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -437,16 +567,23 @@ void i915_save_display(struct drm_device *dev)
437 /* FIXME: save TV & SDVO state */ 567 /* FIXME: save TV & SDVO state */
438 568
439 /* FBC state */ 569 /* FBC state */
440 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); 570 if (IS_GM45(dev)) {
441 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE); 571 dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
442 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); 572 } else {
443 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); 573 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
574 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
575 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
576 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
577 }
444 578
445 /* VGA state */ 579 /* VGA state */
446 dev_priv->saveVGA0 = I915_READ(VGA0); 580 dev_priv->saveVGA0 = I915_READ(VGA0);
447 dev_priv->saveVGA1 = I915_READ(VGA1); 581 dev_priv->saveVGA1 = I915_READ(VGA1);
448 dev_priv->saveVGA_PD = I915_READ(VGA_PD); 582 dev_priv->saveVGA_PD = I915_READ(VGA_PD);
449 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); 583 if (IS_IGDNG(dev))
584 dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
585 else
586 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
450 587
451 i915_save_vga(dev); 588 i915_save_vga(dev);
452} 589}
@@ -485,22 +622,41 @@ void i915_restore_display(struct drm_device *dev)
485 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); 622 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
486 623
487 /* CRT state */ 624 /* CRT state */
488 I915_WRITE(ADPA, dev_priv->saveADPA); 625 if (IS_IGDNG(dev))
626 I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
627 else
628 I915_WRITE(ADPA, dev_priv->saveADPA);
489 629
490 /* LVDS state */ 630 /* LVDS state */
491 if (IS_I965G(dev)) 631 if (IS_I965G(dev) && !IS_IGDNG(dev))
492 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); 632 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
493 if (IS_MOBILE(dev) && !IS_I830(dev)) 633
634 if (IS_IGDNG(dev)) {
635 I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
636 } else if (IS_MOBILE(dev) && !IS_I830(dev))
494 I915_WRITE(LVDS, dev_priv->saveLVDS); 637 I915_WRITE(LVDS, dev_priv->saveLVDS);
495 if (!IS_I830(dev) && !IS_845G(dev)) 638
639 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
496 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); 640 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
497 641
498 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); 642 if (IS_IGDNG(dev)) {
499 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); 643 I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
500 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); 644 I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
501 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); 645 I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
502 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); 646 I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2);
503 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); 647 I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
648 I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
649 I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
650 I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
651 } else {
652 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
653 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
654 I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
655 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
656 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
657 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
658 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
659 }
504 660
505 /* Display Port state */ 661 /* Display Port state */
506 if (SUPPORTS_INTEGRATED_DP(dev)) { 662 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -511,13 +667,22 @@ void i915_restore_display(struct drm_device *dev)
511 /* FIXME: restore TV & SDVO state */ 667 /* FIXME: restore TV & SDVO state */
512 668
513 /* FBC info */ 669 /* FBC info */
514 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); 670 if (IS_GM45(dev)) {
515 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); 671 g4x_disable_fbc(dev);
516 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); 672 I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
517 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); 673 } else {
674 i8xx_disable_fbc(dev);
675 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
676 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
677 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
678 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
679 }
518 680
519 /* VGA state */ 681 /* VGA state */
520 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); 682 if (IS_IGDNG(dev))
683 I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
684 else
685 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
521 I915_WRITE(VGA0, dev_priv->saveVGA0); 686 I915_WRITE(VGA0, dev_priv->saveVGA0);
522 I915_WRITE(VGA1, dev_priv->saveVGA1); 687 I915_WRITE(VGA1, dev_priv->saveVGA1);
523 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); 688 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
@@ -543,8 +708,17 @@ int i915_save_state(struct drm_device *dev)
543 i915_save_display(dev); 708 i915_save_display(dev);
544 709
545 /* Interrupt state */ 710 /* Interrupt state */
546 dev_priv->saveIER = I915_READ(IER); 711 if (IS_IGDNG(dev)) {
547 dev_priv->saveIMR = I915_READ(IMR); 712 dev_priv->saveDEIER = I915_READ(DEIER);
713 dev_priv->saveDEIMR = I915_READ(DEIMR);
714 dev_priv->saveGTIER = I915_READ(GTIER);
715 dev_priv->saveGTIMR = I915_READ(GTIMR);
716 dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
717 dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
718 } else {
719 dev_priv->saveIER = I915_READ(IER);
720 dev_priv->saveIMR = I915_READ(IMR);
721 }
548 722
549 /* Clock gating state */ 723 /* Clock gating state */
550 dev_priv->saveD_STATE = I915_READ(D_STATE); 724 dev_priv->saveD_STATE = I915_READ(D_STATE);
@@ -609,8 +783,17 @@ int i915_restore_state(struct drm_device *dev)
609 i915_restore_display(dev); 783 i915_restore_display(dev);
610 784
611 /* Interrupt state */ 785 /* Interrupt state */
612 I915_WRITE (IER, dev_priv->saveIER); 786 if (IS_IGDNG(dev)) {
613 I915_WRITE (IMR, dev_priv->saveIMR); 787 I915_WRITE(DEIER, dev_priv->saveDEIER);
788 I915_WRITE(DEIMR, dev_priv->saveDEIMR);
789 I915_WRITE(GTIER, dev_priv->saveGTIER);
790 I915_WRITE(GTIMR, dev_priv->saveGTIMR);
791 I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR);
792 I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR);
793 } else {
794 I915_WRITE (IER, dev_priv->saveIER);
795 I915_WRITE (IMR, dev_priv->saveIMR);
796 }
614 797
615 /* Clock gating state */ 798 /* Clock gating state */
616 I915_WRITE (D_STATE, dev_priv->saveD_STATE); 799 I915_WRITE (D_STATE, dev_priv->saveD_STATE);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4337414846b6..96cd256e60e6 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -351,20 +351,18 @@ parse_driver_features(struct drm_i915_private *dev_priv,
351 struct drm_device *dev = dev_priv->dev; 351 struct drm_device *dev = dev_priv->dev;
352 struct bdb_driver_features *driver; 352 struct bdb_driver_features *driver;
353 353
354 /* set default for chips without eDP */
355 if (!SUPPORTS_EDP(dev)) {
356 dev_priv->edp_support = 0;
357 return;
358 }
359
360 driver = find_section(bdb, BDB_DRIVER_FEATURES); 354 driver = find_section(bdb, BDB_DRIVER_FEATURES);
361 if (!driver) 355 if (!driver)
362 return; 356 return;
363 357
364 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) 358 if (driver && SUPPORTS_EDP(dev) &&
359 driver->lvds_config == BDB_DRIVER_FEATURE_EDP) {
365 dev_priv->edp_support = 1; 360 dev_priv->edp_support = 1;
361 } else {
362 dev_priv->edp_support = 0;
363 }
366 364
367 if (driver->dual_frequency) 365 if (driver && driver->dual_frequency)
368 dev_priv->render_reclock_avail = true; 366 dev_priv->render_reclock_avail = true;
369} 367}
370 368
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3c14240cc002..3ba6546b7c7f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -943,6 +943,7 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2); 943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
944 clock.p = (clock.p1 * clock.p2); 944 clock.p = (clock.p1 * clock.p2);
945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p; 945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p;
946 clock.vco = 0;
946 memcpy(best_clock, &clock, sizeof(intel_clock_t)); 947 memcpy(best_clock, &clock, sizeof(intel_clock_t));
947 return true; 948 return true;
948} 949}
@@ -1260,9 +1261,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1260 return ret; 1261 return ret;
1261 } 1262 }
1262 1263
1263 /* Pre-i965 needs to install a fence for tiled scan-out */ 1264 /* Install a fence for tiled scan-out. Pre-i965 always needs a fence,
1264 if (!IS_I965G(dev) && 1265 * whereas 965+ only requires a fence if using framebuffer compression.
1265 obj_priv->fence_reg == I915_FENCE_REG_NONE && 1266 * For simplicity, we always install a fence as the cost is not that onerous.
1267 */
1268 if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
1266 obj_priv->tiling_mode != I915_TILING_NONE) { 1269 obj_priv->tiling_mode != I915_TILING_NONE) {
1267 ret = i915_gem_object_get_fence_reg(obj); 1270 ret = i915_gem_object_get_fence_reg(obj);
1268 if (ret != 0) { 1271 if (ret != 0) {
@@ -1513,7 +1516,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1513 /* Enable panel fitting for LVDS */ 1516 /* Enable panel fitting for LVDS */
1514 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 1517 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
1515 temp = I915_READ(pf_ctl_reg); 1518 temp = I915_READ(pf_ctl_reg);
1516 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE); 1519 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
1517 1520
1518 /* currently full aspect */ 1521 /* currently full aspect */
1519 I915_WRITE(pf_win_pos, 0); 1522 I915_WRITE(pf_win_pos, 0);
@@ -1801,6 +1804,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1801 case DRM_MODE_DPMS_ON: 1804 case DRM_MODE_DPMS_ON:
1802 case DRM_MODE_DPMS_STANDBY: 1805 case DRM_MODE_DPMS_STANDBY:
1803 case DRM_MODE_DPMS_SUSPEND: 1806 case DRM_MODE_DPMS_SUSPEND:
1807 intel_update_watermarks(dev);
1808
1804 /* Enable the DPLL */ 1809 /* Enable the DPLL */
1805 temp = I915_READ(dpll_reg); 1810 temp = I915_READ(dpll_reg);
1806 if ((temp & DPLL_VCO_ENABLE) == 0) { 1811 if ((temp & DPLL_VCO_ENABLE) == 0) {
@@ -1838,7 +1843,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1838 1843
1839 /* Give the overlay scaler a chance to enable if it's on this pipe */ 1844 /* Give the overlay scaler a chance to enable if it's on this pipe */
1840 //intel_crtc_dpms_video(crtc, true); TODO 1845 //intel_crtc_dpms_video(crtc, true); TODO
1841 intel_update_watermarks(dev);
1842 break; 1846 break;
1843 case DRM_MODE_DPMS_OFF: 1847 case DRM_MODE_DPMS_OFF:
1844 intel_update_watermarks(dev); 1848 intel_update_watermarks(dev);
@@ -2082,7 +2086,7 @@ fdi_reduce_ratio(u32 *num, u32 *den)
2082#define LINK_N 0x80000 2086#define LINK_N 0x80000
2083 2087
2084static void 2088static void
2085igdng_compute_m_n(int bytes_per_pixel, int nlanes, 2089igdng_compute_m_n(int bits_per_pixel, int nlanes,
2086 int pixel_clock, int link_clock, 2090 int pixel_clock, int link_clock,
2087 struct fdi_m_n *m_n) 2091 struct fdi_m_n *m_n)
2088{ 2092{
@@ -2092,7 +2096,8 @@ igdng_compute_m_n(int bytes_per_pixel, int nlanes,
2092 2096
2093 temp = (u64) DATA_N * pixel_clock; 2097 temp = (u64) DATA_N * pixel_clock;
2094 temp = div_u64(temp, link_clock); 2098 temp = div_u64(temp, link_clock);
2095 m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes); 2099 m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes);
2100 m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */
2096 m_n->gmch_n = DATA_N; 2101 m_n->gmch_n = DATA_N;
2097 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); 2102 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
2098 2103
@@ -2140,6 +2145,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
2140 IGD_CURSOR_GUARD_WM, 2145 IGD_CURSOR_GUARD_WM,
2141 IGD_FIFO_LINE_SIZE 2146 IGD_FIFO_LINE_SIZE
2142}; 2147};
2148static struct intel_watermark_params g4x_wm_info = {
2149 G4X_FIFO_SIZE,
2150 G4X_MAX_WM,
2151 G4X_MAX_WM,
2152 2,
2153 G4X_FIFO_LINE_SIZE,
2154};
2143static struct intel_watermark_params i945_wm_info = { 2155static struct intel_watermark_params i945_wm_info = {
2144 I945_FIFO_SIZE, 2156 I945_FIFO_SIZE,
2145 I915_MAX_WM, 2157 I915_MAX_WM,
@@ -2430,17 +2442,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
2430 return size; 2442 return size;
2431} 2443}
2432 2444
2433static void g4x_update_wm(struct drm_device *dev, int unused, int unused2, 2445static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2434 int unused3, int unused4) 2446 int planeb_clock, int sr_hdisplay, int pixel_size)
2435{ 2447{
2436 struct drm_i915_private *dev_priv = dev->dev_private; 2448 struct drm_i915_private *dev_priv = dev->dev_private;
2437 u32 fw_blc_self = I915_READ(FW_BLC_SELF); 2449 int total_size, cacheline_size;
2450 int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr;
2451 struct intel_watermark_params planea_params, planeb_params;
2452 unsigned long line_time_us;
2453 int sr_clock, sr_entries = 0, entries_required;
2438 2454
2439 if (i915_powersave) 2455 /* Create copies of the base settings for each pipe */
2440 fw_blc_self |= FW_BLC_SELF_EN; 2456 planea_params = planeb_params = g4x_wm_info;
2441 else 2457
2442 fw_blc_self &= ~FW_BLC_SELF_EN; 2458 /* Grab a couple of global values before we overwrite them */
2443 I915_WRITE(FW_BLC_SELF, fw_blc_self); 2459 total_size = planea_params.fifo_size;
2460 cacheline_size = planea_params.cacheline_size;
2461
2462 /*
2463 * Note: we need to make sure we don't overflow for various clock &
2464 * latency values.
2465 * clocks go from a few thousand to several hundred thousand.
2466 * latency is usually a few thousand
2467 */
2468 entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
2469 1000;
2470 entries_required /= G4X_FIFO_LINE_SIZE;
2471 planea_wm = entries_required + planea_params.guard_size;
2472
2473 entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
2474 1000;
2475 entries_required /= G4X_FIFO_LINE_SIZE;
2476 planeb_wm = entries_required + planeb_params.guard_size;
2477
2478 cursora_wm = cursorb_wm = 16;
2479 cursor_sr = 32;
2480
2481 DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
2482
2483 /* Calc sr entries for one plane configs */
2484 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2485 /* self-refresh has much higher latency */
2486 const static int sr_latency_ns = 12000;
2487
2488 sr_clock = planea_clock ? planea_clock : planeb_clock;
2489 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
2490
2491 /* Use ns/us then divide to preserve precision */
2492 sr_entries = (((sr_latency_ns / line_time_us) + 1) *
2493 pixel_size * sr_hdisplay) / 1000;
2494 sr_entries = roundup(sr_entries / cacheline_size, 1);
2495 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2496 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2497 }
2498
2499 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
2500 planea_wm, planeb_wm, sr_entries);
2501
2502 planea_wm &= 0x3f;
2503 planeb_wm &= 0x3f;
2504
2505 I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) |
2506 (cursorb_wm << DSPFW_CURSORB_SHIFT) |
2507 (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm);
2508 I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) |
2509 (cursora_wm << DSPFW_CURSORA_SHIFT));
2510 /* HPLL off in SR has some issues on G4x... disable it */
2511 I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) |
2512 (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
2444} 2513}
2445 2514
2446static void i965_update_wm(struct drm_device *dev, int unused, int unused2, 2515static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
@@ -2586,6 +2655,9 @@ static void intel_update_watermarks(struct drm_device *dev)
2586 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; 2655 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
2587 int enabled = 0, pixel_size = 0; 2656 int enabled = 0, pixel_size = 0;
2588 2657
2658 if (!dev_priv->display.update_wm)
2659 return;
2660
2589 /* Get the clock config from both planes */ 2661 /* Get the clock config from both planes */
2590 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 2662 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2591 intel_crtc = to_intel_crtc(crtc); 2663 intel_crtc = to_intel_crtc(crtc);
@@ -2763,7 +2835,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2763 2835
2764 /* FDI link */ 2836 /* FDI link */
2765 if (IS_IGDNG(dev)) { 2837 if (IS_IGDNG(dev)) {
2766 int lane, link_bw; 2838 int lane, link_bw, bpp;
2767 /* eDP doesn't require FDI link, so just set DP M/N 2839 /* eDP doesn't require FDI link, so just set DP M/N
2768 according to current link config */ 2840 according to current link config */
2769 if (is_edp) { 2841 if (is_edp) {
@@ -2782,10 +2854,72 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2782 lane = 4; 2854 lane = 4;
2783 link_bw = 270000; 2855 link_bw = 270000;
2784 } 2856 }
2785 igdng_compute_m_n(3, lane, target_clock, 2857
2858 /* determine panel color depth */
2859 temp = I915_READ(pipeconf_reg);
2860
2861 switch (temp & PIPE_BPC_MASK) {
2862 case PIPE_8BPC:
2863 bpp = 24;
2864 break;
2865 case PIPE_10BPC:
2866 bpp = 30;
2867 break;
2868 case PIPE_6BPC:
2869 bpp = 18;
2870 break;
2871 case PIPE_12BPC:
2872 bpp = 36;
2873 break;
2874 default:
2875 DRM_ERROR("unknown pipe bpc value\n");
2876 bpp = 24;
2877 }
2878
2879 igdng_compute_m_n(bpp, lane, target_clock,
2786 link_bw, &m_n); 2880 link_bw, &m_n);
2787 } 2881 }
2788 2882
2883 /* Ironlake: try to setup display ref clock before DPLL
2884 * enabling. This is only under driver's control after
2885 * PCH B stepping, previous chipset stepping should be
2886 * ignoring this setting.
2887 */
2888 if (IS_IGDNG(dev)) {
2889 temp = I915_READ(PCH_DREF_CONTROL);
2890 /* Always enable nonspread source */
2891 temp &= ~DREF_NONSPREAD_SOURCE_MASK;
2892 temp |= DREF_NONSPREAD_SOURCE_ENABLE;
2893 I915_WRITE(PCH_DREF_CONTROL, temp);
2894 POSTING_READ(PCH_DREF_CONTROL);
2895
2896 temp &= ~DREF_SSC_SOURCE_MASK;
2897 temp |= DREF_SSC_SOURCE_ENABLE;
2898 I915_WRITE(PCH_DREF_CONTROL, temp);
2899 POSTING_READ(PCH_DREF_CONTROL);
2900
2901 udelay(200);
2902
2903 if (is_edp) {
2904 if (dev_priv->lvds_use_ssc) {
2905 temp |= DREF_SSC1_ENABLE;
2906 I915_WRITE(PCH_DREF_CONTROL, temp);
2907 POSTING_READ(PCH_DREF_CONTROL);
2908
2909 udelay(200);
2910
2911 temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
2912 temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
2913 I915_WRITE(PCH_DREF_CONTROL, temp);
2914 POSTING_READ(PCH_DREF_CONTROL);
2915 } else {
2916 temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
2917 I915_WRITE(PCH_DREF_CONTROL, temp);
2918 POSTING_READ(PCH_DREF_CONTROL);
2919 }
2920 }
2921 }
2922
2789 if (IS_IGD(dev)) { 2923 if (IS_IGD(dev)) {
2790 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; 2924 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
2791 if (has_reduced_clock) 2925 if (has_reduced_clock)
@@ -2936,6 +3070,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2936 3070
2937 lvds = I915_READ(lvds_reg); 3071 lvds = I915_READ(lvds_reg);
2938 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; 3072 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
3073 /* set the corresponsding LVDS_BORDER bit */
3074 lvds |= dev_priv->lvds_border_bits;
2939 /* Set the B0-B3 data pairs corresponding to whether we're going to 3075 /* Set the B0-B3 data pairs corresponding to whether we're going to
2940 * set the DPLLs for dual-channel mode or not. 3076 * set the DPLLs for dual-channel mode or not.
2941 */ 3077 */
@@ -4124,7 +4260,9 @@ void intel_init_clock_gating(struct drm_device *dev)
4124 * Disable clock gating reported to work incorrectly according to the 4260 * Disable clock gating reported to work incorrectly according to the
4125 * specs, but enable as much else as we can. 4261 * specs, but enable as much else as we can.
4126 */ 4262 */
4127 if (IS_G4X(dev)) { 4263 if (IS_IGDNG(dev)) {
4264 return;
4265 } else if (IS_G4X(dev)) {
4128 uint32_t dspclk_gate; 4266 uint32_t dspclk_gate;
4129 I915_WRITE(RENCLK_GATE_D1, 0); 4267 I915_WRITE(RENCLK_GATE_D1, 0);
4130 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE | 4268 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
@@ -4212,7 +4350,9 @@ static void intel_init_display(struct drm_device *dev)
4212 i830_get_display_clock_speed; 4350 i830_get_display_clock_speed;
4213 4351
4214 /* For FIFO watermark updates */ 4352 /* For FIFO watermark updates */
4215 if (IS_G4X(dev)) 4353 if (IS_IGDNG(dev))
4354 dev_priv->display.update_wm = NULL;
4355 else if (IS_G4X(dev))
4216 dev_priv->display.update_wm = g4x_update_wm; 4356 dev_priv->display.update_wm = g4x_update_wm;
4217 else if (IS_I965G(dev)) 4357 else if (IS_I965G(dev))
4218 dev_priv->display.update_wm = i965_update_wm; 4358 dev_priv->display.update_wm = i965_update_wm;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f4856a510476..d83447557f9b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -400,7 +400,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
400{ 400{
401 struct intel_dp_priv *dp_priv = intel_output->dev_priv; 401 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
402 402
403 DRM_ERROR("i2c_init %s\n", name); 403 DRM_DEBUG_KMS("i2c_init %s\n", name);
404 dp_priv->algo.running = false; 404 dp_priv->algo.running = false;
405 dp_priv->algo.address = 0; 405 dp_priv->algo.address = 0;
406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; 406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 808bbe412ba8..05598ae10c4b 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -380,7 +380,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
380 adjusted_mode->crtc_vblank_start + vsync_pos; 380 adjusted_mode->crtc_vblank_start + vsync_pos;
381 /* keep the vsync width constant */ 381 /* keep the vsync width constant */
382 adjusted_mode->crtc_vsync_end = 382 adjusted_mode->crtc_vsync_end =
383 adjusted_mode->crtc_vblank_start + vsync_width; 383 adjusted_mode->crtc_vsync_start + vsync_width;
384 border = 1; 384 border = 1;
385 break; 385 break;
386 case DRM_MODE_SCALE_ASPECT: 386 case DRM_MODE_SCALE_ASPECT:
@@ -526,6 +526,14 @@ out:
526 lvds_priv->pfit_control = pfit_control; 526 lvds_priv->pfit_control = pfit_control;
527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; 527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
528 /* 528 /*
529 * When there exists the border, it means that the LVDS_BORDR
530 * should be enabled.
531 */
532 if (border)
533 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
534 else
535 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
536 /*
529 * XXX: It would be nice to support lower refresh rates on the 537 * XXX: It would be nice to support lower refresh rates on the
530 * panels to reduce power consumption, and perhaps match the 538 * panels to reduce power consumption, and perhaps match the
531 * user's requested refresh rate. 539 * user's requested refresh rate.
diff --git a/drivers/misc/sgi-gru/gruprocfs.c b/drivers/misc/sgi-gru/gruprocfs.c
index ccd4408a26c7..3f2375c5ba5b 100644
--- a/drivers/misc/sgi-gru/gruprocfs.c
+++ b/drivers/misc/sgi-gru/gruprocfs.c
@@ -161,14 +161,15 @@ static int options_show(struct seq_file *s, void *p)
161static ssize_t options_write(struct file *file, const char __user *userbuf, 161static ssize_t options_write(struct file *file, const char __user *userbuf,
162 size_t count, loff_t *data) 162 size_t count, loff_t *data)
163{ 163{
164 unsigned long val; 164 char buf[20];
165 char buf[80];
166 165
167 if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0) 166 if (count >= sizeof(buf))
167 return -EINVAL;
168 if (copy_from_user(buf, userbuf, count))
168 return -EFAULT; 169 return -EFAULT;
169 buf[count - 1] = '\0'; 170 buf[count] = '\0';
170 if (!strict_strtoul(buf, 10, &val)) 171 if (strict_strtoul(buf, 0, &gru_options))
171 gru_options = val; 172 return -EINVAL;
172 173
173 return count; 174 return count;
174} 175}
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 841e085ab74a..14be0755d7cd 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -486,6 +486,7 @@ config MTD_BFIN_ASYNC
486 486
487config MTD_GPIO_ADDR 487config MTD_GPIO_ADDR
488 tristate "GPIO-assisted Flash Chip Support" 488 tristate "GPIO-assisted Flash Chip Support"
489 depends on GENERIC_GPIO || GPIOLIB
489 depends on MTD_COMPLEX_MAPPINGS 490 depends on MTD_COMPLEX_MAPPINGS
490 select MTD_PARTITIONS 491 select MTD_PARTITIONS
491 help 492 help
diff --git a/drivers/mtd/maps/gpio-addr-flash.c b/drivers/mtd/maps/gpio-addr-flash.c
index 44ef9a49a860..1ad5caf9fe69 100644
--- a/drivers/mtd/maps/gpio-addr-flash.c
+++ b/drivers/mtd/maps/gpio-addr-flash.c
@@ -13,7 +13,9 @@
13 * Licensed under the GPL-2 or later. 13 * Licensed under the GPL-2 or later.
14 */ 14 */
15 15
16#include <linux/gpio.h>
16#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
17#include <linux/kernel.h> 19#include <linux/kernel.h>
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
@@ -23,9 +25,6 @@
23#include <linux/platform_device.h> 25#include <linux/platform_device.h>
24#include <linux/types.h> 26#include <linux/types.h>
25 27
26#include <asm/gpio.h>
27#include <asm/io.h>
28
29#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); }) 28#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); })
30 29
31#define DRIVER_NAME "gpio-addr-flash" 30#define DRIVER_NAME "gpio-addr-flash"
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 22113865438b..2957cc70da3d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -761,6 +761,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
761 * @mtd: mtd info structure 761 * @mtd: mtd info structure
762 * @chip: nand chip info structure 762 * @chip: nand chip info structure
763 * @buf: buffer to store read data 763 * @buf: buffer to store read data
764 * @page: page number to read
764 * 765 *
765 * Not for syndrome calculating ecc controllers, which use a special oob layout 766 * Not for syndrome calculating ecc controllers, which use a special oob layout
766 */ 767 */
@@ -777,6 +778,7 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
777 * @mtd: mtd info structure 778 * @mtd: mtd info structure
778 * @chip: nand chip info structure 779 * @chip: nand chip info structure
779 * @buf: buffer to store read data 780 * @buf: buffer to store read data
781 * @page: page number to read
780 * 782 *
781 * We need a special oob layout and handling even when OOB isn't used. 783 * We need a special oob layout and handling even when OOB isn't used.
782 */ 784 */
@@ -818,6 +820,7 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *c
818 * @mtd: mtd info structure 820 * @mtd: mtd info structure
819 * @chip: nand chip info structure 821 * @chip: nand chip info structure
820 * @buf: buffer to store read data 822 * @buf: buffer to store read data
823 * @page: page number to read
821 */ 824 */
822static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 825static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
823 uint8_t *buf, int page) 826 uint8_t *buf, int page)
@@ -939,6 +942,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint3
939 * @mtd: mtd info structure 942 * @mtd: mtd info structure
940 * @chip: nand chip info structure 943 * @chip: nand chip info structure
941 * @buf: buffer to store read data 944 * @buf: buffer to store read data
945 * @page: page number to read
942 * 946 *
943 * Not for syndrome calculating ecc controllers which need a special oob layout 947 * Not for syndrome calculating ecc controllers which need a special oob layout
944 */ 948 */
@@ -983,6 +987,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
983 * @mtd: mtd info structure 987 * @mtd: mtd info structure
984 * @chip: nand chip info structure 988 * @chip: nand chip info structure
985 * @buf: buffer to store read data 989 * @buf: buffer to store read data
990 * @page: page number to read
986 * 991 *
987 * Hardware ECC for large page chips, require OOB to be read first. 992 * Hardware ECC for large page chips, require OOB to be read first.
988 * For this ECC mode, the write_page method is re-used from ECC_HW. 993 * For this ECC mode, the write_page method is re-used from ECC_HW.
@@ -1031,6 +1036,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1031 * @mtd: mtd info structure 1036 * @mtd: mtd info structure
1032 * @chip: nand chip info structure 1037 * @chip: nand chip info structure
1033 * @buf: buffer to store read data 1038 * @buf: buffer to store read data
1039 * @page: page number to read
1034 * 1040 *
1035 * The hw generator calculates the error syndrome automatically. Therefor 1041 * The hw generator calculates the error syndrome automatically. Therefor
1036 * we need a special oob layout and handling. 1042 * we need a special oob layout and handling.
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index d379e74a05d0..4226e5352738 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -150,8 +150,6 @@ struct eeepc_hotk {
150/* The actual device the driver binds to */ 150/* The actual device the driver binds to */
151static struct eeepc_hotk *ehotk; 151static struct eeepc_hotk *ehotk;
152 152
153static void eeepc_rfkill_hotplug(bool real);
154
155/* Platform device/driver */ 153/* Platform device/driver */
156static int eeepc_hotk_thaw(struct device *device); 154static int eeepc_hotk_thaw(struct device *device);
157static int eeepc_hotk_restore(struct device *device); 155static int eeepc_hotk_restore(struct device *device);
@@ -345,16 +343,7 @@ static bool eeepc_wlan_rfkill_blocked(void)
345static int eeepc_rfkill_set(void *data, bool blocked) 343static int eeepc_rfkill_set(void *data, bool blocked)
346{ 344{
347 unsigned long asl = (unsigned long)data; 345 unsigned long asl = (unsigned long)data;
348 int ret; 346 return set_acpi(asl, !blocked);
349
350 if (asl != CM_ASL_WLAN)
351 return set_acpi(asl, !blocked);
352
353 /* hack to avoid panic with rt2860sta */
354 if (blocked)
355 eeepc_rfkill_hotplug(false);
356 ret = set_acpi(asl, !blocked);
357 return ret;
358} 347}
359 348
360static const struct rfkill_ops eeepc_rfkill_ops = { 349static const struct rfkill_ops eeepc_rfkill_ops = {
@@ -367,7 +356,8 @@ static void __devinit eeepc_enable_camera(void)
367 * If the following call to set_acpi() fails, it's because there's no 356 * If the following call to set_acpi() fails, it's because there's no
368 * camera so we can ignore the error. 357 * camera so we can ignore the error.
369 */ 358 */
370 set_acpi(CM_ASL_CAMERA, 1); 359 if (get_acpi(CM_ASL_CAMERA) == 0)
360 set_acpi(CM_ASL_CAMERA, 1);
371} 361}
372 362
373/* 363/*
@@ -654,13 +644,13 @@ static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
654 return 0; 644 return 0;
655} 645}
656 646
657static void eeepc_rfkill_hotplug(bool real) 647static void eeepc_rfkill_hotplug(void)
658{ 648{
659 struct pci_dev *dev; 649 struct pci_dev *dev;
660 struct pci_bus *bus; 650 struct pci_bus *bus;
661 bool blocked = real ? eeepc_wlan_rfkill_blocked() : true; 651 bool blocked = eeepc_wlan_rfkill_blocked();
662 652
663 if (real && ehotk->wlan_rfkill) 653 if (ehotk->wlan_rfkill)
664 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); 654 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked);
665 655
666 mutex_lock(&ehotk->hotplug_lock); 656 mutex_lock(&ehotk->hotplug_lock);
@@ -703,7 +693,7 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
703 if (event != ACPI_NOTIFY_BUS_CHECK) 693 if (event != ACPI_NOTIFY_BUS_CHECK)
704 return; 694 return;
705 695
706 eeepc_rfkill_hotplug(true); 696 eeepc_rfkill_hotplug();
707} 697}
708 698
709static void eeepc_hotk_notify(struct acpi_device *device, u32 event) 699static void eeepc_hotk_notify(struct acpi_device *device, u32 event)
@@ -861,7 +851,7 @@ static int eeepc_hotk_restore(struct device *device)
861{ 851{
862 /* Refresh both wlan rfkill state and pci hotplug */ 852 /* Refresh both wlan rfkill state and pci hotplug */
863 if (ehotk->wlan_rfkill) 853 if (ehotk->wlan_rfkill)
864 eeepc_rfkill_hotplug(true); 854 eeepc_rfkill_hotplug();
865 855
866 if (ehotk->bluetooth_rfkill) 856 if (ehotk->bluetooth_rfkill)
867 rfkill_set_sw_state(ehotk->bluetooth_rfkill, 857 rfkill_set_sw_state(ehotk->bluetooth_rfkill,
@@ -1004,7 +994,7 @@ static void eeepc_rfkill_exit(void)
1004 * Refresh pci hotplug in case the rfkill state was changed after 994 * Refresh pci hotplug in case the rfkill state was changed after
1005 * eeepc_unregister_rfkill_notifier() 995 * eeepc_unregister_rfkill_notifier()
1006 */ 996 */
1007 eeepc_rfkill_hotplug(true); 997 eeepc_rfkill_hotplug();
1008 if (ehotk->hotplug_slot) 998 if (ehotk->hotplug_slot)
1009 pci_hp_deregister(ehotk->hotplug_slot); 999 pci_hp_deregister(ehotk->hotplug_slot);
1010 1000
@@ -1120,7 +1110,7 @@ static int eeepc_rfkill_init(struct device *dev)
1120 * Refresh pci hotplug in case the rfkill state was changed during 1110 * Refresh pci hotplug in case the rfkill state was changed during
1121 * setup. 1111 * setup.
1122 */ 1112 */
1123 eeepc_rfkill_hotplug(true); 1113 eeepc_rfkill_hotplug();
1124 1114
1125exit: 1115exit:
1126 if (result && result != -ENODEV) 1116 if (result && result != -ENODEV)
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c
index 4e83c297ec9e..6f8d8f971212 100644
--- a/drivers/thermal/thermal_sys.c
+++ b/drivers/thermal/thermal_sys.c
@@ -180,15 +180,15 @@ trip_point_type_show(struct device *dev, struct device_attribute *attr,
180 180
181 switch (type) { 181 switch (type) {
182 case THERMAL_TRIP_CRITICAL: 182 case THERMAL_TRIP_CRITICAL:
183 return sprintf(buf, "critical"); 183 return sprintf(buf, "critical\n");
184 case THERMAL_TRIP_HOT: 184 case THERMAL_TRIP_HOT:
185 return sprintf(buf, "hot"); 185 return sprintf(buf, "hot\n");
186 case THERMAL_TRIP_PASSIVE: 186 case THERMAL_TRIP_PASSIVE:
187 return sprintf(buf, "passive"); 187 return sprintf(buf, "passive\n");
188 case THERMAL_TRIP_ACTIVE: 188 case THERMAL_TRIP_ACTIVE:
189 return sprintf(buf, "active"); 189 return sprintf(buf, "active\n");
190 default: 190 default:
191 return sprintf(buf, "unknown"); 191 return sprintf(buf, "unknown\n");
192 } 192 }
193} 193}
194 194
diff --git a/fs/Kconfig b/fs/Kconfig
index 2126078a38ed..64d44efad7a5 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -135,7 +135,7 @@ config TMPFS_POSIX_ACL
135 135
136config HUGETLBFS 136config HUGETLBFS
137 bool "HugeTLB file system support" 137 bool "HugeTLB file system support"
138 depends on X86 || IA64 || PPC_BOOK3S_64 || SPARC64 || (S390 && 64BIT) || \ 138 depends on X86 || IA64 || SPARC64 || (S390 && 64BIT) || \
139 SYS_SUPPORTS_HUGETLBFS || BROKEN 139 SYS_SUPPORTS_HUGETLBFS || BROKEN
140 help 140 help
141 hugetlbfs is a filesystem backing for HugeTLB pages, based on 141 hugetlbfs is a filesystem backing for HugeTLB pages, based on
diff --git a/fs/bio.c b/fs/bio.c
index 402cb84a92a1..12da5db8682c 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -325,8 +325,16 @@ static void bio_fs_destructor(struct bio *bio)
325 * @gfp_mask: allocation mask to use 325 * @gfp_mask: allocation mask to use
326 * @nr_iovecs: number of iovecs 326 * @nr_iovecs: number of iovecs
327 * 327 *
328 * Allocate a new bio with @nr_iovecs bvecs. If @gfp_mask 328 * bio_alloc will allocate a bio and associated bio_vec array that can hold
329 * contains __GFP_WAIT, the allocation is guaranteed to succeed. 329 * at least @nr_iovecs entries. Allocations will be done from the
330 * fs_bio_set. Also see @bio_alloc_bioset and @bio_kmalloc.
331 *
332 * If %__GFP_WAIT is set, then bio_alloc will always be able to allocate
333 * a bio. This is due to the mempool guarantees. To make this work, callers
334 * must never allocate more than 1 bio at a time from this pool. Callers
335 * that need to allocate more than 1 bio must always submit the previously
336 * allocated bio for IO before attempting to allocate a new one. Failure to
337 * do so can cause livelocks under memory pressure.
330 * 338 *
331 * RETURNS: 339 * RETURNS:
332 * Pointer to new bio on success, NULL on failure. 340 * Pointer to new bio on success, NULL on failure.
@@ -350,21 +358,13 @@ static void bio_kmalloc_destructor(struct bio *bio)
350} 358}
351 359
352/** 360/**
353 * bio_alloc - allocate a bio for I/O 361 * bio_kmalloc - allocate a bio for I/O using kmalloc()
354 * @gfp_mask: the GFP_ mask given to the slab allocator 362 * @gfp_mask: the GFP_ mask given to the slab allocator
355 * @nr_iovecs: number of iovecs to pre-allocate 363 * @nr_iovecs: number of iovecs to pre-allocate
356 * 364 *
357 * Description: 365 * Description:
358 * bio_alloc will allocate a bio and associated bio_vec array that can hold 366 * Allocate a new bio with @nr_iovecs bvecs. If @gfp_mask contains
359 * at least @nr_iovecs entries. Allocations will be done from the 367 * %__GFP_WAIT, the allocation is guaranteed to succeed.
360 * fs_bio_set. Also see @bio_alloc_bioset.
361 *
362 * If %__GFP_WAIT is set, then bio_alloc will always be able to allocate
363 * a bio. This is due to the mempool guarantees. To make this work, callers
364 * must never allocate more than 1 bio at a time from this pool. Callers
365 * that need to allocate more than 1 bio must always submit the previously
366 * allocated bio for IO before attempting to allocate a new one. Failure to
367 * do so can cause livelocks under memory pressure.
368 * 368 *
369 **/ 369 **/
370struct bio *bio_kmalloc(gfp_t gfp_mask, int nr_iovecs) 370struct bio *bio_kmalloc(gfp_t gfp_mask, int nr_iovecs)
@@ -407,7 +407,7 @@ EXPORT_SYMBOL(zero_fill_bio);
407 * 407 *
408 * Description: 408 * Description:
409 * Put a reference to a &struct bio, either one you have gotten with 409 * Put a reference to a &struct bio, either one you have gotten with
410 * bio_alloc or bio_get. The last put of a bio will free it. 410 * bio_alloc, bio_get or bio_clone. The last put of a bio will free it.
411 **/ 411 **/
412void bio_put(struct bio *bio) 412void bio_put(struct bio *bio)
413{ 413{
diff --git a/fs/compat.c b/fs/compat.c
index d576b552e8e2..6c19040ffeef 100644
--- a/fs/compat.c
+++ b/fs/compat.c
@@ -1532,6 +1532,8 @@ int compat_do_execve(char * filename,
1532 if (retval < 0) 1532 if (retval < 0)
1533 goto out; 1533 goto out;
1534 1534
1535 current->stack_start = current->mm->start_stack;
1536
1535 /* execve succeeded */ 1537 /* execve succeeded */
1536 current->fs->in_exec = 0; 1538 current->fs->in_exec = 0;
1537 current->in_execve = 0; 1539 current->in_execve = 0;
diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c
index 992f6c9410bb..8ada78aade58 100644
--- a/fs/fuse/dir.c
+++ b/fs/fuse/dir.c
@@ -712,8 +712,10 @@ static int fuse_rename(struct inode *olddir, struct dentry *oldent,
712 fuse_invalidate_attr(newdir); 712 fuse_invalidate_attr(newdir);
713 713
714 /* newent will end up negative */ 714 /* newent will end up negative */
715 if (newent->d_inode) 715 if (newent->d_inode) {
716 fuse_invalidate_attr(newent->d_inode);
716 fuse_invalidate_entry_cache(newent); 717 fuse_invalidate_entry_cache(newent);
718 }
717 } else if (err == -EINTR) { 719 } else if (err == -EINTR) {
718 /* If request was interrupted, DEITY only knows if the 720 /* If request was interrupted, DEITY only knows if the
719 rename actually took place. If the invalidation 721 rename actually took place. If the invalidation
diff --git a/fs/fuse/file.c b/fs/fuse/file.c
index a3492f7d207c..c18913a777ae 100644
--- a/fs/fuse/file.c
+++ b/fs/fuse/file.c
@@ -1063,7 +1063,8 @@ ssize_t fuse_direct_io(struct file *file, const char __user *buf,
1063 break; 1063 break;
1064 } 1064 }
1065 } 1065 }
1066 fuse_put_request(fc, req); 1066 if (!IS_ERR(req))
1067 fuse_put_request(fc, req);
1067 if (res > 0) 1068 if (res > 0)
1068 *ppos = pos; 1069 *ppos = pos;
1069 1070
@@ -1599,7 +1600,7 @@ static int fuse_ioctl_copy_user(struct page **pages, struct iovec *iov,
1599 kaddr += copy; 1600 kaddr += copy;
1600 } 1601 }
1601 1602
1602 kunmap(map); 1603 kunmap(page);
1603 } 1604 }
1604 1605
1605 return 0; 1606 return 0;
diff --git a/fs/sysfs/dir.c b/fs/sysfs/dir.c
index 5fad489ce5bc..e0201837d244 100644
--- a/fs/sysfs/dir.c
+++ b/fs/sysfs/dir.c
@@ -21,6 +21,7 @@
21#include <linux/completion.h> 21#include <linux/completion.h>
22#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/security.h>
24#include "sysfs.h" 25#include "sysfs.h"
25 26
26DEFINE_MUTEX(sysfs_mutex); 27DEFINE_MUTEX(sysfs_mutex);
@@ -285,6 +286,9 @@ void release_sysfs_dirent(struct sysfs_dirent * sd)
285 sysfs_put(sd->s_symlink.target_sd); 286 sysfs_put(sd->s_symlink.target_sd);
286 if (sysfs_type(sd) & SYSFS_COPY_NAME) 287 if (sysfs_type(sd) & SYSFS_COPY_NAME)
287 kfree(sd->s_name); 288 kfree(sd->s_name);
289 if (sd->s_iattr && sd->s_iattr->ia_secdata)
290 security_release_secctx(sd->s_iattr->ia_secdata,
291 sd->s_iattr->ia_secdata_len);
288 kfree(sd->s_iattr); 292 kfree(sd->s_iattr);
289 sysfs_free_ino(sd->s_ino); 293 sysfs_free_ino(sd->s_ino);
290 kmem_cache_free(sysfs_dir_cachep, sd); 294 kmem_cache_free(sysfs_dir_cachep, sd);
diff --git a/kernel/kthread.c b/kernel/kthread.c
index 5fe709982caa..ab7ae57773e1 100644
--- a/kernel/kthread.c
+++ b/kernel/kthread.c
@@ -150,29 +150,6 @@ struct task_struct *kthread_create(int (*threadfn)(void *data),
150EXPORT_SYMBOL(kthread_create); 150EXPORT_SYMBOL(kthread_create);
151 151
152/** 152/**
153 * kthread_bind - bind a just-created kthread to a cpu.
154 * @k: thread created by kthread_create().
155 * @cpu: cpu (might not be online, must be possible) for @k to run on.
156 *
157 * Description: This function is equivalent to set_cpus_allowed(),
158 * except that @cpu doesn't need to be online, and the thread must be
159 * stopped (i.e., just returned from kthread_create()).
160 */
161void kthread_bind(struct task_struct *k, unsigned int cpu)
162{
163 /* Must have done schedule() in kthread() before we set_task_cpu */
164 if (!wait_task_inactive(k, TASK_UNINTERRUPTIBLE)) {
165 WARN_ON(1);
166 return;
167 }
168 set_task_cpu(k, cpu);
169 k->cpus_allowed = cpumask_of_cpu(cpu);
170 k->rt.nr_cpus_allowed = 1;
171 k->flags |= PF_THREAD_BOUND;
172}
173EXPORT_SYMBOL(kthread_bind);
174
175/**
176 * kthread_stop - stop a thread created by kthread_create(). 153 * kthread_stop - stop a thread created by kthread_create().
177 * @k: thread created by kthread_create(). 154 * @k: thread created by kthread_create().
178 * 155 *
diff --git a/kernel/sched.c b/kernel/sched.c
index a455dca884a6..28dd4f490bfc 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -1992,6 +1992,38 @@ static inline void check_class_changed(struct rq *rq, struct task_struct *p,
1992 p->sched_class->prio_changed(rq, p, oldprio, running); 1992 p->sched_class->prio_changed(rq, p, oldprio, running);
1993} 1993}
1994 1994
1995/**
1996 * kthread_bind - bind a just-created kthread to a cpu.
1997 * @k: thread created by kthread_create().
1998 * @cpu: cpu (might not be online, must be possible) for @k to run on.
1999 *
2000 * Description: This function is equivalent to set_cpus_allowed(),
2001 * except that @cpu doesn't need to be online, and the thread must be
2002 * stopped (i.e., just returned from kthread_create()).
2003 *
2004 * Function lives here instead of kthread.c because it messes with
2005 * scheduler internals which require locking.
2006 */
2007void kthread_bind(struct task_struct *p, unsigned int cpu)
2008{
2009 struct rq *rq = cpu_rq(cpu);
2010 unsigned long flags;
2011
2012 /* Must have done schedule() in kthread() before we set_task_cpu */
2013 if (!wait_task_inactive(p, TASK_UNINTERRUPTIBLE)) {
2014 WARN_ON(1);
2015 return;
2016 }
2017
2018 spin_lock_irqsave(&rq->lock, flags);
2019 set_task_cpu(p, cpu);
2020 p->cpus_allowed = cpumask_of_cpu(cpu);
2021 p->rt.nr_cpus_allowed = 1;
2022 p->flags |= PF_THREAD_BOUND;
2023 spin_unlock_irqrestore(&rq->lock, flags);
2024}
2025EXPORT_SYMBOL(kthread_bind);
2026
1995#ifdef CONFIG_SMP 2027#ifdef CONFIG_SMP
1996/* 2028/*
1997 * Is this task likely cache-hot: 2029 * Is this task likely cache-hot:
@@ -2004,7 +2036,7 @@ task_hot(struct task_struct *p, u64 now, struct sched_domain *sd)
2004 /* 2036 /*
2005 * Buddy candidates are cache hot: 2037 * Buddy candidates are cache hot:
2006 */ 2038 */
2007 if (sched_feat(CACHE_HOT_BUDDY) && 2039 if (sched_feat(CACHE_HOT_BUDDY) && this_rq()->nr_running &&
2008 (&p->se == cfs_rq_of(&p->se)->next || 2040 (&p->se == cfs_rq_of(&p->se)->next ||
2009 &p->se == cfs_rq_of(&p->se)->last)) 2041 &p->se == cfs_rq_of(&p->se)->last))
2010 return 1; 2042 return 1;
@@ -9532,13 +9564,13 @@ void __init sched_init(void)
9532 current->sched_class = &fair_sched_class; 9564 current->sched_class = &fair_sched_class;
9533 9565
9534 /* Allocate the nohz_cpu_mask if CONFIG_CPUMASK_OFFSTACK */ 9566 /* Allocate the nohz_cpu_mask if CONFIG_CPUMASK_OFFSTACK */
9535 alloc_cpumask_var(&nohz_cpu_mask, GFP_NOWAIT); 9567 zalloc_cpumask_var(&nohz_cpu_mask, GFP_NOWAIT);
9536#ifdef CONFIG_SMP 9568#ifdef CONFIG_SMP
9537#ifdef CONFIG_NO_HZ 9569#ifdef CONFIG_NO_HZ
9538 alloc_cpumask_var(&nohz.cpu_mask, GFP_NOWAIT); 9570 zalloc_cpumask_var(&nohz.cpu_mask, GFP_NOWAIT);
9539 alloc_cpumask_var(&nohz.ilb_grp_nohz_mask, GFP_NOWAIT); 9571 alloc_cpumask_var(&nohz.ilb_grp_nohz_mask, GFP_NOWAIT);
9540#endif 9572#endif
9541 alloc_cpumask_var(&cpu_isolated_map, GFP_NOWAIT); 9573 zalloc_cpumask_var(&cpu_isolated_map, GFP_NOWAIT);
9542#endif /* SMP */ 9574#endif /* SMP */
9543 9575
9544 perf_event_init(); 9576 perf_event_init();
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
index c32c3e643daa..37087a7fac22 100644
--- a/kernel/sched_fair.c
+++ b/kernel/sched_fair.c
@@ -822,6 +822,26 @@ check_preempt_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr)
822 * re-elected due to buddy favours. 822 * re-elected due to buddy favours.
823 */ 823 */
824 clear_buddies(cfs_rq, curr); 824 clear_buddies(cfs_rq, curr);
825 return;
826 }
827
828 /*
829 * Ensure that a task that missed wakeup preemption by a
830 * narrow margin doesn't have to wait for a full slice.
831 * This also mitigates buddy induced latencies under load.
832 */
833 if (!sched_feat(WAKEUP_PREEMPT))
834 return;
835
836 if (delta_exec < sysctl_sched_min_granularity)
837 return;
838
839 if (cfs_rq->nr_running > 1) {
840 struct sched_entity *se = __pick_next_entity(cfs_rq);
841 s64 delta = curr->vruntime - se->vruntime;
842
843 if (delta > ideal_runtime)
844 resched_task(rq_of(cfs_rq)->curr);
825 } 845 }
826} 846}
827 847
@@ -861,21 +881,18 @@ wakeup_preempt_entity(struct sched_entity *curr, struct sched_entity *se);
861static struct sched_entity *pick_next_entity(struct cfs_rq *cfs_rq) 881static struct sched_entity *pick_next_entity(struct cfs_rq *cfs_rq)
862{ 882{
863 struct sched_entity *se = __pick_next_entity(cfs_rq); 883 struct sched_entity *se = __pick_next_entity(cfs_rq);
864 struct sched_entity *buddy; 884 struct sched_entity *left = se;
865 885
866 if (cfs_rq->next) { 886 if (cfs_rq->next && wakeup_preempt_entity(cfs_rq->next, left) < 1)
867 buddy = cfs_rq->next; 887 se = cfs_rq->next;
868 cfs_rq->next = NULL;
869 if (wakeup_preempt_entity(buddy, se) < 1)
870 return buddy;
871 }
872 888
873 if (cfs_rq->last) { 889 /*
874 buddy = cfs_rq->last; 890 * Prefer last buddy, try to return the CPU to a preempted task.
875 cfs_rq->last = NULL; 891 */
876 if (wakeup_preempt_entity(buddy, se) < 1) 892 if (cfs_rq->last && wakeup_preempt_entity(cfs_rq->last, left) < 1)
877 return buddy; 893 se = cfs_rq->last;
878 } 894
895 clear_buddies(cfs_rq, se);
879 896
880 return se; 897 return se;
881} 898}
@@ -1577,6 +1594,7 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_
1577 struct sched_entity *se = &curr->se, *pse = &p->se; 1594 struct sched_entity *se = &curr->se, *pse = &p->se;
1578 struct cfs_rq *cfs_rq = task_cfs_rq(curr); 1595 struct cfs_rq *cfs_rq = task_cfs_rq(curr);
1579 int sync = wake_flags & WF_SYNC; 1596 int sync = wake_flags & WF_SYNC;
1597 int scale = cfs_rq->nr_running >= sched_nr_latency;
1580 1598
1581 update_curr(cfs_rq); 1599 update_curr(cfs_rq);
1582 1600
@@ -1591,18 +1609,7 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_
1591 if (unlikely(se == pse)) 1609 if (unlikely(se == pse))
1592 return; 1610 return;
1593 1611
1594 /* 1612 if (sched_feat(NEXT_BUDDY) && scale && !(wake_flags & WF_FORK))
1595 * Only set the backward buddy when the current task is still on the
1596 * rq. This can happen when a wakeup gets interleaved with schedule on
1597 * the ->pre_schedule() or idle_balance() point, either of which can
1598 * drop the rq lock.
1599 *
1600 * Also, during early boot the idle thread is in the fair class, for
1601 * obvious reasons its a bad idea to schedule back to the idle thread.
1602 */
1603 if (sched_feat(LAST_BUDDY) && likely(se->on_rq && curr != rq->idle))
1604 set_last_buddy(se);
1605 if (sched_feat(NEXT_BUDDY) && !(wake_flags & WF_FORK))
1606 set_next_buddy(pse); 1613 set_next_buddy(pse);
1607 1614
1608 /* 1615 /*
@@ -1648,8 +1655,22 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_
1648 1655
1649 BUG_ON(!pse); 1656 BUG_ON(!pse);
1650 1657
1651 if (wakeup_preempt_entity(se, pse) == 1) 1658 if (wakeup_preempt_entity(se, pse) == 1) {
1652 resched_task(curr); 1659 resched_task(curr);
1660 /*
1661 * Only set the backward buddy when the current task is still
1662 * on the rq. This can happen when a wakeup gets interleaved
1663 * with schedule on the ->pre_schedule() or idle_balance()
1664 * point, either of which can * drop the rq lock.
1665 *
1666 * Also, during early boot the idle thread is in the fair class,
1667 * for obvious reasons its a bad idea to schedule back to it.
1668 */
1669 if (unlikely(!se->on_rq || curr == rq->idle))
1670 return;
1671 if (sched_feat(LAST_BUDDY) && scale && entity_is_task(se))
1672 set_last_buddy(se);
1673 }
1653} 1674}
1654 1675
1655static struct task_struct *pick_next_task_fair(struct rq *rq) 1676static struct task_struct *pick_next_task_fair(struct rq *rq)
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 9c451a1930b6..6dc4e5ef7a01 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -2222,15 +2222,15 @@ ftrace_regex_write(struct file *file, const char __user *ubuf,
2222 ret = ftrace_process_regex(parser->buffer, 2222 ret = ftrace_process_regex(parser->buffer,
2223 parser->idx, enable); 2223 parser->idx, enable);
2224 if (ret) 2224 if (ret)
2225 goto out; 2225 goto out_unlock;
2226 2226
2227 trace_parser_clear(parser); 2227 trace_parser_clear(parser);
2228 } 2228 }
2229 2229
2230 ret = read; 2230 ret = read;
2231 2231out_unlock:
2232 mutex_unlock(&ftrace_regex_lock); 2232 mutex_unlock(&ftrace_regex_lock);
2233out: 2233
2234 return ret; 2234 return ret;
2235} 2235}
2236 2236
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 3ffa502fb243..5dd017fea6f5 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -1193,6 +1193,7 @@ rb_remove_pages(struct ring_buffer_per_cpu *cpu_buffer, unsigned nr_pages)
1193 atomic_inc(&cpu_buffer->record_disabled); 1193 atomic_inc(&cpu_buffer->record_disabled);
1194 synchronize_sched(); 1194 synchronize_sched();
1195 1195
1196 spin_lock_irq(&cpu_buffer->reader_lock);
1196 rb_head_page_deactivate(cpu_buffer); 1197 rb_head_page_deactivate(cpu_buffer);
1197 1198
1198 for (i = 0; i < nr_pages; i++) { 1199 for (i = 0; i < nr_pages; i++) {
@@ -1207,6 +1208,7 @@ rb_remove_pages(struct ring_buffer_per_cpu *cpu_buffer, unsigned nr_pages)
1207 return; 1208 return;
1208 1209
1209 rb_reset_cpu(cpu_buffer); 1210 rb_reset_cpu(cpu_buffer);
1211 spin_unlock_irq(&cpu_buffer->reader_lock);
1210 1212
1211 rb_check_pages(cpu_buffer); 1213 rb_check_pages(cpu_buffer);
1212 1214
diff --git a/lib/dma-debug.c b/lib/dma-debug.c
index 58a9f9fc609a..ce6b7eabf674 100644
--- a/lib/dma-debug.c
+++ b/lib/dma-debug.c
@@ -819,9 +819,11 @@ static void check_unmap(struct dma_debug_entry *ref)
819 err_printk(ref->dev, entry, "DMA-API: device driver frees " 819 err_printk(ref->dev, entry, "DMA-API: device driver frees "
820 "DMA memory with different CPU address " 820 "DMA memory with different CPU address "
821 "[device address=0x%016llx] [size=%llu bytes] " 821 "[device address=0x%016llx] [size=%llu bytes] "
822 "[cpu alloc address=%p] [cpu free address=%p]", 822 "[cpu alloc address=0x%016llx] "
823 "[cpu free address=0x%016llx]",
823 ref->dev_addr, ref->size, 824 ref->dev_addr, ref->size,
824 (void *)entry->paddr, (void *)ref->paddr); 825 (unsigned long long)entry->paddr,
826 (unsigned long long)ref->paddr);
825 } 827 }
826 828
827 if (ref->sg_call_ents && ref->type == dma_debug_sg && 829 if (ref->sg_call_ents && ref->type == dma_debug_sg &&
diff --git a/mm/backing-dev.c b/mm/backing-dev.c
index 1065b715ef64..11aee09dd2a6 100644
--- a/mm/backing-dev.c
+++ b/mm/backing-dev.c
@@ -628,6 +628,8 @@ static void bdi_prune_sb(struct backing_dev_info *bdi)
628void bdi_unregister(struct backing_dev_info *bdi) 628void bdi_unregister(struct backing_dev_info *bdi)
629{ 629{
630 if (bdi->dev) { 630 if (bdi->dev) {
631 bdi_prune_sb(bdi);
632
631 if (!bdi_cap_flush_forker(bdi)) 633 if (!bdi_cap_flush_forker(bdi))
632 bdi_wb_shutdown(bdi); 634 bdi_wb_shutdown(bdi);
633 bdi_debug_unregister(bdi); 635 bdi_debug_unregister(bdi);
@@ -697,7 +699,6 @@ void bdi_destroy(struct backing_dev_info *bdi)
697 spin_unlock(&inode_lock); 699 spin_unlock(&inode_lock);
698 } 700 }
699 701
700 bdi_prune_sb(bdi);
701 bdi_unregister(bdi); 702 bdi_unregister(bdi);
702 703
703 for (i = 0; i < NR_BDI_STAT_ITEMS; i++) 704 for (i = 0; i < NR_BDI_STAT_ITEMS; i++)
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-09 12:09:38 -0500