diff options
| -rw-r--r-- | arch/arm/mach-at91rm9200/clock.c | 26 | ||||
| -rw-r--r-- | arch/arm/mach-at91rm9200/clock.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-at91rm9200/pm.c | 13 |
3 files changed, 33 insertions, 7 deletions
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c index 1e0000ceb343..4dee21fefe5a 100644 --- a/arch/arm/mach-at91rm9200/clock.c +++ b/arch/arm/mach-at91rm9200/clock.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | 29 | ||
| 30 | #include <asm/hardware.h> | 30 | #include <asm/hardware.h> |
| 31 | #include <asm/arch/at91_pmc.h> | 31 | #include <asm/arch/at91_pmc.h> |
| 32 | #include <asm/arch/cpu.h> | ||
| 32 | 33 | ||
| 33 | #include "clock.h" | 34 | #include "clock.h" |
| 34 | 35 | ||
| @@ -42,6 +43,7 @@ | |||
| 42 | #define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY) | 43 | #define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY) |
| 43 | #define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE) | 44 | #define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE) |
| 44 | #define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL) | 45 | #define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL) |
| 46 | #define clk_is_sys(x) ((x)->type & CLK_TYPE_SYSTEM) | ||
| 45 | 47 | ||
| 46 | 48 | ||
| 47 | static LIST_HEAD(clocks); | 49 | static LIST_HEAD(clocks); |
| @@ -115,13 +117,11 @@ static void pmc_sys_mode(struct clk *clk, int is_on) | |||
| 115 | static struct clk udpck = { | 117 | static struct clk udpck = { |
| 116 | .name = "udpck", | 118 | .name = "udpck", |
| 117 | .parent = &pllb, | 119 | .parent = &pllb, |
| 118 | .pmc_mask = AT91_PMC_UDP, | ||
| 119 | .mode = pmc_sys_mode, | 120 | .mode = pmc_sys_mode, |
| 120 | }; | 121 | }; |
| 121 | static struct clk uhpck = { | 122 | static struct clk uhpck = { |
| 122 | .name = "uhpck", | 123 | .name = "uhpck", |
| 123 | .parent = &pllb, | 124 | .parent = &pllb, |
| 124 | .pmc_mask = AT91_PMC_UHP, | ||
| 125 | .mode = pmc_sys_mode, | 125 | .mode = pmc_sys_mode, |
| 126 | }; | 126 | }; |
| 127 | 127 | ||
| @@ -435,6 +435,12 @@ int __init clk_register(struct clk *clk) | |||
| 435 | clk->mode = pmc_periph_mode; | 435 | clk->mode = pmc_periph_mode; |
| 436 | list_add_tail(&clk->node, &clocks); | 436 | list_add_tail(&clk->node, &clocks); |
| 437 | } | 437 | } |
| 438 | else if (clk_is_sys(clk)) { | ||
| 439 | clk->parent = &mck; | ||
| 440 | clk->mode = pmc_sys_mode; | ||
| 441 | |||
| 442 | list_add_tail(&clk->node, &clocks); | ||
| 443 | } | ||
| 438 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS | 444 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS |
| 439 | else if (clk_is_programmable(clk)) { | 445 | else if (clk_is_programmable(clk)) { |
| 440 | clk->mode = pmc_sys_mode; | 446 | clk->mode = pmc_sys_mode; |
| @@ -587,9 +593,21 @@ int __init at91_clock_init(unsigned long main_clock) | |||
| 587 | */ | 593 | */ |
| 588 | at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; | 594 | at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; |
| 589 | pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); | 595 | pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); |
| 590 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP); | 596 | if (cpu_is_at91rm9200()) { |
| 597 | uhpck.pmc_mask = AT91RM9200_PMC_UHP; | ||
| 598 | udpck.pmc_mask = AT91RM9200_PMC_UDP; | ||
| 599 | at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP); | ||
| 600 | at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); | ||
| 601 | } else if (cpu_is_at91sam9260()) { | ||
| 602 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; | ||
| 603 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; | ||
| 604 | at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP); | ||
| 605 | } else if (cpu_is_at91sam9261()) { | ||
| 606 | uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0); | ||
| 607 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; | ||
| 608 | at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP); | ||
| 609 | } | ||
| 591 | at91_sys_write(AT91_CKGR_PLLBR, 0); | 610 | at91_sys_write(AT91_CKGR_PLLBR, 0); |
| 592 | at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP); | ||
| 593 | 611 | ||
| 594 | udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); | 612 | udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); |
| 595 | uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); | 613 | uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); |
diff --git a/arch/arm/mach-at91rm9200/clock.h b/arch/arm/mach-at91rm9200/clock.h index 0592e662ab37..b5c7a2eb2d1d 100644 --- a/arch/arm/mach-at91rm9200/clock.h +++ b/arch/arm/mach-at91rm9200/clock.h | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | #define CLK_TYPE_PLL 0x2 | 10 | #define CLK_TYPE_PLL 0x2 |
| 11 | #define CLK_TYPE_PROGRAMMABLE 0x4 | 11 | #define CLK_TYPE_PROGRAMMABLE 0x4 |
| 12 | #define CLK_TYPE_PERIPHERAL 0x8 | 12 | #define CLK_TYPE_PERIPHERAL 0x8 |
| 13 | #define CLK_TYPE_SYSTEM 0x10 | ||
| 13 | 14 | ||
| 14 | 15 | ||
| 15 | struct clk { | 16 | struct clk { |
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c index 5b775fac1c6b..67aa5572a3ea 100644 --- a/arch/arm/mach-at91rm9200/pm.c +++ b/arch/arm/mach-at91rm9200/pm.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <asm/arch/at91_pmc.h> | 29 | #include <asm/arch/at91_pmc.h> |
| 30 | #include <asm/arch/at91rm9200_mc.h> | 30 | #include <asm/arch/at91rm9200_mc.h> |
| 31 | #include <asm/arch/gpio.h> | 31 | #include <asm/arch/gpio.h> |
| 32 | #include <asm/arch/cpu.h> | ||
| 32 | 33 | ||
| 33 | #include "generic.h" | 34 | #include "generic.h" |
| 34 | 35 | ||
| @@ -70,9 +71,15 @@ static int at91_pm_verify_clocks(void) | |||
| 70 | scsr = at91_sys_read(AT91_PMC_SCSR); | 71 | scsr = at91_sys_read(AT91_PMC_SCSR); |
| 71 | 72 | ||
| 72 | /* USB must not be using PLLB */ | 73 | /* USB must not be using PLLB */ |
| 73 | if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) { | 74 | if (cpu_is_at91rm9200()) { |
| 74 | pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); | 75 | if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { |
| 75 | return 0; | 76 | pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); |
| 77 | return 0; | ||
| 78 | } | ||
| 79 | } else if (cpu_is_at91sam9260()) { | ||
| 80 | #warning "Check SAM9260 USB clocks" | ||
| 81 | } else if (cpu_is_at91sam9261()) { | ||
| 82 | #warning "Check SAM9261 USB clocks" | ||
| 76 | } | 83 | } |
| 77 | 84 | ||
| 78 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS | 85 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS |
