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-rw-r--r--drivers/mmc/Kconfig2
-rw-r--r--drivers/mmc/at91_mci.c2
-rw-r--r--drivers/mmc/au1xmmc.c2
-rw-r--r--drivers/mmc/imxmmc.c2
-rw-r--r--drivers/mmc/mmc.c294
-rw-r--r--drivers/mmc/mmc_block.c15
-rw-r--r--drivers/mmc/mmc_queue.c63
-rw-r--r--drivers/mmc/mmc_queue.h3
-rw-r--r--drivers/mmc/mmci.c2
-rw-r--r--drivers/mmc/omap.c272
-rw-r--r--drivers/mmc/omap.h55
-rw-r--r--drivers/mmc/pxamci.c2
-rw-r--r--drivers/mmc/sdhci.c17
-rw-r--r--drivers/mmc/sdhci.h2
-rw-r--r--drivers/mmc/wbsd.c2
-rw-r--r--include/linux/mmc/card.h13
-rw-r--r--include/linux/mmc/protocol.h74
17 files changed, 593 insertions, 229 deletions
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index ea41852ec8cd..f4f8ccaf5455 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -40,7 +40,7 @@ config MMC_ARMMMCI
40 If unsure, say N. 40 If unsure, say N.
41 41
42config MMC_PXA 42config MMC_PXA
43 tristate "Intel PXA255 Multimedia Card Interface support" 43 tristate "Intel PXA25x/26x/27x Multimedia Card Interface support"
44 depends on ARCH_PXA && MMC 44 depends on ARCH_PXA && MMC
45 help 45 help
46 This selects the Intel(R) PXA(R) Multimedia card Interface. 46 This selects the Intel(R) PXA(R) Multimedia card Interface.
diff --git a/drivers/mmc/at91_mci.c b/drivers/mmc/at91_mci.c
index 494b23fb0a01..6495cd8a9306 100644
--- a/drivers/mmc/at91_mci.c
+++ b/drivers/mmc/at91_mci.c
@@ -793,7 +793,7 @@ int at91_mci_get_ro(struct mmc_host *mmc)
793 return read_only; 793 return read_only;
794} 794}
795 795
796static struct mmc_host_ops at91_mci_ops = { 796static const struct mmc_host_ops at91_mci_ops = {
797 .request = at91_mci_request, 797 .request = at91_mci_request,
798 .set_ios = at91_mci_set_ios, 798 .set_ios = at91_mci_set_ios,
799 .get_ro = at91_mci_get_ro, 799 .get_ro = at91_mci_get_ro,
diff --git a/drivers/mmc/au1xmmc.c b/drivers/mmc/au1xmmc.c
index 53ffcbb14a97..447fba5825fd 100644
--- a/drivers/mmc/au1xmmc.c
+++ b/drivers/mmc/au1xmmc.c
@@ -875,7 +875,7 @@ static void au1xmmc_init_dma(struct au1xmmc_host *host)
875 host->rx_chan = rxchan; 875 host->rx_chan = rxchan;
876} 876}
877 877
878struct mmc_host_ops au1xmmc_ops = { 878struct const mmc_host_ops au1xmmc_ops = {
879 .request = au1xmmc_request, 879 .request = au1xmmc_request,
880 .set_ios = au1xmmc_set_ios, 880 .set_ios = au1xmmc_set_ios,
881}; 881};
diff --git a/drivers/mmc/imxmmc.c b/drivers/mmc/imxmmc.c
index 659d4a822cc5..06e7fcd19221 100644
--- a/drivers/mmc/imxmmc.c
+++ b/drivers/mmc/imxmmc.c
@@ -877,7 +877,7 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
877 } 877 }
878} 878}
879 879
880static struct mmc_host_ops imxmci_ops = { 880static const struct mmc_host_ops imxmci_ops = {
881 .request = imxmci_request, 881 .request = imxmci_request,
882 .set_ios = imxmci_set_ios, 882 .set_ios = imxmci_set_ios,
883}; 883};
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 766bc54406e5..9d190022a490 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -4,6 +4,7 @@
4 * Copyright (C) 2003-2004 Russell King, All Rights Reserved. 4 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
5 * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved. 5 * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved.
6 * SD support Copyright (C) 2005 Pierre Ossman, All Rights Reserved. 6 * SD support Copyright (C) 2005 Pierre Ossman, All Rights Reserved.
7 * MMCv4 support Copyright (C) 2006 Philip Langdale, All Rights Reserved.
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -396,23 +397,23 @@ static int mmc_select_card(struct mmc_host *host, struct mmc_card *card)
396 return err; 397 return err;
397 398
398 /* 399 /*
399 * Default bus width is 1 bit. 400 * We can only change the bus width of SD cards when
400 */ 401 * they are selected so we have to put the handling
401 host->ios.bus_width = MMC_BUS_WIDTH_1;
402
403 /*
404 * We can only change the bus width of the selected
405 * card so therefore we have to put the handling
406 * here. 402 * here.
403 *
404 * The card is in 1 bit mode by default so
405 * we only need to change if it supports the
406 * wider version.
407 */ 407 */
408 if (host->caps & MMC_CAP_4_BIT_DATA) { 408 if (mmc_card_sd(card) &&
409 (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) {
410
409 /* 411 /*
410 * The card is in 1 bit mode by default so 412 * Default bus width is 1 bit.
411 * we only need to change if it supports the 413 */
412 * wider version. 414 host->ios.bus_width = MMC_BUS_WIDTH_1;
413 */ 415
414 if (mmc_card_sd(card) && 416 if (host->caps & MMC_CAP_4_BIT_DATA) {
415 (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) {
416 struct mmc_command cmd; 417 struct mmc_command cmd;
417 cmd.opcode = SD_APP_SET_BUS_WIDTH; 418 cmd.opcode = SD_APP_SET_BUS_WIDTH;
418 cmd.arg = SD_BUS_WIDTH_4; 419 cmd.arg = SD_BUS_WIDTH_4;
@@ -453,11 +454,11 @@ static void mmc_deselect_cards(struct mmc_host *host)
453 454
454static inline void mmc_delay(unsigned int ms) 455static inline void mmc_delay(unsigned int ms)
455{ 456{
456 if (ms < HZ / 1000) { 457 if (ms < 1000 / HZ) {
457 yield(); 458 cond_resched();
458 mdelay(ms); 459 mdelay(ms);
459 } else { 460 } else {
460 msleep_interruptible (ms); 461 msleep(ms);
461 } 462 }
462} 463}
463 464
@@ -953,6 +954,137 @@ static void mmc_read_csds(struct mmc_host *host)
953 } 954 }
954} 955}
955 956
957static void mmc_process_ext_csds(struct mmc_host *host)
958{
959 int err;
960 struct mmc_card *card;
961
962 struct mmc_request mrq;
963 struct mmc_command cmd;
964 struct mmc_data data;
965
966 struct scatterlist sg;
967
968 /*
969 * As the ext_csd is so large and mostly unused, we don't store the
970 * raw block in mmc_card.
971 */
972 u8 *ext_csd;
973 ext_csd = kmalloc(512, GFP_KERNEL);
974 if (!ext_csd) {
975 printk("%s: could not allocate a buffer to receive the ext_csd."
976 "mmc v4 cards will be treated as v3.\n",
977 mmc_hostname(host));
978 return;
979 }
980
981 list_for_each_entry(card, &host->cards, node) {
982 if (card->state & (MMC_STATE_DEAD|MMC_STATE_PRESENT))
983 continue;
984 if (mmc_card_sd(card))
985 continue;
986 if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
987 continue;
988
989 err = mmc_select_card(host, card);
990 if (err != MMC_ERR_NONE) {
991 mmc_card_set_dead(card);
992 continue;
993 }
994
995 memset(&cmd, 0, sizeof(struct mmc_command));
996
997 cmd.opcode = MMC_SEND_EXT_CSD;
998 cmd.arg = 0;
999 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1000
1001 memset(&data, 0, sizeof(struct mmc_data));
1002
1003 mmc_set_data_timeout(&data, card, 0);
1004
1005 data.blksz = 512;
1006 data.blocks = 1;
1007 data.flags = MMC_DATA_READ;
1008 data.sg = &sg;
1009 data.sg_len = 1;
1010
1011 memset(&mrq, 0, sizeof(struct mmc_request));
1012
1013 mrq.cmd = &cmd;
1014 mrq.data = &data;
1015
1016 sg_init_one(&sg, ext_csd, 512);
1017
1018 mmc_wait_for_req(host, &mrq);
1019
1020 if (cmd.error != MMC_ERR_NONE || data.error != MMC_ERR_NONE) {
1021 mmc_card_set_dead(card);
1022 continue;
1023 }
1024
1025 switch (ext_csd[EXT_CSD_CARD_TYPE]) {
1026 case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:
1027 card->ext_csd.hs_max_dtr = 52000000;
1028 break;
1029 case EXT_CSD_CARD_TYPE_26:
1030 card->ext_csd.hs_max_dtr = 26000000;
1031 break;
1032 default:
1033 /* MMC v4 spec says this cannot happen */
1034 printk("%s: card is mmc v4 but doesn't support "
1035 "any high-speed modes.\n",
1036 mmc_hostname(card->host));
1037 mmc_card_set_bad(card);
1038 continue;
1039 }
1040
1041 /* Activate highspeed support. */
1042 cmd.opcode = MMC_SWITCH;
1043 cmd.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1044 (EXT_CSD_HS_TIMING << 16) |
1045 (1 << 8) |
1046 EXT_CSD_CMD_SET_NORMAL;
1047 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
1048
1049 err = mmc_wait_for_cmd(host, &cmd, CMD_RETRIES);
1050 if (err != MMC_ERR_NONE) {
1051 printk("%s: failed to switch card to mmc v4 "
1052 "high-speed mode.\n",
1053 mmc_hostname(card->host));
1054 continue;
1055 }
1056
1057 mmc_card_set_highspeed(card);
1058
1059 /* Check for host support for wide-bus modes. */
1060 if (!(host->caps & MMC_CAP_4_BIT_DATA)) {
1061 continue;
1062 }
1063
1064 /* Activate 4-bit support. */
1065 cmd.opcode = MMC_SWITCH;
1066 cmd.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1067 (EXT_CSD_BUS_WIDTH << 16) |
1068 (EXT_CSD_BUS_WIDTH_4 << 8) |
1069 EXT_CSD_CMD_SET_NORMAL;
1070 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
1071
1072 err = mmc_wait_for_cmd(host, &cmd, CMD_RETRIES);
1073 if (err != MMC_ERR_NONE) {
1074 printk("%s: failed to switch card to "
1075 "mmc v4 4-bit bus mode.\n",
1076 mmc_hostname(card->host));
1077 continue;
1078 }
1079
1080 host->ios.bus_width = MMC_BUS_WIDTH_4;
1081 }
1082
1083 kfree(ext_csd);
1084
1085 mmc_deselect_cards(host);
1086}
1087
956static void mmc_read_scrs(struct mmc_host *host) 1088static void mmc_read_scrs(struct mmc_host *host)
957{ 1089{
958 int err; 1090 int err;
@@ -1025,14 +1157,133 @@ static void mmc_read_scrs(struct mmc_host *host)
1025 mmc_deselect_cards(host); 1157 mmc_deselect_cards(host);
1026} 1158}
1027 1159
1160static void mmc_read_switch_caps(struct mmc_host *host)
1161{
1162 int err;
1163 struct mmc_card *card;
1164 struct mmc_request mrq;
1165 struct mmc_command cmd;
1166 struct mmc_data data;
1167 unsigned char *status;
1168 struct scatterlist sg;
1169
1170 status = kmalloc(64, GFP_KERNEL);
1171 if (!status) {
1172 printk(KERN_WARNING "%s: Unable to allocate buffer for "
1173 "reading switch capabilities.\n",
1174 mmc_hostname(host));
1175 return;
1176 }
1177
1178 list_for_each_entry(card, &host->cards, node) {
1179 if (card->state & (MMC_STATE_DEAD|MMC_STATE_PRESENT))
1180 continue;
1181 if (!mmc_card_sd(card))
1182 continue;
1183 if (card->scr.sda_vsn < SCR_SPEC_VER_1)
1184 continue;
1185
1186 err = mmc_select_card(host, card);
1187 if (err != MMC_ERR_NONE) {
1188 mmc_card_set_dead(card);
1189 continue;
1190 }
1191
1192 memset(&cmd, 0, sizeof(struct mmc_command));
1193
1194 cmd.opcode = SD_SWITCH;
1195 cmd.arg = 0x00FFFFF1;
1196 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1197
1198 memset(&data, 0, sizeof(struct mmc_data));
1199
1200 mmc_set_data_timeout(&data, card, 0);
1201
1202 data.blksz = 64;
1203 data.blocks = 1;
1204 data.flags = MMC_DATA_READ;
1205 data.sg = &sg;
1206 data.sg_len = 1;
1207
1208 memset(&mrq, 0, sizeof(struct mmc_request));
1209
1210 mrq.cmd = &cmd;
1211 mrq.data = &data;
1212
1213 sg_init_one(&sg, status, 64);
1214
1215 mmc_wait_for_req(host, &mrq);
1216
1217 if (cmd.error != MMC_ERR_NONE || data.error != MMC_ERR_NONE) {
1218 mmc_card_set_dead(card);
1219 continue;
1220 }
1221
1222 if (status[13] & 0x02)
1223 card->sw_caps.hs_max_dtr = 50000000;
1224
1225 memset(&cmd, 0, sizeof(struct mmc_command));
1226
1227 cmd.opcode = SD_SWITCH;
1228 cmd.arg = 0x80FFFFF1;
1229 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1230
1231 memset(&data, 0, sizeof(struct mmc_data));
1232
1233 mmc_set_data_timeout(&data, card, 0);
1234
1235 data.blksz = 64;
1236 data.blocks = 1;
1237 data.flags = MMC_DATA_READ;
1238 data.sg = &sg;
1239 data.sg_len = 1;
1240
1241 memset(&mrq, 0, sizeof(struct mmc_request));
1242
1243 mrq.cmd = &cmd;
1244 mrq.data = &data;
1245
1246 sg_init_one(&sg, status, 64);
1247
1248 mmc_wait_for_req(host, &mrq);
1249
1250 if (cmd.error != MMC_ERR_NONE || data.error != MMC_ERR_NONE) {
1251 mmc_card_set_dead(card);
1252 continue;
1253 }
1254
1255 if ((status[16] & 0xF) != 1) {
1256 printk(KERN_WARNING "%s: Problem switching card "
1257 "into high-speed mode!\n",
1258 mmc_hostname(host));
1259 continue;
1260 }
1261
1262 mmc_card_set_highspeed(card);
1263 }
1264
1265 kfree(status);
1266
1267 mmc_deselect_cards(host);
1268}
1269
1028static unsigned int mmc_calculate_clock(struct mmc_host *host) 1270static unsigned int mmc_calculate_clock(struct mmc_host *host)
1029{ 1271{
1030 struct mmc_card *card; 1272 struct mmc_card *card;
1031 unsigned int max_dtr = host->f_max; 1273 unsigned int max_dtr = host->f_max;
1032 1274
1033 list_for_each_entry(card, &host->cards, node) 1275 list_for_each_entry(card, &host->cards, node)
1034 if (!mmc_card_dead(card) && max_dtr > card->csd.max_dtr) 1276 if (!mmc_card_dead(card)) {
1035 max_dtr = card->csd.max_dtr; 1277 if (mmc_card_highspeed(card) && mmc_card_sd(card)) {
1278 if (max_dtr > card->sw_caps.hs_max_dtr)
1279 max_dtr = card->sw_caps.hs_max_dtr;
1280 } else if (mmc_card_highspeed(card) && !mmc_card_sd(card)) {
1281 if (max_dtr > card->ext_csd.hs_max_dtr)
1282 max_dtr = card->ext_csd.hs_max_dtr;
1283 } else if (max_dtr > card->csd.max_dtr) {
1284 max_dtr = card->csd.max_dtr;
1285 }
1286 }
1036 1287
1037 pr_debug("%s: selected %d.%03dMHz transfer rate\n", 1288 pr_debug("%s: selected %d.%03dMHz transfer rate\n",
1038 mmc_hostname(host), 1289 mmc_hostname(host),
@@ -1150,8 +1401,11 @@ static void mmc_setup(struct mmc_host *host)
1150 1401
1151 mmc_read_csds(host); 1402 mmc_read_csds(host);
1152 1403
1153 if (host->mode == MMC_MODE_SD) 1404 if (host->mode == MMC_MODE_SD) {
1154 mmc_read_scrs(host); 1405 mmc_read_scrs(host);
1406 mmc_read_switch_caps(host);
1407 } else
1408 mmc_process_ext_csds(host);
1155} 1409}
1156 1410
1157 1411
diff --git a/drivers/mmc/mmc_block.c b/drivers/mmc/mmc_block.c
index f9027c8db792..87713572293f 100644
--- a/drivers/mmc/mmc_block.c
+++ b/drivers/mmc/mmc_block.c
@@ -83,7 +83,6 @@ static void mmc_blk_put(struct mmc_blk_data *md)
83 md->usage--; 83 md->usage--;
84 if (md->usage == 0) { 84 if (md->usage == 0) {
85 put_disk(md->disk); 85 put_disk(md->disk);
86 mmc_cleanup_queue(&md->queue);
87 kfree(md); 86 kfree(md);
88 } 87 }
89 mutex_unlock(&open_lock); 88 mutex_unlock(&open_lock);
@@ -225,10 +224,10 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
225 struct mmc_blk_data *md = mq->data; 224 struct mmc_blk_data *md = mq->data;
226 struct mmc_card *card = md->queue.card; 225 struct mmc_card *card = md->queue.card;
227 struct mmc_blk_request brq; 226 struct mmc_blk_request brq;
228 int ret; 227 int ret = 1;
229 228
230 if (mmc_card_claim_host(card)) 229 if (mmc_card_claim_host(card))
231 goto cmd_err; 230 goto flush_queue;
232 231
233 do { 232 do {
234 struct mmc_command cmd; 233 struct mmc_command cmd;
@@ -345,8 +344,6 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
345 return 1; 344 return 1;
346 345
347 cmd_err: 346 cmd_err:
348 ret = 1;
349
350 /* 347 /*
351 * If this is an SD card and we're writing, we can first 348 * If this is an SD card and we're writing, we can first
352 * mark the known good sectors as ok. 349 * mark the known good sectors as ok.
@@ -380,6 +377,7 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
380 377
381 mmc_card_release_host(card); 378 mmc_card_release_host(card);
382 379
380flush_queue:
383 spin_lock_irq(&md->lock); 381 spin_lock_irq(&md->lock);
384 while (ret) { 382 while (ret) {
385 ret = end_that_request_chunk(req, 0, 383 ret = end_that_request_chunk(req, 0,
@@ -553,12 +551,11 @@ static void mmc_blk_remove(struct mmc_card *card)
553 if (md) { 551 if (md) {
554 int devidx; 552 int devidx;
555 553
554 /* Stop new requests from getting into the queue */
556 del_gendisk(md->disk); 555 del_gendisk(md->disk);
557 556
558 /* 557 /* Then flush out any already in there */
559 * I think this is needed. 558 mmc_cleanup_queue(&md->queue);
560 */
561 md->disk->queue = NULL;
562 559
563 devidx = md->disk->first_minor >> MMC_SHIFT; 560 devidx = md->disk->first_minor >> MMC_SHIFT;
564 __clear_bit(devidx, dev_use); 561 __clear_bit(devidx, dev_use);
diff --git a/drivers/mmc/mmc_queue.c b/drivers/mmc/mmc_queue.c
index 61a1de85cb23..a17423a4ed8f 100644
--- a/drivers/mmc/mmc_queue.c
+++ b/drivers/mmc/mmc_queue.c
@@ -10,13 +10,13 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/blkdev.h> 12#include <linux/blkdev.h>
13#include <linux/kthread.h>
13 14
14#include <linux/mmc/card.h> 15#include <linux/mmc/card.h>
15#include <linux/mmc/host.h> 16#include <linux/mmc/host.h>
16#include "mmc_queue.h" 17#include "mmc_queue.h"
17 18
18#define MMC_QUEUE_EXIT (1 << 0) 19#define MMC_QUEUE_SUSPENDED (1 << 0)
19#define MMC_QUEUE_SUSPENDED (1 << 1)
20 20
21/* 21/*
22 * Prepare a MMC request. Essentially, this means passing the 22 * Prepare a MMC request. Essentially, this means passing the
@@ -59,7 +59,6 @@ static int mmc_queue_thread(void *d)
59{ 59{
60 struct mmc_queue *mq = d; 60 struct mmc_queue *mq = d;
61 struct request_queue *q = mq->queue; 61 struct request_queue *q = mq->queue;
62 DECLARE_WAITQUEUE(wait, current);
63 62
64 /* 63 /*
65 * Set iothread to ensure that we aren't put to sleep by 64 * Set iothread to ensure that we aren't put to sleep by
@@ -67,12 +66,7 @@ static int mmc_queue_thread(void *d)
67 */ 66 */
68 current->flags |= PF_MEMALLOC|PF_NOFREEZE; 67 current->flags |= PF_MEMALLOC|PF_NOFREEZE;
69 68
70 daemonize("mmcqd");
71
72 complete(&mq->thread_complete);
73
74 down(&mq->thread_sem); 69 down(&mq->thread_sem);
75 add_wait_queue(&mq->thread_wq, &wait);
76 do { 70 do {
77 struct request *req = NULL; 71 struct request *req = NULL;
78 72
@@ -84,7 +78,7 @@ static int mmc_queue_thread(void *d)
84 spin_unlock_irq(q->queue_lock); 78 spin_unlock_irq(q->queue_lock);
85 79
86 if (!req) { 80 if (!req) {
87 if (mq->flags & MMC_QUEUE_EXIT) 81 if (kthread_should_stop())
88 break; 82 break;
89 up(&mq->thread_sem); 83 up(&mq->thread_sem);
90 schedule(); 84 schedule();
@@ -95,10 +89,8 @@ static int mmc_queue_thread(void *d)
95 89
96 mq->issue_fn(mq, req); 90 mq->issue_fn(mq, req);
97 } while (1); 91 } while (1);
98 remove_wait_queue(&mq->thread_wq, &wait);
99 up(&mq->thread_sem); 92 up(&mq->thread_sem);
100 93
101 complete_and_exit(&mq->thread_complete, 0);
102 return 0; 94 return 0;
103} 95}
104 96
@@ -111,9 +103,22 @@ static int mmc_queue_thread(void *d)
111static void mmc_request(request_queue_t *q) 103static void mmc_request(request_queue_t *q)
112{ 104{
113 struct mmc_queue *mq = q->queuedata; 105 struct mmc_queue *mq = q->queuedata;
106 struct request *req;
107 int ret;
108
109 if (!mq) {
110 printk(KERN_ERR "MMC: killing requests for dead queue\n");
111 while ((req = elv_next_request(q)) != NULL) {
112 do {
113 ret = end_that_request_chunk(req, 0,
114 req->current_nr_sectors << 9);
115 } while (ret);
116 }
117 return;
118 }
114 119
115 if (!mq->req) 120 if (!mq->req)
116 wake_up(&mq->thread_wq); 121 wake_up_process(mq->thread);
117} 122}
118 123
119/** 124/**
@@ -152,36 +157,40 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card, spinlock_t *lock
152 GFP_KERNEL); 157 GFP_KERNEL);
153 if (!mq->sg) { 158 if (!mq->sg) {
154 ret = -ENOMEM; 159 ret = -ENOMEM;
155 goto cleanup; 160 goto cleanup_queue;
156 } 161 }
157 162
158 init_completion(&mq->thread_complete);
159 init_waitqueue_head(&mq->thread_wq);
160 init_MUTEX(&mq->thread_sem); 163 init_MUTEX(&mq->thread_sem);
161 164
162 ret = kernel_thread(mmc_queue_thread, mq, CLONE_KERNEL); 165 mq->thread = kthread_run(mmc_queue_thread, mq, "mmcqd");
163 if (ret >= 0) { 166 if (IS_ERR(mq->thread)) {
164 wait_for_completion(&mq->thread_complete); 167 ret = PTR_ERR(mq->thread);
165 init_completion(&mq->thread_complete); 168 goto free_sg;
166 ret = 0;
167 goto out;
168 } 169 }
169 170
170 cleanup: 171 return 0;
172
173 free_sg:
171 kfree(mq->sg); 174 kfree(mq->sg);
172 mq->sg = NULL; 175 mq->sg = NULL;
173 176 cleanup_queue:
174 blk_cleanup_queue(mq->queue); 177 blk_cleanup_queue(mq->queue);
175 out:
176 return ret; 178 return ret;
177} 179}
178EXPORT_SYMBOL(mmc_init_queue); 180EXPORT_SYMBOL(mmc_init_queue);
179 181
180void mmc_cleanup_queue(struct mmc_queue *mq) 182void mmc_cleanup_queue(struct mmc_queue *mq)
181{ 183{
182 mq->flags |= MMC_QUEUE_EXIT; 184 request_queue_t *q = mq->queue;
183 wake_up(&mq->thread_wq); 185 unsigned long flags;
184 wait_for_completion(&mq->thread_complete); 186
187 /* Mark that we should start throwing out stragglers */
188 spin_lock_irqsave(q->queue_lock, flags);
189 q->queuedata = NULL;
190 spin_unlock_irqrestore(q->queue_lock, flags);
191
192 /* Then terminate our worker thread */
193 kthread_stop(mq->thread);
185 194
186 kfree(mq->sg); 195 kfree(mq->sg);
187 mq->sg = NULL; 196 mq->sg = NULL;
diff --git a/drivers/mmc/mmc_queue.h b/drivers/mmc/mmc_queue.h
index 7182d2f69b4e..c9f139e764f6 100644
--- a/drivers/mmc/mmc_queue.h
+++ b/drivers/mmc/mmc_queue.h
@@ -6,8 +6,7 @@ struct task_struct;
6 6
7struct mmc_queue { 7struct mmc_queue {
8 struct mmc_card *card; 8 struct mmc_card *card;
9 struct completion thread_complete; 9 struct task_struct *thread;
10 wait_queue_head_t thread_wq;
11 struct semaphore thread_sem; 10 struct semaphore thread_sem;
12 unsigned int flags; 11 unsigned int flags;
13 struct request *req; 12 struct request *req;
diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c
index 828503c4ee62..e9b80e920266 100644
--- a/drivers/mmc/mmci.c
+++ b/drivers/mmc/mmci.c
@@ -443,7 +443,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
443 } 443 }
444} 444}
445 445
446static struct mmc_host_ops mmci_ops = { 446static const struct mmc_host_ops mmci_ops = {
447 .request = mmci_request, 447 .request = mmci_request,
448 .set_ios = mmci_set_ios, 448 .set_ios = mmci_set_ios,
449}; 449};
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
index d593ef342e75..435d331e772a 100644
--- a/drivers/mmc/omap.c
+++ b/drivers/mmc/omap.c
@@ -38,7 +38,57 @@
38#include <asm/arch/fpga.h> 38#include <asm/arch/fpga.h>
39#include <asm/arch/tps65010.h> 39#include <asm/arch/tps65010.h>
40 40
41#include "omap.h" 41#define OMAP_MMC_REG_CMD 0x00
42#define OMAP_MMC_REG_ARGL 0x04
43#define OMAP_MMC_REG_ARGH 0x08
44#define OMAP_MMC_REG_CON 0x0c
45#define OMAP_MMC_REG_STAT 0x10
46#define OMAP_MMC_REG_IE 0x14
47#define OMAP_MMC_REG_CTO 0x18
48#define OMAP_MMC_REG_DTO 0x1c
49#define OMAP_MMC_REG_DATA 0x20
50#define OMAP_MMC_REG_BLEN 0x24
51#define OMAP_MMC_REG_NBLK 0x28
52#define OMAP_MMC_REG_BUF 0x2c
53#define OMAP_MMC_REG_SDIO 0x34
54#define OMAP_MMC_REG_REV 0x3c
55#define OMAP_MMC_REG_RSP0 0x40
56#define OMAP_MMC_REG_RSP1 0x44
57#define OMAP_MMC_REG_RSP2 0x48
58#define OMAP_MMC_REG_RSP3 0x4c
59#define OMAP_MMC_REG_RSP4 0x50
60#define OMAP_MMC_REG_RSP5 0x54
61#define OMAP_MMC_REG_RSP6 0x58
62#define OMAP_MMC_REG_RSP7 0x5c
63#define OMAP_MMC_REG_IOSR 0x60
64#define OMAP_MMC_REG_SYSC 0x64
65#define OMAP_MMC_REG_SYSS 0x68
66
67#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
68#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
69#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
70#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
71#define OMAP_MMC_STAT_A_FULL (1 << 10)
72#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
73#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
74#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
75#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
76#define OMAP_MMC_STAT_END_BUSY (1 << 4)
77#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
78#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
79#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
80
81#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
82#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
83
84/*
85 * Command types
86 */
87#define OMAP_MMC_CMDTYPE_BC 0
88#define OMAP_MMC_CMDTYPE_BCR 1
89#define OMAP_MMC_CMDTYPE_AC 2
90#define OMAP_MMC_CMDTYPE_ADTC 3
91
42 92
43#define DRIVER_NAME "mmci-omap" 93#define DRIVER_NAME "mmci-omap"
44#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) 94#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
@@ -60,8 +110,9 @@ struct mmc_omap_host {
60 unsigned char id; /* 16xx chips have 2 MMC blocks */ 110 unsigned char id; /* 16xx chips have 2 MMC blocks */
61 struct clk * iclk; 111 struct clk * iclk;
62 struct clk * fclk; 112 struct clk * fclk;
63 struct resource *res; 113 struct resource *mem_res;
64 void __iomem *base; 114 void __iomem *virt_base;
115 unsigned int phys_base;
65 int irq; 116 int irq;
66 unsigned char bus_mode; 117 unsigned char bus_mode;
67 unsigned char hw_bus_mode; 118 unsigned char hw_bus_mode;
@@ -191,16 +242,16 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
191 242
192 clk_enable(host->fclk); 243 clk_enable(host->fclk);
193 244
194 OMAP_MMC_WRITE(host->base, CTO, 200); 245 OMAP_MMC_WRITE(host, CTO, 200);
195 OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff); 246 OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
196 OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16); 247 OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
197 OMAP_MMC_WRITE(host->base, IE, 248 OMAP_MMC_WRITE(host, IE,
198 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL | 249 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
199 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT | 250 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
200 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT | 251 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
201 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR | 252 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
202 OMAP_MMC_STAT_END_OF_DATA); 253 OMAP_MMC_STAT_END_OF_DATA);
203 OMAP_MMC_WRITE(host->base, CMD, cmdreg); 254 OMAP_MMC_WRITE(host, CMD, cmdreg);
204} 255}
205 256
206static void 257static void
@@ -296,22 +347,22 @@ mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
296 if (cmd->flags & MMC_RSP_136) { 347 if (cmd->flags & MMC_RSP_136) {
297 /* response type 2 */ 348 /* response type 2 */
298 cmd->resp[3] = 349 cmd->resp[3] =
299 OMAP_MMC_READ(host->base, RSP0) | 350 OMAP_MMC_READ(host, RSP0) |
300 (OMAP_MMC_READ(host->base, RSP1) << 16); 351 (OMAP_MMC_READ(host, RSP1) << 16);
301 cmd->resp[2] = 352 cmd->resp[2] =
302 OMAP_MMC_READ(host->base, RSP2) | 353 OMAP_MMC_READ(host, RSP2) |
303 (OMAP_MMC_READ(host->base, RSP3) << 16); 354 (OMAP_MMC_READ(host, RSP3) << 16);
304 cmd->resp[1] = 355 cmd->resp[1] =
305 OMAP_MMC_READ(host->base, RSP4) | 356 OMAP_MMC_READ(host, RSP4) |
306 (OMAP_MMC_READ(host->base, RSP5) << 16); 357 (OMAP_MMC_READ(host, RSP5) << 16);
307 cmd->resp[0] = 358 cmd->resp[0] =
308 OMAP_MMC_READ(host->base, RSP6) | 359 OMAP_MMC_READ(host, RSP6) |
309 (OMAP_MMC_READ(host->base, RSP7) << 16); 360 (OMAP_MMC_READ(host, RSP7) << 16);
310 } else { 361 } else {
311 /* response types 1, 1b, 3, 4, 5, 6 */ 362 /* response types 1, 1b, 3, 4, 5, 6 */
312 cmd->resp[0] = 363 cmd->resp[0] =
313 OMAP_MMC_READ(host->base, RSP6) | 364 OMAP_MMC_READ(host, RSP6) |
314 (OMAP_MMC_READ(host->base, RSP7) << 16); 365 (OMAP_MMC_READ(host, RSP7) << 16);
315 } 366 }
316 } 367 }
317 368
@@ -354,9 +405,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
354 host->data->bytes_xfered += n; 405 host->data->bytes_xfered += n;
355 406
356 if (write) { 407 if (write) {
357 __raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n); 408 __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
358 } else { 409 } else {
359 __raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n); 410 __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
360 } 411 }
361} 412}
362 413
@@ -386,11 +437,11 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
386 int transfer_error; 437 int transfer_error;
387 438
388 if (host->cmd == NULL && host->data == NULL) { 439 if (host->cmd == NULL && host->data == NULL) {
389 status = OMAP_MMC_READ(host->base, STAT); 440 status = OMAP_MMC_READ(host, STAT);
390 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status); 441 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
391 if (status != 0) { 442 if (status != 0) {
392 OMAP_MMC_WRITE(host->base, STAT, status); 443 OMAP_MMC_WRITE(host, STAT, status);
393 OMAP_MMC_WRITE(host->base, IE, 0); 444 OMAP_MMC_WRITE(host, IE, 0);
394 } 445 }
395 return IRQ_HANDLED; 446 return IRQ_HANDLED;
396 } 447 }
@@ -399,8 +450,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
399 end_transfer = 0; 450 end_transfer = 0;
400 transfer_error = 0; 451 transfer_error = 0;
401 452
402 while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) { 453 while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
403 OMAP_MMC_WRITE(host->base, STAT, status); 454 OMAP_MMC_WRITE(host, STAT, status);
404#ifdef CONFIG_MMC_DEBUG 455#ifdef CONFIG_MMC_DEBUG
405 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ", 456 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
406 status, host->cmd != NULL ? host->cmd->opcode : -1); 457 status, host->cmd != NULL ? host->cmd->opcode : -1);
@@ -470,8 +521,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
470 521
471 if (status & OMAP_MMC_STAT_CARD_ERR) { 522 if (status & OMAP_MMC_STAT_CARD_ERR) {
472 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) { 523 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
473 u32 response = OMAP_MMC_READ(host->base, RSP6) 524 u32 response = OMAP_MMC_READ(host, RSP6)
474 | (OMAP_MMC_READ(host->base, RSP7) << 16); 525 | (OMAP_MMC_READ(host, RSP7) << 16);
475 /* STOP sometimes sets must-ignore bits */ 526 /* STOP sometimes sets must-ignore bits */
476 if (!(response & (R1_CC_ERROR 527 if (!(response & (R1_CC_ERROR
477 | R1_ILLEGAL_COMMAND 528 | R1_ILLEGAL_COMMAND
@@ -530,12 +581,6 @@ static void mmc_omap_switch_timer(unsigned long arg)
530 schedule_work(&host->switch_work); 581 schedule_work(&host->switch_work);
531} 582}
532 583
533/* FIXME: Handle card insertion and removal properly. Maybe use a mask
534 * for MMC state? */
535static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
536{
537}
538
539static void mmc_omap_switch_handler(void *data) 584static void mmc_omap_switch_handler(void *data)
540{ 585{
541 struct mmc_omap_host *host = (struct mmc_omap_host *) data; 586 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
@@ -581,7 +626,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
581 int dst_port = 0; 626 int dst_port = 0;
582 int sync_dev = 0; 627 int sync_dev = 0;
583 628
584 data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA; 629 data_addr = host->phys_base + OMAP_MMC_REG_DATA;
585 frame = data->blksz; 630 frame = data->blksz;
586 count = sg_dma_len(sg); 631 count = sg_dma_len(sg);
587 632
@@ -642,7 +687,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
642 /* Max limit for DMA frame count is 0xffff */ 687 /* Max limit for DMA frame count is 0xffff */
643 BUG_ON(count > 0xffff); 688 BUG_ON(count > 0xffff);
644 689
645 OMAP_MMC_WRITE(host->base, BUF, buf); 690 OMAP_MMC_WRITE(host, BUF, buf);
646 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16, 691 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
647 frame, count, OMAP_DMA_SYNC_FRAME, 692 frame, count, OMAP_DMA_SYNC_FRAME,
648 sync_dev, 0); 693 sync_dev, 0);
@@ -727,11 +772,11 @@ static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_reques
727{ 772{
728 u16 reg; 773 u16 reg;
729 774
730 reg = OMAP_MMC_READ(host->base, SDIO); 775 reg = OMAP_MMC_READ(host, SDIO);
731 reg &= ~(1 << 5); 776 reg &= ~(1 << 5);
732 OMAP_MMC_WRITE(host->base, SDIO, reg); 777 OMAP_MMC_WRITE(host, SDIO, reg);
733 /* Set maximum timeout */ 778 /* Set maximum timeout */
734 OMAP_MMC_WRITE(host->base, CTO, 0xff); 779 OMAP_MMC_WRITE(host, CTO, 0xff);
735} 780}
736 781
737static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req) 782static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
@@ -745,14 +790,14 @@ static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_reque
745 timeout = req->data->timeout_clks + req->data->timeout_ns / 500; 790 timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
746 791
747 /* Check if we need to use timeout multiplier register */ 792 /* Check if we need to use timeout multiplier register */
748 reg = OMAP_MMC_READ(host->base, SDIO); 793 reg = OMAP_MMC_READ(host, SDIO);
749 if (timeout > 0xffff) { 794 if (timeout > 0xffff) {
750 reg |= (1 << 5); 795 reg |= (1 << 5);
751 timeout /= 1024; 796 timeout /= 1024;
752 } else 797 } else
753 reg &= ~(1 << 5); 798 reg &= ~(1 << 5);
754 OMAP_MMC_WRITE(host->base, SDIO, reg); 799 OMAP_MMC_WRITE(host, SDIO, reg);
755 OMAP_MMC_WRITE(host->base, DTO, timeout); 800 OMAP_MMC_WRITE(host, DTO, timeout);
756} 801}
757 802
758static void 803static void
@@ -764,19 +809,18 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
764 809
765 host->data = data; 810 host->data = data;
766 if (data == NULL) { 811 if (data == NULL) {
767 OMAP_MMC_WRITE(host->base, BLEN, 0); 812 OMAP_MMC_WRITE(host, BLEN, 0);
768 OMAP_MMC_WRITE(host->base, NBLK, 0); 813 OMAP_MMC_WRITE(host, NBLK, 0);
769 OMAP_MMC_WRITE(host->base, BUF, 0); 814 OMAP_MMC_WRITE(host, BUF, 0);
770 host->dma_in_use = 0; 815 host->dma_in_use = 0;
771 set_cmd_timeout(host, req); 816 set_cmd_timeout(host, req);
772 return; 817 return;
773 } 818 }
774 819
775
776 block_size = data->blksz; 820 block_size = data->blksz;
777 821
778 OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1); 822 OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
779 OMAP_MMC_WRITE(host->base, BLEN, block_size - 1); 823 OMAP_MMC_WRITE(host, BLEN, block_size - 1);
780 set_data_timeout(host, req); 824 set_data_timeout(host, req);
781 825
782 /* cope with calling layer confusion; it issues "single 826 /* cope with calling layer confusion; it issues "single
@@ -818,7 +862,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
818 862
819 /* Revert to PIO? */ 863 /* Revert to PIO? */
820 if (!use_dma) { 864 if (!use_dma) {
821 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f); 865 OMAP_MMC_WRITE(host, BUF, 0x1f1f);
822 host->total_bytes_left = data->blocks * block_size; 866 host->total_bytes_left = data->blocks * block_size;
823 host->sg_len = sg_len; 867 host->sg_len = sg_len;
824 mmc_omap_sg_to_buf(host); 868 mmc_omap_sg_to_buf(host);
@@ -844,7 +888,6 @@ static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
844static void innovator_fpga_socket_power(int on) 888static void innovator_fpga_socket_power(int on)
845{ 889{
846#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX) 890#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
847
848 if (on) { 891 if (on) {
849 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3), 892 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
850 OMAP1510_FPGA_POWER); 893 OMAP1510_FPGA_POWER);
@@ -870,8 +913,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
870 /* GPIO 4 of TPS65010 sends SD_EN signal */ 913 /* GPIO 4 of TPS65010 sends SD_EN signal */
871 tps65010_set_gpio_out_value(GPIO4, HIGH); 914 tps65010_set_gpio_out_value(GPIO4, HIGH);
872 else if (cpu_is_omap24xx()) { 915 else if (cpu_is_omap24xx()) {
873 u16 reg = OMAP_MMC_READ(host->base, CON); 916 u16 reg = OMAP_MMC_READ(host, CON);
874 OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11)); 917 OMAP_MMC_WRITE(host, CON, reg | (1 << 11));
875 } else 918 } else
876 if (host->power_pin >= 0) 919 if (host->power_pin >= 0)
877 omap_set_gpio_dataout(host->power_pin, 1); 920 omap_set_gpio_dataout(host->power_pin, 1);
@@ -883,8 +926,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
883 else if (machine_is_omap_h3()) 926 else if (machine_is_omap_h3())
884 tps65010_set_gpio_out_value(GPIO4, LOW); 927 tps65010_set_gpio_out_value(GPIO4, LOW);
885 else if (cpu_is_omap24xx()) { 928 else if (cpu_is_omap24xx()) {
886 u16 reg = OMAP_MMC_READ(host->base, CON); 929 u16 reg = OMAP_MMC_READ(host, CON);
887 OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11)); 930 OMAP_MMC_WRITE(host, CON, reg & ~(1 << 11));
888 } else 931 } else
889 if (host->power_pin >= 0) 932 if (host->power_pin >= 0)
890 omap_set_gpio_dataout(host->power_pin, 0); 933 omap_set_gpio_dataout(host->power_pin, 0);
@@ -926,7 +969,7 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
926 case MMC_POWER_UP: 969 case MMC_POWER_UP:
927 case MMC_POWER_ON: 970 case MMC_POWER_ON:
928 mmc_omap_power(host, 1); 971 mmc_omap_power(host, 1);
929 dsor |= 1<<11; 972 dsor |= 1 << 11;
930 break; 973 break;
931 } 974 }
932 975
@@ -940,14 +983,14 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
940 * which results in the while loop below getting stuck. 983 * which results in the while loop below getting stuck.
941 * Writing to the CON register twice seems to do the trick. */ 984 * Writing to the CON register twice seems to do the trick. */
942 for (i = 0; i < 2; i++) 985 for (i = 0; i < 2; i++)
943 OMAP_MMC_WRITE(host->base, CON, dsor); 986 OMAP_MMC_WRITE(host, CON, dsor);
944 if (ios->power_mode == MMC_POWER_UP) { 987 if (ios->power_mode == MMC_POWER_UP) {
945 /* Send clock cycles, poll completion */ 988 /* Send clock cycles, poll completion */
946 OMAP_MMC_WRITE(host->base, IE, 0); 989 OMAP_MMC_WRITE(host, IE, 0);
947 OMAP_MMC_WRITE(host->base, STAT, 0xffff); 990 OMAP_MMC_WRITE(host, STAT, 0xffff);
948 OMAP_MMC_WRITE(host->base, CMD, 1<<7); 991 OMAP_MMC_WRITE(host, CMD, 1 << 7);
949 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1)); 992 while ((OMAP_MMC_READ(host, STAT) & 1) == 0);
950 OMAP_MMC_WRITE(host->base, STAT, 1); 993 OMAP_MMC_WRITE(host, STAT, 1);
951 } 994 }
952 clk_disable(host->fclk); 995 clk_disable(host->fclk);
953} 996}
@@ -959,7 +1002,7 @@ static int mmc_omap_get_ro(struct mmc_host *mmc)
959 return host->wp_pin && omap_get_gpio_datain(host->wp_pin); 1002 return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
960} 1003}
961 1004
962static struct mmc_host_ops mmc_omap_ops = { 1005static const struct mmc_host_ops mmc_omap_ops = {
963 .request = mmc_omap_request, 1006 .request = mmc_omap_request,
964 .set_ios = mmc_omap_set_ios, 1007 .set_ios = mmc_omap_set_ios,
965 .get_ro = mmc_omap_get_ro, 1008 .get_ro = mmc_omap_get_ro,
@@ -970,25 +1013,29 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
970 struct omap_mmc_conf *minfo = pdev->dev.platform_data; 1013 struct omap_mmc_conf *minfo = pdev->dev.platform_data;
971 struct mmc_host *mmc; 1014 struct mmc_host *mmc;
972 struct mmc_omap_host *host = NULL; 1015 struct mmc_omap_host *host = NULL;
973 struct resource *r; 1016 struct resource *res;
974 int ret = 0; 1017 int ret = 0;
975 int irq; 1018 int irq;
976 1019
977 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1020 if (minfo == NULL) {
1021 dev_err(&pdev->dev, "platform data missing\n");
1022 return -ENXIO;
1023 }
1024
1025 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
978 irq = platform_get_irq(pdev, 0); 1026 irq = platform_get_irq(pdev, 0);
979 if (!r || irq < 0) 1027 if (res == NULL || irq < 0)
980 return -ENXIO; 1028 return -ENXIO;
981 1029
982 r = request_mem_region(pdev->resource[0].start, 1030 res = request_mem_region(res->start, res->end - res->start + 1,
983 pdev->resource[0].end - pdev->resource[0].start + 1, 1031 pdev->name);
984 pdev->name); 1032 if (res == NULL)
985 if (!r)
986 return -EBUSY; 1033 return -EBUSY;
987 1034
988 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 1035 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
989 if (!mmc) { 1036 if (mmc == NULL) {
990 ret = -ENOMEM; 1037 ret = -ENOMEM;
991 goto out; 1038 goto err_free_mem_region;
992 } 1039 }
993 1040
994 host = mmc_priv(mmc); 1041 host = mmc_priv(mmc);
@@ -1000,13 +1047,13 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1000 host->dma_timer.data = (unsigned long) host; 1047 host->dma_timer.data = (unsigned long) host;
1001 1048
1002 host->id = pdev->id; 1049 host->id = pdev->id;
1003 host->res = r; 1050 host->mem_res = res;
1004 host->irq = irq; 1051 host->irq = irq;
1005 1052
1006 if (cpu_is_omap24xx()) { 1053 if (cpu_is_omap24xx()) {
1007 host->iclk = clk_get(&pdev->dev, "mmc_ick"); 1054 host->iclk = clk_get(&pdev->dev, "mmc_ick");
1008 if (IS_ERR(host->iclk)) 1055 if (IS_ERR(host->iclk))
1009 goto out; 1056 goto err_free_mmc_host;
1010 clk_enable(host->iclk); 1057 clk_enable(host->iclk);
1011 } 1058 }
1012 1059
@@ -1017,7 +1064,7 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1017 1064
1018 if (IS_ERR(host->fclk)) { 1065 if (IS_ERR(host->fclk)) {
1019 ret = PTR_ERR(host->fclk); 1066 ret = PTR_ERR(host->fclk);
1020 goto out; 1067 goto err_free_iclk;
1021 } 1068 }
1022 1069
1023 /* REVISIT: 1070 /* REVISIT:
@@ -1030,14 +1077,15 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1030 host->use_dma = 1; 1077 host->use_dma = 1;
1031 host->dma_ch = -1; 1078 host->dma_ch = -1;
1032 1079
1033 host->irq = pdev->resource[1].start; 1080 host->irq = irq;
1034 host->base = (void __iomem*)IO_ADDRESS(r->start); 1081 host->phys_base = host->mem_res->start;
1082 host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
1035 1083
1036 mmc->ops = &mmc_omap_ops; 1084 mmc->ops = &mmc_omap_ops;
1037 mmc->f_min = 400000; 1085 mmc->f_min = 400000;
1038 mmc->f_max = 24000000; 1086 mmc->f_max = 24000000;
1039 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 1087 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1040 mmc->caps = MMC_CAP_BYTEBLOCK; 1088 mmc->caps = MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1041 1089
1042 if (minfo->wire4) 1090 if (minfo->wire4)
1043 mmc->caps |= MMC_CAP_4_BIT_DATA; 1091 mmc->caps |= MMC_CAP_4_BIT_DATA;
@@ -1055,20 +1103,18 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1055 if ((ret = omap_request_gpio(host->power_pin)) != 0) { 1103 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
1056 dev_err(mmc_dev(host->mmc), 1104 dev_err(mmc_dev(host->mmc),
1057 "Unable to get GPIO pin for MMC power\n"); 1105 "Unable to get GPIO pin for MMC power\n");
1058 goto out; 1106 goto err_free_fclk;
1059 } 1107 }
1060 omap_set_gpio_direction(host->power_pin, 0); 1108 omap_set_gpio_direction(host->power_pin, 0);
1061 } 1109 }
1062 1110
1063 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host); 1111 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1064 if (ret) 1112 if (ret)
1065 goto out; 1113 goto err_free_power_gpio;
1066 1114
1067 host->dev = &pdev->dev; 1115 host->dev = &pdev->dev;
1068 platform_set_drvdata(pdev, host); 1116 platform_set_drvdata(pdev, host);
1069 1117
1070 mmc_add_host(mmc);
1071
1072 if (host->switch_pin >= 0) { 1118 if (host->switch_pin >= 0) {
1073 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host); 1119 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
1074 init_timer(&host->switch_timer); 1120 init_timer(&host->switch_timer);
@@ -1106,10 +1152,11 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1106 schedule_work(&host->switch_work); 1152 schedule_work(&host->switch_work);
1107 } 1153 }
1108 1154
1109no_switch: 1155 mmc_add_host(mmc);
1156
1110 return 0; 1157 return 0;
1111 1158
1112out: 1159no_switch:
1113 /* FIXME: Free other resources too. */ 1160 /* FIXME: Free other resources too. */
1114 if (host) { 1161 if (host) {
1115 if (host->iclk && !IS_ERR(host->iclk)) 1162 if (host->iclk && !IS_ERR(host->iclk))
@@ -1118,6 +1165,20 @@ out:
1118 clk_put(host->fclk); 1165 clk_put(host->fclk);
1119 mmc_free_host(host->mmc); 1166 mmc_free_host(host->mmc);
1120 } 1167 }
1168err_free_power_gpio:
1169 if (host->power_pin >= 0)
1170 omap_free_gpio(host->power_pin);
1171err_free_fclk:
1172 clk_put(host->fclk);
1173err_free_iclk:
1174 if (host->iclk != NULL) {
1175 clk_disable(host->iclk);
1176 clk_put(host->iclk);
1177 }
1178err_free_mmc_host:
1179 mmc_free_host(host->mmc);
1180err_free_mem_region:
1181 release_mem_region(res->start, res->end - res->start + 1);
1121 return ret; 1182 return ret;
1122} 1183}
1123 1184
@@ -1127,30 +1188,31 @@ static int mmc_omap_remove(struct platform_device *pdev)
1127 1188
1128 platform_set_drvdata(pdev, NULL); 1189 platform_set_drvdata(pdev, NULL);
1129 1190
1130 if (host) { 1191 BUG_ON(host == NULL);
1131 mmc_remove_host(host->mmc); 1192
1132 free_irq(host->irq, host); 1193 mmc_remove_host(host->mmc);
1133 1194 free_irq(host->irq, host);
1134 if (host->power_pin >= 0) 1195
1135 omap_free_gpio(host->power_pin); 1196 if (host->power_pin >= 0)
1136 if (host->switch_pin >= 0) { 1197 omap_free_gpio(host->power_pin);
1137 device_remove_file(&pdev->dev, &dev_attr_enable_poll); 1198 if (host->switch_pin >= 0) {
1138 device_remove_file(&pdev->dev, &dev_attr_cover_switch); 1199 device_remove_file(&pdev->dev, &dev_attr_enable_poll);
1139 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host); 1200 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1140 omap_free_gpio(host->switch_pin); 1201 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1141 host->switch_pin = -1; 1202 omap_free_gpio(host->switch_pin);
1142 del_timer_sync(&host->switch_timer); 1203 host->switch_pin = -1;
1143 flush_scheduled_work(); 1204 del_timer_sync(&host->switch_timer);
1144 } 1205 flush_scheduled_work();
1145 if (host->iclk && !IS_ERR(host->iclk))
1146 clk_put(host->iclk);
1147 if (host->fclk && !IS_ERR(host->fclk))
1148 clk_put(host->fclk);
1149 mmc_free_host(host->mmc);
1150 } 1206 }
1207 if (host->iclk && !IS_ERR(host->iclk))
1208 clk_put(host->iclk);
1209 if (host->fclk && !IS_ERR(host->fclk))
1210 clk_put(host->fclk);
1151 1211
1152 release_mem_region(pdev->resource[0].start, 1212 release_mem_region(pdev->resource[0].start,
1153 pdev->resource[0].end - pdev->resource[0].start + 1); 1213 pdev->resource[0].end - pdev->resource[0].start + 1);
1214
1215 mmc_free_host(host->mmc);
1154 1216
1155 return 0; 1217 return 0;
1156} 1218}
diff --git a/drivers/mmc/omap.h b/drivers/mmc/omap.h
deleted file mode 100644
index c954d355a5e3..000000000000
--- a/drivers/mmc/omap.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef DRIVERS_MEDIA_MMC_OMAP_H
2#define DRIVERS_MEDIA_MMC_OMAP_H
3
4#define OMAP_MMC_REG_CMD 0x00
5#define OMAP_MMC_REG_ARGL 0x04
6#define OMAP_MMC_REG_ARGH 0x08
7#define OMAP_MMC_REG_CON 0x0c
8#define OMAP_MMC_REG_STAT 0x10
9#define OMAP_MMC_REG_IE 0x14
10#define OMAP_MMC_REG_CTO 0x18
11#define OMAP_MMC_REG_DTO 0x1c
12#define OMAP_MMC_REG_DATA 0x20
13#define OMAP_MMC_REG_BLEN 0x24
14#define OMAP_MMC_REG_NBLK 0x28
15#define OMAP_MMC_REG_BUF 0x2c
16#define OMAP_MMC_REG_SDIO 0x34
17#define OMAP_MMC_REG_REV 0x3c
18#define OMAP_MMC_REG_RSP0 0x40
19#define OMAP_MMC_REG_RSP1 0x44
20#define OMAP_MMC_REG_RSP2 0x48
21#define OMAP_MMC_REG_RSP3 0x4c
22#define OMAP_MMC_REG_RSP4 0x50
23#define OMAP_MMC_REG_RSP5 0x54
24#define OMAP_MMC_REG_RSP6 0x58
25#define OMAP_MMC_REG_RSP7 0x5c
26#define OMAP_MMC_REG_IOSR 0x60
27#define OMAP_MMC_REG_SYSC 0x64
28#define OMAP_MMC_REG_SYSS 0x68
29
30#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
31#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
32#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
33#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
34#define OMAP_MMC_STAT_A_FULL (1 << 10)
35#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
36#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
37#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
38#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
39#define OMAP_MMC_STAT_END_BUSY (1 << 4)
40#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
41#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
42#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
43
44#define OMAP_MMC_READ(base, reg) __raw_readw((base) + OMAP_MMC_REG_##reg)
45#define OMAP_MMC_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MMC_REG_##reg)
46
47/*
48 * Command types
49 */
50#define OMAP_MMC_CMDTYPE_BC 0
51#define OMAP_MMC_CMDTYPE_BCR 1
52#define OMAP_MMC_CMDTYPE_AC 2
53#define OMAP_MMC_CMDTYPE_ADTC 3
54
55#endif
diff --git a/drivers/mmc/pxamci.c b/drivers/mmc/pxamci.c
index a526698b8c91..471e9f4e0530 100644
--- a/drivers/mmc/pxamci.c
+++ b/drivers/mmc/pxamci.c
@@ -393,7 +393,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
393 host->clkrt, host->cmdat); 393 host->clkrt, host->cmdat);
394} 394}
395 395
396static struct mmc_host_ops pxamci_ops = { 396static const struct mmc_host_ops pxamci_ops = {
397 .request = pxamci_request, 397 .request = pxamci_request,
398 .get_ro = pxamci_get_ro, 398 .get_ro = pxamci_get_ro,
399 .set_ios = pxamci_set_ios, 399 .set_ios = pxamci_set_ios,
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 9a7d39b7cdbf..cd98117632d3 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -616,6 +616,7 @@ static void sdhci_finish_command(struct sdhci_host *host)
616static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 616static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
617{ 617{
618 int div; 618 int div;
619 u8 ctrl;
619 u16 clk; 620 u16 clk;
620 unsigned long timeout; 621 unsigned long timeout;
621 622
@@ -624,6 +625,13 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
624 625
625 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); 626 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
626 627
628 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
629 if (clock > 25000000)
630 ctrl |= SDHCI_CTRL_HISPD;
631 else
632 ctrl &= ~SDHCI_CTRL_HISPD;
633 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
634
627 if (clock == 0) 635 if (clock == 0)
628 goto out; 636 goto out;
629 637
@@ -784,7 +792,7 @@ static int sdhci_get_ro(struct mmc_host *mmc)
784 return !(present & SDHCI_WRITE_PROTECT); 792 return !(present & SDHCI_WRITE_PROTECT);
785} 793}
786 794
787static struct mmc_host_ops sdhci_ops = { 795static const struct mmc_host_ops sdhci_ops = {
788 .request = sdhci_request, 796 .request = sdhci_request,
789 .set_ios = sdhci_set_ios, 797 .set_ios = sdhci_set_ios,
790 .get_ro = sdhci_get_ro, 798 .get_ro = sdhci_get_ro,
@@ -1291,6 +1299,13 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1291 else if (caps & SDHCI_CAN_VDD_180) 1299 else if (caps & SDHCI_CAN_VDD_180)
1292 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19; 1300 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1293 1301
1302 if ((host->max_clk > 25000000) && !(caps & SDHCI_CAN_DO_HISPD)) {
1303 printk(KERN_ERR "%s: Controller reports > 25 MHz base clock,"
1304 " but no high speed support.\n",
1305 host->slot_descr);
1306 mmc->f_max = 25000000;
1307 }
1308
1294 if (mmc->ocr_avail == 0) { 1309 if (mmc->ocr_avail == 0) {
1295 printk(KERN_ERR "%s: Hardware doesn't report any " 1310 printk(KERN_ERR "%s: Hardware doesn't report any "
1296 "support voltages.\n", host->slot_descr); 1311 "support voltages.\n", host->slot_descr);
diff --git a/drivers/mmc/sdhci.h b/drivers/mmc/sdhci.h
index 72a67937afe0..f9d1a0a6f03a 100644
--- a/drivers/mmc/sdhci.h
+++ b/drivers/mmc/sdhci.h
@@ -71,6 +71,7 @@
71#define SDHCI_HOST_CONTROL 0x28 71#define SDHCI_HOST_CONTROL 0x28
72#define SDHCI_CTRL_LED 0x01 72#define SDHCI_CTRL_LED 0x01
73#define SDHCI_CTRL_4BITBUS 0x02 73#define SDHCI_CTRL_4BITBUS 0x02
74#define SDHCI_CTRL_HISPD 0x04
74 75
75#define SDHCI_POWER_CONTROL 0x29 76#define SDHCI_POWER_CONTROL 0x29
76#define SDHCI_POWER_ON 0x01 77#define SDHCI_POWER_ON 0x01
@@ -138,6 +139,7 @@
138#define SDHCI_CLOCK_BASE_SHIFT 8 139#define SDHCI_CLOCK_BASE_SHIFT 8
139#define SDHCI_MAX_BLOCK_MASK 0x00030000 140#define SDHCI_MAX_BLOCK_MASK 0x00030000
140#define SDHCI_MAX_BLOCK_SHIFT 16 141#define SDHCI_MAX_BLOCK_SHIFT 16
142#define SDHCI_CAN_DO_HISPD 0x00200000
141#define SDHCI_CAN_DO_DMA 0x00400000 143#define SDHCI_CAN_DO_DMA 0x00400000
142#define SDHCI_CAN_VDD_330 0x01000000 144#define SDHCI_CAN_VDD_330 0x01000000
143#define SDHCI_CAN_VDD_300 0x02000000 145#define SDHCI_CAN_VDD_300 0x02000000
diff --git a/drivers/mmc/wbsd.c b/drivers/mmc/wbsd.c
index 682e62b0b09d..7a282672f8e9 100644
--- a/drivers/mmc/wbsd.c
+++ b/drivers/mmc/wbsd.c
@@ -1021,7 +1021,7 @@ static int wbsd_get_ro(struct mmc_host *mmc)
1021 return csr & WBSD_WRPT; 1021 return csr & WBSD_WRPT;
1022} 1022}
1023 1023
1024static struct mmc_host_ops wbsd_ops = { 1024static const struct mmc_host_ops wbsd_ops = {
1025 .request = wbsd_request, 1025 .request = wbsd_request,
1026 .set_ios = wbsd_set_ios, 1026 .set_ios = wbsd_set_ios,
1027 .get_ro = wbsd_get_ro, 1027 .get_ro = wbsd_get_ro,
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 991a37382a22..d0e6a5497614 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -39,6 +39,10 @@ struct mmc_csd {
39 write_misalign:1; 39 write_misalign:1;
40}; 40};
41 41
42struct mmc_ext_csd {
43 unsigned int hs_max_dtr;
44};
45
42struct sd_scr { 46struct sd_scr {
43 unsigned char sda_vsn; 47 unsigned char sda_vsn;
44 unsigned char bus_widths; 48 unsigned char bus_widths;
@@ -46,6 +50,10 @@ struct sd_scr {
46#define SD_SCR_BUS_WIDTH_4 (1<<2) 50#define SD_SCR_BUS_WIDTH_4 (1<<2)
47}; 51};
48 52
53struct sd_switch_caps {
54 unsigned int hs_max_dtr;
55};
56
49struct mmc_host; 57struct mmc_host;
50 58
51/* 59/*
@@ -62,12 +70,15 @@ struct mmc_card {
62#define MMC_STATE_BAD (1<<2) /* unrecognised device */ 70#define MMC_STATE_BAD (1<<2) /* unrecognised device */
63#define MMC_STATE_SDCARD (1<<3) /* is an SD card */ 71#define MMC_STATE_SDCARD (1<<3) /* is an SD card */
64#define MMC_STATE_READONLY (1<<4) /* card is read-only */ 72#define MMC_STATE_READONLY (1<<4) /* card is read-only */
73#define MMC_STATE_HIGHSPEED (1<<5) /* card is in high speed mode */
65 u32 raw_cid[4]; /* raw card CID */ 74 u32 raw_cid[4]; /* raw card CID */
66 u32 raw_csd[4]; /* raw card CSD */ 75 u32 raw_csd[4]; /* raw card CSD */
67 u32 raw_scr[2]; /* raw card SCR */ 76 u32 raw_scr[2]; /* raw card SCR */
68 struct mmc_cid cid; /* card identification */ 77 struct mmc_cid cid; /* card identification */
69 struct mmc_csd csd; /* card specific */ 78 struct mmc_csd csd; /* card specific */
79 struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */
70 struct sd_scr scr; /* extra SD information */ 80 struct sd_scr scr; /* extra SD information */
81 struct sd_switch_caps sw_caps; /* switch (CMD6) caps */
71}; 82};
72 83
73#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) 84#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
@@ -75,12 +86,14 @@ struct mmc_card {
75#define mmc_card_bad(c) ((c)->state & MMC_STATE_BAD) 86#define mmc_card_bad(c) ((c)->state & MMC_STATE_BAD)
76#define mmc_card_sd(c) ((c)->state & MMC_STATE_SDCARD) 87#define mmc_card_sd(c) ((c)->state & MMC_STATE_SDCARD)
77#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) 88#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
89#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
78 90
79#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) 91#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
80#define mmc_card_set_dead(c) ((c)->state |= MMC_STATE_DEAD) 92#define mmc_card_set_dead(c) ((c)->state |= MMC_STATE_DEAD)
81#define mmc_card_set_bad(c) ((c)->state |= MMC_STATE_BAD) 93#define mmc_card_set_bad(c) ((c)->state |= MMC_STATE_BAD)
82#define mmc_card_set_sd(c) ((c)->state |= MMC_STATE_SDCARD) 94#define mmc_card_set_sd(c) ((c)->state |= MMC_STATE_SDCARD)
83#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) 95#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
96#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
84 97
85#define mmc_card_name(c) ((c)->cid.prod_name) 98#define mmc_card_name(c) ((c)->cid.prod_name)
86#define mmc_card_id(c) ((c)->dev.bus_id) 99#define mmc_card_id(c) ((c)->dev.bus_id)
diff --git a/include/linux/mmc/protocol.h b/include/linux/mmc/protocol.h
index 08dec8d9e703..2dce60c43f4b 100644
--- a/include/linux/mmc/protocol.h
+++ b/include/linux/mmc/protocol.h
@@ -25,14 +25,16 @@
25#ifndef MMC_MMC_PROTOCOL_H 25#ifndef MMC_MMC_PROTOCOL_H
26#define MMC_MMC_PROTOCOL_H 26#define MMC_MMC_PROTOCOL_H
27 27
28/* Standard MMC commands (3.1) type argument response */ 28/* Standard MMC commands (4.1) type argument response */
29 /* class 1 */ 29 /* class 1 */
30#define MMC_GO_IDLE_STATE 0 /* bc */ 30#define MMC_GO_IDLE_STATE 0 /* bc */
31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ 31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
32#define MMC_ALL_SEND_CID 2 /* bcr R2 */ 32#define MMC_ALL_SEND_CID 2 /* bcr R2 */
33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ 33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
34#define MMC_SET_DSR 4 /* bc [31:16] RCA */ 34#define MMC_SET_DSR 4 /* bc [31:16] RCA */
35#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
35#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ 36#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
37#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
36#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ 38#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
37#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ 39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
38#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ 40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
@@ -80,6 +82,7 @@
80 /* class 8 */ 82 /* class 8 */
81/* This is basically the same command as for MMC with some quirks. */ 83/* This is basically the same command as for MMC with some quirks. */
82#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ 84#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
85#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
83 86
84 /* Application commands */ 87 /* Application commands */
85#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ 88#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
@@ -88,6 +91,30 @@
88#define SD_APP_SEND_SCR 51 /* adtc R1 */ 91#define SD_APP_SEND_SCR 51 /* adtc R1 */
89 92
90/* 93/*
94 * MMC_SWITCH argument format:
95 *
96 * [31:26] Always 0
97 * [25:24] Access Mode
98 * [23:16] Location of target Byte in EXT_CSD
99 * [15:08] Value Byte
100 * [07:03] Always 0
101 * [02:00] Command Set
102 */
103
104/*
105 * SD_SWITCH argument format:
106 *
107 * [31] Check (0) or switch (1)
108 * [30:24] Reserved (0)
109 * [23:20] Function group 6
110 * [19:16] Function group 5
111 * [15:12] Function group 4
112 * [11:8] Function group 3
113 * [7:4] Function group 2
114 * [3:0] Function group 1
115 */
116
117/*
91 MMC status in R1 118 MMC status in R1
92 Type 119 Type
93 e : error bit 120 e : error bit
@@ -230,13 +257,54 @@ struct _mmc_csd {
230 257
231#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ 258#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
232#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ 259#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
233#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 */ 260#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
261#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
234 262
235#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ 263#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
236#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ 264#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
237#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ 265#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
238#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 */ 266#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
267#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
268
269/*
270 * EXT_CSD fields
271 */
272
273#define EXT_CSD_BUS_WIDTH 183 /* R/W */
274#define EXT_CSD_HS_TIMING 185 /* R/W */
275#define EXT_CSD_CARD_TYPE 196 /* RO */
276
277/*
278 * EXT_CSD field definitions
279 */
280
281#define EXT_CSD_CMD_SET_NORMAL (1<<0)
282#define EXT_CSD_CMD_SET_SECURE (1<<1)
283#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
284
285#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
286#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
287
288#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
289#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
290#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
291
292/*
293 * MMC_SWITCH access modes
294 */
295
296#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
297#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
298#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
299#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
300
301/*
302 * SCR field definitions
303 */
239 304
305#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
306#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
307#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
240 308
241/* 309/*
242 * SD bus widths 310 * SD bus widths
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-05 05:58:07 -0500