diff options
-rw-r--r-- | arch/x86/boot/compressed/relocs.c | 7 | ||||
-rw-r--r-- | arch/x86/mm/pageattr.c | 17 |
2 files changed, 8 insertions, 16 deletions
diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c index 857e492c571e..bbeb0c3fbd90 100644 --- a/arch/x86/boot/compressed/relocs.c +++ b/arch/x86/boot/compressed/relocs.c | |||
@@ -504,8 +504,11 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym)) | |||
504 | if (sym->st_shndx == SHN_ABS) { | 504 | if (sym->st_shndx == SHN_ABS) { |
505 | continue; | 505 | continue; |
506 | } | 506 | } |
507 | if (r_type == R_386_PC32) { | 507 | if (r_type == R_386_NONE || r_type == R_386_PC32) { |
508 | /* PC relative relocations don't need to be adjusted */ | 508 | /* |
509 | * NONE can be ignored and and PC relative | ||
510 | * relocations don't need to be adjusted. | ||
511 | */ | ||
509 | } | 512 | } |
510 | else if (r_type == R_386_32) { | 513 | else if (r_type == R_386_32) { |
511 | /* Visit relocations that need to be adjusted */ | 514 | /* Visit relocations that need to be adjusted */ |
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 0f9052bcec4b..e17efed088c5 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -204,30 +204,19 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache) | |||
204 | } | 204 | } |
205 | } | 205 | } |
206 | 206 | ||
207 | static void wbinvd_local(void *unused) | ||
208 | { | ||
209 | wbinvd(); | ||
210 | } | ||
211 | |||
212 | static void cpa_flush_array(unsigned long *start, int numpages, int cache, | 207 | static void cpa_flush_array(unsigned long *start, int numpages, int cache, |
213 | int in_flags, struct page **pages) | 208 | int in_flags, struct page **pages) |
214 | { | 209 | { |
215 | unsigned int i, level; | 210 | unsigned int i, level; |
211 | unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */ | ||
216 | 212 | ||
217 | BUG_ON(irqs_disabled()); | 213 | BUG_ON(irqs_disabled()); |
218 | 214 | ||
219 | on_each_cpu(__cpa_flush_range, NULL, 1); | 215 | on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1); |
220 | 216 | ||
221 | if (!cache) | 217 | if (!cache || do_wbinvd) |
222 | return; | 218 | return; |
223 | 219 | ||
224 | /* 4M threshold */ | ||
225 | if (numpages >= 1024) { | ||
226 | if (boot_cpu_data.x86 >= 4) | ||
227 | on_each_cpu(wbinvd_local, NULL, 1); | ||
228 | |||
229 | return; | ||
230 | } | ||
231 | /* | 220 | /* |
232 | * We only need to flush on one CPU, | 221 | * We only need to flush on one CPU, |
233 | * clflush is a MESI-coherent instruction that | 222 | * clflush is a MESI-coherent instruction that |